java -ea -Xmx16000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-64bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--input--misc--ims-pcu.ko-entry_point_false-unreach-call.cil.out.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c6a52e0 [2018-11-19 18:30:16,706 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-19 18:30:16,708 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-19 18:30:16,720 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-19 18:30:16,720 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-19 18:30:16,721 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-19 18:30:16,722 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-19 18:30:16,724 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-19 18:30:16,726 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-19 18:30:16,727 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-19 18:30:16,728 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-19 18:30:16,728 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-19 18:30:16,729 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-19 18:30:16,730 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-19 18:30:16,731 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-19 18:30:16,732 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-19 18:30:16,733 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-19 18:30:16,734 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-19 18:30:16,736 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-19 18:30:16,738 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-19 18:30:16,739 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-19 18:30:16,740 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-19 18:30:16,743 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-19 18:30:16,743 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-19 18:30:16,743 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-19 18:30:16,744 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-19 18:30:16,745 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-19 18:30:16,746 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-19 18:30:16,747 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-19 18:30:16,748 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-19 18:30:16,748 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-19 18:30:16,749 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-19 18:30:16,749 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-19 18:30:16,749 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-19 18:30:16,750 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-19 18:30:16,751 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-19 18:30:16,751 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-64bit-Automizer_Default.epf [2018-11-19 18:30:16,765 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-19 18:30:16,765 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-19 18:30:16,766 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-19 18:30:16,766 INFO L133 SettingsManager]: * ... to procedures called more than once=ALWAYS [2018-11-19 18:30:16,767 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-19 18:30:16,767 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-19 18:30:16,768 INFO L133 SettingsManager]: * Use SBE=true [2018-11-19 18:30:16,768 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-19 18:30:16,768 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-19 18:30:16,768 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-19 18:30:16,768 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-19 18:30:16,769 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-19 18:30:16,769 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-19 18:30:16,769 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-19 18:30:16,769 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-19 18:30:16,769 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-19 18:30:16,770 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-19 18:30:16,770 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-19 18:30:16,770 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-19 18:30:16,770 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-19 18:30:16,770 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-19 18:30:16,771 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-19 18:30:16,771 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-19 18:30:16,771 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-19 18:30:16,771 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-19 18:30:16,771 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-19 18:30:16,772 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-19 18:30:16,772 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-19 18:30:16,772 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-11-19 18:30:16,813 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-19 18:30:16,826 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-19 18:30:16,829 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-19 18:30:16,831 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-19 18:30:16,831 INFO L276 PluginConnector]: CDTParser initialized [2018-11-19 18:30:16,832 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--input--misc--ims-pcu.ko-entry_point_false-unreach-call.cil.out.c [2018-11-19 18:30:16,890 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a080eb379/c7b455bcf9274263bca11c151f0ffe97/FLAG85074fe92 [2018-11-19 18:30:17,491 INFO L307 CDTParser]: Found 1 translation units. [2018-11-19 18:30:17,492 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--input--misc--ims-pcu.ko-entry_point_false-unreach-call.cil.out.c [2018-11-19 18:30:17,526 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a080eb379/c7b455bcf9274263bca11c151f0ffe97/FLAG85074fe92 [2018-11-19 18:30:17,856 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a080eb379/c7b455bcf9274263bca11c151f0ffe97 [2018-11-19 18:30:17,865 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-19 18:30:17,867 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-11-19 18:30:17,868 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-19 18:30:17,868 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-19 18:30:17,872 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-19 18:30:17,873 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 06:30:17" (1/1) ... [2018-11-19 18:30:17,876 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7c919d5e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 06:30:17, skipping insertion in model container [2018-11-19 18:30:17,877 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 06:30:17" (1/1) ... [2018-11-19 18:30:17,887 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-19 18:30:17,992 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-19 18:30:19,525 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-19 18:30:19,564 INFO L191 MainTranslator]: Completed pre-run [2018-11-19 18:30:19,846 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-19 18:30:20,112 INFO L195 MainTranslator]: Completed translation [2018-11-19 18:30:20,113 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 06:30:20 WrapperNode [2018-11-19 18:30:20,113 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-19 18:30:20,114 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-19 18:30:20,114 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-19 18:30:20,114 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-19 18:30:20,129 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 06:30:20" (1/1) ... [2018-11-19 18:30:20,129 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 06:30:20" (1/1) ... [2018-11-19 18:30:20,193 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 06:30:20" (1/1) ... [2018-11-19 18:30:20,194 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 06:30:20" (1/1) ... [2018-11-19 18:30:20,337 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 06:30:20" (1/1) ... [2018-11-19 18:30:20,356 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 06:30:20" (1/1) ... [2018-11-19 18:30:20,384 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 06:30:20" (1/1) ... [2018-11-19 18:30:20,408 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-19 18:30:20,409 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-19 18:30:20,409 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-19 18:30:20,409 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-19 18:30:20,410 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 06:30:20" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-19 18:30:20,480 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-19 18:30:20,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-19 18:30:20,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-11-19 18:30:20,481 INFO L138 BoogieDeclarations]: Found implementation of procedure __arch_swab32 [2018-11-19 18:30:20,481 INFO L138 BoogieDeclarations]: Found implementation of procedure __fswab16 [2018-11-19 18:30:20,481 INFO L138 BoogieDeclarations]: Found implementation of procedure __fswab32 [2018-11-19 18:30:20,482 INFO L138 BoogieDeclarations]: Found implementation of procedure __swab32p [2018-11-19 18:30:20,482 INFO L138 BoogieDeclarations]: Found implementation of procedure __le32_to_cpup [2018-11-19 18:30:20,482 INFO L138 BoogieDeclarations]: Found implementation of procedure __le16_to_cpup [2018-11-19 18:30:20,482 INFO L138 BoogieDeclarations]: Found implementation of procedure __be32_to_cpup [2018-11-19 18:30:20,483 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_endpoint_dir_in [2018-11-19 18:30:20,483 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_endpoint_dir_out [2018-11-19 18:30:20,483 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_endpoint_xfer_bulk [2018-11-19 18:30:20,483 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_endpoint_is_bulk_in [2018-11-19 18:30:20,483 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_endpoint_is_bulk_out [2018-11-19 18:30:20,484 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_endpoint_maxp [2018-11-19 18:30:20,484 INFO L138 BoogieDeclarations]: Found implementation of procedure __set_bit [2018-11-19 18:30:20,484 INFO L138 BoogieDeclarations]: Found implementation of procedure __clear_bit [2018-11-19 18:30:20,484 INFO L138 BoogieDeclarations]: Found implementation of procedure atomic_add_return [2018-11-19 18:30:20,485 INFO L138 BoogieDeclarations]: Found implementation of procedure INIT_LIST_HEAD [2018-11-19 18:30:20,485 INFO L138 BoogieDeclarations]: Found implementation of procedure queue_work [2018-11-19 18:30:20,485 INFO L138 BoogieDeclarations]: Found implementation of procedure schedule_work [2018-11-19 18:30:20,485 INFO L138 BoogieDeclarations]: Found implementation of procedure init_completion [2018-11-19 18:30:20,486 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_make_path [2018-11-19 18:30:20,486 INFO L138 BoogieDeclarations]: Found implementation of procedure __create_pipe [2018-11-19 18:30:20,486 INFO L138 BoogieDeclarations]: Found implementation of procedure __kmalloc [2018-11-19 18:30:20,486 INFO L138 BoogieDeclarations]: Found implementation of procedure kmalloc [2018-11-19 18:30:20,486 INFO L138 BoogieDeclarations]: Found implementation of procedure kzalloc [2018-11-19 18:30:20,486 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-11-19 18:30:20,487 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-11-19 18:30:20,487 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2018-11-19 18:30:20,487 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_ptr [2018-11-19 18:30:20,487 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_ulong [2018-11-19 18:30:20,487 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2018-11-19 18:30:20,487 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2018-11-19 18:30:20,488 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2018-11-19 18:30:20,488 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_trap [2018-11-19 18:30:20,488 INFO L138 BoogieDeclarations]: Found implementation of procedure ihex_next_binrec [2018-11-19 18:30:20,488 INFO L138 BoogieDeclarations]: Found implementation of procedure ihex_validate_fw [2018-11-19 18:30:20,488 INFO L138 BoogieDeclarations]: Found implementation of procedure request_ihex_firmware [2018-11-19 18:30:20,488 INFO L138 BoogieDeclarations]: Found implementation of procedure input_allocate_device [2018-11-19 18:30:20,489 INFO L138 BoogieDeclarations]: Found implementation of procedure input_report_key [2018-11-19 18:30:20,489 INFO L138 BoogieDeclarations]: Found implementation of procedure input_report_abs [2018-11-19 18:30:20,489 INFO L138 BoogieDeclarations]: Found implementation of procedure input_sync [2018-11-19 18:30:20,489 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_to_input_id [2018-11-19 18:30:20,489 INFO L138 BoogieDeclarations]: Found implementation of procedure get_unaligned_le16 [2018-11-19 18:30:20,490 INFO L138 BoogieDeclarations]: Found implementation of procedure get_unaligned_le32 [2018-11-19 18:30:20,490 INFO L138 BoogieDeclarations]: Found implementation of procedure get_unaligned_be32 [2018-11-19 18:30:20,490 INFO L138 BoogieDeclarations]: Found implementation of procedure put_unaligned_le32 [2018-11-19 18:30:20,490 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_buttons_report [2018-11-19 18:30:20,490 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_setup_buttons [2018-11-19 18:30:20,490 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_destroy_buttons [2018-11-19 18:30:20,491 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_gamepad_report [2018-11-19 18:30:20,491 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_setup_gamepad [2018-11-19 18:30:20,491 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_destroy_gamepad [2018-11-19 18:30:20,491 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_report_events [2018-11-19 18:30:20,491 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_handle_response [2018-11-19 18:30:20,492 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_process_data [2018-11-19 18:30:20,492 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_byte_needs_escape [2018-11-19 18:30:20,492 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_send_cmd_chunk [2018-11-19 18:30:20,492 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_send_command [2018-11-19 18:30:20,492 INFO L138 BoogieDeclarations]: Found implementation of procedure __ims_pcu_execute_command [2018-11-19 18:30:20,492 INFO L138 BoogieDeclarations]: Found implementation of procedure __ims_pcu_execute_bl_command [2018-11-19 18:30:20,493 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_get_info [2018-11-19 18:30:20,493 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_set_info [2018-11-19 18:30:20,493 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_switch_to_bootloader [2018-11-19 18:30:20,493 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_count_fw_records [2018-11-19 18:30:20,493 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_verify_block [2018-11-19 18:30:20,493 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_flash_firmware [2018-11-19 18:30:20,494 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_handle_firmware_update [2018-11-19 18:30:20,494 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_process_async_firmware [2018-11-19 18:30:20,494 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_backlight_work [2018-11-19 18:30:20,494 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_backlight_set_brightness [2018-11-19 18:30:20,494 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_backlight_get_brightness [2018-11-19 18:30:20,494 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_setup_backlight [2018-11-19 18:30:20,495 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_destroy_backlight [2018-11-19 18:30:20,495 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_attribute_show [2018-11-19 18:30:20,495 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_attribute_store [2018-11-19 18:30:20,495 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_reset_device [2018-11-19 18:30:20,495 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_update_firmware_store [2018-11-19 18:30:20,496 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_update_firmware_status_show [2018-11-19 18:30:20,496 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_is_attr_visible [2018-11-19 18:30:20,496 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_irq [2018-11-19 18:30:20,496 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_buffers_alloc [2018-11-19 18:30:20,496 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_buffers_free [2018-11-19 18:30:20,496 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_get_cdc_union_desc [2018-11-19 18:30:20,497 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_parse_cdc_data [2018-11-19 18:30:20,497 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_start_io [2018-11-19 18:30:20,497 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_stop_io [2018-11-19 18:30:20,497 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_line_setup [2018-11-19 18:30:20,497 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_get_device_info [2018-11-19 18:30:20,497 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_identify_type [2018-11-19 18:30:20,498 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_init_application_mode [2018-11-19 18:30:20,498 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_destroy_application_mode [2018-11-19 18:30:20,498 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_init_bootloader_mode [2018-11-19 18:30:20,498 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_destroy_bootloader_mode [2018-11-19 18:30:20,498 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_probe [2018-11-19 18:30:20,498 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_disconnect [2018-11-19 18:30:20,499 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_suspend [2018-11-19 18:30:20,499 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_resume [2018-11-19 18:30:20,499 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_driver_init [2018-11-19 18:30:20,499 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_driver_exit [2018-11-19 18:30:20,499 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_ims_pcu_attribute_10 [2018-11-19 18:30:20,499 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_ims_pcu_attribute_6 [2018-11-19 18:30:20,500 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_ims_pcu_attribute_9 [2018-11-19 18:30:20,500 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_ims_pcu_attribute_11 [2018-11-19 18:30:20,500 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_ims_pcu_attribute_8 [2018-11-19 18:30:20,500 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_ims_pcu_attribute_7 [2018-11-19 18:30:20,500 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_driver_1 [2018-11-19 18:30:20,500 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-19 18:30:20,501 INFO L138 BoogieDeclarations]: Found implementation of procedure interface_to_usbdev [2018-11-19 18:30:20,501 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_get_intfdata_2 [2018-11-19 18:30:20,501 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_submit_urb_8 [2018-11-19 18:30:20,501 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_alloc_urb_9 [2018-11-19 18:30:20,501 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_fill_bulk_urb_10 [2018-11-19 18:30:20,501 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_alloc_urb_11 [2018-11-19 18:30:20,502 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_fill_int_urb_12 [2018-11-19 18:30:20,502 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_free_urb_13 [2018-11-19 18:30:20,502 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_free_urb_14 [2018-11-19 18:30:20,502 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_free_urb_15 [2018-11-19 18:30:20,502 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_submit_urb_16 [2018-11-19 18:30:20,502 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_submit_urb_17 [2018-11-19 18:30:20,503 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_set_intfdata_18 [2018-11-19 18:30:20,503 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_register_driver_24 [2018-11-19 18:30:20,503 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_deregister_25 [2018-11-19 18:30:20,503 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop___0 [2018-11-19 18:30:20,503 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_get_intfdata [2018-11-19 18:30:20,503 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_set_intfdata [2018-11-19 18:30:20,504 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_put_intf [2018-11-19 18:30:20,504 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_alloc_urb [2018-11-19 18:30:20,504 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free_urb [2018-11-19 18:30:20,504 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_fill_int_urb [2018-11-19 18:30:20,504 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_fill_bulk_urb [2018-11-19 18:30:20,504 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_urb [2018-11-19 18:30:20,505 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_interface_to_usbdev [2018-11-19 18:30:20,505 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_get_dev [2018-11-19 18:30:20,505 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_put_dev [2018-11-19 18:30:20,505 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_get_interface [2018-11-19 18:30:20,505 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_put_interface [2018-11-19 18:30:20,506 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_serial_register [2018-11-19 18:30:20,506 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_serial_deregister [2018-11-19 18:30:20,506 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_final_state [2018-11-19 18:30:20,506 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-11-19 18:30:20,506 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-11-19 18:30:20,507 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-11-19 18:30:20,507 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-19 18:30:20,507 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2018-11-19 18:30:20,507 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-11-19 18:30:20,507 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-11-19 18:30:20,507 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2018-11-19 18:30:20,508 INFO L130 BoogieDeclarations]: Found specification of procedure strlcat [2018-11-19 18:30:20,508 INFO L130 BoogieDeclarations]: Found specification of procedure strnlen [2018-11-19 18:30:20,508 INFO L130 BoogieDeclarations]: Found specification of procedure __arch_swab32 [2018-11-19 18:30:20,508 INFO L130 BoogieDeclarations]: Found specification of procedure __fswab16 [2018-11-19 18:30:20,508 INFO L130 BoogieDeclarations]: Found specification of procedure __fswab32 [2018-11-19 18:30:20,508 INFO L130 BoogieDeclarations]: Found specification of procedure __swab32p [2018-11-19 18:30:20,509 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-19 18:30:20,509 INFO L130 BoogieDeclarations]: Found specification of procedure __le32_to_cpup [2018-11-19 18:30:20,509 INFO L130 BoogieDeclarations]: Found specification of procedure __le16_to_cpup [2018-11-19 18:30:20,509 INFO L130 BoogieDeclarations]: Found specification of procedure __be32_to_cpup [2018-11-19 18:30:20,509 INFO L130 BoogieDeclarations]: Found specification of procedure usb_endpoint_dir_in [2018-11-19 18:30:20,509 INFO L130 BoogieDeclarations]: Found specification of procedure usb_endpoint_dir_out [2018-11-19 18:30:20,510 INFO L130 BoogieDeclarations]: Found specification of procedure usb_endpoint_xfer_bulk [2018-11-19 18:30:20,510 INFO L130 BoogieDeclarations]: Found specification of procedure usb_endpoint_is_bulk_in [2018-11-19 18:30:20,510 INFO L130 BoogieDeclarations]: Found specification of procedure usb_endpoint_is_bulk_out [2018-11-19 18:30:20,510 INFO L130 BoogieDeclarations]: Found specification of procedure usb_endpoint_maxp [2018-11-19 18:30:20,510 INFO L130 BoogieDeclarations]: Found specification of procedure __set_bit [2018-11-19 18:30:20,510 INFO L130 BoogieDeclarations]: Found specification of procedure __clear_bit [2018-11-19 18:30:20,510 INFO L130 BoogieDeclarations]: Found specification of procedure __dynamic_dev_dbg [2018-11-19 18:30:20,511 INFO L130 BoogieDeclarations]: Found specification of procedure kstrtoint [2018-11-19 18:30:20,511 INFO L130 BoogieDeclarations]: Found specification of procedure snprintf [2018-11-19 18:30:20,511 INFO L130 BoogieDeclarations]: Found specification of procedure scnprintf [2018-11-19 18:30:20,511 INFO L130 BoogieDeclarations]: Found specification of procedure __xadd_wrong_size [2018-11-19 18:30:20,511 INFO L130 BoogieDeclarations]: Found specification of procedure atomic_add_return [2018-11-19 18:30:20,512 INFO L130 BoogieDeclarations]: Found specification of procedure INIT_LIST_HEAD [2018-11-19 18:30:20,512 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-19 18:30:20,512 INFO L130 BoogieDeclarations]: Found specification of procedure lockdep_init_map [2018-11-19 18:30:20,512 INFO L130 BoogieDeclarations]: Found specification of procedure msecs_to_jiffies [2018-11-19 18:30:20,512 INFO L130 BoogieDeclarations]: Found specification of procedure __init_work [2018-11-19 18:30:20,512 INFO L130 BoogieDeclarations]: Found specification of procedure queue_work_on [2018-11-19 18:30:20,513 INFO L130 BoogieDeclarations]: Found specification of procedure cancel_work_sync [2018-11-19 18:30:20,513 INFO L130 BoogieDeclarations]: Found specification of procedure queue_work [2018-11-19 18:30:20,513 INFO L130 BoogieDeclarations]: Found specification of procedure schedule_work [2018-11-19 18:30:20,513 INFO L130 BoogieDeclarations]: Found specification of procedure __init_waitqueue_head [2018-11-19 18:30:20,513 INFO L130 BoogieDeclarations]: Found specification of procedure init_completion [2018-11-19 18:30:20,513 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-19 18:30:20,514 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-19 18:30:20,514 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-19 18:30:20,514 INFO L130 BoogieDeclarations]: Found specification of procedure wait_for_completion [2018-11-19 18:30:20,514 INFO L130 BoogieDeclarations]: Found specification of procedure wait_for_completion_timeout [2018-11-19 18:30:20,514 INFO L130 BoogieDeclarations]: Found specification of procedure complete [2018-11-19 18:30:20,514 INFO L130 BoogieDeclarations]: Found specification of procedure __mutex_init [2018-11-19 18:30:20,515 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_lock_nested [2018-11-19 18:30:20,515 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_lock_interruptible_nested [2018-11-19 18:30:20,515 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_unlock [2018-11-19 18:30:20,515 INFO L130 BoogieDeclarations]: Found specification of procedure sysfs_create_group [2018-11-19 18:30:20,515 INFO L130 BoogieDeclarations]: Found specification of procedure sysfs_remove_group [2018-11-19 18:30:20,515 INFO L130 BoogieDeclarations]: Found specification of procedure sysfs_notify [2018-11-19 18:30:20,516 INFO L130 BoogieDeclarations]: Found specification of procedure dev_err [2018-11-19 18:30:20,516 INFO L130 BoogieDeclarations]: Found specification of procedure dev_warn [2018-11-19 18:30:20,516 INFO L130 BoogieDeclarations]: Found specification of procedure _dev_info [2018-11-19 18:30:20,516 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_get_intfdata_2 [2018-11-19 18:30:20,516 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_set_intfdata_18 [2018-11-19 18:30:20,516 INFO L130 BoogieDeclarations]: Found specification of procedure interface_to_usbdev [2018-11-19 18:30:20,517 INFO L130 BoogieDeclarations]: Found specification of procedure usb_driver_claim_interface [2018-11-19 18:30:20,517 INFO L130 BoogieDeclarations]: Found specification of procedure usb_driver_release_interface [2018-11-19 18:30:20,517 INFO L130 BoogieDeclarations]: Found specification of procedure usb_ifnum_to_if [2018-11-19 18:30:20,517 INFO L130 BoogieDeclarations]: Found specification of procedure usb_make_path [2018-11-19 18:30:20,517 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-19 18:30:20,517 INFO L130 BoogieDeclarations]: Found specification of procedure usb_register_driver [2018-11-19 18:30:20,517 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_register_driver_24 [2018-11-19 18:30:20,518 INFO L130 BoogieDeclarations]: Found specification of procedure usb_deregister [2018-11-19 18:30:20,518 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_deregister_25 [2018-11-19 18:30:20,518 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_fill_bulk_urb_10 [2018-11-19 18:30:20,518 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_fill_int_urb_12 [2018-11-19 18:30:20,518 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_alloc_urb_9 [2018-11-19 18:30:20,518 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_alloc_urb_11 [2018-11-19 18:30:20,519 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_free_urb_13 [2018-11-19 18:30:20,519 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_free_urb_14 [2018-11-19 18:30:20,519 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_free_urb_15 [2018-11-19 18:30:20,519 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_submit_urb_8 [2018-11-19 18:30:20,519 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_submit_urb_16 [2018-11-19 18:30:20,519 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_submit_urb_17 [2018-11-19 18:30:20,520 INFO L130 BoogieDeclarations]: Found specification of procedure usb_kill_urb [2018-11-19 18:30:20,520 INFO L130 BoogieDeclarations]: Found specification of procedure usb_alloc_coherent [2018-11-19 18:30:20,520 INFO L130 BoogieDeclarations]: Found specification of procedure usb_free_coherent [2018-11-19 18:30:20,520 INFO L130 BoogieDeclarations]: Found specification of procedure usb_control_msg [2018-11-19 18:30:20,520 INFO L130 BoogieDeclarations]: Found specification of procedure usb_bulk_msg [2018-11-19 18:30:20,520 INFO L130 BoogieDeclarations]: Found specification of procedure __create_pipe [2018-11-19 18:30:20,520 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_alloc_urb [2018-11-19 18:30:20,521 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free_urb [2018-11-19 18:30:20,521 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_fill_int_urb [2018-11-19 18:30:20,521 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_fill_bulk_urb [2018-11-19 18:30:20,521 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_urb [2018-11-19 18:30:20,521 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_interface_to_usbdev [2018-11-19 18:30:20,521 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_get_intfdata [2018-11-19 18:30:20,522 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_set_intfdata [2018-11-19 18:30:20,522 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-19 18:30:20,522 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-11-19 18:30:20,522 INFO L130 BoogieDeclarations]: Found specification of procedure __kmalloc [2018-11-19 18:30:20,522 INFO L130 BoogieDeclarations]: Found specification of procedure kmalloc [2018-11-19 18:30:20,522 INFO L130 BoogieDeclarations]: Found specification of procedure kzalloc [2018-11-19 18:30:20,522 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-11-19 18:30:20,523 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-11-19 18:30:20,523 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-19 18:30:20,523 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_size_t [2018-11-19 18:30:20,523 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_ulong [2018-11-19 18:30:20,523 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-11-19 18:30:20,523 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assume [2018-11-19 18:30:20,524 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-11-19 18:30:20,524 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-11-19 18:30:20,524 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2018-11-19 18:30:20,524 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_ptr [2018-11-19 18:30:20,524 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_ulong [2018-11-19 18:30:20,524 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2018-11-19 18:30:20,524 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2018-11-19 18:30:20,525 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_trap [2018-11-19 18:30:20,525 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_ims_pcu_attribute_10 [2018-11-19 18:30:20,525 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_ims_pcu_attribute_6 [2018-11-19 18:30:20,525 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_ims_pcu_attribute_9 [2018-11-19 18:30:20,525 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_ims_pcu_attribute_11 [2018-11-19 18:30:20,525 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_ims_pcu_attribute_8 [2018-11-19 18:30:20,526 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_ims_pcu_attribute_7 [2018-11-19 18:30:20,526 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_driver_1 [2018-11-19 18:30:20,526 INFO L130 BoogieDeclarations]: Found specification of procedure request_firmware [2018-11-19 18:30:20,526 INFO L130 BoogieDeclarations]: Found specification of procedure request_firmware_nowait [2018-11-19 18:30:20,526 INFO L130 BoogieDeclarations]: Found specification of procedure release_firmware [2018-11-19 18:30:20,526 INFO L130 BoogieDeclarations]: Found specification of procedure ihex_next_binrec [2018-11-19 18:30:20,526 INFO L130 BoogieDeclarations]: Found specification of procedure ihex_validate_fw [2018-11-19 18:30:20,527 INFO L130 BoogieDeclarations]: Found specification of procedure request_ihex_firmware [2018-11-19 18:30:20,527 INFO L130 BoogieDeclarations]: Found specification of procedure input_allocate_device [2018-11-19 18:30:20,527 INFO L130 BoogieDeclarations]: Found specification of procedure input_free_device [2018-11-19 18:30:20,527 INFO L130 BoogieDeclarations]: Found specification of procedure input_register_device [2018-11-19 18:30:20,527 INFO L130 BoogieDeclarations]: Found specification of procedure input_unregister_device [2018-11-19 18:30:20,527 INFO L130 BoogieDeclarations]: Found specification of procedure input_event [2018-11-19 18:30:20,527 INFO L130 BoogieDeclarations]: Found specification of procedure input_report_key [2018-11-19 18:30:20,528 INFO L130 BoogieDeclarations]: Found specification of procedure input_report_abs [2018-11-19 18:30:20,528 INFO L130 BoogieDeclarations]: Found specification of procedure input_sync [2018-11-19 18:30:20,528 INFO L130 BoogieDeclarations]: Found specification of procedure input_set_abs_params [2018-11-19 18:30:20,528 INFO L130 BoogieDeclarations]: Found specification of procedure led_classdev_register [2018-11-19 18:30:20,528 INFO L130 BoogieDeclarations]: Found specification of procedure led_classdev_unregister [2018-11-19 18:30:20,528 INFO L130 BoogieDeclarations]: Found specification of procedure usb_to_input_id [2018-11-19 18:30:20,529 INFO L130 BoogieDeclarations]: Found specification of procedure get_unaligned_le16 [2018-11-19 18:30:20,529 INFO L130 BoogieDeclarations]: Found specification of procedure get_unaligned_le32 [2018-11-19 18:30:20,529 INFO L130 BoogieDeclarations]: Found specification of procedure get_unaligned_be32 [2018-11-19 18:30:20,529 INFO L130 BoogieDeclarations]: Found specification of procedure put_unaligned_le32 [2018-11-19 18:30:20,529 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_buttons_report [2018-11-19 18:30:20,529 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_setup_buttons [2018-11-19 18:30:20,529 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-11-19 18:30:20,530 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_destroy_buttons [2018-11-19 18:30:20,530 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_gamepad_report [2018-11-19 18:30:20,530 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_setup_gamepad [2018-11-19 18:30:20,530 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_destroy_gamepad [2018-11-19 18:30:20,530 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_report_events [2018-11-19 18:30:20,530 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_handle_response [2018-11-19 18:30:20,531 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_process_data [2018-11-19 18:30:20,531 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_byte_needs_escape [2018-11-19 18:30:20,531 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_send_cmd_chunk [2018-11-19 18:30:20,531 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_send_command [2018-11-19 18:30:20,531 INFO L130 BoogieDeclarations]: Found specification of procedure __ims_pcu_execute_command [2018-11-19 18:30:20,531 INFO L130 BoogieDeclarations]: Found specification of procedure __ims_pcu_execute_bl_command [2018-11-19 18:30:20,532 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_get_info [2018-11-19 18:30:20,532 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_set_info [2018-11-19 18:30:20,532 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_switch_to_bootloader [2018-11-19 18:30:20,532 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_count_fw_records [2018-11-19 18:30:20,532 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_verify_block [2018-11-19 18:30:20,533 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_flash_firmware [2018-11-19 18:30:20,533 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_handle_firmware_update [2018-11-19 18:30:20,533 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_process_async_firmware [2018-11-19 18:30:20,533 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_backlight_work [2018-11-19 18:30:20,533 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_backlight_set_brightness [2018-11-19 18:30:20,533 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_backlight_get_brightness [2018-11-19 18:30:20,534 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_setup_backlight [2018-11-19 18:30:20,534 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_destroy_backlight [2018-11-19 18:30:20,534 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_attribute_show [2018-11-19 18:30:20,534 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_attribute_store [2018-11-19 18:30:20,534 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-11-19 18:30:20,534 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_reset_device [2018-11-19 18:30:20,535 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_update_firmware_store [2018-11-19 18:30:20,535 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_update_firmware_status_show [2018-11-19 18:30:20,535 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_is_attr_visible [2018-11-19 18:30:20,535 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_irq [2018-11-19 18:30:20,535 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_buffers_alloc [2018-11-19 18:30:20,536 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_buffers_free [2018-11-19 18:30:20,536 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_get_cdc_union_desc [2018-11-19 18:30:20,536 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_parse_cdc_data [2018-11-19 18:30:20,536 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_start_io [2018-11-19 18:30:20,536 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_stop_io [2018-11-19 18:30:20,536 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_line_setup [2018-11-19 18:30:20,537 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_get_device_info [2018-11-19 18:30:20,537 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_identify_type [2018-11-19 18:30:20,537 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_init_application_mode [2018-11-19 18:30:20,537 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_destroy_application_mode [2018-11-19 18:30:20,537 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_init_bootloader_mode [2018-11-19 18:30:20,537 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_destroy_bootloader_mode [2018-11-19 18:30:20,537 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_probe [2018-11-19 18:30:20,538 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_disconnect [2018-11-19 18:30:20,538 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_suspend [2018-11-19 18:30:20,538 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_resume [2018-11-19 18:30:20,538 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_driver_init [2018-11-19 18:30:20,538 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_driver_exit [2018-11-19 18:30:20,538 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize [2018-11-19 18:30:20,539 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2018-11-19 18:30:20,539 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-19 18:30:20,539 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop___0 [2018-11-19 18:30:20,539 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_put_intf [2018-11-19 18:30:20,539 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-11-19 18:30:20,539 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_get_dev [2018-11-19 18:30:20,540 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_put_dev [2018-11-19 18:30:20,540 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_get_interface [2018-11-19 18:30:20,540 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_put_interface [2018-11-19 18:30:20,540 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_serial_register [2018-11-19 18:30:20,540 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_serial_deregister [2018-11-19 18:30:20,540 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-19 18:30:20,540 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-11-19 18:30:20,541 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-19 18:30:37,260 INFO L271 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-19 18:30:37,261 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 06:30:37 BoogieIcfgContainer [2018-11-19 18:30:37,261 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-19 18:30:37,262 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-19 18:30:37,262 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-19 18:30:37,265 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-19 18:30:37,265 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 19.11 06:30:17" (1/3) ... [2018-11-19 18:30:37,265 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3efcd6bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 19.11 06:30:37, skipping insertion in model container [2018-11-19 18:30:37,266 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 06:30:20" (2/3) ... [2018-11-19 18:30:37,266 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3efcd6bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 19.11 06:30:37, skipping insertion in model container [2018-11-19 18:30:37,266 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 06:30:37" (3/3) ... [2018-11-19 18:30:37,268 INFO L112 eAbstractionObserver]: Analyzing ICFG linux-3.12-rc1.tar.xz-144_2a-drivers--input--misc--ims-pcu.ko-entry_point_false-unreach-call.cil.out.c [2018-11-19 18:30:37,275 INFO L147 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-19 18:30:37,285 INFO L159 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-19 18:30:37,299 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-19 18:30:37,336 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-19 18:30:37,337 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-19 18:30:37,337 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-19 18:30:37,337 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-19 18:30:37,337 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-19 18:30:37,337 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-19 18:30:37,337 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-19 18:30:37,337 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-19 18:30:37,337 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-19 18:30:37,378 INFO L276 IsEmpty]: Start isEmpty. Operand 1334 states. [2018-11-19 18:30:37,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2018-11-19 18:30:37,399 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:30:37,400 INFO L384 BasicCegarLoop]: trace histogram [24, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:30:37,402 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:30:37,406 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:30:37,406 INFO L82 PathProgramCache]: Analyzing trace with hash -452694295, now seen corresponding path program 1 times [2018-11-19 18:30:37,408 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:30:37,408 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:30:37,473 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:30:37,474 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:30:37,474 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:30:37,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:30:38,421 INFO L256 TraceCheckUtils]: 0: Hoare triple {1337#true} call ULTIMATE.init(); {1337#true} is VALID [2018-11-19 18:30:38,422 INFO L273 TraceCheckUtils]: 1: Hoare triple {1337#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,428 INFO L273 TraceCheckUtils]: 2: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,429 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1337#true} {1337#true} #3175#return; {1337#true} is VALID [2018-11-19 18:30:38,429 INFO L256 TraceCheckUtils]: 4: Hoare triple {1337#true} call #t~ret973 := main(); {1337#true} is VALID [2018-11-19 18:30:38,429 INFO L273 TraceCheckUtils]: 5: Hoare triple {1337#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {1337#true} is VALID [2018-11-19 18:30:38,430 INFO L256 TraceCheckUtils]: 6: Hoare triple {1337#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {1337#true} is VALID [2018-11-19 18:30:38,430 INFO L273 TraceCheckUtils]: 7: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,431 INFO L273 TraceCheckUtils]: 8: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,431 INFO L273 TraceCheckUtils]: 9: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,431 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {1337#true} {1337#true} #2927#return; {1337#true} is VALID [2018-11-19 18:30:38,432 INFO L273 TraceCheckUtils]: 11: Hoare triple {1337#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {1337#true} is VALID [2018-11-19 18:30:38,432 INFO L256 TraceCheckUtils]: 12: Hoare triple {1337#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {1337#true} is VALID [2018-11-19 18:30:38,432 INFO L273 TraceCheckUtils]: 13: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,433 INFO L273 TraceCheckUtils]: 14: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,433 INFO L273 TraceCheckUtils]: 15: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,433 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {1337#true} {1337#true} #2929#return; {1337#true} is VALID [2018-11-19 18:30:38,434 INFO L273 TraceCheckUtils]: 17: Hoare triple {1337#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {1337#true} is VALID [2018-11-19 18:30:38,434 INFO L256 TraceCheckUtils]: 18: Hoare triple {1337#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {1337#true} is VALID [2018-11-19 18:30:38,434 INFO L273 TraceCheckUtils]: 19: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,435 INFO L273 TraceCheckUtils]: 20: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,435 INFO L273 TraceCheckUtils]: 21: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,435 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {1337#true} {1337#true} #2931#return; {1337#true} is VALID [2018-11-19 18:30:38,436 INFO L273 TraceCheckUtils]: 23: Hoare triple {1337#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {1337#true} is VALID [2018-11-19 18:30:38,436 INFO L256 TraceCheckUtils]: 24: Hoare triple {1337#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {1337#true} is VALID [2018-11-19 18:30:38,436 INFO L273 TraceCheckUtils]: 25: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,437 INFO L273 TraceCheckUtils]: 26: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,437 INFO L273 TraceCheckUtils]: 27: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,437 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {1337#true} {1337#true} #2933#return; {1337#true} is VALID [2018-11-19 18:30:38,437 INFO L273 TraceCheckUtils]: 29: Hoare triple {1337#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {1337#true} is VALID [2018-11-19 18:30:38,438 INFO L256 TraceCheckUtils]: 30: Hoare triple {1337#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {1337#true} is VALID [2018-11-19 18:30:38,438 INFO L273 TraceCheckUtils]: 31: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,439 INFO L273 TraceCheckUtils]: 32: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,439 INFO L273 TraceCheckUtils]: 33: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,439 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {1337#true} {1337#true} #2935#return; {1337#true} is VALID [2018-11-19 18:30:38,440 INFO L273 TraceCheckUtils]: 35: Hoare triple {1337#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {1337#true} is VALID [2018-11-19 18:30:38,440 INFO L256 TraceCheckUtils]: 36: Hoare triple {1337#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {1337#true} is VALID [2018-11-19 18:30:38,440 INFO L273 TraceCheckUtils]: 37: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,441 INFO L273 TraceCheckUtils]: 38: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,441 INFO L273 TraceCheckUtils]: 39: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,441 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {1337#true} {1337#true} #2937#return; {1337#true} is VALID [2018-11-19 18:30:38,442 INFO L273 TraceCheckUtils]: 41: Hoare triple {1337#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {1337#true} is VALID [2018-11-19 18:30:38,442 INFO L256 TraceCheckUtils]: 42: Hoare triple {1337#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {1337#true} is VALID [2018-11-19 18:30:38,442 INFO L273 TraceCheckUtils]: 43: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,442 INFO L273 TraceCheckUtils]: 44: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,443 INFO L273 TraceCheckUtils]: 45: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,443 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {1337#true} {1337#true} #2939#return; {1337#true} is VALID [2018-11-19 18:30:38,443 INFO L273 TraceCheckUtils]: 47: Hoare triple {1337#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {1337#true} is VALID [2018-11-19 18:30:38,444 INFO L256 TraceCheckUtils]: 48: Hoare triple {1337#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {1337#true} is VALID [2018-11-19 18:30:38,444 INFO L273 TraceCheckUtils]: 49: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,444 INFO L273 TraceCheckUtils]: 50: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,445 INFO L273 TraceCheckUtils]: 51: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,445 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {1337#true} {1337#true} #2941#return; {1337#true} is VALID [2018-11-19 18:30:38,445 INFO L273 TraceCheckUtils]: 53: Hoare triple {1337#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {1337#true} is VALID [2018-11-19 18:30:38,563 INFO L256 TraceCheckUtils]: 54: Hoare triple {1337#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {1337#true} is VALID [2018-11-19 18:30:38,563 INFO L273 TraceCheckUtils]: 55: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,563 INFO L273 TraceCheckUtils]: 56: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,564 INFO L273 TraceCheckUtils]: 57: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,564 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {1337#true} {1337#true} #2943#return; {1337#true} is VALID [2018-11-19 18:30:38,564 INFO L273 TraceCheckUtils]: 59: Hoare triple {1337#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {1337#true} is VALID [2018-11-19 18:30:38,565 INFO L256 TraceCheckUtils]: 60: Hoare triple {1337#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {1337#true} is VALID [2018-11-19 18:30:38,565 INFO L273 TraceCheckUtils]: 61: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,565 INFO L273 TraceCheckUtils]: 62: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,566 INFO L273 TraceCheckUtils]: 63: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,566 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {1337#true} {1337#true} #2945#return; {1337#true} is VALID [2018-11-19 18:30:38,566 INFO L273 TraceCheckUtils]: 65: Hoare triple {1337#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {1337#true} is VALID [2018-11-19 18:30:38,567 INFO L256 TraceCheckUtils]: 66: Hoare triple {1337#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {1337#true} is VALID [2018-11-19 18:30:38,567 INFO L273 TraceCheckUtils]: 67: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,567 INFO L273 TraceCheckUtils]: 68: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,567 INFO L273 TraceCheckUtils]: 69: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,568 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {1337#true} {1337#true} #2947#return; {1337#true} is VALID [2018-11-19 18:30:38,568 INFO L273 TraceCheckUtils]: 71: Hoare triple {1337#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {1337#true} is VALID [2018-11-19 18:30:38,568 INFO L256 TraceCheckUtils]: 72: Hoare triple {1337#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {1337#true} is VALID [2018-11-19 18:30:38,568 INFO L273 TraceCheckUtils]: 73: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,569 INFO L273 TraceCheckUtils]: 74: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,569 INFO L273 TraceCheckUtils]: 75: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,569 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {1337#true} {1337#true} #2949#return; {1337#true} is VALID [2018-11-19 18:30:38,570 INFO L273 TraceCheckUtils]: 77: Hoare triple {1337#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {1337#true} is VALID [2018-11-19 18:30:38,570 INFO L256 TraceCheckUtils]: 78: Hoare triple {1337#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {1337#true} is VALID [2018-11-19 18:30:38,570 INFO L273 TraceCheckUtils]: 79: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,570 INFO L273 TraceCheckUtils]: 80: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,571 INFO L273 TraceCheckUtils]: 81: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,571 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {1337#true} {1337#true} #2951#return; {1337#true} is VALID [2018-11-19 18:30:38,571 INFO L273 TraceCheckUtils]: 83: Hoare triple {1337#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {1337#true} is VALID [2018-11-19 18:30:38,572 INFO L256 TraceCheckUtils]: 84: Hoare triple {1337#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {1337#true} is VALID [2018-11-19 18:30:38,572 INFO L273 TraceCheckUtils]: 85: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,572 INFO L273 TraceCheckUtils]: 86: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,572 INFO L273 TraceCheckUtils]: 87: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,573 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {1337#true} {1337#true} #2953#return; {1337#true} is VALID [2018-11-19 18:30:38,573 INFO L273 TraceCheckUtils]: 89: Hoare triple {1337#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {1337#true} is VALID [2018-11-19 18:30:38,573 INFO L256 TraceCheckUtils]: 90: Hoare triple {1337#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {1337#true} is VALID [2018-11-19 18:30:38,573 INFO L273 TraceCheckUtils]: 91: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,574 INFO L273 TraceCheckUtils]: 92: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,574 INFO L273 TraceCheckUtils]: 93: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,574 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {1337#true} {1337#true} #2955#return; {1337#true} is VALID [2018-11-19 18:30:38,574 INFO L273 TraceCheckUtils]: 95: Hoare triple {1337#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {1337#true} is VALID [2018-11-19 18:30:38,575 INFO L256 TraceCheckUtils]: 96: Hoare triple {1337#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {1337#true} is VALID [2018-11-19 18:30:38,575 INFO L273 TraceCheckUtils]: 97: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,575 INFO L273 TraceCheckUtils]: 98: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,576 INFO L273 TraceCheckUtils]: 99: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,576 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {1337#true} {1337#true} #2957#return; {1337#true} is VALID [2018-11-19 18:30:38,576 INFO L273 TraceCheckUtils]: 101: Hoare triple {1337#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {1337#true} is VALID [2018-11-19 18:30:38,576 INFO L256 TraceCheckUtils]: 102: Hoare triple {1337#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {1337#true} is VALID [2018-11-19 18:30:38,577 INFO L273 TraceCheckUtils]: 103: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,577 INFO L273 TraceCheckUtils]: 104: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,577 INFO L273 TraceCheckUtils]: 105: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,578 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {1337#true} {1337#true} #2959#return; {1337#true} is VALID [2018-11-19 18:30:38,578 INFO L273 TraceCheckUtils]: 107: Hoare triple {1337#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {1337#true} is VALID [2018-11-19 18:30:38,578 INFO L256 TraceCheckUtils]: 108: Hoare triple {1337#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {1337#true} is VALID [2018-11-19 18:30:38,578 INFO L273 TraceCheckUtils]: 109: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,579 INFO L273 TraceCheckUtils]: 110: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,579 INFO L273 TraceCheckUtils]: 111: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,579 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {1337#true} {1337#true} #2961#return; {1337#true} is VALID [2018-11-19 18:30:38,580 INFO L273 TraceCheckUtils]: 113: Hoare triple {1337#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {1337#true} is VALID [2018-11-19 18:30:38,580 INFO L256 TraceCheckUtils]: 114: Hoare triple {1337#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {1337#true} is VALID [2018-11-19 18:30:38,580 INFO L273 TraceCheckUtils]: 115: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,580 INFO L273 TraceCheckUtils]: 116: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,581 INFO L273 TraceCheckUtils]: 117: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,581 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {1337#true} {1337#true} #2963#return; {1337#true} is VALID [2018-11-19 18:30:38,581 INFO L273 TraceCheckUtils]: 119: Hoare triple {1337#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {1337#true} is VALID [2018-11-19 18:30:38,581 INFO L256 TraceCheckUtils]: 120: Hoare triple {1337#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {1337#true} is VALID [2018-11-19 18:30:38,582 INFO L273 TraceCheckUtils]: 121: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,582 INFO L273 TraceCheckUtils]: 122: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,583 INFO L273 TraceCheckUtils]: 123: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,583 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {1337#true} {1337#true} #2965#return; {1337#true} is VALID [2018-11-19 18:30:38,583 INFO L273 TraceCheckUtils]: 125: Hoare triple {1337#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {1337#true} is VALID [2018-11-19 18:30:38,583 INFO L256 TraceCheckUtils]: 126: Hoare triple {1337#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {1337#true} is VALID [2018-11-19 18:30:38,584 INFO L273 TraceCheckUtils]: 127: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,584 INFO L273 TraceCheckUtils]: 128: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,584 INFO L273 TraceCheckUtils]: 129: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,584 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {1337#true} {1337#true} #2967#return; {1337#true} is VALID [2018-11-19 18:30:38,585 INFO L273 TraceCheckUtils]: 131: Hoare triple {1337#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {1337#true} is VALID [2018-11-19 18:30:38,585 INFO L256 TraceCheckUtils]: 132: Hoare triple {1337#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {1337#true} is VALID [2018-11-19 18:30:38,585 INFO L273 TraceCheckUtils]: 133: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,585 INFO L273 TraceCheckUtils]: 134: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,586 INFO L273 TraceCheckUtils]: 135: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,586 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {1337#true} {1337#true} #2969#return; {1337#true} is VALID [2018-11-19 18:30:38,586 INFO L273 TraceCheckUtils]: 137: Hoare triple {1337#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {1337#true} is VALID [2018-11-19 18:30:38,587 INFO L256 TraceCheckUtils]: 138: Hoare triple {1337#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {1337#true} is VALID [2018-11-19 18:30:38,587 INFO L273 TraceCheckUtils]: 139: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,587 INFO L273 TraceCheckUtils]: 140: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,587 INFO L273 TraceCheckUtils]: 141: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,588 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {1337#true} {1337#true} #2971#return; {1337#true} is VALID [2018-11-19 18:30:38,588 INFO L273 TraceCheckUtils]: 143: Hoare triple {1337#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {1337#true} is VALID [2018-11-19 18:30:38,588 INFO L256 TraceCheckUtils]: 144: Hoare triple {1337#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {1337#true} is VALID [2018-11-19 18:30:38,588 INFO L273 TraceCheckUtils]: 145: Hoare triple {1337#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {1337#true} is VALID [2018-11-19 18:30:38,589 INFO L273 TraceCheckUtils]: 146: Hoare triple {1337#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {1337#true} is VALID [2018-11-19 18:30:38,589 INFO L273 TraceCheckUtils]: 147: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,589 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {1337#true} {1337#true} #2973#return; {1337#true} is VALID [2018-11-19 18:30:38,589 INFO L273 TraceCheckUtils]: 149: Hoare triple {1337#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {1337#true} is VALID [2018-11-19 18:30:38,590 INFO L256 TraceCheckUtils]: 150: Hoare triple {1337#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {1337#true} is VALID [2018-11-19 18:30:38,590 INFO L273 TraceCheckUtils]: 151: Hoare triple {1337#true} #t~loopctr974 := 0; {1337#true} is VALID [2018-11-19 18:30:38,590 INFO L273 TraceCheckUtils]: 152: Hoare triple {1337#true} assume !(#t~loopctr974 < #amount); {1337#true} is VALID [2018-11-19 18:30:38,590 INFO L273 TraceCheckUtils]: 153: Hoare triple {1337#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1337#true} is VALID [2018-11-19 18:30:38,591 INFO L268 TraceCheckUtils]: 154: Hoare quadruple {1337#true} {1337#true} #2975#return; {1337#true} is VALID [2018-11-19 18:30:38,600 INFO L273 TraceCheckUtils]: 155: Hoare triple {1337#true} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {1339#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 18:30:38,601 INFO L273 TraceCheckUtils]: 156: Hoare triple {1339#(= 1 ~ldv_state_variable_0~0)} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {1339#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 18:30:38,602 INFO L273 TraceCheckUtils]: 157: Hoare triple {1339#(= 1 ~ldv_state_variable_0~0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {1339#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 18:30:38,602 INFO L273 TraceCheckUtils]: 158: Hoare triple {1339#(= 1 ~ldv_state_variable_0~0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {1339#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 18:30:38,603 INFO L273 TraceCheckUtils]: 159: Hoare triple {1339#(= 1 ~ldv_state_variable_0~0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {1339#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 18:30:38,604 INFO L273 TraceCheckUtils]: 160: Hoare triple {1339#(= 1 ~ldv_state_variable_0~0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {1339#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 18:30:38,605 INFO L273 TraceCheckUtils]: 161: Hoare triple {1339#(= 1 ~ldv_state_variable_0~0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {1339#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 18:30:38,606 INFO L273 TraceCheckUtils]: 162: Hoare triple {1339#(= 1 ~ldv_state_variable_0~0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {1339#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 18:30:38,606 INFO L273 TraceCheckUtils]: 163: Hoare triple {1339#(= 1 ~ldv_state_variable_0~0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {1339#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 18:30:38,607 INFO L273 TraceCheckUtils]: 164: Hoare triple {1339#(= 1 ~ldv_state_variable_0~0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {1339#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 18:30:38,607 INFO L273 TraceCheckUtils]: 165: Hoare triple {1339#(= 1 ~ldv_state_variable_0~0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {1339#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 18:30:38,608 INFO L273 TraceCheckUtils]: 166: Hoare triple {1339#(= 1 ~ldv_state_variable_0~0)} assume #t~switch909; {1339#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 18:30:38,608 INFO L273 TraceCheckUtils]: 167: Hoare triple {1339#(= 1 ~ldv_state_variable_0~0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {1339#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 18:30:38,609 INFO L273 TraceCheckUtils]: 168: Hoare triple {1339#(= 1 ~ldv_state_variable_0~0)} assume #t~switch947; {1339#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 18:30:38,610 INFO L273 TraceCheckUtils]: 169: Hoare triple {1339#(= 1 ~ldv_state_variable_0~0)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {1338#false} is VALID [2018-11-19 18:30:38,610 INFO L256 TraceCheckUtils]: 170: Hoare triple {1338#false} call ims_pcu_driver_exit(); {1337#true} is VALID [2018-11-19 18:30:38,610 INFO L256 TraceCheckUtils]: 171: Hoare triple {1337#true} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {1337#true} is VALID [2018-11-19 18:30:38,611 INFO L273 TraceCheckUtils]: 172: Hoare triple {1337#true} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {1337#true} is VALID [2018-11-19 18:30:38,611 INFO L273 TraceCheckUtils]: 173: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,611 INFO L268 TraceCheckUtils]: 174: Hoare quadruple {1337#true} {1337#true} #2597#return; {1337#true} is VALID [2018-11-19 18:30:38,611 INFO L273 TraceCheckUtils]: 175: Hoare triple {1337#true} assume true; {1337#true} is VALID [2018-11-19 18:30:38,612 INFO L268 TraceCheckUtils]: 176: Hoare quadruple {1337#true} {1338#false} #3033#return; {1338#false} is VALID [2018-11-19 18:30:38,612 INFO L273 TraceCheckUtils]: 177: Hoare triple {1338#false} ~ldv_state_variable_0~0 := 2; {1338#false} is VALID [2018-11-19 18:30:38,612 INFO L256 TraceCheckUtils]: 178: Hoare triple {1338#false} call ldv_check_final_state(); {1338#false} is VALID [2018-11-19 18:30:38,612 INFO L273 TraceCheckUtils]: 179: Hoare triple {1338#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {1338#false} is VALID [2018-11-19 18:30:38,613 INFO L256 TraceCheckUtils]: 180: Hoare triple {1338#false} call ldv_error(); {1338#false} is VALID [2018-11-19 18:30:38,613 INFO L273 TraceCheckUtils]: 181: Hoare triple {1338#false} assume !false; {1338#false} is VALID [2018-11-19 18:30:38,641 INFO L134 CoverageAnalysis]: Checked inductivity of 1104 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-11-19 18:30:38,643 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:30:38,644 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 18:30:38,649 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 182 [2018-11-19 18:30:38,653 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:30:38,657 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 18:30:39,005 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 113 edges. 113 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:30:39,005 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 18:30:39,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 18:30:39,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:30:39,017 INFO L87 Difference]: Start difference. First operand 1334 states. Second operand 3 states. [2018-11-19 18:30:51,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:30:51,633 INFO L93 Difference]: Finished difference Result 3640 states and 4887 transitions. [2018-11-19 18:30:51,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 18:30:51,634 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 182 [2018-11-19 18:30:51,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:30:51,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:30:51,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4887 transitions. [2018-11-19 18:30:51,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:30:51,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4887 transitions. [2018-11-19 18:30:51,891 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 4887 transitions. [2018-11-19 18:30:56,462 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 4887 edges. 4887 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:30:56,930 INFO L225 Difference]: With dead ends: 3640 [2018-11-19 18:30:56,930 INFO L226 Difference]: Without dead ends: 2370 [2018-11-19 18:30:56,940 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:30:56,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2370 states. [2018-11-19 18:30:57,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2370 to 2370. [2018-11-19 18:30:57,575 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:30:57,575 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2370 states. Second operand 2370 states. [2018-11-19 18:30:57,576 INFO L74 IsIncluded]: Start isIncluded. First operand 2370 states. Second operand 2370 states. [2018-11-19 18:30:57,576 INFO L87 Difference]: Start difference. First operand 2370 states. Second operand 2370 states. [2018-11-19 18:30:57,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:30:57,913 INFO L93 Difference]: Finished difference Result 2370 states and 3167 transitions. [2018-11-19 18:30:57,914 INFO L276 IsEmpty]: Start isEmpty. Operand 2370 states and 3167 transitions. [2018-11-19 18:30:57,932 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:30:57,933 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:30:57,933 INFO L74 IsIncluded]: Start isIncluded. First operand 2370 states. Second operand 2370 states. [2018-11-19 18:30:57,933 INFO L87 Difference]: Start difference. First operand 2370 states. Second operand 2370 states. [2018-11-19 18:30:58,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:30:58,307 INFO L93 Difference]: Finished difference Result 2370 states and 3167 transitions. [2018-11-19 18:30:58,307 INFO L276 IsEmpty]: Start isEmpty. Operand 2370 states and 3167 transitions. [2018-11-19 18:30:58,320 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:30:58,320 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:30:58,320 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:30:58,320 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:30:58,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2370 states. [2018-11-19 18:30:58,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2370 states to 2370 states and 3167 transitions. [2018-11-19 18:30:58,744 INFO L78 Accepts]: Start accepts. Automaton has 2370 states and 3167 transitions. Word has length 182 [2018-11-19 18:30:58,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:30:58,745 INFO L480 AbstractCegarLoop]: Abstraction has 2370 states and 3167 transitions. [2018-11-19 18:30:58,745 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 18:30:58,745 INFO L276 IsEmpty]: Start isEmpty. Operand 2370 states and 3167 transitions. [2018-11-19 18:30:58,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2018-11-19 18:30:58,750 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:30:58,751 INFO L384 BasicCegarLoop]: trace histogram [25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:30:58,751 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:30:58,751 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:30:58,751 INFO L82 PathProgramCache]: Analyzing trace with hash -847954165, now seen corresponding path program 1 times [2018-11-19 18:30:58,751 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:30:58,752 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:30:58,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:30:58,756 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:30:58,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:30:58,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:30:59,323 INFO L256 TraceCheckUtils]: 0: Hoare triple {14212#true} call ULTIMATE.init(); {14212#true} is VALID [2018-11-19 18:30:59,386 INFO L273 TraceCheckUtils]: 1: Hoare triple {14212#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,388 INFO L273 TraceCheckUtils]: 2: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,388 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {14212#true} #3175#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,389 INFO L256 TraceCheckUtils]: 4: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret973 := main(); {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,390 INFO L273 TraceCheckUtils]: 5: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,390 INFO L256 TraceCheckUtils]: 6: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {14212#true} is VALID [2018-11-19 18:30:59,390 INFO L273 TraceCheckUtils]: 7: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,391 INFO L273 TraceCheckUtils]: 8: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,391 INFO L273 TraceCheckUtils]: 9: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,395 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2927#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,396 INFO L273 TraceCheckUtils]: 11: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,396 INFO L256 TraceCheckUtils]: 12: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {14212#true} is VALID [2018-11-19 18:30:59,396 INFO L273 TraceCheckUtils]: 13: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,396 INFO L273 TraceCheckUtils]: 14: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,397 INFO L273 TraceCheckUtils]: 15: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,397 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2929#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,398 INFO L273 TraceCheckUtils]: 17: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,398 INFO L256 TraceCheckUtils]: 18: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {14212#true} is VALID [2018-11-19 18:30:59,398 INFO L273 TraceCheckUtils]: 19: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,398 INFO L273 TraceCheckUtils]: 20: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,399 INFO L273 TraceCheckUtils]: 21: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,401 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2931#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,402 INFO L273 TraceCheckUtils]: 23: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,402 INFO L256 TraceCheckUtils]: 24: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {14212#true} is VALID [2018-11-19 18:30:59,403 INFO L273 TraceCheckUtils]: 25: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,403 INFO L273 TraceCheckUtils]: 26: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,403 INFO L273 TraceCheckUtils]: 27: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,404 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2933#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,404 INFO L273 TraceCheckUtils]: 29: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,404 INFO L256 TraceCheckUtils]: 30: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {14212#true} is VALID [2018-11-19 18:30:59,405 INFO L273 TraceCheckUtils]: 31: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,405 INFO L273 TraceCheckUtils]: 32: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,405 INFO L273 TraceCheckUtils]: 33: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,406 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2935#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,407 INFO L273 TraceCheckUtils]: 35: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,407 INFO L256 TraceCheckUtils]: 36: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {14212#true} is VALID [2018-11-19 18:30:59,407 INFO L273 TraceCheckUtils]: 37: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,407 INFO L273 TraceCheckUtils]: 38: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,407 INFO L273 TraceCheckUtils]: 39: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,408 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2937#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,408 INFO L273 TraceCheckUtils]: 41: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,409 INFO L256 TraceCheckUtils]: 42: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {14212#true} is VALID [2018-11-19 18:30:59,409 INFO L273 TraceCheckUtils]: 43: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,409 INFO L273 TraceCheckUtils]: 44: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,409 INFO L273 TraceCheckUtils]: 45: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,410 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2939#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,411 INFO L273 TraceCheckUtils]: 47: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,411 INFO L256 TraceCheckUtils]: 48: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {14212#true} is VALID [2018-11-19 18:30:59,412 INFO L273 TraceCheckUtils]: 49: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,412 INFO L273 TraceCheckUtils]: 50: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,412 INFO L273 TraceCheckUtils]: 51: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,413 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2941#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,414 INFO L273 TraceCheckUtils]: 53: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,414 INFO L256 TraceCheckUtils]: 54: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {14212#true} is VALID [2018-11-19 18:30:59,414 INFO L273 TraceCheckUtils]: 55: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,414 INFO L273 TraceCheckUtils]: 56: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,415 INFO L273 TraceCheckUtils]: 57: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,416 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2943#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,417 INFO L273 TraceCheckUtils]: 59: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,417 INFO L256 TraceCheckUtils]: 60: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {14212#true} is VALID [2018-11-19 18:30:59,418 INFO L273 TraceCheckUtils]: 61: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,418 INFO L273 TraceCheckUtils]: 62: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,418 INFO L273 TraceCheckUtils]: 63: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,418 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2945#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,419 INFO L273 TraceCheckUtils]: 65: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,419 INFO L256 TraceCheckUtils]: 66: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {14212#true} is VALID [2018-11-19 18:30:59,419 INFO L273 TraceCheckUtils]: 67: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,420 INFO L273 TraceCheckUtils]: 68: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,420 INFO L273 TraceCheckUtils]: 69: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,421 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2947#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,423 INFO L273 TraceCheckUtils]: 71: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,423 INFO L256 TraceCheckUtils]: 72: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {14212#true} is VALID [2018-11-19 18:30:59,424 INFO L273 TraceCheckUtils]: 73: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,424 INFO L273 TraceCheckUtils]: 74: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,424 INFO L273 TraceCheckUtils]: 75: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,427 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2949#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,428 INFO L273 TraceCheckUtils]: 77: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,429 INFO L256 TraceCheckUtils]: 78: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {14212#true} is VALID [2018-11-19 18:30:59,429 INFO L273 TraceCheckUtils]: 79: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,429 INFO L273 TraceCheckUtils]: 80: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,429 INFO L273 TraceCheckUtils]: 81: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,431 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2951#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,435 INFO L273 TraceCheckUtils]: 83: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,435 INFO L256 TraceCheckUtils]: 84: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {14212#true} is VALID [2018-11-19 18:30:59,435 INFO L273 TraceCheckUtils]: 85: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,435 INFO L273 TraceCheckUtils]: 86: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,436 INFO L273 TraceCheckUtils]: 87: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,437 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2953#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,439 INFO L273 TraceCheckUtils]: 89: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,439 INFO L256 TraceCheckUtils]: 90: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {14212#true} is VALID [2018-11-19 18:30:59,439 INFO L273 TraceCheckUtils]: 91: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,439 INFO L273 TraceCheckUtils]: 92: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,440 INFO L273 TraceCheckUtils]: 93: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,440 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2955#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,447 INFO L273 TraceCheckUtils]: 95: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,447 INFO L256 TraceCheckUtils]: 96: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {14212#true} is VALID [2018-11-19 18:30:59,447 INFO L273 TraceCheckUtils]: 97: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,447 INFO L273 TraceCheckUtils]: 98: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,448 INFO L273 TraceCheckUtils]: 99: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,449 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2957#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,449 INFO L273 TraceCheckUtils]: 101: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,449 INFO L256 TraceCheckUtils]: 102: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {14212#true} is VALID [2018-11-19 18:30:59,450 INFO L273 TraceCheckUtils]: 103: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,450 INFO L273 TraceCheckUtils]: 104: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,450 INFO L273 TraceCheckUtils]: 105: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,451 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2959#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,451 INFO L273 TraceCheckUtils]: 107: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,452 INFO L256 TraceCheckUtils]: 108: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {14212#true} is VALID [2018-11-19 18:30:59,452 INFO L273 TraceCheckUtils]: 109: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,452 INFO L273 TraceCheckUtils]: 110: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,452 INFO L273 TraceCheckUtils]: 111: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,453 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2961#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,454 INFO L273 TraceCheckUtils]: 113: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,454 INFO L256 TraceCheckUtils]: 114: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {14212#true} is VALID [2018-11-19 18:30:59,455 INFO L273 TraceCheckUtils]: 115: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,455 INFO L273 TraceCheckUtils]: 116: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,455 INFO L273 TraceCheckUtils]: 117: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,456 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2963#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,457 INFO L273 TraceCheckUtils]: 119: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,457 INFO L256 TraceCheckUtils]: 120: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {14212#true} is VALID [2018-11-19 18:30:59,458 INFO L273 TraceCheckUtils]: 121: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,458 INFO L273 TraceCheckUtils]: 122: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,458 INFO L273 TraceCheckUtils]: 123: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,459 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2965#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,460 INFO L273 TraceCheckUtils]: 125: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,460 INFO L256 TraceCheckUtils]: 126: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {14212#true} is VALID [2018-11-19 18:30:59,460 INFO L273 TraceCheckUtils]: 127: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,460 INFO L273 TraceCheckUtils]: 128: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,461 INFO L273 TraceCheckUtils]: 129: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,461 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2967#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,462 INFO L273 TraceCheckUtils]: 131: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,462 INFO L256 TraceCheckUtils]: 132: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {14212#true} is VALID [2018-11-19 18:30:59,463 INFO L273 TraceCheckUtils]: 133: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,463 INFO L273 TraceCheckUtils]: 134: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,463 INFO L273 TraceCheckUtils]: 135: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,464 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2969#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,465 INFO L273 TraceCheckUtils]: 137: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,465 INFO L256 TraceCheckUtils]: 138: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {14212#true} is VALID [2018-11-19 18:30:59,465 INFO L273 TraceCheckUtils]: 139: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,465 INFO L273 TraceCheckUtils]: 140: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,466 INFO L273 TraceCheckUtils]: 141: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,466 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2971#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,467 INFO L273 TraceCheckUtils]: 143: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,467 INFO L256 TraceCheckUtils]: 144: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {14212#true} is VALID [2018-11-19 18:30:59,468 INFO L273 TraceCheckUtils]: 145: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,468 INFO L273 TraceCheckUtils]: 146: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,468 INFO L273 TraceCheckUtils]: 147: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,469 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2973#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,470 INFO L273 TraceCheckUtils]: 149: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,470 INFO L256 TraceCheckUtils]: 150: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {14212#true} is VALID [2018-11-19 18:30:59,470 INFO L273 TraceCheckUtils]: 151: Hoare triple {14212#true} #t~loopctr974 := 0; {14212#true} is VALID [2018-11-19 18:30:59,470 INFO L273 TraceCheckUtils]: 152: Hoare triple {14212#true} assume !(#t~loopctr974 < #amount); {14212#true} is VALID [2018-11-19 18:30:59,471 INFO L273 TraceCheckUtils]: 153: Hoare triple {14212#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14212#true} is VALID [2018-11-19 18:30:59,478 INFO L268 TraceCheckUtils]: 154: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2975#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,479 INFO L273 TraceCheckUtils]: 155: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,479 INFO L273 TraceCheckUtils]: 156: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,480 INFO L273 TraceCheckUtils]: 157: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,481 INFO L273 TraceCheckUtils]: 158: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,481 INFO L273 TraceCheckUtils]: 159: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,482 INFO L273 TraceCheckUtils]: 160: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,483 INFO L273 TraceCheckUtils]: 161: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,483 INFO L273 TraceCheckUtils]: 162: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,484 INFO L273 TraceCheckUtils]: 163: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,485 INFO L273 TraceCheckUtils]: 164: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,486 INFO L273 TraceCheckUtils]: 165: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,486 INFO L273 TraceCheckUtils]: 166: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume #t~switch909; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,487 INFO L273 TraceCheckUtils]: 167: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,488 INFO L273 TraceCheckUtils]: 168: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,488 INFO L273 TraceCheckUtils]: 169: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume #t~switch947; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,489 INFO L273 TraceCheckUtils]: 170: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 1 == ~ldv_state_variable_0~0; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,489 INFO L256 TraceCheckUtils]: 171: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret948 := ims_pcu_driver_init(); {14212#true} is VALID [2018-11-19 18:30:59,489 INFO L273 TraceCheckUtils]: 172: Hoare triple {14212#true} havoc ~tmp~46; {14212#true} is VALID [2018-11-19 18:30:59,489 INFO L256 TraceCheckUtils]: 173: Hoare triple {14212#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {14212#true} is VALID [2018-11-19 18:30:59,489 INFO L273 TraceCheckUtils]: 174: Hoare triple {14212#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {14212#true} is VALID [2018-11-19 18:30:59,490 INFO L256 TraceCheckUtils]: 175: Hoare triple {14212#true} call ldv_usb_driver_1(); {14212#true} is VALID [2018-11-19 18:30:59,490 INFO L273 TraceCheckUtils]: 176: Hoare triple {14212#true} havoc ~tmp~53.base, ~tmp~53.offset; {14212#true} is VALID [2018-11-19 18:30:59,490 INFO L256 TraceCheckUtils]: 177: Hoare triple {14212#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {14212#true} is VALID [2018-11-19 18:30:59,490 INFO L273 TraceCheckUtils]: 178: Hoare triple {14212#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {14212#true} is VALID [2018-11-19 18:30:59,491 INFO L273 TraceCheckUtils]: 179: Hoare triple {14212#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {14212#true} is VALID [2018-11-19 18:30:59,491 INFO L273 TraceCheckUtils]: 180: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,491 INFO L268 TraceCheckUtils]: 181: Hoare quadruple {14212#true} {14212#true} #2613#return; {14212#true} is VALID [2018-11-19 18:30:59,491 INFO L273 TraceCheckUtils]: 182: Hoare triple {14212#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {14212#true} is VALID [2018-11-19 18:30:59,491 INFO L273 TraceCheckUtils]: 183: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,492 INFO L268 TraceCheckUtils]: 184: Hoare quadruple {14212#true} {14212#true} #2537#return; {14212#true} is VALID [2018-11-19 18:30:59,492 INFO L273 TraceCheckUtils]: 185: Hoare triple {14212#true} #res := ~ldv_func_res~0; {14212#true} is VALID [2018-11-19 18:30:59,492 INFO L273 TraceCheckUtils]: 186: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,492 INFO L268 TraceCheckUtils]: 187: Hoare quadruple {14212#true} {14212#true} #2777#return; {14212#true} is VALID [2018-11-19 18:30:59,493 INFO L273 TraceCheckUtils]: 188: Hoare triple {14212#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {14212#true} is VALID [2018-11-19 18:30:59,493 INFO L273 TraceCheckUtils]: 189: Hoare triple {14212#true} assume true; {14212#true} is VALID [2018-11-19 18:30:59,498 INFO L268 TraceCheckUtils]: 190: Hoare quadruple {14212#true} {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3035#return; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,499 INFO L273 TraceCheckUtils]: 191: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,500 INFO L273 TraceCheckUtils]: 192: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !(0 == ~ldv_retval_4~0); {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,501 INFO L273 TraceCheckUtils]: 193: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,501 INFO L256 TraceCheckUtils]: 194: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call ldv_check_final_state(); {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:30:59,502 INFO L273 TraceCheckUtils]: 195: Hoare triple {14214#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {14213#false} is VALID [2018-11-19 18:30:59,502 INFO L256 TraceCheckUtils]: 196: Hoare triple {14213#false} call ldv_error(); {14213#false} is VALID [2018-11-19 18:30:59,502 INFO L273 TraceCheckUtils]: 197: Hoare triple {14213#false} assume !false; {14213#false} is VALID [2018-11-19 18:30:59,557 INFO L134 CoverageAnalysis]: Checked inductivity of 1200 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-11-19 18:30:59,557 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:30:59,557 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 18:30:59,559 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 198 [2018-11-19 18:30:59,560 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:30:59,560 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 18:30:59,867 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:30:59,867 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 18:30:59,867 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 18:30:59,867 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:30:59,868 INFO L87 Difference]: Start difference. First operand 2370 states and 3167 transitions. Second operand 3 states. [2018-11-19 18:31:12,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:31:12,295 INFO L93 Difference]: Finished difference Result 6997 states and 9492 transitions. [2018-11-19 18:31:12,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 18:31:12,295 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 198 [2018-11-19 18:31:12,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:31:12,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:31:12,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4954 transitions. [2018-11-19 18:31:12,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:31:12,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4954 transitions. [2018-11-19 18:31:12,597 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 4954 transitions. [2018-11-19 18:31:17,530 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 4954 edges. 4954 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:31:18,638 INFO L225 Difference]: With dead ends: 6997 [2018-11-19 18:31:18,638 INFO L226 Difference]: Without dead ends: 4683 [2018-11-19 18:31:18,645 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:31:18,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4683 states. [2018-11-19 18:31:21,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4683 to 4673. [2018-11-19 18:31:21,533 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:31:21,533 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4683 states. Second operand 4673 states. [2018-11-19 18:31:21,533 INFO L74 IsIncluded]: Start isIncluded. First operand 4683 states. Second operand 4673 states. [2018-11-19 18:31:21,533 INFO L87 Difference]: Start difference. First operand 4683 states. Second operand 4673 states. [2018-11-19 18:31:22,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:31:22,372 INFO L93 Difference]: Finished difference Result 4683 states and 6313 transitions. [2018-11-19 18:31:22,372 INFO L276 IsEmpty]: Start isEmpty. Operand 4683 states and 6313 transitions. [2018-11-19 18:31:22,391 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:31:22,392 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:31:22,392 INFO L74 IsIncluded]: Start isIncluded. First operand 4673 states. Second operand 4683 states. [2018-11-19 18:31:22,392 INFO L87 Difference]: Start difference. First operand 4673 states. Second operand 4683 states. [2018-11-19 18:31:23,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:31:23,283 INFO L93 Difference]: Finished difference Result 4683 states and 6313 transitions. [2018-11-19 18:31:23,283 INFO L276 IsEmpty]: Start isEmpty. Operand 4683 states and 6313 transitions. [2018-11-19 18:31:23,301 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:31:23,302 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:31:23,302 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:31:23,302 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:31:23,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4673 states. [2018-11-19 18:31:24,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4673 states to 4673 states and 6301 transitions. [2018-11-19 18:31:24,329 INFO L78 Accepts]: Start accepts. Automaton has 4673 states and 6301 transitions. Word has length 198 [2018-11-19 18:31:24,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:31:24,329 INFO L480 AbstractCegarLoop]: Abstraction has 4673 states and 6301 transitions. [2018-11-19 18:31:24,329 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 18:31:24,329 INFO L276 IsEmpty]: Start isEmpty. Operand 4673 states and 6301 transitions. [2018-11-19 18:31:24,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2018-11-19 18:31:24,333 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:31:24,333 INFO L384 BasicCegarLoop]: trace histogram [25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:31:24,333 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:31:24,334 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:31:24,334 INFO L82 PathProgramCache]: Analyzing trace with hash -517390195, now seen corresponding path program 1 times [2018-11-19 18:31:24,334 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:31:24,334 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:31:24,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:31:24,337 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:31:24,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:31:24,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:31:24,741 INFO L256 TraceCheckUtils]: 0: Hoare triple {39284#true} call ULTIMATE.init(); {39284#true} is VALID [2018-11-19 18:31:24,742 INFO L273 TraceCheckUtils]: 1: Hoare triple {39284#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,742 INFO L273 TraceCheckUtils]: 2: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,742 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {39284#true} {39284#true} #3175#return; {39284#true} is VALID [2018-11-19 18:31:24,743 INFO L256 TraceCheckUtils]: 4: Hoare triple {39284#true} call #t~ret973 := main(); {39284#true} is VALID [2018-11-19 18:31:24,743 INFO L273 TraceCheckUtils]: 5: Hoare triple {39284#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {39284#true} is VALID [2018-11-19 18:31:24,743 INFO L256 TraceCheckUtils]: 6: Hoare triple {39284#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {39284#true} is VALID [2018-11-19 18:31:24,743 INFO L273 TraceCheckUtils]: 7: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,744 INFO L273 TraceCheckUtils]: 8: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,744 INFO L273 TraceCheckUtils]: 9: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,744 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {39284#true} {39284#true} #2927#return; {39284#true} is VALID [2018-11-19 18:31:24,744 INFO L273 TraceCheckUtils]: 11: Hoare triple {39284#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {39284#true} is VALID [2018-11-19 18:31:24,744 INFO L256 TraceCheckUtils]: 12: Hoare triple {39284#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {39284#true} is VALID [2018-11-19 18:31:24,745 INFO L273 TraceCheckUtils]: 13: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,745 INFO L273 TraceCheckUtils]: 14: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,745 INFO L273 TraceCheckUtils]: 15: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,745 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {39284#true} {39284#true} #2929#return; {39284#true} is VALID [2018-11-19 18:31:24,745 INFO L273 TraceCheckUtils]: 17: Hoare triple {39284#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {39284#true} is VALID [2018-11-19 18:31:24,745 INFO L256 TraceCheckUtils]: 18: Hoare triple {39284#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {39284#true} is VALID [2018-11-19 18:31:24,746 INFO L273 TraceCheckUtils]: 19: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,746 INFO L273 TraceCheckUtils]: 20: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,746 INFO L273 TraceCheckUtils]: 21: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,746 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {39284#true} {39284#true} #2931#return; {39284#true} is VALID [2018-11-19 18:31:24,746 INFO L273 TraceCheckUtils]: 23: Hoare triple {39284#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {39284#true} is VALID [2018-11-19 18:31:24,747 INFO L256 TraceCheckUtils]: 24: Hoare triple {39284#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {39284#true} is VALID [2018-11-19 18:31:24,747 INFO L273 TraceCheckUtils]: 25: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,747 INFO L273 TraceCheckUtils]: 26: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,747 INFO L273 TraceCheckUtils]: 27: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,747 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {39284#true} {39284#true} #2933#return; {39284#true} is VALID [2018-11-19 18:31:24,747 INFO L273 TraceCheckUtils]: 29: Hoare triple {39284#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {39284#true} is VALID [2018-11-19 18:31:24,748 INFO L256 TraceCheckUtils]: 30: Hoare triple {39284#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {39284#true} is VALID [2018-11-19 18:31:24,748 INFO L273 TraceCheckUtils]: 31: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,748 INFO L273 TraceCheckUtils]: 32: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,748 INFO L273 TraceCheckUtils]: 33: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,748 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {39284#true} {39284#true} #2935#return; {39284#true} is VALID [2018-11-19 18:31:24,749 INFO L273 TraceCheckUtils]: 35: Hoare triple {39284#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {39284#true} is VALID [2018-11-19 18:31:24,749 INFO L256 TraceCheckUtils]: 36: Hoare triple {39284#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {39284#true} is VALID [2018-11-19 18:31:24,749 INFO L273 TraceCheckUtils]: 37: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,749 INFO L273 TraceCheckUtils]: 38: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,749 INFO L273 TraceCheckUtils]: 39: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,750 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {39284#true} {39284#true} #2937#return; {39284#true} is VALID [2018-11-19 18:31:24,750 INFO L273 TraceCheckUtils]: 41: Hoare triple {39284#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {39284#true} is VALID [2018-11-19 18:31:24,750 INFO L256 TraceCheckUtils]: 42: Hoare triple {39284#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {39284#true} is VALID [2018-11-19 18:31:24,750 INFO L273 TraceCheckUtils]: 43: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,750 INFO L273 TraceCheckUtils]: 44: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,751 INFO L273 TraceCheckUtils]: 45: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,751 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {39284#true} {39284#true} #2939#return; {39284#true} is VALID [2018-11-19 18:31:24,751 INFO L273 TraceCheckUtils]: 47: Hoare triple {39284#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {39284#true} is VALID [2018-11-19 18:31:24,751 INFO L256 TraceCheckUtils]: 48: Hoare triple {39284#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {39284#true} is VALID [2018-11-19 18:31:24,751 INFO L273 TraceCheckUtils]: 49: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,752 INFO L273 TraceCheckUtils]: 50: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,752 INFO L273 TraceCheckUtils]: 51: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,752 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {39284#true} {39284#true} #2941#return; {39284#true} is VALID [2018-11-19 18:31:24,752 INFO L273 TraceCheckUtils]: 53: Hoare triple {39284#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {39284#true} is VALID [2018-11-19 18:31:24,752 INFO L256 TraceCheckUtils]: 54: Hoare triple {39284#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {39284#true} is VALID [2018-11-19 18:31:24,753 INFO L273 TraceCheckUtils]: 55: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,753 INFO L273 TraceCheckUtils]: 56: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,753 INFO L273 TraceCheckUtils]: 57: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,753 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {39284#true} {39284#true} #2943#return; {39284#true} is VALID [2018-11-19 18:31:24,753 INFO L273 TraceCheckUtils]: 59: Hoare triple {39284#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {39284#true} is VALID [2018-11-19 18:31:24,753 INFO L256 TraceCheckUtils]: 60: Hoare triple {39284#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {39284#true} is VALID [2018-11-19 18:31:24,754 INFO L273 TraceCheckUtils]: 61: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,754 INFO L273 TraceCheckUtils]: 62: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,754 INFO L273 TraceCheckUtils]: 63: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,754 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {39284#true} {39284#true} #2945#return; {39284#true} is VALID [2018-11-19 18:31:24,754 INFO L273 TraceCheckUtils]: 65: Hoare triple {39284#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {39284#true} is VALID [2018-11-19 18:31:24,755 INFO L256 TraceCheckUtils]: 66: Hoare triple {39284#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {39284#true} is VALID [2018-11-19 18:31:24,755 INFO L273 TraceCheckUtils]: 67: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,755 INFO L273 TraceCheckUtils]: 68: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,755 INFO L273 TraceCheckUtils]: 69: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,755 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {39284#true} {39284#true} #2947#return; {39284#true} is VALID [2018-11-19 18:31:24,755 INFO L273 TraceCheckUtils]: 71: Hoare triple {39284#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {39284#true} is VALID [2018-11-19 18:31:24,756 INFO L256 TraceCheckUtils]: 72: Hoare triple {39284#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {39284#true} is VALID [2018-11-19 18:31:24,756 INFO L273 TraceCheckUtils]: 73: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,756 INFO L273 TraceCheckUtils]: 74: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,756 INFO L273 TraceCheckUtils]: 75: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,756 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {39284#true} {39284#true} #2949#return; {39284#true} is VALID [2018-11-19 18:31:24,757 INFO L273 TraceCheckUtils]: 77: Hoare triple {39284#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {39284#true} is VALID [2018-11-19 18:31:24,757 INFO L256 TraceCheckUtils]: 78: Hoare triple {39284#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {39284#true} is VALID [2018-11-19 18:31:24,757 INFO L273 TraceCheckUtils]: 79: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,757 INFO L273 TraceCheckUtils]: 80: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,757 INFO L273 TraceCheckUtils]: 81: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,757 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {39284#true} {39284#true} #2951#return; {39284#true} is VALID [2018-11-19 18:31:24,758 INFO L273 TraceCheckUtils]: 83: Hoare triple {39284#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {39284#true} is VALID [2018-11-19 18:31:24,758 INFO L256 TraceCheckUtils]: 84: Hoare triple {39284#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {39284#true} is VALID [2018-11-19 18:31:24,758 INFO L273 TraceCheckUtils]: 85: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,758 INFO L273 TraceCheckUtils]: 86: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,758 INFO L273 TraceCheckUtils]: 87: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,758 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {39284#true} {39284#true} #2953#return; {39284#true} is VALID [2018-11-19 18:31:24,759 INFO L273 TraceCheckUtils]: 89: Hoare triple {39284#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {39284#true} is VALID [2018-11-19 18:31:24,759 INFO L256 TraceCheckUtils]: 90: Hoare triple {39284#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {39284#true} is VALID [2018-11-19 18:31:24,759 INFO L273 TraceCheckUtils]: 91: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,759 INFO L273 TraceCheckUtils]: 92: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,759 INFO L273 TraceCheckUtils]: 93: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,760 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {39284#true} {39284#true} #2955#return; {39284#true} is VALID [2018-11-19 18:31:24,760 INFO L273 TraceCheckUtils]: 95: Hoare triple {39284#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {39284#true} is VALID [2018-11-19 18:31:24,760 INFO L256 TraceCheckUtils]: 96: Hoare triple {39284#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {39284#true} is VALID [2018-11-19 18:31:24,760 INFO L273 TraceCheckUtils]: 97: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,760 INFO L273 TraceCheckUtils]: 98: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,760 INFO L273 TraceCheckUtils]: 99: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,761 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {39284#true} {39284#true} #2957#return; {39284#true} is VALID [2018-11-19 18:31:24,761 INFO L273 TraceCheckUtils]: 101: Hoare triple {39284#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {39284#true} is VALID [2018-11-19 18:31:24,761 INFO L256 TraceCheckUtils]: 102: Hoare triple {39284#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {39284#true} is VALID [2018-11-19 18:31:24,761 INFO L273 TraceCheckUtils]: 103: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,761 INFO L273 TraceCheckUtils]: 104: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,761 INFO L273 TraceCheckUtils]: 105: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,762 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {39284#true} {39284#true} #2959#return; {39284#true} is VALID [2018-11-19 18:31:24,762 INFO L273 TraceCheckUtils]: 107: Hoare triple {39284#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {39284#true} is VALID [2018-11-19 18:31:24,762 INFO L256 TraceCheckUtils]: 108: Hoare triple {39284#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {39284#true} is VALID [2018-11-19 18:31:24,762 INFO L273 TraceCheckUtils]: 109: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,762 INFO L273 TraceCheckUtils]: 110: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,762 INFO L273 TraceCheckUtils]: 111: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,763 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {39284#true} {39284#true} #2961#return; {39284#true} is VALID [2018-11-19 18:31:24,763 INFO L273 TraceCheckUtils]: 113: Hoare triple {39284#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {39284#true} is VALID [2018-11-19 18:31:24,763 INFO L256 TraceCheckUtils]: 114: Hoare triple {39284#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {39284#true} is VALID [2018-11-19 18:31:24,763 INFO L273 TraceCheckUtils]: 115: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,763 INFO L273 TraceCheckUtils]: 116: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,764 INFO L273 TraceCheckUtils]: 117: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,764 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {39284#true} {39284#true} #2963#return; {39284#true} is VALID [2018-11-19 18:31:24,764 INFO L273 TraceCheckUtils]: 119: Hoare triple {39284#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {39284#true} is VALID [2018-11-19 18:31:24,764 INFO L256 TraceCheckUtils]: 120: Hoare triple {39284#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {39284#true} is VALID [2018-11-19 18:31:24,764 INFO L273 TraceCheckUtils]: 121: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,764 INFO L273 TraceCheckUtils]: 122: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,765 INFO L273 TraceCheckUtils]: 123: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,765 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {39284#true} {39284#true} #2965#return; {39284#true} is VALID [2018-11-19 18:31:24,765 INFO L273 TraceCheckUtils]: 125: Hoare triple {39284#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {39284#true} is VALID [2018-11-19 18:31:24,765 INFO L256 TraceCheckUtils]: 126: Hoare triple {39284#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {39284#true} is VALID [2018-11-19 18:31:24,765 INFO L273 TraceCheckUtils]: 127: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,766 INFO L273 TraceCheckUtils]: 128: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,766 INFO L273 TraceCheckUtils]: 129: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,766 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {39284#true} {39284#true} #2967#return; {39284#true} is VALID [2018-11-19 18:31:24,766 INFO L273 TraceCheckUtils]: 131: Hoare triple {39284#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {39284#true} is VALID [2018-11-19 18:31:24,766 INFO L256 TraceCheckUtils]: 132: Hoare triple {39284#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {39284#true} is VALID [2018-11-19 18:31:24,766 INFO L273 TraceCheckUtils]: 133: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,767 INFO L273 TraceCheckUtils]: 134: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,767 INFO L273 TraceCheckUtils]: 135: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,767 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {39284#true} {39284#true} #2969#return; {39284#true} is VALID [2018-11-19 18:31:24,767 INFO L273 TraceCheckUtils]: 137: Hoare triple {39284#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {39284#true} is VALID [2018-11-19 18:31:24,767 INFO L256 TraceCheckUtils]: 138: Hoare triple {39284#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {39284#true} is VALID [2018-11-19 18:31:24,767 INFO L273 TraceCheckUtils]: 139: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,768 INFO L273 TraceCheckUtils]: 140: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,768 INFO L273 TraceCheckUtils]: 141: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,768 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {39284#true} {39284#true} #2971#return; {39284#true} is VALID [2018-11-19 18:31:24,768 INFO L273 TraceCheckUtils]: 143: Hoare triple {39284#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {39284#true} is VALID [2018-11-19 18:31:24,768 INFO L256 TraceCheckUtils]: 144: Hoare triple {39284#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {39284#true} is VALID [2018-11-19 18:31:24,769 INFO L273 TraceCheckUtils]: 145: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,769 INFO L273 TraceCheckUtils]: 146: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,769 INFO L273 TraceCheckUtils]: 147: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,769 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {39284#true} {39284#true} #2973#return; {39284#true} is VALID [2018-11-19 18:31:24,769 INFO L273 TraceCheckUtils]: 149: Hoare triple {39284#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {39284#true} is VALID [2018-11-19 18:31:24,769 INFO L256 TraceCheckUtils]: 150: Hoare triple {39284#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {39284#true} is VALID [2018-11-19 18:31:24,770 INFO L273 TraceCheckUtils]: 151: Hoare triple {39284#true} #t~loopctr974 := 0; {39286#(= |#Ultimate.C_memset_#t~loopctr974| 0)} is VALID [2018-11-19 18:31:24,771 INFO L273 TraceCheckUtils]: 152: Hoare triple {39286#(= |#Ultimate.C_memset_#t~loopctr974| 0)} assume !(#t~loopctr974 < #amount); {39287#(not (= |#Ultimate.C_memset_#amount| 4))} is VALID [2018-11-19 18:31:24,771 INFO L273 TraceCheckUtils]: 153: Hoare triple {39287#(not (= |#Ultimate.C_memset_#amount| 4))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {39287#(not (= |#Ultimate.C_memset_#amount| 4))} is VALID [2018-11-19 18:31:24,772 INFO L268 TraceCheckUtils]: 154: Hoare quadruple {39287#(not (= |#Ultimate.C_memset_#amount| 4))} {39284#true} #2975#return; {39285#false} is VALID [2018-11-19 18:31:24,772 INFO L273 TraceCheckUtils]: 155: Hoare triple {39285#false} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {39285#false} is VALID [2018-11-19 18:31:24,773 INFO L273 TraceCheckUtils]: 156: Hoare triple {39285#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {39285#false} is VALID [2018-11-19 18:31:24,773 INFO L273 TraceCheckUtils]: 157: Hoare triple {39285#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {39285#false} is VALID [2018-11-19 18:31:24,773 INFO L273 TraceCheckUtils]: 158: Hoare triple {39285#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {39285#false} is VALID [2018-11-19 18:31:24,773 INFO L273 TraceCheckUtils]: 159: Hoare triple {39285#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {39285#false} is VALID [2018-11-19 18:31:24,773 INFO L273 TraceCheckUtils]: 160: Hoare triple {39285#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {39285#false} is VALID [2018-11-19 18:31:24,773 INFO L273 TraceCheckUtils]: 161: Hoare triple {39285#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {39285#false} is VALID [2018-11-19 18:31:24,774 INFO L273 TraceCheckUtils]: 162: Hoare triple {39285#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {39285#false} is VALID [2018-11-19 18:31:24,774 INFO L273 TraceCheckUtils]: 163: Hoare triple {39285#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {39285#false} is VALID [2018-11-19 18:31:24,774 INFO L273 TraceCheckUtils]: 164: Hoare triple {39285#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {39285#false} is VALID [2018-11-19 18:31:24,774 INFO L273 TraceCheckUtils]: 165: Hoare triple {39285#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {39285#false} is VALID [2018-11-19 18:31:24,774 INFO L273 TraceCheckUtils]: 166: Hoare triple {39285#false} assume #t~switch909; {39285#false} is VALID [2018-11-19 18:31:24,774 INFO L273 TraceCheckUtils]: 167: Hoare triple {39285#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {39285#false} is VALID [2018-11-19 18:31:24,775 INFO L273 TraceCheckUtils]: 168: Hoare triple {39285#false} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {39285#false} is VALID [2018-11-19 18:31:24,775 INFO L273 TraceCheckUtils]: 169: Hoare triple {39285#false} assume #t~switch947; {39285#false} is VALID [2018-11-19 18:31:24,775 INFO L273 TraceCheckUtils]: 170: Hoare triple {39285#false} assume 1 == ~ldv_state_variable_0~0; {39285#false} is VALID [2018-11-19 18:31:24,775 INFO L256 TraceCheckUtils]: 171: Hoare triple {39285#false} call #t~ret948 := ims_pcu_driver_init(); {39284#true} is VALID [2018-11-19 18:31:24,775 INFO L273 TraceCheckUtils]: 172: Hoare triple {39284#true} havoc ~tmp~46; {39284#true} is VALID [2018-11-19 18:31:24,775 INFO L256 TraceCheckUtils]: 173: Hoare triple {39284#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {39284#true} is VALID [2018-11-19 18:31:24,776 INFO L273 TraceCheckUtils]: 174: Hoare triple {39284#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {39284#true} is VALID [2018-11-19 18:31:24,776 INFO L256 TraceCheckUtils]: 175: Hoare triple {39284#true} call ldv_usb_driver_1(); {39284#true} is VALID [2018-11-19 18:31:24,776 INFO L273 TraceCheckUtils]: 176: Hoare triple {39284#true} havoc ~tmp~53.base, ~tmp~53.offset; {39284#true} is VALID [2018-11-19 18:31:24,776 INFO L256 TraceCheckUtils]: 177: Hoare triple {39284#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {39284#true} is VALID [2018-11-19 18:31:24,776 INFO L273 TraceCheckUtils]: 178: Hoare triple {39284#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {39284#true} is VALID [2018-11-19 18:31:24,776 INFO L273 TraceCheckUtils]: 179: Hoare triple {39284#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {39284#true} is VALID [2018-11-19 18:31:24,777 INFO L273 TraceCheckUtils]: 180: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,777 INFO L268 TraceCheckUtils]: 181: Hoare quadruple {39284#true} {39284#true} #2613#return; {39284#true} is VALID [2018-11-19 18:31:24,777 INFO L273 TraceCheckUtils]: 182: Hoare triple {39284#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {39284#true} is VALID [2018-11-19 18:31:24,777 INFO L273 TraceCheckUtils]: 183: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,777 INFO L268 TraceCheckUtils]: 184: Hoare quadruple {39284#true} {39284#true} #2537#return; {39284#true} is VALID [2018-11-19 18:31:24,777 INFO L273 TraceCheckUtils]: 185: Hoare triple {39284#true} #res := ~ldv_func_res~0; {39284#true} is VALID [2018-11-19 18:31:24,778 INFO L273 TraceCheckUtils]: 186: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,778 INFO L268 TraceCheckUtils]: 187: Hoare quadruple {39284#true} {39284#true} #2777#return; {39284#true} is VALID [2018-11-19 18:31:24,778 INFO L273 TraceCheckUtils]: 188: Hoare triple {39284#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {39284#true} is VALID [2018-11-19 18:31:24,778 INFO L273 TraceCheckUtils]: 189: Hoare triple {39284#true} assume true; {39284#true} is VALID [2018-11-19 18:31:24,778 INFO L268 TraceCheckUtils]: 190: Hoare quadruple {39284#true} {39285#false} #3035#return; {39285#false} is VALID [2018-11-19 18:31:24,778 INFO L273 TraceCheckUtils]: 191: Hoare triple {39285#false} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {39285#false} is VALID [2018-11-19 18:31:24,779 INFO L273 TraceCheckUtils]: 192: Hoare triple {39285#false} assume !(0 == ~ldv_retval_4~0); {39285#false} is VALID [2018-11-19 18:31:24,779 INFO L273 TraceCheckUtils]: 193: Hoare triple {39285#false} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {39285#false} is VALID [2018-11-19 18:31:24,779 INFO L256 TraceCheckUtils]: 194: Hoare triple {39285#false} call ldv_check_final_state(); {39285#false} is VALID [2018-11-19 18:31:24,779 INFO L273 TraceCheckUtils]: 195: Hoare triple {39285#false} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {39285#false} is VALID [2018-11-19 18:31:24,779 INFO L273 TraceCheckUtils]: 196: Hoare triple {39285#false} assume !(0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616); {39285#false} is VALID [2018-11-19 18:31:24,780 INFO L256 TraceCheckUtils]: 197: Hoare triple {39285#false} call ldv_error(); {39285#false} is VALID [2018-11-19 18:31:24,780 INFO L273 TraceCheckUtils]: 198: Hoare triple {39285#false} assume !false; {39285#false} is VALID [2018-11-19 18:31:24,798 INFO L134 CoverageAnalysis]: Checked inductivity of 1200 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-11-19 18:31:24,798 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:31:24,798 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-19 18:31:24,799 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 199 [2018-11-19 18:31:24,800 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:31:24,800 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-19 18:31:25,064 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 127 edges. 127 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:31:25,064 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-19 18:31:25,064 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-19 18:31:25,065 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-19 18:31:25,065 INFO L87 Difference]: Start difference. First operand 4673 states and 6301 transitions. Second operand 4 states. [2018-11-19 18:31:43,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:31:43,918 INFO L93 Difference]: Finished difference Result 9323 states and 12567 transitions. [2018-11-19 18:31:43,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-19 18:31:43,918 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 199 [2018-11-19 18:31:43,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:31:43,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-19 18:31:43,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 3292 transitions. [2018-11-19 18:31:43,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-19 18:31:44,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 3292 transitions. [2018-11-19 18:31:44,038 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 3292 transitions. [2018-11-19 18:31:47,131 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3292 edges. 3292 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:31:48,321 INFO L225 Difference]: With dead ends: 9323 [2018-11-19 18:31:48,321 INFO L226 Difference]: Without dead ends: 4705 [2018-11-19 18:31:48,333 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-19 18:31:48,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4705 states. [2018-11-19 18:31:52,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4705 to 4705. [2018-11-19 18:31:52,027 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:31:52,027 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4705 states. Second operand 4705 states. [2018-11-19 18:31:52,027 INFO L74 IsIncluded]: Start isIncluded. First operand 4705 states. Second operand 4705 states. [2018-11-19 18:31:52,027 INFO L87 Difference]: Start difference. First operand 4705 states. Second operand 4705 states. [2018-11-19 18:31:52,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:31:52,899 INFO L93 Difference]: Finished difference Result 4705 states and 6345 transitions. [2018-11-19 18:31:52,899 INFO L276 IsEmpty]: Start isEmpty. Operand 4705 states and 6345 transitions. [2018-11-19 18:31:52,910 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:31:52,910 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:31:52,911 INFO L74 IsIncluded]: Start isIncluded. First operand 4705 states. Second operand 4705 states. [2018-11-19 18:31:52,911 INFO L87 Difference]: Start difference. First operand 4705 states. Second operand 4705 states. [2018-11-19 18:31:53,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:31:53,634 INFO L93 Difference]: Finished difference Result 4705 states and 6345 transitions. [2018-11-19 18:31:53,634 INFO L276 IsEmpty]: Start isEmpty. Operand 4705 states and 6345 transitions. [2018-11-19 18:31:53,643 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:31:53,643 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:31:53,644 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:31:53,644 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:31:53,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4705 states. [2018-11-19 18:31:54,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4705 states to 4705 states and 6345 transitions. [2018-11-19 18:31:54,635 INFO L78 Accepts]: Start accepts. Automaton has 4705 states and 6345 transitions. Word has length 199 [2018-11-19 18:31:54,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:31:54,636 INFO L480 AbstractCegarLoop]: Abstraction has 4705 states and 6345 transitions. [2018-11-19 18:31:54,636 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-19 18:31:54,636 INFO L276 IsEmpty]: Start isEmpty. Operand 4705 states and 6345 transitions. [2018-11-19 18:31:54,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2018-11-19 18:31:54,640 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:31:54,640 INFO L384 BasicCegarLoop]: trace histogram [25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:31:54,640 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:31:54,641 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:31:54,641 INFO L82 PathProgramCache]: Analyzing trace with hash 1140547844, now seen corresponding path program 1 times [2018-11-19 18:31:54,641 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:31:54,641 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:31:54,644 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:31:54,644 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:31:54,644 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:31:54,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:31:55,046 INFO L256 TraceCheckUtils]: 0: Hoare triple {67578#true} call ULTIMATE.init(); {67578#true} is VALID [2018-11-19 18:31:55,047 INFO L273 TraceCheckUtils]: 1: Hoare triple {67578#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,047 INFO L273 TraceCheckUtils]: 2: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,048 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {67578#true} {67578#true} #3175#return; {67578#true} is VALID [2018-11-19 18:31:55,048 INFO L256 TraceCheckUtils]: 4: Hoare triple {67578#true} call #t~ret973 := main(); {67578#true} is VALID [2018-11-19 18:31:55,048 INFO L273 TraceCheckUtils]: 5: Hoare triple {67578#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {67578#true} is VALID [2018-11-19 18:31:55,048 INFO L256 TraceCheckUtils]: 6: Hoare triple {67578#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:55,049 INFO L273 TraceCheckUtils]: 7: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,049 INFO L273 TraceCheckUtils]: 8: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,049 INFO L273 TraceCheckUtils]: 9: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,049 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {67578#true} {67578#true} #2927#return; {67578#true} is VALID [2018-11-19 18:31:55,049 INFO L273 TraceCheckUtils]: 11: Hoare triple {67578#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {67578#true} is VALID [2018-11-19 18:31:55,049 INFO L256 TraceCheckUtils]: 12: Hoare triple {67578#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:55,050 INFO L273 TraceCheckUtils]: 13: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,050 INFO L273 TraceCheckUtils]: 14: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,050 INFO L273 TraceCheckUtils]: 15: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,050 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {67578#true} {67578#true} #2929#return; {67578#true} is VALID [2018-11-19 18:31:55,050 INFO L273 TraceCheckUtils]: 17: Hoare triple {67578#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {67578#true} is VALID [2018-11-19 18:31:55,050 INFO L256 TraceCheckUtils]: 18: Hoare triple {67578#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:55,051 INFO L273 TraceCheckUtils]: 19: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,051 INFO L273 TraceCheckUtils]: 20: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,051 INFO L273 TraceCheckUtils]: 21: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,051 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {67578#true} {67578#true} #2931#return; {67578#true} is VALID [2018-11-19 18:31:55,051 INFO L273 TraceCheckUtils]: 23: Hoare triple {67578#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {67578#true} is VALID [2018-11-19 18:31:55,051 INFO L256 TraceCheckUtils]: 24: Hoare triple {67578#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:55,052 INFO L273 TraceCheckUtils]: 25: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,052 INFO L273 TraceCheckUtils]: 26: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,052 INFO L273 TraceCheckUtils]: 27: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,052 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {67578#true} {67578#true} #2933#return; {67578#true} is VALID [2018-11-19 18:31:55,052 INFO L273 TraceCheckUtils]: 29: Hoare triple {67578#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {67578#true} is VALID [2018-11-19 18:31:55,052 INFO L256 TraceCheckUtils]: 30: Hoare triple {67578#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {67578#true} is VALID [2018-11-19 18:31:55,052 INFO L273 TraceCheckUtils]: 31: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,053 INFO L273 TraceCheckUtils]: 32: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,053 INFO L273 TraceCheckUtils]: 33: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,053 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {67578#true} {67578#true} #2935#return; {67578#true} is VALID [2018-11-19 18:31:55,053 INFO L273 TraceCheckUtils]: 35: Hoare triple {67578#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {67578#true} is VALID [2018-11-19 18:31:55,053 INFO L256 TraceCheckUtils]: 36: Hoare triple {67578#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:55,054 INFO L273 TraceCheckUtils]: 37: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,054 INFO L273 TraceCheckUtils]: 38: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,054 INFO L273 TraceCheckUtils]: 39: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,054 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {67578#true} {67578#true} #2937#return; {67578#true} is VALID [2018-11-19 18:31:55,054 INFO L273 TraceCheckUtils]: 41: Hoare triple {67578#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {67578#true} is VALID [2018-11-19 18:31:55,055 INFO L256 TraceCheckUtils]: 42: Hoare triple {67578#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {67578#true} is VALID [2018-11-19 18:31:55,055 INFO L273 TraceCheckUtils]: 43: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,055 INFO L273 TraceCheckUtils]: 44: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,055 INFO L273 TraceCheckUtils]: 45: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,055 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {67578#true} {67578#true} #2939#return; {67578#true} is VALID [2018-11-19 18:31:55,055 INFO L273 TraceCheckUtils]: 47: Hoare triple {67578#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {67578#true} is VALID [2018-11-19 18:31:55,056 INFO L256 TraceCheckUtils]: 48: Hoare triple {67578#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:55,056 INFO L273 TraceCheckUtils]: 49: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,056 INFO L273 TraceCheckUtils]: 50: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,056 INFO L273 TraceCheckUtils]: 51: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,056 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {67578#true} {67578#true} #2941#return; {67578#true} is VALID [2018-11-19 18:31:55,057 INFO L273 TraceCheckUtils]: 53: Hoare triple {67578#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {67578#true} is VALID [2018-11-19 18:31:55,057 INFO L256 TraceCheckUtils]: 54: Hoare triple {67578#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:55,057 INFO L273 TraceCheckUtils]: 55: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,057 INFO L273 TraceCheckUtils]: 56: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,057 INFO L273 TraceCheckUtils]: 57: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,058 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {67578#true} {67578#true} #2943#return; {67578#true} is VALID [2018-11-19 18:31:55,058 INFO L273 TraceCheckUtils]: 59: Hoare triple {67578#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {67578#true} is VALID [2018-11-19 18:31:55,058 INFO L256 TraceCheckUtils]: 60: Hoare triple {67578#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:55,058 INFO L273 TraceCheckUtils]: 61: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,058 INFO L273 TraceCheckUtils]: 62: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,059 INFO L273 TraceCheckUtils]: 63: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,059 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {67578#true} {67578#true} #2945#return; {67578#true} is VALID [2018-11-19 18:31:55,059 INFO L273 TraceCheckUtils]: 65: Hoare triple {67578#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {67578#true} is VALID [2018-11-19 18:31:55,059 INFO L256 TraceCheckUtils]: 66: Hoare triple {67578#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:55,059 INFO L273 TraceCheckUtils]: 67: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,059 INFO L273 TraceCheckUtils]: 68: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,060 INFO L273 TraceCheckUtils]: 69: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,060 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {67578#true} {67578#true} #2947#return; {67578#true} is VALID [2018-11-19 18:31:55,060 INFO L273 TraceCheckUtils]: 71: Hoare triple {67578#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {67578#true} is VALID [2018-11-19 18:31:55,060 INFO L256 TraceCheckUtils]: 72: Hoare triple {67578#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {67578#true} is VALID [2018-11-19 18:31:55,060 INFO L273 TraceCheckUtils]: 73: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,061 INFO L273 TraceCheckUtils]: 74: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,061 INFO L273 TraceCheckUtils]: 75: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,061 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {67578#true} {67578#true} #2949#return; {67578#true} is VALID [2018-11-19 18:31:55,061 INFO L273 TraceCheckUtils]: 77: Hoare triple {67578#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {67578#true} is VALID [2018-11-19 18:31:55,061 INFO L256 TraceCheckUtils]: 78: Hoare triple {67578#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {67578#true} is VALID [2018-11-19 18:31:55,062 INFO L273 TraceCheckUtils]: 79: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,062 INFO L273 TraceCheckUtils]: 80: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,062 INFO L273 TraceCheckUtils]: 81: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,062 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {67578#true} {67578#true} #2951#return; {67578#true} is VALID [2018-11-19 18:31:55,062 INFO L273 TraceCheckUtils]: 83: Hoare triple {67578#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {67578#true} is VALID [2018-11-19 18:31:55,062 INFO L256 TraceCheckUtils]: 84: Hoare triple {67578#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:55,063 INFO L273 TraceCheckUtils]: 85: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,063 INFO L273 TraceCheckUtils]: 86: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,063 INFO L273 TraceCheckUtils]: 87: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,063 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {67578#true} {67578#true} #2953#return; {67578#true} is VALID [2018-11-19 18:31:55,063 INFO L273 TraceCheckUtils]: 89: Hoare triple {67578#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {67578#true} is VALID [2018-11-19 18:31:55,064 INFO L256 TraceCheckUtils]: 90: Hoare triple {67578#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:55,064 INFO L273 TraceCheckUtils]: 91: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,064 INFO L273 TraceCheckUtils]: 92: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,064 INFO L273 TraceCheckUtils]: 93: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,064 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {67578#true} {67578#true} #2955#return; {67578#true} is VALID [2018-11-19 18:31:55,065 INFO L273 TraceCheckUtils]: 95: Hoare triple {67578#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {67578#true} is VALID [2018-11-19 18:31:55,065 INFO L256 TraceCheckUtils]: 96: Hoare triple {67578#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {67578#true} is VALID [2018-11-19 18:31:55,065 INFO L273 TraceCheckUtils]: 97: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,065 INFO L273 TraceCheckUtils]: 98: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,065 INFO L273 TraceCheckUtils]: 99: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,066 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {67578#true} {67578#true} #2957#return; {67578#true} is VALID [2018-11-19 18:31:55,066 INFO L273 TraceCheckUtils]: 101: Hoare triple {67578#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {67578#true} is VALID [2018-11-19 18:31:55,066 INFO L256 TraceCheckUtils]: 102: Hoare triple {67578#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {67578#true} is VALID [2018-11-19 18:31:55,066 INFO L273 TraceCheckUtils]: 103: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,066 INFO L273 TraceCheckUtils]: 104: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,067 INFO L273 TraceCheckUtils]: 105: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,067 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {67578#true} {67578#true} #2959#return; {67578#true} is VALID [2018-11-19 18:31:55,067 INFO L273 TraceCheckUtils]: 107: Hoare triple {67578#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {67578#true} is VALID [2018-11-19 18:31:55,067 INFO L256 TraceCheckUtils]: 108: Hoare triple {67578#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {67578#true} is VALID [2018-11-19 18:31:55,067 INFO L273 TraceCheckUtils]: 109: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,067 INFO L273 TraceCheckUtils]: 110: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,068 INFO L273 TraceCheckUtils]: 111: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,068 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {67578#true} {67578#true} #2961#return; {67578#true} is VALID [2018-11-19 18:31:55,068 INFO L273 TraceCheckUtils]: 113: Hoare triple {67578#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {67578#true} is VALID [2018-11-19 18:31:55,068 INFO L256 TraceCheckUtils]: 114: Hoare triple {67578#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:55,068 INFO L273 TraceCheckUtils]: 115: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,069 INFO L273 TraceCheckUtils]: 116: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,069 INFO L273 TraceCheckUtils]: 117: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,069 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {67578#true} {67578#true} #2963#return; {67578#true} is VALID [2018-11-19 18:31:55,069 INFO L273 TraceCheckUtils]: 119: Hoare triple {67578#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {67578#true} is VALID [2018-11-19 18:31:55,069 INFO L256 TraceCheckUtils]: 120: Hoare triple {67578#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:55,070 INFO L273 TraceCheckUtils]: 121: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,070 INFO L273 TraceCheckUtils]: 122: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,070 INFO L273 TraceCheckUtils]: 123: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,070 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {67578#true} {67578#true} #2965#return; {67578#true} is VALID [2018-11-19 18:31:55,070 INFO L273 TraceCheckUtils]: 125: Hoare triple {67578#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {67578#true} is VALID [2018-11-19 18:31:55,070 INFO L256 TraceCheckUtils]: 126: Hoare triple {67578#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:55,071 INFO L273 TraceCheckUtils]: 127: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,071 INFO L273 TraceCheckUtils]: 128: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,071 INFO L273 TraceCheckUtils]: 129: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,071 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {67578#true} {67578#true} #2967#return; {67578#true} is VALID [2018-11-19 18:31:55,071 INFO L273 TraceCheckUtils]: 131: Hoare triple {67578#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {67578#true} is VALID [2018-11-19 18:31:55,071 INFO L256 TraceCheckUtils]: 132: Hoare triple {67578#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:55,072 INFO L273 TraceCheckUtils]: 133: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,072 INFO L273 TraceCheckUtils]: 134: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,072 INFO L273 TraceCheckUtils]: 135: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,072 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {67578#true} {67578#true} #2969#return; {67578#true} is VALID [2018-11-19 18:31:55,072 INFO L273 TraceCheckUtils]: 137: Hoare triple {67578#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {67578#true} is VALID [2018-11-19 18:31:55,073 INFO L256 TraceCheckUtils]: 138: Hoare triple {67578#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {67578#true} is VALID [2018-11-19 18:31:55,073 INFO L273 TraceCheckUtils]: 139: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,073 INFO L273 TraceCheckUtils]: 140: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,073 INFO L273 TraceCheckUtils]: 141: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,073 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {67578#true} {67578#true} #2971#return; {67578#true} is VALID [2018-11-19 18:31:55,073 INFO L273 TraceCheckUtils]: 143: Hoare triple {67578#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {67578#true} is VALID [2018-11-19 18:31:55,074 INFO L256 TraceCheckUtils]: 144: Hoare triple {67578#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {67578#true} is VALID [2018-11-19 18:31:55,074 INFO L273 TraceCheckUtils]: 145: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,074 INFO L273 TraceCheckUtils]: 146: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,074 INFO L273 TraceCheckUtils]: 147: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,074 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {67578#true} {67578#true} #2973#return; {67578#true} is VALID [2018-11-19 18:31:55,075 INFO L273 TraceCheckUtils]: 149: Hoare triple {67578#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {67578#true} is VALID [2018-11-19 18:31:55,075 INFO L256 TraceCheckUtils]: 150: Hoare triple {67578#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {67578#true} is VALID [2018-11-19 18:31:55,088 INFO L273 TraceCheckUtils]: 151: Hoare triple {67578#true} #t~loopctr974 := 0; {67580#(= |#Ultimate.C_memset_#t~loopctr974| 0)} is VALID [2018-11-19 18:31:55,089 INFO L273 TraceCheckUtils]: 152: Hoare triple {67580#(= |#Ultimate.C_memset_#t~loopctr974| 0)} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {67581#(or (not (= |#Ultimate.C_memset_#amount| 4)) (<= |#Ultimate.C_memset_#t~loopctr974| 1))} is VALID [2018-11-19 18:31:55,093 INFO L273 TraceCheckUtils]: 153: Hoare triple {67581#(or (not (= |#Ultimate.C_memset_#amount| 4)) (<= |#Ultimate.C_memset_#t~loopctr974| 1))} assume !(#t~loopctr974 < #amount); {67582#(not (= |#Ultimate.C_memset_#amount| 4))} is VALID [2018-11-19 18:31:55,094 INFO L273 TraceCheckUtils]: 154: Hoare triple {67582#(not (= |#Ultimate.C_memset_#amount| 4))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {67582#(not (= |#Ultimate.C_memset_#amount| 4))} is VALID [2018-11-19 18:31:55,095 INFO L268 TraceCheckUtils]: 155: Hoare quadruple {67582#(not (= |#Ultimate.C_memset_#amount| 4))} {67578#true} #2975#return; {67579#false} is VALID [2018-11-19 18:31:55,095 INFO L273 TraceCheckUtils]: 156: Hoare triple {67579#false} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {67579#false} is VALID [2018-11-19 18:31:55,095 INFO L273 TraceCheckUtils]: 157: Hoare triple {67579#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:55,095 INFO L273 TraceCheckUtils]: 158: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:55,095 INFO L273 TraceCheckUtils]: 159: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:55,096 INFO L273 TraceCheckUtils]: 160: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:55,096 INFO L273 TraceCheckUtils]: 161: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:55,096 INFO L273 TraceCheckUtils]: 162: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:55,096 INFO L273 TraceCheckUtils]: 163: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:55,097 INFO L273 TraceCheckUtils]: 164: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:55,097 INFO L273 TraceCheckUtils]: 165: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:55,097 INFO L273 TraceCheckUtils]: 166: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:55,097 INFO L273 TraceCheckUtils]: 167: Hoare triple {67579#false} assume #t~switch909; {67579#false} is VALID [2018-11-19 18:31:55,097 INFO L273 TraceCheckUtils]: 168: Hoare triple {67579#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {67579#false} is VALID [2018-11-19 18:31:55,098 INFO L273 TraceCheckUtils]: 169: Hoare triple {67579#false} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {67579#false} is VALID [2018-11-19 18:31:55,098 INFO L273 TraceCheckUtils]: 170: Hoare triple {67579#false} assume #t~switch947; {67579#false} is VALID [2018-11-19 18:31:55,098 INFO L273 TraceCheckUtils]: 171: Hoare triple {67579#false} assume 1 == ~ldv_state_variable_0~0; {67579#false} is VALID [2018-11-19 18:31:55,098 INFO L256 TraceCheckUtils]: 172: Hoare triple {67579#false} call #t~ret948 := ims_pcu_driver_init(); {67578#true} is VALID [2018-11-19 18:31:55,099 INFO L273 TraceCheckUtils]: 173: Hoare triple {67578#true} havoc ~tmp~46; {67578#true} is VALID [2018-11-19 18:31:55,099 INFO L256 TraceCheckUtils]: 174: Hoare triple {67578#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {67578#true} is VALID [2018-11-19 18:31:55,099 INFO L273 TraceCheckUtils]: 175: Hoare triple {67578#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {67578#true} is VALID [2018-11-19 18:31:55,099 INFO L256 TraceCheckUtils]: 176: Hoare triple {67578#true} call ldv_usb_driver_1(); {67578#true} is VALID [2018-11-19 18:31:55,099 INFO L273 TraceCheckUtils]: 177: Hoare triple {67578#true} havoc ~tmp~53.base, ~tmp~53.offset; {67578#true} is VALID [2018-11-19 18:31:55,100 INFO L256 TraceCheckUtils]: 178: Hoare triple {67578#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {67578#true} is VALID [2018-11-19 18:31:55,100 INFO L273 TraceCheckUtils]: 179: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:55,100 INFO L273 TraceCheckUtils]: 180: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:55,100 INFO L273 TraceCheckUtils]: 181: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,100 INFO L268 TraceCheckUtils]: 182: Hoare quadruple {67578#true} {67578#true} #2613#return; {67578#true} is VALID [2018-11-19 18:31:55,101 INFO L273 TraceCheckUtils]: 183: Hoare triple {67578#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {67578#true} is VALID [2018-11-19 18:31:55,101 INFO L273 TraceCheckUtils]: 184: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,101 INFO L268 TraceCheckUtils]: 185: Hoare quadruple {67578#true} {67578#true} #2537#return; {67578#true} is VALID [2018-11-19 18:31:55,101 INFO L273 TraceCheckUtils]: 186: Hoare triple {67578#true} #res := ~ldv_func_res~0; {67578#true} is VALID [2018-11-19 18:31:55,102 INFO L273 TraceCheckUtils]: 187: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,102 INFO L268 TraceCheckUtils]: 188: Hoare quadruple {67578#true} {67578#true} #2777#return; {67578#true} is VALID [2018-11-19 18:31:55,102 INFO L273 TraceCheckUtils]: 189: Hoare triple {67578#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {67578#true} is VALID [2018-11-19 18:31:55,102 INFO L273 TraceCheckUtils]: 190: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:55,103 INFO L268 TraceCheckUtils]: 191: Hoare quadruple {67578#true} {67579#false} #3035#return; {67579#false} is VALID [2018-11-19 18:31:55,103 INFO L273 TraceCheckUtils]: 192: Hoare triple {67579#false} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {67579#false} is VALID [2018-11-19 18:31:55,103 INFO L273 TraceCheckUtils]: 193: Hoare triple {67579#false} assume !(0 == ~ldv_retval_4~0); {67579#false} is VALID [2018-11-19 18:31:55,103 INFO L273 TraceCheckUtils]: 194: Hoare triple {67579#false} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {67579#false} is VALID [2018-11-19 18:31:55,103 INFO L256 TraceCheckUtils]: 195: Hoare triple {67579#false} call ldv_check_final_state(); {67579#false} is VALID [2018-11-19 18:31:55,104 INFO L273 TraceCheckUtils]: 196: Hoare triple {67579#false} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {67579#false} is VALID [2018-11-19 18:31:55,104 INFO L273 TraceCheckUtils]: 197: Hoare triple {67579#false} assume !(0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616); {67579#false} is VALID [2018-11-19 18:31:55,104 INFO L256 TraceCheckUtils]: 198: Hoare triple {67579#false} call ldv_error(); {67579#false} is VALID [2018-11-19 18:31:55,104 INFO L273 TraceCheckUtils]: 199: Hoare triple {67579#false} assume !false; {67579#false} is VALID [2018-11-19 18:31:55,131 INFO L134 CoverageAnalysis]: Checked inductivity of 1201 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-11-19 18:31:55,132 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-19 18:31:55,132 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-19 18:31:55,153 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:31:55,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:31:56,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:31:56,166 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-19 18:31:56,521 INFO L256 TraceCheckUtils]: 0: Hoare triple {67578#true} call ULTIMATE.init(); {67578#true} is VALID [2018-11-19 18:31:56,521 INFO L273 TraceCheckUtils]: 1: Hoare triple {67578#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,522 INFO L273 TraceCheckUtils]: 2: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,522 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {67578#true} {67578#true} #3175#return; {67578#true} is VALID [2018-11-19 18:31:56,522 INFO L256 TraceCheckUtils]: 4: Hoare triple {67578#true} call #t~ret973 := main(); {67578#true} is VALID [2018-11-19 18:31:56,522 INFO L273 TraceCheckUtils]: 5: Hoare triple {67578#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {67578#true} is VALID [2018-11-19 18:31:56,522 INFO L256 TraceCheckUtils]: 6: Hoare triple {67578#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:56,522 INFO L273 TraceCheckUtils]: 7: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,523 INFO L273 TraceCheckUtils]: 8: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,523 INFO L273 TraceCheckUtils]: 9: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,523 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {67578#true} {67578#true} #2927#return; {67578#true} is VALID [2018-11-19 18:31:56,523 INFO L273 TraceCheckUtils]: 11: Hoare triple {67578#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {67578#true} is VALID [2018-11-19 18:31:56,523 INFO L256 TraceCheckUtils]: 12: Hoare triple {67578#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:56,524 INFO L273 TraceCheckUtils]: 13: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,524 INFO L273 TraceCheckUtils]: 14: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,524 INFO L273 TraceCheckUtils]: 15: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,524 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {67578#true} {67578#true} #2929#return; {67578#true} is VALID [2018-11-19 18:31:56,524 INFO L273 TraceCheckUtils]: 17: Hoare triple {67578#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {67578#true} is VALID [2018-11-19 18:31:56,524 INFO L256 TraceCheckUtils]: 18: Hoare triple {67578#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:56,525 INFO L273 TraceCheckUtils]: 19: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,525 INFO L273 TraceCheckUtils]: 20: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,525 INFO L273 TraceCheckUtils]: 21: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,525 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {67578#true} {67578#true} #2931#return; {67578#true} is VALID [2018-11-19 18:31:56,525 INFO L273 TraceCheckUtils]: 23: Hoare triple {67578#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {67578#true} is VALID [2018-11-19 18:31:56,525 INFO L256 TraceCheckUtils]: 24: Hoare triple {67578#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:56,526 INFO L273 TraceCheckUtils]: 25: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,526 INFO L273 TraceCheckUtils]: 26: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,526 INFO L273 TraceCheckUtils]: 27: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,526 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {67578#true} {67578#true} #2933#return; {67578#true} is VALID [2018-11-19 18:31:56,526 INFO L273 TraceCheckUtils]: 29: Hoare triple {67578#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {67578#true} is VALID [2018-11-19 18:31:56,526 INFO L256 TraceCheckUtils]: 30: Hoare triple {67578#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {67578#true} is VALID [2018-11-19 18:31:56,527 INFO L273 TraceCheckUtils]: 31: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,527 INFO L273 TraceCheckUtils]: 32: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,527 INFO L273 TraceCheckUtils]: 33: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,527 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {67578#true} {67578#true} #2935#return; {67578#true} is VALID [2018-11-19 18:31:56,527 INFO L273 TraceCheckUtils]: 35: Hoare triple {67578#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {67578#true} is VALID [2018-11-19 18:31:56,527 INFO L256 TraceCheckUtils]: 36: Hoare triple {67578#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:56,528 INFO L273 TraceCheckUtils]: 37: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,528 INFO L273 TraceCheckUtils]: 38: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,528 INFO L273 TraceCheckUtils]: 39: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,528 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {67578#true} {67578#true} #2937#return; {67578#true} is VALID [2018-11-19 18:31:56,528 INFO L273 TraceCheckUtils]: 41: Hoare triple {67578#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {67578#true} is VALID [2018-11-19 18:31:56,528 INFO L256 TraceCheckUtils]: 42: Hoare triple {67578#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {67578#true} is VALID [2018-11-19 18:31:56,529 INFO L273 TraceCheckUtils]: 43: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,529 INFO L273 TraceCheckUtils]: 44: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,529 INFO L273 TraceCheckUtils]: 45: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,529 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {67578#true} {67578#true} #2939#return; {67578#true} is VALID [2018-11-19 18:31:56,529 INFO L273 TraceCheckUtils]: 47: Hoare triple {67578#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {67578#true} is VALID [2018-11-19 18:31:56,529 INFO L256 TraceCheckUtils]: 48: Hoare triple {67578#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:56,530 INFO L273 TraceCheckUtils]: 49: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,530 INFO L273 TraceCheckUtils]: 50: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,530 INFO L273 TraceCheckUtils]: 51: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,530 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {67578#true} {67578#true} #2941#return; {67578#true} is VALID [2018-11-19 18:31:56,530 INFO L273 TraceCheckUtils]: 53: Hoare triple {67578#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {67578#true} is VALID [2018-11-19 18:31:56,530 INFO L256 TraceCheckUtils]: 54: Hoare triple {67578#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:56,531 INFO L273 TraceCheckUtils]: 55: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,531 INFO L273 TraceCheckUtils]: 56: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,531 INFO L273 TraceCheckUtils]: 57: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,531 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {67578#true} {67578#true} #2943#return; {67578#true} is VALID [2018-11-19 18:31:56,531 INFO L273 TraceCheckUtils]: 59: Hoare triple {67578#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {67578#true} is VALID [2018-11-19 18:31:56,532 INFO L256 TraceCheckUtils]: 60: Hoare triple {67578#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:56,532 INFO L273 TraceCheckUtils]: 61: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,532 INFO L273 TraceCheckUtils]: 62: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,532 INFO L273 TraceCheckUtils]: 63: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,532 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {67578#true} {67578#true} #2945#return; {67578#true} is VALID [2018-11-19 18:31:56,532 INFO L273 TraceCheckUtils]: 65: Hoare triple {67578#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {67578#true} is VALID [2018-11-19 18:31:56,533 INFO L256 TraceCheckUtils]: 66: Hoare triple {67578#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:56,533 INFO L273 TraceCheckUtils]: 67: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,533 INFO L273 TraceCheckUtils]: 68: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,533 INFO L273 TraceCheckUtils]: 69: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,533 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {67578#true} {67578#true} #2947#return; {67578#true} is VALID [2018-11-19 18:31:56,533 INFO L273 TraceCheckUtils]: 71: Hoare triple {67578#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {67578#true} is VALID [2018-11-19 18:31:56,534 INFO L256 TraceCheckUtils]: 72: Hoare triple {67578#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {67578#true} is VALID [2018-11-19 18:31:56,534 INFO L273 TraceCheckUtils]: 73: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,534 INFO L273 TraceCheckUtils]: 74: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,534 INFO L273 TraceCheckUtils]: 75: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,534 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {67578#true} {67578#true} #2949#return; {67578#true} is VALID [2018-11-19 18:31:56,534 INFO L273 TraceCheckUtils]: 77: Hoare triple {67578#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {67578#true} is VALID [2018-11-19 18:31:56,534 INFO L256 TraceCheckUtils]: 78: Hoare triple {67578#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {67578#true} is VALID [2018-11-19 18:31:56,535 INFO L273 TraceCheckUtils]: 79: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,535 INFO L273 TraceCheckUtils]: 80: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,535 INFO L273 TraceCheckUtils]: 81: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,535 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {67578#true} {67578#true} #2951#return; {67578#true} is VALID [2018-11-19 18:31:56,535 INFO L273 TraceCheckUtils]: 83: Hoare triple {67578#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {67578#true} is VALID [2018-11-19 18:31:56,536 INFO L256 TraceCheckUtils]: 84: Hoare triple {67578#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:56,536 INFO L273 TraceCheckUtils]: 85: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,536 INFO L273 TraceCheckUtils]: 86: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,536 INFO L273 TraceCheckUtils]: 87: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,536 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {67578#true} {67578#true} #2953#return; {67578#true} is VALID [2018-11-19 18:31:56,536 INFO L273 TraceCheckUtils]: 89: Hoare triple {67578#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {67578#true} is VALID [2018-11-19 18:31:56,537 INFO L256 TraceCheckUtils]: 90: Hoare triple {67578#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:56,537 INFO L273 TraceCheckUtils]: 91: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,537 INFO L273 TraceCheckUtils]: 92: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,537 INFO L273 TraceCheckUtils]: 93: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,537 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {67578#true} {67578#true} #2955#return; {67578#true} is VALID [2018-11-19 18:31:56,537 INFO L273 TraceCheckUtils]: 95: Hoare triple {67578#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {67578#true} is VALID [2018-11-19 18:31:56,538 INFO L256 TraceCheckUtils]: 96: Hoare triple {67578#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {67578#true} is VALID [2018-11-19 18:31:56,538 INFO L273 TraceCheckUtils]: 97: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,538 INFO L273 TraceCheckUtils]: 98: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,538 INFO L273 TraceCheckUtils]: 99: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,538 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {67578#true} {67578#true} #2957#return; {67578#true} is VALID [2018-11-19 18:31:56,538 INFO L273 TraceCheckUtils]: 101: Hoare triple {67578#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {67578#true} is VALID [2018-11-19 18:31:56,539 INFO L256 TraceCheckUtils]: 102: Hoare triple {67578#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {67578#true} is VALID [2018-11-19 18:31:56,539 INFO L273 TraceCheckUtils]: 103: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,539 INFO L273 TraceCheckUtils]: 104: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,539 INFO L273 TraceCheckUtils]: 105: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,539 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {67578#true} {67578#true} #2959#return; {67578#true} is VALID [2018-11-19 18:31:56,539 INFO L273 TraceCheckUtils]: 107: Hoare triple {67578#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {67578#true} is VALID [2018-11-19 18:31:56,540 INFO L256 TraceCheckUtils]: 108: Hoare triple {67578#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {67578#true} is VALID [2018-11-19 18:31:56,540 INFO L273 TraceCheckUtils]: 109: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,540 INFO L273 TraceCheckUtils]: 110: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,540 INFO L273 TraceCheckUtils]: 111: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,540 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {67578#true} {67578#true} #2961#return; {67578#true} is VALID [2018-11-19 18:31:56,540 INFO L273 TraceCheckUtils]: 113: Hoare triple {67578#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {67578#true} is VALID [2018-11-19 18:31:56,541 INFO L256 TraceCheckUtils]: 114: Hoare triple {67578#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:56,541 INFO L273 TraceCheckUtils]: 115: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,541 INFO L273 TraceCheckUtils]: 116: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,541 INFO L273 TraceCheckUtils]: 117: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,541 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {67578#true} {67578#true} #2963#return; {67578#true} is VALID [2018-11-19 18:31:56,541 INFO L273 TraceCheckUtils]: 119: Hoare triple {67578#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {67578#true} is VALID [2018-11-19 18:31:56,542 INFO L256 TraceCheckUtils]: 120: Hoare triple {67578#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:56,542 INFO L273 TraceCheckUtils]: 121: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,542 INFO L273 TraceCheckUtils]: 122: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,542 INFO L273 TraceCheckUtils]: 123: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,542 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {67578#true} {67578#true} #2965#return; {67578#true} is VALID [2018-11-19 18:31:56,542 INFO L273 TraceCheckUtils]: 125: Hoare triple {67578#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {67578#true} is VALID [2018-11-19 18:31:56,543 INFO L256 TraceCheckUtils]: 126: Hoare triple {67578#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:56,543 INFO L273 TraceCheckUtils]: 127: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,543 INFO L273 TraceCheckUtils]: 128: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,543 INFO L273 TraceCheckUtils]: 129: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,543 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {67578#true} {67578#true} #2967#return; {67578#true} is VALID [2018-11-19 18:31:56,543 INFO L273 TraceCheckUtils]: 131: Hoare triple {67578#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {67578#true} is VALID [2018-11-19 18:31:56,544 INFO L256 TraceCheckUtils]: 132: Hoare triple {67578#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {67578#true} is VALID [2018-11-19 18:31:56,544 INFO L273 TraceCheckUtils]: 133: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,544 INFO L273 TraceCheckUtils]: 134: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,544 INFO L273 TraceCheckUtils]: 135: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,544 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {67578#true} {67578#true} #2969#return; {67578#true} is VALID [2018-11-19 18:31:56,544 INFO L273 TraceCheckUtils]: 137: Hoare triple {67578#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {67578#true} is VALID [2018-11-19 18:31:56,545 INFO L256 TraceCheckUtils]: 138: Hoare triple {67578#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {67578#true} is VALID [2018-11-19 18:31:56,545 INFO L273 TraceCheckUtils]: 139: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,545 INFO L273 TraceCheckUtils]: 140: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,545 INFO L273 TraceCheckUtils]: 141: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,545 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {67578#true} {67578#true} #2971#return; {67578#true} is VALID [2018-11-19 18:31:56,545 INFO L273 TraceCheckUtils]: 143: Hoare triple {67578#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {67578#true} is VALID [2018-11-19 18:31:56,546 INFO L256 TraceCheckUtils]: 144: Hoare triple {67578#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {67578#true} is VALID [2018-11-19 18:31:56,546 INFO L273 TraceCheckUtils]: 145: Hoare triple {67578#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67578#true} is VALID [2018-11-19 18:31:56,546 INFO L273 TraceCheckUtils]: 146: Hoare triple {67578#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67578#true} is VALID [2018-11-19 18:31:56,546 INFO L273 TraceCheckUtils]: 147: Hoare triple {67578#true} assume true; {67578#true} is VALID [2018-11-19 18:31:56,546 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {67578#true} {67578#true} #2973#return; {67578#true} is VALID [2018-11-19 18:31:56,546 INFO L273 TraceCheckUtils]: 149: Hoare triple {67578#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {67578#true} is VALID [2018-11-19 18:31:56,547 INFO L256 TraceCheckUtils]: 150: Hoare triple {67578#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {67578#true} is VALID [2018-11-19 18:31:56,547 INFO L273 TraceCheckUtils]: 151: Hoare triple {67578#true} #t~loopctr974 := 0; {68039#(<= |#Ultimate.C_memset_#t~loopctr974| 0)} is VALID [2018-11-19 18:31:56,556 INFO L273 TraceCheckUtils]: 152: Hoare triple {68039#(<= |#Ultimate.C_memset_#t~loopctr974| 0)} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {68043#(<= |#Ultimate.C_memset_#t~loopctr974| 1)} is VALID [2018-11-19 18:31:56,557 INFO L273 TraceCheckUtils]: 153: Hoare triple {68043#(<= |#Ultimate.C_memset_#t~loopctr974| 1)} assume !(#t~loopctr974 < #amount); {68047#(<= |#Ultimate.C_memset_#amount| 1)} is VALID [2018-11-19 18:31:56,560 INFO L273 TraceCheckUtils]: 154: Hoare triple {68047#(<= |#Ultimate.C_memset_#amount| 1)} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {68047#(<= |#Ultimate.C_memset_#amount| 1)} is VALID [2018-11-19 18:31:56,570 INFO L268 TraceCheckUtils]: 155: Hoare quadruple {68047#(<= |#Ultimate.C_memset_#amount| 1)} {67578#true} #2975#return; {67579#false} is VALID [2018-11-19 18:31:56,570 INFO L273 TraceCheckUtils]: 156: Hoare triple {67579#false} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {67579#false} is VALID [2018-11-19 18:31:56,570 INFO L273 TraceCheckUtils]: 157: Hoare triple {67579#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:56,571 INFO L273 TraceCheckUtils]: 158: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:56,571 INFO L273 TraceCheckUtils]: 159: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:56,571 INFO L273 TraceCheckUtils]: 160: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:56,571 INFO L273 TraceCheckUtils]: 161: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:56,571 INFO L273 TraceCheckUtils]: 162: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:56,572 INFO L273 TraceCheckUtils]: 163: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:56,572 INFO L273 TraceCheckUtils]: 164: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:56,572 INFO L273 TraceCheckUtils]: 165: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:56,572 INFO L273 TraceCheckUtils]: 166: Hoare triple {67579#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {67579#false} is VALID [2018-11-19 18:31:56,572 INFO L273 TraceCheckUtils]: 167: Hoare triple {67579#false} assume #t~switch909; {67579#false} is VALID [2018-11-19 18:31:56,572 INFO L273 TraceCheckUtils]: 168: Hoare triple {67579#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {67579#false} is VALID [2018-11-19 18:31:56,573 INFO L273 TraceCheckUtils]: 169: Hoare triple {67579#false} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {67579#false} is VALID [2018-11-19 18:31:56,573 INFO L273 TraceCheckUtils]: 170: Hoare triple {67579#false} assume #t~switch947; {67579#false} is VALID [2018-11-19 18:31:56,573 INFO L273 TraceCheckUtils]: 171: Hoare triple {67579#false} assume 1 == ~ldv_state_variable_0~0; {67579#false} is VALID [2018-11-19 18:31:56,573 INFO L256 TraceCheckUtils]: 172: Hoare triple {67579#false} call #t~ret948 := ims_pcu_driver_init(); {67579#false} is VALID [2018-11-19 18:31:56,573 INFO L273 TraceCheckUtils]: 173: Hoare triple {67579#false} havoc ~tmp~46; {67579#false} is VALID [2018-11-19 18:31:56,573 INFO L256 TraceCheckUtils]: 174: Hoare triple {67579#false} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {67579#false} is VALID [2018-11-19 18:31:56,574 INFO L273 TraceCheckUtils]: 175: Hoare triple {67579#false} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {67579#false} is VALID [2018-11-19 18:31:56,574 INFO L256 TraceCheckUtils]: 176: Hoare triple {67579#false} call ldv_usb_driver_1(); {67579#false} is VALID [2018-11-19 18:31:56,574 INFO L273 TraceCheckUtils]: 177: Hoare triple {67579#false} havoc ~tmp~53.base, ~tmp~53.offset; {67579#false} is VALID [2018-11-19 18:31:56,574 INFO L256 TraceCheckUtils]: 178: Hoare triple {67579#false} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {67579#false} is VALID [2018-11-19 18:31:56,574 INFO L273 TraceCheckUtils]: 179: Hoare triple {67579#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {67579#false} is VALID [2018-11-19 18:31:56,574 INFO L273 TraceCheckUtils]: 180: Hoare triple {67579#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {67579#false} is VALID [2018-11-19 18:31:56,575 INFO L273 TraceCheckUtils]: 181: Hoare triple {67579#false} assume true; {67579#false} is VALID [2018-11-19 18:31:56,575 INFO L268 TraceCheckUtils]: 182: Hoare quadruple {67579#false} {67579#false} #2613#return; {67579#false} is VALID [2018-11-19 18:31:56,575 INFO L273 TraceCheckUtils]: 183: Hoare triple {67579#false} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {67579#false} is VALID [2018-11-19 18:31:56,575 INFO L273 TraceCheckUtils]: 184: Hoare triple {67579#false} assume true; {67579#false} is VALID [2018-11-19 18:31:56,575 INFO L268 TraceCheckUtils]: 185: Hoare quadruple {67579#false} {67579#false} #2537#return; {67579#false} is VALID [2018-11-19 18:31:56,576 INFO L273 TraceCheckUtils]: 186: Hoare triple {67579#false} #res := ~ldv_func_res~0; {67579#false} is VALID [2018-11-19 18:31:56,576 INFO L273 TraceCheckUtils]: 187: Hoare triple {67579#false} assume true; {67579#false} is VALID [2018-11-19 18:31:56,576 INFO L268 TraceCheckUtils]: 188: Hoare quadruple {67579#false} {67579#false} #2777#return; {67579#false} is VALID [2018-11-19 18:31:56,576 INFO L273 TraceCheckUtils]: 189: Hoare triple {67579#false} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {67579#false} is VALID [2018-11-19 18:31:56,576 INFO L273 TraceCheckUtils]: 190: Hoare triple {67579#false} assume true; {67579#false} is VALID [2018-11-19 18:31:56,576 INFO L268 TraceCheckUtils]: 191: Hoare quadruple {67579#false} {67579#false} #3035#return; {67579#false} is VALID [2018-11-19 18:31:56,577 INFO L273 TraceCheckUtils]: 192: Hoare triple {67579#false} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {67579#false} is VALID [2018-11-19 18:31:56,577 INFO L273 TraceCheckUtils]: 193: Hoare triple {67579#false} assume !(0 == ~ldv_retval_4~0); {67579#false} is VALID [2018-11-19 18:31:56,577 INFO L273 TraceCheckUtils]: 194: Hoare triple {67579#false} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {67579#false} is VALID [2018-11-19 18:31:56,577 INFO L256 TraceCheckUtils]: 195: Hoare triple {67579#false} call ldv_check_final_state(); {67579#false} is VALID [2018-11-19 18:31:56,577 INFO L273 TraceCheckUtils]: 196: Hoare triple {67579#false} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {67579#false} is VALID [2018-11-19 18:31:56,577 INFO L273 TraceCheckUtils]: 197: Hoare triple {67579#false} assume !(0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616); {67579#false} is VALID [2018-11-19 18:31:56,578 INFO L256 TraceCheckUtils]: 198: Hoare triple {67579#false} call ldv_error(); {67579#false} is VALID [2018-11-19 18:31:56,578 INFO L273 TraceCheckUtils]: 199: Hoare triple {67579#false} assume !false; {67579#false} is VALID [2018-11-19 18:31:56,599 INFO L134 CoverageAnalysis]: Checked inductivity of 1201 backedges. 96 proven. 1 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-11-19 18:31:56,637 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-19 18:31:56,637 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-11-19 18:31:56,638 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 200 [2018-11-19 18:31:56,639 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:31:56,639 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states. [2018-11-19 18:31:56,938 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 153 edges. 153 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:31:56,938 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-19 18:31:56,939 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-19 18:31:56,939 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-19 18:31:56,939 INFO L87 Difference]: Start difference. First operand 4705 states and 6345 transitions. Second operand 8 states. [2018-11-19 18:32:18,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:32:18,561 INFO L93 Difference]: Finished difference Result 9379 states and 12671 transitions. [2018-11-19 18:32:18,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-19 18:32:18,561 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 200 [2018-11-19 18:32:18,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:32:18,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-19 18:32:18,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 3304 transitions. [2018-11-19 18:32:18,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-19 18:32:18,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 3304 transitions. [2018-11-19 18:32:18,725 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 3304 transitions. [2018-11-19 18:32:21,670 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3304 edges. 3304 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:32:22,687 INFO L225 Difference]: With dead ends: 9379 [2018-11-19 18:32:22,687 INFO L226 Difference]: Without dead ends: 4721 [2018-11-19 18:32:22,704 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 208 GetRequests, 198 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=79, Unknown=0, NotChecked=0, Total=132 [2018-11-19 18:32:22,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4721 states. [2018-11-19 18:32:25,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4721 to 4701. [2018-11-19 18:32:25,348 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:32:25,348 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4721 states. Second operand 4701 states. [2018-11-19 18:32:25,348 INFO L74 IsIncluded]: Start isIncluded. First operand 4721 states. Second operand 4701 states. [2018-11-19 18:32:25,348 INFO L87 Difference]: Start difference. First operand 4721 states. Second operand 4701 states. [2018-11-19 18:32:26,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:32:26,229 INFO L93 Difference]: Finished difference Result 4721 states and 6361 transitions. [2018-11-19 18:32:26,229 INFO L276 IsEmpty]: Start isEmpty. Operand 4721 states and 6361 transitions. [2018-11-19 18:32:26,252 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:32:26,252 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:32:26,252 INFO L74 IsIncluded]: Start isIncluded. First operand 4701 states. Second operand 4721 states. [2018-11-19 18:32:26,252 INFO L87 Difference]: Start difference. First operand 4701 states. Second operand 4721 states. [2018-11-19 18:32:27,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:32:27,153 INFO L93 Difference]: Finished difference Result 4721 states and 6361 transitions. [2018-11-19 18:32:27,153 INFO L276 IsEmpty]: Start isEmpty. Operand 4721 states and 6361 transitions. [2018-11-19 18:32:27,165 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:32:27,165 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:32:27,165 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:32:27,165 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:32:27,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4701 states. [2018-11-19 18:32:28,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4701 states to 4701 states and 6335 transitions. [2018-11-19 18:32:28,339 INFO L78 Accepts]: Start accepts. Automaton has 4701 states and 6335 transitions. Word has length 200 [2018-11-19 18:32:28,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:32:28,340 INFO L480 AbstractCegarLoop]: Abstraction has 4701 states and 6335 transitions. [2018-11-19 18:32:28,340 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-19 18:32:28,340 INFO L276 IsEmpty]: Start isEmpty. Operand 4701 states and 6335 transitions. [2018-11-19 18:32:28,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2018-11-19 18:32:28,343 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:32:28,343 INFO L384 BasicCegarLoop]: trace histogram [25, 25, 25, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:32:28,343 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:32:28,344 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:32:28,344 INFO L82 PathProgramCache]: Analyzing trace with hash 997019501, now seen corresponding path program 2 times [2018-11-19 18:32:28,344 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:32:28,344 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:32:28,347 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:32:28,348 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:32:28,348 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:32:28,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:32:28,816 INFO L256 TraceCheckUtils]: 0: Hoare triple {96589#true} call ULTIMATE.init(); {96589#true} is VALID [2018-11-19 18:32:28,921 INFO L273 TraceCheckUtils]: 1: Hoare triple {96589#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,923 INFO L273 TraceCheckUtils]: 2: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume true; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,924 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} {96589#true} #3175#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,925 INFO L256 TraceCheckUtils]: 4: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret973 := main(); {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,926 INFO L273 TraceCheckUtils]: 5: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,926 INFO L256 TraceCheckUtils]: 6: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {96589#true} is VALID [2018-11-19 18:32:28,926 INFO L273 TraceCheckUtils]: 7: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,926 INFO L273 TraceCheckUtils]: 8: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,927 INFO L273 TraceCheckUtils]: 9: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,927 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2927#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,928 INFO L273 TraceCheckUtils]: 11: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,928 INFO L256 TraceCheckUtils]: 12: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {96589#true} is VALID [2018-11-19 18:32:28,929 INFO L273 TraceCheckUtils]: 13: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,929 INFO L273 TraceCheckUtils]: 14: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,929 INFO L273 TraceCheckUtils]: 15: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,930 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2929#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,931 INFO L273 TraceCheckUtils]: 17: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,931 INFO L256 TraceCheckUtils]: 18: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {96589#true} is VALID [2018-11-19 18:32:28,931 INFO L273 TraceCheckUtils]: 19: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,932 INFO L273 TraceCheckUtils]: 20: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,932 INFO L273 TraceCheckUtils]: 21: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,933 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2931#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,933 INFO L273 TraceCheckUtils]: 23: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,934 INFO L256 TraceCheckUtils]: 24: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {96589#true} is VALID [2018-11-19 18:32:28,934 INFO L273 TraceCheckUtils]: 25: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,934 INFO L273 TraceCheckUtils]: 26: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,934 INFO L273 TraceCheckUtils]: 27: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,935 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2933#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,936 INFO L273 TraceCheckUtils]: 29: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,936 INFO L256 TraceCheckUtils]: 30: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {96589#true} is VALID [2018-11-19 18:32:28,936 INFO L273 TraceCheckUtils]: 31: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,936 INFO L273 TraceCheckUtils]: 32: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,937 INFO L273 TraceCheckUtils]: 33: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,937 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2935#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,938 INFO L273 TraceCheckUtils]: 35: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,938 INFO L256 TraceCheckUtils]: 36: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {96589#true} is VALID [2018-11-19 18:32:28,939 INFO L273 TraceCheckUtils]: 37: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,939 INFO L273 TraceCheckUtils]: 38: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,939 INFO L273 TraceCheckUtils]: 39: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,940 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2937#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,941 INFO L273 TraceCheckUtils]: 41: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,941 INFO L256 TraceCheckUtils]: 42: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {96589#true} is VALID [2018-11-19 18:32:28,941 INFO L273 TraceCheckUtils]: 43: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,941 INFO L273 TraceCheckUtils]: 44: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,941 INFO L273 TraceCheckUtils]: 45: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,942 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2939#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,943 INFO L273 TraceCheckUtils]: 47: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,943 INFO L256 TraceCheckUtils]: 48: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {96589#true} is VALID [2018-11-19 18:32:28,943 INFO L273 TraceCheckUtils]: 49: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,944 INFO L273 TraceCheckUtils]: 50: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,944 INFO L273 TraceCheckUtils]: 51: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,945 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2941#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,946 INFO L273 TraceCheckUtils]: 53: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,946 INFO L256 TraceCheckUtils]: 54: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {96589#true} is VALID [2018-11-19 18:32:28,946 INFO L273 TraceCheckUtils]: 55: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,946 INFO L273 TraceCheckUtils]: 56: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,946 INFO L273 TraceCheckUtils]: 57: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,947 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2943#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,948 INFO L273 TraceCheckUtils]: 59: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,948 INFO L256 TraceCheckUtils]: 60: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {96589#true} is VALID [2018-11-19 18:32:28,949 INFO L273 TraceCheckUtils]: 61: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,949 INFO L273 TraceCheckUtils]: 62: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,949 INFO L273 TraceCheckUtils]: 63: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,950 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2945#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,951 INFO L273 TraceCheckUtils]: 65: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,951 INFO L256 TraceCheckUtils]: 66: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {96589#true} is VALID [2018-11-19 18:32:28,951 INFO L273 TraceCheckUtils]: 67: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,951 INFO L273 TraceCheckUtils]: 68: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,952 INFO L273 TraceCheckUtils]: 69: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,952 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2947#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,953 INFO L273 TraceCheckUtils]: 71: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,953 INFO L256 TraceCheckUtils]: 72: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {96589#true} is VALID [2018-11-19 18:32:28,954 INFO L273 TraceCheckUtils]: 73: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,954 INFO L273 TraceCheckUtils]: 74: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,954 INFO L273 TraceCheckUtils]: 75: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,955 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2949#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,956 INFO L273 TraceCheckUtils]: 77: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,956 INFO L256 TraceCheckUtils]: 78: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {96589#true} is VALID [2018-11-19 18:32:28,956 INFO L273 TraceCheckUtils]: 79: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,956 INFO L273 TraceCheckUtils]: 80: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,957 INFO L273 TraceCheckUtils]: 81: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,957 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2951#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,958 INFO L273 TraceCheckUtils]: 83: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,958 INFO L256 TraceCheckUtils]: 84: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {96589#true} is VALID [2018-11-19 18:32:28,958 INFO L273 TraceCheckUtils]: 85: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,959 INFO L273 TraceCheckUtils]: 86: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,959 INFO L273 TraceCheckUtils]: 87: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,960 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2953#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,960 INFO L273 TraceCheckUtils]: 89: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,961 INFO L256 TraceCheckUtils]: 90: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {96589#true} is VALID [2018-11-19 18:32:28,961 INFO L273 TraceCheckUtils]: 91: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,961 INFO L273 TraceCheckUtils]: 92: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,961 INFO L273 TraceCheckUtils]: 93: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,962 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2955#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,963 INFO L273 TraceCheckUtils]: 95: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,963 INFO L256 TraceCheckUtils]: 96: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {96589#true} is VALID [2018-11-19 18:32:28,963 INFO L273 TraceCheckUtils]: 97: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,964 INFO L273 TraceCheckUtils]: 98: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,964 INFO L273 TraceCheckUtils]: 99: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,965 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2957#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,965 INFO L273 TraceCheckUtils]: 101: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,966 INFO L256 TraceCheckUtils]: 102: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {96589#true} is VALID [2018-11-19 18:32:28,966 INFO L273 TraceCheckUtils]: 103: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,966 INFO L273 TraceCheckUtils]: 104: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,966 INFO L273 TraceCheckUtils]: 105: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,967 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2959#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,968 INFO L273 TraceCheckUtils]: 107: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,968 INFO L256 TraceCheckUtils]: 108: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {96589#true} is VALID [2018-11-19 18:32:28,968 INFO L273 TraceCheckUtils]: 109: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,968 INFO L273 TraceCheckUtils]: 110: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,969 INFO L273 TraceCheckUtils]: 111: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,970 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2961#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,970 INFO L273 TraceCheckUtils]: 113: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,971 INFO L256 TraceCheckUtils]: 114: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {96589#true} is VALID [2018-11-19 18:32:28,971 INFO L273 TraceCheckUtils]: 115: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,971 INFO L273 TraceCheckUtils]: 116: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,971 INFO L273 TraceCheckUtils]: 117: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,972 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2963#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,973 INFO L273 TraceCheckUtils]: 119: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,973 INFO L256 TraceCheckUtils]: 120: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {96589#true} is VALID [2018-11-19 18:32:28,973 INFO L273 TraceCheckUtils]: 121: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,974 INFO L273 TraceCheckUtils]: 122: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,974 INFO L273 TraceCheckUtils]: 123: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,975 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2965#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,975 INFO L273 TraceCheckUtils]: 125: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,976 INFO L256 TraceCheckUtils]: 126: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {96589#true} is VALID [2018-11-19 18:32:28,976 INFO L273 TraceCheckUtils]: 127: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,976 INFO L273 TraceCheckUtils]: 128: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,976 INFO L273 TraceCheckUtils]: 129: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,977 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2967#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,978 INFO L273 TraceCheckUtils]: 131: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,978 INFO L256 TraceCheckUtils]: 132: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {96589#true} is VALID [2018-11-19 18:32:28,978 INFO L273 TraceCheckUtils]: 133: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,979 INFO L273 TraceCheckUtils]: 134: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,979 INFO L273 TraceCheckUtils]: 135: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,980 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2969#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,980 INFO L273 TraceCheckUtils]: 137: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,981 INFO L256 TraceCheckUtils]: 138: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {96589#true} is VALID [2018-11-19 18:32:28,981 INFO L273 TraceCheckUtils]: 139: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,981 INFO L273 TraceCheckUtils]: 140: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,981 INFO L273 TraceCheckUtils]: 141: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,982 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2971#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,983 INFO L273 TraceCheckUtils]: 143: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,983 INFO L256 TraceCheckUtils]: 144: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {96589#true} is VALID [2018-11-19 18:32:28,983 INFO L273 TraceCheckUtils]: 145: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:28,983 INFO L273 TraceCheckUtils]: 146: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:28,984 INFO L273 TraceCheckUtils]: 147: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:28,985 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2973#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,986 INFO L273 TraceCheckUtils]: 149: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,986 INFO L256 TraceCheckUtils]: 150: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {96589#true} is VALID [2018-11-19 18:32:28,986 INFO L273 TraceCheckUtils]: 151: Hoare triple {96589#true} #t~loopctr974 := 0; {96589#true} is VALID [2018-11-19 18:32:28,986 INFO L273 TraceCheckUtils]: 152: Hoare triple {96589#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {96589#true} is VALID [2018-11-19 18:32:28,986 INFO L273 TraceCheckUtils]: 153: Hoare triple {96589#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {96589#true} is VALID [2018-11-19 18:32:28,987 INFO L273 TraceCheckUtils]: 154: Hoare triple {96589#true} assume !(#t~loopctr974 < #amount); {96589#true} is VALID [2018-11-19 18:32:28,987 INFO L273 TraceCheckUtils]: 155: Hoare triple {96589#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {96589#true} is VALID [2018-11-19 18:32:28,988 INFO L268 TraceCheckUtils]: 156: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #2975#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,989 INFO L273 TraceCheckUtils]: 157: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,990 INFO L273 TraceCheckUtils]: 158: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,990 INFO L273 TraceCheckUtils]: 159: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,991 INFO L273 TraceCheckUtils]: 160: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,992 INFO L273 TraceCheckUtils]: 161: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,992 INFO L273 TraceCheckUtils]: 162: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,993 INFO L273 TraceCheckUtils]: 163: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,994 INFO L273 TraceCheckUtils]: 164: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,995 INFO L273 TraceCheckUtils]: 165: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,996 INFO L273 TraceCheckUtils]: 166: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,996 INFO L273 TraceCheckUtils]: 167: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,997 INFO L273 TraceCheckUtils]: 168: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume #t~switch909; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,998 INFO L273 TraceCheckUtils]: 169: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,998 INFO L273 TraceCheckUtils]: 170: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:28,999 INFO L273 TraceCheckUtils]: 171: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume #t~switch947; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:29,000 INFO L273 TraceCheckUtils]: 172: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume 1 == ~ldv_state_variable_0~0; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:29,000 INFO L256 TraceCheckUtils]: 173: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call #t~ret948 := ims_pcu_driver_init(); {96589#true} is VALID [2018-11-19 18:32:29,000 INFO L273 TraceCheckUtils]: 174: Hoare triple {96589#true} havoc ~tmp~46; {96589#true} is VALID [2018-11-19 18:32:29,000 INFO L256 TraceCheckUtils]: 175: Hoare triple {96589#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {96589#true} is VALID [2018-11-19 18:32:29,000 INFO L273 TraceCheckUtils]: 176: Hoare triple {96589#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {96589#true} is VALID [2018-11-19 18:32:29,001 INFO L256 TraceCheckUtils]: 177: Hoare triple {96589#true} call ldv_usb_driver_1(); {96589#true} is VALID [2018-11-19 18:32:29,001 INFO L273 TraceCheckUtils]: 178: Hoare triple {96589#true} havoc ~tmp~53.base, ~tmp~53.offset; {96589#true} is VALID [2018-11-19 18:32:29,001 INFO L256 TraceCheckUtils]: 179: Hoare triple {96589#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {96589#true} is VALID [2018-11-19 18:32:29,001 INFO L273 TraceCheckUtils]: 180: Hoare triple {96589#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {96589#true} is VALID [2018-11-19 18:32:29,001 INFO L273 TraceCheckUtils]: 181: Hoare triple {96589#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {96589#true} is VALID [2018-11-19 18:32:29,002 INFO L273 TraceCheckUtils]: 182: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:29,002 INFO L268 TraceCheckUtils]: 183: Hoare quadruple {96589#true} {96589#true} #2613#return; {96589#true} is VALID [2018-11-19 18:32:29,002 INFO L273 TraceCheckUtils]: 184: Hoare triple {96589#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {96589#true} is VALID [2018-11-19 18:32:29,002 INFO L273 TraceCheckUtils]: 185: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:29,002 INFO L268 TraceCheckUtils]: 186: Hoare quadruple {96589#true} {96589#true} #2537#return; {96589#true} is VALID [2018-11-19 18:32:29,003 INFO L273 TraceCheckUtils]: 187: Hoare triple {96589#true} #res := ~ldv_func_res~0; {96589#true} is VALID [2018-11-19 18:32:29,003 INFO L273 TraceCheckUtils]: 188: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:29,003 INFO L268 TraceCheckUtils]: 189: Hoare quadruple {96589#true} {96589#true} #2777#return; {96589#true} is VALID [2018-11-19 18:32:29,003 INFO L273 TraceCheckUtils]: 190: Hoare triple {96589#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {96589#true} is VALID [2018-11-19 18:32:29,003 INFO L273 TraceCheckUtils]: 191: Hoare triple {96589#true} assume true; {96589#true} is VALID [2018-11-19 18:32:29,004 INFO L268 TraceCheckUtils]: 192: Hoare quadruple {96589#true} {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} #3035#return; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:29,005 INFO L273 TraceCheckUtils]: 193: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:29,006 INFO L273 TraceCheckUtils]: 194: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume !(0 == ~ldv_retval_4~0); {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:29,006 INFO L273 TraceCheckUtils]: 195: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:29,007 INFO L256 TraceCheckUtils]: 196: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} call ldv_check_final_state(); {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:29,008 INFO L273 TraceCheckUtils]: 197: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} is VALID [2018-11-19 18:32:29,008 INFO L273 TraceCheckUtils]: 198: Hoare triple {96591#(and (= ~usb_dev~0.offset 0) (= ~usb_dev~0.base 0))} assume !(0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616); {96590#false} is VALID [2018-11-19 18:32:29,008 INFO L256 TraceCheckUtils]: 199: Hoare triple {96590#false} call ldv_error(); {96590#false} is VALID [2018-11-19 18:32:29,009 INFO L273 TraceCheckUtils]: 200: Hoare triple {96590#false} assume !false; {96590#false} is VALID [2018-11-19 18:32:29,059 INFO L134 CoverageAnalysis]: Checked inductivity of 1203 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1203 trivial. 0 not checked. [2018-11-19 18:32:29,059 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:32:29,060 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 18:32:29,060 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 201 [2018-11-19 18:32:29,061 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:32:29,061 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 18:32:29,441 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 128 edges. 128 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:32:29,441 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 18:32:29,441 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 18:32:29,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:32:29,442 INFO L87 Difference]: Start difference. First operand 4701 states and 6335 transitions. Second operand 3 states. [2018-11-19 18:32:41,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:32:41,779 INFO L93 Difference]: Finished difference Result 4703 states and 6336 transitions. [2018-11-19 18:32:41,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 18:32:41,779 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 201 [2018-11-19 18:32:41,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:32:41,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:32:41,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1681 transitions. [2018-11-19 18:32:41,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:32:41,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1681 transitions. [2018-11-19 18:32:41,855 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 1681 transitions. [2018-11-19 18:32:43,591 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 1681 edges. 1681 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:32:44,749 INFO L225 Difference]: With dead ends: 4703 [2018-11-19 18:32:44,749 INFO L226 Difference]: Without dead ends: 4700 [2018-11-19 18:32:44,751 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:32:44,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4700 states. [2018-11-19 18:33:00,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4700 to 4700. [2018-11-19 18:33:00,158 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:33:00,158 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4700 states. Second operand 4700 states. [2018-11-19 18:33:00,158 INFO L74 IsIncluded]: Start isIncluded. First operand 4700 states. Second operand 4700 states. [2018-11-19 18:33:00,158 INFO L87 Difference]: Start difference. First operand 4700 states. Second operand 4700 states. [2018-11-19 18:33:01,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:33:01,020 INFO L93 Difference]: Finished difference Result 4700 states and 6333 transitions. [2018-11-19 18:33:01,020 INFO L276 IsEmpty]: Start isEmpty. Operand 4700 states and 6333 transitions. [2018-11-19 18:33:01,027 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:33:01,027 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:33:01,028 INFO L74 IsIncluded]: Start isIncluded. First operand 4700 states. Second operand 4700 states. [2018-11-19 18:33:01,028 INFO L87 Difference]: Start difference. First operand 4700 states. Second operand 4700 states. [2018-11-19 18:33:01,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:33:01,896 INFO L93 Difference]: Finished difference Result 4700 states and 6333 transitions. [2018-11-19 18:33:01,896 INFO L276 IsEmpty]: Start isEmpty. Operand 4700 states and 6333 transitions. [2018-11-19 18:33:01,903 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:33:01,904 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:33:01,904 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:33:01,904 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:33:01,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4700 states. [2018-11-19 18:33:03,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4700 states to 4700 states and 6333 transitions. [2018-11-19 18:33:03,082 INFO L78 Accepts]: Start accepts. Automaton has 4700 states and 6333 transitions. Word has length 201 [2018-11-19 18:33:03,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:33:03,082 INFO L480 AbstractCegarLoop]: Abstraction has 4700 states and 6333 transitions. [2018-11-19 18:33:03,082 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 18:33:03,083 INFO L276 IsEmpty]: Start isEmpty. Operand 4700 states and 6333 transitions. [2018-11-19 18:33:03,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2018-11-19 18:33:03,084 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:33:03,084 INFO L384 BasicCegarLoop]: trace histogram [25, 25, 25, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:33:03,084 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:33:03,085 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:33:03,085 INFO L82 PathProgramCache]: Analyzing trace with hash 842223470, now seen corresponding path program 1 times [2018-11-19 18:33:03,085 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:33:03,085 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:33:03,087 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:33:03,088 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-19 18:33:03,088 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:33:03,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:33:03,359 INFO L256 TraceCheckUtils]: 0: Hoare triple {118663#true} call ULTIMATE.init(); {118663#true} is VALID [2018-11-19 18:33:03,359 INFO L273 TraceCheckUtils]: 1: Hoare triple {118663#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,362 INFO L273 TraceCheckUtils]: 2: Hoare triple {118665#(= ~dev_counter~0 0)} assume true; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,364 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {118665#(= ~dev_counter~0 0)} {118663#true} #3175#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,366 INFO L256 TraceCheckUtils]: 4: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret973 := main(); {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,366 INFO L273 TraceCheckUtils]: 5: Hoare triple {118665#(= ~dev_counter~0 0)} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,366 INFO L256 TraceCheckUtils]: 6: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {118663#true} is VALID [2018-11-19 18:33:03,366 INFO L273 TraceCheckUtils]: 7: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,366 INFO L273 TraceCheckUtils]: 8: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,366 INFO L273 TraceCheckUtils]: 9: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,368 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2927#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,368 INFO L273 TraceCheckUtils]: 11: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,368 INFO L256 TraceCheckUtils]: 12: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {118663#true} is VALID [2018-11-19 18:33:03,368 INFO L273 TraceCheckUtils]: 13: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,368 INFO L273 TraceCheckUtils]: 14: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,369 INFO L273 TraceCheckUtils]: 15: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,370 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2929#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,370 INFO L273 TraceCheckUtils]: 17: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,370 INFO L256 TraceCheckUtils]: 18: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {118663#true} is VALID [2018-11-19 18:33:03,371 INFO L273 TraceCheckUtils]: 19: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,371 INFO L273 TraceCheckUtils]: 20: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,371 INFO L273 TraceCheckUtils]: 21: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,372 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2931#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,376 INFO L273 TraceCheckUtils]: 23: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,376 INFO L256 TraceCheckUtils]: 24: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {118663#true} is VALID [2018-11-19 18:33:03,376 INFO L273 TraceCheckUtils]: 25: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,376 INFO L273 TraceCheckUtils]: 26: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,376 INFO L273 TraceCheckUtils]: 27: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,377 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2933#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,378 INFO L273 TraceCheckUtils]: 29: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,378 INFO L256 TraceCheckUtils]: 30: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {118663#true} is VALID [2018-11-19 18:33:03,378 INFO L273 TraceCheckUtils]: 31: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,378 INFO L273 TraceCheckUtils]: 32: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,378 INFO L273 TraceCheckUtils]: 33: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,379 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2935#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,380 INFO L273 TraceCheckUtils]: 35: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,380 INFO L256 TraceCheckUtils]: 36: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {118663#true} is VALID [2018-11-19 18:33:03,380 INFO L273 TraceCheckUtils]: 37: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,380 INFO L273 TraceCheckUtils]: 38: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,380 INFO L273 TraceCheckUtils]: 39: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,381 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2937#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,386 INFO L273 TraceCheckUtils]: 41: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,386 INFO L256 TraceCheckUtils]: 42: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {118663#true} is VALID [2018-11-19 18:33:03,386 INFO L273 TraceCheckUtils]: 43: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,386 INFO L273 TraceCheckUtils]: 44: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,386 INFO L273 TraceCheckUtils]: 45: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,387 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2939#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,387 INFO L273 TraceCheckUtils]: 47: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,387 INFO L256 TraceCheckUtils]: 48: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {118663#true} is VALID [2018-11-19 18:33:03,387 INFO L273 TraceCheckUtils]: 49: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,387 INFO L273 TraceCheckUtils]: 50: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,387 INFO L273 TraceCheckUtils]: 51: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,388 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2941#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,388 INFO L273 TraceCheckUtils]: 53: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,388 INFO L256 TraceCheckUtils]: 54: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {118663#true} is VALID [2018-11-19 18:33:03,389 INFO L273 TraceCheckUtils]: 55: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,389 INFO L273 TraceCheckUtils]: 56: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,389 INFO L273 TraceCheckUtils]: 57: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,389 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2943#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,390 INFO L273 TraceCheckUtils]: 59: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,390 INFO L256 TraceCheckUtils]: 60: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {118663#true} is VALID [2018-11-19 18:33:03,390 INFO L273 TraceCheckUtils]: 61: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,390 INFO L273 TraceCheckUtils]: 62: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,390 INFO L273 TraceCheckUtils]: 63: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,391 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2945#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,391 INFO L273 TraceCheckUtils]: 65: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,391 INFO L256 TraceCheckUtils]: 66: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {118663#true} is VALID [2018-11-19 18:33:03,392 INFO L273 TraceCheckUtils]: 67: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,392 INFO L273 TraceCheckUtils]: 68: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,392 INFO L273 TraceCheckUtils]: 69: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,393 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2947#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,393 INFO L273 TraceCheckUtils]: 71: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,394 INFO L256 TraceCheckUtils]: 72: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {118663#true} is VALID [2018-11-19 18:33:03,394 INFO L273 TraceCheckUtils]: 73: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,394 INFO L273 TraceCheckUtils]: 74: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,394 INFO L273 TraceCheckUtils]: 75: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,395 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2949#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,395 INFO L273 TraceCheckUtils]: 77: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,396 INFO L256 TraceCheckUtils]: 78: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {118663#true} is VALID [2018-11-19 18:33:03,396 INFO L273 TraceCheckUtils]: 79: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,396 INFO L273 TraceCheckUtils]: 80: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,396 INFO L273 TraceCheckUtils]: 81: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,396 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2951#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,397 INFO L273 TraceCheckUtils]: 83: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,397 INFO L256 TraceCheckUtils]: 84: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {118663#true} is VALID [2018-11-19 18:33:03,397 INFO L273 TraceCheckUtils]: 85: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,397 INFO L273 TraceCheckUtils]: 86: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,397 INFO L273 TraceCheckUtils]: 87: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,398 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2953#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,398 INFO L273 TraceCheckUtils]: 89: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,398 INFO L256 TraceCheckUtils]: 90: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {118663#true} is VALID [2018-11-19 18:33:03,398 INFO L273 TraceCheckUtils]: 91: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,398 INFO L273 TraceCheckUtils]: 92: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,399 INFO L273 TraceCheckUtils]: 93: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,399 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2955#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,400 INFO L273 TraceCheckUtils]: 95: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,400 INFO L256 TraceCheckUtils]: 96: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {118663#true} is VALID [2018-11-19 18:33:03,400 INFO L273 TraceCheckUtils]: 97: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,401 INFO L273 TraceCheckUtils]: 98: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,401 INFO L273 TraceCheckUtils]: 99: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,402 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2957#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,403 INFO L273 TraceCheckUtils]: 101: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,403 INFO L256 TraceCheckUtils]: 102: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {118663#true} is VALID [2018-11-19 18:33:03,403 INFO L273 TraceCheckUtils]: 103: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,403 INFO L273 TraceCheckUtils]: 104: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,404 INFO L273 TraceCheckUtils]: 105: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,404 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2959#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,405 INFO L273 TraceCheckUtils]: 107: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,405 INFO L256 TraceCheckUtils]: 108: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {118663#true} is VALID [2018-11-19 18:33:03,405 INFO L273 TraceCheckUtils]: 109: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,405 INFO L273 TraceCheckUtils]: 110: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,405 INFO L273 TraceCheckUtils]: 111: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,406 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2961#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,406 INFO L273 TraceCheckUtils]: 113: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,406 INFO L256 TraceCheckUtils]: 114: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {118663#true} is VALID [2018-11-19 18:33:03,406 INFO L273 TraceCheckUtils]: 115: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,406 INFO L273 TraceCheckUtils]: 116: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,407 INFO L273 TraceCheckUtils]: 117: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,407 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2963#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,408 INFO L273 TraceCheckUtils]: 119: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,408 INFO L256 TraceCheckUtils]: 120: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {118663#true} is VALID [2018-11-19 18:33:03,408 INFO L273 TraceCheckUtils]: 121: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,408 INFO L273 TraceCheckUtils]: 122: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,409 INFO L273 TraceCheckUtils]: 123: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,409 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2965#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,410 INFO L273 TraceCheckUtils]: 125: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,410 INFO L256 TraceCheckUtils]: 126: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {118663#true} is VALID [2018-11-19 18:33:03,410 INFO L273 TraceCheckUtils]: 127: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,411 INFO L273 TraceCheckUtils]: 128: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,411 INFO L273 TraceCheckUtils]: 129: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,412 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2967#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,413 INFO L273 TraceCheckUtils]: 131: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,413 INFO L256 TraceCheckUtils]: 132: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {118663#true} is VALID [2018-11-19 18:33:03,413 INFO L273 TraceCheckUtils]: 133: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,413 INFO L273 TraceCheckUtils]: 134: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,413 INFO L273 TraceCheckUtils]: 135: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,414 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2969#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,414 INFO L273 TraceCheckUtils]: 137: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,414 INFO L256 TraceCheckUtils]: 138: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {118663#true} is VALID [2018-11-19 18:33:03,414 INFO L273 TraceCheckUtils]: 139: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,414 INFO L273 TraceCheckUtils]: 140: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,414 INFO L273 TraceCheckUtils]: 141: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,415 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2971#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,416 INFO L273 TraceCheckUtils]: 143: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,416 INFO L256 TraceCheckUtils]: 144: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {118663#true} is VALID [2018-11-19 18:33:03,416 INFO L273 TraceCheckUtils]: 145: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,416 INFO L273 TraceCheckUtils]: 146: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,416 INFO L273 TraceCheckUtils]: 147: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,417 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2973#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,417 INFO L273 TraceCheckUtils]: 149: Hoare triple {118665#(= ~dev_counter~0 0)} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,417 INFO L256 TraceCheckUtils]: 150: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {118663#true} is VALID [2018-11-19 18:33:03,417 INFO L273 TraceCheckUtils]: 151: Hoare triple {118663#true} #t~loopctr974 := 0; {118663#true} is VALID [2018-11-19 18:33:03,417 INFO L273 TraceCheckUtils]: 152: Hoare triple {118663#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {118663#true} is VALID [2018-11-19 18:33:03,417 INFO L273 TraceCheckUtils]: 153: Hoare triple {118663#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {118663#true} is VALID [2018-11-19 18:33:03,418 INFO L273 TraceCheckUtils]: 154: Hoare triple {118663#true} assume !(#t~loopctr974 < #amount); {118663#true} is VALID [2018-11-19 18:33:03,418 INFO L273 TraceCheckUtils]: 155: Hoare triple {118663#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {118663#true} is VALID [2018-11-19 18:33:03,418 INFO L268 TraceCheckUtils]: 156: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #2975#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,419 INFO L273 TraceCheckUtils]: 157: Hoare triple {118665#(= ~dev_counter~0 0)} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,422 INFO L273 TraceCheckUtils]: 158: Hoare triple {118665#(= ~dev_counter~0 0)} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,422 INFO L273 TraceCheckUtils]: 159: Hoare triple {118665#(= ~dev_counter~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,422 INFO L273 TraceCheckUtils]: 160: Hoare triple {118665#(= ~dev_counter~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,423 INFO L273 TraceCheckUtils]: 161: Hoare triple {118665#(= ~dev_counter~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,437 INFO L273 TraceCheckUtils]: 162: Hoare triple {118665#(= ~dev_counter~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,438 INFO L273 TraceCheckUtils]: 163: Hoare triple {118665#(= ~dev_counter~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,438 INFO L273 TraceCheckUtils]: 164: Hoare triple {118665#(= ~dev_counter~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,438 INFO L273 TraceCheckUtils]: 165: Hoare triple {118665#(= ~dev_counter~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,439 INFO L273 TraceCheckUtils]: 166: Hoare triple {118665#(= ~dev_counter~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,439 INFO L273 TraceCheckUtils]: 167: Hoare triple {118665#(= ~dev_counter~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,439 INFO L273 TraceCheckUtils]: 168: Hoare triple {118665#(= ~dev_counter~0 0)} assume #t~switch909; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,439 INFO L273 TraceCheckUtils]: 169: Hoare triple {118665#(= ~dev_counter~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,440 INFO L273 TraceCheckUtils]: 170: Hoare triple {118665#(= ~dev_counter~0 0)} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,440 INFO L273 TraceCheckUtils]: 171: Hoare triple {118665#(= ~dev_counter~0 0)} assume #t~switch947; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,440 INFO L273 TraceCheckUtils]: 172: Hoare triple {118665#(= ~dev_counter~0 0)} assume 1 == ~ldv_state_variable_0~0; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,441 INFO L256 TraceCheckUtils]: 173: Hoare triple {118665#(= ~dev_counter~0 0)} call #t~ret948 := ims_pcu_driver_init(); {118663#true} is VALID [2018-11-19 18:33:03,441 INFO L273 TraceCheckUtils]: 174: Hoare triple {118663#true} havoc ~tmp~46; {118663#true} is VALID [2018-11-19 18:33:03,441 INFO L256 TraceCheckUtils]: 175: Hoare triple {118663#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {118663#true} is VALID [2018-11-19 18:33:03,441 INFO L273 TraceCheckUtils]: 176: Hoare triple {118663#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {118663#true} is VALID [2018-11-19 18:33:03,441 INFO L256 TraceCheckUtils]: 177: Hoare triple {118663#true} call ldv_usb_driver_1(); {118663#true} is VALID [2018-11-19 18:33:03,441 INFO L273 TraceCheckUtils]: 178: Hoare triple {118663#true} havoc ~tmp~53.base, ~tmp~53.offset; {118663#true} is VALID [2018-11-19 18:33:03,441 INFO L256 TraceCheckUtils]: 179: Hoare triple {118663#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {118663#true} is VALID [2018-11-19 18:33:03,441 INFO L273 TraceCheckUtils]: 180: Hoare triple {118663#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {118663#true} is VALID [2018-11-19 18:33:03,442 INFO L273 TraceCheckUtils]: 181: Hoare triple {118663#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {118663#true} is VALID [2018-11-19 18:33:03,442 INFO L273 TraceCheckUtils]: 182: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,442 INFO L268 TraceCheckUtils]: 183: Hoare quadruple {118663#true} {118663#true} #2613#return; {118663#true} is VALID [2018-11-19 18:33:03,442 INFO L273 TraceCheckUtils]: 184: Hoare triple {118663#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {118663#true} is VALID [2018-11-19 18:33:03,442 INFO L273 TraceCheckUtils]: 185: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,443 INFO L268 TraceCheckUtils]: 186: Hoare quadruple {118663#true} {118663#true} #2537#return; {118663#true} is VALID [2018-11-19 18:33:03,443 INFO L273 TraceCheckUtils]: 187: Hoare triple {118663#true} #res := ~ldv_func_res~0; {118663#true} is VALID [2018-11-19 18:33:03,443 INFO L273 TraceCheckUtils]: 188: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,443 INFO L268 TraceCheckUtils]: 189: Hoare quadruple {118663#true} {118663#true} #2777#return; {118663#true} is VALID [2018-11-19 18:33:03,443 INFO L273 TraceCheckUtils]: 190: Hoare triple {118663#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {118663#true} is VALID [2018-11-19 18:33:03,443 INFO L273 TraceCheckUtils]: 191: Hoare triple {118663#true} assume true; {118663#true} is VALID [2018-11-19 18:33:03,444 INFO L268 TraceCheckUtils]: 192: Hoare quadruple {118663#true} {118665#(= ~dev_counter~0 0)} #3035#return; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,444 INFO L273 TraceCheckUtils]: 193: Hoare triple {118665#(= ~dev_counter~0 0)} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,444 INFO L273 TraceCheckUtils]: 194: Hoare triple {118665#(= ~dev_counter~0 0)} assume !(0 == ~ldv_retval_4~0); {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,444 INFO L273 TraceCheckUtils]: 195: Hoare triple {118665#(= ~dev_counter~0 0)} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,445 INFO L256 TraceCheckUtils]: 196: Hoare triple {118665#(= ~dev_counter~0 0)} call ldv_check_final_state(); {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,445 INFO L273 TraceCheckUtils]: 197: Hoare triple {118665#(= ~dev_counter~0 0)} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,445 INFO L273 TraceCheckUtils]: 198: Hoare triple {118665#(= ~dev_counter~0 0)} assume 0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616; {118665#(= ~dev_counter~0 0)} is VALID [2018-11-19 18:33:03,446 INFO L273 TraceCheckUtils]: 199: Hoare triple {118665#(= ~dev_counter~0 0)} assume !(0 == ~dev_counter~0); {118664#false} is VALID [2018-11-19 18:33:03,446 INFO L256 TraceCheckUtils]: 200: Hoare triple {118664#false} call ldv_error(); {118664#false} is VALID [2018-11-19 18:33:03,446 INFO L273 TraceCheckUtils]: 201: Hoare triple {118664#false} assume !false; {118664#false} is VALID [2018-11-19 18:33:03,465 INFO L134 CoverageAnalysis]: Checked inductivity of 1203 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1203 trivial. 0 not checked. [2018-11-19 18:33:03,466 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:33:03,466 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 18:33:03,466 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 202 [2018-11-19 18:33:03,467 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:33:03,467 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 18:33:03,748 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 129 edges. 129 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:33:03,749 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 18:33:03,749 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 18:33:03,749 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:33:03,749 INFO L87 Difference]: Start difference. First operand 4700 states and 6333 transitions. Second operand 3 states. [2018-11-19 18:33:20,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:33:20,050 INFO L93 Difference]: Finished difference Result 4702 states and 6334 transitions. [2018-11-19 18:33:20,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 18:33:20,051 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 202 [2018-11-19 18:33:20,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:33:20,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:33:20,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1679 transitions. [2018-11-19 18:33:20,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:33:20,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1679 transitions. [2018-11-19 18:33:20,111 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 1679 transitions. [2018-11-19 18:33:21,704 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 1679 edges. 1679 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:33:22,988 INFO L225 Difference]: With dead ends: 4702 [2018-11-19 18:33:22,988 INFO L226 Difference]: Without dead ends: 4699 [2018-11-19 18:33:22,990 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:33:22,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4699 states. [2018-11-19 18:33:37,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4699 to 4699. [2018-11-19 18:33:37,751 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:33:37,751 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4699 states. Second operand 4699 states. [2018-11-19 18:33:37,751 INFO L74 IsIncluded]: Start isIncluded. First operand 4699 states. Second operand 4699 states. [2018-11-19 18:33:37,751 INFO L87 Difference]: Start difference. First operand 4699 states. Second operand 4699 states. [2018-11-19 18:33:38,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:33:38,614 INFO L93 Difference]: Finished difference Result 4699 states and 6331 transitions. [2018-11-19 18:33:38,614 INFO L276 IsEmpty]: Start isEmpty. Operand 4699 states and 6331 transitions. [2018-11-19 18:33:38,621 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:33:38,621 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:33:38,621 INFO L74 IsIncluded]: Start isIncluded. First operand 4699 states. Second operand 4699 states. [2018-11-19 18:33:38,621 INFO L87 Difference]: Start difference. First operand 4699 states. Second operand 4699 states. [2018-11-19 18:33:39,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:33:39,496 INFO L93 Difference]: Finished difference Result 4699 states and 6331 transitions. [2018-11-19 18:33:39,496 INFO L276 IsEmpty]: Start isEmpty. Operand 4699 states and 6331 transitions. [2018-11-19 18:33:39,503 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:33:39,503 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:33:39,503 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:33:39,504 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:33:39,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4699 states. [2018-11-19 18:33:40,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4699 states to 4699 states and 6331 transitions. [2018-11-19 18:33:40,628 INFO L78 Accepts]: Start accepts. Automaton has 4699 states and 6331 transitions. Word has length 202 [2018-11-19 18:33:40,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:33:40,628 INFO L480 AbstractCegarLoop]: Abstraction has 4699 states and 6331 transitions. [2018-11-19 18:33:40,628 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 18:33:40,628 INFO L276 IsEmpty]: Start isEmpty. Operand 4699 states and 6331 transitions. [2018-11-19 18:33:40,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2018-11-19 18:33:40,630 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:33:40,630 INFO L384 BasicCegarLoop]: trace histogram [25, 25, 25, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:33:40,630 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:33:40,630 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:33:40,631 INFO L82 PathProgramCache]: Analyzing trace with hash 338518672, now seen corresponding path program 1 times [2018-11-19 18:33:40,631 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:33:40,631 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:33:40,633 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:33:40,633 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:33:40,633 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:33:40,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:33:40,983 INFO L256 TraceCheckUtils]: 0: Hoare triple {140731#true} call ULTIMATE.init(); {140731#true} is VALID [2018-11-19 18:33:40,984 INFO L273 TraceCheckUtils]: 1: Hoare triple {140731#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:40,985 INFO L273 TraceCheckUtils]: 2: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume true; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:40,986 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {140733#(= ~INTERF_STATE~0 0)} {140731#true} #3175#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:40,986 INFO L256 TraceCheckUtils]: 4: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret973 := main(); {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:40,990 INFO L273 TraceCheckUtils]: 5: Hoare triple {140733#(= ~INTERF_STATE~0 0)} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:40,990 INFO L256 TraceCheckUtils]: 6: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {140731#true} is VALID [2018-11-19 18:33:40,990 INFO L273 TraceCheckUtils]: 7: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:40,991 INFO L273 TraceCheckUtils]: 8: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:40,991 INFO L273 TraceCheckUtils]: 9: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:40,992 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2927#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:40,992 INFO L273 TraceCheckUtils]: 11: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:40,992 INFO L256 TraceCheckUtils]: 12: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {140731#true} is VALID [2018-11-19 18:33:40,992 INFO L273 TraceCheckUtils]: 13: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:40,993 INFO L273 TraceCheckUtils]: 14: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:40,993 INFO L273 TraceCheckUtils]: 15: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:40,993 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2929#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:40,994 INFO L273 TraceCheckUtils]: 17: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:40,994 INFO L256 TraceCheckUtils]: 18: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {140731#true} is VALID [2018-11-19 18:33:40,994 INFO L273 TraceCheckUtils]: 19: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:40,994 INFO L273 TraceCheckUtils]: 20: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:40,995 INFO L273 TraceCheckUtils]: 21: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:40,995 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2931#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:40,996 INFO L273 TraceCheckUtils]: 23: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:40,996 INFO L256 TraceCheckUtils]: 24: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {140731#true} is VALID [2018-11-19 18:33:40,996 INFO L273 TraceCheckUtils]: 25: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:40,996 INFO L273 TraceCheckUtils]: 26: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:40,996 INFO L273 TraceCheckUtils]: 27: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,000 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2933#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,004 INFO L273 TraceCheckUtils]: 29: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,004 INFO L256 TraceCheckUtils]: 30: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {140731#true} is VALID [2018-11-19 18:33:41,004 INFO L273 TraceCheckUtils]: 31: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,004 INFO L273 TraceCheckUtils]: 32: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,005 INFO L273 TraceCheckUtils]: 33: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,005 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2935#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,006 INFO L273 TraceCheckUtils]: 35: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,006 INFO L256 TraceCheckUtils]: 36: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {140731#true} is VALID [2018-11-19 18:33:41,006 INFO L273 TraceCheckUtils]: 37: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,006 INFO L273 TraceCheckUtils]: 38: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,006 INFO L273 TraceCheckUtils]: 39: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,007 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2937#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,008 INFO L273 TraceCheckUtils]: 41: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,008 INFO L256 TraceCheckUtils]: 42: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {140731#true} is VALID [2018-11-19 18:33:41,008 INFO L273 TraceCheckUtils]: 43: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,008 INFO L273 TraceCheckUtils]: 44: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,008 INFO L273 TraceCheckUtils]: 45: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,009 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2939#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,010 INFO L273 TraceCheckUtils]: 47: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,010 INFO L256 TraceCheckUtils]: 48: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {140731#true} is VALID [2018-11-19 18:33:41,010 INFO L273 TraceCheckUtils]: 49: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,010 INFO L273 TraceCheckUtils]: 50: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,011 INFO L273 TraceCheckUtils]: 51: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,011 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2941#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,012 INFO L273 TraceCheckUtils]: 53: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,012 INFO L256 TraceCheckUtils]: 54: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {140731#true} is VALID [2018-11-19 18:33:41,012 INFO L273 TraceCheckUtils]: 55: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,012 INFO L273 TraceCheckUtils]: 56: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,013 INFO L273 TraceCheckUtils]: 57: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,013 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2943#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,014 INFO L273 TraceCheckUtils]: 59: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,014 INFO L256 TraceCheckUtils]: 60: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {140731#true} is VALID [2018-11-19 18:33:41,014 INFO L273 TraceCheckUtils]: 61: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,015 INFO L273 TraceCheckUtils]: 62: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,015 INFO L273 TraceCheckUtils]: 63: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,016 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2945#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,016 INFO L273 TraceCheckUtils]: 65: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,016 INFO L256 TraceCheckUtils]: 66: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {140731#true} is VALID [2018-11-19 18:33:41,016 INFO L273 TraceCheckUtils]: 67: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,017 INFO L273 TraceCheckUtils]: 68: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,017 INFO L273 TraceCheckUtils]: 69: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,018 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2947#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,018 INFO L273 TraceCheckUtils]: 71: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,018 INFO L256 TraceCheckUtils]: 72: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {140731#true} is VALID [2018-11-19 18:33:41,018 INFO L273 TraceCheckUtils]: 73: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,019 INFO L273 TraceCheckUtils]: 74: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,019 INFO L273 TraceCheckUtils]: 75: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,019 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2949#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,020 INFO L273 TraceCheckUtils]: 77: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,020 INFO L256 TraceCheckUtils]: 78: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {140731#true} is VALID [2018-11-19 18:33:41,020 INFO L273 TraceCheckUtils]: 79: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,020 INFO L273 TraceCheckUtils]: 80: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,021 INFO L273 TraceCheckUtils]: 81: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,021 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2951#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,022 INFO L273 TraceCheckUtils]: 83: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,022 INFO L256 TraceCheckUtils]: 84: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {140731#true} is VALID [2018-11-19 18:33:41,022 INFO L273 TraceCheckUtils]: 85: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,022 INFO L273 TraceCheckUtils]: 86: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,022 INFO L273 TraceCheckUtils]: 87: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,023 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2953#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,024 INFO L273 TraceCheckUtils]: 89: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,024 INFO L256 TraceCheckUtils]: 90: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {140731#true} is VALID [2018-11-19 18:33:41,024 INFO L273 TraceCheckUtils]: 91: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,024 INFO L273 TraceCheckUtils]: 92: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,024 INFO L273 TraceCheckUtils]: 93: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,025 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2955#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,025 INFO L273 TraceCheckUtils]: 95: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,026 INFO L256 TraceCheckUtils]: 96: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {140731#true} is VALID [2018-11-19 18:33:41,026 INFO L273 TraceCheckUtils]: 97: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,026 INFO L273 TraceCheckUtils]: 98: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,026 INFO L273 TraceCheckUtils]: 99: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,027 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2957#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,027 INFO L273 TraceCheckUtils]: 101: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,027 INFO L256 TraceCheckUtils]: 102: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {140731#true} is VALID [2018-11-19 18:33:41,028 INFO L273 TraceCheckUtils]: 103: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,028 INFO L273 TraceCheckUtils]: 104: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,028 INFO L273 TraceCheckUtils]: 105: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,029 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2959#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,029 INFO L273 TraceCheckUtils]: 107: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,029 INFO L256 TraceCheckUtils]: 108: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {140731#true} is VALID [2018-11-19 18:33:41,029 INFO L273 TraceCheckUtils]: 109: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,030 INFO L273 TraceCheckUtils]: 110: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,030 INFO L273 TraceCheckUtils]: 111: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,030 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2961#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,031 INFO L273 TraceCheckUtils]: 113: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,031 INFO L256 TraceCheckUtils]: 114: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {140731#true} is VALID [2018-11-19 18:33:41,031 INFO L273 TraceCheckUtils]: 115: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,031 INFO L273 TraceCheckUtils]: 116: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,032 INFO L273 TraceCheckUtils]: 117: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,032 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2963#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,033 INFO L273 TraceCheckUtils]: 119: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,033 INFO L256 TraceCheckUtils]: 120: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {140731#true} is VALID [2018-11-19 18:33:41,033 INFO L273 TraceCheckUtils]: 121: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,033 INFO L273 TraceCheckUtils]: 122: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,033 INFO L273 TraceCheckUtils]: 123: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,034 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2965#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,035 INFO L273 TraceCheckUtils]: 125: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,035 INFO L256 TraceCheckUtils]: 126: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {140731#true} is VALID [2018-11-19 18:33:41,035 INFO L273 TraceCheckUtils]: 127: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,035 INFO L273 TraceCheckUtils]: 128: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,035 INFO L273 TraceCheckUtils]: 129: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,036 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2967#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,037 INFO L273 TraceCheckUtils]: 131: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,037 INFO L256 TraceCheckUtils]: 132: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {140731#true} is VALID [2018-11-19 18:33:41,037 INFO L273 TraceCheckUtils]: 133: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,037 INFO L273 TraceCheckUtils]: 134: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,037 INFO L273 TraceCheckUtils]: 135: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,038 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2969#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,038 INFO L273 TraceCheckUtils]: 137: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,039 INFO L256 TraceCheckUtils]: 138: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {140731#true} is VALID [2018-11-19 18:33:41,039 INFO L273 TraceCheckUtils]: 139: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,039 INFO L273 TraceCheckUtils]: 140: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,039 INFO L273 TraceCheckUtils]: 141: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,040 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2971#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,040 INFO L273 TraceCheckUtils]: 143: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,040 INFO L256 TraceCheckUtils]: 144: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {140731#true} is VALID [2018-11-19 18:33:41,041 INFO L273 TraceCheckUtils]: 145: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,041 INFO L273 TraceCheckUtils]: 146: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,041 INFO L273 TraceCheckUtils]: 147: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,042 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2973#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,042 INFO L273 TraceCheckUtils]: 149: Hoare triple {140733#(= ~INTERF_STATE~0 0)} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,042 INFO L256 TraceCheckUtils]: 150: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {140731#true} is VALID [2018-11-19 18:33:41,042 INFO L273 TraceCheckUtils]: 151: Hoare triple {140731#true} #t~loopctr974 := 0; {140731#true} is VALID [2018-11-19 18:33:41,043 INFO L273 TraceCheckUtils]: 152: Hoare triple {140731#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {140731#true} is VALID [2018-11-19 18:33:41,043 INFO L273 TraceCheckUtils]: 153: Hoare triple {140731#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {140731#true} is VALID [2018-11-19 18:33:41,043 INFO L273 TraceCheckUtils]: 154: Hoare triple {140731#true} assume !(#t~loopctr974 < #amount); {140731#true} is VALID [2018-11-19 18:33:41,043 INFO L273 TraceCheckUtils]: 155: Hoare triple {140731#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {140731#true} is VALID [2018-11-19 18:33:41,045 INFO L268 TraceCheckUtils]: 156: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #2975#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,046 INFO L273 TraceCheckUtils]: 157: Hoare triple {140733#(= ~INTERF_STATE~0 0)} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,047 INFO L273 TraceCheckUtils]: 158: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,047 INFO L273 TraceCheckUtils]: 159: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,047 INFO L273 TraceCheckUtils]: 160: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,048 INFO L273 TraceCheckUtils]: 161: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,048 INFO L273 TraceCheckUtils]: 162: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,049 INFO L273 TraceCheckUtils]: 163: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,049 INFO L273 TraceCheckUtils]: 164: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,050 INFO L273 TraceCheckUtils]: 165: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,050 INFO L273 TraceCheckUtils]: 166: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,051 INFO L273 TraceCheckUtils]: 167: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,051 INFO L273 TraceCheckUtils]: 168: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume #t~switch909; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,052 INFO L273 TraceCheckUtils]: 169: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,052 INFO L273 TraceCheckUtils]: 170: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,053 INFO L273 TraceCheckUtils]: 171: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume #t~switch947; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,053 INFO L273 TraceCheckUtils]: 172: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume 1 == ~ldv_state_variable_0~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,053 INFO L256 TraceCheckUtils]: 173: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call #t~ret948 := ims_pcu_driver_init(); {140731#true} is VALID [2018-11-19 18:33:41,053 INFO L273 TraceCheckUtils]: 174: Hoare triple {140731#true} havoc ~tmp~46; {140731#true} is VALID [2018-11-19 18:33:41,054 INFO L256 TraceCheckUtils]: 175: Hoare triple {140731#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {140731#true} is VALID [2018-11-19 18:33:41,054 INFO L273 TraceCheckUtils]: 176: Hoare triple {140731#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {140731#true} is VALID [2018-11-19 18:33:41,054 INFO L256 TraceCheckUtils]: 177: Hoare triple {140731#true} call ldv_usb_driver_1(); {140731#true} is VALID [2018-11-19 18:33:41,054 INFO L273 TraceCheckUtils]: 178: Hoare triple {140731#true} havoc ~tmp~53.base, ~tmp~53.offset; {140731#true} is VALID [2018-11-19 18:33:41,054 INFO L256 TraceCheckUtils]: 179: Hoare triple {140731#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {140731#true} is VALID [2018-11-19 18:33:41,054 INFO L273 TraceCheckUtils]: 180: Hoare triple {140731#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {140731#true} is VALID [2018-11-19 18:33:41,055 INFO L273 TraceCheckUtils]: 181: Hoare triple {140731#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {140731#true} is VALID [2018-11-19 18:33:41,055 INFO L273 TraceCheckUtils]: 182: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,055 INFO L268 TraceCheckUtils]: 183: Hoare quadruple {140731#true} {140731#true} #2613#return; {140731#true} is VALID [2018-11-19 18:33:41,055 INFO L273 TraceCheckUtils]: 184: Hoare triple {140731#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {140731#true} is VALID [2018-11-19 18:33:41,055 INFO L273 TraceCheckUtils]: 185: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,055 INFO L268 TraceCheckUtils]: 186: Hoare quadruple {140731#true} {140731#true} #2537#return; {140731#true} is VALID [2018-11-19 18:33:41,056 INFO L273 TraceCheckUtils]: 187: Hoare triple {140731#true} #res := ~ldv_func_res~0; {140731#true} is VALID [2018-11-19 18:33:41,056 INFO L273 TraceCheckUtils]: 188: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,056 INFO L268 TraceCheckUtils]: 189: Hoare quadruple {140731#true} {140731#true} #2777#return; {140731#true} is VALID [2018-11-19 18:33:41,056 INFO L273 TraceCheckUtils]: 190: Hoare triple {140731#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {140731#true} is VALID [2018-11-19 18:33:41,056 INFO L273 TraceCheckUtils]: 191: Hoare triple {140731#true} assume true; {140731#true} is VALID [2018-11-19 18:33:41,057 INFO L268 TraceCheckUtils]: 192: Hoare quadruple {140731#true} {140733#(= ~INTERF_STATE~0 0)} #3035#return; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,057 INFO L273 TraceCheckUtils]: 193: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,058 INFO L273 TraceCheckUtils]: 194: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume !(0 == ~ldv_retval_4~0); {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,058 INFO L273 TraceCheckUtils]: 195: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,059 INFO L256 TraceCheckUtils]: 196: Hoare triple {140733#(= ~INTERF_STATE~0 0)} call ldv_check_final_state(); {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,059 INFO L273 TraceCheckUtils]: 197: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,059 INFO L273 TraceCheckUtils]: 198: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume 0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,060 INFO L273 TraceCheckUtils]: 199: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume 0 == ~dev_counter~0; {140733#(= ~INTERF_STATE~0 0)} is VALID [2018-11-19 18:33:41,060 INFO L273 TraceCheckUtils]: 200: Hoare triple {140733#(= ~INTERF_STATE~0 0)} assume !(0 == ~INTERF_STATE~0); {140732#false} is VALID [2018-11-19 18:33:41,061 INFO L256 TraceCheckUtils]: 201: Hoare triple {140732#false} call ldv_error(); {140732#false} is VALID [2018-11-19 18:33:41,061 INFO L273 TraceCheckUtils]: 202: Hoare triple {140732#false} assume !false; {140732#false} is VALID [2018-11-19 18:33:41,088 INFO L134 CoverageAnalysis]: Checked inductivity of 1203 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1203 trivial. 0 not checked. [2018-11-19 18:33:41,088 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:33:41,088 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 18:33:41,089 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 203 [2018-11-19 18:33:41,089 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:33:41,090 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 18:33:41,347 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 130 edges. 130 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:33:41,347 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 18:33:41,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 18:33:41,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:33:41,347 INFO L87 Difference]: Start difference. First operand 4699 states and 6331 transitions. Second operand 3 states. [2018-11-19 18:34:05,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:34:05,395 INFO L93 Difference]: Finished difference Result 4701 states and 6332 transitions. [2018-11-19 18:34:05,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 18:34:05,395 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 203 [2018-11-19 18:34:05,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:34:05,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:34:05,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1677 transitions. [2018-11-19 18:34:05,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:34:05,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1677 transitions. [2018-11-19 18:34:05,455 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 1677 transitions. [2018-11-19 18:34:07,060 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 1677 edges. 1677 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:34:08,109 INFO L225 Difference]: With dead ends: 4701 [2018-11-19 18:34:08,109 INFO L226 Difference]: Without dead ends: 4698 [2018-11-19 18:34:08,110 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:34:08,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4698 states. [2018-11-19 18:34:27,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4698 to 4698. [2018-11-19 18:34:27,855 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:34:27,855 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4698 states. Second operand 4698 states. [2018-11-19 18:34:27,855 INFO L74 IsIncluded]: Start isIncluded. First operand 4698 states. Second operand 4698 states. [2018-11-19 18:34:27,855 INFO L87 Difference]: Start difference. First operand 4698 states. Second operand 4698 states. [2018-11-19 18:34:28,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:34:28,716 INFO L93 Difference]: Finished difference Result 4698 states and 6329 transitions. [2018-11-19 18:34:28,716 INFO L276 IsEmpty]: Start isEmpty. Operand 4698 states and 6329 transitions. [2018-11-19 18:34:28,723 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:34:28,723 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:34:28,723 INFO L74 IsIncluded]: Start isIncluded. First operand 4698 states. Second operand 4698 states. [2018-11-19 18:34:28,723 INFO L87 Difference]: Start difference. First operand 4698 states. Second operand 4698 states. [2018-11-19 18:34:29,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:34:29,591 INFO L93 Difference]: Finished difference Result 4698 states and 6329 transitions. [2018-11-19 18:34:29,591 INFO L276 IsEmpty]: Start isEmpty. Operand 4698 states and 6329 transitions. [2018-11-19 18:34:29,598 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:34:29,599 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:34:29,599 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:34:29,599 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:34:29,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4698 states. [2018-11-19 18:34:30,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4698 states to 4698 states and 6329 transitions. [2018-11-19 18:34:30,800 INFO L78 Accepts]: Start accepts. Automaton has 4698 states and 6329 transitions. Word has length 203 [2018-11-19 18:34:30,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:34:30,800 INFO L480 AbstractCegarLoop]: Abstraction has 4698 states and 6329 transitions. [2018-11-19 18:34:30,800 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 18:34:30,800 INFO L276 IsEmpty]: Start isEmpty. Operand 4698 states and 6329 transitions. [2018-11-19 18:34:30,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2018-11-19 18:34:30,802 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:34:30,802 INFO L384 BasicCegarLoop]: trace histogram [25, 25, 25, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:34:30,802 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:34:30,802 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:34:30,803 INFO L82 PathProgramCache]: Analyzing trace with hash 1903543985, now seen corresponding path program 1 times [2018-11-19 18:34:30,803 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:34:30,803 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:34:30,805 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:34:30,805 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:34:30,805 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:34:30,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:34:31,177 INFO L256 TraceCheckUtils]: 0: Hoare triple {162793#true} call ULTIMATE.init(); {162793#true} is VALID [2018-11-19 18:34:31,178 INFO L273 TraceCheckUtils]: 1: Hoare triple {162793#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,179 INFO L273 TraceCheckUtils]: 2: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume true; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,179 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {162795#(= ~SERIAL_STATE~0 0)} {162793#true} #3175#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,181 INFO L256 TraceCheckUtils]: 4: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret973 := main(); {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,181 INFO L273 TraceCheckUtils]: 5: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,181 INFO L256 TraceCheckUtils]: 6: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {162793#true} is VALID [2018-11-19 18:34:31,181 INFO L273 TraceCheckUtils]: 7: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,182 INFO L273 TraceCheckUtils]: 8: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,182 INFO L273 TraceCheckUtils]: 9: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,185 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2927#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,185 INFO L273 TraceCheckUtils]: 11: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,185 INFO L256 TraceCheckUtils]: 12: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {162793#true} is VALID [2018-11-19 18:34:31,186 INFO L273 TraceCheckUtils]: 13: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,186 INFO L273 TraceCheckUtils]: 14: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,186 INFO L273 TraceCheckUtils]: 15: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,187 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2929#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,187 INFO L273 TraceCheckUtils]: 17: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,187 INFO L256 TraceCheckUtils]: 18: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {162793#true} is VALID [2018-11-19 18:34:31,188 INFO L273 TraceCheckUtils]: 19: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,188 INFO L273 TraceCheckUtils]: 20: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,188 INFO L273 TraceCheckUtils]: 21: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,189 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2931#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,190 INFO L273 TraceCheckUtils]: 23: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,190 INFO L256 TraceCheckUtils]: 24: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {162793#true} is VALID [2018-11-19 18:34:31,190 INFO L273 TraceCheckUtils]: 25: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,190 INFO L273 TraceCheckUtils]: 26: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,190 INFO L273 TraceCheckUtils]: 27: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,194 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2933#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,194 INFO L273 TraceCheckUtils]: 29: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,194 INFO L256 TraceCheckUtils]: 30: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {162793#true} is VALID [2018-11-19 18:34:31,195 INFO L273 TraceCheckUtils]: 31: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,195 INFO L273 TraceCheckUtils]: 32: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,195 INFO L273 TraceCheckUtils]: 33: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,196 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2935#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,196 INFO L273 TraceCheckUtils]: 35: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,196 INFO L256 TraceCheckUtils]: 36: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {162793#true} is VALID [2018-11-19 18:34:31,197 INFO L273 TraceCheckUtils]: 37: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,197 INFO L273 TraceCheckUtils]: 38: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,197 INFO L273 TraceCheckUtils]: 39: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,198 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2937#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,199 INFO L273 TraceCheckUtils]: 41: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,199 INFO L256 TraceCheckUtils]: 42: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {162793#true} is VALID [2018-11-19 18:34:31,199 INFO L273 TraceCheckUtils]: 43: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,199 INFO L273 TraceCheckUtils]: 44: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,199 INFO L273 TraceCheckUtils]: 45: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,200 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2939#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,203 INFO L273 TraceCheckUtils]: 47: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,203 INFO L256 TraceCheckUtils]: 48: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {162793#true} is VALID [2018-11-19 18:34:31,203 INFO L273 TraceCheckUtils]: 49: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,203 INFO L273 TraceCheckUtils]: 50: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,204 INFO L273 TraceCheckUtils]: 51: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,204 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2941#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,205 INFO L273 TraceCheckUtils]: 53: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,205 INFO L256 TraceCheckUtils]: 54: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {162793#true} is VALID [2018-11-19 18:34:31,205 INFO L273 TraceCheckUtils]: 55: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,205 INFO L273 TraceCheckUtils]: 56: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,206 INFO L273 TraceCheckUtils]: 57: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,206 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2943#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,207 INFO L273 TraceCheckUtils]: 59: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,207 INFO L256 TraceCheckUtils]: 60: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {162793#true} is VALID [2018-11-19 18:34:31,207 INFO L273 TraceCheckUtils]: 61: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,207 INFO L273 TraceCheckUtils]: 62: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,208 INFO L273 TraceCheckUtils]: 63: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,208 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2945#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,209 INFO L273 TraceCheckUtils]: 65: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,209 INFO L256 TraceCheckUtils]: 66: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {162793#true} is VALID [2018-11-19 18:34:31,209 INFO L273 TraceCheckUtils]: 67: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,209 INFO L273 TraceCheckUtils]: 68: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,210 INFO L273 TraceCheckUtils]: 69: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,210 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2947#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,211 INFO L273 TraceCheckUtils]: 71: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,211 INFO L256 TraceCheckUtils]: 72: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {162793#true} is VALID [2018-11-19 18:34:31,211 INFO L273 TraceCheckUtils]: 73: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,211 INFO L273 TraceCheckUtils]: 74: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,212 INFO L273 TraceCheckUtils]: 75: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,212 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2949#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,213 INFO L273 TraceCheckUtils]: 77: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,213 INFO L256 TraceCheckUtils]: 78: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {162793#true} is VALID [2018-11-19 18:34:31,213 INFO L273 TraceCheckUtils]: 79: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,213 INFO L273 TraceCheckUtils]: 80: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,214 INFO L273 TraceCheckUtils]: 81: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,214 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2951#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,215 INFO L273 TraceCheckUtils]: 83: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,215 INFO L256 TraceCheckUtils]: 84: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {162793#true} is VALID [2018-11-19 18:34:31,215 INFO L273 TraceCheckUtils]: 85: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,215 INFO L273 TraceCheckUtils]: 86: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,216 INFO L273 TraceCheckUtils]: 87: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,216 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2953#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,217 INFO L273 TraceCheckUtils]: 89: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,217 INFO L256 TraceCheckUtils]: 90: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {162793#true} is VALID [2018-11-19 18:34:31,217 INFO L273 TraceCheckUtils]: 91: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,218 INFO L273 TraceCheckUtils]: 92: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,218 INFO L273 TraceCheckUtils]: 93: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,218 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2955#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,219 INFO L273 TraceCheckUtils]: 95: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,219 INFO L256 TraceCheckUtils]: 96: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {162793#true} is VALID [2018-11-19 18:34:31,219 INFO L273 TraceCheckUtils]: 97: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,220 INFO L273 TraceCheckUtils]: 98: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,220 INFO L273 TraceCheckUtils]: 99: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,220 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2957#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,221 INFO L273 TraceCheckUtils]: 101: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,221 INFO L256 TraceCheckUtils]: 102: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {162793#true} is VALID [2018-11-19 18:34:31,221 INFO L273 TraceCheckUtils]: 103: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,222 INFO L273 TraceCheckUtils]: 104: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,222 INFO L273 TraceCheckUtils]: 105: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,222 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2959#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,224 INFO L273 TraceCheckUtils]: 107: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,224 INFO L256 TraceCheckUtils]: 108: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {162793#true} is VALID [2018-11-19 18:34:31,224 INFO L273 TraceCheckUtils]: 109: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,224 INFO L273 TraceCheckUtils]: 110: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,225 INFO L273 TraceCheckUtils]: 111: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,225 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2961#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,226 INFO L273 TraceCheckUtils]: 113: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,226 INFO L256 TraceCheckUtils]: 114: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {162793#true} is VALID [2018-11-19 18:34:31,226 INFO L273 TraceCheckUtils]: 115: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,226 INFO L273 TraceCheckUtils]: 116: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,227 INFO L273 TraceCheckUtils]: 117: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,227 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2963#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,228 INFO L273 TraceCheckUtils]: 119: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,228 INFO L256 TraceCheckUtils]: 120: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {162793#true} is VALID [2018-11-19 18:34:31,228 INFO L273 TraceCheckUtils]: 121: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,228 INFO L273 TraceCheckUtils]: 122: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,229 INFO L273 TraceCheckUtils]: 123: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,229 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2965#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,230 INFO L273 TraceCheckUtils]: 125: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,230 INFO L256 TraceCheckUtils]: 126: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {162793#true} is VALID [2018-11-19 18:34:31,230 INFO L273 TraceCheckUtils]: 127: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,230 INFO L273 TraceCheckUtils]: 128: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,231 INFO L273 TraceCheckUtils]: 129: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,231 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2967#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,232 INFO L273 TraceCheckUtils]: 131: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,232 INFO L256 TraceCheckUtils]: 132: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {162793#true} is VALID [2018-11-19 18:34:31,232 INFO L273 TraceCheckUtils]: 133: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,232 INFO L273 TraceCheckUtils]: 134: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,233 INFO L273 TraceCheckUtils]: 135: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,233 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2969#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,234 INFO L273 TraceCheckUtils]: 137: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,234 INFO L256 TraceCheckUtils]: 138: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {162793#true} is VALID [2018-11-19 18:34:31,234 INFO L273 TraceCheckUtils]: 139: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,234 INFO L273 TraceCheckUtils]: 140: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,235 INFO L273 TraceCheckUtils]: 141: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,235 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2971#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,236 INFO L273 TraceCheckUtils]: 143: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,236 INFO L256 TraceCheckUtils]: 144: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {162793#true} is VALID [2018-11-19 18:34:31,236 INFO L273 TraceCheckUtils]: 145: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,236 INFO L273 TraceCheckUtils]: 146: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,237 INFO L273 TraceCheckUtils]: 147: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,237 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2973#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,238 INFO L273 TraceCheckUtils]: 149: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,238 INFO L256 TraceCheckUtils]: 150: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {162793#true} is VALID [2018-11-19 18:34:31,238 INFO L273 TraceCheckUtils]: 151: Hoare triple {162793#true} #t~loopctr974 := 0; {162793#true} is VALID [2018-11-19 18:34:31,238 INFO L273 TraceCheckUtils]: 152: Hoare triple {162793#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {162793#true} is VALID [2018-11-19 18:34:31,239 INFO L273 TraceCheckUtils]: 153: Hoare triple {162793#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {162793#true} is VALID [2018-11-19 18:34:31,239 INFO L273 TraceCheckUtils]: 154: Hoare triple {162793#true} assume !(#t~loopctr974 < #amount); {162793#true} is VALID [2018-11-19 18:34:31,239 INFO L273 TraceCheckUtils]: 155: Hoare triple {162793#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {162793#true} is VALID [2018-11-19 18:34:31,240 INFO L268 TraceCheckUtils]: 156: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #2975#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,240 INFO L273 TraceCheckUtils]: 157: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,241 INFO L273 TraceCheckUtils]: 158: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,241 INFO L273 TraceCheckUtils]: 159: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,242 INFO L273 TraceCheckUtils]: 160: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,242 INFO L273 TraceCheckUtils]: 161: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,243 INFO L273 TraceCheckUtils]: 162: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,243 INFO L273 TraceCheckUtils]: 163: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,244 INFO L273 TraceCheckUtils]: 164: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,244 INFO L273 TraceCheckUtils]: 165: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,245 INFO L273 TraceCheckUtils]: 166: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,245 INFO L273 TraceCheckUtils]: 167: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,245 INFO L273 TraceCheckUtils]: 168: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume #t~switch909; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,246 INFO L273 TraceCheckUtils]: 169: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,246 INFO L273 TraceCheckUtils]: 170: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,247 INFO L273 TraceCheckUtils]: 171: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume #t~switch947; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,247 INFO L273 TraceCheckUtils]: 172: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume 1 == ~ldv_state_variable_0~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,248 INFO L256 TraceCheckUtils]: 173: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call #t~ret948 := ims_pcu_driver_init(); {162793#true} is VALID [2018-11-19 18:34:31,248 INFO L273 TraceCheckUtils]: 174: Hoare triple {162793#true} havoc ~tmp~46; {162793#true} is VALID [2018-11-19 18:34:31,248 INFO L256 TraceCheckUtils]: 175: Hoare triple {162793#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {162793#true} is VALID [2018-11-19 18:34:31,248 INFO L273 TraceCheckUtils]: 176: Hoare triple {162793#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {162793#true} is VALID [2018-11-19 18:34:31,248 INFO L256 TraceCheckUtils]: 177: Hoare triple {162793#true} call ldv_usb_driver_1(); {162793#true} is VALID [2018-11-19 18:34:31,248 INFO L273 TraceCheckUtils]: 178: Hoare triple {162793#true} havoc ~tmp~53.base, ~tmp~53.offset; {162793#true} is VALID [2018-11-19 18:34:31,249 INFO L256 TraceCheckUtils]: 179: Hoare triple {162793#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {162793#true} is VALID [2018-11-19 18:34:31,249 INFO L273 TraceCheckUtils]: 180: Hoare triple {162793#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {162793#true} is VALID [2018-11-19 18:34:31,249 INFO L273 TraceCheckUtils]: 181: Hoare triple {162793#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {162793#true} is VALID [2018-11-19 18:34:31,249 INFO L273 TraceCheckUtils]: 182: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,249 INFO L268 TraceCheckUtils]: 183: Hoare quadruple {162793#true} {162793#true} #2613#return; {162793#true} is VALID [2018-11-19 18:34:31,250 INFO L273 TraceCheckUtils]: 184: Hoare triple {162793#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {162793#true} is VALID [2018-11-19 18:34:31,250 INFO L273 TraceCheckUtils]: 185: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,250 INFO L268 TraceCheckUtils]: 186: Hoare quadruple {162793#true} {162793#true} #2537#return; {162793#true} is VALID [2018-11-19 18:34:31,250 INFO L273 TraceCheckUtils]: 187: Hoare triple {162793#true} #res := ~ldv_func_res~0; {162793#true} is VALID [2018-11-19 18:34:31,250 INFO L273 TraceCheckUtils]: 188: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,250 INFO L268 TraceCheckUtils]: 189: Hoare quadruple {162793#true} {162793#true} #2777#return; {162793#true} is VALID [2018-11-19 18:34:31,251 INFO L273 TraceCheckUtils]: 190: Hoare triple {162793#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {162793#true} is VALID [2018-11-19 18:34:31,251 INFO L273 TraceCheckUtils]: 191: Hoare triple {162793#true} assume true; {162793#true} is VALID [2018-11-19 18:34:31,252 INFO L268 TraceCheckUtils]: 192: Hoare quadruple {162793#true} {162795#(= ~SERIAL_STATE~0 0)} #3035#return; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,252 INFO L273 TraceCheckUtils]: 193: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,253 INFO L273 TraceCheckUtils]: 194: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume !(0 == ~ldv_retval_4~0); {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,253 INFO L273 TraceCheckUtils]: 195: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,254 INFO L256 TraceCheckUtils]: 196: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} call ldv_check_final_state(); {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,254 INFO L273 TraceCheckUtils]: 197: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,254 INFO L273 TraceCheckUtils]: 198: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume 0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,255 INFO L273 TraceCheckUtils]: 199: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume 0 == ~dev_counter~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,255 INFO L273 TraceCheckUtils]: 200: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume 0 == ~INTERF_STATE~0; {162795#(= ~SERIAL_STATE~0 0)} is VALID [2018-11-19 18:34:31,256 INFO L273 TraceCheckUtils]: 201: Hoare triple {162795#(= ~SERIAL_STATE~0 0)} assume !(0 == ~SERIAL_STATE~0); {162794#false} is VALID [2018-11-19 18:34:31,256 INFO L256 TraceCheckUtils]: 202: Hoare triple {162794#false} call ldv_error(); {162794#false} is VALID [2018-11-19 18:34:31,256 INFO L273 TraceCheckUtils]: 203: Hoare triple {162794#false} assume !false; {162794#false} is VALID [2018-11-19 18:34:31,288 INFO L134 CoverageAnalysis]: Checked inductivity of 1203 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1203 trivial. 0 not checked. [2018-11-19 18:34:31,288 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:34:31,288 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 18:34:31,289 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 204 [2018-11-19 18:34:31,289 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:34:31,289 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 18:34:31,563 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 131 edges. 131 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:34:31,563 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 18:34:31,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 18:34:31,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:34:31,564 INFO L87 Difference]: Start difference. First operand 4698 states and 6329 transitions. Second operand 3 states. [2018-11-19 18:34:54,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:34:54,245 INFO L93 Difference]: Finished difference Result 4700 states and 6330 transitions. [2018-11-19 18:34:54,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 18:34:54,245 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 204 [2018-11-19 18:34:54,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:34:54,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:34:54,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1675 transitions. [2018-11-19 18:34:54,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:34:54,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1675 transitions. [2018-11-19 18:34:54,306 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 1675 transitions. [2018-11-19 18:34:56,060 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 1675 edges. 1675 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:34:56,974 INFO L225 Difference]: With dead ends: 4700 [2018-11-19 18:34:56,974 INFO L226 Difference]: Without dead ends: 4683 [2018-11-19 18:34:56,975 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:34:56,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4683 states. [2018-11-19 18:35:13,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4683 to 4683. [2018-11-19 18:35:13,781 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:35:13,781 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4683 states. Second operand 4683 states. [2018-11-19 18:35:13,781 INFO L74 IsIncluded]: Start isIncluded. First operand 4683 states. Second operand 4683 states. [2018-11-19 18:35:13,781 INFO L87 Difference]: Start difference. First operand 4683 states. Second operand 4683 states. [2018-11-19 18:35:14,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:35:14,459 INFO L93 Difference]: Finished difference Result 4683 states and 6310 transitions. [2018-11-19 18:35:14,459 INFO L276 IsEmpty]: Start isEmpty. Operand 4683 states and 6310 transitions. [2018-11-19 18:35:14,465 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:35:14,465 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:35:14,465 INFO L74 IsIncluded]: Start isIncluded. First operand 4683 states. Second operand 4683 states. [2018-11-19 18:35:14,465 INFO L87 Difference]: Start difference. First operand 4683 states. Second operand 4683 states. [2018-11-19 18:35:15,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:35:15,150 INFO L93 Difference]: Finished difference Result 4683 states and 6310 transitions. [2018-11-19 18:35:15,150 INFO L276 IsEmpty]: Start isEmpty. Operand 4683 states and 6310 transitions. [2018-11-19 18:35:15,155 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:35:15,156 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:35:15,156 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:35:15,156 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:35:15,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4683 states. [2018-11-19 18:35:16,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4683 states to 4683 states and 6310 transitions. [2018-11-19 18:35:16,146 INFO L78 Accepts]: Start accepts. Automaton has 4683 states and 6310 transitions. Word has length 204 [2018-11-19 18:35:16,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:35:16,147 INFO L480 AbstractCegarLoop]: Abstraction has 4683 states and 6310 transitions. [2018-11-19 18:35:16,147 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 18:35:16,147 INFO L276 IsEmpty]: Start isEmpty. Operand 4683 states and 6310 transitions. [2018-11-19 18:35:16,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 332 [2018-11-19 18:35:16,151 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:35:16,151 INFO L384 BasicCegarLoop]: trace histogram [25, 25, 25, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:35:16,151 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:35:16,151 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:35:16,151 INFO L82 PathProgramCache]: Analyzing trace with hash -305765499, now seen corresponding path program 1 times [2018-11-19 18:35:16,151 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:35:16,152 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:35:16,153 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:35:16,153 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:35:16,153 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:35:16,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:35:16,408 INFO L256 TraceCheckUtils]: 0: Hoare triple {184802#true} call ULTIMATE.init(); {184802#true} is VALID [2018-11-19 18:35:16,408 INFO L273 TraceCheckUtils]: 1: Hoare triple {184802#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,409 INFO L273 TraceCheckUtils]: 2: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,409 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {184802#true} {184802#true} #3175#return; {184802#true} is VALID [2018-11-19 18:35:16,409 INFO L256 TraceCheckUtils]: 4: Hoare triple {184802#true} call #t~ret973 := main(); {184802#true} is VALID [2018-11-19 18:35:16,410 INFO L273 TraceCheckUtils]: 5: Hoare triple {184802#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {184802#true} is VALID [2018-11-19 18:35:16,410 INFO L256 TraceCheckUtils]: 6: Hoare triple {184802#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {184802#true} is VALID [2018-11-19 18:35:16,410 INFO L273 TraceCheckUtils]: 7: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,410 INFO L273 TraceCheckUtils]: 8: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,410 INFO L273 TraceCheckUtils]: 9: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,410 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {184802#true} {184802#true} #2927#return; {184802#true} is VALID [2018-11-19 18:35:16,411 INFO L273 TraceCheckUtils]: 11: Hoare triple {184802#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {184802#true} is VALID [2018-11-19 18:35:16,411 INFO L256 TraceCheckUtils]: 12: Hoare triple {184802#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {184802#true} is VALID [2018-11-19 18:35:16,411 INFO L273 TraceCheckUtils]: 13: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,411 INFO L273 TraceCheckUtils]: 14: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,411 INFO L273 TraceCheckUtils]: 15: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,411 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {184802#true} {184802#true} #2929#return; {184802#true} is VALID [2018-11-19 18:35:16,412 INFO L273 TraceCheckUtils]: 17: Hoare triple {184802#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {184802#true} is VALID [2018-11-19 18:35:16,412 INFO L256 TraceCheckUtils]: 18: Hoare triple {184802#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {184802#true} is VALID [2018-11-19 18:35:16,412 INFO L273 TraceCheckUtils]: 19: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,412 INFO L273 TraceCheckUtils]: 20: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,412 INFO L273 TraceCheckUtils]: 21: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,412 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {184802#true} {184802#true} #2931#return; {184802#true} is VALID [2018-11-19 18:35:16,413 INFO L273 TraceCheckUtils]: 23: Hoare triple {184802#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {184802#true} is VALID [2018-11-19 18:35:16,413 INFO L256 TraceCheckUtils]: 24: Hoare triple {184802#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {184802#true} is VALID [2018-11-19 18:35:16,413 INFO L273 TraceCheckUtils]: 25: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,413 INFO L273 TraceCheckUtils]: 26: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,413 INFO L273 TraceCheckUtils]: 27: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,413 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {184802#true} {184802#true} #2933#return; {184802#true} is VALID [2018-11-19 18:35:16,414 INFO L273 TraceCheckUtils]: 29: Hoare triple {184802#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {184802#true} is VALID [2018-11-19 18:35:16,414 INFO L256 TraceCheckUtils]: 30: Hoare triple {184802#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {184802#true} is VALID [2018-11-19 18:35:16,414 INFO L273 TraceCheckUtils]: 31: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,414 INFO L273 TraceCheckUtils]: 32: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,414 INFO L273 TraceCheckUtils]: 33: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,414 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {184802#true} {184802#true} #2935#return; {184802#true} is VALID [2018-11-19 18:35:16,415 INFO L273 TraceCheckUtils]: 35: Hoare triple {184802#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {184802#true} is VALID [2018-11-19 18:35:16,415 INFO L256 TraceCheckUtils]: 36: Hoare triple {184802#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {184802#true} is VALID [2018-11-19 18:35:16,415 INFO L273 TraceCheckUtils]: 37: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,415 INFO L273 TraceCheckUtils]: 38: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,415 INFO L273 TraceCheckUtils]: 39: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,415 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {184802#true} {184802#true} #2937#return; {184802#true} is VALID [2018-11-19 18:35:16,416 INFO L273 TraceCheckUtils]: 41: Hoare triple {184802#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {184802#true} is VALID [2018-11-19 18:35:16,416 INFO L256 TraceCheckUtils]: 42: Hoare triple {184802#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {184802#true} is VALID [2018-11-19 18:35:16,416 INFO L273 TraceCheckUtils]: 43: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,416 INFO L273 TraceCheckUtils]: 44: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,416 INFO L273 TraceCheckUtils]: 45: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,417 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {184802#true} {184802#true} #2939#return; {184802#true} is VALID [2018-11-19 18:35:16,417 INFO L273 TraceCheckUtils]: 47: Hoare triple {184802#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {184802#true} is VALID [2018-11-19 18:35:16,417 INFO L256 TraceCheckUtils]: 48: Hoare triple {184802#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {184802#true} is VALID [2018-11-19 18:35:16,417 INFO L273 TraceCheckUtils]: 49: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,417 INFO L273 TraceCheckUtils]: 50: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,417 INFO L273 TraceCheckUtils]: 51: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,418 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {184802#true} {184802#true} #2941#return; {184802#true} is VALID [2018-11-19 18:35:16,418 INFO L273 TraceCheckUtils]: 53: Hoare triple {184802#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {184802#true} is VALID [2018-11-19 18:35:16,418 INFO L256 TraceCheckUtils]: 54: Hoare triple {184802#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {184802#true} is VALID [2018-11-19 18:35:16,418 INFO L273 TraceCheckUtils]: 55: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,418 INFO L273 TraceCheckUtils]: 56: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,419 INFO L273 TraceCheckUtils]: 57: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,419 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {184802#true} {184802#true} #2943#return; {184802#true} is VALID [2018-11-19 18:35:16,419 INFO L273 TraceCheckUtils]: 59: Hoare triple {184802#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {184802#true} is VALID [2018-11-19 18:35:16,419 INFO L256 TraceCheckUtils]: 60: Hoare triple {184802#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {184802#true} is VALID [2018-11-19 18:35:16,419 INFO L273 TraceCheckUtils]: 61: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,419 INFO L273 TraceCheckUtils]: 62: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,420 INFO L273 TraceCheckUtils]: 63: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,420 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {184802#true} {184802#true} #2945#return; {184802#true} is VALID [2018-11-19 18:35:16,420 INFO L273 TraceCheckUtils]: 65: Hoare triple {184802#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {184802#true} is VALID [2018-11-19 18:35:16,420 INFO L256 TraceCheckUtils]: 66: Hoare triple {184802#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {184802#true} is VALID [2018-11-19 18:35:16,420 INFO L273 TraceCheckUtils]: 67: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,420 INFO L273 TraceCheckUtils]: 68: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,421 INFO L273 TraceCheckUtils]: 69: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,421 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {184802#true} {184802#true} #2947#return; {184802#true} is VALID [2018-11-19 18:35:16,421 INFO L273 TraceCheckUtils]: 71: Hoare triple {184802#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {184802#true} is VALID [2018-11-19 18:35:16,421 INFO L256 TraceCheckUtils]: 72: Hoare triple {184802#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {184802#true} is VALID [2018-11-19 18:35:16,421 INFO L273 TraceCheckUtils]: 73: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,421 INFO L273 TraceCheckUtils]: 74: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,422 INFO L273 TraceCheckUtils]: 75: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,422 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {184802#true} {184802#true} #2949#return; {184802#true} is VALID [2018-11-19 18:35:16,422 INFO L273 TraceCheckUtils]: 77: Hoare triple {184802#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {184802#true} is VALID [2018-11-19 18:35:16,422 INFO L256 TraceCheckUtils]: 78: Hoare triple {184802#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {184802#true} is VALID [2018-11-19 18:35:16,422 INFO L273 TraceCheckUtils]: 79: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,423 INFO L273 TraceCheckUtils]: 80: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,423 INFO L273 TraceCheckUtils]: 81: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,423 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {184802#true} {184802#true} #2951#return; {184802#true} is VALID [2018-11-19 18:35:16,423 INFO L273 TraceCheckUtils]: 83: Hoare triple {184802#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {184802#true} is VALID [2018-11-19 18:35:16,423 INFO L256 TraceCheckUtils]: 84: Hoare triple {184802#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {184802#true} is VALID [2018-11-19 18:35:16,423 INFO L273 TraceCheckUtils]: 85: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,424 INFO L273 TraceCheckUtils]: 86: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,424 INFO L273 TraceCheckUtils]: 87: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,424 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {184802#true} {184802#true} #2953#return; {184802#true} is VALID [2018-11-19 18:35:16,424 INFO L273 TraceCheckUtils]: 89: Hoare triple {184802#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {184802#true} is VALID [2018-11-19 18:35:16,424 INFO L256 TraceCheckUtils]: 90: Hoare triple {184802#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {184802#true} is VALID [2018-11-19 18:35:16,424 INFO L273 TraceCheckUtils]: 91: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,425 INFO L273 TraceCheckUtils]: 92: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,425 INFO L273 TraceCheckUtils]: 93: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,425 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {184802#true} {184802#true} #2955#return; {184802#true} is VALID [2018-11-19 18:35:16,425 INFO L273 TraceCheckUtils]: 95: Hoare triple {184802#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {184802#true} is VALID [2018-11-19 18:35:16,425 INFO L256 TraceCheckUtils]: 96: Hoare triple {184802#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {184802#true} is VALID [2018-11-19 18:35:16,425 INFO L273 TraceCheckUtils]: 97: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,426 INFO L273 TraceCheckUtils]: 98: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,426 INFO L273 TraceCheckUtils]: 99: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,426 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {184802#true} {184802#true} #2957#return; {184802#true} is VALID [2018-11-19 18:35:16,426 INFO L273 TraceCheckUtils]: 101: Hoare triple {184802#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {184802#true} is VALID [2018-11-19 18:35:16,426 INFO L256 TraceCheckUtils]: 102: Hoare triple {184802#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {184802#true} is VALID [2018-11-19 18:35:16,426 INFO L273 TraceCheckUtils]: 103: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,427 INFO L273 TraceCheckUtils]: 104: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,427 INFO L273 TraceCheckUtils]: 105: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,427 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {184802#true} {184802#true} #2959#return; {184802#true} is VALID [2018-11-19 18:35:16,427 INFO L273 TraceCheckUtils]: 107: Hoare triple {184802#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {184802#true} is VALID [2018-11-19 18:35:16,427 INFO L256 TraceCheckUtils]: 108: Hoare triple {184802#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {184802#true} is VALID [2018-11-19 18:35:16,428 INFO L273 TraceCheckUtils]: 109: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,428 INFO L273 TraceCheckUtils]: 110: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,428 INFO L273 TraceCheckUtils]: 111: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,428 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {184802#true} {184802#true} #2961#return; {184802#true} is VALID [2018-11-19 18:35:16,428 INFO L273 TraceCheckUtils]: 113: Hoare triple {184802#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {184802#true} is VALID [2018-11-19 18:35:16,428 INFO L256 TraceCheckUtils]: 114: Hoare triple {184802#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {184802#true} is VALID [2018-11-19 18:35:16,429 INFO L273 TraceCheckUtils]: 115: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,429 INFO L273 TraceCheckUtils]: 116: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,429 INFO L273 TraceCheckUtils]: 117: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,429 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {184802#true} {184802#true} #2963#return; {184802#true} is VALID [2018-11-19 18:35:16,429 INFO L273 TraceCheckUtils]: 119: Hoare triple {184802#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {184802#true} is VALID [2018-11-19 18:35:16,429 INFO L256 TraceCheckUtils]: 120: Hoare triple {184802#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {184802#true} is VALID [2018-11-19 18:35:16,430 INFO L273 TraceCheckUtils]: 121: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,430 INFO L273 TraceCheckUtils]: 122: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,430 INFO L273 TraceCheckUtils]: 123: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,430 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {184802#true} {184802#true} #2965#return; {184802#true} is VALID [2018-11-19 18:35:16,430 INFO L273 TraceCheckUtils]: 125: Hoare triple {184802#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {184802#true} is VALID [2018-11-19 18:35:16,431 INFO L256 TraceCheckUtils]: 126: Hoare triple {184802#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {184802#true} is VALID [2018-11-19 18:35:16,431 INFO L273 TraceCheckUtils]: 127: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,431 INFO L273 TraceCheckUtils]: 128: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,431 INFO L273 TraceCheckUtils]: 129: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,431 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {184802#true} {184802#true} #2967#return; {184802#true} is VALID [2018-11-19 18:35:16,431 INFO L273 TraceCheckUtils]: 131: Hoare triple {184802#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {184802#true} is VALID [2018-11-19 18:35:16,432 INFO L256 TraceCheckUtils]: 132: Hoare triple {184802#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {184802#true} is VALID [2018-11-19 18:35:16,432 INFO L273 TraceCheckUtils]: 133: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,432 INFO L273 TraceCheckUtils]: 134: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,432 INFO L273 TraceCheckUtils]: 135: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,432 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {184802#true} {184802#true} #2969#return; {184802#true} is VALID [2018-11-19 18:35:16,433 INFO L273 TraceCheckUtils]: 137: Hoare triple {184802#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {184802#true} is VALID [2018-11-19 18:35:16,433 INFO L256 TraceCheckUtils]: 138: Hoare triple {184802#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {184802#true} is VALID [2018-11-19 18:35:16,433 INFO L273 TraceCheckUtils]: 139: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,433 INFO L273 TraceCheckUtils]: 140: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,433 INFO L273 TraceCheckUtils]: 141: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,433 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {184802#true} {184802#true} #2971#return; {184802#true} is VALID [2018-11-19 18:35:16,434 INFO L273 TraceCheckUtils]: 143: Hoare triple {184802#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {184802#true} is VALID [2018-11-19 18:35:16,434 INFO L256 TraceCheckUtils]: 144: Hoare triple {184802#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {184802#true} is VALID [2018-11-19 18:35:16,434 INFO L273 TraceCheckUtils]: 145: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,434 INFO L273 TraceCheckUtils]: 146: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,434 INFO L273 TraceCheckUtils]: 147: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,434 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {184802#true} {184802#true} #2973#return; {184802#true} is VALID [2018-11-19 18:35:16,435 INFO L273 TraceCheckUtils]: 149: Hoare triple {184802#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {184802#true} is VALID [2018-11-19 18:35:16,435 INFO L256 TraceCheckUtils]: 150: Hoare triple {184802#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {184802#true} is VALID [2018-11-19 18:35:16,435 INFO L273 TraceCheckUtils]: 151: Hoare triple {184802#true} #t~loopctr974 := 0; {184802#true} is VALID [2018-11-19 18:35:16,435 INFO L273 TraceCheckUtils]: 152: Hoare triple {184802#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {184802#true} is VALID [2018-11-19 18:35:16,435 INFO L273 TraceCheckUtils]: 153: Hoare triple {184802#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {184802#true} is VALID [2018-11-19 18:35:16,435 INFO L273 TraceCheckUtils]: 154: Hoare triple {184802#true} assume !(#t~loopctr974 < #amount); {184802#true} is VALID [2018-11-19 18:35:16,436 INFO L273 TraceCheckUtils]: 155: Hoare triple {184802#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {184802#true} is VALID [2018-11-19 18:35:16,436 INFO L268 TraceCheckUtils]: 156: Hoare quadruple {184802#true} {184802#true} #2975#return; {184802#true} is VALID [2018-11-19 18:35:16,436 INFO L273 TraceCheckUtils]: 157: Hoare triple {184802#true} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {184804#(= ~ldv_state_variable_1~0 0)} is VALID [2018-11-19 18:35:16,437 INFO L273 TraceCheckUtils]: 158: Hoare triple {184804#(= ~ldv_state_variable_1~0 0)} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {184804#(= ~ldv_state_variable_1~0 0)} is VALID [2018-11-19 18:35:16,437 INFO L273 TraceCheckUtils]: 159: Hoare triple {184804#(= ~ldv_state_variable_1~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {184804#(= ~ldv_state_variable_1~0 0)} is VALID [2018-11-19 18:35:16,438 INFO L273 TraceCheckUtils]: 160: Hoare triple {184804#(= ~ldv_state_variable_1~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {184804#(= ~ldv_state_variable_1~0 0)} is VALID [2018-11-19 18:35:16,438 INFO L273 TraceCheckUtils]: 161: Hoare triple {184804#(= ~ldv_state_variable_1~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {184804#(= ~ldv_state_variable_1~0 0)} is VALID [2018-11-19 18:35:16,439 INFO L273 TraceCheckUtils]: 162: Hoare triple {184804#(= ~ldv_state_variable_1~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {184804#(= ~ldv_state_variable_1~0 0)} is VALID [2018-11-19 18:35:16,439 INFO L273 TraceCheckUtils]: 163: Hoare triple {184804#(= ~ldv_state_variable_1~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {184804#(= ~ldv_state_variable_1~0 0)} is VALID [2018-11-19 18:35:16,439 INFO L273 TraceCheckUtils]: 164: Hoare triple {184804#(= ~ldv_state_variable_1~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {184804#(= ~ldv_state_variable_1~0 0)} is VALID [2018-11-19 18:35:16,440 INFO L273 TraceCheckUtils]: 165: Hoare triple {184804#(= ~ldv_state_variable_1~0 0)} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {184804#(= ~ldv_state_variable_1~0 0)} is VALID [2018-11-19 18:35:16,440 INFO L273 TraceCheckUtils]: 166: Hoare triple {184804#(= ~ldv_state_variable_1~0 0)} assume #t~switch909; {184804#(= ~ldv_state_variable_1~0 0)} is VALID [2018-11-19 18:35:16,441 INFO L273 TraceCheckUtils]: 167: Hoare triple {184804#(= ~ldv_state_variable_1~0 0)} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {184803#false} is VALID [2018-11-19 18:35:16,441 INFO L273 TraceCheckUtils]: 168: Hoare triple {184803#false} assume #t~switch937; {184803#false} is VALID [2018-11-19 18:35:16,441 INFO L273 TraceCheckUtils]: 169: Hoare triple {184803#false} assume 1 == ~ldv_state_variable_1~0; {184803#false} is VALID [2018-11-19 18:35:16,442 INFO L256 TraceCheckUtils]: 170: Hoare triple {184803#false} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {184802#true} is VALID [2018-11-19 18:35:16,442 INFO L273 TraceCheckUtils]: 171: Hoare triple {184802#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {184802#true} is VALID [2018-11-19 18:35:16,442 INFO L256 TraceCheckUtils]: 172: Hoare triple {184802#true} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {184802#true} is VALID [2018-11-19 18:35:16,442 INFO L273 TraceCheckUtils]: 173: Hoare triple {184802#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {184802#true} is VALID [2018-11-19 18:35:16,442 INFO L256 TraceCheckUtils]: 174: Hoare triple {184802#true} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {184802#true} is VALID [2018-11-19 18:35:16,443 INFO L273 TraceCheckUtils]: 175: Hoare triple {184802#true} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {184802#true} is VALID [2018-11-19 18:35:16,443 INFO L256 TraceCheckUtils]: 176: Hoare triple {184802#true} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {184802#true} is VALID [2018-11-19 18:35:16,443 INFO L273 TraceCheckUtils]: 177: Hoare triple {184802#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {184802#true} is VALID [2018-11-19 18:35:16,443 INFO L273 TraceCheckUtils]: 178: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,443 INFO L268 TraceCheckUtils]: 179: Hoare quadruple {184802#true} {184802#true} #2817#return; {184802#true} is VALID [2018-11-19 18:35:16,444 INFO L273 TraceCheckUtils]: 180: Hoare triple {184802#true} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {184802#true} is VALID [2018-11-19 18:35:16,444 INFO L273 TraceCheckUtils]: 181: Hoare triple {184802#true} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {184802#true} is VALID [2018-11-19 18:35:16,444 INFO L273 TraceCheckUtils]: 182: Hoare triple {184802#true} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {184802#true} is VALID [2018-11-19 18:35:16,444 INFO L273 TraceCheckUtils]: 183: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,444 INFO L268 TraceCheckUtils]: 184: Hoare quadruple {184802#true} {184802#true} #3151#return; {184802#true} is VALID [2018-11-19 18:35:16,444 INFO L273 TraceCheckUtils]: 185: Hoare triple {184802#true} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {184802#true} is VALID [2018-11-19 18:35:16,445 INFO L273 TraceCheckUtils]: 186: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,445 INFO L268 TraceCheckUtils]: 187: Hoare quadruple {184802#true} {184802#true} #3095#return; {184802#true} is VALID [2018-11-19 18:35:16,445 INFO L273 TraceCheckUtils]: 188: Hoare triple {184802#true} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {184802#true} is VALID [2018-11-19 18:35:16,445 INFO L256 TraceCheckUtils]: 189: Hoare triple {184802#true} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {184802#true} is VALID [2018-11-19 18:35:16,445 INFO L273 TraceCheckUtils]: 190: Hoare triple {184802#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {184802#true} is VALID [2018-11-19 18:35:16,445 INFO L256 TraceCheckUtils]: 191: Hoare triple {184802#true} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {184802#true} is VALID [2018-11-19 18:35:16,446 INFO L273 TraceCheckUtils]: 192: Hoare triple {184802#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {184802#true} is VALID [2018-11-19 18:35:16,446 INFO L256 TraceCheckUtils]: 193: Hoare triple {184802#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {184802#true} is VALID [2018-11-19 18:35:16,446 INFO L273 TraceCheckUtils]: 194: Hoare triple {184802#true} ~size := #in~size;~t := #in~t; {184802#true} is VALID [2018-11-19 18:35:16,446 INFO L256 TraceCheckUtils]: 195: Hoare triple {184802#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {184802#true} is VALID [2018-11-19 18:35:16,446 INFO L273 TraceCheckUtils]: 196: Hoare triple {184802#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {184802#true} is VALID [2018-11-19 18:35:16,447 INFO L273 TraceCheckUtils]: 197: Hoare triple {184802#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,447 INFO L273 TraceCheckUtils]: 198: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,447 INFO L268 TraceCheckUtils]: 199: Hoare quadruple {184802#true} {184802#true} #2691#return; {184802#true} is VALID [2018-11-19 18:35:16,447 INFO L273 TraceCheckUtils]: 200: Hoare triple {184802#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {184802#true} is VALID [2018-11-19 18:35:16,447 INFO L273 TraceCheckUtils]: 201: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,447 INFO L268 TraceCheckUtils]: 202: Hoare quadruple {184802#true} {184802#true} #2781#return; {184802#true} is VALID [2018-11-19 18:35:16,448 INFO L273 TraceCheckUtils]: 203: Hoare triple {184802#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {184802#true} is VALID [2018-11-19 18:35:16,448 INFO L273 TraceCheckUtils]: 204: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,448 INFO L268 TraceCheckUtils]: 205: Hoare quadruple {184802#true} {184802#true} #2779#return; {184802#true} is VALID [2018-11-19 18:35:16,448 INFO L273 TraceCheckUtils]: 206: Hoare triple {184802#true} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {184802#true} is VALID [2018-11-19 18:35:16,448 INFO L273 TraceCheckUtils]: 207: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,448 INFO L268 TraceCheckUtils]: 208: Hoare quadruple {184802#true} {184802#true} #3097#return; {184802#true} is VALID [2018-11-19 18:35:16,449 INFO L273 TraceCheckUtils]: 209: Hoare triple {184802#true} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {184802#true} is VALID [2018-11-19 18:35:16,449 INFO L273 TraceCheckUtils]: 210: Hoare triple {184802#true} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {184802#true} is VALID [2018-11-19 18:35:16,449 INFO L256 TraceCheckUtils]: 211: Hoare triple {184802#true} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {184802#true} is VALID [2018-11-19 18:35:16,449 INFO L273 TraceCheckUtils]: 212: Hoare triple {184802#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {184802#true} is VALID [2018-11-19 18:35:16,449 INFO L273 TraceCheckUtils]: 213: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,450 INFO L268 TraceCheckUtils]: 214: Hoare quadruple {184802#true} {184802#true} #3099#return; {184802#true} is VALID [2018-11-19 18:35:16,450 INFO L256 TraceCheckUtils]: 215: Hoare triple {184802#true} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {184802#true} is VALID [2018-11-19 18:35:16,450 INFO L273 TraceCheckUtils]: 216: Hoare triple {184802#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {184802#true} is VALID [2018-11-19 18:35:16,450 INFO L273 TraceCheckUtils]: 217: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,450 INFO L268 TraceCheckUtils]: 218: Hoare quadruple {184802#true} {184802#true} #3101#return; {184802#true} is VALID [2018-11-19 18:35:16,451 INFO L256 TraceCheckUtils]: 219: Hoare triple {184802#true} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {184802#true} is VALID [2018-11-19 18:35:16,451 INFO L273 TraceCheckUtils]: 220: Hoare triple {184802#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {184802#true} is VALID [2018-11-19 18:35:16,451 INFO L256 TraceCheckUtils]: 221: Hoare triple {184802#true} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {184802#true} is VALID [2018-11-19 18:35:16,451 INFO L273 TraceCheckUtils]: 222: Hoare triple {184802#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {184802#true} is VALID [2018-11-19 18:35:16,451 INFO L273 TraceCheckUtils]: 223: Hoare triple {184802#true} assume 0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616;havoc #t~nondet638;#res.base, #res.offset := 0, 0;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {184802#true} is VALID [2018-11-19 18:35:16,452 INFO L273 TraceCheckUtils]: 224: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,452 INFO L268 TraceCheckUtils]: 225: Hoare quadruple {184802#true} {184802#true} #3137#return; {184802#true} is VALID [2018-11-19 18:35:16,452 INFO L273 TraceCheckUtils]: 226: Hoare triple {184802#true} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {184802#true} is VALID [2018-11-19 18:35:16,452 INFO L273 TraceCheckUtils]: 227: Hoare triple {184802#true} assume 0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616;#res := -22; {184802#true} is VALID [2018-11-19 18:35:16,452 INFO L273 TraceCheckUtils]: 228: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,452 INFO L268 TraceCheckUtils]: 229: Hoare quadruple {184802#true} {184802#true} #3103#return; {184802#true} is VALID [2018-11-19 18:35:16,453 INFO L273 TraceCheckUtils]: 230: Hoare triple {184802#true} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {184802#true} is VALID [2018-11-19 18:35:16,453 INFO L273 TraceCheckUtils]: 231: Hoare triple {184802#true} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {184802#true} is VALID [2018-11-19 18:35:16,453 INFO L273 TraceCheckUtils]: 232: Hoare triple {184802#true} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {184802#true} is VALID [2018-11-19 18:35:16,453 INFO L256 TraceCheckUtils]: 233: Hoare triple {184802#true} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {184802#true} is VALID [2018-11-19 18:35:16,453 INFO L273 TraceCheckUtils]: 234: Hoare triple {184802#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {184802#true} is VALID [2018-11-19 18:35:16,454 INFO L256 TraceCheckUtils]: 235: Hoare triple {184802#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {184802#true} is VALID [2018-11-19 18:35:16,454 INFO L273 TraceCheckUtils]: 236: Hoare triple {184802#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {184802#true} is VALID [2018-11-19 18:35:16,454 INFO L273 TraceCheckUtils]: 237: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,454 INFO L268 TraceCheckUtils]: 238: Hoare quadruple {184802#true} {184802#true} #2541#return; {184802#true} is VALID [2018-11-19 18:35:16,454 INFO L273 TraceCheckUtils]: 239: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,454 INFO L268 TraceCheckUtils]: 240: Hoare quadruple {184802#true} {184802#true} #3105#return; {184802#true} is VALID [2018-11-19 18:35:16,455 INFO L273 TraceCheckUtils]: 241: Hoare triple {184802#true} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {184802#true} is VALID [2018-11-19 18:35:16,455 INFO L256 TraceCheckUtils]: 242: Hoare triple {184802#true} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {184802#true} is VALID [2018-11-19 18:35:16,455 INFO L273 TraceCheckUtils]: 243: Hoare triple {184802#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {184802#true} is VALID [2018-11-19 18:35:16,455 INFO L256 TraceCheckUtils]: 244: Hoare triple {184802#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {184802#true} is VALID [2018-11-19 18:35:16,455 INFO L273 TraceCheckUtils]: 245: Hoare triple {184802#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {184802#true} is VALID [2018-11-19 18:35:16,455 INFO L273 TraceCheckUtils]: 246: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,456 INFO L268 TraceCheckUtils]: 247: Hoare quadruple {184802#true} {184802#true} #2541#return; {184802#true} is VALID [2018-11-19 18:35:16,456 INFO L273 TraceCheckUtils]: 248: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,456 INFO L268 TraceCheckUtils]: 249: Hoare quadruple {184802#true} {184802#true} #3107#return; {184802#true} is VALID [2018-11-19 18:35:16,456 INFO L273 TraceCheckUtils]: 250: Hoare triple {184802#true} havoc #t~mem837.base, #t~mem837.offset; {184802#true} is VALID [2018-11-19 18:35:16,456 INFO L256 TraceCheckUtils]: 251: Hoare triple {184802#true} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {184802#true} is VALID [2018-11-19 18:35:16,457 INFO L273 TraceCheckUtils]: 252: Hoare triple {184802#true} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {184802#true} is VALID [2018-11-19 18:35:16,457 INFO L273 TraceCheckUtils]: 253: Hoare triple {184802#true} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {184802#true} is VALID [2018-11-19 18:35:16,457 INFO L256 TraceCheckUtils]: 254: Hoare triple {184802#true} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {184802#true} is VALID [2018-11-19 18:35:16,457 INFO L273 TraceCheckUtils]: 255: Hoare triple {184802#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {184802#true} is VALID [2018-11-19 18:35:16,457 INFO L256 TraceCheckUtils]: 256: Hoare triple {184802#true} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {184802#true} is VALID [2018-11-19 18:35:16,457 INFO L273 TraceCheckUtils]: 257: Hoare triple {184802#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {184802#true} is VALID [2018-11-19 18:35:16,458 INFO L256 TraceCheckUtils]: 258: Hoare triple {184802#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {184802#true} is VALID [2018-11-19 18:35:16,458 INFO L273 TraceCheckUtils]: 259: Hoare triple {184802#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {184802#true} is VALID [2018-11-19 18:35:16,458 INFO L273 TraceCheckUtils]: 260: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,458 INFO L268 TraceCheckUtils]: 261: Hoare quadruple {184802#true} {184802#true} #2605#return; {184802#true} is VALID [2018-11-19 18:35:16,458 INFO L273 TraceCheckUtils]: 262: Hoare triple {184802#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {184802#true} is VALID [2018-11-19 18:35:16,459 INFO L256 TraceCheckUtils]: 263: Hoare triple {184802#true} call #t~ret965 := ldv_undef_int(); {184802#true} is VALID [2018-11-19 18:35:16,459 INFO L273 TraceCheckUtils]: 264: Hoare triple {184802#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {184802#true} is VALID [2018-11-19 18:35:16,459 INFO L273 TraceCheckUtils]: 265: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,459 INFO L268 TraceCheckUtils]: 266: Hoare quadruple {184802#true} {184802#true} #2607#return; {184802#true} is VALID [2018-11-19 18:35:16,459 INFO L273 TraceCheckUtils]: 267: Hoare triple {184802#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {184802#true} is VALID [2018-11-19 18:35:16,459 INFO L273 TraceCheckUtils]: 268: Hoare triple {184802#true} assume 0 != ~tmp___0~26; {184802#true} is VALID [2018-11-19 18:35:16,460 INFO L273 TraceCheckUtils]: 269: Hoare triple {184802#true} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {184802#true} is VALID [2018-11-19 18:35:16,460 INFO L273 TraceCheckUtils]: 270: Hoare triple {184802#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {184802#true} is VALID [2018-11-19 18:35:16,460 INFO L273 TraceCheckUtils]: 271: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,460 INFO L268 TraceCheckUtils]: 272: Hoare quadruple {184802#true} {184802#true} #3135#return; {184802#true} is VALID [2018-11-19 18:35:16,460 INFO L273 TraceCheckUtils]: 273: Hoare triple {184802#true} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {184802#true} is VALID [2018-11-19 18:35:16,461 INFO L273 TraceCheckUtils]: 274: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,461 INFO L268 TraceCheckUtils]: 275: Hoare quadruple {184802#true} {184802#true} #2709#return; {184802#true} is VALID [2018-11-19 18:35:16,461 INFO L273 TraceCheckUtils]: 276: Hoare triple {184802#true} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {184802#true} is VALID [2018-11-19 18:35:16,461 INFO L273 TraceCheckUtils]: 277: Hoare triple {184802#true} assume 0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616;havoc #t~mem561.base, #t~mem561.offset;havoc #t~nondet562;call #t~mem563.base, #t~mem563.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem563.base, #t~mem563.offset;~error~18 := -12; {184802#true} is VALID [2018-11-19 18:35:16,461 INFO L273 TraceCheckUtils]: 278: Hoare triple {184802#true} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {184802#true} is VALID [2018-11-19 18:35:16,461 INFO L273 TraceCheckUtils]: 279: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,462 INFO L268 TraceCheckUtils]: 280: Hoare quadruple {184802#true} {184802#true} #3109#return; {184802#true} is VALID [2018-11-19 18:35:16,462 INFO L273 TraceCheckUtils]: 281: Hoare triple {184802#true} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {184802#true} is VALID [2018-11-19 18:35:16,462 INFO L273 TraceCheckUtils]: 282: Hoare triple {184802#true} assume 0 != ~error~25; {184802#true} is VALID [2018-11-19 18:35:16,462 INFO L273 TraceCheckUtils]: 283: Hoare triple {184802#true} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {184802#true} is VALID [2018-11-19 18:35:16,462 INFO L273 TraceCheckUtils]: 284: Hoare triple {184802#true} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {184802#true} is VALID [2018-11-19 18:35:16,463 INFO L273 TraceCheckUtils]: 285: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,463 INFO L268 TraceCheckUtils]: 286: Hoare quadruple {184802#true} {184803#false} #3015#return; {184803#false} is VALID [2018-11-19 18:35:16,463 INFO L273 TraceCheckUtils]: 287: Hoare triple {184803#false} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {184803#false} is VALID [2018-11-19 18:35:16,463 INFO L273 TraceCheckUtils]: 288: Hoare triple {184803#false} assume 0 == ~ldv_retval_3~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {184803#false} is VALID [2018-11-19 18:35:16,463 INFO L273 TraceCheckUtils]: 289: Hoare triple {184803#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {184803#false} is VALID [2018-11-19 18:35:16,463 INFO L273 TraceCheckUtils]: 290: Hoare triple {184803#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {184803#false} is VALID [2018-11-19 18:35:16,464 INFO L273 TraceCheckUtils]: 291: Hoare triple {184803#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {184803#false} is VALID [2018-11-19 18:35:16,464 INFO L273 TraceCheckUtils]: 292: Hoare triple {184803#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {184803#false} is VALID [2018-11-19 18:35:16,464 INFO L273 TraceCheckUtils]: 293: Hoare triple {184803#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {184803#false} is VALID [2018-11-19 18:35:16,464 INFO L273 TraceCheckUtils]: 294: Hoare triple {184803#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {184803#false} is VALID [2018-11-19 18:35:16,464 INFO L273 TraceCheckUtils]: 295: Hoare triple {184803#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {184803#false} is VALID [2018-11-19 18:35:16,465 INFO L273 TraceCheckUtils]: 296: Hoare triple {184803#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {184803#false} is VALID [2018-11-19 18:35:16,465 INFO L273 TraceCheckUtils]: 297: Hoare triple {184803#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {184803#false} is VALID [2018-11-19 18:35:16,465 INFO L273 TraceCheckUtils]: 298: Hoare triple {184803#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {184803#false} is VALID [2018-11-19 18:35:16,465 INFO L273 TraceCheckUtils]: 299: Hoare triple {184803#false} assume #t~switch909; {184803#false} is VALID [2018-11-19 18:35:16,465 INFO L273 TraceCheckUtils]: 300: Hoare triple {184803#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {184803#false} is VALID [2018-11-19 18:35:16,465 INFO L273 TraceCheckUtils]: 301: Hoare triple {184803#false} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {184803#false} is VALID [2018-11-19 18:35:16,466 INFO L273 TraceCheckUtils]: 302: Hoare triple {184803#false} assume #t~switch947; {184803#false} is VALID [2018-11-19 18:35:16,466 INFO L273 TraceCheckUtils]: 303: Hoare triple {184803#false} assume 1 == ~ldv_state_variable_0~0; {184803#false} is VALID [2018-11-19 18:35:16,466 INFO L256 TraceCheckUtils]: 304: Hoare triple {184803#false} call #t~ret948 := ims_pcu_driver_init(); {184802#true} is VALID [2018-11-19 18:35:16,466 INFO L273 TraceCheckUtils]: 305: Hoare triple {184802#true} havoc ~tmp~46; {184802#true} is VALID [2018-11-19 18:35:16,466 INFO L256 TraceCheckUtils]: 306: Hoare triple {184802#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {184802#true} is VALID [2018-11-19 18:35:16,466 INFO L273 TraceCheckUtils]: 307: Hoare triple {184802#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {184802#true} is VALID [2018-11-19 18:35:16,467 INFO L256 TraceCheckUtils]: 308: Hoare triple {184802#true} call ldv_usb_driver_1(); {184802#true} is VALID [2018-11-19 18:35:16,467 INFO L273 TraceCheckUtils]: 309: Hoare triple {184802#true} havoc ~tmp~53.base, ~tmp~53.offset; {184802#true} is VALID [2018-11-19 18:35:16,467 INFO L256 TraceCheckUtils]: 310: Hoare triple {184802#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {184802#true} is VALID [2018-11-19 18:35:16,467 INFO L273 TraceCheckUtils]: 311: Hoare triple {184802#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {184802#true} is VALID [2018-11-19 18:35:16,467 INFO L273 TraceCheckUtils]: 312: Hoare triple {184802#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {184802#true} is VALID [2018-11-19 18:35:16,468 INFO L273 TraceCheckUtils]: 313: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,468 INFO L268 TraceCheckUtils]: 314: Hoare quadruple {184802#true} {184802#true} #2613#return; {184802#true} is VALID [2018-11-19 18:35:16,468 INFO L273 TraceCheckUtils]: 315: Hoare triple {184802#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {184802#true} is VALID [2018-11-19 18:35:16,468 INFO L273 TraceCheckUtils]: 316: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,468 INFO L268 TraceCheckUtils]: 317: Hoare quadruple {184802#true} {184802#true} #2537#return; {184802#true} is VALID [2018-11-19 18:35:16,468 INFO L273 TraceCheckUtils]: 318: Hoare triple {184802#true} #res := ~ldv_func_res~0; {184802#true} is VALID [2018-11-19 18:35:16,469 INFO L273 TraceCheckUtils]: 319: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,469 INFO L268 TraceCheckUtils]: 320: Hoare quadruple {184802#true} {184802#true} #2777#return; {184802#true} is VALID [2018-11-19 18:35:16,469 INFO L273 TraceCheckUtils]: 321: Hoare triple {184802#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {184802#true} is VALID [2018-11-19 18:35:16,469 INFO L273 TraceCheckUtils]: 322: Hoare triple {184802#true} assume true; {184802#true} is VALID [2018-11-19 18:35:16,469 INFO L268 TraceCheckUtils]: 323: Hoare quadruple {184802#true} {184803#false} #3035#return; {184803#false} is VALID [2018-11-19 18:35:16,469 INFO L273 TraceCheckUtils]: 324: Hoare triple {184803#false} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {184803#false} is VALID [2018-11-19 18:35:16,470 INFO L273 TraceCheckUtils]: 325: Hoare triple {184803#false} assume !(0 == ~ldv_retval_4~0); {184803#false} is VALID [2018-11-19 18:35:16,470 INFO L273 TraceCheckUtils]: 326: Hoare triple {184803#false} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {184803#false} is VALID [2018-11-19 18:35:16,470 INFO L256 TraceCheckUtils]: 327: Hoare triple {184803#false} call ldv_check_final_state(); {184803#false} is VALID [2018-11-19 18:35:16,470 INFO L273 TraceCheckUtils]: 328: Hoare triple {184803#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {184803#false} is VALID [2018-11-19 18:35:16,470 INFO L256 TraceCheckUtils]: 329: Hoare triple {184803#false} call ldv_error(); {184803#false} is VALID [2018-11-19 18:35:16,470 INFO L273 TraceCheckUtils]: 330: Hoare triple {184803#false} assume !false; {184803#false} is VALID [2018-11-19 18:35:16,594 INFO L134 CoverageAnalysis]: Checked inductivity of 1225 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 1216 trivial. 0 not checked. [2018-11-19 18:35:16,595 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:35:16,595 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 18:35:16,596 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 331 [2018-11-19 18:35:16,596 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:35:16,596 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 18:35:16,960 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 248 edges. 248 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:35:16,961 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 18:35:16,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 18:35:16,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:35:16,961 INFO L87 Difference]: Start difference. First operand 4683 states and 6310 transitions. Second operand 3 states. [2018-11-19 18:35:45,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:35:45,074 INFO L93 Difference]: Finished difference Result 11127 states and 15064 transitions. [2018-11-19 18:35:45,074 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 18:35:45,074 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 331 [2018-11-19 18:35:45,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:35:45,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:35:45,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3903 transitions. [2018-11-19 18:35:45,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:35:45,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3903 transitions. [2018-11-19 18:35:45,190 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 3903 transitions. [2018-11-19 18:35:48,586 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3903 edges. 3903 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:35:50,729 INFO L225 Difference]: With dead ends: 11127 [2018-11-19 18:35:50,729 INFO L226 Difference]: Without dead ends: 6500 [2018-11-19 18:35:50,737 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:35:50,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6500 states. [2018-11-19 18:36:18,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6500 to 6478. [2018-11-19 18:36:18,612 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:36:18,612 INFO L82 GeneralOperation]: Start isEquivalent. First operand 6500 states. Second operand 6478 states. [2018-11-19 18:36:18,612 INFO L74 IsIncluded]: Start isIncluded. First operand 6500 states. Second operand 6478 states. [2018-11-19 18:36:18,612 INFO L87 Difference]: Start difference. First operand 6500 states. Second operand 6478 states. [2018-11-19 18:36:20,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:36:20,310 INFO L93 Difference]: Finished difference Result 6500 states and 8831 transitions. [2018-11-19 18:36:20,310 INFO L276 IsEmpty]: Start isEmpty. Operand 6500 states and 8831 transitions. [2018-11-19 18:36:20,319 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:36:20,320 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:36:20,320 INFO L74 IsIncluded]: Start isIncluded. First operand 6478 states. Second operand 6500 states. [2018-11-19 18:36:20,320 INFO L87 Difference]: Start difference. First operand 6478 states. Second operand 6500 states. [2018-11-19 18:36:22,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:36:22,025 INFO L93 Difference]: Finished difference Result 6500 states and 8831 transitions. [2018-11-19 18:36:22,025 INFO L276 IsEmpty]: Start isEmpty. Operand 6500 states and 8831 transitions. [2018-11-19 18:36:22,034 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:36:22,035 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:36:22,035 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:36:22,035 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:36:22,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6478 states. [2018-11-19 18:36:23,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6478 states to 6478 states and 8802 transitions. [2018-11-19 18:36:23,981 INFO L78 Accepts]: Start accepts. Automaton has 6478 states and 8802 transitions. Word has length 331 [2018-11-19 18:36:23,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:36:23,982 INFO L480 AbstractCegarLoop]: Abstraction has 6478 states and 8802 transitions. [2018-11-19 18:36:23,982 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 18:36:23,982 INFO L276 IsEmpty]: Start isEmpty. Operand 6478 states and 8802 transitions. [2018-11-19 18:36:23,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 370 [2018-11-19 18:36:23,989 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:36:23,989 INFO L384 BasicCegarLoop]: trace histogram [26, 26, 26, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:36:23,989 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:36:23,990 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:36:23,990 INFO L82 PathProgramCache]: Analyzing trace with hash -1851655595, now seen corresponding path program 1 times [2018-11-19 18:36:23,990 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:36:23,990 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:36:23,992 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:36:23,992 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:36:23,992 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:36:24,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:36:24,267 INFO L256 TraceCheckUtils]: 0: Hoare triple {221318#true} call ULTIMATE.init(); {221318#true} is VALID [2018-11-19 18:36:24,267 INFO L273 TraceCheckUtils]: 1: Hoare triple {221318#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,268 INFO L273 TraceCheckUtils]: 2: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,268 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {221318#true} {221318#true} #3175#return; {221318#true} is VALID [2018-11-19 18:36:24,268 INFO L256 TraceCheckUtils]: 4: Hoare triple {221318#true} call #t~ret973 := main(); {221318#true} is VALID [2018-11-19 18:36:24,268 INFO L273 TraceCheckUtils]: 5: Hoare triple {221318#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {221318#true} is VALID [2018-11-19 18:36:24,268 INFO L256 TraceCheckUtils]: 6: Hoare triple {221318#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {221318#true} is VALID [2018-11-19 18:36:24,268 INFO L273 TraceCheckUtils]: 7: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,269 INFO L273 TraceCheckUtils]: 8: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,269 INFO L273 TraceCheckUtils]: 9: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,269 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {221318#true} {221318#true} #2927#return; {221318#true} is VALID [2018-11-19 18:36:24,269 INFO L273 TraceCheckUtils]: 11: Hoare triple {221318#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {221318#true} is VALID [2018-11-19 18:36:24,269 INFO L256 TraceCheckUtils]: 12: Hoare triple {221318#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {221318#true} is VALID [2018-11-19 18:36:24,269 INFO L273 TraceCheckUtils]: 13: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,269 INFO L273 TraceCheckUtils]: 14: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,269 INFO L273 TraceCheckUtils]: 15: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,270 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {221318#true} {221318#true} #2929#return; {221318#true} is VALID [2018-11-19 18:36:24,270 INFO L273 TraceCheckUtils]: 17: Hoare triple {221318#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {221318#true} is VALID [2018-11-19 18:36:24,270 INFO L256 TraceCheckUtils]: 18: Hoare triple {221318#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {221318#true} is VALID [2018-11-19 18:36:24,270 INFO L273 TraceCheckUtils]: 19: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,270 INFO L273 TraceCheckUtils]: 20: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,270 INFO L273 TraceCheckUtils]: 21: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,270 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {221318#true} {221318#true} #2931#return; {221318#true} is VALID [2018-11-19 18:36:24,270 INFO L273 TraceCheckUtils]: 23: Hoare triple {221318#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {221318#true} is VALID [2018-11-19 18:36:24,270 INFO L256 TraceCheckUtils]: 24: Hoare triple {221318#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {221318#true} is VALID [2018-11-19 18:36:24,271 INFO L273 TraceCheckUtils]: 25: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,271 INFO L273 TraceCheckUtils]: 26: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,271 INFO L273 TraceCheckUtils]: 27: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,271 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {221318#true} {221318#true} #2933#return; {221318#true} is VALID [2018-11-19 18:36:24,271 INFO L273 TraceCheckUtils]: 29: Hoare triple {221318#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {221318#true} is VALID [2018-11-19 18:36:24,271 INFO L256 TraceCheckUtils]: 30: Hoare triple {221318#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {221318#true} is VALID [2018-11-19 18:36:24,271 INFO L273 TraceCheckUtils]: 31: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,271 INFO L273 TraceCheckUtils]: 32: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,272 INFO L273 TraceCheckUtils]: 33: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,272 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {221318#true} {221318#true} #2935#return; {221318#true} is VALID [2018-11-19 18:36:24,272 INFO L273 TraceCheckUtils]: 35: Hoare triple {221318#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {221318#true} is VALID [2018-11-19 18:36:24,272 INFO L256 TraceCheckUtils]: 36: Hoare triple {221318#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {221318#true} is VALID [2018-11-19 18:36:24,272 INFO L273 TraceCheckUtils]: 37: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,272 INFO L273 TraceCheckUtils]: 38: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,272 INFO L273 TraceCheckUtils]: 39: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,272 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {221318#true} {221318#true} #2937#return; {221318#true} is VALID [2018-11-19 18:36:24,272 INFO L273 TraceCheckUtils]: 41: Hoare triple {221318#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {221318#true} is VALID [2018-11-19 18:36:24,273 INFO L256 TraceCheckUtils]: 42: Hoare triple {221318#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {221318#true} is VALID [2018-11-19 18:36:24,273 INFO L273 TraceCheckUtils]: 43: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,273 INFO L273 TraceCheckUtils]: 44: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,273 INFO L273 TraceCheckUtils]: 45: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,273 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {221318#true} {221318#true} #2939#return; {221318#true} is VALID [2018-11-19 18:36:24,273 INFO L273 TraceCheckUtils]: 47: Hoare triple {221318#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {221318#true} is VALID [2018-11-19 18:36:24,273 INFO L256 TraceCheckUtils]: 48: Hoare triple {221318#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {221318#true} is VALID [2018-11-19 18:36:24,273 INFO L273 TraceCheckUtils]: 49: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,274 INFO L273 TraceCheckUtils]: 50: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,274 INFO L273 TraceCheckUtils]: 51: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,274 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {221318#true} {221318#true} #2941#return; {221318#true} is VALID [2018-11-19 18:36:24,274 INFO L273 TraceCheckUtils]: 53: Hoare triple {221318#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {221318#true} is VALID [2018-11-19 18:36:24,274 INFO L256 TraceCheckUtils]: 54: Hoare triple {221318#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {221318#true} is VALID [2018-11-19 18:36:24,274 INFO L273 TraceCheckUtils]: 55: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,274 INFO L273 TraceCheckUtils]: 56: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,274 INFO L273 TraceCheckUtils]: 57: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,274 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {221318#true} {221318#true} #2943#return; {221318#true} is VALID [2018-11-19 18:36:24,275 INFO L273 TraceCheckUtils]: 59: Hoare triple {221318#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {221318#true} is VALID [2018-11-19 18:36:24,275 INFO L256 TraceCheckUtils]: 60: Hoare triple {221318#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {221318#true} is VALID [2018-11-19 18:36:24,275 INFO L273 TraceCheckUtils]: 61: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,275 INFO L273 TraceCheckUtils]: 62: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,275 INFO L273 TraceCheckUtils]: 63: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,275 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {221318#true} {221318#true} #2945#return; {221318#true} is VALID [2018-11-19 18:36:24,275 INFO L273 TraceCheckUtils]: 65: Hoare triple {221318#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {221318#true} is VALID [2018-11-19 18:36:24,275 INFO L256 TraceCheckUtils]: 66: Hoare triple {221318#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {221318#true} is VALID [2018-11-19 18:36:24,276 INFO L273 TraceCheckUtils]: 67: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,276 INFO L273 TraceCheckUtils]: 68: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,276 INFO L273 TraceCheckUtils]: 69: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,276 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {221318#true} {221318#true} #2947#return; {221318#true} is VALID [2018-11-19 18:36:24,276 INFO L273 TraceCheckUtils]: 71: Hoare triple {221318#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {221318#true} is VALID [2018-11-19 18:36:24,276 INFO L256 TraceCheckUtils]: 72: Hoare triple {221318#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {221318#true} is VALID [2018-11-19 18:36:24,276 INFO L273 TraceCheckUtils]: 73: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,276 INFO L273 TraceCheckUtils]: 74: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,277 INFO L273 TraceCheckUtils]: 75: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,277 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {221318#true} {221318#true} #2949#return; {221318#true} is VALID [2018-11-19 18:36:24,277 INFO L273 TraceCheckUtils]: 77: Hoare triple {221318#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {221318#true} is VALID [2018-11-19 18:36:24,277 INFO L256 TraceCheckUtils]: 78: Hoare triple {221318#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {221318#true} is VALID [2018-11-19 18:36:24,277 INFO L273 TraceCheckUtils]: 79: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,277 INFO L273 TraceCheckUtils]: 80: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,277 INFO L273 TraceCheckUtils]: 81: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,277 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {221318#true} {221318#true} #2951#return; {221318#true} is VALID [2018-11-19 18:36:24,277 INFO L273 TraceCheckUtils]: 83: Hoare triple {221318#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {221318#true} is VALID [2018-11-19 18:36:24,278 INFO L256 TraceCheckUtils]: 84: Hoare triple {221318#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {221318#true} is VALID [2018-11-19 18:36:24,278 INFO L273 TraceCheckUtils]: 85: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,278 INFO L273 TraceCheckUtils]: 86: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,278 INFO L273 TraceCheckUtils]: 87: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,278 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {221318#true} {221318#true} #2953#return; {221318#true} is VALID [2018-11-19 18:36:24,278 INFO L273 TraceCheckUtils]: 89: Hoare triple {221318#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {221318#true} is VALID [2018-11-19 18:36:24,278 INFO L256 TraceCheckUtils]: 90: Hoare triple {221318#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {221318#true} is VALID [2018-11-19 18:36:24,278 INFO L273 TraceCheckUtils]: 91: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,279 INFO L273 TraceCheckUtils]: 92: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,279 INFO L273 TraceCheckUtils]: 93: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,279 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {221318#true} {221318#true} #2955#return; {221318#true} is VALID [2018-11-19 18:36:24,279 INFO L273 TraceCheckUtils]: 95: Hoare triple {221318#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {221318#true} is VALID [2018-11-19 18:36:24,279 INFO L256 TraceCheckUtils]: 96: Hoare triple {221318#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {221318#true} is VALID [2018-11-19 18:36:24,279 INFO L273 TraceCheckUtils]: 97: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,279 INFO L273 TraceCheckUtils]: 98: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,280 INFO L273 TraceCheckUtils]: 99: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,280 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {221318#true} {221318#true} #2957#return; {221318#true} is VALID [2018-11-19 18:36:24,280 INFO L273 TraceCheckUtils]: 101: Hoare triple {221318#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {221318#true} is VALID [2018-11-19 18:36:24,280 INFO L256 TraceCheckUtils]: 102: Hoare triple {221318#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {221318#true} is VALID [2018-11-19 18:36:24,280 INFO L273 TraceCheckUtils]: 103: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,280 INFO L273 TraceCheckUtils]: 104: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,280 INFO L273 TraceCheckUtils]: 105: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,280 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {221318#true} {221318#true} #2959#return; {221318#true} is VALID [2018-11-19 18:36:24,280 INFO L273 TraceCheckUtils]: 107: Hoare triple {221318#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {221318#true} is VALID [2018-11-19 18:36:24,281 INFO L256 TraceCheckUtils]: 108: Hoare triple {221318#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {221318#true} is VALID [2018-11-19 18:36:24,281 INFO L273 TraceCheckUtils]: 109: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,281 INFO L273 TraceCheckUtils]: 110: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,281 INFO L273 TraceCheckUtils]: 111: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,281 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {221318#true} {221318#true} #2961#return; {221318#true} is VALID [2018-11-19 18:36:24,281 INFO L273 TraceCheckUtils]: 113: Hoare triple {221318#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {221318#true} is VALID [2018-11-19 18:36:24,281 INFO L256 TraceCheckUtils]: 114: Hoare triple {221318#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {221318#true} is VALID [2018-11-19 18:36:24,281 INFO L273 TraceCheckUtils]: 115: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,282 INFO L273 TraceCheckUtils]: 116: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,282 INFO L273 TraceCheckUtils]: 117: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,282 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {221318#true} {221318#true} #2963#return; {221318#true} is VALID [2018-11-19 18:36:24,282 INFO L273 TraceCheckUtils]: 119: Hoare triple {221318#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {221318#true} is VALID [2018-11-19 18:36:24,282 INFO L256 TraceCheckUtils]: 120: Hoare triple {221318#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {221318#true} is VALID [2018-11-19 18:36:24,282 INFO L273 TraceCheckUtils]: 121: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,282 INFO L273 TraceCheckUtils]: 122: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,282 INFO L273 TraceCheckUtils]: 123: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,282 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {221318#true} {221318#true} #2965#return; {221318#true} is VALID [2018-11-19 18:36:24,283 INFO L273 TraceCheckUtils]: 125: Hoare triple {221318#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {221318#true} is VALID [2018-11-19 18:36:24,283 INFO L256 TraceCheckUtils]: 126: Hoare triple {221318#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {221318#true} is VALID [2018-11-19 18:36:24,283 INFO L273 TraceCheckUtils]: 127: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,283 INFO L273 TraceCheckUtils]: 128: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,283 INFO L273 TraceCheckUtils]: 129: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,283 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {221318#true} {221318#true} #2967#return; {221318#true} is VALID [2018-11-19 18:36:24,283 INFO L273 TraceCheckUtils]: 131: Hoare triple {221318#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {221318#true} is VALID [2018-11-19 18:36:24,283 INFO L256 TraceCheckUtils]: 132: Hoare triple {221318#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {221318#true} is VALID [2018-11-19 18:36:24,284 INFO L273 TraceCheckUtils]: 133: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,284 INFO L273 TraceCheckUtils]: 134: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,284 INFO L273 TraceCheckUtils]: 135: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,284 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {221318#true} {221318#true} #2969#return; {221318#true} is VALID [2018-11-19 18:36:24,284 INFO L273 TraceCheckUtils]: 137: Hoare triple {221318#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {221318#true} is VALID [2018-11-19 18:36:24,284 INFO L256 TraceCheckUtils]: 138: Hoare triple {221318#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {221318#true} is VALID [2018-11-19 18:36:24,284 INFO L273 TraceCheckUtils]: 139: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,284 INFO L273 TraceCheckUtils]: 140: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,284 INFO L273 TraceCheckUtils]: 141: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,285 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {221318#true} {221318#true} #2971#return; {221318#true} is VALID [2018-11-19 18:36:24,285 INFO L273 TraceCheckUtils]: 143: Hoare triple {221318#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {221318#true} is VALID [2018-11-19 18:36:24,285 INFO L256 TraceCheckUtils]: 144: Hoare triple {221318#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {221318#true} is VALID [2018-11-19 18:36:24,285 INFO L273 TraceCheckUtils]: 145: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,285 INFO L273 TraceCheckUtils]: 146: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,285 INFO L273 TraceCheckUtils]: 147: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,285 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {221318#true} {221318#true} #2973#return; {221318#true} is VALID [2018-11-19 18:36:24,285 INFO L273 TraceCheckUtils]: 149: Hoare triple {221318#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {221318#true} is VALID [2018-11-19 18:36:24,286 INFO L256 TraceCheckUtils]: 150: Hoare triple {221318#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {221318#true} is VALID [2018-11-19 18:36:24,286 INFO L273 TraceCheckUtils]: 151: Hoare triple {221318#true} #t~loopctr974 := 0; {221318#true} is VALID [2018-11-19 18:36:24,286 INFO L273 TraceCheckUtils]: 152: Hoare triple {221318#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {221318#true} is VALID [2018-11-19 18:36:24,286 INFO L273 TraceCheckUtils]: 153: Hoare triple {221318#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {221318#true} is VALID [2018-11-19 18:36:24,286 INFO L273 TraceCheckUtils]: 154: Hoare triple {221318#true} assume !(#t~loopctr974 < #amount); {221318#true} is VALID [2018-11-19 18:36:24,286 INFO L273 TraceCheckUtils]: 155: Hoare triple {221318#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {221318#true} is VALID [2018-11-19 18:36:24,286 INFO L268 TraceCheckUtils]: 156: Hoare quadruple {221318#true} {221318#true} #2975#return; {221318#true} is VALID [2018-11-19 18:36:24,286 INFO L273 TraceCheckUtils]: 157: Hoare triple {221318#true} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {221318#true} is VALID [2018-11-19 18:36:24,286 INFO L273 TraceCheckUtils]: 158: Hoare triple {221318#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {221318#true} is VALID [2018-11-19 18:36:24,287 INFO L273 TraceCheckUtils]: 159: Hoare triple {221318#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {221318#true} is VALID [2018-11-19 18:36:24,287 INFO L273 TraceCheckUtils]: 160: Hoare triple {221318#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {221318#true} is VALID [2018-11-19 18:36:24,287 INFO L273 TraceCheckUtils]: 161: Hoare triple {221318#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {221318#true} is VALID [2018-11-19 18:36:24,287 INFO L273 TraceCheckUtils]: 162: Hoare triple {221318#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {221318#true} is VALID [2018-11-19 18:36:24,287 INFO L273 TraceCheckUtils]: 163: Hoare triple {221318#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {221318#true} is VALID [2018-11-19 18:36:24,287 INFO L273 TraceCheckUtils]: 164: Hoare triple {221318#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {221318#true} is VALID [2018-11-19 18:36:24,287 INFO L273 TraceCheckUtils]: 165: Hoare triple {221318#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {221318#true} is VALID [2018-11-19 18:36:24,287 INFO L273 TraceCheckUtils]: 166: Hoare triple {221318#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {221318#true} is VALID [2018-11-19 18:36:24,288 INFO L273 TraceCheckUtils]: 167: Hoare triple {221318#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {221318#true} is VALID [2018-11-19 18:36:24,288 INFO L273 TraceCheckUtils]: 168: Hoare triple {221318#true} assume #t~switch909; {221318#true} is VALID [2018-11-19 18:36:24,288 INFO L273 TraceCheckUtils]: 169: Hoare triple {221318#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {221318#true} is VALID [2018-11-19 18:36:24,288 INFO L273 TraceCheckUtils]: 170: Hoare triple {221318#true} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {221318#true} is VALID [2018-11-19 18:36:24,288 INFO L273 TraceCheckUtils]: 171: Hoare triple {221318#true} assume #t~switch947; {221318#true} is VALID [2018-11-19 18:36:24,288 INFO L273 TraceCheckUtils]: 172: Hoare triple {221318#true} assume 1 == ~ldv_state_variable_0~0; {221318#true} is VALID [2018-11-19 18:36:24,288 INFO L256 TraceCheckUtils]: 173: Hoare triple {221318#true} call #t~ret948 := ims_pcu_driver_init(); {221318#true} is VALID [2018-11-19 18:36:24,288 INFO L273 TraceCheckUtils]: 174: Hoare triple {221318#true} havoc ~tmp~46; {221318#true} is VALID [2018-11-19 18:36:24,288 INFO L256 TraceCheckUtils]: 175: Hoare triple {221318#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {221318#true} is VALID [2018-11-19 18:36:24,289 INFO L273 TraceCheckUtils]: 176: Hoare triple {221318#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {221318#true} is VALID [2018-11-19 18:36:24,289 INFO L256 TraceCheckUtils]: 177: Hoare triple {221318#true} call ldv_usb_driver_1(); {221318#true} is VALID [2018-11-19 18:36:24,289 INFO L273 TraceCheckUtils]: 178: Hoare triple {221318#true} havoc ~tmp~53.base, ~tmp~53.offset; {221318#true} is VALID [2018-11-19 18:36:24,289 INFO L256 TraceCheckUtils]: 179: Hoare triple {221318#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {221318#true} is VALID [2018-11-19 18:36:24,289 INFO L273 TraceCheckUtils]: 180: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,289 INFO L273 TraceCheckUtils]: 181: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,289 INFO L273 TraceCheckUtils]: 182: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,289 INFO L268 TraceCheckUtils]: 183: Hoare quadruple {221318#true} {221318#true} #2613#return; {221318#true} is VALID [2018-11-19 18:36:24,290 INFO L273 TraceCheckUtils]: 184: Hoare triple {221318#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {221318#true} is VALID [2018-11-19 18:36:24,290 INFO L273 TraceCheckUtils]: 185: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,290 INFO L268 TraceCheckUtils]: 186: Hoare quadruple {221318#true} {221318#true} #2537#return; {221318#true} is VALID [2018-11-19 18:36:24,290 INFO L273 TraceCheckUtils]: 187: Hoare triple {221318#true} #res := ~ldv_func_res~0; {221318#true} is VALID [2018-11-19 18:36:24,290 INFO L273 TraceCheckUtils]: 188: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,290 INFO L268 TraceCheckUtils]: 189: Hoare quadruple {221318#true} {221318#true} #2777#return; {221318#true} is VALID [2018-11-19 18:36:24,290 INFO L273 TraceCheckUtils]: 190: Hoare triple {221318#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {221318#true} is VALID [2018-11-19 18:36:24,290 INFO L273 TraceCheckUtils]: 191: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,290 INFO L268 TraceCheckUtils]: 192: Hoare quadruple {221318#true} {221318#true} #3035#return; {221318#true} is VALID [2018-11-19 18:36:24,291 INFO L273 TraceCheckUtils]: 193: Hoare triple {221318#true} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {221318#true} is VALID [2018-11-19 18:36:24,292 INFO L273 TraceCheckUtils]: 194: Hoare triple {221318#true} assume !(0 == ~ldv_retval_4~0); {221320#(not (= ~ldv_retval_4~0 0))} is VALID [2018-11-19 18:36:24,293 INFO L273 TraceCheckUtils]: 195: Hoare triple {221320#(not (= ~ldv_retval_4~0 0))} assume !(0 != ~ldv_retval_4~0); {221319#false} is VALID [2018-11-19 18:36:24,293 INFO L273 TraceCheckUtils]: 196: Hoare triple {221319#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,293 INFO L273 TraceCheckUtils]: 197: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,293 INFO L273 TraceCheckUtils]: 198: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,293 INFO L273 TraceCheckUtils]: 199: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,293 INFO L273 TraceCheckUtils]: 200: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,293 INFO L273 TraceCheckUtils]: 201: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,294 INFO L273 TraceCheckUtils]: 202: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,294 INFO L273 TraceCheckUtils]: 203: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,294 INFO L273 TraceCheckUtils]: 204: Hoare triple {221319#false} assume #t~switch909; {221319#false} is VALID [2018-11-19 18:36:24,294 INFO L273 TraceCheckUtils]: 205: Hoare triple {221319#false} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {221319#false} is VALID [2018-11-19 18:36:24,294 INFO L273 TraceCheckUtils]: 206: Hoare triple {221319#false} assume #t~switch937; {221319#false} is VALID [2018-11-19 18:36:24,294 INFO L273 TraceCheckUtils]: 207: Hoare triple {221319#false} assume 1 == ~ldv_state_variable_1~0; {221319#false} is VALID [2018-11-19 18:36:24,294 INFO L256 TraceCheckUtils]: 208: Hoare triple {221319#false} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {221318#true} is VALID [2018-11-19 18:36:24,294 INFO L273 TraceCheckUtils]: 209: Hoare triple {221318#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {221318#true} is VALID [2018-11-19 18:36:24,295 INFO L256 TraceCheckUtils]: 210: Hoare triple {221318#true} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {221318#true} is VALID [2018-11-19 18:36:24,295 INFO L273 TraceCheckUtils]: 211: Hoare triple {221318#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {221318#true} is VALID [2018-11-19 18:36:24,295 INFO L256 TraceCheckUtils]: 212: Hoare triple {221318#true} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {221318#true} is VALID [2018-11-19 18:36:24,295 INFO L273 TraceCheckUtils]: 213: Hoare triple {221318#true} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {221318#true} is VALID [2018-11-19 18:36:24,295 INFO L256 TraceCheckUtils]: 214: Hoare triple {221318#true} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {221318#true} is VALID [2018-11-19 18:36:24,296 INFO L273 TraceCheckUtils]: 215: Hoare triple {221318#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {221318#true} is VALID [2018-11-19 18:36:24,296 INFO L273 TraceCheckUtils]: 216: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,296 INFO L268 TraceCheckUtils]: 217: Hoare quadruple {221318#true} {221318#true} #2817#return; {221318#true} is VALID [2018-11-19 18:36:24,296 INFO L273 TraceCheckUtils]: 218: Hoare triple {221318#true} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {221318#true} is VALID [2018-11-19 18:36:24,296 INFO L273 TraceCheckUtils]: 219: Hoare triple {221318#true} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {221318#true} is VALID [2018-11-19 18:36:24,296 INFO L273 TraceCheckUtils]: 220: Hoare triple {221318#true} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {221318#true} is VALID [2018-11-19 18:36:24,297 INFO L273 TraceCheckUtils]: 221: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,297 INFO L268 TraceCheckUtils]: 222: Hoare quadruple {221318#true} {221318#true} #3151#return; {221318#true} is VALID [2018-11-19 18:36:24,297 INFO L273 TraceCheckUtils]: 223: Hoare triple {221318#true} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {221318#true} is VALID [2018-11-19 18:36:24,297 INFO L273 TraceCheckUtils]: 224: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,297 INFO L268 TraceCheckUtils]: 225: Hoare quadruple {221318#true} {221318#true} #3095#return; {221318#true} is VALID [2018-11-19 18:36:24,297 INFO L273 TraceCheckUtils]: 226: Hoare triple {221318#true} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {221318#true} is VALID [2018-11-19 18:36:24,297 INFO L256 TraceCheckUtils]: 227: Hoare triple {221318#true} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {221318#true} is VALID [2018-11-19 18:36:24,297 INFO L273 TraceCheckUtils]: 228: Hoare triple {221318#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {221318#true} is VALID [2018-11-19 18:36:24,298 INFO L256 TraceCheckUtils]: 229: Hoare triple {221318#true} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {221318#true} is VALID [2018-11-19 18:36:24,298 INFO L273 TraceCheckUtils]: 230: Hoare triple {221318#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {221318#true} is VALID [2018-11-19 18:36:24,298 INFO L256 TraceCheckUtils]: 231: Hoare triple {221318#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {221318#true} is VALID [2018-11-19 18:36:24,298 INFO L273 TraceCheckUtils]: 232: Hoare triple {221318#true} ~size := #in~size;~t := #in~t; {221318#true} is VALID [2018-11-19 18:36:24,298 INFO L256 TraceCheckUtils]: 233: Hoare triple {221318#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {221318#true} is VALID [2018-11-19 18:36:24,298 INFO L273 TraceCheckUtils]: 234: Hoare triple {221318#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {221318#true} is VALID [2018-11-19 18:36:24,298 INFO L273 TraceCheckUtils]: 235: Hoare triple {221318#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,298 INFO L273 TraceCheckUtils]: 236: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,298 INFO L268 TraceCheckUtils]: 237: Hoare quadruple {221318#true} {221318#true} #2691#return; {221318#true} is VALID [2018-11-19 18:36:24,299 INFO L273 TraceCheckUtils]: 238: Hoare triple {221318#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {221318#true} is VALID [2018-11-19 18:36:24,299 INFO L273 TraceCheckUtils]: 239: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,299 INFO L268 TraceCheckUtils]: 240: Hoare quadruple {221318#true} {221318#true} #2781#return; {221318#true} is VALID [2018-11-19 18:36:24,299 INFO L273 TraceCheckUtils]: 241: Hoare triple {221318#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {221318#true} is VALID [2018-11-19 18:36:24,299 INFO L273 TraceCheckUtils]: 242: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,299 INFO L268 TraceCheckUtils]: 243: Hoare quadruple {221318#true} {221318#true} #2779#return; {221318#true} is VALID [2018-11-19 18:36:24,299 INFO L273 TraceCheckUtils]: 244: Hoare triple {221318#true} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {221318#true} is VALID [2018-11-19 18:36:24,299 INFO L273 TraceCheckUtils]: 245: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,300 INFO L268 TraceCheckUtils]: 246: Hoare quadruple {221318#true} {221318#true} #3097#return; {221318#true} is VALID [2018-11-19 18:36:24,300 INFO L273 TraceCheckUtils]: 247: Hoare triple {221318#true} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {221318#true} is VALID [2018-11-19 18:36:24,300 INFO L273 TraceCheckUtils]: 248: Hoare triple {221318#true} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {221318#true} is VALID [2018-11-19 18:36:24,300 INFO L256 TraceCheckUtils]: 249: Hoare triple {221318#true} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {221318#true} is VALID [2018-11-19 18:36:24,300 INFO L273 TraceCheckUtils]: 250: Hoare triple {221318#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {221318#true} is VALID [2018-11-19 18:36:24,300 INFO L273 TraceCheckUtils]: 251: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,300 INFO L268 TraceCheckUtils]: 252: Hoare quadruple {221318#true} {221318#true} #3099#return; {221318#true} is VALID [2018-11-19 18:36:24,300 INFO L256 TraceCheckUtils]: 253: Hoare triple {221318#true} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {221318#true} is VALID [2018-11-19 18:36:24,300 INFO L273 TraceCheckUtils]: 254: Hoare triple {221318#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {221318#true} is VALID [2018-11-19 18:36:24,301 INFO L273 TraceCheckUtils]: 255: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,301 INFO L268 TraceCheckUtils]: 256: Hoare quadruple {221318#true} {221318#true} #3101#return; {221318#true} is VALID [2018-11-19 18:36:24,301 INFO L256 TraceCheckUtils]: 257: Hoare triple {221318#true} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {221318#true} is VALID [2018-11-19 18:36:24,301 INFO L273 TraceCheckUtils]: 258: Hoare triple {221318#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {221318#true} is VALID [2018-11-19 18:36:24,301 INFO L256 TraceCheckUtils]: 259: Hoare triple {221318#true} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {221318#true} is VALID [2018-11-19 18:36:24,301 INFO L273 TraceCheckUtils]: 260: Hoare triple {221318#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {221318#true} is VALID [2018-11-19 18:36:24,301 INFO L273 TraceCheckUtils]: 261: Hoare triple {221318#true} assume 0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616;havoc #t~nondet638;#res.base, #res.offset := 0, 0;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {221318#true} is VALID [2018-11-19 18:36:24,301 INFO L273 TraceCheckUtils]: 262: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,302 INFO L268 TraceCheckUtils]: 263: Hoare quadruple {221318#true} {221318#true} #3137#return; {221318#true} is VALID [2018-11-19 18:36:24,302 INFO L273 TraceCheckUtils]: 264: Hoare triple {221318#true} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {221318#true} is VALID [2018-11-19 18:36:24,302 INFO L273 TraceCheckUtils]: 265: Hoare triple {221318#true} assume 0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616;#res := -22; {221318#true} is VALID [2018-11-19 18:36:24,302 INFO L273 TraceCheckUtils]: 266: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,302 INFO L268 TraceCheckUtils]: 267: Hoare quadruple {221318#true} {221318#true} #3103#return; {221318#true} is VALID [2018-11-19 18:36:24,302 INFO L273 TraceCheckUtils]: 268: Hoare triple {221318#true} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {221318#true} is VALID [2018-11-19 18:36:24,302 INFO L273 TraceCheckUtils]: 269: Hoare triple {221318#true} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {221318#true} is VALID [2018-11-19 18:36:24,302 INFO L273 TraceCheckUtils]: 270: Hoare triple {221318#true} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {221318#true} is VALID [2018-11-19 18:36:24,302 INFO L256 TraceCheckUtils]: 271: Hoare triple {221318#true} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {221318#true} is VALID [2018-11-19 18:36:24,303 INFO L273 TraceCheckUtils]: 272: Hoare triple {221318#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {221318#true} is VALID [2018-11-19 18:36:24,303 INFO L256 TraceCheckUtils]: 273: Hoare triple {221318#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {221318#true} is VALID [2018-11-19 18:36:24,303 INFO L273 TraceCheckUtils]: 274: Hoare triple {221318#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {221318#true} is VALID [2018-11-19 18:36:24,303 INFO L273 TraceCheckUtils]: 275: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,303 INFO L268 TraceCheckUtils]: 276: Hoare quadruple {221318#true} {221318#true} #2541#return; {221318#true} is VALID [2018-11-19 18:36:24,303 INFO L273 TraceCheckUtils]: 277: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,303 INFO L268 TraceCheckUtils]: 278: Hoare quadruple {221318#true} {221318#true} #3105#return; {221318#true} is VALID [2018-11-19 18:36:24,303 INFO L273 TraceCheckUtils]: 279: Hoare triple {221318#true} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {221318#true} is VALID [2018-11-19 18:36:24,304 INFO L256 TraceCheckUtils]: 280: Hoare triple {221318#true} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {221318#true} is VALID [2018-11-19 18:36:24,304 INFO L273 TraceCheckUtils]: 281: Hoare triple {221318#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {221318#true} is VALID [2018-11-19 18:36:24,304 INFO L256 TraceCheckUtils]: 282: Hoare triple {221318#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {221318#true} is VALID [2018-11-19 18:36:24,304 INFO L273 TraceCheckUtils]: 283: Hoare triple {221318#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {221318#true} is VALID [2018-11-19 18:36:24,304 INFO L273 TraceCheckUtils]: 284: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,304 INFO L268 TraceCheckUtils]: 285: Hoare quadruple {221318#true} {221318#true} #2541#return; {221318#true} is VALID [2018-11-19 18:36:24,304 INFO L273 TraceCheckUtils]: 286: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,304 INFO L268 TraceCheckUtils]: 287: Hoare quadruple {221318#true} {221318#true} #3107#return; {221318#true} is VALID [2018-11-19 18:36:24,304 INFO L273 TraceCheckUtils]: 288: Hoare triple {221318#true} havoc #t~mem837.base, #t~mem837.offset; {221318#true} is VALID [2018-11-19 18:36:24,305 INFO L256 TraceCheckUtils]: 289: Hoare triple {221318#true} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {221318#true} is VALID [2018-11-19 18:36:24,305 INFO L273 TraceCheckUtils]: 290: Hoare triple {221318#true} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {221318#true} is VALID [2018-11-19 18:36:24,305 INFO L273 TraceCheckUtils]: 291: Hoare triple {221318#true} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {221318#true} is VALID [2018-11-19 18:36:24,305 INFO L256 TraceCheckUtils]: 292: Hoare triple {221318#true} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {221318#true} is VALID [2018-11-19 18:36:24,305 INFO L273 TraceCheckUtils]: 293: Hoare triple {221318#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {221318#true} is VALID [2018-11-19 18:36:24,305 INFO L256 TraceCheckUtils]: 294: Hoare triple {221318#true} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {221318#true} is VALID [2018-11-19 18:36:24,305 INFO L273 TraceCheckUtils]: 295: Hoare triple {221318#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {221318#true} is VALID [2018-11-19 18:36:24,305 INFO L256 TraceCheckUtils]: 296: Hoare triple {221318#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {221318#true} is VALID [2018-11-19 18:36:24,305 INFO L273 TraceCheckUtils]: 297: Hoare triple {221318#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {221318#true} is VALID [2018-11-19 18:36:24,306 INFO L273 TraceCheckUtils]: 298: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,306 INFO L268 TraceCheckUtils]: 299: Hoare quadruple {221318#true} {221318#true} #2605#return; {221318#true} is VALID [2018-11-19 18:36:24,306 INFO L273 TraceCheckUtils]: 300: Hoare triple {221318#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {221318#true} is VALID [2018-11-19 18:36:24,306 INFO L256 TraceCheckUtils]: 301: Hoare triple {221318#true} call #t~ret965 := ldv_undef_int(); {221318#true} is VALID [2018-11-19 18:36:24,306 INFO L273 TraceCheckUtils]: 302: Hoare triple {221318#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {221318#true} is VALID [2018-11-19 18:36:24,306 INFO L273 TraceCheckUtils]: 303: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,306 INFO L268 TraceCheckUtils]: 304: Hoare quadruple {221318#true} {221318#true} #2607#return; {221318#true} is VALID [2018-11-19 18:36:24,306 INFO L273 TraceCheckUtils]: 305: Hoare triple {221318#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {221318#true} is VALID [2018-11-19 18:36:24,307 INFO L273 TraceCheckUtils]: 306: Hoare triple {221318#true} assume 0 != ~tmp___0~26; {221318#true} is VALID [2018-11-19 18:36:24,307 INFO L273 TraceCheckUtils]: 307: Hoare triple {221318#true} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {221318#true} is VALID [2018-11-19 18:36:24,307 INFO L273 TraceCheckUtils]: 308: Hoare triple {221318#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {221318#true} is VALID [2018-11-19 18:36:24,307 INFO L273 TraceCheckUtils]: 309: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,307 INFO L268 TraceCheckUtils]: 310: Hoare quadruple {221318#true} {221318#true} #3135#return; {221318#true} is VALID [2018-11-19 18:36:24,307 INFO L273 TraceCheckUtils]: 311: Hoare triple {221318#true} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {221318#true} is VALID [2018-11-19 18:36:24,307 INFO L273 TraceCheckUtils]: 312: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,307 INFO L268 TraceCheckUtils]: 313: Hoare quadruple {221318#true} {221318#true} #2709#return; {221318#true} is VALID [2018-11-19 18:36:24,307 INFO L273 TraceCheckUtils]: 314: Hoare triple {221318#true} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {221318#true} is VALID [2018-11-19 18:36:24,308 INFO L273 TraceCheckUtils]: 315: Hoare triple {221318#true} assume 0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616;havoc #t~mem561.base, #t~mem561.offset;havoc #t~nondet562;call #t~mem563.base, #t~mem563.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem563.base, #t~mem563.offset;~error~18 := -12; {221318#true} is VALID [2018-11-19 18:36:24,308 INFO L273 TraceCheckUtils]: 316: Hoare triple {221318#true} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {221318#true} is VALID [2018-11-19 18:36:24,308 INFO L273 TraceCheckUtils]: 317: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,308 INFO L268 TraceCheckUtils]: 318: Hoare quadruple {221318#true} {221318#true} #3109#return; {221318#true} is VALID [2018-11-19 18:36:24,308 INFO L273 TraceCheckUtils]: 319: Hoare triple {221318#true} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {221318#true} is VALID [2018-11-19 18:36:24,308 INFO L273 TraceCheckUtils]: 320: Hoare triple {221318#true} assume 0 != ~error~25; {221318#true} is VALID [2018-11-19 18:36:24,308 INFO L273 TraceCheckUtils]: 321: Hoare triple {221318#true} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {221318#true} is VALID [2018-11-19 18:36:24,308 INFO L273 TraceCheckUtils]: 322: Hoare triple {221318#true} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {221318#true} is VALID [2018-11-19 18:36:24,309 INFO L273 TraceCheckUtils]: 323: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,309 INFO L268 TraceCheckUtils]: 324: Hoare quadruple {221318#true} {221319#false} #3015#return; {221319#false} is VALID [2018-11-19 18:36:24,309 INFO L273 TraceCheckUtils]: 325: Hoare triple {221319#false} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {221319#false} is VALID [2018-11-19 18:36:24,309 INFO L273 TraceCheckUtils]: 326: Hoare triple {221319#false} assume 0 == ~ldv_retval_3~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {221319#false} is VALID [2018-11-19 18:36:24,309 INFO L273 TraceCheckUtils]: 327: Hoare triple {221319#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,309 INFO L273 TraceCheckUtils]: 328: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,309 INFO L273 TraceCheckUtils]: 329: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,309 INFO L273 TraceCheckUtils]: 330: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,309 INFO L273 TraceCheckUtils]: 331: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,310 INFO L273 TraceCheckUtils]: 332: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,310 INFO L273 TraceCheckUtils]: 333: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,310 INFO L273 TraceCheckUtils]: 334: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,310 INFO L273 TraceCheckUtils]: 335: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,310 INFO L273 TraceCheckUtils]: 336: Hoare triple {221319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {221319#false} is VALID [2018-11-19 18:36:24,310 INFO L273 TraceCheckUtils]: 337: Hoare triple {221319#false} assume #t~switch909; {221319#false} is VALID [2018-11-19 18:36:24,310 INFO L273 TraceCheckUtils]: 338: Hoare triple {221319#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {221319#false} is VALID [2018-11-19 18:36:24,310 INFO L273 TraceCheckUtils]: 339: Hoare triple {221319#false} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {221319#false} is VALID [2018-11-19 18:36:24,311 INFO L273 TraceCheckUtils]: 340: Hoare triple {221319#false} assume #t~switch947; {221319#false} is VALID [2018-11-19 18:36:24,311 INFO L273 TraceCheckUtils]: 341: Hoare triple {221319#false} assume 1 == ~ldv_state_variable_0~0; {221319#false} is VALID [2018-11-19 18:36:24,311 INFO L256 TraceCheckUtils]: 342: Hoare triple {221319#false} call #t~ret948 := ims_pcu_driver_init(); {221318#true} is VALID [2018-11-19 18:36:24,311 INFO L273 TraceCheckUtils]: 343: Hoare triple {221318#true} havoc ~tmp~46; {221318#true} is VALID [2018-11-19 18:36:24,311 INFO L256 TraceCheckUtils]: 344: Hoare triple {221318#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {221318#true} is VALID [2018-11-19 18:36:24,311 INFO L273 TraceCheckUtils]: 345: Hoare triple {221318#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {221318#true} is VALID [2018-11-19 18:36:24,311 INFO L256 TraceCheckUtils]: 346: Hoare triple {221318#true} call ldv_usb_driver_1(); {221318#true} is VALID [2018-11-19 18:36:24,311 INFO L273 TraceCheckUtils]: 347: Hoare triple {221318#true} havoc ~tmp~53.base, ~tmp~53.offset; {221318#true} is VALID [2018-11-19 18:36:24,311 INFO L256 TraceCheckUtils]: 348: Hoare triple {221318#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {221318#true} is VALID [2018-11-19 18:36:24,312 INFO L273 TraceCheckUtils]: 349: Hoare triple {221318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {221318#true} is VALID [2018-11-19 18:36:24,312 INFO L273 TraceCheckUtils]: 350: Hoare triple {221318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {221318#true} is VALID [2018-11-19 18:36:24,312 INFO L273 TraceCheckUtils]: 351: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,312 INFO L268 TraceCheckUtils]: 352: Hoare quadruple {221318#true} {221318#true} #2613#return; {221318#true} is VALID [2018-11-19 18:36:24,312 INFO L273 TraceCheckUtils]: 353: Hoare triple {221318#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {221318#true} is VALID [2018-11-19 18:36:24,312 INFO L273 TraceCheckUtils]: 354: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,312 INFO L268 TraceCheckUtils]: 355: Hoare quadruple {221318#true} {221318#true} #2537#return; {221318#true} is VALID [2018-11-19 18:36:24,312 INFO L273 TraceCheckUtils]: 356: Hoare triple {221318#true} #res := ~ldv_func_res~0; {221318#true} is VALID [2018-11-19 18:36:24,313 INFO L273 TraceCheckUtils]: 357: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,313 INFO L268 TraceCheckUtils]: 358: Hoare quadruple {221318#true} {221318#true} #2777#return; {221318#true} is VALID [2018-11-19 18:36:24,313 INFO L273 TraceCheckUtils]: 359: Hoare triple {221318#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {221318#true} is VALID [2018-11-19 18:36:24,313 INFO L273 TraceCheckUtils]: 360: Hoare triple {221318#true} assume true; {221318#true} is VALID [2018-11-19 18:36:24,313 INFO L268 TraceCheckUtils]: 361: Hoare quadruple {221318#true} {221319#false} #3035#return; {221319#false} is VALID [2018-11-19 18:36:24,313 INFO L273 TraceCheckUtils]: 362: Hoare triple {221319#false} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {221319#false} is VALID [2018-11-19 18:36:24,313 INFO L273 TraceCheckUtils]: 363: Hoare triple {221319#false} assume !(0 == ~ldv_retval_4~0); {221319#false} is VALID [2018-11-19 18:36:24,313 INFO L273 TraceCheckUtils]: 364: Hoare triple {221319#false} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {221319#false} is VALID [2018-11-19 18:36:24,313 INFO L256 TraceCheckUtils]: 365: Hoare triple {221319#false} call ldv_check_final_state(); {221319#false} is VALID [2018-11-19 18:36:24,314 INFO L273 TraceCheckUtils]: 366: Hoare triple {221319#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {221319#false} is VALID [2018-11-19 18:36:24,314 INFO L256 TraceCheckUtils]: 367: Hoare triple {221319#false} call ldv_error(); {221319#false} is VALID [2018-11-19 18:36:24,314 INFO L273 TraceCheckUtils]: 368: Hoare triple {221319#false} assume !false; {221319#false} is VALID [2018-11-19 18:36:24,355 INFO L134 CoverageAnalysis]: Checked inductivity of 1368 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 1340 trivial. 0 not checked. [2018-11-19 18:36:24,356 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:36:24,356 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 18:36:24,357 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 369 [2018-11-19 18:36:24,357 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:36:24,357 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 18:36:24,727 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 260 edges. 260 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:36:24,727 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 18:36:24,728 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 18:36:24,728 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:36:24,728 INFO L87 Difference]: Start difference. First operand 6478 states and 8802 transitions. Second operand 3 states. [2018-11-19 18:36:46,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:36:46,672 INFO L93 Difference]: Finished difference Result 10237 states and 13903 transitions. [2018-11-19 18:36:46,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 18:36:46,673 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 369 [2018-11-19 18:36:46,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:36:46,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:36:46,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3261 transitions. [2018-11-19 18:36:46,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 18:36:46,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3261 transitions. [2018-11-19 18:36:46,800 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 3261 transitions. [2018-11-19 18:36:49,497 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3261 edges. 3261 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:36:50,260 INFO L225 Difference]: With dead ends: 10237 [2018-11-19 18:36:50,260 INFO L226 Difference]: Without dead ends: 3823 [2018-11-19 18:36:50,271 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 18:36:50,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3823 states. [2018-11-19 18:36:58,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3823 to 3818. [2018-11-19 18:36:58,757 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:36:58,757 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3823 states. Second operand 3818 states. [2018-11-19 18:36:58,757 INFO L74 IsIncluded]: Start isIncluded. First operand 3823 states. Second operand 3818 states. [2018-11-19 18:36:58,757 INFO L87 Difference]: Start difference. First operand 3823 states. Second operand 3818 states. [2018-11-19 18:36:59,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:36:59,220 INFO L93 Difference]: Finished difference Result 3823 states and 5188 transitions. [2018-11-19 18:36:59,220 INFO L276 IsEmpty]: Start isEmpty. Operand 3823 states and 5188 transitions. [2018-11-19 18:36:59,225 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:36:59,225 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:36:59,225 INFO L74 IsIncluded]: Start isIncluded. First operand 3818 states. Second operand 3823 states. [2018-11-19 18:36:59,225 INFO L87 Difference]: Start difference. First operand 3818 states. Second operand 3823 states. [2018-11-19 18:36:59,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:36:59,695 INFO L93 Difference]: Finished difference Result 3823 states and 5188 transitions. [2018-11-19 18:36:59,695 INFO L276 IsEmpty]: Start isEmpty. Operand 3823 states and 5188 transitions. [2018-11-19 18:36:59,699 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:36:59,700 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:36:59,700 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:36:59,700 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:36:59,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3818 states. [2018-11-19 18:37:00,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3818 states to 3818 states and 5184 transitions. [2018-11-19 18:37:00,344 INFO L78 Accepts]: Start accepts. Automaton has 3818 states and 5184 transitions. Word has length 369 [2018-11-19 18:37:00,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:37:00,345 INFO L480 AbstractCegarLoop]: Abstraction has 3818 states and 5184 transitions. [2018-11-19 18:37:00,345 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 18:37:00,345 INFO L276 IsEmpty]: Start isEmpty. Operand 3818 states and 5184 transitions. [2018-11-19 18:37:00,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 455 [2018-11-19 18:37:00,350 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:37:00,351 INFO L384 BasicCegarLoop]: trace histogram [37, 37, 37, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:37:00,351 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:37:00,351 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:37:00,351 INFO L82 PathProgramCache]: Analyzing trace with hash -2118209950, now seen corresponding path program 1 times [2018-11-19 18:37:00,351 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:37:00,351 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:37:00,353 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:37:00,353 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:37:00,354 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:37:00,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:37:00,668 INFO L256 TraceCheckUtils]: 0: Hoare triple {247665#true} call ULTIMATE.init(); {247665#true} is VALID [2018-11-19 18:37:00,668 INFO L273 TraceCheckUtils]: 1: Hoare triple {247665#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,669 INFO L273 TraceCheckUtils]: 2: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,669 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {247665#true} {247665#true} #3175#return; {247665#true} is VALID [2018-11-19 18:37:00,669 INFO L256 TraceCheckUtils]: 4: Hoare triple {247665#true} call #t~ret973 := main(); {247665#true} is VALID [2018-11-19 18:37:00,669 INFO L273 TraceCheckUtils]: 5: Hoare triple {247665#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {247665#true} is VALID [2018-11-19 18:37:00,669 INFO L256 TraceCheckUtils]: 6: Hoare triple {247665#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {247665#true} is VALID [2018-11-19 18:37:00,669 INFO L273 TraceCheckUtils]: 7: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,669 INFO L273 TraceCheckUtils]: 8: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,669 INFO L273 TraceCheckUtils]: 9: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,670 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {247665#true} {247665#true} #2927#return; {247665#true} is VALID [2018-11-19 18:37:00,670 INFO L273 TraceCheckUtils]: 11: Hoare triple {247665#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {247665#true} is VALID [2018-11-19 18:37:00,670 INFO L256 TraceCheckUtils]: 12: Hoare triple {247665#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {247665#true} is VALID [2018-11-19 18:37:00,670 INFO L273 TraceCheckUtils]: 13: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,670 INFO L273 TraceCheckUtils]: 14: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,670 INFO L273 TraceCheckUtils]: 15: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,670 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {247665#true} {247665#true} #2929#return; {247665#true} is VALID [2018-11-19 18:37:00,670 INFO L273 TraceCheckUtils]: 17: Hoare triple {247665#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {247665#true} is VALID [2018-11-19 18:37:00,670 INFO L256 TraceCheckUtils]: 18: Hoare triple {247665#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {247665#true} is VALID [2018-11-19 18:37:00,671 INFO L273 TraceCheckUtils]: 19: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,671 INFO L273 TraceCheckUtils]: 20: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,671 INFO L273 TraceCheckUtils]: 21: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,671 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {247665#true} {247665#true} #2931#return; {247665#true} is VALID [2018-11-19 18:37:00,671 INFO L273 TraceCheckUtils]: 23: Hoare triple {247665#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {247665#true} is VALID [2018-11-19 18:37:00,671 INFO L256 TraceCheckUtils]: 24: Hoare triple {247665#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {247665#true} is VALID [2018-11-19 18:37:00,671 INFO L273 TraceCheckUtils]: 25: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,671 INFO L273 TraceCheckUtils]: 26: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,672 INFO L273 TraceCheckUtils]: 27: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,672 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {247665#true} {247665#true} #2933#return; {247665#true} is VALID [2018-11-19 18:37:00,672 INFO L273 TraceCheckUtils]: 29: Hoare triple {247665#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {247665#true} is VALID [2018-11-19 18:37:00,672 INFO L256 TraceCheckUtils]: 30: Hoare triple {247665#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {247665#true} is VALID [2018-11-19 18:37:00,672 INFO L273 TraceCheckUtils]: 31: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,672 INFO L273 TraceCheckUtils]: 32: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,672 INFO L273 TraceCheckUtils]: 33: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,672 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {247665#true} {247665#true} #2935#return; {247665#true} is VALID [2018-11-19 18:37:00,672 INFO L273 TraceCheckUtils]: 35: Hoare triple {247665#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {247665#true} is VALID [2018-11-19 18:37:00,673 INFO L256 TraceCheckUtils]: 36: Hoare triple {247665#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {247665#true} is VALID [2018-11-19 18:37:00,673 INFO L273 TraceCheckUtils]: 37: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,673 INFO L273 TraceCheckUtils]: 38: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,673 INFO L273 TraceCheckUtils]: 39: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,673 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {247665#true} {247665#true} #2937#return; {247665#true} is VALID [2018-11-19 18:37:00,673 INFO L273 TraceCheckUtils]: 41: Hoare triple {247665#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {247665#true} is VALID [2018-11-19 18:37:00,673 INFO L256 TraceCheckUtils]: 42: Hoare triple {247665#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {247665#true} is VALID [2018-11-19 18:37:00,673 INFO L273 TraceCheckUtils]: 43: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,674 INFO L273 TraceCheckUtils]: 44: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,674 INFO L273 TraceCheckUtils]: 45: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,674 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {247665#true} {247665#true} #2939#return; {247665#true} is VALID [2018-11-19 18:37:00,674 INFO L273 TraceCheckUtils]: 47: Hoare triple {247665#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {247665#true} is VALID [2018-11-19 18:37:00,674 INFO L256 TraceCheckUtils]: 48: Hoare triple {247665#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {247665#true} is VALID [2018-11-19 18:37:00,674 INFO L273 TraceCheckUtils]: 49: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,674 INFO L273 TraceCheckUtils]: 50: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,674 INFO L273 TraceCheckUtils]: 51: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,674 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {247665#true} {247665#true} #2941#return; {247665#true} is VALID [2018-11-19 18:37:00,675 INFO L273 TraceCheckUtils]: 53: Hoare triple {247665#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {247665#true} is VALID [2018-11-19 18:37:00,675 INFO L256 TraceCheckUtils]: 54: Hoare triple {247665#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {247665#true} is VALID [2018-11-19 18:37:00,675 INFO L273 TraceCheckUtils]: 55: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,675 INFO L273 TraceCheckUtils]: 56: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,675 INFO L273 TraceCheckUtils]: 57: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,675 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {247665#true} {247665#true} #2943#return; {247665#true} is VALID [2018-11-19 18:37:00,675 INFO L273 TraceCheckUtils]: 59: Hoare triple {247665#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {247665#true} is VALID [2018-11-19 18:37:00,675 INFO L256 TraceCheckUtils]: 60: Hoare triple {247665#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {247665#true} is VALID [2018-11-19 18:37:00,675 INFO L273 TraceCheckUtils]: 61: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,676 INFO L273 TraceCheckUtils]: 62: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,676 INFO L273 TraceCheckUtils]: 63: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,676 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {247665#true} {247665#true} #2945#return; {247665#true} is VALID [2018-11-19 18:37:00,676 INFO L273 TraceCheckUtils]: 65: Hoare triple {247665#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {247665#true} is VALID [2018-11-19 18:37:00,676 INFO L256 TraceCheckUtils]: 66: Hoare triple {247665#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {247665#true} is VALID [2018-11-19 18:37:00,676 INFO L273 TraceCheckUtils]: 67: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,676 INFO L273 TraceCheckUtils]: 68: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,677 INFO L273 TraceCheckUtils]: 69: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,677 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {247665#true} {247665#true} #2947#return; {247665#true} is VALID [2018-11-19 18:37:00,677 INFO L273 TraceCheckUtils]: 71: Hoare triple {247665#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {247665#true} is VALID [2018-11-19 18:37:00,677 INFO L256 TraceCheckUtils]: 72: Hoare triple {247665#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {247665#true} is VALID [2018-11-19 18:37:00,677 INFO L273 TraceCheckUtils]: 73: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,677 INFO L273 TraceCheckUtils]: 74: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,677 INFO L273 TraceCheckUtils]: 75: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,678 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {247665#true} {247665#true} #2949#return; {247665#true} is VALID [2018-11-19 18:37:00,678 INFO L273 TraceCheckUtils]: 77: Hoare triple {247665#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {247665#true} is VALID [2018-11-19 18:37:00,678 INFO L256 TraceCheckUtils]: 78: Hoare triple {247665#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {247665#true} is VALID [2018-11-19 18:37:00,678 INFO L273 TraceCheckUtils]: 79: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,678 INFO L273 TraceCheckUtils]: 80: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,678 INFO L273 TraceCheckUtils]: 81: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,679 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {247665#true} {247665#true} #2951#return; {247665#true} is VALID [2018-11-19 18:37:00,679 INFO L273 TraceCheckUtils]: 83: Hoare triple {247665#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {247665#true} is VALID [2018-11-19 18:37:00,679 INFO L256 TraceCheckUtils]: 84: Hoare triple {247665#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {247665#true} is VALID [2018-11-19 18:37:00,679 INFO L273 TraceCheckUtils]: 85: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,679 INFO L273 TraceCheckUtils]: 86: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,679 INFO L273 TraceCheckUtils]: 87: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,680 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {247665#true} {247665#true} #2953#return; {247665#true} is VALID [2018-11-19 18:37:00,680 INFO L273 TraceCheckUtils]: 89: Hoare triple {247665#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {247665#true} is VALID [2018-11-19 18:37:00,680 INFO L256 TraceCheckUtils]: 90: Hoare triple {247665#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {247665#true} is VALID [2018-11-19 18:37:00,680 INFO L273 TraceCheckUtils]: 91: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,680 INFO L273 TraceCheckUtils]: 92: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,680 INFO L273 TraceCheckUtils]: 93: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,680 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {247665#true} {247665#true} #2955#return; {247665#true} is VALID [2018-11-19 18:37:00,680 INFO L273 TraceCheckUtils]: 95: Hoare triple {247665#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {247665#true} is VALID [2018-11-19 18:37:00,681 INFO L256 TraceCheckUtils]: 96: Hoare triple {247665#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {247665#true} is VALID [2018-11-19 18:37:00,681 INFO L273 TraceCheckUtils]: 97: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,681 INFO L273 TraceCheckUtils]: 98: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,681 INFO L273 TraceCheckUtils]: 99: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,681 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {247665#true} {247665#true} #2957#return; {247665#true} is VALID [2018-11-19 18:37:00,681 INFO L273 TraceCheckUtils]: 101: Hoare triple {247665#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {247665#true} is VALID [2018-11-19 18:37:00,681 INFO L256 TraceCheckUtils]: 102: Hoare triple {247665#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {247665#true} is VALID [2018-11-19 18:37:00,681 INFO L273 TraceCheckUtils]: 103: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,681 INFO L273 TraceCheckUtils]: 104: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,682 INFO L273 TraceCheckUtils]: 105: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,682 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {247665#true} {247665#true} #2959#return; {247665#true} is VALID [2018-11-19 18:37:00,682 INFO L273 TraceCheckUtils]: 107: Hoare triple {247665#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {247665#true} is VALID [2018-11-19 18:37:00,682 INFO L256 TraceCheckUtils]: 108: Hoare triple {247665#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {247665#true} is VALID [2018-11-19 18:37:00,682 INFO L273 TraceCheckUtils]: 109: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,682 INFO L273 TraceCheckUtils]: 110: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,682 INFO L273 TraceCheckUtils]: 111: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,682 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {247665#true} {247665#true} #2961#return; {247665#true} is VALID [2018-11-19 18:37:00,682 INFO L273 TraceCheckUtils]: 113: Hoare triple {247665#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {247665#true} is VALID [2018-11-19 18:37:00,683 INFO L256 TraceCheckUtils]: 114: Hoare triple {247665#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {247665#true} is VALID [2018-11-19 18:37:00,683 INFO L273 TraceCheckUtils]: 115: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,683 INFO L273 TraceCheckUtils]: 116: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,683 INFO L273 TraceCheckUtils]: 117: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,683 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {247665#true} {247665#true} #2963#return; {247665#true} is VALID [2018-11-19 18:37:00,683 INFO L273 TraceCheckUtils]: 119: Hoare triple {247665#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {247665#true} is VALID [2018-11-19 18:37:00,683 INFO L256 TraceCheckUtils]: 120: Hoare triple {247665#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {247665#true} is VALID [2018-11-19 18:37:00,683 INFO L273 TraceCheckUtils]: 121: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,683 INFO L273 TraceCheckUtils]: 122: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,684 INFO L273 TraceCheckUtils]: 123: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,684 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {247665#true} {247665#true} #2965#return; {247665#true} is VALID [2018-11-19 18:37:00,684 INFO L273 TraceCheckUtils]: 125: Hoare triple {247665#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {247665#true} is VALID [2018-11-19 18:37:00,684 INFO L256 TraceCheckUtils]: 126: Hoare triple {247665#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {247665#true} is VALID [2018-11-19 18:37:00,684 INFO L273 TraceCheckUtils]: 127: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,684 INFO L273 TraceCheckUtils]: 128: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,684 INFO L273 TraceCheckUtils]: 129: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,684 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {247665#true} {247665#true} #2967#return; {247665#true} is VALID [2018-11-19 18:37:00,685 INFO L273 TraceCheckUtils]: 131: Hoare triple {247665#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {247665#true} is VALID [2018-11-19 18:37:00,685 INFO L256 TraceCheckUtils]: 132: Hoare triple {247665#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {247665#true} is VALID [2018-11-19 18:37:00,685 INFO L273 TraceCheckUtils]: 133: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,685 INFO L273 TraceCheckUtils]: 134: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,685 INFO L273 TraceCheckUtils]: 135: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,685 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {247665#true} {247665#true} #2969#return; {247665#true} is VALID [2018-11-19 18:37:00,685 INFO L273 TraceCheckUtils]: 137: Hoare triple {247665#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {247665#true} is VALID [2018-11-19 18:37:00,685 INFO L256 TraceCheckUtils]: 138: Hoare triple {247665#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {247665#true} is VALID [2018-11-19 18:37:00,685 INFO L273 TraceCheckUtils]: 139: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,685 INFO L273 TraceCheckUtils]: 140: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,686 INFO L273 TraceCheckUtils]: 141: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,686 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {247665#true} {247665#true} #2971#return; {247665#true} is VALID [2018-11-19 18:37:00,686 INFO L273 TraceCheckUtils]: 143: Hoare triple {247665#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {247665#true} is VALID [2018-11-19 18:37:00,686 INFO L256 TraceCheckUtils]: 144: Hoare triple {247665#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {247665#true} is VALID [2018-11-19 18:37:00,686 INFO L273 TraceCheckUtils]: 145: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,686 INFO L273 TraceCheckUtils]: 146: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,686 INFO L273 TraceCheckUtils]: 147: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,686 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {247665#true} {247665#true} #2973#return; {247665#true} is VALID [2018-11-19 18:37:00,686 INFO L273 TraceCheckUtils]: 149: Hoare triple {247665#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {247665#true} is VALID [2018-11-19 18:37:00,687 INFO L256 TraceCheckUtils]: 150: Hoare triple {247665#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {247665#true} is VALID [2018-11-19 18:37:00,687 INFO L273 TraceCheckUtils]: 151: Hoare triple {247665#true} #t~loopctr974 := 0; {247665#true} is VALID [2018-11-19 18:37:00,687 INFO L273 TraceCheckUtils]: 152: Hoare triple {247665#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {247665#true} is VALID [2018-11-19 18:37:00,687 INFO L273 TraceCheckUtils]: 153: Hoare triple {247665#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {247665#true} is VALID [2018-11-19 18:37:00,687 INFO L273 TraceCheckUtils]: 154: Hoare triple {247665#true} assume !(#t~loopctr974 < #amount); {247665#true} is VALID [2018-11-19 18:37:00,687 INFO L273 TraceCheckUtils]: 155: Hoare triple {247665#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {247665#true} is VALID [2018-11-19 18:37:00,687 INFO L268 TraceCheckUtils]: 156: Hoare quadruple {247665#true} {247665#true} #2975#return; {247665#true} is VALID [2018-11-19 18:37:00,687 INFO L273 TraceCheckUtils]: 157: Hoare triple {247665#true} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {247665#true} is VALID [2018-11-19 18:37:00,687 INFO L273 TraceCheckUtils]: 158: Hoare triple {247665#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,688 INFO L273 TraceCheckUtils]: 159: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,688 INFO L273 TraceCheckUtils]: 160: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,688 INFO L273 TraceCheckUtils]: 161: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,688 INFO L273 TraceCheckUtils]: 162: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,688 INFO L273 TraceCheckUtils]: 163: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,688 INFO L273 TraceCheckUtils]: 164: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,688 INFO L273 TraceCheckUtils]: 165: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,688 INFO L273 TraceCheckUtils]: 166: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,688 INFO L273 TraceCheckUtils]: 167: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,689 INFO L273 TraceCheckUtils]: 168: Hoare triple {247665#true} assume #t~switch909; {247665#true} is VALID [2018-11-19 18:37:00,689 INFO L273 TraceCheckUtils]: 169: Hoare triple {247665#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {247665#true} is VALID [2018-11-19 18:37:00,689 INFO L273 TraceCheckUtils]: 170: Hoare triple {247665#true} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {247665#true} is VALID [2018-11-19 18:37:00,689 INFO L273 TraceCheckUtils]: 171: Hoare triple {247665#true} assume #t~switch947; {247665#true} is VALID [2018-11-19 18:37:00,689 INFO L273 TraceCheckUtils]: 172: Hoare triple {247665#true} assume 1 == ~ldv_state_variable_0~0; {247665#true} is VALID [2018-11-19 18:37:00,689 INFO L256 TraceCheckUtils]: 173: Hoare triple {247665#true} call #t~ret948 := ims_pcu_driver_init(); {247665#true} is VALID [2018-11-19 18:37:00,689 INFO L273 TraceCheckUtils]: 174: Hoare triple {247665#true} havoc ~tmp~46; {247665#true} is VALID [2018-11-19 18:37:00,689 INFO L256 TraceCheckUtils]: 175: Hoare triple {247665#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {247665#true} is VALID [2018-11-19 18:37:00,689 INFO L273 TraceCheckUtils]: 176: Hoare triple {247665#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {247665#true} is VALID [2018-11-19 18:37:00,689 INFO L256 TraceCheckUtils]: 177: Hoare triple {247665#true} call ldv_usb_driver_1(); {247665#true} is VALID [2018-11-19 18:37:00,690 INFO L273 TraceCheckUtils]: 178: Hoare triple {247665#true} havoc ~tmp~53.base, ~tmp~53.offset; {247665#true} is VALID [2018-11-19 18:37:00,690 INFO L256 TraceCheckUtils]: 179: Hoare triple {247665#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {247665#true} is VALID [2018-11-19 18:37:00,690 INFO L273 TraceCheckUtils]: 180: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,690 INFO L273 TraceCheckUtils]: 181: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,690 INFO L273 TraceCheckUtils]: 182: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,690 INFO L268 TraceCheckUtils]: 183: Hoare quadruple {247665#true} {247665#true} #2613#return; {247665#true} is VALID [2018-11-19 18:37:00,690 INFO L273 TraceCheckUtils]: 184: Hoare triple {247665#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {247665#true} is VALID [2018-11-19 18:37:00,690 INFO L273 TraceCheckUtils]: 185: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,690 INFO L268 TraceCheckUtils]: 186: Hoare quadruple {247665#true} {247665#true} #2537#return; {247665#true} is VALID [2018-11-19 18:37:00,691 INFO L273 TraceCheckUtils]: 187: Hoare triple {247665#true} #res := ~ldv_func_res~0; {247665#true} is VALID [2018-11-19 18:37:00,691 INFO L273 TraceCheckUtils]: 188: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,691 INFO L268 TraceCheckUtils]: 189: Hoare quadruple {247665#true} {247665#true} #2777#return; {247665#true} is VALID [2018-11-19 18:37:00,691 INFO L273 TraceCheckUtils]: 190: Hoare triple {247665#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {247665#true} is VALID [2018-11-19 18:37:00,691 INFO L273 TraceCheckUtils]: 191: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,691 INFO L268 TraceCheckUtils]: 192: Hoare quadruple {247665#true} {247665#true} #3035#return; {247665#true} is VALID [2018-11-19 18:37:00,691 INFO L273 TraceCheckUtils]: 193: Hoare triple {247665#true} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {247665#true} is VALID [2018-11-19 18:37:00,691 INFO L273 TraceCheckUtils]: 194: Hoare triple {247665#true} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_10~0 := 1; {247665#true} is VALID [2018-11-19 18:37:00,691 INFO L256 TraceCheckUtils]: 195: Hoare triple {247665#true} call ldv_initialize_ims_pcu_attribute_10(); {247665#true} is VALID [2018-11-19 18:37:00,692 INFO L273 TraceCheckUtils]: 196: Hoare triple {247665#true} havoc ~tmp~47.base, ~tmp~47.offset;havoc ~tmp___0~19.base, ~tmp___0~19.offset; {247665#true} is VALID [2018-11-19 18:37:00,692 INFO L256 TraceCheckUtils]: 197: Hoare triple {247665#true} call #t~ret861.base, #t~ret861.offset := ldv_zalloc(1376); {247665#true} is VALID [2018-11-19 18:37:00,692 INFO L273 TraceCheckUtils]: 198: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,692 INFO L273 TraceCheckUtils]: 199: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,692 INFO L273 TraceCheckUtils]: 200: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,692 INFO L268 TraceCheckUtils]: 201: Hoare quadruple {247665#true} {247665#true} #2807#return; {247665#true} is VALID [2018-11-19 18:37:00,692 INFO L273 TraceCheckUtils]: 202: Hoare triple {247665#true} ~tmp~47.base, ~tmp~47.offset := #t~ret861.base, #t~ret861.offset;havoc #t~ret861.base, #t~ret861.offset;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := ~tmp~47.base, ~tmp~47.offset; {247665#true} is VALID [2018-11-19 18:37:00,692 INFO L256 TraceCheckUtils]: 203: Hoare triple {247665#true} call #t~ret862.base, #t~ret862.offset := ldv_zalloc(48); {247665#true} is VALID [2018-11-19 18:37:00,692 INFO L273 TraceCheckUtils]: 204: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,693 INFO L273 TraceCheckUtils]: 205: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,693 INFO L273 TraceCheckUtils]: 206: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,693 INFO L268 TraceCheckUtils]: 207: Hoare quadruple {247665#true} {247665#true} #2809#return; {247665#true} is VALID [2018-11-19 18:37:00,693 INFO L273 TraceCheckUtils]: 208: Hoare triple {247665#true} ~tmp___0~19.base, ~tmp___0~19.offset := #t~ret862.base, #t~ret862.offset;havoc #t~ret862.base, #t~ret862.offset;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := ~tmp___0~19.base, ~tmp___0~19.offset; {247665#true} is VALID [2018-11-19 18:37:00,693 INFO L273 TraceCheckUtils]: 209: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,693 INFO L268 TraceCheckUtils]: 210: Hoare quadruple {247665#true} {247665#true} #3037#return; {247665#true} is VALID [2018-11-19 18:37:00,693 INFO L273 TraceCheckUtils]: 211: Hoare triple {247665#true} ~ldv_state_variable_4~0 := 1;~ldv_state_variable_8~0 := 1; {247665#true} is VALID [2018-11-19 18:37:00,693 INFO L256 TraceCheckUtils]: 212: Hoare triple {247665#true} call ldv_initialize_ims_pcu_attribute_8(); {247665#true} is VALID [2018-11-19 18:37:00,693 INFO L273 TraceCheckUtils]: 213: Hoare triple {247665#true} havoc ~tmp~51.base, ~tmp~51.offset;havoc ~tmp___0~23.base, ~tmp___0~23.offset; {247665#true} is VALID [2018-11-19 18:37:00,694 INFO L256 TraceCheckUtils]: 214: Hoare triple {247665#true} call #t~ret869.base, #t~ret869.offset := ldv_zalloc(1376); {247665#true} is VALID [2018-11-19 18:37:00,694 INFO L273 TraceCheckUtils]: 215: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,694 INFO L273 TraceCheckUtils]: 216: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,694 INFO L273 TraceCheckUtils]: 217: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,694 INFO L268 TraceCheckUtils]: 218: Hoare quadruple {247665#true} {247665#true} #2631#return; {247665#true} is VALID [2018-11-19 18:37:00,694 INFO L273 TraceCheckUtils]: 219: Hoare triple {247665#true} ~tmp~51.base, ~tmp~51.offset := #t~ret869.base, #t~ret869.offset;havoc #t~ret869.base, #t~ret869.offset;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := ~tmp~51.base, ~tmp~51.offset; {247665#true} is VALID [2018-11-19 18:37:00,694 INFO L256 TraceCheckUtils]: 220: Hoare triple {247665#true} call #t~ret870.base, #t~ret870.offset := ldv_zalloc(48); {247665#true} is VALID [2018-11-19 18:37:00,694 INFO L273 TraceCheckUtils]: 221: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,694 INFO L273 TraceCheckUtils]: 222: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,694 INFO L273 TraceCheckUtils]: 223: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,695 INFO L268 TraceCheckUtils]: 224: Hoare quadruple {247665#true} {247665#true} #2633#return; {247665#true} is VALID [2018-11-19 18:37:00,695 INFO L273 TraceCheckUtils]: 225: Hoare triple {247665#true} ~tmp___0~23.base, ~tmp___0~23.offset := #t~ret870.base, #t~ret870.offset;havoc #t~ret870.base, #t~ret870.offset;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := ~tmp___0~23.base, ~tmp___0~23.offset; {247665#true} is VALID [2018-11-19 18:37:00,695 INFO L273 TraceCheckUtils]: 226: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,695 INFO L268 TraceCheckUtils]: 227: Hoare quadruple {247665#true} {247665#true} #3039#return; {247665#true} is VALID [2018-11-19 18:37:00,695 INFO L273 TraceCheckUtils]: 228: Hoare triple {247665#true} ~ldv_state_variable_2~0 := 1;~ldv_state_variable_9~0 := 1; {247665#true} is VALID [2018-11-19 18:37:00,695 INFO L256 TraceCheckUtils]: 229: Hoare triple {247665#true} call ldv_initialize_ims_pcu_attribute_9(); {247665#true} is VALID [2018-11-19 18:37:00,695 INFO L273 TraceCheckUtils]: 230: Hoare triple {247665#true} havoc ~tmp~49.base, ~tmp~49.offset;havoc ~tmp___0~21.base, ~tmp___0~21.offset; {247665#true} is VALID [2018-11-19 18:37:00,695 INFO L256 TraceCheckUtils]: 231: Hoare triple {247665#true} call #t~ret865.base, #t~ret865.offset := ldv_zalloc(1376); {247665#true} is VALID [2018-11-19 18:37:00,695 INFO L273 TraceCheckUtils]: 232: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,696 INFO L273 TraceCheckUtils]: 233: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,696 INFO L273 TraceCheckUtils]: 234: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,696 INFO L268 TraceCheckUtils]: 235: Hoare quadruple {247665#true} {247665#true} #2627#return; {247665#true} is VALID [2018-11-19 18:37:00,696 INFO L273 TraceCheckUtils]: 236: Hoare triple {247665#true} ~tmp~49.base, ~tmp~49.offset := #t~ret865.base, #t~ret865.offset;havoc #t~ret865.base, #t~ret865.offset;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := ~tmp~49.base, ~tmp~49.offset; {247665#true} is VALID [2018-11-19 18:37:00,696 INFO L256 TraceCheckUtils]: 237: Hoare triple {247665#true} call #t~ret866.base, #t~ret866.offset := ldv_zalloc(48); {247665#true} is VALID [2018-11-19 18:37:00,696 INFO L273 TraceCheckUtils]: 238: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,696 INFO L273 TraceCheckUtils]: 239: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,696 INFO L273 TraceCheckUtils]: 240: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,696 INFO L268 TraceCheckUtils]: 241: Hoare quadruple {247665#true} {247665#true} #2629#return; {247665#true} is VALID [2018-11-19 18:37:00,697 INFO L273 TraceCheckUtils]: 242: Hoare triple {247665#true} ~tmp___0~21.base, ~tmp___0~21.offset := #t~ret866.base, #t~ret866.offset;havoc #t~ret866.base, #t~ret866.offset;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := ~tmp___0~21.base, ~tmp___0~21.offset; {247665#true} is VALID [2018-11-19 18:37:00,697 INFO L273 TraceCheckUtils]: 243: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,697 INFO L268 TraceCheckUtils]: 244: Hoare quadruple {247665#true} {247665#true} #3041#return; {247665#true} is VALID [2018-11-19 18:37:00,697 INFO L273 TraceCheckUtils]: 245: Hoare triple {247665#true} ~ldv_state_variable_7~0 := 1; {247665#true} is VALID [2018-11-19 18:37:00,697 INFO L256 TraceCheckUtils]: 246: Hoare triple {247665#true} call ldv_initialize_ims_pcu_attribute_7(); {247665#true} is VALID [2018-11-19 18:37:00,697 INFO L273 TraceCheckUtils]: 247: Hoare triple {247665#true} havoc ~tmp~52.base, ~tmp~52.offset;havoc ~tmp___0~24.base, ~tmp___0~24.offset; {247665#true} is VALID [2018-11-19 18:37:00,697 INFO L256 TraceCheckUtils]: 248: Hoare triple {247665#true} call #t~ret871.base, #t~ret871.offset := ldv_zalloc(1376); {247665#true} is VALID [2018-11-19 18:37:00,697 INFO L273 TraceCheckUtils]: 249: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,697 INFO L273 TraceCheckUtils]: 250: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,698 INFO L273 TraceCheckUtils]: 251: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,698 INFO L268 TraceCheckUtils]: 252: Hoare quadruple {247665#true} {247665#true} #2619#return; {247665#true} is VALID [2018-11-19 18:37:00,698 INFO L273 TraceCheckUtils]: 253: Hoare triple {247665#true} ~tmp~52.base, ~tmp~52.offset := #t~ret871.base, #t~ret871.offset;havoc #t~ret871.base, #t~ret871.offset;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := ~tmp~52.base, ~tmp~52.offset; {247665#true} is VALID [2018-11-19 18:37:00,698 INFO L256 TraceCheckUtils]: 254: Hoare triple {247665#true} call #t~ret872.base, #t~ret872.offset := ldv_zalloc(48); {247665#true} is VALID [2018-11-19 18:37:00,698 INFO L273 TraceCheckUtils]: 255: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,698 INFO L273 TraceCheckUtils]: 256: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,698 INFO L273 TraceCheckUtils]: 257: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,698 INFO L268 TraceCheckUtils]: 258: Hoare quadruple {247665#true} {247665#true} #2621#return; {247665#true} is VALID [2018-11-19 18:37:00,698 INFO L273 TraceCheckUtils]: 259: Hoare triple {247665#true} ~tmp___0~24.base, ~tmp___0~24.offset := #t~ret872.base, #t~ret872.offset;havoc #t~ret872.base, #t~ret872.offset;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := ~tmp___0~24.base, ~tmp___0~24.offset; {247665#true} is VALID [2018-11-19 18:37:00,699 INFO L273 TraceCheckUtils]: 260: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,699 INFO L268 TraceCheckUtils]: 261: Hoare quadruple {247665#true} {247665#true} #3043#return; {247665#true} is VALID [2018-11-19 18:37:00,699 INFO L273 TraceCheckUtils]: 262: Hoare triple {247665#true} ~ldv_state_variable_3~0 := 1;~ldv_state_variable_11~0 := 1; {247665#true} is VALID [2018-11-19 18:37:00,699 INFO L256 TraceCheckUtils]: 263: Hoare triple {247665#true} call ldv_initialize_ims_pcu_attribute_11(); {247665#true} is VALID [2018-11-19 18:37:00,699 INFO L273 TraceCheckUtils]: 264: Hoare triple {247665#true} havoc ~tmp~50.base, ~tmp~50.offset;havoc ~tmp___0~22.base, ~tmp___0~22.offset; {247665#true} is VALID [2018-11-19 18:37:00,699 INFO L256 TraceCheckUtils]: 265: Hoare triple {247665#true} call #t~ret867.base, #t~ret867.offset := ldv_zalloc(1376); {247665#true} is VALID [2018-11-19 18:37:00,699 INFO L273 TraceCheckUtils]: 266: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,699 INFO L273 TraceCheckUtils]: 267: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,699 INFO L273 TraceCheckUtils]: 268: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,700 INFO L268 TraceCheckUtils]: 269: Hoare quadruple {247665#true} {247665#true} #2811#return; {247665#true} is VALID [2018-11-19 18:37:00,700 INFO L273 TraceCheckUtils]: 270: Hoare triple {247665#true} ~tmp~50.base, ~tmp~50.offset := #t~ret867.base, #t~ret867.offset;havoc #t~ret867.base, #t~ret867.offset;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := ~tmp~50.base, ~tmp~50.offset; {247665#true} is VALID [2018-11-19 18:37:00,700 INFO L256 TraceCheckUtils]: 271: Hoare triple {247665#true} call #t~ret868.base, #t~ret868.offset := ldv_zalloc(48); {247665#true} is VALID [2018-11-19 18:37:00,700 INFO L273 TraceCheckUtils]: 272: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,700 INFO L273 TraceCheckUtils]: 273: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,700 INFO L273 TraceCheckUtils]: 274: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,700 INFO L268 TraceCheckUtils]: 275: Hoare quadruple {247665#true} {247665#true} #2813#return; {247665#true} is VALID [2018-11-19 18:37:00,700 INFO L273 TraceCheckUtils]: 276: Hoare triple {247665#true} ~tmp___0~22.base, ~tmp___0~22.offset := #t~ret868.base, #t~ret868.offset;havoc #t~ret868.base, #t~ret868.offset;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := ~tmp___0~22.base, ~tmp___0~22.offset; {247665#true} is VALID [2018-11-19 18:37:00,700 INFO L273 TraceCheckUtils]: 277: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,700 INFO L268 TraceCheckUtils]: 278: Hoare quadruple {247665#true} {247665#true} #3045#return; {247665#true} is VALID [2018-11-19 18:37:00,701 INFO L273 TraceCheckUtils]: 279: Hoare triple {247665#true} ~ldv_state_variable_6~0 := 1; {247665#true} is VALID [2018-11-19 18:37:00,701 INFO L256 TraceCheckUtils]: 280: Hoare triple {247665#true} call ldv_initialize_ims_pcu_attribute_6(); {247665#true} is VALID [2018-11-19 18:37:00,701 INFO L273 TraceCheckUtils]: 281: Hoare triple {247665#true} havoc ~tmp~48.base, ~tmp~48.offset;havoc ~tmp___0~20.base, ~tmp___0~20.offset; {247665#true} is VALID [2018-11-19 18:37:00,701 INFO L256 TraceCheckUtils]: 282: Hoare triple {247665#true} call #t~ret863.base, #t~ret863.offset := ldv_zalloc(1376); {247665#true} is VALID [2018-11-19 18:37:00,701 INFO L273 TraceCheckUtils]: 283: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,701 INFO L273 TraceCheckUtils]: 284: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,701 INFO L273 TraceCheckUtils]: 285: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,701 INFO L268 TraceCheckUtils]: 286: Hoare quadruple {247665#true} {247665#true} #2623#return; {247665#true} is VALID [2018-11-19 18:37:00,701 INFO L273 TraceCheckUtils]: 287: Hoare triple {247665#true} ~tmp~48.base, ~tmp~48.offset := #t~ret863.base, #t~ret863.offset;havoc #t~ret863.base, #t~ret863.offset;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := ~tmp~48.base, ~tmp~48.offset; {247665#true} is VALID [2018-11-19 18:37:00,702 INFO L256 TraceCheckUtils]: 288: Hoare triple {247665#true} call #t~ret864.base, #t~ret864.offset := ldv_zalloc(48); {247665#true} is VALID [2018-11-19 18:37:00,702 INFO L273 TraceCheckUtils]: 289: Hoare triple {247665#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {247665#true} is VALID [2018-11-19 18:37:00,702 INFO L273 TraceCheckUtils]: 290: Hoare triple {247665#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,702 INFO L273 TraceCheckUtils]: 291: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,702 INFO L268 TraceCheckUtils]: 292: Hoare quadruple {247665#true} {247665#true} #2625#return; {247665#true} is VALID [2018-11-19 18:37:00,702 INFO L273 TraceCheckUtils]: 293: Hoare triple {247665#true} ~tmp___0~20.base, ~tmp___0~20.offset := #t~ret864.base, #t~ret864.offset;havoc #t~ret864.base, #t~ret864.offset;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := ~tmp___0~20.base, ~tmp___0~20.offset; {247665#true} is VALID [2018-11-19 18:37:00,702 INFO L273 TraceCheckUtils]: 294: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,702 INFO L268 TraceCheckUtils]: 295: Hoare quadruple {247665#true} {247665#true} #3047#return; {247665#true} is VALID [2018-11-19 18:37:00,702 INFO L273 TraceCheckUtils]: 296: Hoare triple {247665#true} assume !(0 != ~ldv_retval_4~0); {247665#true} is VALID [2018-11-19 18:37:00,703 INFO L273 TraceCheckUtils]: 297: Hoare triple {247665#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,703 INFO L273 TraceCheckUtils]: 298: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,703 INFO L273 TraceCheckUtils]: 299: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,703 INFO L273 TraceCheckUtils]: 300: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,703 INFO L273 TraceCheckUtils]: 301: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,703 INFO L273 TraceCheckUtils]: 302: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,703 INFO L273 TraceCheckUtils]: 303: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,703 INFO L273 TraceCheckUtils]: 304: Hoare triple {247665#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {247665#true} is VALID [2018-11-19 18:37:00,703 INFO L273 TraceCheckUtils]: 305: Hoare triple {247665#true} assume #t~switch909; {247665#true} is VALID [2018-11-19 18:37:00,703 INFO L273 TraceCheckUtils]: 306: Hoare triple {247665#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {247665#true} is VALID [2018-11-19 18:37:00,704 INFO L273 TraceCheckUtils]: 307: Hoare triple {247665#true} assume #t~switch937; {247665#true} is VALID [2018-11-19 18:37:00,704 INFO L273 TraceCheckUtils]: 308: Hoare triple {247665#true} assume 1 == ~ldv_state_variable_1~0; {247665#true} is VALID [2018-11-19 18:37:00,704 INFO L256 TraceCheckUtils]: 309: Hoare triple {247665#true} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {247665#true} is VALID [2018-11-19 18:37:00,704 INFO L273 TraceCheckUtils]: 310: Hoare triple {247665#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {247665#true} is VALID [2018-11-19 18:37:00,704 INFO L256 TraceCheckUtils]: 311: Hoare triple {247665#true} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {247665#true} is VALID [2018-11-19 18:37:00,704 INFO L273 TraceCheckUtils]: 312: Hoare triple {247665#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {247665#true} is VALID [2018-11-19 18:37:00,704 INFO L256 TraceCheckUtils]: 313: Hoare triple {247665#true} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {247665#true} is VALID [2018-11-19 18:37:00,704 INFO L273 TraceCheckUtils]: 314: Hoare triple {247665#true} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {247665#true} is VALID [2018-11-19 18:37:00,704 INFO L256 TraceCheckUtils]: 315: Hoare triple {247665#true} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {247665#true} is VALID [2018-11-19 18:37:00,705 INFO L273 TraceCheckUtils]: 316: Hoare triple {247665#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {247665#true} is VALID [2018-11-19 18:37:00,705 INFO L273 TraceCheckUtils]: 317: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,705 INFO L268 TraceCheckUtils]: 318: Hoare quadruple {247665#true} {247665#true} #2817#return; {247665#true} is VALID [2018-11-19 18:37:00,705 INFO L273 TraceCheckUtils]: 319: Hoare triple {247665#true} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {247665#true} is VALID [2018-11-19 18:37:00,705 INFO L273 TraceCheckUtils]: 320: Hoare triple {247665#true} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {247665#true} is VALID [2018-11-19 18:37:00,705 INFO L273 TraceCheckUtils]: 321: Hoare triple {247665#true} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {247665#true} is VALID [2018-11-19 18:37:00,705 INFO L273 TraceCheckUtils]: 322: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,705 INFO L268 TraceCheckUtils]: 323: Hoare quadruple {247665#true} {247665#true} #3151#return; {247665#true} is VALID [2018-11-19 18:37:00,705 INFO L273 TraceCheckUtils]: 324: Hoare triple {247665#true} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {247665#true} is VALID [2018-11-19 18:37:00,706 INFO L273 TraceCheckUtils]: 325: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,706 INFO L268 TraceCheckUtils]: 326: Hoare quadruple {247665#true} {247665#true} #3095#return; {247665#true} is VALID [2018-11-19 18:37:00,706 INFO L273 TraceCheckUtils]: 327: Hoare triple {247665#true} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {247665#true} is VALID [2018-11-19 18:37:00,706 INFO L256 TraceCheckUtils]: 328: Hoare triple {247665#true} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {247665#true} is VALID [2018-11-19 18:37:00,706 INFO L273 TraceCheckUtils]: 329: Hoare triple {247665#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {247665#true} is VALID [2018-11-19 18:37:00,706 INFO L256 TraceCheckUtils]: 330: Hoare triple {247665#true} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {247665#true} is VALID [2018-11-19 18:37:00,706 INFO L273 TraceCheckUtils]: 331: Hoare triple {247665#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {247665#true} is VALID [2018-11-19 18:37:00,706 INFO L256 TraceCheckUtils]: 332: Hoare triple {247665#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {247665#true} is VALID [2018-11-19 18:37:00,706 INFO L273 TraceCheckUtils]: 333: Hoare triple {247665#true} ~size := #in~size;~t := #in~t; {247665#true} is VALID [2018-11-19 18:37:00,707 INFO L256 TraceCheckUtils]: 334: Hoare triple {247665#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {247665#true} is VALID [2018-11-19 18:37:00,707 INFO L273 TraceCheckUtils]: 335: Hoare triple {247665#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {247665#true} is VALID [2018-11-19 18:37:00,707 INFO L273 TraceCheckUtils]: 336: Hoare triple {247665#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {247665#true} is VALID [2018-11-19 18:37:00,707 INFO L273 TraceCheckUtils]: 337: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,707 INFO L268 TraceCheckUtils]: 338: Hoare quadruple {247665#true} {247665#true} #2691#return; {247665#true} is VALID [2018-11-19 18:37:00,707 INFO L273 TraceCheckUtils]: 339: Hoare triple {247665#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {247665#true} is VALID [2018-11-19 18:37:00,707 INFO L273 TraceCheckUtils]: 340: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,707 INFO L268 TraceCheckUtils]: 341: Hoare quadruple {247665#true} {247665#true} #2781#return; {247665#true} is VALID [2018-11-19 18:37:00,707 INFO L273 TraceCheckUtils]: 342: Hoare triple {247665#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {247665#true} is VALID [2018-11-19 18:37:00,707 INFO L273 TraceCheckUtils]: 343: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,708 INFO L268 TraceCheckUtils]: 344: Hoare quadruple {247665#true} {247665#true} #2779#return; {247665#true} is VALID [2018-11-19 18:37:00,708 INFO L273 TraceCheckUtils]: 345: Hoare triple {247665#true} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {247665#true} is VALID [2018-11-19 18:37:00,708 INFO L273 TraceCheckUtils]: 346: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,708 INFO L268 TraceCheckUtils]: 347: Hoare quadruple {247665#true} {247665#true} #3097#return; {247665#true} is VALID [2018-11-19 18:37:00,708 INFO L273 TraceCheckUtils]: 348: Hoare triple {247665#true} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {247665#true} is VALID [2018-11-19 18:37:00,708 INFO L273 TraceCheckUtils]: 349: Hoare triple {247665#true} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {247665#true} is VALID [2018-11-19 18:37:00,708 INFO L256 TraceCheckUtils]: 350: Hoare triple {247665#true} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {247665#true} is VALID [2018-11-19 18:37:00,708 INFO L273 TraceCheckUtils]: 351: Hoare triple {247665#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {247665#true} is VALID [2018-11-19 18:37:00,708 INFO L273 TraceCheckUtils]: 352: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,709 INFO L268 TraceCheckUtils]: 353: Hoare quadruple {247665#true} {247665#true} #3099#return; {247665#true} is VALID [2018-11-19 18:37:00,709 INFO L256 TraceCheckUtils]: 354: Hoare triple {247665#true} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {247665#true} is VALID [2018-11-19 18:37:00,709 INFO L273 TraceCheckUtils]: 355: Hoare triple {247665#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {247665#true} is VALID [2018-11-19 18:37:00,709 INFO L273 TraceCheckUtils]: 356: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,709 INFO L268 TraceCheckUtils]: 357: Hoare quadruple {247665#true} {247665#true} #3101#return; {247665#true} is VALID [2018-11-19 18:37:00,709 INFO L256 TraceCheckUtils]: 358: Hoare triple {247665#true} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {247665#true} is VALID [2018-11-19 18:37:00,709 INFO L273 TraceCheckUtils]: 359: Hoare triple {247665#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {247665#true} is VALID [2018-11-19 18:37:00,709 INFO L256 TraceCheckUtils]: 360: Hoare triple {247665#true} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {247665#true} is VALID [2018-11-19 18:37:00,709 INFO L273 TraceCheckUtils]: 361: Hoare triple {247665#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {247665#true} is VALID [2018-11-19 18:37:00,710 INFO L273 TraceCheckUtils]: 362: Hoare triple {247665#true} assume 0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616;havoc #t~nondet638;#res.base, #res.offset := 0, 0;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {247665#true} is VALID [2018-11-19 18:37:00,710 INFO L273 TraceCheckUtils]: 363: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,710 INFO L268 TraceCheckUtils]: 364: Hoare quadruple {247665#true} {247665#true} #3137#return; {247665#true} is VALID [2018-11-19 18:37:00,710 INFO L273 TraceCheckUtils]: 365: Hoare triple {247665#true} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {247665#true} is VALID [2018-11-19 18:37:00,711 INFO L273 TraceCheckUtils]: 366: Hoare triple {247665#true} assume 0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616;#res := -22; {247667#(<= (+ |ims_pcu_parse_cdc_data_#res| 22) 0)} is VALID [2018-11-19 18:37:00,712 INFO L273 TraceCheckUtils]: 367: Hoare triple {247667#(<= (+ |ims_pcu_parse_cdc_data_#res| 22) 0)} assume true; {247667#(<= (+ |ims_pcu_parse_cdc_data_#res| 22) 0)} is VALID [2018-11-19 18:37:00,714 INFO L268 TraceCheckUtils]: 368: Hoare quadruple {247667#(<= (+ |ims_pcu_parse_cdc_data_#res| 22) 0)} {247665#true} #3103#return; {247668#(<= (+ |ims_pcu_probe_#t~ret831| 22) 0)} is VALID [2018-11-19 18:37:00,715 INFO L273 TraceCheckUtils]: 369: Hoare triple {247668#(<= (+ |ims_pcu_probe_#t~ret831| 22) 0)} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {247669#(<= (+ ims_pcu_probe_~error~25 22) 0)} is VALID [2018-11-19 18:37:00,716 INFO L273 TraceCheckUtils]: 370: Hoare triple {247669#(<= (+ ims_pcu_probe_~error~25 22) 0)} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {247666#false} is VALID [2018-11-19 18:37:00,716 INFO L273 TraceCheckUtils]: 371: Hoare triple {247666#false} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {247666#false} is VALID [2018-11-19 18:37:00,716 INFO L256 TraceCheckUtils]: 372: Hoare triple {247666#false} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {247665#true} is VALID [2018-11-19 18:37:00,716 INFO L273 TraceCheckUtils]: 373: Hoare triple {247665#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {247665#true} is VALID [2018-11-19 18:37:00,717 INFO L256 TraceCheckUtils]: 374: Hoare triple {247665#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {247665#true} is VALID [2018-11-19 18:37:00,717 INFO L273 TraceCheckUtils]: 375: Hoare triple {247665#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {247665#true} is VALID [2018-11-19 18:37:00,717 INFO L273 TraceCheckUtils]: 376: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,717 INFO L268 TraceCheckUtils]: 377: Hoare quadruple {247665#true} {247665#true} #2541#return; {247665#true} is VALID [2018-11-19 18:37:00,717 INFO L273 TraceCheckUtils]: 378: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,718 INFO L268 TraceCheckUtils]: 379: Hoare quadruple {247665#true} {247666#false} #3105#return; {247666#false} is VALID [2018-11-19 18:37:00,718 INFO L273 TraceCheckUtils]: 380: Hoare triple {247666#false} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {247666#false} is VALID [2018-11-19 18:37:00,718 INFO L256 TraceCheckUtils]: 381: Hoare triple {247666#false} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {247665#true} is VALID [2018-11-19 18:37:00,718 INFO L273 TraceCheckUtils]: 382: Hoare triple {247665#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {247665#true} is VALID [2018-11-19 18:37:00,718 INFO L256 TraceCheckUtils]: 383: Hoare triple {247665#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {247665#true} is VALID [2018-11-19 18:37:00,719 INFO L273 TraceCheckUtils]: 384: Hoare triple {247665#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {247665#true} is VALID [2018-11-19 18:37:00,719 INFO L273 TraceCheckUtils]: 385: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,719 INFO L268 TraceCheckUtils]: 386: Hoare quadruple {247665#true} {247665#true} #2541#return; {247665#true} is VALID [2018-11-19 18:37:00,719 INFO L273 TraceCheckUtils]: 387: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,719 INFO L268 TraceCheckUtils]: 388: Hoare quadruple {247665#true} {247666#false} #3107#return; {247666#false} is VALID [2018-11-19 18:37:00,719 INFO L273 TraceCheckUtils]: 389: Hoare triple {247666#false} havoc #t~mem837.base, #t~mem837.offset; {247666#false} is VALID [2018-11-19 18:37:00,720 INFO L256 TraceCheckUtils]: 390: Hoare triple {247666#false} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {247665#true} is VALID [2018-11-19 18:37:00,720 INFO L273 TraceCheckUtils]: 391: Hoare triple {247665#true} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {247665#true} is VALID [2018-11-19 18:37:00,720 INFO L273 TraceCheckUtils]: 392: Hoare triple {247665#true} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {247665#true} is VALID [2018-11-19 18:37:00,720 INFO L256 TraceCheckUtils]: 393: Hoare triple {247665#true} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {247665#true} is VALID [2018-11-19 18:37:00,720 INFO L273 TraceCheckUtils]: 394: Hoare triple {247665#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {247665#true} is VALID [2018-11-19 18:37:00,720 INFO L256 TraceCheckUtils]: 395: Hoare triple {247665#true} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {247665#true} is VALID [2018-11-19 18:37:00,720 INFO L273 TraceCheckUtils]: 396: Hoare triple {247665#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {247665#true} is VALID [2018-11-19 18:37:00,720 INFO L256 TraceCheckUtils]: 397: Hoare triple {247665#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {247665#true} is VALID [2018-11-19 18:37:00,720 INFO L273 TraceCheckUtils]: 398: Hoare triple {247665#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {247665#true} is VALID [2018-11-19 18:37:00,721 INFO L273 TraceCheckUtils]: 399: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,721 INFO L268 TraceCheckUtils]: 400: Hoare quadruple {247665#true} {247665#true} #2605#return; {247665#true} is VALID [2018-11-19 18:37:00,721 INFO L273 TraceCheckUtils]: 401: Hoare triple {247665#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {247665#true} is VALID [2018-11-19 18:37:00,721 INFO L256 TraceCheckUtils]: 402: Hoare triple {247665#true} call #t~ret965 := ldv_undef_int(); {247665#true} is VALID [2018-11-19 18:37:00,721 INFO L273 TraceCheckUtils]: 403: Hoare triple {247665#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {247665#true} is VALID [2018-11-19 18:37:00,721 INFO L273 TraceCheckUtils]: 404: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,721 INFO L268 TraceCheckUtils]: 405: Hoare quadruple {247665#true} {247665#true} #2607#return; {247665#true} is VALID [2018-11-19 18:37:00,721 INFO L273 TraceCheckUtils]: 406: Hoare triple {247665#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {247665#true} is VALID [2018-11-19 18:37:00,722 INFO L273 TraceCheckUtils]: 407: Hoare triple {247665#true} assume 0 != ~tmp___0~26; {247665#true} is VALID [2018-11-19 18:37:00,722 INFO L273 TraceCheckUtils]: 408: Hoare triple {247665#true} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {247665#true} is VALID [2018-11-19 18:37:00,722 INFO L273 TraceCheckUtils]: 409: Hoare triple {247665#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {247665#true} is VALID [2018-11-19 18:37:00,722 INFO L273 TraceCheckUtils]: 410: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,722 INFO L268 TraceCheckUtils]: 411: Hoare quadruple {247665#true} {247665#true} #3135#return; {247665#true} is VALID [2018-11-19 18:37:00,722 INFO L273 TraceCheckUtils]: 412: Hoare triple {247665#true} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {247665#true} is VALID [2018-11-19 18:37:00,722 INFO L273 TraceCheckUtils]: 413: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,722 INFO L268 TraceCheckUtils]: 414: Hoare quadruple {247665#true} {247665#true} #2709#return; {247665#true} is VALID [2018-11-19 18:37:00,722 INFO L273 TraceCheckUtils]: 415: Hoare triple {247665#true} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {247665#true} is VALID [2018-11-19 18:37:00,723 INFO L273 TraceCheckUtils]: 416: Hoare triple {247665#true} assume 0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616;havoc #t~mem561.base, #t~mem561.offset;havoc #t~nondet562;call #t~mem563.base, #t~mem563.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem563.base, #t~mem563.offset;~error~18 := -12; {247665#true} is VALID [2018-11-19 18:37:00,723 INFO L273 TraceCheckUtils]: 417: Hoare triple {247665#true} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {247665#true} is VALID [2018-11-19 18:37:00,723 INFO L273 TraceCheckUtils]: 418: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,723 INFO L268 TraceCheckUtils]: 419: Hoare quadruple {247665#true} {247666#false} #3109#return; {247666#false} is VALID [2018-11-19 18:37:00,723 INFO L273 TraceCheckUtils]: 420: Hoare triple {247666#false} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {247666#false} is VALID [2018-11-19 18:37:00,723 INFO L273 TraceCheckUtils]: 421: Hoare triple {247666#false} assume 0 != ~error~25; {247666#false} is VALID [2018-11-19 18:37:00,723 INFO L273 TraceCheckUtils]: 422: Hoare triple {247666#false} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {247666#false} is VALID [2018-11-19 18:37:00,723 INFO L273 TraceCheckUtils]: 423: Hoare triple {247666#false} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {247666#false} is VALID [2018-11-19 18:37:00,724 INFO L273 TraceCheckUtils]: 424: Hoare triple {247666#false} assume true; {247666#false} is VALID [2018-11-19 18:37:00,724 INFO L268 TraceCheckUtils]: 425: Hoare quadruple {247666#false} {247665#true} #3015#return; {247666#false} is VALID [2018-11-19 18:37:00,724 INFO L273 TraceCheckUtils]: 426: Hoare triple {247666#false} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {247666#false} is VALID [2018-11-19 18:37:00,724 INFO L273 TraceCheckUtils]: 427: Hoare triple {247666#false} assume 0 == ~ldv_retval_3~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {247666#false} is VALID [2018-11-19 18:37:00,724 INFO L273 TraceCheckUtils]: 428: Hoare triple {247666#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {247666#false} is VALID [2018-11-19 18:37:00,724 INFO L273 TraceCheckUtils]: 429: Hoare triple {247666#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {247666#false} is VALID [2018-11-19 18:37:00,724 INFO L273 TraceCheckUtils]: 430: Hoare triple {247666#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {247666#false} is VALID [2018-11-19 18:37:00,724 INFO L273 TraceCheckUtils]: 431: Hoare triple {247666#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {247666#false} is VALID [2018-11-19 18:37:00,724 INFO L273 TraceCheckUtils]: 432: Hoare triple {247666#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {247666#false} is VALID [2018-11-19 18:37:00,725 INFO L273 TraceCheckUtils]: 433: Hoare triple {247666#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {247666#false} is VALID [2018-11-19 18:37:00,725 INFO L273 TraceCheckUtils]: 434: Hoare triple {247666#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {247666#false} is VALID [2018-11-19 18:37:00,725 INFO L273 TraceCheckUtils]: 435: Hoare triple {247666#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {247666#false} is VALID [2018-11-19 18:37:00,725 INFO L273 TraceCheckUtils]: 436: Hoare triple {247666#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {247666#false} is VALID [2018-11-19 18:37:00,725 INFO L273 TraceCheckUtils]: 437: Hoare triple {247666#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {247666#false} is VALID [2018-11-19 18:37:00,725 INFO L273 TraceCheckUtils]: 438: Hoare triple {247666#false} assume #t~switch909; {247666#false} is VALID [2018-11-19 18:37:00,725 INFO L273 TraceCheckUtils]: 439: Hoare triple {247666#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {247666#false} is VALID [2018-11-19 18:37:00,725 INFO L273 TraceCheckUtils]: 440: Hoare triple {247666#false} assume #t~switch947; {247666#false} is VALID [2018-11-19 18:37:00,726 INFO L273 TraceCheckUtils]: 441: Hoare triple {247666#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {247666#false} is VALID [2018-11-19 18:37:00,726 INFO L256 TraceCheckUtils]: 442: Hoare triple {247666#false} call ims_pcu_driver_exit(); {247665#true} is VALID [2018-11-19 18:37:00,726 INFO L256 TraceCheckUtils]: 443: Hoare triple {247665#true} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {247665#true} is VALID [2018-11-19 18:37:00,726 INFO L273 TraceCheckUtils]: 444: Hoare triple {247665#true} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {247665#true} is VALID [2018-11-19 18:37:00,726 INFO L273 TraceCheckUtils]: 445: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,726 INFO L268 TraceCheckUtils]: 446: Hoare quadruple {247665#true} {247665#true} #2597#return; {247665#true} is VALID [2018-11-19 18:37:00,726 INFO L273 TraceCheckUtils]: 447: Hoare triple {247665#true} assume true; {247665#true} is VALID [2018-11-19 18:37:00,726 INFO L268 TraceCheckUtils]: 448: Hoare quadruple {247665#true} {247666#false} #3033#return; {247666#false} is VALID [2018-11-19 18:37:00,726 INFO L273 TraceCheckUtils]: 449: Hoare triple {247666#false} ~ldv_state_variable_0~0 := 2; {247666#false} is VALID [2018-11-19 18:37:00,727 INFO L256 TraceCheckUtils]: 450: Hoare triple {247666#false} call ldv_check_final_state(); {247666#false} is VALID [2018-11-19 18:37:00,727 INFO L273 TraceCheckUtils]: 451: Hoare triple {247666#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {247666#false} is VALID [2018-11-19 18:37:00,727 INFO L256 TraceCheckUtils]: 452: Hoare triple {247666#false} call ldv_error(); {247666#false} is VALID [2018-11-19 18:37:00,727 INFO L273 TraceCheckUtils]: 453: Hoare triple {247666#false} assume !false; {247666#false} is VALID [2018-11-19 18:37:00,783 INFO L134 CoverageAnalysis]: Checked inductivity of 2711 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 2689 trivial. 0 not checked. [2018-11-19 18:37:00,783 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:37:00,783 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-19 18:37:00,784 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 454 [2018-11-19 18:37:00,784 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:37:00,785 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-19 18:37:01,202 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 327 edges. 327 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:37:01,203 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-19 18:37:01,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-19 18:37:01,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-19 18:37:01,204 INFO L87 Difference]: Start difference. First operand 3818 states and 5184 transitions. Second operand 5 states. [2018-11-19 18:37:27,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:37:27,699 INFO L93 Difference]: Finished difference Result 7138 states and 9678 transitions. [2018-11-19 18:37:27,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-19 18:37:27,699 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 454 [2018-11-19 18:37:27,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:37:27,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-19 18:37:27,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 3264 transitions. [2018-11-19 18:37:27,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-19 18:37:27,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 3264 transitions. [2018-11-19 18:37:27,829 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 3264 transitions. [2018-11-19 18:37:30,490 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3264 edges. 3264 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:37:31,202 INFO L225 Difference]: With dead ends: 7138 [2018-11-19 18:37:31,203 INFO L226 Difference]: Without dead ends: 3832 [2018-11-19 18:37:31,209 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-19 18:37:31,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3832 states. [2018-11-19 18:37:37,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3832 to 3832. [2018-11-19 18:37:37,740 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:37:37,741 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3832 states. Second operand 3832 states. [2018-11-19 18:37:37,741 INFO L74 IsIncluded]: Start isIncluded. First operand 3832 states. Second operand 3832 states. [2018-11-19 18:37:37,741 INFO L87 Difference]: Start difference. First operand 3832 states. Second operand 3832 states. [2018-11-19 18:37:38,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:37:38,322 INFO L93 Difference]: Finished difference Result 3832 states and 5198 transitions. [2018-11-19 18:37:38,323 INFO L276 IsEmpty]: Start isEmpty. Operand 3832 states and 5198 transitions. [2018-11-19 18:37:38,330 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:37:38,330 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:37:38,330 INFO L74 IsIncluded]: Start isIncluded. First operand 3832 states. Second operand 3832 states. [2018-11-19 18:37:38,330 INFO L87 Difference]: Start difference. First operand 3832 states. Second operand 3832 states. [2018-11-19 18:37:38,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:37:38,914 INFO L93 Difference]: Finished difference Result 3832 states and 5198 transitions. [2018-11-19 18:37:38,915 INFO L276 IsEmpty]: Start isEmpty. Operand 3832 states and 5198 transitions. [2018-11-19 18:37:38,920 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:37:38,920 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:37:38,920 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:37:38,920 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:37:38,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3832 states. [2018-11-19 18:37:39,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3832 states to 3832 states and 5198 transitions. [2018-11-19 18:37:39,661 INFO L78 Accepts]: Start accepts. Automaton has 3832 states and 5198 transitions. Word has length 454 [2018-11-19 18:37:39,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:37:39,661 INFO L480 AbstractCegarLoop]: Abstraction has 3832 states and 5198 transitions. [2018-11-19 18:37:39,661 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-19 18:37:39,661 INFO L276 IsEmpty]: Start isEmpty. Operand 3832 states and 5198 transitions. [2018-11-19 18:37:39,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 499 [2018-11-19 18:37:39,667 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:37:39,668 INFO L384 BasicCegarLoop]: trace histogram [37, 37, 37, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:37:39,668 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:37:39,668 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:37:39,668 INFO L82 PathProgramCache]: Analyzing trace with hash 518709981, now seen corresponding path program 1 times [2018-11-19 18:37:39,668 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:37:39,668 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:37:39,670 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:37:39,671 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:37:39,671 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:37:39,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:37:39,989 INFO L256 TraceCheckUtils]: 0: Hoare triple {269931#true} call ULTIMATE.init(); {269931#true} is VALID [2018-11-19 18:37:39,990 INFO L273 TraceCheckUtils]: 1: Hoare triple {269931#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:39,990 INFO L273 TraceCheckUtils]: 2: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:39,990 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {269931#true} {269931#true} #3175#return; {269931#true} is VALID [2018-11-19 18:37:39,990 INFO L256 TraceCheckUtils]: 4: Hoare triple {269931#true} call #t~ret973 := main(); {269931#true} is VALID [2018-11-19 18:37:39,991 INFO L273 TraceCheckUtils]: 5: Hoare triple {269931#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {269931#true} is VALID [2018-11-19 18:37:39,991 INFO L256 TraceCheckUtils]: 6: Hoare triple {269931#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {269931#true} is VALID [2018-11-19 18:37:39,991 INFO L273 TraceCheckUtils]: 7: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:39,991 INFO L273 TraceCheckUtils]: 8: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:39,991 INFO L273 TraceCheckUtils]: 9: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:39,992 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {269931#true} {269931#true} #2927#return; {269931#true} is VALID [2018-11-19 18:37:39,992 INFO L273 TraceCheckUtils]: 11: Hoare triple {269931#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {269931#true} is VALID [2018-11-19 18:37:39,992 INFO L256 TraceCheckUtils]: 12: Hoare triple {269931#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {269931#true} is VALID [2018-11-19 18:37:39,992 INFO L273 TraceCheckUtils]: 13: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:39,992 INFO L273 TraceCheckUtils]: 14: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:39,992 INFO L273 TraceCheckUtils]: 15: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:39,992 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {269931#true} {269931#true} #2929#return; {269931#true} is VALID [2018-11-19 18:37:39,992 INFO L273 TraceCheckUtils]: 17: Hoare triple {269931#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {269931#true} is VALID [2018-11-19 18:37:39,993 INFO L256 TraceCheckUtils]: 18: Hoare triple {269931#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {269931#true} is VALID [2018-11-19 18:37:39,993 INFO L273 TraceCheckUtils]: 19: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:39,993 INFO L273 TraceCheckUtils]: 20: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:39,993 INFO L273 TraceCheckUtils]: 21: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:39,993 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {269931#true} {269931#true} #2931#return; {269931#true} is VALID [2018-11-19 18:37:39,993 INFO L273 TraceCheckUtils]: 23: Hoare triple {269931#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {269931#true} is VALID [2018-11-19 18:37:39,993 INFO L256 TraceCheckUtils]: 24: Hoare triple {269931#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {269931#true} is VALID [2018-11-19 18:37:39,993 INFO L273 TraceCheckUtils]: 25: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:39,993 INFO L273 TraceCheckUtils]: 26: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:39,994 INFO L273 TraceCheckUtils]: 27: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:39,994 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {269931#true} {269931#true} #2933#return; {269931#true} is VALID [2018-11-19 18:37:39,994 INFO L273 TraceCheckUtils]: 29: Hoare triple {269931#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {269931#true} is VALID [2018-11-19 18:37:39,994 INFO L256 TraceCheckUtils]: 30: Hoare triple {269931#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {269931#true} is VALID [2018-11-19 18:37:39,994 INFO L273 TraceCheckUtils]: 31: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:39,994 INFO L273 TraceCheckUtils]: 32: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:39,994 INFO L273 TraceCheckUtils]: 33: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:39,994 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {269931#true} {269931#true} #2935#return; {269931#true} is VALID [2018-11-19 18:37:39,995 INFO L273 TraceCheckUtils]: 35: Hoare triple {269931#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {269931#true} is VALID [2018-11-19 18:37:39,995 INFO L256 TraceCheckUtils]: 36: Hoare triple {269931#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {269931#true} is VALID [2018-11-19 18:37:39,995 INFO L273 TraceCheckUtils]: 37: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:39,995 INFO L273 TraceCheckUtils]: 38: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:39,995 INFO L273 TraceCheckUtils]: 39: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:39,995 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {269931#true} {269931#true} #2937#return; {269931#true} is VALID [2018-11-19 18:37:39,995 INFO L273 TraceCheckUtils]: 41: Hoare triple {269931#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {269931#true} is VALID [2018-11-19 18:37:39,996 INFO L256 TraceCheckUtils]: 42: Hoare triple {269931#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {269931#true} is VALID [2018-11-19 18:37:39,996 INFO L273 TraceCheckUtils]: 43: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:39,996 INFO L273 TraceCheckUtils]: 44: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:39,996 INFO L273 TraceCheckUtils]: 45: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:39,996 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {269931#true} {269931#true} #2939#return; {269931#true} is VALID [2018-11-19 18:37:39,996 INFO L273 TraceCheckUtils]: 47: Hoare triple {269931#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {269931#true} is VALID [2018-11-19 18:37:39,996 INFO L256 TraceCheckUtils]: 48: Hoare triple {269931#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {269931#true} is VALID [2018-11-19 18:37:39,996 INFO L273 TraceCheckUtils]: 49: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:39,997 INFO L273 TraceCheckUtils]: 50: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:39,997 INFO L273 TraceCheckUtils]: 51: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:39,997 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {269931#true} {269931#true} #2941#return; {269931#true} is VALID [2018-11-19 18:37:39,997 INFO L273 TraceCheckUtils]: 53: Hoare triple {269931#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {269931#true} is VALID [2018-11-19 18:37:39,997 INFO L256 TraceCheckUtils]: 54: Hoare triple {269931#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {269931#true} is VALID [2018-11-19 18:37:39,997 INFO L273 TraceCheckUtils]: 55: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:39,997 INFO L273 TraceCheckUtils]: 56: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:39,997 INFO L273 TraceCheckUtils]: 57: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:39,997 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {269931#true} {269931#true} #2943#return; {269931#true} is VALID [2018-11-19 18:37:39,998 INFO L273 TraceCheckUtils]: 59: Hoare triple {269931#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {269931#true} is VALID [2018-11-19 18:37:39,998 INFO L256 TraceCheckUtils]: 60: Hoare triple {269931#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {269931#true} is VALID [2018-11-19 18:37:39,998 INFO L273 TraceCheckUtils]: 61: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:39,998 INFO L273 TraceCheckUtils]: 62: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:39,998 INFO L273 TraceCheckUtils]: 63: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:39,998 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {269931#true} {269931#true} #2945#return; {269931#true} is VALID [2018-11-19 18:37:39,998 INFO L273 TraceCheckUtils]: 65: Hoare triple {269931#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {269931#true} is VALID [2018-11-19 18:37:39,998 INFO L256 TraceCheckUtils]: 66: Hoare triple {269931#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {269931#true} is VALID [2018-11-19 18:37:39,999 INFO L273 TraceCheckUtils]: 67: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:39,999 INFO L273 TraceCheckUtils]: 68: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:39,999 INFO L273 TraceCheckUtils]: 69: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:39,999 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {269931#true} {269931#true} #2947#return; {269931#true} is VALID [2018-11-19 18:37:39,999 INFO L273 TraceCheckUtils]: 71: Hoare triple {269931#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {269931#true} is VALID [2018-11-19 18:37:39,999 INFO L256 TraceCheckUtils]: 72: Hoare triple {269931#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {269931#true} is VALID [2018-11-19 18:37:39,999 INFO L273 TraceCheckUtils]: 73: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:39,999 INFO L273 TraceCheckUtils]: 74: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,000 INFO L273 TraceCheckUtils]: 75: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,000 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {269931#true} {269931#true} #2949#return; {269931#true} is VALID [2018-11-19 18:37:40,000 INFO L273 TraceCheckUtils]: 77: Hoare triple {269931#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {269931#true} is VALID [2018-11-19 18:37:40,000 INFO L256 TraceCheckUtils]: 78: Hoare triple {269931#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {269931#true} is VALID [2018-11-19 18:37:40,000 INFO L273 TraceCheckUtils]: 79: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,000 INFO L273 TraceCheckUtils]: 80: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,000 INFO L273 TraceCheckUtils]: 81: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,000 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {269931#true} {269931#true} #2951#return; {269931#true} is VALID [2018-11-19 18:37:40,001 INFO L273 TraceCheckUtils]: 83: Hoare triple {269931#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {269931#true} is VALID [2018-11-19 18:37:40,001 INFO L256 TraceCheckUtils]: 84: Hoare triple {269931#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {269931#true} is VALID [2018-11-19 18:37:40,001 INFO L273 TraceCheckUtils]: 85: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,001 INFO L273 TraceCheckUtils]: 86: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,001 INFO L273 TraceCheckUtils]: 87: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,001 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {269931#true} {269931#true} #2953#return; {269931#true} is VALID [2018-11-19 18:37:40,001 INFO L273 TraceCheckUtils]: 89: Hoare triple {269931#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {269931#true} is VALID [2018-11-19 18:37:40,001 INFO L256 TraceCheckUtils]: 90: Hoare triple {269931#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {269931#true} is VALID [2018-11-19 18:37:40,001 INFO L273 TraceCheckUtils]: 91: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,002 INFO L273 TraceCheckUtils]: 92: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,002 INFO L273 TraceCheckUtils]: 93: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,002 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {269931#true} {269931#true} #2955#return; {269931#true} is VALID [2018-11-19 18:37:40,002 INFO L273 TraceCheckUtils]: 95: Hoare triple {269931#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {269931#true} is VALID [2018-11-19 18:37:40,002 INFO L256 TraceCheckUtils]: 96: Hoare triple {269931#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {269931#true} is VALID [2018-11-19 18:37:40,002 INFO L273 TraceCheckUtils]: 97: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,002 INFO L273 TraceCheckUtils]: 98: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,002 INFO L273 TraceCheckUtils]: 99: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,003 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {269931#true} {269931#true} #2957#return; {269931#true} is VALID [2018-11-19 18:37:40,003 INFO L273 TraceCheckUtils]: 101: Hoare triple {269931#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {269931#true} is VALID [2018-11-19 18:37:40,003 INFO L256 TraceCheckUtils]: 102: Hoare triple {269931#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {269931#true} is VALID [2018-11-19 18:37:40,003 INFO L273 TraceCheckUtils]: 103: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,003 INFO L273 TraceCheckUtils]: 104: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,003 INFO L273 TraceCheckUtils]: 105: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,003 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {269931#true} {269931#true} #2959#return; {269931#true} is VALID [2018-11-19 18:37:40,003 INFO L273 TraceCheckUtils]: 107: Hoare triple {269931#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {269931#true} is VALID [2018-11-19 18:37:40,004 INFO L256 TraceCheckUtils]: 108: Hoare triple {269931#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {269931#true} is VALID [2018-11-19 18:37:40,004 INFO L273 TraceCheckUtils]: 109: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,004 INFO L273 TraceCheckUtils]: 110: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,004 INFO L273 TraceCheckUtils]: 111: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,004 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {269931#true} {269931#true} #2961#return; {269931#true} is VALID [2018-11-19 18:37:40,004 INFO L273 TraceCheckUtils]: 113: Hoare triple {269931#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {269931#true} is VALID [2018-11-19 18:37:40,004 INFO L256 TraceCheckUtils]: 114: Hoare triple {269931#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {269931#true} is VALID [2018-11-19 18:37:40,004 INFO L273 TraceCheckUtils]: 115: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,004 INFO L273 TraceCheckUtils]: 116: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,005 INFO L273 TraceCheckUtils]: 117: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,005 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {269931#true} {269931#true} #2963#return; {269931#true} is VALID [2018-11-19 18:37:40,005 INFO L273 TraceCheckUtils]: 119: Hoare triple {269931#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {269931#true} is VALID [2018-11-19 18:37:40,005 INFO L256 TraceCheckUtils]: 120: Hoare triple {269931#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {269931#true} is VALID [2018-11-19 18:37:40,005 INFO L273 TraceCheckUtils]: 121: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,005 INFO L273 TraceCheckUtils]: 122: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,005 INFO L273 TraceCheckUtils]: 123: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,005 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {269931#true} {269931#true} #2965#return; {269931#true} is VALID [2018-11-19 18:37:40,006 INFO L273 TraceCheckUtils]: 125: Hoare triple {269931#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {269931#true} is VALID [2018-11-19 18:37:40,006 INFO L256 TraceCheckUtils]: 126: Hoare triple {269931#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {269931#true} is VALID [2018-11-19 18:37:40,006 INFO L273 TraceCheckUtils]: 127: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,006 INFO L273 TraceCheckUtils]: 128: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,006 INFO L273 TraceCheckUtils]: 129: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,006 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {269931#true} {269931#true} #2967#return; {269931#true} is VALID [2018-11-19 18:37:40,006 INFO L273 TraceCheckUtils]: 131: Hoare triple {269931#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {269931#true} is VALID [2018-11-19 18:37:40,006 INFO L256 TraceCheckUtils]: 132: Hoare triple {269931#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {269931#true} is VALID [2018-11-19 18:37:40,007 INFO L273 TraceCheckUtils]: 133: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,007 INFO L273 TraceCheckUtils]: 134: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,007 INFO L273 TraceCheckUtils]: 135: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,007 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {269931#true} {269931#true} #2969#return; {269931#true} is VALID [2018-11-19 18:37:40,007 INFO L273 TraceCheckUtils]: 137: Hoare triple {269931#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {269931#true} is VALID [2018-11-19 18:37:40,007 INFO L256 TraceCheckUtils]: 138: Hoare triple {269931#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {269931#true} is VALID [2018-11-19 18:37:40,007 INFO L273 TraceCheckUtils]: 139: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,007 INFO L273 TraceCheckUtils]: 140: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,007 INFO L273 TraceCheckUtils]: 141: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,008 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {269931#true} {269931#true} #2971#return; {269931#true} is VALID [2018-11-19 18:37:40,008 INFO L273 TraceCheckUtils]: 143: Hoare triple {269931#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {269931#true} is VALID [2018-11-19 18:37:40,008 INFO L256 TraceCheckUtils]: 144: Hoare triple {269931#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {269931#true} is VALID [2018-11-19 18:37:40,008 INFO L273 TraceCheckUtils]: 145: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,008 INFO L273 TraceCheckUtils]: 146: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,008 INFO L273 TraceCheckUtils]: 147: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,008 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {269931#true} {269931#true} #2973#return; {269931#true} is VALID [2018-11-19 18:37:40,008 INFO L273 TraceCheckUtils]: 149: Hoare triple {269931#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {269931#true} is VALID [2018-11-19 18:37:40,009 INFO L256 TraceCheckUtils]: 150: Hoare triple {269931#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {269931#true} is VALID [2018-11-19 18:37:40,009 INFO L273 TraceCheckUtils]: 151: Hoare triple {269931#true} #t~loopctr974 := 0; {269931#true} is VALID [2018-11-19 18:37:40,009 INFO L273 TraceCheckUtils]: 152: Hoare triple {269931#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {269931#true} is VALID [2018-11-19 18:37:40,009 INFO L273 TraceCheckUtils]: 153: Hoare triple {269931#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {269931#true} is VALID [2018-11-19 18:37:40,009 INFO L273 TraceCheckUtils]: 154: Hoare triple {269931#true} assume !(#t~loopctr974 < #amount); {269931#true} is VALID [2018-11-19 18:37:40,009 INFO L273 TraceCheckUtils]: 155: Hoare triple {269931#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {269931#true} is VALID [2018-11-19 18:37:40,009 INFO L268 TraceCheckUtils]: 156: Hoare quadruple {269931#true} {269931#true} #2975#return; {269931#true} is VALID [2018-11-19 18:37:40,009 INFO L273 TraceCheckUtils]: 157: Hoare triple {269931#true} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {269931#true} is VALID [2018-11-19 18:37:40,010 INFO L273 TraceCheckUtils]: 158: Hoare triple {269931#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,010 INFO L273 TraceCheckUtils]: 159: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,010 INFO L273 TraceCheckUtils]: 160: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,010 INFO L273 TraceCheckUtils]: 161: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,010 INFO L273 TraceCheckUtils]: 162: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,010 INFO L273 TraceCheckUtils]: 163: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,010 INFO L273 TraceCheckUtils]: 164: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,010 INFO L273 TraceCheckUtils]: 165: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,010 INFO L273 TraceCheckUtils]: 166: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,011 INFO L273 TraceCheckUtils]: 167: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,011 INFO L273 TraceCheckUtils]: 168: Hoare triple {269931#true} assume #t~switch909; {269931#true} is VALID [2018-11-19 18:37:40,011 INFO L273 TraceCheckUtils]: 169: Hoare triple {269931#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {269931#true} is VALID [2018-11-19 18:37:40,011 INFO L273 TraceCheckUtils]: 170: Hoare triple {269931#true} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {269931#true} is VALID [2018-11-19 18:37:40,011 INFO L273 TraceCheckUtils]: 171: Hoare triple {269931#true} assume #t~switch947; {269931#true} is VALID [2018-11-19 18:37:40,011 INFO L273 TraceCheckUtils]: 172: Hoare triple {269931#true} assume 1 == ~ldv_state_variable_0~0; {269931#true} is VALID [2018-11-19 18:37:40,011 INFO L256 TraceCheckUtils]: 173: Hoare triple {269931#true} call #t~ret948 := ims_pcu_driver_init(); {269931#true} is VALID [2018-11-19 18:37:40,011 INFO L273 TraceCheckUtils]: 174: Hoare triple {269931#true} havoc ~tmp~46; {269931#true} is VALID [2018-11-19 18:37:40,012 INFO L256 TraceCheckUtils]: 175: Hoare triple {269931#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {269931#true} is VALID [2018-11-19 18:37:40,012 INFO L273 TraceCheckUtils]: 176: Hoare triple {269931#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {269931#true} is VALID [2018-11-19 18:37:40,012 INFO L256 TraceCheckUtils]: 177: Hoare triple {269931#true} call ldv_usb_driver_1(); {269931#true} is VALID [2018-11-19 18:37:40,012 INFO L273 TraceCheckUtils]: 178: Hoare triple {269931#true} havoc ~tmp~53.base, ~tmp~53.offset; {269931#true} is VALID [2018-11-19 18:37:40,012 INFO L256 TraceCheckUtils]: 179: Hoare triple {269931#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {269931#true} is VALID [2018-11-19 18:37:40,012 INFO L273 TraceCheckUtils]: 180: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,012 INFO L273 TraceCheckUtils]: 181: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,012 INFO L273 TraceCheckUtils]: 182: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,012 INFO L268 TraceCheckUtils]: 183: Hoare quadruple {269931#true} {269931#true} #2613#return; {269931#true} is VALID [2018-11-19 18:37:40,013 INFO L273 TraceCheckUtils]: 184: Hoare triple {269931#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {269931#true} is VALID [2018-11-19 18:37:40,013 INFO L273 TraceCheckUtils]: 185: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,013 INFO L268 TraceCheckUtils]: 186: Hoare quadruple {269931#true} {269931#true} #2537#return; {269931#true} is VALID [2018-11-19 18:37:40,013 INFO L273 TraceCheckUtils]: 187: Hoare triple {269931#true} #res := ~ldv_func_res~0; {269931#true} is VALID [2018-11-19 18:37:40,013 INFO L273 TraceCheckUtils]: 188: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,013 INFO L268 TraceCheckUtils]: 189: Hoare quadruple {269931#true} {269931#true} #2777#return; {269931#true} is VALID [2018-11-19 18:37:40,013 INFO L273 TraceCheckUtils]: 190: Hoare triple {269931#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {269931#true} is VALID [2018-11-19 18:37:40,013 INFO L273 TraceCheckUtils]: 191: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,014 INFO L268 TraceCheckUtils]: 192: Hoare quadruple {269931#true} {269931#true} #3035#return; {269931#true} is VALID [2018-11-19 18:37:40,014 INFO L273 TraceCheckUtils]: 193: Hoare triple {269931#true} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {269931#true} is VALID [2018-11-19 18:37:40,014 INFO L273 TraceCheckUtils]: 194: Hoare triple {269931#true} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_10~0 := 1; {269931#true} is VALID [2018-11-19 18:37:40,014 INFO L256 TraceCheckUtils]: 195: Hoare triple {269931#true} call ldv_initialize_ims_pcu_attribute_10(); {269931#true} is VALID [2018-11-19 18:37:40,014 INFO L273 TraceCheckUtils]: 196: Hoare triple {269931#true} havoc ~tmp~47.base, ~tmp~47.offset;havoc ~tmp___0~19.base, ~tmp___0~19.offset; {269931#true} is VALID [2018-11-19 18:37:40,014 INFO L256 TraceCheckUtils]: 197: Hoare triple {269931#true} call #t~ret861.base, #t~ret861.offset := ldv_zalloc(1376); {269931#true} is VALID [2018-11-19 18:37:40,014 INFO L273 TraceCheckUtils]: 198: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,014 INFO L273 TraceCheckUtils]: 199: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,015 INFO L273 TraceCheckUtils]: 200: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,015 INFO L268 TraceCheckUtils]: 201: Hoare quadruple {269931#true} {269931#true} #2807#return; {269931#true} is VALID [2018-11-19 18:37:40,015 INFO L273 TraceCheckUtils]: 202: Hoare triple {269931#true} ~tmp~47.base, ~tmp~47.offset := #t~ret861.base, #t~ret861.offset;havoc #t~ret861.base, #t~ret861.offset;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := ~tmp~47.base, ~tmp~47.offset; {269931#true} is VALID [2018-11-19 18:37:40,015 INFO L256 TraceCheckUtils]: 203: Hoare triple {269931#true} call #t~ret862.base, #t~ret862.offset := ldv_zalloc(48); {269931#true} is VALID [2018-11-19 18:37:40,015 INFO L273 TraceCheckUtils]: 204: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,015 INFO L273 TraceCheckUtils]: 205: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,015 INFO L273 TraceCheckUtils]: 206: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,015 INFO L268 TraceCheckUtils]: 207: Hoare quadruple {269931#true} {269931#true} #2809#return; {269931#true} is VALID [2018-11-19 18:37:40,016 INFO L273 TraceCheckUtils]: 208: Hoare triple {269931#true} ~tmp___0~19.base, ~tmp___0~19.offset := #t~ret862.base, #t~ret862.offset;havoc #t~ret862.base, #t~ret862.offset;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := ~tmp___0~19.base, ~tmp___0~19.offset; {269931#true} is VALID [2018-11-19 18:37:40,016 INFO L273 TraceCheckUtils]: 209: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,016 INFO L268 TraceCheckUtils]: 210: Hoare quadruple {269931#true} {269931#true} #3037#return; {269931#true} is VALID [2018-11-19 18:37:40,016 INFO L273 TraceCheckUtils]: 211: Hoare triple {269931#true} ~ldv_state_variable_4~0 := 1;~ldv_state_variable_8~0 := 1; {269931#true} is VALID [2018-11-19 18:37:40,016 INFO L256 TraceCheckUtils]: 212: Hoare triple {269931#true} call ldv_initialize_ims_pcu_attribute_8(); {269931#true} is VALID [2018-11-19 18:37:40,016 INFO L273 TraceCheckUtils]: 213: Hoare triple {269931#true} havoc ~tmp~51.base, ~tmp~51.offset;havoc ~tmp___0~23.base, ~tmp___0~23.offset; {269931#true} is VALID [2018-11-19 18:37:40,016 INFO L256 TraceCheckUtils]: 214: Hoare triple {269931#true} call #t~ret869.base, #t~ret869.offset := ldv_zalloc(1376); {269931#true} is VALID [2018-11-19 18:37:40,016 INFO L273 TraceCheckUtils]: 215: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,016 INFO L273 TraceCheckUtils]: 216: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,017 INFO L273 TraceCheckUtils]: 217: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,017 INFO L268 TraceCheckUtils]: 218: Hoare quadruple {269931#true} {269931#true} #2631#return; {269931#true} is VALID [2018-11-19 18:37:40,017 INFO L273 TraceCheckUtils]: 219: Hoare triple {269931#true} ~tmp~51.base, ~tmp~51.offset := #t~ret869.base, #t~ret869.offset;havoc #t~ret869.base, #t~ret869.offset;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := ~tmp~51.base, ~tmp~51.offset; {269931#true} is VALID [2018-11-19 18:37:40,017 INFO L256 TraceCheckUtils]: 220: Hoare triple {269931#true} call #t~ret870.base, #t~ret870.offset := ldv_zalloc(48); {269931#true} is VALID [2018-11-19 18:37:40,017 INFO L273 TraceCheckUtils]: 221: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,017 INFO L273 TraceCheckUtils]: 222: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,017 INFO L273 TraceCheckUtils]: 223: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,017 INFO L268 TraceCheckUtils]: 224: Hoare quadruple {269931#true} {269931#true} #2633#return; {269931#true} is VALID [2018-11-19 18:37:40,018 INFO L273 TraceCheckUtils]: 225: Hoare triple {269931#true} ~tmp___0~23.base, ~tmp___0~23.offset := #t~ret870.base, #t~ret870.offset;havoc #t~ret870.base, #t~ret870.offset;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := ~tmp___0~23.base, ~tmp___0~23.offset; {269931#true} is VALID [2018-11-19 18:37:40,018 INFO L273 TraceCheckUtils]: 226: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,018 INFO L268 TraceCheckUtils]: 227: Hoare quadruple {269931#true} {269931#true} #3039#return; {269931#true} is VALID [2018-11-19 18:37:40,018 INFO L273 TraceCheckUtils]: 228: Hoare triple {269931#true} ~ldv_state_variable_2~0 := 1;~ldv_state_variable_9~0 := 1; {269931#true} is VALID [2018-11-19 18:37:40,018 INFO L256 TraceCheckUtils]: 229: Hoare triple {269931#true} call ldv_initialize_ims_pcu_attribute_9(); {269931#true} is VALID [2018-11-19 18:37:40,018 INFO L273 TraceCheckUtils]: 230: Hoare triple {269931#true} havoc ~tmp~49.base, ~tmp~49.offset;havoc ~tmp___0~21.base, ~tmp___0~21.offset; {269931#true} is VALID [2018-11-19 18:37:40,018 INFO L256 TraceCheckUtils]: 231: Hoare triple {269931#true} call #t~ret865.base, #t~ret865.offset := ldv_zalloc(1376); {269931#true} is VALID [2018-11-19 18:37:40,018 INFO L273 TraceCheckUtils]: 232: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,018 INFO L273 TraceCheckUtils]: 233: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,019 INFO L273 TraceCheckUtils]: 234: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,019 INFO L268 TraceCheckUtils]: 235: Hoare quadruple {269931#true} {269931#true} #2627#return; {269931#true} is VALID [2018-11-19 18:37:40,019 INFO L273 TraceCheckUtils]: 236: Hoare triple {269931#true} ~tmp~49.base, ~tmp~49.offset := #t~ret865.base, #t~ret865.offset;havoc #t~ret865.base, #t~ret865.offset;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := ~tmp~49.base, ~tmp~49.offset; {269931#true} is VALID [2018-11-19 18:37:40,019 INFO L256 TraceCheckUtils]: 237: Hoare triple {269931#true} call #t~ret866.base, #t~ret866.offset := ldv_zalloc(48); {269931#true} is VALID [2018-11-19 18:37:40,019 INFO L273 TraceCheckUtils]: 238: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,019 INFO L273 TraceCheckUtils]: 239: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,019 INFO L273 TraceCheckUtils]: 240: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,019 INFO L268 TraceCheckUtils]: 241: Hoare quadruple {269931#true} {269931#true} #2629#return; {269931#true} is VALID [2018-11-19 18:37:40,020 INFO L273 TraceCheckUtils]: 242: Hoare triple {269931#true} ~tmp___0~21.base, ~tmp___0~21.offset := #t~ret866.base, #t~ret866.offset;havoc #t~ret866.base, #t~ret866.offset;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := ~tmp___0~21.base, ~tmp___0~21.offset; {269931#true} is VALID [2018-11-19 18:37:40,020 INFO L273 TraceCheckUtils]: 243: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,020 INFO L268 TraceCheckUtils]: 244: Hoare quadruple {269931#true} {269931#true} #3041#return; {269931#true} is VALID [2018-11-19 18:37:40,020 INFO L273 TraceCheckUtils]: 245: Hoare triple {269931#true} ~ldv_state_variable_7~0 := 1; {269931#true} is VALID [2018-11-19 18:37:40,020 INFO L256 TraceCheckUtils]: 246: Hoare triple {269931#true} call ldv_initialize_ims_pcu_attribute_7(); {269931#true} is VALID [2018-11-19 18:37:40,020 INFO L273 TraceCheckUtils]: 247: Hoare triple {269931#true} havoc ~tmp~52.base, ~tmp~52.offset;havoc ~tmp___0~24.base, ~tmp___0~24.offset; {269931#true} is VALID [2018-11-19 18:37:40,020 INFO L256 TraceCheckUtils]: 248: Hoare triple {269931#true} call #t~ret871.base, #t~ret871.offset := ldv_zalloc(1376); {269931#true} is VALID [2018-11-19 18:37:40,020 INFO L273 TraceCheckUtils]: 249: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,021 INFO L273 TraceCheckUtils]: 250: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,021 INFO L273 TraceCheckUtils]: 251: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,021 INFO L268 TraceCheckUtils]: 252: Hoare quadruple {269931#true} {269931#true} #2619#return; {269931#true} is VALID [2018-11-19 18:37:40,021 INFO L273 TraceCheckUtils]: 253: Hoare triple {269931#true} ~tmp~52.base, ~tmp~52.offset := #t~ret871.base, #t~ret871.offset;havoc #t~ret871.base, #t~ret871.offset;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := ~tmp~52.base, ~tmp~52.offset; {269931#true} is VALID [2018-11-19 18:37:40,021 INFO L256 TraceCheckUtils]: 254: Hoare triple {269931#true} call #t~ret872.base, #t~ret872.offset := ldv_zalloc(48); {269931#true} is VALID [2018-11-19 18:37:40,021 INFO L273 TraceCheckUtils]: 255: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,021 INFO L273 TraceCheckUtils]: 256: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,021 INFO L273 TraceCheckUtils]: 257: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,021 INFO L268 TraceCheckUtils]: 258: Hoare quadruple {269931#true} {269931#true} #2621#return; {269931#true} is VALID [2018-11-19 18:37:40,022 INFO L273 TraceCheckUtils]: 259: Hoare triple {269931#true} ~tmp___0~24.base, ~tmp___0~24.offset := #t~ret872.base, #t~ret872.offset;havoc #t~ret872.base, #t~ret872.offset;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := ~tmp___0~24.base, ~tmp___0~24.offset; {269931#true} is VALID [2018-11-19 18:37:40,022 INFO L273 TraceCheckUtils]: 260: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,022 INFO L268 TraceCheckUtils]: 261: Hoare quadruple {269931#true} {269931#true} #3043#return; {269931#true} is VALID [2018-11-19 18:37:40,022 INFO L273 TraceCheckUtils]: 262: Hoare triple {269931#true} ~ldv_state_variable_3~0 := 1;~ldv_state_variable_11~0 := 1; {269931#true} is VALID [2018-11-19 18:37:40,022 INFO L256 TraceCheckUtils]: 263: Hoare triple {269931#true} call ldv_initialize_ims_pcu_attribute_11(); {269931#true} is VALID [2018-11-19 18:37:40,022 INFO L273 TraceCheckUtils]: 264: Hoare triple {269931#true} havoc ~tmp~50.base, ~tmp~50.offset;havoc ~tmp___0~22.base, ~tmp___0~22.offset; {269931#true} is VALID [2018-11-19 18:37:40,022 INFO L256 TraceCheckUtils]: 265: Hoare triple {269931#true} call #t~ret867.base, #t~ret867.offset := ldv_zalloc(1376); {269931#true} is VALID [2018-11-19 18:37:40,023 INFO L273 TraceCheckUtils]: 266: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,023 INFO L273 TraceCheckUtils]: 267: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,023 INFO L273 TraceCheckUtils]: 268: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,023 INFO L268 TraceCheckUtils]: 269: Hoare quadruple {269931#true} {269931#true} #2811#return; {269931#true} is VALID [2018-11-19 18:37:40,023 INFO L273 TraceCheckUtils]: 270: Hoare triple {269931#true} ~tmp~50.base, ~tmp~50.offset := #t~ret867.base, #t~ret867.offset;havoc #t~ret867.base, #t~ret867.offset;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := ~tmp~50.base, ~tmp~50.offset; {269931#true} is VALID [2018-11-19 18:37:40,024 INFO L256 TraceCheckUtils]: 271: Hoare triple {269931#true} call #t~ret868.base, #t~ret868.offset := ldv_zalloc(48); {269931#true} is VALID [2018-11-19 18:37:40,024 INFO L273 TraceCheckUtils]: 272: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,024 INFO L273 TraceCheckUtils]: 273: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,024 INFO L273 TraceCheckUtils]: 274: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,024 INFO L268 TraceCheckUtils]: 275: Hoare quadruple {269931#true} {269931#true} #2813#return; {269931#true} is VALID [2018-11-19 18:37:40,024 INFO L273 TraceCheckUtils]: 276: Hoare triple {269931#true} ~tmp___0~22.base, ~tmp___0~22.offset := #t~ret868.base, #t~ret868.offset;havoc #t~ret868.base, #t~ret868.offset;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := ~tmp___0~22.base, ~tmp___0~22.offset; {269931#true} is VALID [2018-11-19 18:37:40,025 INFO L273 TraceCheckUtils]: 277: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,025 INFO L268 TraceCheckUtils]: 278: Hoare quadruple {269931#true} {269931#true} #3045#return; {269931#true} is VALID [2018-11-19 18:37:40,025 INFO L273 TraceCheckUtils]: 279: Hoare triple {269931#true} ~ldv_state_variable_6~0 := 1; {269931#true} is VALID [2018-11-19 18:37:40,025 INFO L256 TraceCheckUtils]: 280: Hoare triple {269931#true} call ldv_initialize_ims_pcu_attribute_6(); {269931#true} is VALID [2018-11-19 18:37:40,025 INFO L273 TraceCheckUtils]: 281: Hoare triple {269931#true} havoc ~tmp~48.base, ~tmp~48.offset;havoc ~tmp___0~20.base, ~tmp___0~20.offset; {269931#true} is VALID [2018-11-19 18:37:40,025 INFO L256 TraceCheckUtils]: 282: Hoare triple {269931#true} call #t~ret863.base, #t~ret863.offset := ldv_zalloc(1376); {269931#true} is VALID [2018-11-19 18:37:40,026 INFO L273 TraceCheckUtils]: 283: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,026 INFO L273 TraceCheckUtils]: 284: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,026 INFO L273 TraceCheckUtils]: 285: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,026 INFO L268 TraceCheckUtils]: 286: Hoare quadruple {269931#true} {269931#true} #2623#return; {269931#true} is VALID [2018-11-19 18:37:40,026 INFO L273 TraceCheckUtils]: 287: Hoare triple {269931#true} ~tmp~48.base, ~tmp~48.offset := #t~ret863.base, #t~ret863.offset;havoc #t~ret863.base, #t~ret863.offset;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := ~tmp~48.base, ~tmp~48.offset; {269931#true} is VALID [2018-11-19 18:37:40,026 INFO L256 TraceCheckUtils]: 288: Hoare triple {269931#true} call #t~ret864.base, #t~ret864.offset := ldv_zalloc(48); {269931#true} is VALID [2018-11-19 18:37:40,027 INFO L273 TraceCheckUtils]: 289: Hoare triple {269931#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {269931#true} is VALID [2018-11-19 18:37:40,027 INFO L273 TraceCheckUtils]: 290: Hoare triple {269931#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,027 INFO L273 TraceCheckUtils]: 291: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,027 INFO L268 TraceCheckUtils]: 292: Hoare quadruple {269931#true} {269931#true} #2625#return; {269931#true} is VALID [2018-11-19 18:37:40,027 INFO L273 TraceCheckUtils]: 293: Hoare triple {269931#true} ~tmp___0~20.base, ~tmp___0~20.offset := #t~ret864.base, #t~ret864.offset;havoc #t~ret864.base, #t~ret864.offset;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := ~tmp___0~20.base, ~tmp___0~20.offset; {269931#true} is VALID [2018-11-19 18:37:40,027 INFO L273 TraceCheckUtils]: 294: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,027 INFO L268 TraceCheckUtils]: 295: Hoare quadruple {269931#true} {269931#true} #3047#return; {269931#true} is VALID [2018-11-19 18:37:40,028 INFO L273 TraceCheckUtils]: 296: Hoare triple {269931#true} assume !(0 != ~ldv_retval_4~0); {269931#true} is VALID [2018-11-19 18:37:40,028 INFO L273 TraceCheckUtils]: 297: Hoare triple {269931#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,028 INFO L273 TraceCheckUtils]: 298: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,028 INFO L273 TraceCheckUtils]: 299: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,028 INFO L273 TraceCheckUtils]: 300: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,028 INFO L273 TraceCheckUtils]: 301: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,029 INFO L273 TraceCheckUtils]: 302: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,029 INFO L273 TraceCheckUtils]: 303: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,029 INFO L273 TraceCheckUtils]: 304: Hoare triple {269931#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {269931#true} is VALID [2018-11-19 18:37:40,029 INFO L273 TraceCheckUtils]: 305: Hoare triple {269931#true} assume #t~switch909; {269931#true} is VALID [2018-11-19 18:37:40,029 INFO L273 TraceCheckUtils]: 306: Hoare triple {269931#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {269931#true} is VALID [2018-11-19 18:37:40,029 INFO L273 TraceCheckUtils]: 307: Hoare triple {269931#true} assume #t~switch937; {269931#true} is VALID [2018-11-19 18:37:40,029 INFO L273 TraceCheckUtils]: 308: Hoare triple {269931#true} assume 1 == ~ldv_state_variable_1~0; {269931#true} is VALID [2018-11-19 18:37:40,029 INFO L256 TraceCheckUtils]: 309: Hoare triple {269931#true} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {269931#true} is VALID [2018-11-19 18:37:40,030 INFO L273 TraceCheckUtils]: 310: Hoare triple {269931#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {269931#true} is VALID [2018-11-19 18:37:40,030 INFO L256 TraceCheckUtils]: 311: Hoare triple {269931#true} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {269931#true} is VALID [2018-11-19 18:37:40,030 INFO L273 TraceCheckUtils]: 312: Hoare triple {269931#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {269931#true} is VALID [2018-11-19 18:37:40,030 INFO L256 TraceCheckUtils]: 313: Hoare triple {269931#true} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {269931#true} is VALID [2018-11-19 18:37:40,030 INFO L273 TraceCheckUtils]: 314: Hoare triple {269931#true} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {269931#true} is VALID [2018-11-19 18:37:40,030 INFO L256 TraceCheckUtils]: 315: Hoare triple {269931#true} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {269931#true} is VALID [2018-11-19 18:37:40,030 INFO L273 TraceCheckUtils]: 316: Hoare triple {269931#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {269931#true} is VALID [2018-11-19 18:37:40,030 INFO L273 TraceCheckUtils]: 317: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,030 INFO L268 TraceCheckUtils]: 318: Hoare quadruple {269931#true} {269931#true} #2817#return; {269931#true} is VALID [2018-11-19 18:37:40,031 INFO L273 TraceCheckUtils]: 319: Hoare triple {269931#true} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {269931#true} is VALID [2018-11-19 18:37:40,031 INFO L273 TraceCheckUtils]: 320: Hoare triple {269931#true} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {269931#true} is VALID [2018-11-19 18:37:40,031 INFO L273 TraceCheckUtils]: 321: Hoare triple {269931#true} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {269931#true} is VALID [2018-11-19 18:37:40,031 INFO L273 TraceCheckUtils]: 322: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,031 INFO L268 TraceCheckUtils]: 323: Hoare quadruple {269931#true} {269931#true} #3151#return; {269931#true} is VALID [2018-11-19 18:37:40,031 INFO L273 TraceCheckUtils]: 324: Hoare triple {269931#true} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {269931#true} is VALID [2018-11-19 18:37:40,031 INFO L273 TraceCheckUtils]: 325: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,031 INFO L268 TraceCheckUtils]: 326: Hoare quadruple {269931#true} {269931#true} #3095#return; {269931#true} is VALID [2018-11-19 18:37:40,032 INFO L273 TraceCheckUtils]: 327: Hoare triple {269931#true} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {269931#true} is VALID [2018-11-19 18:37:40,032 INFO L256 TraceCheckUtils]: 328: Hoare triple {269931#true} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {269931#true} is VALID [2018-11-19 18:37:40,032 INFO L273 TraceCheckUtils]: 329: Hoare triple {269931#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {269931#true} is VALID [2018-11-19 18:37:40,032 INFO L256 TraceCheckUtils]: 330: Hoare triple {269931#true} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {269931#true} is VALID [2018-11-19 18:37:40,032 INFO L273 TraceCheckUtils]: 331: Hoare triple {269931#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {269931#true} is VALID [2018-11-19 18:37:40,032 INFO L256 TraceCheckUtils]: 332: Hoare triple {269931#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {269931#true} is VALID [2018-11-19 18:37:40,032 INFO L273 TraceCheckUtils]: 333: Hoare triple {269931#true} ~size := #in~size;~t := #in~t; {269931#true} is VALID [2018-11-19 18:37:40,032 INFO L256 TraceCheckUtils]: 334: Hoare triple {269931#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {269931#true} is VALID [2018-11-19 18:37:40,032 INFO L273 TraceCheckUtils]: 335: Hoare triple {269931#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {269931#true} is VALID [2018-11-19 18:37:40,033 INFO L273 TraceCheckUtils]: 336: Hoare triple {269931#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {269931#true} is VALID [2018-11-19 18:37:40,033 INFO L273 TraceCheckUtils]: 337: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,033 INFO L268 TraceCheckUtils]: 338: Hoare quadruple {269931#true} {269931#true} #2691#return; {269931#true} is VALID [2018-11-19 18:37:40,033 INFO L273 TraceCheckUtils]: 339: Hoare triple {269931#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {269931#true} is VALID [2018-11-19 18:37:40,033 INFO L273 TraceCheckUtils]: 340: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,033 INFO L268 TraceCheckUtils]: 341: Hoare quadruple {269931#true} {269931#true} #2781#return; {269931#true} is VALID [2018-11-19 18:37:40,033 INFO L273 TraceCheckUtils]: 342: Hoare triple {269931#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {269931#true} is VALID [2018-11-19 18:37:40,033 INFO L273 TraceCheckUtils]: 343: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,034 INFO L268 TraceCheckUtils]: 344: Hoare quadruple {269931#true} {269931#true} #2779#return; {269931#true} is VALID [2018-11-19 18:37:40,034 INFO L273 TraceCheckUtils]: 345: Hoare triple {269931#true} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {269931#true} is VALID [2018-11-19 18:37:40,034 INFO L273 TraceCheckUtils]: 346: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,034 INFO L268 TraceCheckUtils]: 347: Hoare quadruple {269931#true} {269931#true} #3097#return; {269931#true} is VALID [2018-11-19 18:37:40,034 INFO L273 TraceCheckUtils]: 348: Hoare triple {269931#true} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {269931#true} is VALID [2018-11-19 18:37:40,034 INFO L273 TraceCheckUtils]: 349: Hoare triple {269931#true} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {269931#true} is VALID [2018-11-19 18:37:40,034 INFO L256 TraceCheckUtils]: 350: Hoare triple {269931#true} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {269931#true} is VALID [2018-11-19 18:37:40,034 INFO L273 TraceCheckUtils]: 351: Hoare triple {269931#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {269931#true} is VALID [2018-11-19 18:37:40,034 INFO L273 TraceCheckUtils]: 352: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,035 INFO L268 TraceCheckUtils]: 353: Hoare quadruple {269931#true} {269931#true} #3099#return; {269931#true} is VALID [2018-11-19 18:37:40,035 INFO L256 TraceCheckUtils]: 354: Hoare triple {269931#true} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {269931#true} is VALID [2018-11-19 18:37:40,035 INFO L273 TraceCheckUtils]: 355: Hoare triple {269931#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {269931#true} is VALID [2018-11-19 18:37:40,035 INFO L273 TraceCheckUtils]: 356: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,035 INFO L268 TraceCheckUtils]: 357: Hoare quadruple {269931#true} {269931#true} #3101#return; {269931#true} is VALID [2018-11-19 18:37:40,035 INFO L256 TraceCheckUtils]: 358: Hoare triple {269931#true} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {269931#true} is VALID [2018-11-19 18:37:40,035 INFO L273 TraceCheckUtils]: 359: Hoare triple {269931#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {269931#true} is VALID [2018-11-19 18:37:40,035 INFO L256 TraceCheckUtils]: 360: Hoare triple {269931#true} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {269931#true} is VALID [2018-11-19 18:37:40,036 INFO L273 TraceCheckUtils]: 361: Hoare triple {269931#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {269931#true} is VALID [2018-11-19 18:37:40,036 INFO L273 TraceCheckUtils]: 362: Hoare triple {269931#true} assume 0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616;havoc #t~nondet638;#res.base, #res.offset := 0, 0;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {269931#true} is VALID [2018-11-19 18:37:40,036 INFO L273 TraceCheckUtils]: 363: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,036 INFO L268 TraceCheckUtils]: 364: Hoare quadruple {269931#true} {269931#true} #3137#return; {269931#true} is VALID [2018-11-19 18:37:40,036 INFO L273 TraceCheckUtils]: 365: Hoare triple {269931#true} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {269931#true} is VALID [2018-11-19 18:37:40,036 INFO L273 TraceCheckUtils]: 366: Hoare triple {269931#true} assume !(0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616);call #t~mem658.base, #t~mem658.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem659 := read~int(~union_desc~1.base, 3 + ~union_desc~1.offset, 1);call #t~ret660.base, #t~ret660.offset := usb_ifnum_to_if(#t~mem658.base, #t~mem658.offset, #t~mem659 % 256);call write~$Pointer$(#t~ret660.base, #t~ret660.offset, ~pcu.base, 79 + ~pcu.offset, 8);havoc #t~mem659;havoc #t~ret660.base, #t~ret660.offset;havoc #t~mem658.base, #t~mem658.offset;call #t~mem661.base, #t~mem661.offset := read~$Pointer$(~pcu.base, 79 + ~pcu.offset, 8);call #t~mem662.base, #t~mem662.offset := read~$Pointer$(#t~mem661.base, 8 + #t~mem661.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem662.base, #t~mem662.offset;havoc #t~mem662.base, #t~mem662.offset;havoc #t~mem661.base, #t~mem661.offset;call #t~mem663.base, #t~mem663.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem663.base, #t~mem663.offset, ~pcu.base, 87 + ~pcu.offset, 8);havoc #t~mem663.base, #t~mem663.offset;call #t~mem664.base, #t~mem664.offset := read~$Pointer$(~pcu.base, 87 + ~pcu.offset, 8); {269931#true} is VALID [2018-11-19 18:37:40,036 INFO L256 TraceCheckUtils]: 367: Hoare triple {269931#true} call #t~ret665 := usb_endpoint_maxp(#t~mem664.base, #t~mem664.offset); {269931#true} is VALID [2018-11-19 18:37:40,036 INFO L273 TraceCheckUtils]: 368: Hoare triple {269931#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {269931#true} is VALID [2018-11-19 18:37:40,037 INFO L273 TraceCheckUtils]: 369: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,037 INFO L268 TraceCheckUtils]: 370: Hoare quadruple {269931#true} {269931#true} #3139#return; {269931#true} is VALID [2018-11-19 18:37:40,037 INFO L273 TraceCheckUtils]: 371: Hoare triple {269931#true} assume -2147483648 <= #t~ret665 && #t~ret665 <= 2147483647;~tmp~37 := #t~ret665;havoc #t~ret665;havoc #t~mem664.base, #t~mem664.offset;call write~int(~tmp~37, ~pcu.base, 119 + ~pcu.offset, 4);call #t~mem666.base, #t~mem666.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem667 := read~int(~union_desc~1.base, 4 + ~union_desc~1.offset, 1);call #t~ret668.base, #t~ret668.offset := usb_ifnum_to_if(#t~mem666.base, #t~mem666.offset, #t~mem667 % 256);call write~$Pointer$(#t~ret668.base, #t~ret668.offset, ~pcu.base, 123 + ~pcu.offset, 8);havoc #t~mem666.base, #t~mem666.offset;havoc #t~mem667;havoc #t~ret668.base, #t~ret668.offset;call #t~mem669.base, #t~mem669.offset := read~$Pointer$(~pcu.base, 123 + ~pcu.offset, 8);call #t~mem670.base, #t~mem670.offset := read~$Pointer$(#t~mem669.base, 8 + #t~mem669.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem670.base, #t~mem670.offset;havoc #t~mem670.base, #t~mem670.offset;havoc #t~mem669.base, #t~mem669.offset;call #t~mem671 := read~int(~alt~0.base, 4 + ~alt~0.offset, 1); {269931#true} is VALID [2018-11-19 18:37:40,037 INFO L273 TraceCheckUtils]: 372: Hoare triple {269931#true} assume !(2 != #t~mem671 % 256 % 4294967296);havoc #t~mem671;call #t~mem676.base, #t~mem676.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem676.base, #t~mem676.offset, ~pcu.base, 167 + ~pcu.offset, 8);havoc #t~mem676.base, #t~mem676.offset;call #t~mem677.base, #t~mem677.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {269931#true} is VALID [2018-11-19 18:37:40,037 INFO L256 TraceCheckUtils]: 373: Hoare triple {269931#true} call #t~ret678 := usb_endpoint_is_bulk_out(#t~mem677.base, #t~mem677.offset); {269931#true} is VALID [2018-11-19 18:37:40,037 INFO L273 TraceCheckUtils]: 374: Hoare triple {269931#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~4;havoc ~tmp___0~1;havoc ~tmp___1~1; {269931#true} is VALID [2018-11-19 18:37:40,037 INFO L256 TraceCheckUtils]: 375: Hoare triple {269931#true} call #t~ret25 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {269931#true} is VALID [2018-11-19 18:37:40,037 INFO L273 TraceCheckUtils]: 376: Hoare triple {269931#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {269931#true} is VALID [2018-11-19 18:37:40,038 INFO L273 TraceCheckUtils]: 377: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,038 INFO L268 TraceCheckUtils]: 378: Hoare quadruple {269931#true} {269931#true} #2887#return; {269931#true} is VALID [2018-11-19 18:37:40,038 INFO L273 TraceCheckUtils]: 379: Hoare triple {269931#true} assume -2147483648 <= #t~ret25 && #t~ret25 <= 2147483647;~tmp~4 := #t~ret25;havoc #t~ret25; {269931#true} is VALID [2018-11-19 18:37:40,039 INFO L273 TraceCheckUtils]: 380: Hoare triple {269931#true} assume !(0 != ~tmp~4);~tmp___1~1 := 0; {269933#(= 0 usb_endpoint_is_bulk_out_~tmp___1~1)} is VALID [2018-11-19 18:37:40,041 INFO L273 TraceCheckUtils]: 381: Hoare triple {269933#(= 0 usb_endpoint_is_bulk_out_~tmp___1~1)} #res := ~tmp___1~1; {269934#(= 0 |usb_endpoint_is_bulk_out_#res|)} is VALID [2018-11-19 18:37:40,042 INFO L273 TraceCheckUtils]: 382: Hoare triple {269934#(= 0 |usb_endpoint_is_bulk_out_#res|)} assume true; {269934#(= 0 |usb_endpoint_is_bulk_out_#res|)} is VALID [2018-11-19 18:37:40,043 INFO L268 TraceCheckUtils]: 383: Hoare quadruple {269934#(= 0 |usb_endpoint_is_bulk_out_#res|)} {269931#true} #3141#return; {269935#(= 0 |ims_pcu_parse_cdc_data_#t~ret678|)} is VALID [2018-11-19 18:37:40,044 INFO L273 TraceCheckUtils]: 384: Hoare triple {269935#(= 0 |ims_pcu_parse_cdc_data_#t~ret678|)} assume -2147483648 <= #t~ret678 && #t~ret678 <= 2147483647;~tmp___0~16 := #t~ret678;havoc #t~mem677.base, #t~mem677.offset;havoc #t~ret678; {269936#(= 0 ims_pcu_parse_cdc_data_~tmp___0~16)} is VALID [2018-11-19 18:37:40,045 INFO L273 TraceCheckUtils]: 385: Hoare triple {269936#(= 0 ims_pcu_parse_cdc_data_~tmp___0~16)} assume !(0 == ~tmp___0~16);call #t~mem682.base, #t~mem682.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {269932#false} is VALID [2018-11-19 18:37:40,045 INFO L256 TraceCheckUtils]: 386: Hoare triple {269932#false} call #t~ret683 := usb_endpoint_maxp(#t~mem682.base, #t~mem682.offset); {269931#true} is VALID [2018-11-19 18:37:40,045 INFO L273 TraceCheckUtils]: 387: Hoare triple {269931#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {269931#true} is VALID [2018-11-19 18:37:40,045 INFO L273 TraceCheckUtils]: 388: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,046 INFO L268 TraceCheckUtils]: 389: Hoare quadruple {269931#true} {269932#false} #3143#return; {269932#false} is VALID [2018-11-19 18:37:40,046 INFO L273 TraceCheckUtils]: 390: Hoare triple {269932#false} assume -2147483648 <= #t~ret683 && #t~ret683 <= 2147483647;~tmp___1~7 := #t~ret683;havoc #t~mem682.base, #t~mem682.offset;havoc #t~ret683;call write~int(~tmp___1~7, ~pcu.base, 183 + ~pcu.offset, 4);call #t~mem684 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {269932#false} is VALID [2018-11-19 18:37:40,046 INFO L273 TraceCheckUtils]: 391: Hoare triple {269932#false} assume !(#t~mem684 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem684;call #t~mem689.base, #t~mem689.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem689.base, 63 + #t~mem689.offset, ~pcu.base, 131 + ~pcu.offset, 8);havoc #t~mem689.base, #t~mem689.offset;call #t~mem690.base, #t~mem690.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {269932#false} is VALID [2018-11-19 18:37:40,046 INFO L256 TraceCheckUtils]: 392: Hoare triple {269932#false} call #t~ret691 := usb_endpoint_is_bulk_in(#t~mem690.base, #t~mem690.offset); {269931#true} is VALID [2018-11-19 18:37:40,046 INFO L273 TraceCheckUtils]: 393: Hoare triple {269931#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~3;havoc ~tmp___0~0;havoc ~tmp___1~0; {269931#true} is VALID [2018-11-19 18:37:40,047 INFO L256 TraceCheckUtils]: 394: Hoare triple {269931#true} call #t~ret23 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {269931#true} is VALID [2018-11-19 18:37:40,047 INFO L273 TraceCheckUtils]: 395: Hoare triple {269931#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {269931#true} is VALID [2018-11-19 18:37:40,047 INFO L273 TraceCheckUtils]: 396: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,047 INFO L268 TraceCheckUtils]: 397: Hoare quadruple {269931#true} {269931#true} #2915#return; {269931#true} is VALID [2018-11-19 18:37:40,047 INFO L273 TraceCheckUtils]: 398: Hoare triple {269931#true} assume -2147483648 <= #t~ret23 && #t~ret23 <= 2147483647;~tmp~3 := #t~ret23;havoc #t~ret23; {269931#true} is VALID [2018-11-19 18:37:40,048 INFO L273 TraceCheckUtils]: 399: Hoare triple {269931#true} assume !(0 != ~tmp~3);~tmp___1~0 := 0; {269931#true} is VALID [2018-11-19 18:37:40,048 INFO L273 TraceCheckUtils]: 400: Hoare triple {269931#true} #res := ~tmp___1~0; {269931#true} is VALID [2018-11-19 18:37:40,048 INFO L273 TraceCheckUtils]: 401: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,048 INFO L268 TraceCheckUtils]: 402: Hoare quadruple {269931#true} {269932#false} #3145#return; {269932#false} is VALID [2018-11-19 18:37:40,048 INFO L273 TraceCheckUtils]: 403: Hoare triple {269932#false} assume -2147483648 <= #t~ret691 && #t~ret691 <= 2147483647;~tmp___2~3 := #t~ret691;havoc #t~ret691;havoc #t~mem690.base, #t~mem690.offset; {269932#false} is VALID [2018-11-19 18:37:40,048 INFO L273 TraceCheckUtils]: 404: Hoare triple {269932#false} assume !(0 == ~tmp___2~3);call #t~mem695.base, #t~mem695.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {269932#false} is VALID [2018-11-19 18:37:40,048 INFO L256 TraceCheckUtils]: 405: Hoare triple {269932#false} call #t~ret696 := usb_endpoint_maxp(#t~mem695.base, #t~mem695.offset); {269931#true} is VALID [2018-11-19 18:37:40,048 INFO L273 TraceCheckUtils]: 406: Hoare triple {269931#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {269931#true} is VALID [2018-11-19 18:37:40,049 INFO L273 TraceCheckUtils]: 407: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,049 INFO L268 TraceCheckUtils]: 408: Hoare quadruple {269931#true} {269932#false} #3147#return; {269932#false} is VALID [2018-11-19 18:37:40,049 INFO L273 TraceCheckUtils]: 409: Hoare triple {269932#false} assume -2147483648 <= #t~ret696 && #t~ret696 <= 2147483647;~tmp___3~2 := #t~ret696;havoc #t~ret696;havoc #t~mem695.base, #t~mem695.offset;call write~int(~tmp___3~2, ~pcu.base, 163 + ~pcu.offset, 4);call #t~mem697 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {269932#false} is VALID [2018-11-19 18:37:40,049 INFO L273 TraceCheckUtils]: 410: Hoare triple {269932#false} assume !(#t~mem697 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem697;#res := 0; {269932#false} is VALID [2018-11-19 18:37:40,049 INFO L273 TraceCheckUtils]: 411: Hoare triple {269932#false} assume true; {269932#false} is VALID [2018-11-19 18:37:40,049 INFO L268 TraceCheckUtils]: 412: Hoare quadruple {269932#false} {269931#true} #3103#return; {269932#false} is VALID [2018-11-19 18:37:40,049 INFO L273 TraceCheckUtils]: 413: Hoare triple {269932#false} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {269932#false} is VALID [2018-11-19 18:37:40,049 INFO L273 TraceCheckUtils]: 414: Hoare triple {269932#false} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {269932#false} is VALID [2018-11-19 18:37:40,050 INFO L273 TraceCheckUtils]: 415: Hoare triple {269932#false} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {269932#false} is VALID [2018-11-19 18:37:40,050 INFO L256 TraceCheckUtils]: 416: Hoare triple {269932#false} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {269931#true} is VALID [2018-11-19 18:37:40,050 INFO L273 TraceCheckUtils]: 417: Hoare triple {269931#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {269931#true} is VALID [2018-11-19 18:37:40,050 INFO L256 TraceCheckUtils]: 418: Hoare triple {269931#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {269931#true} is VALID [2018-11-19 18:37:40,050 INFO L273 TraceCheckUtils]: 419: Hoare triple {269931#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {269931#true} is VALID [2018-11-19 18:37:40,050 INFO L273 TraceCheckUtils]: 420: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,050 INFO L268 TraceCheckUtils]: 421: Hoare quadruple {269931#true} {269931#true} #2541#return; {269931#true} is VALID [2018-11-19 18:37:40,050 INFO L273 TraceCheckUtils]: 422: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,051 INFO L268 TraceCheckUtils]: 423: Hoare quadruple {269931#true} {269932#false} #3105#return; {269932#false} is VALID [2018-11-19 18:37:40,051 INFO L273 TraceCheckUtils]: 424: Hoare triple {269932#false} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {269932#false} is VALID [2018-11-19 18:37:40,051 INFO L256 TraceCheckUtils]: 425: Hoare triple {269932#false} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {269931#true} is VALID [2018-11-19 18:37:40,051 INFO L273 TraceCheckUtils]: 426: Hoare triple {269931#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {269931#true} is VALID [2018-11-19 18:37:40,051 INFO L256 TraceCheckUtils]: 427: Hoare triple {269931#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {269931#true} is VALID [2018-11-19 18:37:40,051 INFO L273 TraceCheckUtils]: 428: Hoare triple {269931#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {269931#true} is VALID [2018-11-19 18:37:40,051 INFO L273 TraceCheckUtils]: 429: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,051 INFO L268 TraceCheckUtils]: 430: Hoare quadruple {269931#true} {269931#true} #2541#return; {269931#true} is VALID [2018-11-19 18:37:40,051 INFO L273 TraceCheckUtils]: 431: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,052 INFO L268 TraceCheckUtils]: 432: Hoare quadruple {269931#true} {269932#false} #3107#return; {269932#false} is VALID [2018-11-19 18:37:40,052 INFO L273 TraceCheckUtils]: 433: Hoare triple {269932#false} havoc #t~mem837.base, #t~mem837.offset; {269932#false} is VALID [2018-11-19 18:37:40,052 INFO L256 TraceCheckUtils]: 434: Hoare triple {269932#false} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {269931#true} is VALID [2018-11-19 18:37:40,052 INFO L273 TraceCheckUtils]: 435: Hoare triple {269931#true} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {269931#true} is VALID [2018-11-19 18:37:40,052 INFO L273 TraceCheckUtils]: 436: Hoare triple {269931#true} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {269931#true} is VALID [2018-11-19 18:37:40,052 INFO L256 TraceCheckUtils]: 437: Hoare triple {269931#true} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {269931#true} is VALID [2018-11-19 18:37:40,052 INFO L273 TraceCheckUtils]: 438: Hoare triple {269931#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {269931#true} is VALID [2018-11-19 18:37:40,052 INFO L256 TraceCheckUtils]: 439: Hoare triple {269931#true} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {269931#true} is VALID [2018-11-19 18:37:40,053 INFO L273 TraceCheckUtils]: 440: Hoare triple {269931#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {269931#true} is VALID [2018-11-19 18:37:40,053 INFO L256 TraceCheckUtils]: 441: Hoare triple {269931#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {269931#true} is VALID [2018-11-19 18:37:40,053 INFO L273 TraceCheckUtils]: 442: Hoare triple {269931#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {269931#true} is VALID [2018-11-19 18:37:40,053 INFO L273 TraceCheckUtils]: 443: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,053 INFO L268 TraceCheckUtils]: 444: Hoare quadruple {269931#true} {269931#true} #2605#return; {269931#true} is VALID [2018-11-19 18:37:40,053 INFO L273 TraceCheckUtils]: 445: Hoare triple {269931#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {269931#true} is VALID [2018-11-19 18:37:40,053 INFO L256 TraceCheckUtils]: 446: Hoare triple {269931#true} call #t~ret965 := ldv_undef_int(); {269931#true} is VALID [2018-11-19 18:37:40,053 INFO L273 TraceCheckUtils]: 447: Hoare triple {269931#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {269931#true} is VALID [2018-11-19 18:37:40,053 INFO L273 TraceCheckUtils]: 448: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,054 INFO L268 TraceCheckUtils]: 449: Hoare quadruple {269931#true} {269931#true} #2607#return; {269931#true} is VALID [2018-11-19 18:37:40,054 INFO L273 TraceCheckUtils]: 450: Hoare triple {269931#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {269931#true} is VALID [2018-11-19 18:37:40,054 INFO L273 TraceCheckUtils]: 451: Hoare triple {269931#true} assume 0 != ~tmp___0~26; {269931#true} is VALID [2018-11-19 18:37:40,054 INFO L273 TraceCheckUtils]: 452: Hoare triple {269931#true} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {269931#true} is VALID [2018-11-19 18:37:40,054 INFO L273 TraceCheckUtils]: 453: Hoare triple {269931#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {269931#true} is VALID [2018-11-19 18:37:40,054 INFO L273 TraceCheckUtils]: 454: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,054 INFO L268 TraceCheckUtils]: 455: Hoare quadruple {269931#true} {269931#true} #3135#return; {269931#true} is VALID [2018-11-19 18:37:40,054 INFO L273 TraceCheckUtils]: 456: Hoare triple {269931#true} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {269931#true} is VALID [2018-11-19 18:37:40,054 INFO L273 TraceCheckUtils]: 457: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,055 INFO L268 TraceCheckUtils]: 458: Hoare quadruple {269931#true} {269931#true} #2709#return; {269931#true} is VALID [2018-11-19 18:37:40,055 INFO L273 TraceCheckUtils]: 459: Hoare triple {269931#true} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {269931#true} is VALID [2018-11-19 18:37:40,055 INFO L273 TraceCheckUtils]: 460: Hoare triple {269931#true} assume 0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616;havoc #t~mem561.base, #t~mem561.offset;havoc #t~nondet562;call #t~mem563.base, #t~mem563.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem563.base, #t~mem563.offset;~error~18 := -12; {269931#true} is VALID [2018-11-19 18:37:40,055 INFO L273 TraceCheckUtils]: 461: Hoare triple {269931#true} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {269931#true} is VALID [2018-11-19 18:37:40,055 INFO L273 TraceCheckUtils]: 462: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,055 INFO L268 TraceCheckUtils]: 463: Hoare quadruple {269931#true} {269932#false} #3109#return; {269932#false} is VALID [2018-11-19 18:37:40,055 INFO L273 TraceCheckUtils]: 464: Hoare triple {269932#false} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {269932#false} is VALID [2018-11-19 18:37:40,055 INFO L273 TraceCheckUtils]: 465: Hoare triple {269932#false} assume 0 != ~error~25; {269932#false} is VALID [2018-11-19 18:37:40,055 INFO L273 TraceCheckUtils]: 466: Hoare triple {269932#false} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {269932#false} is VALID [2018-11-19 18:37:40,056 INFO L273 TraceCheckUtils]: 467: Hoare triple {269932#false} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {269932#false} is VALID [2018-11-19 18:37:40,056 INFO L273 TraceCheckUtils]: 468: Hoare triple {269932#false} assume true; {269932#false} is VALID [2018-11-19 18:37:40,056 INFO L268 TraceCheckUtils]: 469: Hoare quadruple {269932#false} {269931#true} #3015#return; {269932#false} is VALID [2018-11-19 18:37:40,056 INFO L273 TraceCheckUtils]: 470: Hoare triple {269932#false} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {269932#false} is VALID [2018-11-19 18:37:40,056 INFO L273 TraceCheckUtils]: 471: Hoare triple {269932#false} assume 0 == ~ldv_retval_3~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {269932#false} is VALID [2018-11-19 18:37:40,056 INFO L273 TraceCheckUtils]: 472: Hoare triple {269932#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {269932#false} is VALID [2018-11-19 18:37:40,056 INFO L273 TraceCheckUtils]: 473: Hoare triple {269932#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {269932#false} is VALID [2018-11-19 18:37:40,056 INFO L273 TraceCheckUtils]: 474: Hoare triple {269932#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {269932#false} is VALID [2018-11-19 18:37:40,056 INFO L273 TraceCheckUtils]: 475: Hoare triple {269932#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {269932#false} is VALID [2018-11-19 18:37:40,057 INFO L273 TraceCheckUtils]: 476: Hoare triple {269932#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {269932#false} is VALID [2018-11-19 18:37:40,057 INFO L273 TraceCheckUtils]: 477: Hoare triple {269932#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {269932#false} is VALID [2018-11-19 18:37:40,057 INFO L273 TraceCheckUtils]: 478: Hoare triple {269932#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {269932#false} is VALID [2018-11-19 18:37:40,057 INFO L273 TraceCheckUtils]: 479: Hoare triple {269932#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {269932#false} is VALID [2018-11-19 18:37:40,057 INFO L273 TraceCheckUtils]: 480: Hoare triple {269932#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {269932#false} is VALID [2018-11-19 18:37:40,057 INFO L273 TraceCheckUtils]: 481: Hoare triple {269932#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {269932#false} is VALID [2018-11-19 18:37:40,057 INFO L273 TraceCheckUtils]: 482: Hoare triple {269932#false} assume #t~switch909; {269932#false} is VALID [2018-11-19 18:37:40,057 INFO L273 TraceCheckUtils]: 483: Hoare triple {269932#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {269932#false} is VALID [2018-11-19 18:37:40,057 INFO L273 TraceCheckUtils]: 484: Hoare triple {269932#false} assume #t~switch947; {269932#false} is VALID [2018-11-19 18:37:40,058 INFO L273 TraceCheckUtils]: 485: Hoare triple {269932#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {269932#false} is VALID [2018-11-19 18:37:40,058 INFO L256 TraceCheckUtils]: 486: Hoare triple {269932#false} call ims_pcu_driver_exit(); {269931#true} is VALID [2018-11-19 18:37:40,058 INFO L256 TraceCheckUtils]: 487: Hoare triple {269931#true} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {269931#true} is VALID [2018-11-19 18:37:40,058 INFO L273 TraceCheckUtils]: 488: Hoare triple {269931#true} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {269931#true} is VALID [2018-11-19 18:37:40,058 INFO L273 TraceCheckUtils]: 489: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,058 INFO L268 TraceCheckUtils]: 490: Hoare quadruple {269931#true} {269931#true} #2597#return; {269931#true} is VALID [2018-11-19 18:37:40,058 INFO L273 TraceCheckUtils]: 491: Hoare triple {269931#true} assume true; {269931#true} is VALID [2018-11-19 18:37:40,058 INFO L268 TraceCheckUtils]: 492: Hoare quadruple {269931#true} {269932#false} #3033#return; {269932#false} is VALID [2018-11-19 18:37:40,058 INFO L273 TraceCheckUtils]: 493: Hoare triple {269932#false} ~ldv_state_variable_0~0 := 2; {269932#false} is VALID [2018-11-19 18:37:40,059 INFO L256 TraceCheckUtils]: 494: Hoare triple {269932#false} call ldv_check_final_state(); {269932#false} is VALID [2018-11-19 18:37:40,059 INFO L273 TraceCheckUtils]: 495: Hoare triple {269932#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {269932#false} is VALID [2018-11-19 18:37:40,059 INFO L256 TraceCheckUtils]: 496: Hoare triple {269932#false} call ldv_error(); {269932#false} is VALID [2018-11-19 18:37:40,059 INFO L273 TraceCheckUtils]: 497: Hoare triple {269932#false} assume !false; {269932#false} is VALID [2018-11-19 18:37:40,124 INFO L134 CoverageAnalysis]: Checked inductivity of 2723 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 2701 trivial. 0 not checked. [2018-11-19 18:37:40,124 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:37:40,124 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-19 18:37:40,125 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 498 [2018-11-19 18:37:40,125 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:37:40,125 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-19 18:37:40,611 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 365 edges. 365 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:37:40,611 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-19 18:37:40,611 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-19 18:37:40,611 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-19 18:37:40,612 INFO L87 Difference]: Start difference. First operand 3832 states and 5198 transitions. Second operand 6 states. [2018-11-19 18:38:08,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:38:08,681 INFO L93 Difference]: Finished difference Result 7166 states and 9712 transitions. [2018-11-19 18:38:08,681 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-19 18:38:08,681 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 498 [2018-11-19 18:38:08,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:38:08,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-19 18:38:08,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 3265 transitions. [2018-11-19 18:38:08,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-19 18:38:08,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 3265 transitions. [2018-11-19 18:38:08,817 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 3265 transitions. [2018-11-19 18:38:11,491 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3265 edges. 3265 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:38:12,241 INFO L225 Difference]: With dead ends: 7166 [2018-11-19 18:38:12,242 INFO L226 Difference]: Without dead ends: 3846 [2018-11-19 18:38:12,248 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-19 18:38:12,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3846 states. [2018-11-19 18:38:19,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3846 to 3842. [2018-11-19 18:38:19,805 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:38:19,805 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3846 states. Second operand 3842 states. [2018-11-19 18:38:19,806 INFO L74 IsIncluded]: Start isIncluded. First operand 3846 states. Second operand 3842 states. [2018-11-19 18:38:19,806 INFO L87 Difference]: Start difference. First operand 3846 states. Second operand 3842 states. [2018-11-19 18:38:20,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:38:20,392 INFO L93 Difference]: Finished difference Result 3846 states and 5212 transitions. [2018-11-19 18:38:20,392 INFO L276 IsEmpty]: Start isEmpty. Operand 3846 states and 5212 transitions. [2018-11-19 18:38:20,398 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:38:20,398 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:38:20,398 INFO L74 IsIncluded]: Start isIncluded. First operand 3842 states. Second operand 3846 states. [2018-11-19 18:38:20,398 INFO L87 Difference]: Start difference. First operand 3842 states. Second operand 3846 states. [2018-11-19 18:38:20,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:38:20,994 INFO L93 Difference]: Finished difference Result 3846 states and 5212 transitions. [2018-11-19 18:38:20,994 INFO L276 IsEmpty]: Start isEmpty. Operand 3846 states and 5212 transitions. [2018-11-19 18:38:20,999 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:38:20,999 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:38:20,999 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:38:20,999 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:38:20,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3842 states. [2018-11-19 18:38:21,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3842 states to 3842 states and 5208 transitions. [2018-11-19 18:38:21,782 INFO L78 Accepts]: Start accepts. Automaton has 3842 states and 5208 transitions. Word has length 498 [2018-11-19 18:38:21,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:38:21,783 INFO L480 AbstractCegarLoop]: Abstraction has 3842 states and 5208 transitions. [2018-11-19 18:38:21,783 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-19 18:38:21,783 INFO L276 IsEmpty]: Start isEmpty. Operand 3842 states and 5208 transitions. [2018-11-19 18:38:21,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 505 [2018-11-19 18:38:21,792 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:38:21,792 INFO L384 BasicCegarLoop]: trace histogram [37, 37, 37, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:38:21,792 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:38:21,793 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:38:21,793 INFO L82 PathProgramCache]: Analyzing trace with hash -911559260, now seen corresponding path program 1 times [2018-11-19 18:38:21,793 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:38:21,793 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:38:21,795 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:38:21,795 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:38:21,795 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:38:21,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:38:22,147 INFO L256 TraceCheckUtils]: 0: Hoare triple {292268#true} call ULTIMATE.init(); {292268#true} is VALID [2018-11-19 18:38:22,148 INFO L273 TraceCheckUtils]: 1: Hoare triple {292268#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,148 INFO L273 TraceCheckUtils]: 2: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,148 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {292268#true} {292268#true} #3175#return; {292268#true} is VALID [2018-11-19 18:38:22,149 INFO L256 TraceCheckUtils]: 4: Hoare triple {292268#true} call #t~ret973 := main(); {292268#true} is VALID [2018-11-19 18:38:22,149 INFO L273 TraceCheckUtils]: 5: Hoare triple {292268#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {292268#true} is VALID [2018-11-19 18:38:22,149 INFO L256 TraceCheckUtils]: 6: Hoare triple {292268#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {292268#true} is VALID [2018-11-19 18:38:22,149 INFO L273 TraceCheckUtils]: 7: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,149 INFO L273 TraceCheckUtils]: 8: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,149 INFO L273 TraceCheckUtils]: 9: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,150 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {292268#true} {292268#true} #2927#return; {292268#true} is VALID [2018-11-19 18:38:22,150 INFO L273 TraceCheckUtils]: 11: Hoare triple {292268#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {292268#true} is VALID [2018-11-19 18:38:22,150 INFO L256 TraceCheckUtils]: 12: Hoare triple {292268#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {292268#true} is VALID [2018-11-19 18:38:22,150 INFO L273 TraceCheckUtils]: 13: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,150 INFO L273 TraceCheckUtils]: 14: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,150 INFO L273 TraceCheckUtils]: 15: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,151 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {292268#true} {292268#true} #2929#return; {292268#true} is VALID [2018-11-19 18:38:22,151 INFO L273 TraceCheckUtils]: 17: Hoare triple {292268#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {292268#true} is VALID [2018-11-19 18:38:22,151 INFO L256 TraceCheckUtils]: 18: Hoare triple {292268#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {292268#true} is VALID [2018-11-19 18:38:22,151 INFO L273 TraceCheckUtils]: 19: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,151 INFO L273 TraceCheckUtils]: 20: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,151 INFO L273 TraceCheckUtils]: 21: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,152 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {292268#true} {292268#true} #2931#return; {292268#true} is VALID [2018-11-19 18:38:22,152 INFO L273 TraceCheckUtils]: 23: Hoare triple {292268#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {292268#true} is VALID [2018-11-19 18:38:22,152 INFO L256 TraceCheckUtils]: 24: Hoare triple {292268#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {292268#true} is VALID [2018-11-19 18:38:22,152 INFO L273 TraceCheckUtils]: 25: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,152 INFO L273 TraceCheckUtils]: 26: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,152 INFO L273 TraceCheckUtils]: 27: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,152 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {292268#true} {292268#true} #2933#return; {292268#true} is VALID [2018-11-19 18:38:22,153 INFO L273 TraceCheckUtils]: 29: Hoare triple {292268#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {292268#true} is VALID [2018-11-19 18:38:22,153 INFO L256 TraceCheckUtils]: 30: Hoare triple {292268#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {292268#true} is VALID [2018-11-19 18:38:22,153 INFO L273 TraceCheckUtils]: 31: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,153 INFO L273 TraceCheckUtils]: 32: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,153 INFO L273 TraceCheckUtils]: 33: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,153 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {292268#true} {292268#true} #2935#return; {292268#true} is VALID [2018-11-19 18:38:22,154 INFO L273 TraceCheckUtils]: 35: Hoare triple {292268#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {292268#true} is VALID [2018-11-19 18:38:22,154 INFO L256 TraceCheckUtils]: 36: Hoare triple {292268#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {292268#true} is VALID [2018-11-19 18:38:22,154 INFO L273 TraceCheckUtils]: 37: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,154 INFO L273 TraceCheckUtils]: 38: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,154 INFO L273 TraceCheckUtils]: 39: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,154 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {292268#true} {292268#true} #2937#return; {292268#true} is VALID [2018-11-19 18:38:22,154 INFO L273 TraceCheckUtils]: 41: Hoare triple {292268#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {292268#true} is VALID [2018-11-19 18:38:22,155 INFO L256 TraceCheckUtils]: 42: Hoare triple {292268#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {292268#true} is VALID [2018-11-19 18:38:22,155 INFO L273 TraceCheckUtils]: 43: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,155 INFO L273 TraceCheckUtils]: 44: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,155 INFO L273 TraceCheckUtils]: 45: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,155 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {292268#true} {292268#true} #2939#return; {292268#true} is VALID [2018-11-19 18:38:22,155 INFO L273 TraceCheckUtils]: 47: Hoare triple {292268#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {292268#true} is VALID [2018-11-19 18:38:22,156 INFO L256 TraceCheckUtils]: 48: Hoare triple {292268#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {292268#true} is VALID [2018-11-19 18:38:22,156 INFO L273 TraceCheckUtils]: 49: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,156 INFO L273 TraceCheckUtils]: 50: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,156 INFO L273 TraceCheckUtils]: 51: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,156 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {292268#true} {292268#true} #2941#return; {292268#true} is VALID [2018-11-19 18:38:22,156 INFO L273 TraceCheckUtils]: 53: Hoare triple {292268#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {292268#true} is VALID [2018-11-19 18:38:22,157 INFO L256 TraceCheckUtils]: 54: Hoare triple {292268#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {292268#true} is VALID [2018-11-19 18:38:22,157 INFO L273 TraceCheckUtils]: 55: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,157 INFO L273 TraceCheckUtils]: 56: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,157 INFO L273 TraceCheckUtils]: 57: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,157 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {292268#true} {292268#true} #2943#return; {292268#true} is VALID [2018-11-19 18:38:22,157 INFO L273 TraceCheckUtils]: 59: Hoare triple {292268#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {292268#true} is VALID [2018-11-19 18:38:22,158 INFO L256 TraceCheckUtils]: 60: Hoare triple {292268#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {292268#true} is VALID [2018-11-19 18:38:22,158 INFO L273 TraceCheckUtils]: 61: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,158 INFO L273 TraceCheckUtils]: 62: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,158 INFO L273 TraceCheckUtils]: 63: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,158 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {292268#true} {292268#true} #2945#return; {292268#true} is VALID [2018-11-19 18:38:22,158 INFO L273 TraceCheckUtils]: 65: Hoare triple {292268#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {292268#true} is VALID [2018-11-19 18:38:22,159 INFO L256 TraceCheckUtils]: 66: Hoare triple {292268#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {292268#true} is VALID [2018-11-19 18:38:22,159 INFO L273 TraceCheckUtils]: 67: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,159 INFO L273 TraceCheckUtils]: 68: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,159 INFO L273 TraceCheckUtils]: 69: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,159 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {292268#true} {292268#true} #2947#return; {292268#true} is VALID [2018-11-19 18:38:22,159 INFO L273 TraceCheckUtils]: 71: Hoare triple {292268#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {292268#true} is VALID [2018-11-19 18:38:22,159 INFO L256 TraceCheckUtils]: 72: Hoare triple {292268#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {292268#true} is VALID [2018-11-19 18:38:22,160 INFO L273 TraceCheckUtils]: 73: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,160 INFO L273 TraceCheckUtils]: 74: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,160 INFO L273 TraceCheckUtils]: 75: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,160 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {292268#true} {292268#true} #2949#return; {292268#true} is VALID [2018-11-19 18:38:22,160 INFO L273 TraceCheckUtils]: 77: Hoare triple {292268#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {292268#true} is VALID [2018-11-19 18:38:22,160 INFO L256 TraceCheckUtils]: 78: Hoare triple {292268#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {292268#true} is VALID [2018-11-19 18:38:22,161 INFO L273 TraceCheckUtils]: 79: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,161 INFO L273 TraceCheckUtils]: 80: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,161 INFO L273 TraceCheckUtils]: 81: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,161 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {292268#true} {292268#true} #2951#return; {292268#true} is VALID [2018-11-19 18:38:22,161 INFO L273 TraceCheckUtils]: 83: Hoare triple {292268#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {292268#true} is VALID [2018-11-19 18:38:22,161 INFO L256 TraceCheckUtils]: 84: Hoare triple {292268#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {292268#true} is VALID [2018-11-19 18:38:22,161 INFO L273 TraceCheckUtils]: 85: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,162 INFO L273 TraceCheckUtils]: 86: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,162 INFO L273 TraceCheckUtils]: 87: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,162 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {292268#true} {292268#true} #2953#return; {292268#true} is VALID [2018-11-19 18:38:22,162 INFO L273 TraceCheckUtils]: 89: Hoare triple {292268#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {292268#true} is VALID [2018-11-19 18:38:22,162 INFO L256 TraceCheckUtils]: 90: Hoare triple {292268#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {292268#true} is VALID [2018-11-19 18:38:22,162 INFO L273 TraceCheckUtils]: 91: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,163 INFO L273 TraceCheckUtils]: 92: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,163 INFO L273 TraceCheckUtils]: 93: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,163 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {292268#true} {292268#true} #2955#return; {292268#true} is VALID [2018-11-19 18:38:22,163 INFO L273 TraceCheckUtils]: 95: Hoare triple {292268#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {292268#true} is VALID [2018-11-19 18:38:22,163 INFO L256 TraceCheckUtils]: 96: Hoare triple {292268#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {292268#true} is VALID [2018-11-19 18:38:22,163 INFO L273 TraceCheckUtils]: 97: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,163 INFO L273 TraceCheckUtils]: 98: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,164 INFO L273 TraceCheckUtils]: 99: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,164 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {292268#true} {292268#true} #2957#return; {292268#true} is VALID [2018-11-19 18:38:22,164 INFO L273 TraceCheckUtils]: 101: Hoare triple {292268#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {292268#true} is VALID [2018-11-19 18:38:22,164 INFO L256 TraceCheckUtils]: 102: Hoare triple {292268#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {292268#true} is VALID [2018-11-19 18:38:22,164 INFO L273 TraceCheckUtils]: 103: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,164 INFO L273 TraceCheckUtils]: 104: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,164 INFO L273 TraceCheckUtils]: 105: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,165 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {292268#true} {292268#true} #2959#return; {292268#true} is VALID [2018-11-19 18:38:22,165 INFO L273 TraceCheckUtils]: 107: Hoare triple {292268#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {292268#true} is VALID [2018-11-19 18:38:22,165 INFO L256 TraceCheckUtils]: 108: Hoare triple {292268#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {292268#true} is VALID [2018-11-19 18:38:22,165 INFO L273 TraceCheckUtils]: 109: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,165 INFO L273 TraceCheckUtils]: 110: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,165 INFO L273 TraceCheckUtils]: 111: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,166 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {292268#true} {292268#true} #2961#return; {292268#true} is VALID [2018-11-19 18:38:22,166 INFO L273 TraceCheckUtils]: 113: Hoare triple {292268#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {292268#true} is VALID [2018-11-19 18:38:22,166 INFO L256 TraceCheckUtils]: 114: Hoare triple {292268#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {292268#true} is VALID [2018-11-19 18:38:22,166 INFO L273 TraceCheckUtils]: 115: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,166 INFO L273 TraceCheckUtils]: 116: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,166 INFO L273 TraceCheckUtils]: 117: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,166 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {292268#true} {292268#true} #2963#return; {292268#true} is VALID [2018-11-19 18:38:22,167 INFO L273 TraceCheckUtils]: 119: Hoare triple {292268#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {292268#true} is VALID [2018-11-19 18:38:22,167 INFO L256 TraceCheckUtils]: 120: Hoare triple {292268#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {292268#true} is VALID [2018-11-19 18:38:22,167 INFO L273 TraceCheckUtils]: 121: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,167 INFO L273 TraceCheckUtils]: 122: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,167 INFO L273 TraceCheckUtils]: 123: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,167 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {292268#true} {292268#true} #2965#return; {292268#true} is VALID [2018-11-19 18:38:22,168 INFO L273 TraceCheckUtils]: 125: Hoare triple {292268#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {292268#true} is VALID [2018-11-19 18:38:22,168 INFO L256 TraceCheckUtils]: 126: Hoare triple {292268#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {292268#true} is VALID [2018-11-19 18:38:22,168 INFO L273 TraceCheckUtils]: 127: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,168 INFO L273 TraceCheckUtils]: 128: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,168 INFO L273 TraceCheckUtils]: 129: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,168 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {292268#true} {292268#true} #2967#return; {292268#true} is VALID [2018-11-19 18:38:22,168 INFO L273 TraceCheckUtils]: 131: Hoare triple {292268#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {292268#true} is VALID [2018-11-19 18:38:22,169 INFO L256 TraceCheckUtils]: 132: Hoare triple {292268#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {292268#true} is VALID [2018-11-19 18:38:22,169 INFO L273 TraceCheckUtils]: 133: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,169 INFO L273 TraceCheckUtils]: 134: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,169 INFO L273 TraceCheckUtils]: 135: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,169 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {292268#true} {292268#true} #2969#return; {292268#true} is VALID [2018-11-19 18:38:22,169 INFO L273 TraceCheckUtils]: 137: Hoare triple {292268#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {292268#true} is VALID [2018-11-19 18:38:22,170 INFO L256 TraceCheckUtils]: 138: Hoare triple {292268#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {292268#true} is VALID [2018-11-19 18:38:22,170 INFO L273 TraceCheckUtils]: 139: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,170 INFO L273 TraceCheckUtils]: 140: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,170 INFO L273 TraceCheckUtils]: 141: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,170 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {292268#true} {292268#true} #2971#return; {292268#true} is VALID [2018-11-19 18:38:22,170 INFO L273 TraceCheckUtils]: 143: Hoare triple {292268#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {292268#true} is VALID [2018-11-19 18:38:22,171 INFO L256 TraceCheckUtils]: 144: Hoare triple {292268#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {292268#true} is VALID [2018-11-19 18:38:22,171 INFO L273 TraceCheckUtils]: 145: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,171 INFO L273 TraceCheckUtils]: 146: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,171 INFO L273 TraceCheckUtils]: 147: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,171 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {292268#true} {292268#true} #2973#return; {292268#true} is VALID [2018-11-19 18:38:22,171 INFO L273 TraceCheckUtils]: 149: Hoare triple {292268#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {292268#true} is VALID [2018-11-19 18:38:22,172 INFO L256 TraceCheckUtils]: 150: Hoare triple {292268#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {292268#true} is VALID [2018-11-19 18:38:22,172 INFO L273 TraceCheckUtils]: 151: Hoare triple {292268#true} #t~loopctr974 := 0; {292268#true} is VALID [2018-11-19 18:38:22,172 INFO L273 TraceCheckUtils]: 152: Hoare triple {292268#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {292268#true} is VALID [2018-11-19 18:38:22,172 INFO L273 TraceCheckUtils]: 153: Hoare triple {292268#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {292268#true} is VALID [2018-11-19 18:38:22,172 INFO L273 TraceCheckUtils]: 154: Hoare triple {292268#true} assume !(#t~loopctr974 < #amount); {292268#true} is VALID [2018-11-19 18:38:22,172 INFO L273 TraceCheckUtils]: 155: Hoare triple {292268#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {292268#true} is VALID [2018-11-19 18:38:22,173 INFO L268 TraceCheckUtils]: 156: Hoare quadruple {292268#true} {292268#true} #2975#return; {292268#true} is VALID [2018-11-19 18:38:22,173 INFO L273 TraceCheckUtils]: 157: Hoare triple {292268#true} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {292268#true} is VALID [2018-11-19 18:38:22,173 INFO L273 TraceCheckUtils]: 158: Hoare triple {292268#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,173 INFO L273 TraceCheckUtils]: 159: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,173 INFO L273 TraceCheckUtils]: 160: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,173 INFO L273 TraceCheckUtils]: 161: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,174 INFO L273 TraceCheckUtils]: 162: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,174 INFO L273 TraceCheckUtils]: 163: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,174 INFO L273 TraceCheckUtils]: 164: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,174 INFO L273 TraceCheckUtils]: 165: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,174 INFO L273 TraceCheckUtils]: 166: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,174 INFO L273 TraceCheckUtils]: 167: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,175 INFO L273 TraceCheckUtils]: 168: Hoare triple {292268#true} assume #t~switch909; {292268#true} is VALID [2018-11-19 18:38:22,175 INFO L273 TraceCheckUtils]: 169: Hoare triple {292268#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {292268#true} is VALID [2018-11-19 18:38:22,175 INFO L273 TraceCheckUtils]: 170: Hoare triple {292268#true} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {292268#true} is VALID [2018-11-19 18:38:22,175 INFO L273 TraceCheckUtils]: 171: Hoare triple {292268#true} assume #t~switch947; {292268#true} is VALID [2018-11-19 18:38:22,175 INFO L273 TraceCheckUtils]: 172: Hoare triple {292268#true} assume 1 == ~ldv_state_variable_0~0; {292268#true} is VALID [2018-11-19 18:38:22,175 INFO L256 TraceCheckUtils]: 173: Hoare triple {292268#true} call #t~ret948 := ims_pcu_driver_init(); {292268#true} is VALID [2018-11-19 18:38:22,175 INFO L273 TraceCheckUtils]: 174: Hoare triple {292268#true} havoc ~tmp~46; {292268#true} is VALID [2018-11-19 18:38:22,176 INFO L256 TraceCheckUtils]: 175: Hoare triple {292268#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {292268#true} is VALID [2018-11-19 18:38:22,176 INFO L273 TraceCheckUtils]: 176: Hoare triple {292268#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {292268#true} is VALID [2018-11-19 18:38:22,176 INFO L256 TraceCheckUtils]: 177: Hoare triple {292268#true} call ldv_usb_driver_1(); {292268#true} is VALID [2018-11-19 18:38:22,176 INFO L273 TraceCheckUtils]: 178: Hoare triple {292268#true} havoc ~tmp~53.base, ~tmp~53.offset; {292268#true} is VALID [2018-11-19 18:38:22,176 INFO L256 TraceCheckUtils]: 179: Hoare triple {292268#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {292268#true} is VALID [2018-11-19 18:38:22,176 INFO L273 TraceCheckUtils]: 180: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,177 INFO L273 TraceCheckUtils]: 181: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,177 INFO L273 TraceCheckUtils]: 182: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,177 INFO L268 TraceCheckUtils]: 183: Hoare quadruple {292268#true} {292268#true} #2613#return; {292268#true} is VALID [2018-11-19 18:38:22,177 INFO L273 TraceCheckUtils]: 184: Hoare triple {292268#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {292268#true} is VALID [2018-11-19 18:38:22,177 INFO L273 TraceCheckUtils]: 185: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,177 INFO L268 TraceCheckUtils]: 186: Hoare quadruple {292268#true} {292268#true} #2537#return; {292268#true} is VALID [2018-11-19 18:38:22,178 INFO L273 TraceCheckUtils]: 187: Hoare triple {292268#true} #res := ~ldv_func_res~0; {292268#true} is VALID [2018-11-19 18:38:22,178 INFO L273 TraceCheckUtils]: 188: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,178 INFO L268 TraceCheckUtils]: 189: Hoare quadruple {292268#true} {292268#true} #2777#return; {292268#true} is VALID [2018-11-19 18:38:22,178 INFO L273 TraceCheckUtils]: 190: Hoare triple {292268#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {292268#true} is VALID [2018-11-19 18:38:22,178 INFO L273 TraceCheckUtils]: 191: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,178 INFO L268 TraceCheckUtils]: 192: Hoare quadruple {292268#true} {292268#true} #3035#return; {292268#true} is VALID [2018-11-19 18:38:22,178 INFO L273 TraceCheckUtils]: 193: Hoare triple {292268#true} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {292268#true} is VALID [2018-11-19 18:38:22,179 INFO L273 TraceCheckUtils]: 194: Hoare triple {292268#true} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_10~0 := 1; {292268#true} is VALID [2018-11-19 18:38:22,179 INFO L256 TraceCheckUtils]: 195: Hoare triple {292268#true} call ldv_initialize_ims_pcu_attribute_10(); {292268#true} is VALID [2018-11-19 18:38:22,179 INFO L273 TraceCheckUtils]: 196: Hoare triple {292268#true} havoc ~tmp~47.base, ~tmp~47.offset;havoc ~tmp___0~19.base, ~tmp___0~19.offset; {292268#true} is VALID [2018-11-19 18:38:22,179 INFO L256 TraceCheckUtils]: 197: Hoare triple {292268#true} call #t~ret861.base, #t~ret861.offset := ldv_zalloc(1376); {292268#true} is VALID [2018-11-19 18:38:22,179 INFO L273 TraceCheckUtils]: 198: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,180 INFO L273 TraceCheckUtils]: 199: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,180 INFO L273 TraceCheckUtils]: 200: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,180 INFO L268 TraceCheckUtils]: 201: Hoare quadruple {292268#true} {292268#true} #2807#return; {292268#true} is VALID [2018-11-19 18:38:22,180 INFO L273 TraceCheckUtils]: 202: Hoare triple {292268#true} ~tmp~47.base, ~tmp~47.offset := #t~ret861.base, #t~ret861.offset;havoc #t~ret861.base, #t~ret861.offset;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := ~tmp~47.base, ~tmp~47.offset; {292268#true} is VALID [2018-11-19 18:38:22,180 INFO L256 TraceCheckUtils]: 203: Hoare triple {292268#true} call #t~ret862.base, #t~ret862.offset := ldv_zalloc(48); {292268#true} is VALID [2018-11-19 18:38:22,180 INFO L273 TraceCheckUtils]: 204: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,181 INFO L273 TraceCheckUtils]: 205: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,181 INFO L273 TraceCheckUtils]: 206: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,181 INFO L268 TraceCheckUtils]: 207: Hoare quadruple {292268#true} {292268#true} #2809#return; {292268#true} is VALID [2018-11-19 18:38:22,181 INFO L273 TraceCheckUtils]: 208: Hoare triple {292268#true} ~tmp___0~19.base, ~tmp___0~19.offset := #t~ret862.base, #t~ret862.offset;havoc #t~ret862.base, #t~ret862.offset;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := ~tmp___0~19.base, ~tmp___0~19.offset; {292268#true} is VALID [2018-11-19 18:38:22,181 INFO L273 TraceCheckUtils]: 209: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,181 INFO L268 TraceCheckUtils]: 210: Hoare quadruple {292268#true} {292268#true} #3037#return; {292268#true} is VALID [2018-11-19 18:38:22,181 INFO L273 TraceCheckUtils]: 211: Hoare triple {292268#true} ~ldv_state_variable_4~0 := 1;~ldv_state_variable_8~0 := 1; {292268#true} is VALID [2018-11-19 18:38:22,182 INFO L256 TraceCheckUtils]: 212: Hoare triple {292268#true} call ldv_initialize_ims_pcu_attribute_8(); {292268#true} is VALID [2018-11-19 18:38:22,182 INFO L273 TraceCheckUtils]: 213: Hoare triple {292268#true} havoc ~tmp~51.base, ~tmp~51.offset;havoc ~tmp___0~23.base, ~tmp___0~23.offset; {292268#true} is VALID [2018-11-19 18:38:22,182 INFO L256 TraceCheckUtils]: 214: Hoare triple {292268#true} call #t~ret869.base, #t~ret869.offset := ldv_zalloc(1376); {292268#true} is VALID [2018-11-19 18:38:22,182 INFO L273 TraceCheckUtils]: 215: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,182 INFO L273 TraceCheckUtils]: 216: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,182 INFO L273 TraceCheckUtils]: 217: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,182 INFO L268 TraceCheckUtils]: 218: Hoare quadruple {292268#true} {292268#true} #2631#return; {292268#true} is VALID [2018-11-19 18:38:22,182 INFO L273 TraceCheckUtils]: 219: Hoare triple {292268#true} ~tmp~51.base, ~tmp~51.offset := #t~ret869.base, #t~ret869.offset;havoc #t~ret869.base, #t~ret869.offset;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := ~tmp~51.base, ~tmp~51.offset; {292268#true} is VALID [2018-11-19 18:38:22,182 INFO L256 TraceCheckUtils]: 220: Hoare triple {292268#true} call #t~ret870.base, #t~ret870.offset := ldv_zalloc(48); {292268#true} is VALID [2018-11-19 18:38:22,182 INFO L273 TraceCheckUtils]: 221: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,183 INFO L273 TraceCheckUtils]: 222: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,183 INFO L273 TraceCheckUtils]: 223: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,183 INFO L268 TraceCheckUtils]: 224: Hoare quadruple {292268#true} {292268#true} #2633#return; {292268#true} is VALID [2018-11-19 18:38:22,183 INFO L273 TraceCheckUtils]: 225: Hoare triple {292268#true} ~tmp___0~23.base, ~tmp___0~23.offset := #t~ret870.base, #t~ret870.offset;havoc #t~ret870.base, #t~ret870.offset;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := ~tmp___0~23.base, ~tmp___0~23.offset; {292268#true} is VALID [2018-11-19 18:38:22,183 INFO L273 TraceCheckUtils]: 226: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,183 INFO L268 TraceCheckUtils]: 227: Hoare quadruple {292268#true} {292268#true} #3039#return; {292268#true} is VALID [2018-11-19 18:38:22,183 INFO L273 TraceCheckUtils]: 228: Hoare triple {292268#true} ~ldv_state_variable_2~0 := 1;~ldv_state_variable_9~0 := 1; {292268#true} is VALID [2018-11-19 18:38:22,183 INFO L256 TraceCheckUtils]: 229: Hoare triple {292268#true} call ldv_initialize_ims_pcu_attribute_9(); {292268#true} is VALID [2018-11-19 18:38:22,183 INFO L273 TraceCheckUtils]: 230: Hoare triple {292268#true} havoc ~tmp~49.base, ~tmp~49.offset;havoc ~tmp___0~21.base, ~tmp___0~21.offset; {292268#true} is VALID [2018-11-19 18:38:22,183 INFO L256 TraceCheckUtils]: 231: Hoare triple {292268#true} call #t~ret865.base, #t~ret865.offset := ldv_zalloc(1376); {292268#true} is VALID [2018-11-19 18:38:22,184 INFO L273 TraceCheckUtils]: 232: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,184 INFO L273 TraceCheckUtils]: 233: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,184 INFO L273 TraceCheckUtils]: 234: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,184 INFO L268 TraceCheckUtils]: 235: Hoare quadruple {292268#true} {292268#true} #2627#return; {292268#true} is VALID [2018-11-19 18:38:22,184 INFO L273 TraceCheckUtils]: 236: Hoare triple {292268#true} ~tmp~49.base, ~tmp~49.offset := #t~ret865.base, #t~ret865.offset;havoc #t~ret865.base, #t~ret865.offset;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := ~tmp~49.base, ~tmp~49.offset; {292268#true} is VALID [2018-11-19 18:38:22,184 INFO L256 TraceCheckUtils]: 237: Hoare triple {292268#true} call #t~ret866.base, #t~ret866.offset := ldv_zalloc(48); {292268#true} is VALID [2018-11-19 18:38:22,184 INFO L273 TraceCheckUtils]: 238: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,184 INFO L273 TraceCheckUtils]: 239: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,184 INFO L273 TraceCheckUtils]: 240: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,185 INFO L268 TraceCheckUtils]: 241: Hoare quadruple {292268#true} {292268#true} #2629#return; {292268#true} is VALID [2018-11-19 18:38:22,185 INFO L273 TraceCheckUtils]: 242: Hoare triple {292268#true} ~tmp___0~21.base, ~tmp___0~21.offset := #t~ret866.base, #t~ret866.offset;havoc #t~ret866.base, #t~ret866.offset;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := ~tmp___0~21.base, ~tmp___0~21.offset; {292268#true} is VALID [2018-11-19 18:38:22,185 INFO L273 TraceCheckUtils]: 243: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,185 INFO L268 TraceCheckUtils]: 244: Hoare quadruple {292268#true} {292268#true} #3041#return; {292268#true} is VALID [2018-11-19 18:38:22,185 INFO L273 TraceCheckUtils]: 245: Hoare triple {292268#true} ~ldv_state_variable_7~0 := 1; {292268#true} is VALID [2018-11-19 18:38:22,185 INFO L256 TraceCheckUtils]: 246: Hoare triple {292268#true} call ldv_initialize_ims_pcu_attribute_7(); {292268#true} is VALID [2018-11-19 18:38:22,185 INFO L273 TraceCheckUtils]: 247: Hoare triple {292268#true} havoc ~tmp~52.base, ~tmp~52.offset;havoc ~tmp___0~24.base, ~tmp___0~24.offset; {292268#true} is VALID [2018-11-19 18:38:22,185 INFO L256 TraceCheckUtils]: 248: Hoare triple {292268#true} call #t~ret871.base, #t~ret871.offset := ldv_zalloc(1376); {292268#true} is VALID [2018-11-19 18:38:22,185 INFO L273 TraceCheckUtils]: 249: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,185 INFO L273 TraceCheckUtils]: 250: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,186 INFO L273 TraceCheckUtils]: 251: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,186 INFO L268 TraceCheckUtils]: 252: Hoare quadruple {292268#true} {292268#true} #2619#return; {292268#true} is VALID [2018-11-19 18:38:22,186 INFO L273 TraceCheckUtils]: 253: Hoare triple {292268#true} ~tmp~52.base, ~tmp~52.offset := #t~ret871.base, #t~ret871.offset;havoc #t~ret871.base, #t~ret871.offset;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := ~tmp~52.base, ~tmp~52.offset; {292268#true} is VALID [2018-11-19 18:38:22,186 INFO L256 TraceCheckUtils]: 254: Hoare triple {292268#true} call #t~ret872.base, #t~ret872.offset := ldv_zalloc(48); {292268#true} is VALID [2018-11-19 18:38:22,186 INFO L273 TraceCheckUtils]: 255: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,186 INFO L273 TraceCheckUtils]: 256: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,186 INFO L273 TraceCheckUtils]: 257: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,186 INFO L268 TraceCheckUtils]: 258: Hoare quadruple {292268#true} {292268#true} #2621#return; {292268#true} is VALID [2018-11-19 18:38:22,186 INFO L273 TraceCheckUtils]: 259: Hoare triple {292268#true} ~tmp___0~24.base, ~tmp___0~24.offset := #t~ret872.base, #t~ret872.offset;havoc #t~ret872.base, #t~ret872.offset;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := ~tmp___0~24.base, ~tmp___0~24.offset; {292268#true} is VALID [2018-11-19 18:38:22,186 INFO L273 TraceCheckUtils]: 260: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,187 INFO L268 TraceCheckUtils]: 261: Hoare quadruple {292268#true} {292268#true} #3043#return; {292268#true} is VALID [2018-11-19 18:38:22,187 INFO L273 TraceCheckUtils]: 262: Hoare triple {292268#true} ~ldv_state_variable_3~0 := 1;~ldv_state_variable_11~0 := 1; {292268#true} is VALID [2018-11-19 18:38:22,187 INFO L256 TraceCheckUtils]: 263: Hoare triple {292268#true} call ldv_initialize_ims_pcu_attribute_11(); {292268#true} is VALID [2018-11-19 18:38:22,187 INFO L273 TraceCheckUtils]: 264: Hoare triple {292268#true} havoc ~tmp~50.base, ~tmp~50.offset;havoc ~tmp___0~22.base, ~tmp___0~22.offset; {292268#true} is VALID [2018-11-19 18:38:22,187 INFO L256 TraceCheckUtils]: 265: Hoare triple {292268#true} call #t~ret867.base, #t~ret867.offset := ldv_zalloc(1376); {292268#true} is VALID [2018-11-19 18:38:22,187 INFO L273 TraceCheckUtils]: 266: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,187 INFO L273 TraceCheckUtils]: 267: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,187 INFO L273 TraceCheckUtils]: 268: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,187 INFO L268 TraceCheckUtils]: 269: Hoare quadruple {292268#true} {292268#true} #2811#return; {292268#true} is VALID [2018-11-19 18:38:22,188 INFO L273 TraceCheckUtils]: 270: Hoare triple {292268#true} ~tmp~50.base, ~tmp~50.offset := #t~ret867.base, #t~ret867.offset;havoc #t~ret867.base, #t~ret867.offset;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := ~tmp~50.base, ~tmp~50.offset; {292268#true} is VALID [2018-11-19 18:38:22,188 INFO L256 TraceCheckUtils]: 271: Hoare triple {292268#true} call #t~ret868.base, #t~ret868.offset := ldv_zalloc(48); {292268#true} is VALID [2018-11-19 18:38:22,188 INFO L273 TraceCheckUtils]: 272: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,188 INFO L273 TraceCheckUtils]: 273: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,188 INFO L273 TraceCheckUtils]: 274: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,188 INFO L268 TraceCheckUtils]: 275: Hoare quadruple {292268#true} {292268#true} #2813#return; {292268#true} is VALID [2018-11-19 18:38:22,188 INFO L273 TraceCheckUtils]: 276: Hoare triple {292268#true} ~tmp___0~22.base, ~tmp___0~22.offset := #t~ret868.base, #t~ret868.offset;havoc #t~ret868.base, #t~ret868.offset;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := ~tmp___0~22.base, ~tmp___0~22.offset; {292268#true} is VALID [2018-11-19 18:38:22,188 INFO L273 TraceCheckUtils]: 277: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,188 INFO L268 TraceCheckUtils]: 278: Hoare quadruple {292268#true} {292268#true} #3045#return; {292268#true} is VALID [2018-11-19 18:38:22,188 INFO L273 TraceCheckUtils]: 279: Hoare triple {292268#true} ~ldv_state_variable_6~0 := 1; {292268#true} is VALID [2018-11-19 18:38:22,189 INFO L256 TraceCheckUtils]: 280: Hoare triple {292268#true} call ldv_initialize_ims_pcu_attribute_6(); {292268#true} is VALID [2018-11-19 18:38:22,189 INFO L273 TraceCheckUtils]: 281: Hoare triple {292268#true} havoc ~tmp~48.base, ~tmp~48.offset;havoc ~tmp___0~20.base, ~tmp___0~20.offset; {292268#true} is VALID [2018-11-19 18:38:22,189 INFO L256 TraceCheckUtils]: 282: Hoare triple {292268#true} call #t~ret863.base, #t~ret863.offset := ldv_zalloc(1376); {292268#true} is VALID [2018-11-19 18:38:22,189 INFO L273 TraceCheckUtils]: 283: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,189 INFO L273 TraceCheckUtils]: 284: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,189 INFO L273 TraceCheckUtils]: 285: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,189 INFO L268 TraceCheckUtils]: 286: Hoare quadruple {292268#true} {292268#true} #2623#return; {292268#true} is VALID [2018-11-19 18:38:22,189 INFO L273 TraceCheckUtils]: 287: Hoare triple {292268#true} ~tmp~48.base, ~tmp~48.offset := #t~ret863.base, #t~ret863.offset;havoc #t~ret863.base, #t~ret863.offset;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := ~tmp~48.base, ~tmp~48.offset; {292268#true} is VALID [2018-11-19 18:38:22,189 INFO L256 TraceCheckUtils]: 288: Hoare triple {292268#true} call #t~ret864.base, #t~ret864.offset := ldv_zalloc(48); {292268#true} is VALID [2018-11-19 18:38:22,189 INFO L273 TraceCheckUtils]: 289: Hoare triple {292268#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {292268#true} is VALID [2018-11-19 18:38:22,190 INFO L273 TraceCheckUtils]: 290: Hoare triple {292268#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,190 INFO L273 TraceCheckUtils]: 291: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,190 INFO L268 TraceCheckUtils]: 292: Hoare quadruple {292268#true} {292268#true} #2625#return; {292268#true} is VALID [2018-11-19 18:38:22,190 INFO L273 TraceCheckUtils]: 293: Hoare triple {292268#true} ~tmp___0~20.base, ~tmp___0~20.offset := #t~ret864.base, #t~ret864.offset;havoc #t~ret864.base, #t~ret864.offset;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := ~tmp___0~20.base, ~tmp___0~20.offset; {292268#true} is VALID [2018-11-19 18:38:22,190 INFO L273 TraceCheckUtils]: 294: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,190 INFO L268 TraceCheckUtils]: 295: Hoare quadruple {292268#true} {292268#true} #3047#return; {292268#true} is VALID [2018-11-19 18:38:22,190 INFO L273 TraceCheckUtils]: 296: Hoare triple {292268#true} assume !(0 != ~ldv_retval_4~0); {292268#true} is VALID [2018-11-19 18:38:22,190 INFO L273 TraceCheckUtils]: 297: Hoare triple {292268#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,190 INFO L273 TraceCheckUtils]: 298: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,191 INFO L273 TraceCheckUtils]: 299: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,191 INFO L273 TraceCheckUtils]: 300: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,191 INFO L273 TraceCheckUtils]: 301: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,191 INFO L273 TraceCheckUtils]: 302: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,191 INFO L273 TraceCheckUtils]: 303: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,191 INFO L273 TraceCheckUtils]: 304: Hoare triple {292268#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {292268#true} is VALID [2018-11-19 18:38:22,191 INFO L273 TraceCheckUtils]: 305: Hoare triple {292268#true} assume #t~switch909; {292268#true} is VALID [2018-11-19 18:38:22,191 INFO L273 TraceCheckUtils]: 306: Hoare triple {292268#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {292268#true} is VALID [2018-11-19 18:38:22,191 INFO L273 TraceCheckUtils]: 307: Hoare triple {292268#true} assume #t~switch937; {292268#true} is VALID [2018-11-19 18:38:22,192 INFO L273 TraceCheckUtils]: 308: Hoare triple {292268#true} assume 1 == ~ldv_state_variable_1~0; {292268#true} is VALID [2018-11-19 18:38:22,192 INFO L256 TraceCheckUtils]: 309: Hoare triple {292268#true} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {292268#true} is VALID [2018-11-19 18:38:22,192 INFO L273 TraceCheckUtils]: 310: Hoare triple {292268#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {292268#true} is VALID [2018-11-19 18:38:22,192 INFO L256 TraceCheckUtils]: 311: Hoare triple {292268#true} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {292268#true} is VALID [2018-11-19 18:38:22,192 INFO L273 TraceCheckUtils]: 312: Hoare triple {292268#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {292268#true} is VALID [2018-11-19 18:38:22,192 INFO L256 TraceCheckUtils]: 313: Hoare triple {292268#true} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {292268#true} is VALID [2018-11-19 18:38:22,193 INFO L273 TraceCheckUtils]: 314: Hoare triple {292268#true} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {292268#true} is VALID [2018-11-19 18:38:22,193 INFO L256 TraceCheckUtils]: 315: Hoare triple {292268#true} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {292268#true} is VALID [2018-11-19 18:38:22,193 INFO L273 TraceCheckUtils]: 316: Hoare triple {292268#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {292268#true} is VALID [2018-11-19 18:38:22,193 INFO L273 TraceCheckUtils]: 317: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,193 INFO L268 TraceCheckUtils]: 318: Hoare quadruple {292268#true} {292268#true} #2817#return; {292268#true} is VALID [2018-11-19 18:38:22,193 INFO L273 TraceCheckUtils]: 319: Hoare triple {292268#true} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {292268#true} is VALID [2018-11-19 18:38:22,194 INFO L273 TraceCheckUtils]: 320: Hoare triple {292268#true} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {292268#true} is VALID [2018-11-19 18:38:22,194 INFO L273 TraceCheckUtils]: 321: Hoare triple {292268#true} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {292268#true} is VALID [2018-11-19 18:38:22,194 INFO L273 TraceCheckUtils]: 322: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,194 INFO L268 TraceCheckUtils]: 323: Hoare quadruple {292268#true} {292268#true} #3151#return; {292268#true} is VALID [2018-11-19 18:38:22,194 INFO L273 TraceCheckUtils]: 324: Hoare triple {292268#true} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {292268#true} is VALID [2018-11-19 18:38:22,194 INFO L273 TraceCheckUtils]: 325: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,194 INFO L268 TraceCheckUtils]: 326: Hoare quadruple {292268#true} {292268#true} #3095#return; {292268#true} is VALID [2018-11-19 18:38:22,195 INFO L273 TraceCheckUtils]: 327: Hoare triple {292268#true} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {292268#true} is VALID [2018-11-19 18:38:22,195 INFO L256 TraceCheckUtils]: 328: Hoare triple {292268#true} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {292268#true} is VALID [2018-11-19 18:38:22,195 INFO L273 TraceCheckUtils]: 329: Hoare triple {292268#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {292268#true} is VALID [2018-11-19 18:38:22,195 INFO L256 TraceCheckUtils]: 330: Hoare triple {292268#true} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {292268#true} is VALID [2018-11-19 18:38:22,195 INFO L273 TraceCheckUtils]: 331: Hoare triple {292268#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {292268#true} is VALID [2018-11-19 18:38:22,195 INFO L256 TraceCheckUtils]: 332: Hoare triple {292268#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {292268#true} is VALID [2018-11-19 18:38:22,196 INFO L273 TraceCheckUtils]: 333: Hoare triple {292268#true} ~size := #in~size;~t := #in~t; {292268#true} is VALID [2018-11-19 18:38:22,196 INFO L256 TraceCheckUtils]: 334: Hoare triple {292268#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {292268#true} is VALID [2018-11-19 18:38:22,196 INFO L273 TraceCheckUtils]: 335: Hoare triple {292268#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {292268#true} is VALID [2018-11-19 18:38:22,196 INFO L273 TraceCheckUtils]: 336: Hoare triple {292268#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {292268#true} is VALID [2018-11-19 18:38:22,196 INFO L273 TraceCheckUtils]: 337: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,196 INFO L268 TraceCheckUtils]: 338: Hoare quadruple {292268#true} {292268#true} #2691#return; {292268#true} is VALID [2018-11-19 18:38:22,197 INFO L273 TraceCheckUtils]: 339: Hoare triple {292268#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {292268#true} is VALID [2018-11-19 18:38:22,197 INFO L273 TraceCheckUtils]: 340: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,197 INFO L268 TraceCheckUtils]: 341: Hoare quadruple {292268#true} {292268#true} #2781#return; {292268#true} is VALID [2018-11-19 18:38:22,197 INFO L273 TraceCheckUtils]: 342: Hoare triple {292268#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {292268#true} is VALID [2018-11-19 18:38:22,197 INFO L273 TraceCheckUtils]: 343: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,197 INFO L268 TraceCheckUtils]: 344: Hoare quadruple {292268#true} {292268#true} #2779#return; {292268#true} is VALID [2018-11-19 18:38:22,197 INFO L273 TraceCheckUtils]: 345: Hoare triple {292268#true} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {292268#true} is VALID [2018-11-19 18:38:22,198 INFO L273 TraceCheckUtils]: 346: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,198 INFO L268 TraceCheckUtils]: 347: Hoare quadruple {292268#true} {292268#true} #3097#return; {292268#true} is VALID [2018-11-19 18:38:22,198 INFO L273 TraceCheckUtils]: 348: Hoare triple {292268#true} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {292268#true} is VALID [2018-11-19 18:38:22,198 INFO L273 TraceCheckUtils]: 349: Hoare triple {292268#true} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {292268#true} is VALID [2018-11-19 18:38:22,198 INFO L256 TraceCheckUtils]: 350: Hoare triple {292268#true} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {292268#true} is VALID [2018-11-19 18:38:22,198 INFO L273 TraceCheckUtils]: 351: Hoare triple {292268#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {292268#true} is VALID [2018-11-19 18:38:22,199 INFO L273 TraceCheckUtils]: 352: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,199 INFO L268 TraceCheckUtils]: 353: Hoare quadruple {292268#true} {292268#true} #3099#return; {292268#true} is VALID [2018-11-19 18:38:22,199 INFO L256 TraceCheckUtils]: 354: Hoare triple {292268#true} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {292268#true} is VALID [2018-11-19 18:38:22,199 INFO L273 TraceCheckUtils]: 355: Hoare triple {292268#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {292268#true} is VALID [2018-11-19 18:38:22,199 INFO L273 TraceCheckUtils]: 356: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,199 INFO L268 TraceCheckUtils]: 357: Hoare quadruple {292268#true} {292268#true} #3101#return; {292268#true} is VALID [2018-11-19 18:38:22,200 INFO L256 TraceCheckUtils]: 358: Hoare triple {292268#true} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {292268#true} is VALID [2018-11-19 18:38:22,200 INFO L273 TraceCheckUtils]: 359: Hoare triple {292268#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {292268#true} is VALID [2018-11-19 18:38:22,200 INFO L256 TraceCheckUtils]: 360: Hoare triple {292268#true} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {292268#true} is VALID [2018-11-19 18:38:22,200 INFO L273 TraceCheckUtils]: 361: Hoare triple {292268#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {292268#true} is VALID [2018-11-19 18:38:22,200 INFO L273 TraceCheckUtils]: 362: Hoare triple {292268#true} assume 0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616;havoc #t~nondet638;#res.base, #res.offset := 0, 0;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {292268#true} is VALID [2018-11-19 18:38:22,200 INFO L273 TraceCheckUtils]: 363: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,200 INFO L268 TraceCheckUtils]: 364: Hoare quadruple {292268#true} {292268#true} #3137#return; {292268#true} is VALID [2018-11-19 18:38:22,201 INFO L273 TraceCheckUtils]: 365: Hoare triple {292268#true} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {292268#true} is VALID [2018-11-19 18:38:22,201 INFO L273 TraceCheckUtils]: 366: Hoare triple {292268#true} assume !(0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616);call #t~mem658.base, #t~mem658.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem659 := read~int(~union_desc~1.base, 3 + ~union_desc~1.offset, 1);call #t~ret660.base, #t~ret660.offset := usb_ifnum_to_if(#t~mem658.base, #t~mem658.offset, #t~mem659 % 256);call write~$Pointer$(#t~ret660.base, #t~ret660.offset, ~pcu.base, 79 + ~pcu.offset, 8);havoc #t~mem659;havoc #t~ret660.base, #t~ret660.offset;havoc #t~mem658.base, #t~mem658.offset;call #t~mem661.base, #t~mem661.offset := read~$Pointer$(~pcu.base, 79 + ~pcu.offset, 8);call #t~mem662.base, #t~mem662.offset := read~$Pointer$(#t~mem661.base, 8 + #t~mem661.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem662.base, #t~mem662.offset;havoc #t~mem662.base, #t~mem662.offset;havoc #t~mem661.base, #t~mem661.offset;call #t~mem663.base, #t~mem663.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem663.base, #t~mem663.offset, ~pcu.base, 87 + ~pcu.offset, 8);havoc #t~mem663.base, #t~mem663.offset;call #t~mem664.base, #t~mem664.offset := read~$Pointer$(~pcu.base, 87 + ~pcu.offset, 8); {292268#true} is VALID [2018-11-19 18:38:22,201 INFO L256 TraceCheckUtils]: 367: Hoare triple {292268#true} call #t~ret665 := usb_endpoint_maxp(#t~mem664.base, #t~mem664.offset); {292268#true} is VALID [2018-11-19 18:38:22,201 INFO L273 TraceCheckUtils]: 368: Hoare triple {292268#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {292268#true} is VALID [2018-11-19 18:38:22,201 INFO L273 TraceCheckUtils]: 369: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,201 INFO L268 TraceCheckUtils]: 370: Hoare quadruple {292268#true} {292268#true} #3139#return; {292268#true} is VALID [2018-11-19 18:38:22,202 INFO L273 TraceCheckUtils]: 371: Hoare triple {292268#true} assume -2147483648 <= #t~ret665 && #t~ret665 <= 2147483647;~tmp~37 := #t~ret665;havoc #t~ret665;havoc #t~mem664.base, #t~mem664.offset;call write~int(~tmp~37, ~pcu.base, 119 + ~pcu.offset, 4);call #t~mem666.base, #t~mem666.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem667 := read~int(~union_desc~1.base, 4 + ~union_desc~1.offset, 1);call #t~ret668.base, #t~ret668.offset := usb_ifnum_to_if(#t~mem666.base, #t~mem666.offset, #t~mem667 % 256);call write~$Pointer$(#t~ret668.base, #t~ret668.offset, ~pcu.base, 123 + ~pcu.offset, 8);havoc #t~mem666.base, #t~mem666.offset;havoc #t~mem667;havoc #t~ret668.base, #t~ret668.offset;call #t~mem669.base, #t~mem669.offset := read~$Pointer$(~pcu.base, 123 + ~pcu.offset, 8);call #t~mem670.base, #t~mem670.offset := read~$Pointer$(#t~mem669.base, 8 + #t~mem669.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem670.base, #t~mem670.offset;havoc #t~mem670.base, #t~mem670.offset;havoc #t~mem669.base, #t~mem669.offset;call #t~mem671 := read~int(~alt~0.base, 4 + ~alt~0.offset, 1); {292268#true} is VALID [2018-11-19 18:38:22,202 INFO L273 TraceCheckUtils]: 372: Hoare triple {292268#true} assume !(2 != #t~mem671 % 256 % 4294967296);havoc #t~mem671;call #t~mem676.base, #t~mem676.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem676.base, #t~mem676.offset, ~pcu.base, 167 + ~pcu.offset, 8);havoc #t~mem676.base, #t~mem676.offset;call #t~mem677.base, #t~mem677.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {292268#true} is VALID [2018-11-19 18:38:22,202 INFO L256 TraceCheckUtils]: 373: Hoare triple {292268#true} call #t~ret678 := usb_endpoint_is_bulk_out(#t~mem677.base, #t~mem677.offset); {292268#true} is VALID [2018-11-19 18:38:22,202 INFO L273 TraceCheckUtils]: 374: Hoare triple {292268#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~4;havoc ~tmp___0~1;havoc ~tmp___1~1; {292268#true} is VALID [2018-11-19 18:38:22,202 INFO L256 TraceCheckUtils]: 375: Hoare triple {292268#true} call #t~ret25 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {292268#true} is VALID [2018-11-19 18:38:22,202 INFO L273 TraceCheckUtils]: 376: Hoare triple {292268#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {292268#true} is VALID [2018-11-19 18:38:22,203 INFO L273 TraceCheckUtils]: 377: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,203 INFO L268 TraceCheckUtils]: 378: Hoare quadruple {292268#true} {292268#true} #2887#return; {292268#true} is VALID [2018-11-19 18:38:22,203 INFO L273 TraceCheckUtils]: 379: Hoare triple {292268#true} assume -2147483648 <= #t~ret25 && #t~ret25 <= 2147483647;~tmp~4 := #t~ret25;havoc #t~ret25; {292268#true} is VALID [2018-11-19 18:38:22,203 INFO L273 TraceCheckUtils]: 380: Hoare triple {292268#true} assume 0 != ~tmp~4; {292268#true} is VALID [2018-11-19 18:38:22,203 INFO L256 TraceCheckUtils]: 381: Hoare triple {292268#true} call #t~ret26 := usb_endpoint_dir_out(~epd.base, ~epd.offset); {292268#true} is VALID [2018-11-19 18:38:22,203 INFO L273 TraceCheckUtils]: 382: Hoare triple {292268#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem21 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem21 % 256 % 256 <= 127 then #t~mem21 % 256 % 256 else #t~mem21 % 256 % 256 - 256) >= 0 then 1 else 0);havoc #t~mem21; {292268#true} is VALID [2018-11-19 18:38:22,204 INFO L273 TraceCheckUtils]: 383: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,204 INFO L268 TraceCheckUtils]: 384: Hoare quadruple {292268#true} {292268#true} #2889#return; {292268#true} is VALID [2018-11-19 18:38:22,204 INFO L273 TraceCheckUtils]: 385: Hoare triple {292268#true} assume -2147483648 <= #t~ret26 && #t~ret26 <= 2147483647;~tmp___0~1 := #t~ret26;havoc #t~ret26; {292268#true} is VALID [2018-11-19 18:38:22,204 INFO L273 TraceCheckUtils]: 386: Hoare triple {292268#true} assume 0 != ~tmp___0~1;~tmp___1~1 := 1; {292268#true} is VALID [2018-11-19 18:38:22,204 INFO L273 TraceCheckUtils]: 387: Hoare triple {292268#true} #res := ~tmp___1~1; {292268#true} is VALID [2018-11-19 18:38:22,204 INFO L273 TraceCheckUtils]: 388: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,205 INFO L268 TraceCheckUtils]: 389: Hoare quadruple {292268#true} {292268#true} #3141#return; {292268#true} is VALID [2018-11-19 18:38:22,205 INFO L273 TraceCheckUtils]: 390: Hoare triple {292268#true} assume -2147483648 <= #t~ret678 && #t~ret678 <= 2147483647;~tmp___0~16 := #t~ret678;havoc #t~mem677.base, #t~mem677.offset;havoc #t~ret678; {292268#true} is VALID [2018-11-19 18:38:22,205 INFO L273 TraceCheckUtils]: 391: Hoare triple {292268#true} assume !(0 == ~tmp___0~16);call #t~mem682.base, #t~mem682.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {292268#true} is VALID [2018-11-19 18:38:22,205 INFO L256 TraceCheckUtils]: 392: Hoare triple {292268#true} call #t~ret683 := usb_endpoint_maxp(#t~mem682.base, #t~mem682.offset); {292268#true} is VALID [2018-11-19 18:38:22,205 INFO L273 TraceCheckUtils]: 393: Hoare triple {292268#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {292268#true} is VALID [2018-11-19 18:38:22,205 INFO L273 TraceCheckUtils]: 394: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,206 INFO L268 TraceCheckUtils]: 395: Hoare quadruple {292268#true} {292268#true} #3143#return; {292268#true} is VALID [2018-11-19 18:38:22,206 INFO L273 TraceCheckUtils]: 396: Hoare triple {292268#true} assume -2147483648 <= #t~ret683 && #t~ret683 <= 2147483647;~tmp___1~7 := #t~ret683;havoc #t~mem682.base, #t~mem682.offset;havoc #t~ret683;call write~int(~tmp___1~7, ~pcu.base, 183 + ~pcu.offset, 4);call #t~mem684 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {292268#true} is VALID [2018-11-19 18:38:22,206 INFO L273 TraceCheckUtils]: 397: Hoare triple {292268#true} assume !(#t~mem684 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem684;call #t~mem689.base, #t~mem689.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem689.base, 63 + #t~mem689.offset, ~pcu.base, 131 + ~pcu.offset, 8);havoc #t~mem689.base, #t~mem689.offset;call #t~mem690.base, #t~mem690.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {292268#true} is VALID [2018-11-19 18:38:22,206 INFO L256 TraceCheckUtils]: 398: Hoare triple {292268#true} call #t~ret691 := usb_endpoint_is_bulk_in(#t~mem690.base, #t~mem690.offset); {292268#true} is VALID [2018-11-19 18:38:22,206 INFO L273 TraceCheckUtils]: 399: Hoare triple {292268#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~3;havoc ~tmp___0~0;havoc ~tmp___1~0; {292268#true} is VALID [2018-11-19 18:38:22,207 INFO L256 TraceCheckUtils]: 400: Hoare triple {292268#true} call #t~ret23 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {292268#true} is VALID [2018-11-19 18:38:22,207 INFO L273 TraceCheckUtils]: 401: Hoare triple {292268#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {292268#true} is VALID [2018-11-19 18:38:22,207 INFO L273 TraceCheckUtils]: 402: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,207 INFO L268 TraceCheckUtils]: 403: Hoare quadruple {292268#true} {292268#true} #2915#return; {292268#true} is VALID [2018-11-19 18:38:22,207 INFO L273 TraceCheckUtils]: 404: Hoare triple {292268#true} assume -2147483648 <= #t~ret23 && #t~ret23 <= 2147483647;~tmp~3 := #t~ret23;havoc #t~ret23; {292268#true} is VALID [2018-11-19 18:38:22,208 INFO L273 TraceCheckUtils]: 405: Hoare triple {292268#true} assume !(0 != ~tmp~3);~tmp___1~0 := 0; {292270#(= 0 usb_endpoint_is_bulk_in_~tmp___1~0)} is VALID [2018-11-19 18:38:22,212 INFO L273 TraceCheckUtils]: 406: Hoare triple {292270#(= 0 usb_endpoint_is_bulk_in_~tmp___1~0)} #res := ~tmp___1~0; {292271#(= 0 |usb_endpoint_is_bulk_in_#res|)} is VALID [2018-11-19 18:38:22,213 INFO L273 TraceCheckUtils]: 407: Hoare triple {292271#(= 0 |usb_endpoint_is_bulk_in_#res|)} assume true; {292271#(= 0 |usb_endpoint_is_bulk_in_#res|)} is VALID [2018-11-19 18:38:22,217 INFO L268 TraceCheckUtils]: 408: Hoare quadruple {292271#(= 0 |usb_endpoint_is_bulk_in_#res|)} {292268#true} #3145#return; {292272#(= 0 |ims_pcu_parse_cdc_data_#t~ret691|)} is VALID [2018-11-19 18:38:22,220 INFO L273 TraceCheckUtils]: 409: Hoare triple {292272#(= 0 |ims_pcu_parse_cdc_data_#t~ret691|)} assume -2147483648 <= #t~ret691 && #t~ret691 <= 2147483647;~tmp___2~3 := #t~ret691;havoc #t~ret691;havoc #t~mem690.base, #t~mem690.offset; {292273#(= ims_pcu_parse_cdc_data_~tmp___2~3 0)} is VALID [2018-11-19 18:38:22,221 INFO L273 TraceCheckUtils]: 410: Hoare triple {292273#(= ims_pcu_parse_cdc_data_~tmp___2~3 0)} assume !(0 == ~tmp___2~3);call #t~mem695.base, #t~mem695.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {292269#false} is VALID [2018-11-19 18:38:22,221 INFO L256 TraceCheckUtils]: 411: Hoare triple {292269#false} call #t~ret696 := usb_endpoint_maxp(#t~mem695.base, #t~mem695.offset); {292268#true} is VALID [2018-11-19 18:38:22,221 INFO L273 TraceCheckUtils]: 412: Hoare triple {292268#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {292268#true} is VALID [2018-11-19 18:38:22,221 INFO L273 TraceCheckUtils]: 413: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,221 INFO L268 TraceCheckUtils]: 414: Hoare quadruple {292268#true} {292269#false} #3147#return; {292269#false} is VALID [2018-11-19 18:38:22,221 INFO L273 TraceCheckUtils]: 415: Hoare triple {292269#false} assume -2147483648 <= #t~ret696 && #t~ret696 <= 2147483647;~tmp___3~2 := #t~ret696;havoc #t~ret696;havoc #t~mem695.base, #t~mem695.offset;call write~int(~tmp___3~2, ~pcu.base, 163 + ~pcu.offset, 4);call #t~mem697 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {292269#false} is VALID [2018-11-19 18:38:22,221 INFO L273 TraceCheckUtils]: 416: Hoare triple {292269#false} assume !(#t~mem697 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem697;#res := 0; {292269#false} is VALID [2018-11-19 18:38:22,221 INFO L273 TraceCheckUtils]: 417: Hoare triple {292269#false} assume true; {292269#false} is VALID [2018-11-19 18:38:22,222 INFO L268 TraceCheckUtils]: 418: Hoare quadruple {292269#false} {292268#true} #3103#return; {292269#false} is VALID [2018-11-19 18:38:22,222 INFO L273 TraceCheckUtils]: 419: Hoare triple {292269#false} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {292269#false} is VALID [2018-11-19 18:38:22,222 INFO L273 TraceCheckUtils]: 420: Hoare triple {292269#false} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {292269#false} is VALID [2018-11-19 18:38:22,222 INFO L273 TraceCheckUtils]: 421: Hoare triple {292269#false} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {292269#false} is VALID [2018-11-19 18:38:22,222 INFO L256 TraceCheckUtils]: 422: Hoare triple {292269#false} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {292268#true} is VALID [2018-11-19 18:38:22,222 INFO L273 TraceCheckUtils]: 423: Hoare triple {292268#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {292268#true} is VALID [2018-11-19 18:38:22,222 INFO L256 TraceCheckUtils]: 424: Hoare triple {292268#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {292268#true} is VALID [2018-11-19 18:38:22,222 INFO L273 TraceCheckUtils]: 425: Hoare triple {292268#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {292268#true} is VALID [2018-11-19 18:38:22,223 INFO L273 TraceCheckUtils]: 426: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,223 INFO L268 TraceCheckUtils]: 427: Hoare quadruple {292268#true} {292268#true} #2541#return; {292268#true} is VALID [2018-11-19 18:38:22,223 INFO L273 TraceCheckUtils]: 428: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,223 INFO L268 TraceCheckUtils]: 429: Hoare quadruple {292268#true} {292269#false} #3105#return; {292269#false} is VALID [2018-11-19 18:38:22,223 INFO L273 TraceCheckUtils]: 430: Hoare triple {292269#false} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {292269#false} is VALID [2018-11-19 18:38:22,224 INFO L256 TraceCheckUtils]: 431: Hoare triple {292269#false} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {292268#true} is VALID [2018-11-19 18:38:22,224 INFO L273 TraceCheckUtils]: 432: Hoare triple {292268#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {292268#true} is VALID [2018-11-19 18:38:22,224 INFO L256 TraceCheckUtils]: 433: Hoare triple {292268#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {292268#true} is VALID [2018-11-19 18:38:22,224 INFO L273 TraceCheckUtils]: 434: Hoare triple {292268#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {292268#true} is VALID [2018-11-19 18:38:22,224 INFO L273 TraceCheckUtils]: 435: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,224 INFO L268 TraceCheckUtils]: 436: Hoare quadruple {292268#true} {292268#true} #2541#return; {292268#true} is VALID [2018-11-19 18:38:22,225 INFO L273 TraceCheckUtils]: 437: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,225 INFO L268 TraceCheckUtils]: 438: Hoare quadruple {292268#true} {292269#false} #3107#return; {292269#false} is VALID [2018-11-19 18:38:22,225 INFO L273 TraceCheckUtils]: 439: Hoare triple {292269#false} havoc #t~mem837.base, #t~mem837.offset; {292269#false} is VALID [2018-11-19 18:38:22,225 INFO L256 TraceCheckUtils]: 440: Hoare triple {292269#false} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {292268#true} is VALID [2018-11-19 18:38:22,225 INFO L273 TraceCheckUtils]: 441: Hoare triple {292268#true} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {292268#true} is VALID [2018-11-19 18:38:22,225 INFO L273 TraceCheckUtils]: 442: Hoare triple {292268#true} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {292268#true} is VALID [2018-11-19 18:38:22,225 INFO L256 TraceCheckUtils]: 443: Hoare triple {292268#true} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {292268#true} is VALID [2018-11-19 18:38:22,225 INFO L273 TraceCheckUtils]: 444: Hoare triple {292268#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {292268#true} is VALID [2018-11-19 18:38:22,225 INFO L256 TraceCheckUtils]: 445: Hoare triple {292268#true} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {292268#true} is VALID [2018-11-19 18:38:22,226 INFO L273 TraceCheckUtils]: 446: Hoare triple {292268#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {292268#true} is VALID [2018-11-19 18:38:22,226 INFO L256 TraceCheckUtils]: 447: Hoare triple {292268#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {292268#true} is VALID [2018-11-19 18:38:22,226 INFO L273 TraceCheckUtils]: 448: Hoare triple {292268#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {292268#true} is VALID [2018-11-19 18:38:22,226 INFO L273 TraceCheckUtils]: 449: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,226 INFO L268 TraceCheckUtils]: 450: Hoare quadruple {292268#true} {292268#true} #2605#return; {292268#true} is VALID [2018-11-19 18:38:22,226 INFO L273 TraceCheckUtils]: 451: Hoare triple {292268#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {292268#true} is VALID [2018-11-19 18:38:22,226 INFO L256 TraceCheckUtils]: 452: Hoare triple {292268#true} call #t~ret965 := ldv_undef_int(); {292268#true} is VALID [2018-11-19 18:38:22,226 INFO L273 TraceCheckUtils]: 453: Hoare triple {292268#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {292268#true} is VALID [2018-11-19 18:38:22,226 INFO L273 TraceCheckUtils]: 454: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,227 INFO L268 TraceCheckUtils]: 455: Hoare quadruple {292268#true} {292268#true} #2607#return; {292268#true} is VALID [2018-11-19 18:38:22,227 INFO L273 TraceCheckUtils]: 456: Hoare triple {292268#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {292268#true} is VALID [2018-11-19 18:38:22,227 INFO L273 TraceCheckUtils]: 457: Hoare triple {292268#true} assume 0 != ~tmp___0~26; {292268#true} is VALID [2018-11-19 18:38:22,227 INFO L273 TraceCheckUtils]: 458: Hoare triple {292268#true} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {292268#true} is VALID [2018-11-19 18:38:22,227 INFO L273 TraceCheckUtils]: 459: Hoare triple {292268#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {292268#true} is VALID [2018-11-19 18:38:22,227 INFO L273 TraceCheckUtils]: 460: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,227 INFO L268 TraceCheckUtils]: 461: Hoare quadruple {292268#true} {292268#true} #3135#return; {292268#true} is VALID [2018-11-19 18:38:22,227 INFO L273 TraceCheckUtils]: 462: Hoare triple {292268#true} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {292268#true} is VALID [2018-11-19 18:38:22,227 INFO L273 TraceCheckUtils]: 463: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,228 INFO L268 TraceCheckUtils]: 464: Hoare quadruple {292268#true} {292268#true} #2709#return; {292268#true} is VALID [2018-11-19 18:38:22,228 INFO L273 TraceCheckUtils]: 465: Hoare triple {292268#true} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {292268#true} is VALID [2018-11-19 18:38:22,228 INFO L273 TraceCheckUtils]: 466: Hoare triple {292268#true} assume 0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616;havoc #t~mem561.base, #t~mem561.offset;havoc #t~nondet562;call #t~mem563.base, #t~mem563.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem563.base, #t~mem563.offset;~error~18 := -12; {292268#true} is VALID [2018-11-19 18:38:22,228 INFO L273 TraceCheckUtils]: 467: Hoare triple {292268#true} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {292268#true} is VALID [2018-11-19 18:38:22,228 INFO L273 TraceCheckUtils]: 468: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,228 INFO L268 TraceCheckUtils]: 469: Hoare quadruple {292268#true} {292269#false} #3109#return; {292269#false} is VALID [2018-11-19 18:38:22,228 INFO L273 TraceCheckUtils]: 470: Hoare triple {292269#false} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {292269#false} is VALID [2018-11-19 18:38:22,228 INFO L273 TraceCheckUtils]: 471: Hoare triple {292269#false} assume 0 != ~error~25; {292269#false} is VALID [2018-11-19 18:38:22,228 INFO L273 TraceCheckUtils]: 472: Hoare triple {292269#false} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {292269#false} is VALID [2018-11-19 18:38:22,229 INFO L273 TraceCheckUtils]: 473: Hoare triple {292269#false} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {292269#false} is VALID [2018-11-19 18:38:22,229 INFO L273 TraceCheckUtils]: 474: Hoare triple {292269#false} assume true; {292269#false} is VALID [2018-11-19 18:38:22,229 INFO L268 TraceCheckUtils]: 475: Hoare quadruple {292269#false} {292268#true} #3015#return; {292269#false} is VALID [2018-11-19 18:38:22,229 INFO L273 TraceCheckUtils]: 476: Hoare triple {292269#false} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {292269#false} is VALID [2018-11-19 18:38:22,229 INFO L273 TraceCheckUtils]: 477: Hoare triple {292269#false} assume 0 == ~ldv_retval_3~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {292269#false} is VALID [2018-11-19 18:38:22,229 INFO L273 TraceCheckUtils]: 478: Hoare triple {292269#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {292269#false} is VALID [2018-11-19 18:38:22,229 INFO L273 TraceCheckUtils]: 479: Hoare triple {292269#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {292269#false} is VALID [2018-11-19 18:38:22,229 INFO L273 TraceCheckUtils]: 480: Hoare triple {292269#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {292269#false} is VALID [2018-11-19 18:38:22,229 INFO L273 TraceCheckUtils]: 481: Hoare triple {292269#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {292269#false} is VALID [2018-11-19 18:38:22,230 INFO L273 TraceCheckUtils]: 482: Hoare triple {292269#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {292269#false} is VALID [2018-11-19 18:38:22,230 INFO L273 TraceCheckUtils]: 483: Hoare triple {292269#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {292269#false} is VALID [2018-11-19 18:38:22,230 INFO L273 TraceCheckUtils]: 484: Hoare triple {292269#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {292269#false} is VALID [2018-11-19 18:38:22,230 INFO L273 TraceCheckUtils]: 485: Hoare triple {292269#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {292269#false} is VALID [2018-11-19 18:38:22,230 INFO L273 TraceCheckUtils]: 486: Hoare triple {292269#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {292269#false} is VALID [2018-11-19 18:38:22,230 INFO L273 TraceCheckUtils]: 487: Hoare triple {292269#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {292269#false} is VALID [2018-11-19 18:38:22,230 INFO L273 TraceCheckUtils]: 488: Hoare triple {292269#false} assume #t~switch909; {292269#false} is VALID [2018-11-19 18:38:22,230 INFO L273 TraceCheckUtils]: 489: Hoare triple {292269#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {292269#false} is VALID [2018-11-19 18:38:22,230 INFO L273 TraceCheckUtils]: 490: Hoare triple {292269#false} assume #t~switch947; {292269#false} is VALID [2018-11-19 18:38:22,231 INFO L273 TraceCheckUtils]: 491: Hoare triple {292269#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {292269#false} is VALID [2018-11-19 18:38:22,231 INFO L256 TraceCheckUtils]: 492: Hoare triple {292269#false} call ims_pcu_driver_exit(); {292268#true} is VALID [2018-11-19 18:38:22,231 INFO L256 TraceCheckUtils]: 493: Hoare triple {292268#true} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {292268#true} is VALID [2018-11-19 18:38:22,231 INFO L273 TraceCheckUtils]: 494: Hoare triple {292268#true} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {292268#true} is VALID [2018-11-19 18:38:22,231 INFO L273 TraceCheckUtils]: 495: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,231 INFO L268 TraceCheckUtils]: 496: Hoare quadruple {292268#true} {292268#true} #2597#return; {292268#true} is VALID [2018-11-19 18:38:22,231 INFO L273 TraceCheckUtils]: 497: Hoare triple {292268#true} assume true; {292268#true} is VALID [2018-11-19 18:38:22,231 INFO L268 TraceCheckUtils]: 498: Hoare quadruple {292268#true} {292269#false} #3033#return; {292269#false} is VALID [2018-11-19 18:38:22,231 INFO L273 TraceCheckUtils]: 499: Hoare triple {292269#false} ~ldv_state_variable_0~0 := 2; {292269#false} is VALID [2018-11-19 18:38:22,232 INFO L256 TraceCheckUtils]: 500: Hoare triple {292269#false} call ldv_check_final_state(); {292269#false} is VALID [2018-11-19 18:38:22,232 INFO L273 TraceCheckUtils]: 501: Hoare triple {292269#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {292269#false} is VALID [2018-11-19 18:38:22,232 INFO L256 TraceCheckUtils]: 502: Hoare triple {292269#false} call ldv_error(); {292269#false} is VALID [2018-11-19 18:38:22,232 INFO L273 TraceCheckUtils]: 503: Hoare triple {292269#false} assume !false; {292269#false} is VALID [2018-11-19 18:38:22,299 INFO L134 CoverageAnalysis]: Checked inductivity of 2723 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 2701 trivial. 0 not checked. [2018-11-19 18:38:22,299 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:38:22,299 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-19 18:38:22,300 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 504 [2018-11-19 18:38:22,300 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:38:22,300 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-19 18:38:22,742 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 371 edges. 371 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:38:22,742 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-19 18:38:22,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-19 18:38:22,743 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-19 18:38:22,743 INFO L87 Difference]: Start difference. First operand 3842 states and 5208 transitions. Second operand 6 states. [2018-11-19 18:38:49,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:38:49,260 INFO L93 Difference]: Finished difference Result 7186 states and 9732 transitions. [2018-11-19 18:38:49,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-19 18:38:49,260 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 504 [2018-11-19 18:38:49,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:38:49,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-19 18:38:49,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 3265 transitions. [2018-11-19 18:38:49,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-19 18:38:49,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 3265 transitions. [2018-11-19 18:38:49,389 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 3265 transitions. [2018-11-19 18:38:52,154 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3265 edges. 3265 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:38:52,879 INFO L225 Difference]: With dead ends: 7186 [2018-11-19 18:38:52,879 INFO L226 Difference]: Without dead ends: 3856 [2018-11-19 18:38:52,886 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-19 18:38:52,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3856 states. [2018-11-19 18:39:02,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3856 to 3852. [2018-11-19 18:39:02,074 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:39:02,074 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3856 states. Second operand 3852 states. [2018-11-19 18:39:02,074 INFO L74 IsIncluded]: Start isIncluded. First operand 3856 states. Second operand 3852 states. [2018-11-19 18:39:02,075 INFO L87 Difference]: Start difference. First operand 3856 states. Second operand 3852 states. [2018-11-19 18:39:02,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:39:02,658 INFO L93 Difference]: Finished difference Result 3856 states and 5222 transitions. [2018-11-19 18:39:02,658 INFO L276 IsEmpty]: Start isEmpty. Operand 3856 states and 5222 transitions. [2018-11-19 18:39:02,663 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:39:02,663 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:39:02,664 INFO L74 IsIncluded]: Start isIncluded. First operand 3852 states. Second operand 3856 states. [2018-11-19 18:39:02,664 INFO L87 Difference]: Start difference. First operand 3852 states. Second operand 3856 states. [2018-11-19 18:39:03,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:39:03,261 INFO L93 Difference]: Finished difference Result 3856 states and 5222 transitions. [2018-11-19 18:39:03,261 INFO L276 IsEmpty]: Start isEmpty. Operand 3856 states and 5222 transitions. [2018-11-19 18:39:03,266 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:39:03,267 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:39:03,267 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:39:03,267 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:39:03,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3852 states. [2018-11-19 18:39:03,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3852 states to 3852 states and 5218 transitions. [2018-11-19 18:39:03,955 INFO L78 Accepts]: Start accepts. Automaton has 3852 states and 5218 transitions. Word has length 504 [2018-11-19 18:39:03,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:39:03,955 INFO L480 AbstractCegarLoop]: Abstraction has 3852 states and 5218 transitions. [2018-11-19 18:39:03,955 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-19 18:39:03,955 INFO L276 IsEmpty]: Start isEmpty. Operand 3852 states and 5218 transitions. [2018-11-19 18:39:03,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 511 [2018-11-19 18:39:03,961 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:39:03,962 INFO L384 BasicCegarLoop]: trace histogram [37, 37, 37, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:39:03,962 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:39:03,962 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:39:03,962 INFO L82 PathProgramCache]: Analyzing trace with hash 1202920797, now seen corresponding path program 1 times [2018-11-19 18:39:03,962 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:39:03,963 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:39:03,964 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:39:03,964 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:39:03,964 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:39:04,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:39:04,498 INFO L256 TraceCheckUtils]: 0: Hoare triple {314655#true} call ULTIMATE.init(); {314655#true} is VALID [2018-11-19 18:39:04,498 INFO L273 TraceCheckUtils]: 1: Hoare triple {314655#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,498 INFO L273 TraceCheckUtils]: 2: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,499 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {314655#true} {314655#true} #3175#return; {314655#true} is VALID [2018-11-19 18:39:04,499 INFO L256 TraceCheckUtils]: 4: Hoare triple {314655#true} call #t~ret973 := main(); {314655#true} is VALID [2018-11-19 18:39:04,499 INFO L273 TraceCheckUtils]: 5: Hoare triple {314655#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {314655#true} is VALID [2018-11-19 18:39:04,499 INFO L256 TraceCheckUtils]: 6: Hoare triple {314655#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {314655#true} is VALID [2018-11-19 18:39:04,499 INFO L273 TraceCheckUtils]: 7: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,500 INFO L273 TraceCheckUtils]: 8: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,500 INFO L273 TraceCheckUtils]: 9: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,500 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {314655#true} {314655#true} #2927#return; {314655#true} is VALID [2018-11-19 18:39:04,500 INFO L273 TraceCheckUtils]: 11: Hoare triple {314655#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {314655#true} is VALID [2018-11-19 18:39:04,500 INFO L256 TraceCheckUtils]: 12: Hoare triple {314655#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {314655#true} is VALID [2018-11-19 18:39:04,501 INFO L273 TraceCheckUtils]: 13: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,501 INFO L273 TraceCheckUtils]: 14: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,501 INFO L273 TraceCheckUtils]: 15: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,501 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {314655#true} {314655#true} #2929#return; {314655#true} is VALID [2018-11-19 18:39:04,501 INFO L273 TraceCheckUtils]: 17: Hoare triple {314655#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {314655#true} is VALID [2018-11-19 18:39:04,501 INFO L256 TraceCheckUtils]: 18: Hoare triple {314655#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {314655#true} is VALID [2018-11-19 18:39:04,502 INFO L273 TraceCheckUtils]: 19: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,502 INFO L273 TraceCheckUtils]: 20: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,502 INFO L273 TraceCheckUtils]: 21: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,502 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {314655#true} {314655#true} #2931#return; {314655#true} is VALID [2018-11-19 18:39:04,502 INFO L273 TraceCheckUtils]: 23: Hoare triple {314655#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {314655#true} is VALID [2018-11-19 18:39:04,503 INFO L256 TraceCheckUtils]: 24: Hoare triple {314655#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {314655#true} is VALID [2018-11-19 18:39:04,503 INFO L273 TraceCheckUtils]: 25: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,503 INFO L273 TraceCheckUtils]: 26: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,503 INFO L273 TraceCheckUtils]: 27: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,503 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {314655#true} {314655#true} #2933#return; {314655#true} is VALID [2018-11-19 18:39:04,503 INFO L273 TraceCheckUtils]: 29: Hoare triple {314655#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {314655#true} is VALID [2018-11-19 18:39:04,504 INFO L256 TraceCheckUtils]: 30: Hoare triple {314655#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {314655#true} is VALID [2018-11-19 18:39:04,504 INFO L273 TraceCheckUtils]: 31: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,504 INFO L273 TraceCheckUtils]: 32: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,504 INFO L273 TraceCheckUtils]: 33: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,504 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {314655#true} {314655#true} #2935#return; {314655#true} is VALID [2018-11-19 18:39:04,504 INFO L273 TraceCheckUtils]: 35: Hoare triple {314655#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {314655#true} is VALID [2018-11-19 18:39:04,505 INFO L256 TraceCheckUtils]: 36: Hoare triple {314655#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {314655#true} is VALID [2018-11-19 18:39:04,505 INFO L273 TraceCheckUtils]: 37: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,505 INFO L273 TraceCheckUtils]: 38: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,505 INFO L273 TraceCheckUtils]: 39: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,505 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {314655#true} {314655#true} #2937#return; {314655#true} is VALID [2018-11-19 18:39:04,506 INFO L273 TraceCheckUtils]: 41: Hoare triple {314655#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {314655#true} is VALID [2018-11-19 18:39:04,506 INFO L256 TraceCheckUtils]: 42: Hoare triple {314655#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {314655#true} is VALID [2018-11-19 18:39:04,506 INFO L273 TraceCheckUtils]: 43: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,506 INFO L273 TraceCheckUtils]: 44: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,506 INFO L273 TraceCheckUtils]: 45: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,506 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {314655#true} {314655#true} #2939#return; {314655#true} is VALID [2018-11-19 18:39:04,507 INFO L273 TraceCheckUtils]: 47: Hoare triple {314655#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {314655#true} is VALID [2018-11-19 18:39:04,507 INFO L256 TraceCheckUtils]: 48: Hoare triple {314655#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {314655#true} is VALID [2018-11-19 18:39:04,507 INFO L273 TraceCheckUtils]: 49: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,507 INFO L273 TraceCheckUtils]: 50: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,507 INFO L273 TraceCheckUtils]: 51: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,507 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {314655#true} {314655#true} #2941#return; {314655#true} is VALID [2018-11-19 18:39:04,508 INFO L273 TraceCheckUtils]: 53: Hoare triple {314655#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {314655#true} is VALID [2018-11-19 18:39:04,508 INFO L256 TraceCheckUtils]: 54: Hoare triple {314655#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {314655#true} is VALID [2018-11-19 18:39:04,508 INFO L273 TraceCheckUtils]: 55: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,508 INFO L273 TraceCheckUtils]: 56: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,508 INFO L273 TraceCheckUtils]: 57: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,509 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {314655#true} {314655#true} #2943#return; {314655#true} is VALID [2018-11-19 18:39:04,509 INFO L273 TraceCheckUtils]: 59: Hoare triple {314655#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {314655#true} is VALID [2018-11-19 18:39:04,509 INFO L256 TraceCheckUtils]: 60: Hoare triple {314655#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {314655#true} is VALID [2018-11-19 18:39:04,509 INFO L273 TraceCheckUtils]: 61: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,509 INFO L273 TraceCheckUtils]: 62: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,509 INFO L273 TraceCheckUtils]: 63: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,510 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {314655#true} {314655#true} #2945#return; {314655#true} is VALID [2018-11-19 18:39:04,510 INFO L273 TraceCheckUtils]: 65: Hoare triple {314655#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {314655#true} is VALID [2018-11-19 18:39:04,510 INFO L256 TraceCheckUtils]: 66: Hoare triple {314655#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {314655#true} is VALID [2018-11-19 18:39:04,510 INFO L273 TraceCheckUtils]: 67: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,510 INFO L273 TraceCheckUtils]: 68: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,511 INFO L273 TraceCheckUtils]: 69: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,511 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {314655#true} {314655#true} #2947#return; {314655#true} is VALID [2018-11-19 18:39:04,511 INFO L273 TraceCheckUtils]: 71: Hoare triple {314655#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {314655#true} is VALID [2018-11-19 18:39:04,511 INFO L256 TraceCheckUtils]: 72: Hoare triple {314655#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {314655#true} is VALID [2018-11-19 18:39:04,511 INFO L273 TraceCheckUtils]: 73: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,512 INFO L273 TraceCheckUtils]: 74: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,512 INFO L273 TraceCheckUtils]: 75: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,512 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {314655#true} {314655#true} #2949#return; {314655#true} is VALID [2018-11-19 18:39:04,512 INFO L273 TraceCheckUtils]: 77: Hoare triple {314655#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {314655#true} is VALID [2018-11-19 18:39:04,512 INFO L256 TraceCheckUtils]: 78: Hoare triple {314655#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {314655#true} is VALID [2018-11-19 18:39:04,513 INFO L273 TraceCheckUtils]: 79: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,513 INFO L273 TraceCheckUtils]: 80: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,513 INFO L273 TraceCheckUtils]: 81: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,513 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {314655#true} {314655#true} #2951#return; {314655#true} is VALID [2018-11-19 18:39:04,513 INFO L273 TraceCheckUtils]: 83: Hoare triple {314655#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {314655#true} is VALID [2018-11-19 18:39:04,514 INFO L256 TraceCheckUtils]: 84: Hoare triple {314655#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {314655#true} is VALID [2018-11-19 18:39:04,514 INFO L273 TraceCheckUtils]: 85: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,514 INFO L273 TraceCheckUtils]: 86: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,514 INFO L273 TraceCheckUtils]: 87: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,514 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {314655#true} {314655#true} #2953#return; {314655#true} is VALID [2018-11-19 18:39:04,514 INFO L273 TraceCheckUtils]: 89: Hoare triple {314655#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {314655#true} is VALID [2018-11-19 18:39:04,515 INFO L256 TraceCheckUtils]: 90: Hoare triple {314655#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {314655#true} is VALID [2018-11-19 18:39:04,515 INFO L273 TraceCheckUtils]: 91: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,515 INFO L273 TraceCheckUtils]: 92: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,515 INFO L273 TraceCheckUtils]: 93: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,515 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {314655#true} {314655#true} #2955#return; {314655#true} is VALID [2018-11-19 18:39:04,515 INFO L273 TraceCheckUtils]: 95: Hoare triple {314655#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {314655#true} is VALID [2018-11-19 18:39:04,515 INFO L256 TraceCheckUtils]: 96: Hoare triple {314655#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {314655#true} is VALID [2018-11-19 18:39:04,515 INFO L273 TraceCheckUtils]: 97: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,515 INFO L273 TraceCheckUtils]: 98: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,516 INFO L273 TraceCheckUtils]: 99: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,516 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {314655#true} {314655#true} #2957#return; {314655#true} is VALID [2018-11-19 18:39:04,516 INFO L273 TraceCheckUtils]: 101: Hoare triple {314655#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {314655#true} is VALID [2018-11-19 18:39:04,516 INFO L256 TraceCheckUtils]: 102: Hoare triple {314655#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {314655#true} is VALID [2018-11-19 18:39:04,516 INFO L273 TraceCheckUtils]: 103: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,516 INFO L273 TraceCheckUtils]: 104: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,516 INFO L273 TraceCheckUtils]: 105: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,516 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {314655#true} {314655#true} #2959#return; {314655#true} is VALID [2018-11-19 18:39:04,517 INFO L273 TraceCheckUtils]: 107: Hoare triple {314655#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {314655#true} is VALID [2018-11-19 18:39:04,517 INFO L256 TraceCheckUtils]: 108: Hoare triple {314655#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {314655#true} is VALID [2018-11-19 18:39:04,517 INFO L273 TraceCheckUtils]: 109: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,517 INFO L273 TraceCheckUtils]: 110: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,517 INFO L273 TraceCheckUtils]: 111: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,518 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {314655#true} {314655#true} #2961#return; {314655#true} is VALID [2018-11-19 18:39:04,518 INFO L273 TraceCheckUtils]: 113: Hoare triple {314655#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {314655#true} is VALID [2018-11-19 18:39:04,518 INFO L256 TraceCheckUtils]: 114: Hoare triple {314655#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {314655#true} is VALID [2018-11-19 18:39:04,518 INFO L273 TraceCheckUtils]: 115: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,518 INFO L273 TraceCheckUtils]: 116: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,518 INFO L273 TraceCheckUtils]: 117: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,518 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {314655#true} {314655#true} #2963#return; {314655#true} is VALID [2018-11-19 18:39:04,519 INFO L273 TraceCheckUtils]: 119: Hoare triple {314655#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {314655#true} is VALID [2018-11-19 18:39:04,519 INFO L256 TraceCheckUtils]: 120: Hoare triple {314655#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {314655#true} is VALID [2018-11-19 18:39:04,519 INFO L273 TraceCheckUtils]: 121: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,519 INFO L273 TraceCheckUtils]: 122: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,519 INFO L273 TraceCheckUtils]: 123: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,520 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {314655#true} {314655#true} #2965#return; {314655#true} is VALID [2018-11-19 18:39:04,520 INFO L273 TraceCheckUtils]: 125: Hoare triple {314655#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {314655#true} is VALID [2018-11-19 18:39:04,520 INFO L256 TraceCheckUtils]: 126: Hoare triple {314655#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {314655#true} is VALID [2018-11-19 18:39:04,520 INFO L273 TraceCheckUtils]: 127: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,520 INFO L273 TraceCheckUtils]: 128: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,520 INFO L273 TraceCheckUtils]: 129: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,520 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {314655#true} {314655#true} #2967#return; {314655#true} is VALID [2018-11-19 18:39:04,521 INFO L273 TraceCheckUtils]: 131: Hoare triple {314655#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {314655#true} is VALID [2018-11-19 18:39:04,521 INFO L256 TraceCheckUtils]: 132: Hoare triple {314655#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {314655#true} is VALID [2018-11-19 18:39:04,521 INFO L273 TraceCheckUtils]: 133: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,521 INFO L273 TraceCheckUtils]: 134: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,521 INFO L273 TraceCheckUtils]: 135: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,521 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {314655#true} {314655#true} #2969#return; {314655#true} is VALID [2018-11-19 18:39:04,521 INFO L273 TraceCheckUtils]: 137: Hoare triple {314655#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {314655#true} is VALID [2018-11-19 18:39:04,521 INFO L256 TraceCheckUtils]: 138: Hoare triple {314655#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {314655#true} is VALID [2018-11-19 18:39:04,522 INFO L273 TraceCheckUtils]: 139: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,522 INFO L273 TraceCheckUtils]: 140: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,522 INFO L273 TraceCheckUtils]: 141: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,522 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {314655#true} {314655#true} #2971#return; {314655#true} is VALID [2018-11-19 18:39:04,522 INFO L273 TraceCheckUtils]: 143: Hoare triple {314655#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {314655#true} is VALID [2018-11-19 18:39:04,522 INFO L256 TraceCheckUtils]: 144: Hoare triple {314655#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {314655#true} is VALID [2018-11-19 18:39:04,522 INFO L273 TraceCheckUtils]: 145: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,522 INFO L273 TraceCheckUtils]: 146: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,523 INFO L273 TraceCheckUtils]: 147: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,523 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {314655#true} {314655#true} #2973#return; {314655#true} is VALID [2018-11-19 18:39:04,523 INFO L273 TraceCheckUtils]: 149: Hoare triple {314655#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {314655#true} is VALID [2018-11-19 18:39:04,523 INFO L256 TraceCheckUtils]: 150: Hoare triple {314655#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {314655#true} is VALID [2018-11-19 18:39:04,523 INFO L273 TraceCheckUtils]: 151: Hoare triple {314655#true} #t~loopctr974 := 0; {314655#true} is VALID [2018-11-19 18:39:04,523 INFO L273 TraceCheckUtils]: 152: Hoare triple {314655#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {314655#true} is VALID [2018-11-19 18:39:04,523 INFO L273 TraceCheckUtils]: 153: Hoare triple {314655#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {314655#true} is VALID [2018-11-19 18:39:04,524 INFO L273 TraceCheckUtils]: 154: Hoare triple {314655#true} assume !(#t~loopctr974 < #amount); {314655#true} is VALID [2018-11-19 18:39:04,524 INFO L273 TraceCheckUtils]: 155: Hoare triple {314655#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {314655#true} is VALID [2018-11-19 18:39:04,524 INFO L268 TraceCheckUtils]: 156: Hoare quadruple {314655#true} {314655#true} #2975#return; {314655#true} is VALID [2018-11-19 18:39:04,524 INFO L273 TraceCheckUtils]: 157: Hoare triple {314655#true} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {314655#true} is VALID [2018-11-19 18:39:04,524 INFO L273 TraceCheckUtils]: 158: Hoare triple {314655#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,525 INFO L273 TraceCheckUtils]: 159: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,525 INFO L273 TraceCheckUtils]: 160: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,525 INFO L273 TraceCheckUtils]: 161: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,525 INFO L273 TraceCheckUtils]: 162: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,525 INFO L273 TraceCheckUtils]: 163: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,525 INFO L273 TraceCheckUtils]: 164: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,525 INFO L273 TraceCheckUtils]: 165: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,526 INFO L273 TraceCheckUtils]: 166: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,526 INFO L273 TraceCheckUtils]: 167: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,526 INFO L273 TraceCheckUtils]: 168: Hoare triple {314655#true} assume #t~switch909; {314655#true} is VALID [2018-11-19 18:39:04,526 INFO L273 TraceCheckUtils]: 169: Hoare triple {314655#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {314655#true} is VALID [2018-11-19 18:39:04,526 INFO L273 TraceCheckUtils]: 170: Hoare triple {314655#true} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {314655#true} is VALID [2018-11-19 18:39:04,526 INFO L273 TraceCheckUtils]: 171: Hoare triple {314655#true} assume #t~switch947; {314655#true} is VALID [2018-11-19 18:39:04,527 INFO L273 TraceCheckUtils]: 172: Hoare triple {314655#true} assume 1 == ~ldv_state_variable_0~0; {314655#true} is VALID [2018-11-19 18:39:04,527 INFO L256 TraceCheckUtils]: 173: Hoare triple {314655#true} call #t~ret948 := ims_pcu_driver_init(); {314655#true} is VALID [2018-11-19 18:39:04,527 INFO L273 TraceCheckUtils]: 174: Hoare triple {314655#true} havoc ~tmp~46; {314655#true} is VALID [2018-11-19 18:39:04,527 INFO L256 TraceCheckUtils]: 175: Hoare triple {314655#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {314655#true} is VALID [2018-11-19 18:39:04,527 INFO L273 TraceCheckUtils]: 176: Hoare triple {314655#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {314655#true} is VALID [2018-11-19 18:39:04,528 INFO L256 TraceCheckUtils]: 177: Hoare triple {314655#true} call ldv_usb_driver_1(); {314655#true} is VALID [2018-11-19 18:39:04,528 INFO L273 TraceCheckUtils]: 178: Hoare triple {314655#true} havoc ~tmp~53.base, ~tmp~53.offset; {314655#true} is VALID [2018-11-19 18:39:04,528 INFO L256 TraceCheckUtils]: 179: Hoare triple {314655#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {314655#true} is VALID [2018-11-19 18:39:04,528 INFO L273 TraceCheckUtils]: 180: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,528 INFO L273 TraceCheckUtils]: 181: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,528 INFO L273 TraceCheckUtils]: 182: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,529 INFO L268 TraceCheckUtils]: 183: Hoare quadruple {314655#true} {314655#true} #2613#return; {314655#true} is VALID [2018-11-19 18:39:04,529 INFO L273 TraceCheckUtils]: 184: Hoare triple {314655#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {314655#true} is VALID [2018-11-19 18:39:04,529 INFO L273 TraceCheckUtils]: 185: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,529 INFO L268 TraceCheckUtils]: 186: Hoare quadruple {314655#true} {314655#true} #2537#return; {314655#true} is VALID [2018-11-19 18:39:04,529 INFO L273 TraceCheckUtils]: 187: Hoare triple {314655#true} #res := ~ldv_func_res~0; {314655#true} is VALID [2018-11-19 18:39:04,529 INFO L273 TraceCheckUtils]: 188: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,530 INFO L268 TraceCheckUtils]: 189: Hoare quadruple {314655#true} {314655#true} #2777#return; {314655#true} is VALID [2018-11-19 18:39:04,530 INFO L273 TraceCheckUtils]: 190: Hoare triple {314655#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {314655#true} is VALID [2018-11-19 18:39:04,530 INFO L273 TraceCheckUtils]: 191: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,530 INFO L268 TraceCheckUtils]: 192: Hoare quadruple {314655#true} {314655#true} #3035#return; {314655#true} is VALID [2018-11-19 18:39:04,530 INFO L273 TraceCheckUtils]: 193: Hoare triple {314655#true} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {314655#true} is VALID [2018-11-19 18:39:04,530 INFO L273 TraceCheckUtils]: 194: Hoare triple {314655#true} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_10~0 := 1; {314655#true} is VALID [2018-11-19 18:39:04,530 INFO L256 TraceCheckUtils]: 195: Hoare triple {314655#true} call ldv_initialize_ims_pcu_attribute_10(); {314655#true} is VALID [2018-11-19 18:39:04,531 INFO L273 TraceCheckUtils]: 196: Hoare triple {314655#true} havoc ~tmp~47.base, ~tmp~47.offset;havoc ~tmp___0~19.base, ~tmp___0~19.offset; {314655#true} is VALID [2018-11-19 18:39:04,531 INFO L256 TraceCheckUtils]: 197: Hoare triple {314655#true} call #t~ret861.base, #t~ret861.offset := ldv_zalloc(1376); {314655#true} is VALID [2018-11-19 18:39:04,531 INFO L273 TraceCheckUtils]: 198: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,531 INFO L273 TraceCheckUtils]: 199: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,531 INFO L273 TraceCheckUtils]: 200: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,531 INFO L268 TraceCheckUtils]: 201: Hoare quadruple {314655#true} {314655#true} #2807#return; {314655#true} is VALID [2018-11-19 18:39:04,532 INFO L273 TraceCheckUtils]: 202: Hoare triple {314655#true} ~tmp~47.base, ~tmp~47.offset := #t~ret861.base, #t~ret861.offset;havoc #t~ret861.base, #t~ret861.offset;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := ~tmp~47.base, ~tmp~47.offset; {314655#true} is VALID [2018-11-19 18:39:04,532 INFO L256 TraceCheckUtils]: 203: Hoare triple {314655#true} call #t~ret862.base, #t~ret862.offset := ldv_zalloc(48); {314655#true} is VALID [2018-11-19 18:39:04,532 INFO L273 TraceCheckUtils]: 204: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,532 INFO L273 TraceCheckUtils]: 205: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,532 INFO L273 TraceCheckUtils]: 206: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,532 INFO L268 TraceCheckUtils]: 207: Hoare quadruple {314655#true} {314655#true} #2809#return; {314655#true} is VALID [2018-11-19 18:39:04,532 INFO L273 TraceCheckUtils]: 208: Hoare triple {314655#true} ~tmp___0~19.base, ~tmp___0~19.offset := #t~ret862.base, #t~ret862.offset;havoc #t~ret862.base, #t~ret862.offset;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := ~tmp___0~19.base, ~tmp___0~19.offset; {314655#true} is VALID [2018-11-19 18:39:04,533 INFO L273 TraceCheckUtils]: 209: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,533 INFO L268 TraceCheckUtils]: 210: Hoare quadruple {314655#true} {314655#true} #3037#return; {314655#true} is VALID [2018-11-19 18:39:04,533 INFO L273 TraceCheckUtils]: 211: Hoare triple {314655#true} ~ldv_state_variable_4~0 := 1;~ldv_state_variable_8~0 := 1; {314655#true} is VALID [2018-11-19 18:39:04,533 INFO L256 TraceCheckUtils]: 212: Hoare triple {314655#true} call ldv_initialize_ims_pcu_attribute_8(); {314655#true} is VALID [2018-11-19 18:39:04,533 INFO L273 TraceCheckUtils]: 213: Hoare triple {314655#true} havoc ~tmp~51.base, ~tmp~51.offset;havoc ~tmp___0~23.base, ~tmp___0~23.offset; {314655#true} is VALID [2018-11-19 18:39:04,534 INFO L256 TraceCheckUtils]: 214: Hoare triple {314655#true} call #t~ret869.base, #t~ret869.offset := ldv_zalloc(1376); {314655#true} is VALID [2018-11-19 18:39:04,534 INFO L273 TraceCheckUtils]: 215: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,534 INFO L273 TraceCheckUtils]: 216: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,534 INFO L273 TraceCheckUtils]: 217: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,534 INFO L268 TraceCheckUtils]: 218: Hoare quadruple {314655#true} {314655#true} #2631#return; {314655#true} is VALID [2018-11-19 18:39:04,534 INFO L273 TraceCheckUtils]: 219: Hoare triple {314655#true} ~tmp~51.base, ~tmp~51.offset := #t~ret869.base, #t~ret869.offset;havoc #t~ret869.base, #t~ret869.offset;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := ~tmp~51.base, ~tmp~51.offset; {314655#true} is VALID [2018-11-19 18:39:04,535 INFO L256 TraceCheckUtils]: 220: Hoare triple {314655#true} call #t~ret870.base, #t~ret870.offset := ldv_zalloc(48); {314655#true} is VALID [2018-11-19 18:39:04,535 INFO L273 TraceCheckUtils]: 221: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,535 INFO L273 TraceCheckUtils]: 222: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,535 INFO L273 TraceCheckUtils]: 223: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,535 INFO L268 TraceCheckUtils]: 224: Hoare quadruple {314655#true} {314655#true} #2633#return; {314655#true} is VALID [2018-11-19 18:39:04,535 INFO L273 TraceCheckUtils]: 225: Hoare triple {314655#true} ~tmp___0~23.base, ~tmp___0~23.offset := #t~ret870.base, #t~ret870.offset;havoc #t~ret870.base, #t~ret870.offset;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := ~tmp___0~23.base, ~tmp___0~23.offset; {314655#true} is VALID [2018-11-19 18:39:04,536 INFO L273 TraceCheckUtils]: 226: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,536 INFO L268 TraceCheckUtils]: 227: Hoare quadruple {314655#true} {314655#true} #3039#return; {314655#true} is VALID [2018-11-19 18:39:04,536 INFO L273 TraceCheckUtils]: 228: Hoare triple {314655#true} ~ldv_state_variable_2~0 := 1;~ldv_state_variable_9~0 := 1; {314655#true} is VALID [2018-11-19 18:39:04,536 INFO L256 TraceCheckUtils]: 229: Hoare triple {314655#true} call ldv_initialize_ims_pcu_attribute_9(); {314655#true} is VALID [2018-11-19 18:39:04,536 INFO L273 TraceCheckUtils]: 230: Hoare triple {314655#true} havoc ~tmp~49.base, ~tmp~49.offset;havoc ~tmp___0~21.base, ~tmp___0~21.offset; {314655#true} is VALID [2018-11-19 18:39:04,536 INFO L256 TraceCheckUtils]: 231: Hoare triple {314655#true} call #t~ret865.base, #t~ret865.offset := ldv_zalloc(1376); {314655#true} is VALID [2018-11-19 18:39:04,537 INFO L273 TraceCheckUtils]: 232: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,537 INFO L273 TraceCheckUtils]: 233: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,537 INFO L273 TraceCheckUtils]: 234: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,537 INFO L268 TraceCheckUtils]: 235: Hoare quadruple {314655#true} {314655#true} #2627#return; {314655#true} is VALID [2018-11-19 18:39:04,537 INFO L273 TraceCheckUtils]: 236: Hoare triple {314655#true} ~tmp~49.base, ~tmp~49.offset := #t~ret865.base, #t~ret865.offset;havoc #t~ret865.base, #t~ret865.offset;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := ~tmp~49.base, ~tmp~49.offset; {314655#true} is VALID [2018-11-19 18:39:04,537 INFO L256 TraceCheckUtils]: 237: Hoare triple {314655#true} call #t~ret866.base, #t~ret866.offset := ldv_zalloc(48); {314655#true} is VALID [2018-11-19 18:39:04,538 INFO L273 TraceCheckUtils]: 238: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,538 INFO L273 TraceCheckUtils]: 239: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,538 INFO L273 TraceCheckUtils]: 240: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,538 INFO L268 TraceCheckUtils]: 241: Hoare quadruple {314655#true} {314655#true} #2629#return; {314655#true} is VALID [2018-11-19 18:39:04,538 INFO L273 TraceCheckUtils]: 242: Hoare triple {314655#true} ~tmp___0~21.base, ~tmp___0~21.offset := #t~ret866.base, #t~ret866.offset;havoc #t~ret866.base, #t~ret866.offset;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := ~tmp___0~21.base, ~tmp___0~21.offset; {314655#true} is VALID [2018-11-19 18:39:04,538 INFO L273 TraceCheckUtils]: 243: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,538 INFO L268 TraceCheckUtils]: 244: Hoare quadruple {314655#true} {314655#true} #3041#return; {314655#true} is VALID [2018-11-19 18:39:04,539 INFO L273 TraceCheckUtils]: 245: Hoare triple {314655#true} ~ldv_state_variable_7~0 := 1; {314655#true} is VALID [2018-11-19 18:39:04,539 INFO L256 TraceCheckUtils]: 246: Hoare triple {314655#true} call ldv_initialize_ims_pcu_attribute_7(); {314655#true} is VALID [2018-11-19 18:39:04,539 INFO L273 TraceCheckUtils]: 247: Hoare triple {314655#true} havoc ~tmp~52.base, ~tmp~52.offset;havoc ~tmp___0~24.base, ~tmp___0~24.offset; {314655#true} is VALID [2018-11-19 18:39:04,539 INFO L256 TraceCheckUtils]: 248: Hoare triple {314655#true} call #t~ret871.base, #t~ret871.offset := ldv_zalloc(1376); {314655#true} is VALID [2018-11-19 18:39:04,539 INFO L273 TraceCheckUtils]: 249: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,539 INFO L273 TraceCheckUtils]: 250: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,540 INFO L273 TraceCheckUtils]: 251: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,540 INFO L268 TraceCheckUtils]: 252: Hoare quadruple {314655#true} {314655#true} #2619#return; {314655#true} is VALID [2018-11-19 18:39:04,540 INFO L273 TraceCheckUtils]: 253: Hoare triple {314655#true} ~tmp~52.base, ~tmp~52.offset := #t~ret871.base, #t~ret871.offset;havoc #t~ret871.base, #t~ret871.offset;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := ~tmp~52.base, ~tmp~52.offset; {314655#true} is VALID [2018-11-19 18:39:04,540 INFO L256 TraceCheckUtils]: 254: Hoare triple {314655#true} call #t~ret872.base, #t~ret872.offset := ldv_zalloc(48); {314655#true} is VALID [2018-11-19 18:39:04,540 INFO L273 TraceCheckUtils]: 255: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,540 INFO L273 TraceCheckUtils]: 256: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,540 INFO L273 TraceCheckUtils]: 257: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,541 INFO L268 TraceCheckUtils]: 258: Hoare quadruple {314655#true} {314655#true} #2621#return; {314655#true} is VALID [2018-11-19 18:39:04,541 INFO L273 TraceCheckUtils]: 259: Hoare triple {314655#true} ~tmp___0~24.base, ~tmp___0~24.offset := #t~ret872.base, #t~ret872.offset;havoc #t~ret872.base, #t~ret872.offset;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := ~tmp___0~24.base, ~tmp___0~24.offset; {314655#true} is VALID [2018-11-19 18:39:04,541 INFO L273 TraceCheckUtils]: 260: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,541 INFO L268 TraceCheckUtils]: 261: Hoare quadruple {314655#true} {314655#true} #3043#return; {314655#true} is VALID [2018-11-19 18:39:04,541 INFO L273 TraceCheckUtils]: 262: Hoare triple {314655#true} ~ldv_state_variable_3~0 := 1;~ldv_state_variable_11~0 := 1; {314655#true} is VALID [2018-11-19 18:39:04,541 INFO L256 TraceCheckUtils]: 263: Hoare triple {314655#true} call ldv_initialize_ims_pcu_attribute_11(); {314655#true} is VALID [2018-11-19 18:39:04,542 INFO L273 TraceCheckUtils]: 264: Hoare triple {314655#true} havoc ~tmp~50.base, ~tmp~50.offset;havoc ~tmp___0~22.base, ~tmp___0~22.offset; {314655#true} is VALID [2018-11-19 18:39:04,542 INFO L256 TraceCheckUtils]: 265: Hoare triple {314655#true} call #t~ret867.base, #t~ret867.offset := ldv_zalloc(1376); {314655#true} is VALID [2018-11-19 18:39:04,542 INFO L273 TraceCheckUtils]: 266: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,542 INFO L273 TraceCheckUtils]: 267: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,542 INFO L273 TraceCheckUtils]: 268: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,542 INFO L268 TraceCheckUtils]: 269: Hoare quadruple {314655#true} {314655#true} #2811#return; {314655#true} is VALID [2018-11-19 18:39:04,543 INFO L273 TraceCheckUtils]: 270: Hoare triple {314655#true} ~tmp~50.base, ~tmp~50.offset := #t~ret867.base, #t~ret867.offset;havoc #t~ret867.base, #t~ret867.offset;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := ~tmp~50.base, ~tmp~50.offset; {314655#true} is VALID [2018-11-19 18:39:04,543 INFO L256 TraceCheckUtils]: 271: Hoare triple {314655#true} call #t~ret868.base, #t~ret868.offset := ldv_zalloc(48); {314655#true} is VALID [2018-11-19 18:39:04,543 INFO L273 TraceCheckUtils]: 272: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,543 INFO L273 TraceCheckUtils]: 273: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,543 INFO L273 TraceCheckUtils]: 274: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,543 INFO L268 TraceCheckUtils]: 275: Hoare quadruple {314655#true} {314655#true} #2813#return; {314655#true} is VALID [2018-11-19 18:39:04,543 INFO L273 TraceCheckUtils]: 276: Hoare triple {314655#true} ~tmp___0~22.base, ~tmp___0~22.offset := #t~ret868.base, #t~ret868.offset;havoc #t~ret868.base, #t~ret868.offset;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := ~tmp___0~22.base, ~tmp___0~22.offset; {314655#true} is VALID [2018-11-19 18:39:04,544 INFO L273 TraceCheckUtils]: 277: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,544 INFO L268 TraceCheckUtils]: 278: Hoare quadruple {314655#true} {314655#true} #3045#return; {314655#true} is VALID [2018-11-19 18:39:04,544 INFO L273 TraceCheckUtils]: 279: Hoare triple {314655#true} ~ldv_state_variable_6~0 := 1; {314655#true} is VALID [2018-11-19 18:39:04,544 INFO L256 TraceCheckUtils]: 280: Hoare triple {314655#true} call ldv_initialize_ims_pcu_attribute_6(); {314655#true} is VALID [2018-11-19 18:39:04,544 INFO L273 TraceCheckUtils]: 281: Hoare triple {314655#true} havoc ~tmp~48.base, ~tmp~48.offset;havoc ~tmp___0~20.base, ~tmp___0~20.offset; {314655#true} is VALID [2018-11-19 18:39:04,544 INFO L256 TraceCheckUtils]: 282: Hoare triple {314655#true} call #t~ret863.base, #t~ret863.offset := ldv_zalloc(1376); {314655#true} is VALID [2018-11-19 18:39:04,545 INFO L273 TraceCheckUtils]: 283: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,545 INFO L273 TraceCheckUtils]: 284: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,545 INFO L273 TraceCheckUtils]: 285: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,545 INFO L268 TraceCheckUtils]: 286: Hoare quadruple {314655#true} {314655#true} #2623#return; {314655#true} is VALID [2018-11-19 18:39:04,545 INFO L273 TraceCheckUtils]: 287: Hoare triple {314655#true} ~tmp~48.base, ~tmp~48.offset := #t~ret863.base, #t~ret863.offset;havoc #t~ret863.base, #t~ret863.offset;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := ~tmp~48.base, ~tmp~48.offset; {314655#true} is VALID [2018-11-19 18:39:04,545 INFO L256 TraceCheckUtils]: 288: Hoare triple {314655#true} call #t~ret864.base, #t~ret864.offset := ldv_zalloc(48); {314655#true} is VALID [2018-11-19 18:39:04,546 INFO L273 TraceCheckUtils]: 289: Hoare triple {314655#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {314655#true} is VALID [2018-11-19 18:39:04,546 INFO L273 TraceCheckUtils]: 290: Hoare triple {314655#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {314655#true} is VALID [2018-11-19 18:39:04,546 INFO L273 TraceCheckUtils]: 291: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,546 INFO L268 TraceCheckUtils]: 292: Hoare quadruple {314655#true} {314655#true} #2625#return; {314655#true} is VALID [2018-11-19 18:39:04,546 INFO L273 TraceCheckUtils]: 293: Hoare triple {314655#true} ~tmp___0~20.base, ~tmp___0~20.offset := #t~ret864.base, #t~ret864.offset;havoc #t~ret864.base, #t~ret864.offset;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := ~tmp___0~20.base, ~tmp___0~20.offset; {314655#true} is VALID [2018-11-19 18:39:04,546 INFO L273 TraceCheckUtils]: 294: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,547 INFO L268 TraceCheckUtils]: 295: Hoare quadruple {314655#true} {314655#true} #3047#return; {314655#true} is VALID [2018-11-19 18:39:04,547 INFO L273 TraceCheckUtils]: 296: Hoare triple {314655#true} assume !(0 != ~ldv_retval_4~0); {314655#true} is VALID [2018-11-19 18:39:04,547 INFO L273 TraceCheckUtils]: 297: Hoare triple {314655#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,547 INFO L273 TraceCheckUtils]: 298: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,547 INFO L273 TraceCheckUtils]: 299: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,547 INFO L273 TraceCheckUtils]: 300: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,548 INFO L273 TraceCheckUtils]: 301: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,548 INFO L273 TraceCheckUtils]: 302: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,548 INFO L273 TraceCheckUtils]: 303: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,548 INFO L273 TraceCheckUtils]: 304: Hoare triple {314655#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {314655#true} is VALID [2018-11-19 18:39:04,548 INFO L273 TraceCheckUtils]: 305: Hoare triple {314655#true} assume #t~switch909; {314655#true} is VALID [2018-11-19 18:39:04,549 INFO L273 TraceCheckUtils]: 306: Hoare triple {314655#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {314655#true} is VALID [2018-11-19 18:39:04,549 INFO L273 TraceCheckUtils]: 307: Hoare triple {314655#true} assume #t~switch937; {314655#true} is VALID [2018-11-19 18:39:04,549 INFO L273 TraceCheckUtils]: 308: Hoare triple {314655#true} assume 1 == ~ldv_state_variable_1~0; {314655#true} is VALID [2018-11-19 18:39:04,549 INFO L256 TraceCheckUtils]: 309: Hoare triple {314655#true} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {314655#true} is VALID [2018-11-19 18:39:04,549 INFO L273 TraceCheckUtils]: 310: Hoare triple {314655#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {314655#true} is VALID [2018-11-19 18:39:04,549 INFO L256 TraceCheckUtils]: 311: Hoare triple {314655#true} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {314655#true} is VALID [2018-11-19 18:39:04,550 INFO L273 TraceCheckUtils]: 312: Hoare triple {314655#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {314655#true} is VALID [2018-11-19 18:39:04,550 INFO L256 TraceCheckUtils]: 313: Hoare triple {314655#true} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {314655#true} is VALID [2018-11-19 18:39:04,550 INFO L273 TraceCheckUtils]: 314: Hoare triple {314655#true} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {314655#true} is VALID [2018-11-19 18:39:04,550 INFO L256 TraceCheckUtils]: 315: Hoare triple {314655#true} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {314655#true} is VALID [2018-11-19 18:39:04,550 INFO L273 TraceCheckUtils]: 316: Hoare triple {314655#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {314655#true} is VALID [2018-11-19 18:39:04,550 INFO L273 TraceCheckUtils]: 317: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,551 INFO L268 TraceCheckUtils]: 318: Hoare quadruple {314655#true} {314655#true} #2817#return; {314655#true} is VALID [2018-11-19 18:39:04,551 INFO L273 TraceCheckUtils]: 319: Hoare triple {314655#true} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {314655#true} is VALID [2018-11-19 18:39:04,551 INFO L273 TraceCheckUtils]: 320: Hoare triple {314655#true} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {314655#true} is VALID [2018-11-19 18:39:04,551 INFO L273 TraceCheckUtils]: 321: Hoare triple {314655#true} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {314655#true} is VALID [2018-11-19 18:39:04,551 INFO L273 TraceCheckUtils]: 322: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,551 INFO L268 TraceCheckUtils]: 323: Hoare quadruple {314655#true} {314655#true} #3151#return; {314655#true} is VALID [2018-11-19 18:39:04,552 INFO L273 TraceCheckUtils]: 324: Hoare triple {314655#true} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {314655#true} is VALID [2018-11-19 18:39:04,552 INFO L273 TraceCheckUtils]: 325: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,552 INFO L268 TraceCheckUtils]: 326: Hoare quadruple {314655#true} {314655#true} #3095#return; {314655#true} is VALID [2018-11-19 18:39:04,552 INFO L273 TraceCheckUtils]: 327: Hoare triple {314655#true} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {314655#true} is VALID [2018-11-19 18:39:04,552 INFO L256 TraceCheckUtils]: 328: Hoare triple {314655#true} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {314655#true} is VALID [2018-11-19 18:39:04,552 INFO L273 TraceCheckUtils]: 329: Hoare triple {314655#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {314655#true} is VALID [2018-11-19 18:39:04,553 INFO L256 TraceCheckUtils]: 330: Hoare triple {314655#true} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {314655#true} is VALID [2018-11-19 18:39:04,553 INFO L273 TraceCheckUtils]: 331: Hoare triple {314655#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {314655#true} is VALID [2018-11-19 18:39:04,553 INFO L256 TraceCheckUtils]: 332: Hoare triple {314655#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {314655#true} is VALID [2018-11-19 18:39:04,553 INFO L273 TraceCheckUtils]: 333: Hoare triple {314655#true} ~size := #in~size;~t := #in~t; {314655#true} is VALID [2018-11-19 18:39:04,553 INFO L256 TraceCheckUtils]: 334: Hoare triple {314655#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {314655#true} is VALID [2018-11-19 18:39:04,554 INFO L273 TraceCheckUtils]: 335: Hoare triple {314655#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {314655#true} is VALID [2018-11-19 18:39:04,555 INFO L273 TraceCheckUtils]: 336: Hoare triple {314655#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {314657#(and (= 0 |ldv_malloc_#res.offset|) (= 0 |ldv_malloc_#res.base|))} is VALID [2018-11-19 18:39:04,556 INFO L273 TraceCheckUtils]: 337: Hoare triple {314657#(and (= 0 |ldv_malloc_#res.offset|) (= 0 |ldv_malloc_#res.base|))} assume true; {314657#(and (= 0 |ldv_malloc_#res.offset|) (= 0 |ldv_malloc_#res.base|))} is VALID [2018-11-19 18:39:04,558 INFO L268 TraceCheckUtils]: 338: Hoare quadruple {314657#(and (= 0 |ldv_malloc_#res.offset|) (= 0 |ldv_malloc_#res.base|))} {314655#true} #2691#return; {314658#(and (= 0 |__kmalloc_#t~ret126.base|) (= 0 |__kmalloc_#t~ret126.offset|))} is VALID [2018-11-19 18:39:04,558 INFO L273 TraceCheckUtils]: 339: Hoare triple {314658#(and (= 0 |__kmalloc_#t~ret126.base|) (= 0 |__kmalloc_#t~ret126.offset|))} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {314659#(and (= 0 |__kmalloc_#res.offset|) (= 0 |__kmalloc_#res.base|))} is VALID [2018-11-19 18:39:04,559 INFO L273 TraceCheckUtils]: 340: Hoare triple {314659#(and (= 0 |__kmalloc_#res.offset|) (= 0 |__kmalloc_#res.base|))} assume true; {314659#(and (= 0 |__kmalloc_#res.offset|) (= 0 |__kmalloc_#res.base|))} is VALID [2018-11-19 18:39:04,560 INFO L268 TraceCheckUtils]: 341: Hoare quadruple {314659#(and (= 0 |__kmalloc_#res.offset|) (= 0 |__kmalloc_#res.base|))} {314655#true} #2781#return; {314660#(and (= 0 |kmalloc_#t~ret127.base|) (= 0 |kmalloc_#t~ret127.offset|))} is VALID [2018-11-19 18:39:04,561 INFO L273 TraceCheckUtils]: 342: Hoare triple {314660#(and (= 0 |kmalloc_#t~ret127.base|) (= 0 |kmalloc_#t~ret127.offset|))} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {314661#(and (= 0 |kmalloc_#res.offset|) (= 0 |kmalloc_#res.base|))} is VALID [2018-11-19 18:39:04,561 INFO L273 TraceCheckUtils]: 343: Hoare triple {314661#(and (= 0 |kmalloc_#res.offset|) (= 0 |kmalloc_#res.base|))} assume true; {314661#(and (= 0 |kmalloc_#res.offset|) (= 0 |kmalloc_#res.base|))} is VALID [2018-11-19 18:39:04,562 INFO L268 TraceCheckUtils]: 344: Hoare quadruple {314661#(and (= 0 |kmalloc_#res.offset|) (= 0 |kmalloc_#res.base|))} {314655#true} #2779#return; {314662#(and (= 0 |kzalloc_#t~ret128.base|) (= 0 |kzalloc_#t~ret128.offset|))} is VALID [2018-11-19 18:39:04,565 INFO L273 TraceCheckUtils]: 345: Hoare triple {314662#(and (= 0 |kzalloc_#t~ret128.base|) (= 0 |kzalloc_#t~ret128.offset|))} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {314663#(and (= 0 |kzalloc_#res.base|) (= 0 |kzalloc_#res.offset|))} is VALID [2018-11-19 18:39:04,565 INFO L273 TraceCheckUtils]: 346: Hoare triple {314663#(and (= 0 |kzalloc_#res.base|) (= 0 |kzalloc_#res.offset|))} assume true; {314663#(and (= 0 |kzalloc_#res.base|) (= 0 |kzalloc_#res.offset|))} is VALID [2018-11-19 18:39:04,567 INFO L268 TraceCheckUtils]: 347: Hoare quadruple {314663#(and (= 0 |kzalloc_#res.base|) (= 0 |kzalloc_#res.offset|))} {314655#true} #3097#return; {314664#(and (= 0 |ims_pcu_probe_#t~ret828.offset|) (= 0 |ims_pcu_probe_#t~ret828.base|))} is VALID [2018-11-19 18:39:04,567 INFO L273 TraceCheckUtils]: 348: Hoare triple {314664#(and (= 0 |ims_pcu_probe_#t~ret828.offset|) (= 0 |ims_pcu_probe_#t~ret828.base|))} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {314665#(and (= ims_pcu_probe_~pcu~10.base 0) (= ims_pcu_probe_~pcu~10.offset 0))} is VALID [2018-11-19 18:39:04,568 INFO L273 TraceCheckUtils]: 349: Hoare triple {314665#(and (= ims_pcu_probe_~pcu~10.base 0) (= ims_pcu_probe_~pcu~10.offset 0))} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {314656#false} is VALID [2018-11-19 18:39:04,569 INFO L256 TraceCheckUtils]: 350: Hoare triple {314656#false} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {314655#true} is VALID [2018-11-19 18:39:04,569 INFO L273 TraceCheckUtils]: 351: Hoare triple {314655#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {314655#true} is VALID [2018-11-19 18:39:04,569 INFO L273 TraceCheckUtils]: 352: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,569 INFO L268 TraceCheckUtils]: 353: Hoare quadruple {314655#true} {314656#false} #3099#return; {314656#false} is VALID [2018-11-19 18:39:04,569 INFO L256 TraceCheckUtils]: 354: Hoare triple {314656#false} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {314655#true} is VALID [2018-11-19 18:39:04,570 INFO L273 TraceCheckUtils]: 355: Hoare triple {314655#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {314655#true} is VALID [2018-11-19 18:39:04,570 INFO L273 TraceCheckUtils]: 356: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,570 INFO L268 TraceCheckUtils]: 357: Hoare quadruple {314655#true} {314656#false} #3101#return; {314656#false} is VALID [2018-11-19 18:39:04,570 INFO L256 TraceCheckUtils]: 358: Hoare triple {314656#false} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {314655#true} is VALID [2018-11-19 18:39:04,570 INFO L273 TraceCheckUtils]: 359: Hoare triple {314655#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {314655#true} is VALID [2018-11-19 18:39:04,571 INFO L256 TraceCheckUtils]: 360: Hoare triple {314655#true} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {314655#true} is VALID [2018-11-19 18:39:04,571 INFO L273 TraceCheckUtils]: 361: Hoare triple {314655#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {314655#true} is VALID [2018-11-19 18:39:04,571 INFO L273 TraceCheckUtils]: 362: Hoare triple {314655#true} assume 0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616;havoc #t~nondet638;#res.base, #res.offset := 0, 0;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {314655#true} is VALID [2018-11-19 18:39:04,571 INFO L273 TraceCheckUtils]: 363: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,571 INFO L268 TraceCheckUtils]: 364: Hoare quadruple {314655#true} {314655#true} #3137#return; {314655#true} is VALID [2018-11-19 18:39:04,572 INFO L273 TraceCheckUtils]: 365: Hoare triple {314655#true} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {314655#true} is VALID [2018-11-19 18:39:04,572 INFO L273 TraceCheckUtils]: 366: Hoare triple {314655#true} assume !(0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616);call #t~mem658.base, #t~mem658.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem659 := read~int(~union_desc~1.base, 3 + ~union_desc~1.offset, 1);call #t~ret660.base, #t~ret660.offset := usb_ifnum_to_if(#t~mem658.base, #t~mem658.offset, #t~mem659 % 256);call write~$Pointer$(#t~ret660.base, #t~ret660.offset, ~pcu.base, 79 + ~pcu.offset, 8);havoc #t~mem659;havoc #t~ret660.base, #t~ret660.offset;havoc #t~mem658.base, #t~mem658.offset;call #t~mem661.base, #t~mem661.offset := read~$Pointer$(~pcu.base, 79 + ~pcu.offset, 8);call #t~mem662.base, #t~mem662.offset := read~$Pointer$(#t~mem661.base, 8 + #t~mem661.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem662.base, #t~mem662.offset;havoc #t~mem662.base, #t~mem662.offset;havoc #t~mem661.base, #t~mem661.offset;call #t~mem663.base, #t~mem663.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem663.base, #t~mem663.offset, ~pcu.base, 87 + ~pcu.offset, 8);havoc #t~mem663.base, #t~mem663.offset;call #t~mem664.base, #t~mem664.offset := read~$Pointer$(~pcu.base, 87 + ~pcu.offset, 8); {314655#true} is VALID [2018-11-19 18:39:04,572 INFO L256 TraceCheckUtils]: 367: Hoare triple {314655#true} call #t~ret665 := usb_endpoint_maxp(#t~mem664.base, #t~mem664.offset); {314655#true} is VALID [2018-11-19 18:39:04,572 INFO L273 TraceCheckUtils]: 368: Hoare triple {314655#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {314655#true} is VALID [2018-11-19 18:39:04,572 INFO L273 TraceCheckUtils]: 369: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,573 INFO L268 TraceCheckUtils]: 370: Hoare quadruple {314655#true} {314655#true} #3139#return; {314655#true} is VALID [2018-11-19 18:39:04,573 INFO L273 TraceCheckUtils]: 371: Hoare triple {314655#true} assume -2147483648 <= #t~ret665 && #t~ret665 <= 2147483647;~tmp~37 := #t~ret665;havoc #t~ret665;havoc #t~mem664.base, #t~mem664.offset;call write~int(~tmp~37, ~pcu.base, 119 + ~pcu.offset, 4);call #t~mem666.base, #t~mem666.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem667 := read~int(~union_desc~1.base, 4 + ~union_desc~1.offset, 1);call #t~ret668.base, #t~ret668.offset := usb_ifnum_to_if(#t~mem666.base, #t~mem666.offset, #t~mem667 % 256);call write~$Pointer$(#t~ret668.base, #t~ret668.offset, ~pcu.base, 123 + ~pcu.offset, 8);havoc #t~mem666.base, #t~mem666.offset;havoc #t~mem667;havoc #t~ret668.base, #t~ret668.offset;call #t~mem669.base, #t~mem669.offset := read~$Pointer$(~pcu.base, 123 + ~pcu.offset, 8);call #t~mem670.base, #t~mem670.offset := read~$Pointer$(#t~mem669.base, 8 + #t~mem669.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem670.base, #t~mem670.offset;havoc #t~mem670.base, #t~mem670.offset;havoc #t~mem669.base, #t~mem669.offset;call #t~mem671 := read~int(~alt~0.base, 4 + ~alt~0.offset, 1); {314655#true} is VALID [2018-11-19 18:39:04,573 INFO L273 TraceCheckUtils]: 372: Hoare triple {314655#true} assume !(2 != #t~mem671 % 256 % 4294967296);havoc #t~mem671;call #t~mem676.base, #t~mem676.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem676.base, #t~mem676.offset, ~pcu.base, 167 + ~pcu.offset, 8);havoc #t~mem676.base, #t~mem676.offset;call #t~mem677.base, #t~mem677.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {314655#true} is VALID [2018-11-19 18:39:04,573 INFO L256 TraceCheckUtils]: 373: Hoare triple {314655#true} call #t~ret678 := usb_endpoint_is_bulk_out(#t~mem677.base, #t~mem677.offset); {314655#true} is VALID [2018-11-19 18:39:04,573 INFO L273 TraceCheckUtils]: 374: Hoare triple {314655#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~4;havoc ~tmp___0~1;havoc ~tmp___1~1; {314655#true} is VALID [2018-11-19 18:39:04,574 INFO L256 TraceCheckUtils]: 375: Hoare triple {314655#true} call #t~ret25 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {314655#true} is VALID [2018-11-19 18:39:04,574 INFO L273 TraceCheckUtils]: 376: Hoare triple {314655#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {314655#true} is VALID [2018-11-19 18:39:04,574 INFO L273 TraceCheckUtils]: 377: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,574 INFO L268 TraceCheckUtils]: 378: Hoare quadruple {314655#true} {314655#true} #2887#return; {314655#true} is VALID [2018-11-19 18:39:04,574 INFO L273 TraceCheckUtils]: 379: Hoare triple {314655#true} assume -2147483648 <= #t~ret25 && #t~ret25 <= 2147483647;~tmp~4 := #t~ret25;havoc #t~ret25; {314655#true} is VALID [2018-11-19 18:39:04,574 INFO L273 TraceCheckUtils]: 380: Hoare triple {314655#true} assume 0 != ~tmp~4; {314655#true} is VALID [2018-11-19 18:39:04,574 INFO L256 TraceCheckUtils]: 381: Hoare triple {314655#true} call #t~ret26 := usb_endpoint_dir_out(~epd.base, ~epd.offset); {314655#true} is VALID [2018-11-19 18:39:04,574 INFO L273 TraceCheckUtils]: 382: Hoare triple {314655#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem21 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem21 % 256 % 256 <= 127 then #t~mem21 % 256 % 256 else #t~mem21 % 256 % 256 - 256) >= 0 then 1 else 0);havoc #t~mem21; {314655#true} is VALID [2018-11-19 18:39:04,574 INFO L273 TraceCheckUtils]: 383: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,575 INFO L268 TraceCheckUtils]: 384: Hoare quadruple {314655#true} {314655#true} #2889#return; {314655#true} is VALID [2018-11-19 18:39:04,575 INFO L273 TraceCheckUtils]: 385: Hoare triple {314655#true} assume -2147483648 <= #t~ret26 && #t~ret26 <= 2147483647;~tmp___0~1 := #t~ret26;havoc #t~ret26; {314655#true} is VALID [2018-11-19 18:39:04,575 INFO L273 TraceCheckUtils]: 386: Hoare triple {314655#true} assume 0 != ~tmp___0~1;~tmp___1~1 := 1; {314655#true} is VALID [2018-11-19 18:39:04,575 INFO L273 TraceCheckUtils]: 387: Hoare triple {314655#true} #res := ~tmp___1~1; {314655#true} is VALID [2018-11-19 18:39:04,575 INFO L273 TraceCheckUtils]: 388: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,575 INFO L268 TraceCheckUtils]: 389: Hoare quadruple {314655#true} {314655#true} #3141#return; {314655#true} is VALID [2018-11-19 18:39:04,575 INFO L273 TraceCheckUtils]: 390: Hoare triple {314655#true} assume -2147483648 <= #t~ret678 && #t~ret678 <= 2147483647;~tmp___0~16 := #t~ret678;havoc #t~mem677.base, #t~mem677.offset;havoc #t~ret678; {314655#true} is VALID [2018-11-19 18:39:04,575 INFO L273 TraceCheckUtils]: 391: Hoare triple {314655#true} assume !(0 == ~tmp___0~16);call #t~mem682.base, #t~mem682.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {314655#true} is VALID [2018-11-19 18:39:04,575 INFO L256 TraceCheckUtils]: 392: Hoare triple {314655#true} call #t~ret683 := usb_endpoint_maxp(#t~mem682.base, #t~mem682.offset); {314655#true} is VALID [2018-11-19 18:39:04,576 INFO L273 TraceCheckUtils]: 393: Hoare triple {314655#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {314655#true} is VALID [2018-11-19 18:39:04,576 INFO L273 TraceCheckUtils]: 394: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,576 INFO L268 TraceCheckUtils]: 395: Hoare quadruple {314655#true} {314655#true} #3143#return; {314655#true} is VALID [2018-11-19 18:39:04,576 INFO L273 TraceCheckUtils]: 396: Hoare triple {314655#true} assume -2147483648 <= #t~ret683 && #t~ret683 <= 2147483647;~tmp___1~7 := #t~ret683;havoc #t~mem682.base, #t~mem682.offset;havoc #t~ret683;call write~int(~tmp___1~7, ~pcu.base, 183 + ~pcu.offset, 4);call #t~mem684 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {314655#true} is VALID [2018-11-19 18:39:04,576 INFO L273 TraceCheckUtils]: 397: Hoare triple {314655#true} assume !(#t~mem684 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem684;call #t~mem689.base, #t~mem689.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem689.base, 63 + #t~mem689.offset, ~pcu.base, 131 + ~pcu.offset, 8);havoc #t~mem689.base, #t~mem689.offset;call #t~mem690.base, #t~mem690.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {314655#true} is VALID [2018-11-19 18:39:04,576 INFO L256 TraceCheckUtils]: 398: Hoare triple {314655#true} call #t~ret691 := usb_endpoint_is_bulk_in(#t~mem690.base, #t~mem690.offset); {314655#true} is VALID [2018-11-19 18:39:04,576 INFO L273 TraceCheckUtils]: 399: Hoare triple {314655#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~3;havoc ~tmp___0~0;havoc ~tmp___1~0; {314655#true} is VALID [2018-11-19 18:39:04,576 INFO L256 TraceCheckUtils]: 400: Hoare triple {314655#true} call #t~ret23 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {314655#true} is VALID [2018-11-19 18:39:04,576 INFO L273 TraceCheckUtils]: 401: Hoare triple {314655#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {314655#true} is VALID [2018-11-19 18:39:04,577 INFO L273 TraceCheckUtils]: 402: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,577 INFO L268 TraceCheckUtils]: 403: Hoare quadruple {314655#true} {314655#true} #2915#return; {314655#true} is VALID [2018-11-19 18:39:04,577 INFO L273 TraceCheckUtils]: 404: Hoare triple {314655#true} assume -2147483648 <= #t~ret23 && #t~ret23 <= 2147483647;~tmp~3 := #t~ret23;havoc #t~ret23; {314655#true} is VALID [2018-11-19 18:39:04,577 INFO L273 TraceCheckUtils]: 405: Hoare triple {314655#true} assume 0 != ~tmp~3; {314655#true} is VALID [2018-11-19 18:39:04,577 INFO L256 TraceCheckUtils]: 406: Hoare triple {314655#true} call #t~ret24 := usb_endpoint_dir_in(~epd.base, ~epd.offset); {314655#true} is VALID [2018-11-19 18:39:04,577 INFO L273 TraceCheckUtils]: 407: Hoare triple {314655#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem20 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem20 % 256 % 256 <= 127 then #t~mem20 % 256 % 256 else #t~mem20 % 256 % 256 - 256) < 0 then 1 else 0);havoc #t~mem20; {314655#true} is VALID [2018-11-19 18:39:04,577 INFO L273 TraceCheckUtils]: 408: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,577 INFO L268 TraceCheckUtils]: 409: Hoare quadruple {314655#true} {314655#true} #2917#return; {314655#true} is VALID [2018-11-19 18:39:04,578 INFO L273 TraceCheckUtils]: 410: Hoare triple {314655#true} assume -2147483648 <= #t~ret24 && #t~ret24 <= 2147483647;~tmp___0~0 := #t~ret24;havoc #t~ret24; {314655#true} is VALID [2018-11-19 18:39:04,578 INFO L273 TraceCheckUtils]: 411: Hoare triple {314655#true} assume 0 != ~tmp___0~0;~tmp___1~0 := 1; {314655#true} is VALID [2018-11-19 18:39:04,578 INFO L273 TraceCheckUtils]: 412: Hoare triple {314655#true} #res := ~tmp___1~0; {314655#true} is VALID [2018-11-19 18:39:04,578 INFO L273 TraceCheckUtils]: 413: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,578 INFO L268 TraceCheckUtils]: 414: Hoare quadruple {314655#true} {314655#true} #3145#return; {314655#true} is VALID [2018-11-19 18:39:04,578 INFO L273 TraceCheckUtils]: 415: Hoare triple {314655#true} assume -2147483648 <= #t~ret691 && #t~ret691 <= 2147483647;~tmp___2~3 := #t~ret691;havoc #t~ret691;havoc #t~mem690.base, #t~mem690.offset; {314655#true} is VALID [2018-11-19 18:39:04,578 INFO L273 TraceCheckUtils]: 416: Hoare triple {314655#true} assume !(0 == ~tmp___2~3);call #t~mem695.base, #t~mem695.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {314655#true} is VALID [2018-11-19 18:39:04,578 INFO L256 TraceCheckUtils]: 417: Hoare triple {314655#true} call #t~ret696 := usb_endpoint_maxp(#t~mem695.base, #t~mem695.offset); {314655#true} is VALID [2018-11-19 18:39:04,579 INFO L273 TraceCheckUtils]: 418: Hoare triple {314655#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {314655#true} is VALID [2018-11-19 18:39:04,579 INFO L273 TraceCheckUtils]: 419: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,579 INFO L268 TraceCheckUtils]: 420: Hoare quadruple {314655#true} {314655#true} #3147#return; {314655#true} is VALID [2018-11-19 18:39:04,579 INFO L273 TraceCheckUtils]: 421: Hoare triple {314655#true} assume -2147483648 <= #t~ret696 && #t~ret696 <= 2147483647;~tmp___3~2 := #t~ret696;havoc #t~ret696;havoc #t~mem695.base, #t~mem695.offset;call write~int(~tmp___3~2, ~pcu.base, 163 + ~pcu.offset, 4);call #t~mem697 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {314655#true} is VALID [2018-11-19 18:39:04,579 INFO L273 TraceCheckUtils]: 422: Hoare triple {314655#true} assume !(#t~mem697 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem697;#res := 0; {314655#true} is VALID [2018-11-19 18:39:04,579 INFO L273 TraceCheckUtils]: 423: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,579 INFO L268 TraceCheckUtils]: 424: Hoare quadruple {314655#true} {314656#false} #3103#return; {314656#false} is VALID [2018-11-19 18:39:04,579 INFO L273 TraceCheckUtils]: 425: Hoare triple {314656#false} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {314656#false} is VALID [2018-11-19 18:39:04,579 INFO L273 TraceCheckUtils]: 426: Hoare triple {314656#false} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {314656#false} is VALID [2018-11-19 18:39:04,580 INFO L273 TraceCheckUtils]: 427: Hoare triple {314656#false} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {314656#false} is VALID [2018-11-19 18:39:04,580 INFO L256 TraceCheckUtils]: 428: Hoare triple {314656#false} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {314655#true} is VALID [2018-11-19 18:39:04,580 INFO L273 TraceCheckUtils]: 429: Hoare triple {314655#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {314655#true} is VALID [2018-11-19 18:39:04,580 INFO L256 TraceCheckUtils]: 430: Hoare triple {314655#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {314655#true} is VALID [2018-11-19 18:39:04,580 INFO L273 TraceCheckUtils]: 431: Hoare triple {314655#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {314655#true} is VALID [2018-11-19 18:39:04,580 INFO L273 TraceCheckUtils]: 432: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,580 INFO L268 TraceCheckUtils]: 433: Hoare quadruple {314655#true} {314655#true} #2541#return; {314655#true} is VALID [2018-11-19 18:39:04,580 INFO L273 TraceCheckUtils]: 434: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,581 INFO L268 TraceCheckUtils]: 435: Hoare quadruple {314655#true} {314656#false} #3105#return; {314656#false} is VALID [2018-11-19 18:39:04,581 INFO L273 TraceCheckUtils]: 436: Hoare triple {314656#false} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {314656#false} is VALID [2018-11-19 18:39:04,581 INFO L256 TraceCheckUtils]: 437: Hoare triple {314656#false} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {314655#true} is VALID [2018-11-19 18:39:04,581 INFO L273 TraceCheckUtils]: 438: Hoare triple {314655#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {314655#true} is VALID [2018-11-19 18:39:04,581 INFO L256 TraceCheckUtils]: 439: Hoare triple {314655#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {314655#true} is VALID [2018-11-19 18:39:04,581 INFO L273 TraceCheckUtils]: 440: Hoare triple {314655#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {314655#true} is VALID [2018-11-19 18:39:04,581 INFO L273 TraceCheckUtils]: 441: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,582 INFO L268 TraceCheckUtils]: 442: Hoare quadruple {314655#true} {314655#true} #2541#return; {314655#true} is VALID [2018-11-19 18:39:04,582 INFO L273 TraceCheckUtils]: 443: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,582 INFO L268 TraceCheckUtils]: 444: Hoare quadruple {314655#true} {314656#false} #3107#return; {314656#false} is VALID [2018-11-19 18:39:04,582 INFO L273 TraceCheckUtils]: 445: Hoare triple {314656#false} havoc #t~mem837.base, #t~mem837.offset; {314656#false} is VALID [2018-11-19 18:39:04,582 INFO L256 TraceCheckUtils]: 446: Hoare triple {314656#false} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {314655#true} is VALID [2018-11-19 18:39:04,582 INFO L273 TraceCheckUtils]: 447: Hoare triple {314655#true} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {314655#true} is VALID [2018-11-19 18:39:04,582 INFO L273 TraceCheckUtils]: 448: Hoare triple {314655#true} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {314655#true} is VALID [2018-11-19 18:39:04,582 INFO L256 TraceCheckUtils]: 449: Hoare triple {314655#true} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {314655#true} is VALID [2018-11-19 18:39:04,582 INFO L273 TraceCheckUtils]: 450: Hoare triple {314655#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {314655#true} is VALID [2018-11-19 18:39:04,583 INFO L256 TraceCheckUtils]: 451: Hoare triple {314655#true} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {314655#true} is VALID [2018-11-19 18:39:04,583 INFO L273 TraceCheckUtils]: 452: Hoare triple {314655#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {314655#true} is VALID [2018-11-19 18:39:04,583 INFO L256 TraceCheckUtils]: 453: Hoare triple {314655#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {314655#true} is VALID [2018-11-19 18:39:04,583 INFO L273 TraceCheckUtils]: 454: Hoare triple {314655#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {314655#true} is VALID [2018-11-19 18:39:04,583 INFO L273 TraceCheckUtils]: 455: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,583 INFO L268 TraceCheckUtils]: 456: Hoare quadruple {314655#true} {314655#true} #2605#return; {314655#true} is VALID [2018-11-19 18:39:04,583 INFO L273 TraceCheckUtils]: 457: Hoare triple {314655#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {314655#true} is VALID [2018-11-19 18:39:04,583 INFO L256 TraceCheckUtils]: 458: Hoare triple {314655#true} call #t~ret965 := ldv_undef_int(); {314655#true} is VALID [2018-11-19 18:39:04,583 INFO L273 TraceCheckUtils]: 459: Hoare triple {314655#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {314655#true} is VALID [2018-11-19 18:39:04,584 INFO L273 TraceCheckUtils]: 460: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,584 INFO L268 TraceCheckUtils]: 461: Hoare quadruple {314655#true} {314655#true} #2607#return; {314655#true} is VALID [2018-11-19 18:39:04,584 INFO L273 TraceCheckUtils]: 462: Hoare triple {314655#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {314655#true} is VALID [2018-11-19 18:39:04,584 INFO L273 TraceCheckUtils]: 463: Hoare triple {314655#true} assume 0 != ~tmp___0~26; {314655#true} is VALID [2018-11-19 18:39:04,584 INFO L273 TraceCheckUtils]: 464: Hoare triple {314655#true} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {314655#true} is VALID [2018-11-19 18:39:04,584 INFO L273 TraceCheckUtils]: 465: Hoare triple {314655#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {314655#true} is VALID [2018-11-19 18:39:04,584 INFO L273 TraceCheckUtils]: 466: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,584 INFO L268 TraceCheckUtils]: 467: Hoare quadruple {314655#true} {314655#true} #3135#return; {314655#true} is VALID [2018-11-19 18:39:04,584 INFO L273 TraceCheckUtils]: 468: Hoare triple {314655#true} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {314655#true} is VALID [2018-11-19 18:39:04,585 INFO L273 TraceCheckUtils]: 469: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,585 INFO L268 TraceCheckUtils]: 470: Hoare quadruple {314655#true} {314655#true} #2709#return; {314655#true} is VALID [2018-11-19 18:39:04,585 INFO L273 TraceCheckUtils]: 471: Hoare triple {314655#true} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {314655#true} is VALID [2018-11-19 18:39:04,585 INFO L273 TraceCheckUtils]: 472: Hoare triple {314655#true} assume 0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616;havoc #t~mem561.base, #t~mem561.offset;havoc #t~nondet562;call #t~mem563.base, #t~mem563.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem563.base, #t~mem563.offset;~error~18 := -12; {314655#true} is VALID [2018-11-19 18:39:04,585 INFO L273 TraceCheckUtils]: 473: Hoare triple {314655#true} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {314655#true} is VALID [2018-11-19 18:39:04,585 INFO L273 TraceCheckUtils]: 474: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,585 INFO L268 TraceCheckUtils]: 475: Hoare quadruple {314655#true} {314656#false} #3109#return; {314656#false} is VALID [2018-11-19 18:39:04,585 INFO L273 TraceCheckUtils]: 476: Hoare triple {314656#false} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {314656#false} is VALID [2018-11-19 18:39:04,586 INFO L273 TraceCheckUtils]: 477: Hoare triple {314656#false} assume 0 != ~error~25; {314656#false} is VALID [2018-11-19 18:39:04,586 INFO L273 TraceCheckUtils]: 478: Hoare triple {314656#false} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {314656#false} is VALID [2018-11-19 18:39:04,586 INFO L273 TraceCheckUtils]: 479: Hoare triple {314656#false} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {314656#false} is VALID [2018-11-19 18:39:04,586 INFO L273 TraceCheckUtils]: 480: Hoare triple {314656#false} assume true; {314656#false} is VALID [2018-11-19 18:39:04,586 INFO L268 TraceCheckUtils]: 481: Hoare quadruple {314656#false} {314655#true} #3015#return; {314656#false} is VALID [2018-11-19 18:39:04,586 INFO L273 TraceCheckUtils]: 482: Hoare triple {314656#false} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {314656#false} is VALID [2018-11-19 18:39:04,586 INFO L273 TraceCheckUtils]: 483: Hoare triple {314656#false} assume 0 == ~ldv_retval_3~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {314656#false} is VALID [2018-11-19 18:39:04,586 INFO L273 TraceCheckUtils]: 484: Hoare triple {314656#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {314656#false} is VALID [2018-11-19 18:39:04,586 INFO L273 TraceCheckUtils]: 485: Hoare triple {314656#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {314656#false} is VALID [2018-11-19 18:39:04,587 INFO L273 TraceCheckUtils]: 486: Hoare triple {314656#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {314656#false} is VALID [2018-11-19 18:39:04,587 INFO L273 TraceCheckUtils]: 487: Hoare triple {314656#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {314656#false} is VALID [2018-11-19 18:39:04,587 INFO L273 TraceCheckUtils]: 488: Hoare triple {314656#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {314656#false} is VALID [2018-11-19 18:39:04,587 INFO L273 TraceCheckUtils]: 489: Hoare triple {314656#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {314656#false} is VALID [2018-11-19 18:39:04,587 INFO L273 TraceCheckUtils]: 490: Hoare triple {314656#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {314656#false} is VALID [2018-11-19 18:39:04,587 INFO L273 TraceCheckUtils]: 491: Hoare triple {314656#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {314656#false} is VALID [2018-11-19 18:39:04,587 INFO L273 TraceCheckUtils]: 492: Hoare triple {314656#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {314656#false} is VALID [2018-11-19 18:39:04,587 INFO L273 TraceCheckUtils]: 493: Hoare triple {314656#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {314656#false} is VALID [2018-11-19 18:39:04,587 INFO L273 TraceCheckUtils]: 494: Hoare triple {314656#false} assume #t~switch909; {314656#false} is VALID [2018-11-19 18:39:04,588 INFO L273 TraceCheckUtils]: 495: Hoare triple {314656#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {314656#false} is VALID [2018-11-19 18:39:04,588 INFO L273 TraceCheckUtils]: 496: Hoare triple {314656#false} assume #t~switch947; {314656#false} is VALID [2018-11-19 18:39:04,588 INFO L273 TraceCheckUtils]: 497: Hoare triple {314656#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {314656#false} is VALID [2018-11-19 18:39:04,588 INFO L256 TraceCheckUtils]: 498: Hoare triple {314656#false} call ims_pcu_driver_exit(); {314655#true} is VALID [2018-11-19 18:39:04,588 INFO L256 TraceCheckUtils]: 499: Hoare triple {314655#true} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {314655#true} is VALID [2018-11-19 18:39:04,588 INFO L273 TraceCheckUtils]: 500: Hoare triple {314655#true} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {314655#true} is VALID [2018-11-19 18:39:04,588 INFO L273 TraceCheckUtils]: 501: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,588 INFO L268 TraceCheckUtils]: 502: Hoare quadruple {314655#true} {314655#true} #2597#return; {314655#true} is VALID [2018-11-19 18:39:04,589 INFO L273 TraceCheckUtils]: 503: Hoare triple {314655#true} assume true; {314655#true} is VALID [2018-11-19 18:39:04,589 INFO L268 TraceCheckUtils]: 504: Hoare quadruple {314655#true} {314656#false} #3033#return; {314656#false} is VALID [2018-11-19 18:39:04,589 INFO L273 TraceCheckUtils]: 505: Hoare triple {314656#false} ~ldv_state_variable_0~0 := 2; {314656#false} is VALID [2018-11-19 18:39:04,589 INFO L256 TraceCheckUtils]: 506: Hoare triple {314656#false} call ldv_check_final_state(); {314656#false} is VALID [2018-11-19 18:39:04,589 INFO L273 TraceCheckUtils]: 507: Hoare triple {314656#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {314656#false} is VALID [2018-11-19 18:39:04,589 INFO L256 TraceCheckUtils]: 508: Hoare triple {314656#false} call ldv_error(); {314656#false} is VALID [2018-11-19 18:39:04,589 INFO L273 TraceCheckUtils]: 509: Hoare triple {314656#false} assume !false; {314656#false} is VALID [2018-11-19 18:39:04,675 INFO L134 CoverageAnalysis]: Checked inductivity of 2723 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 2701 trivial. 0 not checked. [2018-11-19 18:39:04,675 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:39:04,675 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-11-19 18:39:04,676 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 510 [2018-11-19 18:39:04,676 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:39:04,677 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 11 states. [2018-11-19 18:39:05,141 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 377 edges. 377 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:39:05,142 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-19 18:39:05,142 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-19 18:39:05,142 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-11-19 18:39:05,143 INFO L87 Difference]: Start difference. First operand 3852 states and 5218 transitions. Second operand 11 states. [2018-11-19 18:39:48,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:39:48,881 INFO L93 Difference]: Finished difference Result 7222 states and 9770 transitions. [2018-11-19 18:39:48,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-19 18:39:48,881 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 510 [2018-11-19 18:39:48,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:39:48,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11 states. [2018-11-19 18:39:48,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 3275 transitions. [2018-11-19 18:39:48,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11 states. [2018-11-19 18:39:49,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 3275 transitions. [2018-11-19 18:39:49,010 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 11 states and 3275 transitions. [2018-11-19 18:39:51,690 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3275 edges. 3275 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:39:52,432 INFO L225 Difference]: With dead ends: 7222 [2018-11-19 18:39:52,432 INFO L226 Difference]: Without dead ends: 3882 [2018-11-19 18:39:52,437 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-11-19 18:39:52,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3882 states. [2018-11-19 18:40:02,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3882 to 3878. [2018-11-19 18:40:02,341 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:40:02,341 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3882 states. Second operand 3878 states. [2018-11-19 18:40:02,341 INFO L74 IsIncluded]: Start isIncluded. First operand 3882 states. Second operand 3878 states. [2018-11-19 18:40:02,341 INFO L87 Difference]: Start difference. First operand 3882 states. Second operand 3878 states. [2018-11-19 18:40:02,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:40:02,937 INFO L93 Difference]: Finished difference Result 3882 states and 5254 transitions. [2018-11-19 18:40:02,937 INFO L276 IsEmpty]: Start isEmpty. Operand 3882 states and 5254 transitions. [2018-11-19 18:40:02,942 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:40:02,942 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:40:02,942 INFO L74 IsIncluded]: Start isIncluded. First operand 3878 states. Second operand 3882 states. [2018-11-19 18:40:02,943 INFO L87 Difference]: Start difference. First operand 3878 states. Second operand 3882 states. [2018-11-19 18:40:03,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:40:03,545 INFO L93 Difference]: Finished difference Result 3882 states and 5254 transitions. [2018-11-19 18:40:03,545 INFO L276 IsEmpty]: Start isEmpty. Operand 3882 states and 5254 transitions. [2018-11-19 18:40:03,550 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:40:03,550 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:40:03,550 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:40:03,551 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:40:03,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3878 states. [2018-11-19 18:40:04,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3878 states to 3878 states and 5250 transitions. [2018-11-19 18:40:04,253 INFO L78 Accepts]: Start accepts. Automaton has 3878 states and 5250 transitions. Word has length 510 [2018-11-19 18:40:04,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:40:04,253 INFO L480 AbstractCegarLoop]: Abstraction has 3878 states and 5250 transitions. [2018-11-19 18:40:04,253 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-19 18:40:04,253 INFO L276 IsEmpty]: Start isEmpty. Operand 3878 states and 5250 transitions. [2018-11-19 18:40:04,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 511 [2018-11-19 18:40:04,260 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:40:04,260 INFO L384 BasicCegarLoop]: trace histogram [37, 37, 37, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:40:04,260 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:40:04,260 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:40:04,261 INFO L82 PathProgramCache]: Analyzing trace with hash 787593980, now seen corresponding path program 1 times [2018-11-19 18:40:04,261 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:40:04,261 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:40:04,262 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:40:04,263 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:40:04,263 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:40:04,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:40:04,673 INFO L256 TraceCheckUtils]: 0: Hoare triple {337159#true} call ULTIMATE.init(); {337159#true} is VALID [2018-11-19 18:40:04,673 INFO L273 TraceCheckUtils]: 1: Hoare triple {337159#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,674 INFO L273 TraceCheckUtils]: 2: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,675 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {337159#true} {337159#true} #3175#return; {337159#true} is VALID [2018-11-19 18:40:04,675 INFO L256 TraceCheckUtils]: 4: Hoare triple {337159#true} call #t~ret973 := main(); {337159#true} is VALID [2018-11-19 18:40:04,675 INFO L273 TraceCheckUtils]: 5: Hoare triple {337159#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {337159#true} is VALID [2018-11-19 18:40:04,676 INFO L256 TraceCheckUtils]: 6: Hoare triple {337159#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {337159#true} is VALID [2018-11-19 18:40:04,676 INFO L273 TraceCheckUtils]: 7: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,676 INFO L273 TraceCheckUtils]: 8: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,676 INFO L273 TraceCheckUtils]: 9: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,676 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {337159#true} {337159#true} #2927#return; {337159#true} is VALID [2018-11-19 18:40:04,676 INFO L273 TraceCheckUtils]: 11: Hoare triple {337159#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {337159#true} is VALID [2018-11-19 18:40:04,677 INFO L256 TraceCheckUtils]: 12: Hoare triple {337159#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {337159#true} is VALID [2018-11-19 18:40:04,677 INFO L273 TraceCheckUtils]: 13: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,677 INFO L273 TraceCheckUtils]: 14: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,677 INFO L273 TraceCheckUtils]: 15: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,677 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {337159#true} {337159#true} #2929#return; {337159#true} is VALID [2018-11-19 18:40:04,677 INFO L273 TraceCheckUtils]: 17: Hoare triple {337159#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {337159#true} is VALID [2018-11-19 18:40:04,677 INFO L256 TraceCheckUtils]: 18: Hoare triple {337159#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {337159#true} is VALID [2018-11-19 18:40:04,677 INFO L273 TraceCheckUtils]: 19: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,677 INFO L273 TraceCheckUtils]: 20: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,678 INFO L273 TraceCheckUtils]: 21: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,678 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {337159#true} {337159#true} #2931#return; {337159#true} is VALID [2018-11-19 18:40:04,678 INFO L273 TraceCheckUtils]: 23: Hoare triple {337159#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {337159#true} is VALID [2018-11-19 18:40:04,678 INFO L256 TraceCheckUtils]: 24: Hoare triple {337159#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {337159#true} is VALID [2018-11-19 18:40:04,678 INFO L273 TraceCheckUtils]: 25: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,678 INFO L273 TraceCheckUtils]: 26: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,678 INFO L273 TraceCheckUtils]: 27: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,678 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {337159#true} {337159#true} #2933#return; {337159#true} is VALID [2018-11-19 18:40:04,679 INFO L273 TraceCheckUtils]: 29: Hoare triple {337159#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {337159#true} is VALID [2018-11-19 18:40:04,679 INFO L256 TraceCheckUtils]: 30: Hoare triple {337159#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {337159#true} is VALID [2018-11-19 18:40:04,679 INFO L273 TraceCheckUtils]: 31: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,679 INFO L273 TraceCheckUtils]: 32: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,679 INFO L273 TraceCheckUtils]: 33: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,679 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {337159#true} {337159#true} #2935#return; {337159#true} is VALID [2018-11-19 18:40:04,679 INFO L273 TraceCheckUtils]: 35: Hoare triple {337159#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {337159#true} is VALID [2018-11-19 18:40:04,679 INFO L256 TraceCheckUtils]: 36: Hoare triple {337159#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {337159#true} is VALID [2018-11-19 18:40:04,679 INFO L273 TraceCheckUtils]: 37: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,679 INFO L273 TraceCheckUtils]: 38: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,680 INFO L273 TraceCheckUtils]: 39: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,680 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {337159#true} {337159#true} #2937#return; {337159#true} is VALID [2018-11-19 18:40:04,680 INFO L273 TraceCheckUtils]: 41: Hoare triple {337159#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {337159#true} is VALID [2018-11-19 18:40:04,680 INFO L256 TraceCheckUtils]: 42: Hoare triple {337159#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {337159#true} is VALID [2018-11-19 18:40:04,680 INFO L273 TraceCheckUtils]: 43: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,680 INFO L273 TraceCheckUtils]: 44: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,680 INFO L273 TraceCheckUtils]: 45: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,680 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {337159#true} {337159#true} #2939#return; {337159#true} is VALID [2018-11-19 18:40:04,680 INFO L273 TraceCheckUtils]: 47: Hoare triple {337159#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {337159#true} is VALID [2018-11-19 18:40:04,681 INFO L256 TraceCheckUtils]: 48: Hoare triple {337159#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {337159#true} is VALID [2018-11-19 18:40:04,681 INFO L273 TraceCheckUtils]: 49: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,681 INFO L273 TraceCheckUtils]: 50: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,681 INFO L273 TraceCheckUtils]: 51: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,681 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {337159#true} {337159#true} #2941#return; {337159#true} is VALID [2018-11-19 18:40:04,681 INFO L273 TraceCheckUtils]: 53: Hoare triple {337159#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {337159#true} is VALID [2018-11-19 18:40:04,681 INFO L256 TraceCheckUtils]: 54: Hoare triple {337159#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {337159#true} is VALID [2018-11-19 18:40:04,681 INFO L273 TraceCheckUtils]: 55: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,681 INFO L273 TraceCheckUtils]: 56: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,681 INFO L273 TraceCheckUtils]: 57: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,682 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {337159#true} {337159#true} #2943#return; {337159#true} is VALID [2018-11-19 18:40:04,682 INFO L273 TraceCheckUtils]: 59: Hoare triple {337159#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {337159#true} is VALID [2018-11-19 18:40:04,682 INFO L256 TraceCheckUtils]: 60: Hoare triple {337159#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {337159#true} is VALID [2018-11-19 18:40:04,682 INFO L273 TraceCheckUtils]: 61: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,682 INFO L273 TraceCheckUtils]: 62: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,682 INFO L273 TraceCheckUtils]: 63: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,682 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {337159#true} {337159#true} #2945#return; {337159#true} is VALID [2018-11-19 18:40:04,682 INFO L273 TraceCheckUtils]: 65: Hoare triple {337159#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {337159#true} is VALID [2018-11-19 18:40:04,682 INFO L256 TraceCheckUtils]: 66: Hoare triple {337159#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {337159#true} is VALID [2018-11-19 18:40:04,683 INFO L273 TraceCheckUtils]: 67: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,683 INFO L273 TraceCheckUtils]: 68: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,683 INFO L273 TraceCheckUtils]: 69: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,683 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {337159#true} {337159#true} #2947#return; {337159#true} is VALID [2018-11-19 18:40:04,683 INFO L273 TraceCheckUtils]: 71: Hoare triple {337159#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {337159#true} is VALID [2018-11-19 18:40:04,683 INFO L256 TraceCheckUtils]: 72: Hoare triple {337159#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {337159#true} is VALID [2018-11-19 18:40:04,683 INFO L273 TraceCheckUtils]: 73: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,683 INFO L273 TraceCheckUtils]: 74: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,683 INFO L273 TraceCheckUtils]: 75: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,683 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {337159#true} {337159#true} #2949#return; {337159#true} is VALID [2018-11-19 18:40:04,684 INFO L273 TraceCheckUtils]: 77: Hoare triple {337159#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {337159#true} is VALID [2018-11-19 18:40:04,684 INFO L256 TraceCheckUtils]: 78: Hoare triple {337159#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {337159#true} is VALID [2018-11-19 18:40:04,684 INFO L273 TraceCheckUtils]: 79: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,684 INFO L273 TraceCheckUtils]: 80: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,684 INFO L273 TraceCheckUtils]: 81: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,684 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {337159#true} {337159#true} #2951#return; {337159#true} is VALID [2018-11-19 18:40:04,684 INFO L273 TraceCheckUtils]: 83: Hoare triple {337159#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {337159#true} is VALID [2018-11-19 18:40:04,684 INFO L256 TraceCheckUtils]: 84: Hoare triple {337159#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {337159#true} is VALID [2018-11-19 18:40:04,684 INFO L273 TraceCheckUtils]: 85: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,685 INFO L273 TraceCheckUtils]: 86: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,685 INFO L273 TraceCheckUtils]: 87: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,685 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {337159#true} {337159#true} #2953#return; {337159#true} is VALID [2018-11-19 18:40:04,685 INFO L273 TraceCheckUtils]: 89: Hoare triple {337159#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {337159#true} is VALID [2018-11-19 18:40:04,685 INFO L256 TraceCheckUtils]: 90: Hoare triple {337159#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {337159#true} is VALID [2018-11-19 18:40:04,685 INFO L273 TraceCheckUtils]: 91: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,685 INFO L273 TraceCheckUtils]: 92: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,685 INFO L273 TraceCheckUtils]: 93: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,685 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {337159#true} {337159#true} #2955#return; {337159#true} is VALID [2018-11-19 18:40:04,685 INFO L273 TraceCheckUtils]: 95: Hoare triple {337159#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {337159#true} is VALID [2018-11-19 18:40:04,686 INFO L256 TraceCheckUtils]: 96: Hoare triple {337159#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {337159#true} is VALID [2018-11-19 18:40:04,686 INFO L273 TraceCheckUtils]: 97: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,686 INFO L273 TraceCheckUtils]: 98: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,686 INFO L273 TraceCheckUtils]: 99: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,686 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {337159#true} {337159#true} #2957#return; {337159#true} is VALID [2018-11-19 18:40:04,686 INFO L273 TraceCheckUtils]: 101: Hoare triple {337159#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {337159#true} is VALID [2018-11-19 18:40:04,686 INFO L256 TraceCheckUtils]: 102: Hoare triple {337159#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {337159#true} is VALID [2018-11-19 18:40:04,686 INFO L273 TraceCheckUtils]: 103: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,686 INFO L273 TraceCheckUtils]: 104: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,686 INFO L273 TraceCheckUtils]: 105: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,687 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {337159#true} {337159#true} #2959#return; {337159#true} is VALID [2018-11-19 18:40:04,687 INFO L273 TraceCheckUtils]: 107: Hoare triple {337159#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {337159#true} is VALID [2018-11-19 18:40:04,687 INFO L256 TraceCheckUtils]: 108: Hoare triple {337159#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {337159#true} is VALID [2018-11-19 18:40:04,687 INFO L273 TraceCheckUtils]: 109: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,687 INFO L273 TraceCheckUtils]: 110: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,687 INFO L273 TraceCheckUtils]: 111: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,687 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {337159#true} {337159#true} #2961#return; {337159#true} is VALID [2018-11-19 18:40:04,687 INFO L273 TraceCheckUtils]: 113: Hoare triple {337159#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {337159#true} is VALID [2018-11-19 18:40:04,687 INFO L256 TraceCheckUtils]: 114: Hoare triple {337159#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {337159#true} is VALID [2018-11-19 18:40:04,688 INFO L273 TraceCheckUtils]: 115: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,688 INFO L273 TraceCheckUtils]: 116: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,688 INFO L273 TraceCheckUtils]: 117: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,688 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {337159#true} {337159#true} #2963#return; {337159#true} is VALID [2018-11-19 18:40:04,688 INFO L273 TraceCheckUtils]: 119: Hoare triple {337159#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {337159#true} is VALID [2018-11-19 18:40:04,688 INFO L256 TraceCheckUtils]: 120: Hoare triple {337159#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {337159#true} is VALID [2018-11-19 18:40:04,688 INFO L273 TraceCheckUtils]: 121: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,688 INFO L273 TraceCheckUtils]: 122: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,688 INFO L273 TraceCheckUtils]: 123: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,688 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {337159#true} {337159#true} #2965#return; {337159#true} is VALID [2018-11-19 18:40:04,689 INFO L273 TraceCheckUtils]: 125: Hoare triple {337159#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {337159#true} is VALID [2018-11-19 18:40:04,689 INFO L256 TraceCheckUtils]: 126: Hoare triple {337159#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {337159#true} is VALID [2018-11-19 18:40:04,689 INFO L273 TraceCheckUtils]: 127: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,689 INFO L273 TraceCheckUtils]: 128: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,689 INFO L273 TraceCheckUtils]: 129: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,689 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {337159#true} {337159#true} #2967#return; {337159#true} is VALID [2018-11-19 18:40:04,689 INFO L273 TraceCheckUtils]: 131: Hoare triple {337159#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {337159#true} is VALID [2018-11-19 18:40:04,689 INFO L256 TraceCheckUtils]: 132: Hoare triple {337159#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {337159#true} is VALID [2018-11-19 18:40:04,689 INFO L273 TraceCheckUtils]: 133: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,690 INFO L273 TraceCheckUtils]: 134: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,690 INFO L273 TraceCheckUtils]: 135: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,690 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {337159#true} {337159#true} #2969#return; {337159#true} is VALID [2018-11-19 18:40:04,690 INFO L273 TraceCheckUtils]: 137: Hoare triple {337159#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {337159#true} is VALID [2018-11-19 18:40:04,690 INFO L256 TraceCheckUtils]: 138: Hoare triple {337159#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {337159#true} is VALID [2018-11-19 18:40:04,690 INFO L273 TraceCheckUtils]: 139: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,690 INFO L273 TraceCheckUtils]: 140: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,690 INFO L273 TraceCheckUtils]: 141: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,690 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {337159#true} {337159#true} #2971#return; {337159#true} is VALID [2018-11-19 18:40:04,690 INFO L273 TraceCheckUtils]: 143: Hoare triple {337159#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {337159#true} is VALID [2018-11-19 18:40:04,691 INFO L256 TraceCheckUtils]: 144: Hoare triple {337159#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {337159#true} is VALID [2018-11-19 18:40:04,691 INFO L273 TraceCheckUtils]: 145: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,691 INFO L273 TraceCheckUtils]: 146: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,691 INFO L273 TraceCheckUtils]: 147: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,691 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {337159#true} {337159#true} #2973#return; {337159#true} is VALID [2018-11-19 18:40:04,691 INFO L273 TraceCheckUtils]: 149: Hoare triple {337159#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {337159#true} is VALID [2018-11-19 18:40:04,691 INFO L256 TraceCheckUtils]: 150: Hoare triple {337159#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {337159#true} is VALID [2018-11-19 18:40:04,691 INFO L273 TraceCheckUtils]: 151: Hoare triple {337159#true} #t~loopctr974 := 0; {337159#true} is VALID [2018-11-19 18:40:04,691 INFO L273 TraceCheckUtils]: 152: Hoare triple {337159#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {337159#true} is VALID [2018-11-19 18:40:04,692 INFO L273 TraceCheckUtils]: 153: Hoare triple {337159#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {337159#true} is VALID [2018-11-19 18:40:04,692 INFO L273 TraceCheckUtils]: 154: Hoare triple {337159#true} assume !(#t~loopctr974 < #amount); {337159#true} is VALID [2018-11-19 18:40:04,692 INFO L273 TraceCheckUtils]: 155: Hoare triple {337159#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {337159#true} is VALID [2018-11-19 18:40:04,692 INFO L268 TraceCheckUtils]: 156: Hoare quadruple {337159#true} {337159#true} #2975#return; {337159#true} is VALID [2018-11-19 18:40:04,692 INFO L273 TraceCheckUtils]: 157: Hoare triple {337159#true} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {337159#true} is VALID [2018-11-19 18:40:04,692 INFO L273 TraceCheckUtils]: 158: Hoare triple {337159#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,692 INFO L273 TraceCheckUtils]: 159: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,692 INFO L273 TraceCheckUtils]: 160: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,692 INFO L273 TraceCheckUtils]: 161: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,692 INFO L273 TraceCheckUtils]: 162: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,693 INFO L273 TraceCheckUtils]: 163: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,693 INFO L273 TraceCheckUtils]: 164: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,693 INFO L273 TraceCheckUtils]: 165: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,693 INFO L273 TraceCheckUtils]: 166: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,693 INFO L273 TraceCheckUtils]: 167: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,693 INFO L273 TraceCheckUtils]: 168: Hoare triple {337159#true} assume #t~switch909; {337159#true} is VALID [2018-11-19 18:40:04,693 INFO L273 TraceCheckUtils]: 169: Hoare triple {337159#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {337159#true} is VALID [2018-11-19 18:40:04,693 INFO L273 TraceCheckUtils]: 170: Hoare triple {337159#true} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {337159#true} is VALID [2018-11-19 18:40:04,693 INFO L273 TraceCheckUtils]: 171: Hoare triple {337159#true} assume #t~switch947; {337159#true} is VALID [2018-11-19 18:40:04,693 INFO L273 TraceCheckUtils]: 172: Hoare triple {337159#true} assume 1 == ~ldv_state_variable_0~0; {337159#true} is VALID [2018-11-19 18:40:04,694 INFO L256 TraceCheckUtils]: 173: Hoare triple {337159#true} call #t~ret948 := ims_pcu_driver_init(); {337159#true} is VALID [2018-11-19 18:40:04,694 INFO L273 TraceCheckUtils]: 174: Hoare triple {337159#true} havoc ~tmp~46; {337159#true} is VALID [2018-11-19 18:40:04,694 INFO L256 TraceCheckUtils]: 175: Hoare triple {337159#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {337159#true} is VALID [2018-11-19 18:40:04,694 INFO L273 TraceCheckUtils]: 176: Hoare triple {337159#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {337159#true} is VALID [2018-11-19 18:40:04,694 INFO L256 TraceCheckUtils]: 177: Hoare triple {337159#true} call ldv_usb_driver_1(); {337159#true} is VALID [2018-11-19 18:40:04,694 INFO L273 TraceCheckUtils]: 178: Hoare triple {337159#true} havoc ~tmp~53.base, ~tmp~53.offset; {337159#true} is VALID [2018-11-19 18:40:04,694 INFO L256 TraceCheckUtils]: 179: Hoare triple {337159#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {337159#true} is VALID [2018-11-19 18:40:04,694 INFO L273 TraceCheckUtils]: 180: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,694 INFO L273 TraceCheckUtils]: 181: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,695 INFO L273 TraceCheckUtils]: 182: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,695 INFO L268 TraceCheckUtils]: 183: Hoare quadruple {337159#true} {337159#true} #2613#return; {337159#true} is VALID [2018-11-19 18:40:04,695 INFO L273 TraceCheckUtils]: 184: Hoare triple {337159#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {337159#true} is VALID [2018-11-19 18:40:04,695 INFO L273 TraceCheckUtils]: 185: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,695 INFO L268 TraceCheckUtils]: 186: Hoare quadruple {337159#true} {337159#true} #2537#return; {337159#true} is VALID [2018-11-19 18:40:04,695 INFO L273 TraceCheckUtils]: 187: Hoare triple {337159#true} #res := ~ldv_func_res~0; {337159#true} is VALID [2018-11-19 18:40:04,695 INFO L273 TraceCheckUtils]: 188: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,695 INFO L268 TraceCheckUtils]: 189: Hoare quadruple {337159#true} {337159#true} #2777#return; {337159#true} is VALID [2018-11-19 18:40:04,695 INFO L273 TraceCheckUtils]: 190: Hoare triple {337159#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {337159#true} is VALID [2018-11-19 18:40:04,695 INFO L273 TraceCheckUtils]: 191: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,696 INFO L268 TraceCheckUtils]: 192: Hoare quadruple {337159#true} {337159#true} #3035#return; {337159#true} is VALID [2018-11-19 18:40:04,696 INFO L273 TraceCheckUtils]: 193: Hoare triple {337159#true} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {337159#true} is VALID [2018-11-19 18:40:04,696 INFO L273 TraceCheckUtils]: 194: Hoare triple {337159#true} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_10~0 := 1; {337159#true} is VALID [2018-11-19 18:40:04,696 INFO L256 TraceCheckUtils]: 195: Hoare triple {337159#true} call ldv_initialize_ims_pcu_attribute_10(); {337159#true} is VALID [2018-11-19 18:40:04,696 INFO L273 TraceCheckUtils]: 196: Hoare triple {337159#true} havoc ~tmp~47.base, ~tmp~47.offset;havoc ~tmp___0~19.base, ~tmp___0~19.offset; {337159#true} is VALID [2018-11-19 18:40:04,696 INFO L256 TraceCheckUtils]: 197: Hoare triple {337159#true} call #t~ret861.base, #t~ret861.offset := ldv_zalloc(1376); {337159#true} is VALID [2018-11-19 18:40:04,696 INFO L273 TraceCheckUtils]: 198: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,696 INFO L273 TraceCheckUtils]: 199: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,696 INFO L273 TraceCheckUtils]: 200: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,697 INFO L268 TraceCheckUtils]: 201: Hoare quadruple {337159#true} {337159#true} #2807#return; {337159#true} is VALID [2018-11-19 18:40:04,697 INFO L273 TraceCheckUtils]: 202: Hoare triple {337159#true} ~tmp~47.base, ~tmp~47.offset := #t~ret861.base, #t~ret861.offset;havoc #t~ret861.base, #t~ret861.offset;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := ~tmp~47.base, ~tmp~47.offset; {337159#true} is VALID [2018-11-19 18:40:04,697 INFO L256 TraceCheckUtils]: 203: Hoare triple {337159#true} call #t~ret862.base, #t~ret862.offset := ldv_zalloc(48); {337159#true} is VALID [2018-11-19 18:40:04,697 INFO L273 TraceCheckUtils]: 204: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,697 INFO L273 TraceCheckUtils]: 205: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,697 INFO L273 TraceCheckUtils]: 206: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,697 INFO L268 TraceCheckUtils]: 207: Hoare quadruple {337159#true} {337159#true} #2809#return; {337159#true} is VALID [2018-11-19 18:40:04,697 INFO L273 TraceCheckUtils]: 208: Hoare triple {337159#true} ~tmp___0~19.base, ~tmp___0~19.offset := #t~ret862.base, #t~ret862.offset;havoc #t~ret862.base, #t~ret862.offset;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := ~tmp___0~19.base, ~tmp___0~19.offset; {337159#true} is VALID [2018-11-19 18:40:04,697 INFO L273 TraceCheckUtils]: 209: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,697 INFO L268 TraceCheckUtils]: 210: Hoare quadruple {337159#true} {337159#true} #3037#return; {337159#true} is VALID [2018-11-19 18:40:04,698 INFO L273 TraceCheckUtils]: 211: Hoare triple {337159#true} ~ldv_state_variable_4~0 := 1;~ldv_state_variable_8~0 := 1; {337159#true} is VALID [2018-11-19 18:40:04,698 INFO L256 TraceCheckUtils]: 212: Hoare triple {337159#true} call ldv_initialize_ims_pcu_attribute_8(); {337159#true} is VALID [2018-11-19 18:40:04,698 INFO L273 TraceCheckUtils]: 213: Hoare triple {337159#true} havoc ~tmp~51.base, ~tmp~51.offset;havoc ~tmp___0~23.base, ~tmp___0~23.offset; {337159#true} is VALID [2018-11-19 18:40:04,698 INFO L256 TraceCheckUtils]: 214: Hoare triple {337159#true} call #t~ret869.base, #t~ret869.offset := ldv_zalloc(1376); {337159#true} is VALID [2018-11-19 18:40:04,698 INFO L273 TraceCheckUtils]: 215: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,698 INFO L273 TraceCheckUtils]: 216: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,698 INFO L273 TraceCheckUtils]: 217: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,698 INFO L268 TraceCheckUtils]: 218: Hoare quadruple {337159#true} {337159#true} #2631#return; {337159#true} is VALID [2018-11-19 18:40:04,698 INFO L273 TraceCheckUtils]: 219: Hoare triple {337159#true} ~tmp~51.base, ~tmp~51.offset := #t~ret869.base, #t~ret869.offset;havoc #t~ret869.base, #t~ret869.offset;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := ~tmp~51.base, ~tmp~51.offset; {337159#true} is VALID [2018-11-19 18:40:04,698 INFO L256 TraceCheckUtils]: 220: Hoare triple {337159#true} call #t~ret870.base, #t~ret870.offset := ldv_zalloc(48); {337159#true} is VALID [2018-11-19 18:40:04,699 INFO L273 TraceCheckUtils]: 221: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,699 INFO L273 TraceCheckUtils]: 222: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,699 INFO L273 TraceCheckUtils]: 223: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,699 INFO L268 TraceCheckUtils]: 224: Hoare quadruple {337159#true} {337159#true} #2633#return; {337159#true} is VALID [2018-11-19 18:40:04,699 INFO L273 TraceCheckUtils]: 225: Hoare triple {337159#true} ~tmp___0~23.base, ~tmp___0~23.offset := #t~ret870.base, #t~ret870.offset;havoc #t~ret870.base, #t~ret870.offset;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := ~tmp___0~23.base, ~tmp___0~23.offset; {337159#true} is VALID [2018-11-19 18:40:04,699 INFO L273 TraceCheckUtils]: 226: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,699 INFO L268 TraceCheckUtils]: 227: Hoare quadruple {337159#true} {337159#true} #3039#return; {337159#true} is VALID [2018-11-19 18:40:04,699 INFO L273 TraceCheckUtils]: 228: Hoare triple {337159#true} ~ldv_state_variable_2~0 := 1;~ldv_state_variable_9~0 := 1; {337159#true} is VALID [2018-11-19 18:40:04,699 INFO L256 TraceCheckUtils]: 229: Hoare triple {337159#true} call ldv_initialize_ims_pcu_attribute_9(); {337159#true} is VALID [2018-11-19 18:40:04,700 INFO L273 TraceCheckUtils]: 230: Hoare triple {337159#true} havoc ~tmp~49.base, ~tmp~49.offset;havoc ~tmp___0~21.base, ~tmp___0~21.offset; {337159#true} is VALID [2018-11-19 18:40:04,700 INFO L256 TraceCheckUtils]: 231: Hoare triple {337159#true} call #t~ret865.base, #t~ret865.offset := ldv_zalloc(1376); {337159#true} is VALID [2018-11-19 18:40:04,700 INFO L273 TraceCheckUtils]: 232: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,700 INFO L273 TraceCheckUtils]: 233: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,700 INFO L273 TraceCheckUtils]: 234: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,700 INFO L268 TraceCheckUtils]: 235: Hoare quadruple {337159#true} {337159#true} #2627#return; {337159#true} is VALID [2018-11-19 18:40:04,700 INFO L273 TraceCheckUtils]: 236: Hoare triple {337159#true} ~tmp~49.base, ~tmp~49.offset := #t~ret865.base, #t~ret865.offset;havoc #t~ret865.base, #t~ret865.offset;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := ~tmp~49.base, ~tmp~49.offset; {337159#true} is VALID [2018-11-19 18:40:04,700 INFO L256 TraceCheckUtils]: 237: Hoare triple {337159#true} call #t~ret866.base, #t~ret866.offset := ldv_zalloc(48); {337159#true} is VALID [2018-11-19 18:40:04,700 INFO L273 TraceCheckUtils]: 238: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,700 INFO L273 TraceCheckUtils]: 239: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,701 INFO L273 TraceCheckUtils]: 240: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,701 INFO L268 TraceCheckUtils]: 241: Hoare quadruple {337159#true} {337159#true} #2629#return; {337159#true} is VALID [2018-11-19 18:40:04,701 INFO L273 TraceCheckUtils]: 242: Hoare triple {337159#true} ~tmp___0~21.base, ~tmp___0~21.offset := #t~ret866.base, #t~ret866.offset;havoc #t~ret866.base, #t~ret866.offset;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := ~tmp___0~21.base, ~tmp___0~21.offset; {337159#true} is VALID [2018-11-19 18:40:04,701 INFO L273 TraceCheckUtils]: 243: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,701 INFO L268 TraceCheckUtils]: 244: Hoare quadruple {337159#true} {337159#true} #3041#return; {337159#true} is VALID [2018-11-19 18:40:04,701 INFO L273 TraceCheckUtils]: 245: Hoare triple {337159#true} ~ldv_state_variable_7~0 := 1; {337159#true} is VALID [2018-11-19 18:40:04,701 INFO L256 TraceCheckUtils]: 246: Hoare triple {337159#true} call ldv_initialize_ims_pcu_attribute_7(); {337159#true} is VALID [2018-11-19 18:40:04,701 INFO L273 TraceCheckUtils]: 247: Hoare triple {337159#true} havoc ~tmp~52.base, ~tmp~52.offset;havoc ~tmp___0~24.base, ~tmp___0~24.offset; {337159#true} is VALID [2018-11-19 18:40:04,701 INFO L256 TraceCheckUtils]: 248: Hoare triple {337159#true} call #t~ret871.base, #t~ret871.offset := ldv_zalloc(1376); {337159#true} is VALID [2018-11-19 18:40:04,702 INFO L273 TraceCheckUtils]: 249: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,702 INFO L273 TraceCheckUtils]: 250: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,702 INFO L273 TraceCheckUtils]: 251: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,702 INFO L268 TraceCheckUtils]: 252: Hoare quadruple {337159#true} {337159#true} #2619#return; {337159#true} is VALID [2018-11-19 18:40:04,702 INFO L273 TraceCheckUtils]: 253: Hoare triple {337159#true} ~tmp~52.base, ~tmp~52.offset := #t~ret871.base, #t~ret871.offset;havoc #t~ret871.base, #t~ret871.offset;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := ~tmp~52.base, ~tmp~52.offset; {337159#true} is VALID [2018-11-19 18:40:04,702 INFO L256 TraceCheckUtils]: 254: Hoare triple {337159#true} call #t~ret872.base, #t~ret872.offset := ldv_zalloc(48); {337159#true} is VALID [2018-11-19 18:40:04,702 INFO L273 TraceCheckUtils]: 255: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,702 INFO L273 TraceCheckUtils]: 256: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,702 INFO L273 TraceCheckUtils]: 257: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,702 INFO L268 TraceCheckUtils]: 258: Hoare quadruple {337159#true} {337159#true} #2621#return; {337159#true} is VALID [2018-11-19 18:40:04,703 INFO L273 TraceCheckUtils]: 259: Hoare triple {337159#true} ~tmp___0~24.base, ~tmp___0~24.offset := #t~ret872.base, #t~ret872.offset;havoc #t~ret872.base, #t~ret872.offset;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := ~tmp___0~24.base, ~tmp___0~24.offset; {337159#true} is VALID [2018-11-19 18:40:04,703 INFO L273 TraceCheckUtils]: 260: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,703 INFO L268 TraceCheckUtils]: 261: Hoare quadruple {337159#true} {337159#true} #3043#return; {337159#true} is VALID [2018-11-19 18:40:04,703 INFO L273 TraceCheckUtils]: 262: Hoare triple {337159#true} ~ldv_state_variable_3~0 := 1;~ldv_state_variable_11~0 := 1; {337159#true} is VALID [2018-11-19 18:40:04,703 INFO L256 TraceCheckUtils]: 263: Hoare triple {337159#true} call ldv_initialize_ims_pcu_attribute_11(); {337159#true} is VALID [2018-11-19 18:40:04,703 INFO L273 TraceCheckUtils]: 264: Hoare triple {337159#true} havoc ~tmp~50.base, ~tmp~50.offset;havoc ~tmp___0~22.base, ~tmp___0~22.offset; {337159#true} is VALID [2018-11-19 18:40:04,703 INFO L256 TraceCheckUtils]: 265: Hoare triple {337159#true} call #t~ret867.base, #t~ret867.offset := ldv_zalloc(1376); {337159#true} is VALID [2018-11-19 18:40:04,703 INFO L273 TraceCheckUtils]: 266: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,703 INFO L273 TraceCheckUtils]: 267: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,704 INFO L273 TraceCheckUtils]: 268: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,704 INFO L268 TraceCheckUtils]: 269: Hoare quadruple {337159#true} {337159#true} #2811#return; {337159#true} is VALID [2018-11-19 18:40:04,704 INFO L273 TraceCheckUtils]: 270: Hoare triple {337159#true} ~tmp~50.base, ~tmp~50.offset := #t~ret867.base, #t~ret867.offset;havoc #t~ret867.base, #t~ret867.offset;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := ~tmp~50.base, ~tmp~50.offset; {337159#true} is VALID [2018-11-19 18:40:04,704 INFO L256 TraceCheckUtils]: 271: Hoare triple {337159#true} call #t~ret868.base, #t~ret868.offset := ldv_zalloc(48); {337159#true} is VALID [2018-11-19 18:40:04,704 INFO L273 TraceCheckUtils]: 272: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,704 INFO L273 TraceCheckUtils]: 273: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,704 INFO L273 TraceCheckUtils]: 274: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,704 INFO L268 TraceCheckUtils]: 275: Hoare quadruple {337159#true} {337159#true} #2813#return; {337159#true} is VALID [2018-11-19 18:40:04,705 INFO L273 TraceCheckUtils]: 276: Hoare triple {337159#true} ~tmp___0~22.base, ~tmp___0~22.offset := #t~ret868.base, #t~ret868.offset;havoc #t~ret868.base, #t~ret868.offset;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := ~tmp___0~22.base, ~tmp___0~22.offset; {337159#true} is VALID [2018-11-19 18:40:04,705 INFO L273 TraceCheckUtils]: 277: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,705 INFO L268 TraceCheckUtils]: 278: Hoare quadruple {337159#true} {337159#true} #3045#return; {337159#true} is VALID [2018-11-19 18:40:04,705 INFO L273 TraceCheckUtils]: 279: Hoare triple {337159#true} ~ldv_state_variable_6~0 := 1; {337159#true} is VALID [2018-11-19 18:40:04,705 INFO L256 TraceCheckUtils]: 280: Hoare triple {337159#true} call ldv_initialize_ims_pcu_attribute_6(); {337159#true} is VALID [2018-11-19 18:40:04,705 INFO L273 TraceCheckUtils]: 281: Hoare triple {337159#true} havoc ~tmp~48.base, ~tmp~48.offset;havoc ~tmp___0~20.base, ~tmp___0~20.offset; {337159#true} is VALID [2018-11-19 18:40:04,705 INFO L256 TraceCheckUtils]: 282: Hoare triple {337159#true} call #t~ret863.base, #t~ret863.offset := ldv_zalloc(1376); {337159#true} is VALID [2018-11-19 18:40:04,705 INFO L273 TraceCheckUtils]: 283: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,705 INFO L273 TraceCheckUtils]: 284: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,706 INFO L273 TraceCheckUtils]: 285: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,706 INFO L268 TraceCheckUtils]: 286: Hoare quadruple {337159#true} {337159#true} #2623#return; {337159#true} is VALID [2018-11-19 18:40:04,706 INFO L273 TraceCheckUtils]: 287: Hoare triple {337159#true} ~tmp~48.base, ~tmp~48.offset := #t~ret863.base, #t~ret863.offset;havoc #t~ret863.base, #t~ret863.offset;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := ~tmp~48.base, ~tmp~48.offset; {337159#true} is VALID [2018-11-19 18:40:04,706 INFO L256 TraceCheckUtils]: 288: Hoare triple {337159#true} call #t~ret864.base, #t~ret864.offset := ldv_zalloc(48); {337159#true} is VALID [2018-11-19 18:40:04,706 INFO L273 TraceCheckUtils]: 289: Hoare triple {337159#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {337159#true} is VALID [2018-11-19 18:40:04,706 INFO L273 TraceCheckUtils]: 290: Hoare triple {337159#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {337159#true} is VALID [2018-11-19 18:40:04,706 INFO L273 TraceCheckUtils]: 291: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,706 INFO L268 TraceCheckUtils]: 292: Hoare quadruple {337159#true} {337159#true} #2625#return; {337159#true} is VALID [2018-11-19 18:40:04,706 INFO L273 TraceCheckUtils]: 293: Hoare triple {337159#true} ~tmp___0~20.base, ~tmp___0~20.offset := #t~ret864.base, #t~ret864.offset;havoc #t~ret864.base, #t~ret864.offset;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := ~tmp___0~20.base, ~tmp___0~20.offset; {337159#true} is VALID [2018-11-19 18:40:04,706 INFO L273 TraceCheckUtils]: 294: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,707 INFO L268 TraceCheckUtils]: 295: Hoare quadruple {337159#true} {337159#true} #3047#return; {337159#true} is VALID [2018-11-19 18:40:04,707 INFO L273 TraceCheckUtils]: 296: Hoare triple {337159#true} assume !(0 != ~ldv_retval_4~0); {337159#true} is VALID [2018-11-19 18:40:04,707 INFO L273 TraceCheckUtils]: 297: Hoare triple {337159#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,707 INFO L273 TraceCheckUtils]: 298: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,707 INFO L273 TraceCheckUtils]: 299: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,707 INFO L273 TraceCheckUtils]: 300: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,707 INFO L273 TraceCheckUtils]: 301: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,707 INFO L273 TraceCheckUtils]: 302: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,707 INFO L273 TraceCheckUtils]: 303: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,708 INFO L273 TraceCheckUtils]: 304: Hoare triple {337159#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {337159#true} is VALID [2018-11-19 18:40:04,708 INFO L273 TraceCheckUtils]: 305: Hoare triple {337159#true} assume #t~switch909; {337159#true} is VALID [2018-11-19 18:40:04,708 INFO L273 TraceCheckUtils]: 306: Hoare triple {337159#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {337159#true} is VALID [2018-11-19 18:40:04,708 INFO L273 TraceCheckUtils]: 307: Hoare triple {337159#true} assume #t~switch937; {337159#true} is VALID [2018-11-19 18:40:04,708 INFO L273 TraceCheckUtils]: 308: Hoare triple {337159#true} assume 1 == ~ldv_state_variable_1~0; {337159#true} is VALID [2018-11-19 18:40:04,708 INFO L256 TraceCheckUtils]: 309: Hoare triple {337159#true} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {337159#true} is VALID [2018-11-19 18:40:04,708 INFO L273 TraceCheckUtils]: 310: Hoare triple {337159#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {337159#true} is VALID [2018-11-19 18:40:04,708 INFO L256 TraceCheckUtils]: 311: Hoare triple {337159#true} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {337159#true} is VALID [2018-11-19 18:40:04,708 INFO L273 TraceCheckUtils]: 312: Hoare triple {337159#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {337159#true} is VALID [2018-11-19 18:40:04,708 INFO L256 TraceCheckUtils]: 313: Hoare triple {337159#true} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {337159#true} is VALID [2018-11-19 18:40:04,709 INFO L273 TraceCheckUtils]: 314: Hoare triple {337159#true} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {337159#true} is VALID [2018-11-19 18:40:04,709 INFO L256 TraceCheckUtils]: 315: Hoare triple {337159#true} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {337159#true} is VALID [2018-11-19 18:40:04,709 INFO L273 TraceCheckUtils]: 316: Hoare triple {337159#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {337159#true} is VALID [2018-11-19 18:40:04,709 INFO L273 TraceCheckUtils]: 317: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,709 INFO L268 TraceCheckUtils]: 318: Hoare quadruple {337159#true} {337159#true} #2817#return; {337159#true} is VALID [2018-11-19 18:40:04,709 INFO L273 TraceCheckUtils]: 319: Hoare triple {337159#true} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {337159#true} is VALID [2018-11-19 18:40:04,709 INFO L273 TraceCheckUtils]: 320: Hoare triple {337159#true} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {337159#true} is VALID [2018-11-19 18:40:04,709 INFO L273 TraceCheckUtils]: 321: Hoare triple {337159#true} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {337159#true} is VALID [2018-11-19 18:40:04,709 INFO L273 TraceCheckUtils]: 322: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,709 INFO L268 TraceCheckUtils]: 323: Hoare quadruple {337159#true} {337159#true} #3151#return; {337159#true} is VALID [2018-11-19 18:40:04,710 INFO L273 TraceCheckUtils]: 324: Hoare triple {337159#true} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {337159#true} is VALID [2018-11-19 18:40:04,710 INFO L273 TraceCheckUtils]: 325: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,710 INFO L268 TraceCheckUtils]: 326: Hoare quadruple {337159#true} {337159#true} #3095#return; {337159#true} is VALID [2018-11-19 18:40:04,710 INFO L273 TraceCheckUtils]: 327: Hoare triple {337159#true} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {337159#true} is VALID [2018-11-19 18:40:04,710 INFO L256 TraceCheckUtils]: 328: Hoare triple {337159#true} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {337159#true} is VALID [2018-11-19 18:40:04,710 INFO L273 TraceCheckUtils]: 329: Hoare triple {337159#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {337159#true} is VALID [2018-11-19 18:40:04,710 INFO L256 TraceCheckUtils]: 330: Hoare triple {337159#true} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {337159#true} is VALID [2018-11-19 18:40:04,710 INFO L273 TraceCheckUtils]: 331: Hoare triple {337159#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {337159#true} is VALID [2018-11-19 18:40:04,710 INFO L256 TraceCheckUtils]: 332: Hoare triple {337159#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {337159#true} is VALID [2018-11-19 18:40:04,711 INFO L273 TraceCheckUtils]: 333: Hoare triple {337159#true} ~size := #in~size;~t := #in~t; {337159#true} is VALID [2018-11-19 18:40:04,711 INFO L256 TraceCheckUtils]: 334: Hoare triple {337159#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {337159#true} is VALID [2018-11-19 18:40:04,711 INFO L273 TraceCheckUtils]: 335: Hoare triple {337159#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {337159#true} is VALID [2018-11-19 18:40:04,711 INFO L273 TraceCheckUtils]: 336: Hoare triple {337159#true} assume !(0 != ~tmp___0~2);call #t~malloc130.base, #t~malloc130.offset := #Ultimate.alloc(~size);~tmp~8.base, ~tmp~8.offset := #t~malloc130.base, #t~malloc130.offset;~p~0.base, ~p~0.offset := ~tmp~8.base, ~tmp~8.offset;assume 0 != (if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~0.base, ~p~0.offset; {337159#true} is VALID [2018-11-19 18:40:04,711 INFO L273 TraceCheckUtils]: 337: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,711 INFO L268 TraceCheckUtils]: 338: Hoare quadruple {337159#true} {337159#true} #2691#return; {337159#true} is VALID [2018-11-19 18:40:04,711 INFO L273 TraceCheckUtils]: 339: Hoare triple {337159#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {337159#true} is VALID [2018-11-19 18:40:04,711 INFO L273 TraceCheckUtils]: 340: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,711 INFO L268 TraceCheckUtils]: 341: Hoare quadruple {337159#true} {337159#true} #2781#return; {337159#true} is VALID [2018-11-19 18:40:04,711 INFO L273 TraceCheckUtils]: 342: Hoare triple {337159#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {337159#true} is VALID [2018-11-19 18:40:04,712 INFO L273 TraceCheckUtils]: 343: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,712 INFO L268 TraceCheckUtils]: 344: Hoare quadruple {337159#true} {337159#true} #2779#return; {337159#true} is VALID [2018-11-19 18:40:04,712 INFO L273 TraceCheckUtils]: 345: Hoare triple {337159#true} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {337159#true} is VALID [2018-11-19 18:40:04,712 INFO L273 TraceCheckUtils]: 346: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,712 INFO L268 TraceCheckUtils]: 347: Hoare quadruple {337159#true} {337159#true} #3097#return; {337159#true} is VALID [2018-11-19 18:40:04,712 INFO L273 TraceCheckUtils]: 348: Hoare triple {337159#true} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {337159#true} is VALID [2018-11-19 18:40:04,712 INFO L273 TraceCheckUtils]: 349: Hoare triple {337159#true} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {337159#true} is VALID [2018-11-19 18:40:04,712 INFO L256 TraceCheckUtils]: 350: Hoare triple {337159#true} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {337159#true} is VALID [2018-11-19 18:40:04,712 INFO L273 TraceCheckUtils]: 351: Hoare triple {337159#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {337159#true} is VALID [2018-11-19 18:40:04,713 INFO L273 TraceCheckUtils]: 352: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,713 INFO L268 TraceCheckUtils]: 353: Hoare quadruple {337159#true} {337159#true} #3099#return; {337159#true} is VALID [2018-11-19 18:40:04,713 INFO L256 TraceCheckUtils]: 354: Hoare triple {337159#true} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {337159#true} is VALID [2018-11-19 18:40:04,713 INFO L273 TraceCheckUtils]: 355: Hoare triple {337159#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {337159#true} is VALID [2018-11-19 18:40:04,713 INFO L273 TraceCheckUtils]: 356: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,713 INFO L268 TraceCheckUtils]: 357: Hoare quadruple {337159#true} {337159#true} #3101#return; {337159#true} is VALID [2018-11-19 18:40:04,713 INFO L256 TraceCheckUtils]: 358: Hoare triple {337159#true} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {337159#true} is VALID [2018-11-19 18:40:04,713 INFO L273 TraceCheckUtils]: 359: Hoare triple {337159#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {337159#true} is VALID [2018-11-19 18:40:04,713 INFO L256 TraceCheckUtils]: 360: Hoare triple {337159#true} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {337159#true} is VALID [2018-11-19 18:40:04,714 INFO L273 TraceCheckUtils]: 361: Hoare triple {337159#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {337159#true} is VALID [2018-11-19 18:40:04,714 INFO L273 TraceCheckUtils]: 362: Hoare triple {337159#true} assume 0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616;havoc #t~nondet638;#res.base, #res.offset := 0, 0;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {337161#(and (= 0 |ims_pcu_get_cdc_union_desc_#res.offset|) (= 0 |ims_pcu_get_cdc_union_desc_#res.base|))} is VALID [2018-11-19 18:40:04,715 INFO L273 TraceCheckUtils]: 363: Hoare triple {337161#(and (= 0 |ims_pcu_get_cdc_union_desc_#res.offset|) (= 0 |ims_pcu_get_cdc_union_desc_#res.base|))} assume true; {337161#(and (= 0 |ims_pcu_get_cdc_union_desc_#res.offset|) (= 0 |ims_pcu_get_cdc_union_desc_#res.base|))} is VALID [2018-11-19 18:40:04,716 INFO L268 TraceCheckUtils]: 364: Hoare quadruple {337161#(and (= 0 |ims_pcu_get_cdc_union_desc_#res.offset|) (= 0 |ims_pcu_get_cdc_union_desc_#res.base|))} {337159#true} #3137#return; {337162#(and (= 0 |ims_pcu_parse_cdc_data_#t~ret657.offset|) (= 0 |ims_pcu_parse_cdc_data_#t~ret657.base|))} is VALID [2018-11-19 18:40:04,716 INFO L273 TraceCheckUtils]: 365: Hoare triple {337162#(and (= 0 |ims_pcu_parse_cdc_data_#t~ret657.offset|) (= 0 |ims_pcu_parse_cdc_data_#t~ret657.base|))} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {337163#(and (= ims_pcu_parse_cdc_data_~union_desc~1.base 0) (= ims_pcu_parse_cdc_data_~union_desc~1.offset 0))} is VALID [2018-11-19 18:40:04,718 INFO L273 TraceCheckUtils]: 366: Hoare triple {337163#(and (= ims_pcu_parse_cdc_data_~union_desc~1.base 0) (= ims_pcu_parse_cdc_data_~union_desc~1.offset 0))} assume !(0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616);call #t~mem658.base, #t~mem658.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem659 := read~int(~union_desc~1.base, 3 + ~union_desc~1.offset, 1);call #t~ret660.base, #t~ret660.offset := usb_ifnum_to_if(#t~mem658.base, #t~mem658.offset, #t~mem659 % 256);call write~$Pointer$(#t~ret660.base, #t~ret660.offset, ~pcu.base, 79 + ~pcu.offset, 8);havoc #t~mem659;havoc #t~ret660.base, #t~ret660.offset;havoc #t~mem658.base, #t~mem658.offset;call #t~mem661.base, #t~mem661.offset := read~$Pointer$(~pcu.base, 79 + ~pcu.offset, 8);call #t~mem662.base, #t~mem662.offset := read~$Pointer$(#t~mem661.base, 8 + #t~mem661.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem662.base, #t~mem662.offset;havoc #t~mem662.base, #t~mem662.offset;havoc #t~mem661.base, #t~mem661.offset;call #t~mem663.base, #t~mem663.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem663.base, #t~mem663.offset, ~pcu.base, 87 + ~pcu.offset, 8);havoc #t~mem663.base, #t~mem663.offset;call #t~mem664.base, #t~mem664.offset := read~$Pointer$(~pcu.base, 87 + ~pcu.offset, 8); {337160#false} is VALID [2018-11-19 18:40:04,718 INFO L256 TraceCheckUtils]: 367: Hoare triple {337160#false} call #t~ret665 := usb_endpoint_maxp(#t~mem664.base, #t~mem664.offset); {337159#true} is VALID [2018-11-19 18:40:04,718 INFO L273 TraceCheckUtils]: 368: Hoare triple {337159#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {337159#true} is VALID [2018-11-19 18:40:04,718 INFO L273 TraceCheckUtils]: 369: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,718 INFO L268 TraceCheckUtils]: 370: Hoare quadruple {337159#true} {337160#false} #3139#return; {337160#false} is VALID [2018-11-19 18:40:04,719 INFO L273 TraceCheckUtils]: 371: Hoare triple {337160#false} assume -2147483648 <= #t~ret665 && #t~ret665 <= 2147483647;~tmp~37 := #t~ret665;havoc #t~ret665;havoc #t~mem664.base, #t~mem664.offset;call write~int(~tmp~37, ~pcu.base, 119 + ~pcu.offset, 4);call #t~mem666.base, #t~mem666.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem667 := read~int(~union_desc~1.base, 4 + ~union_desc~1.offset, 1);call #t~ret668.base, #t~ret668.offset := usb_ifnum_to_if(#t~mem666.base, #t~mem666.offset, #t~mem667 % 256);call write~$Pointer$(#t~ret668.base, #t~ret668.offset, ~pcu.base, 123 + ~pcu.offset, 8);havoc #t~mem666.base, #t~mem666.offset;havoc #t~mem667;havoc #t~ret668.base, #t~ret668.offset;call #t~mem669.base, #t~mem669.offset := read~$Pointer$(~pcu.base, 123 + ~pcu.offset, 8);call #t~mem670.base, #t~mem670.offset := read~$Pointer$(#t~mem669.base, 8 + #t~mem669.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem670.base, #t~mem670.offset;havoc #t~mem670.base, #t~mem670.offset;havoc #t~mem669.base, #t~mem669.offset;call #t~mem671 := read~int(~alt~0.base, 4 + ~alt~0.offset, 1); {337160#false} is VALID [2018-11-19 18:40:04,719 INFO L273 TraceCheckUtils]: 372: Hoare triple {337160#false} assume !(2 != #t~mem671 % 256 % 4294967296);havoc #t~mem671;call #t~mem676.base, #t~mem676.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem676.base, #t~mem676.offset, ~pcu.base, 167 + ~pcu.offset, 8);havoc #t~mem676.base, #t~mem676.offset;call #t~mem677.base, #t~mem677.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {337160#false} is VALID [2018-11-19 18:40:04,719 INFO L256 TraceCheckUtils]: 373: Hoare triple {337160#false} call #t~ret678 := usb_endpoint_is_bulk_out(#t~mem677.base, #t~mem677.offset); {337159#true} is VALID [2018-11-19 18:40:04,719 INFO L273 TraceCheckUtils]: 374: Hoare triple {337159#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~4;havoc ~tmp___0~1;havoc ~tmp___1~1; {337159#true} is VALID [2018-11-19 18:40:04,719 INFO L256 TraceCheckUtils]: 375: Hoare triple {337159#true} call #t~ret25 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {337159#true} is VALID [2018-11-19 18:40:04,719 INFO L273 TraceCheckUtils]: 376: Hoare triple {337159#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {337159#true} is VALID [2018-11-19 18:40:04,720 INFO L273 TraceCheckUtils]: 377: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,720 INFO L268 TraceCheckUtils]: 378: Hoare quadruple {337159#true} {337159#true} #2887#return; {337159#true} is VALID [2018-11-19 18:40:04,720 INFO L273 TraceCheckUtils]: 379: Hoare triple {337159#true} assume -2147483648 <= #t~ret25 && #t~ret25 <= 2147483647;~tmp~4 := #t~ret25;havoc #t~ret25; {337159#true} is VALID [2018-11-19 18:40:04,720 INFO L273 TraceCheckUtils]: 380: Hoare triple {337159#true} assume 0 != ~tmp~4; {337159#true} is VALID [2018-11-19 18:40:04,720 INFO L256 TraceCheckUtils]: 381: Hoare triple {337159#true} call #t~ret26 := usb_endpoint_dir_out(~epd.base, ~epd.offset); {337159#true} is VALID [2018-11-19 18:40:04,721 INFO L273 TraceCheckUtils]: 382: Hoare triple {337159#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem21 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem21 % 256 % 256 <= 127 then #t~mem21 % 256 % 256 else #t~mem21 % 256 % 256 - 256) >= 0 then 1 else 0);havoc #t~mem21; {337159#true} is VALID [2018-11-19 18:40:04,721 INFO L273 TraceCheckUtils]: 383: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,721 INFO L268 TraceCheckUtils]: 384: Hoare quadruple {337159#true} {337159#true} #2889#return; {337159#true} is VALID [2018-11-19 18:40:04,721 INFO L273 TraceCheckUtils]: 385: Hoare triple {337159#true} assume -2147483648 <= #t~ret26 && #t~ret26 <= 2147483647;~tmp___0~1 := #t~ret26;havoc #t~ret26; {337159#true} is VALID [2018-11-19 18:40:04,721 INFO L273 TraceCheckUtils]: 386: Hoare triple {337159#true} assume 0 != ~tmp___0~1;~tmp___1~1 := 1; {337159#true} is VALID [2018-11-19 18:40:04,721 INFO L273 TraceCheckUtils]: 387: Hoare triple {337159#true} #res := ~tmp___1~1; {337159#true} is VALID [2018-11-19 18:40:04,722 INFO L273 TraceCheckUtils]: 388: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,722 INFO L268 TraceCheckUtils]: 389: Hoare quadruple {337159#true} {337160#false} #3141#return; {337160#false} is VALID [2018-11-19 18:40:04,722 INFO L273 TraceCheckUtils]: 390: Hoare triple {337160#false} assume -2147483648 <= #t~ret678 && #t~ret678 <= 2147483647;~tmp___0~16 := #t~ret678;havoc #t~mem677.base, #t~mem677.offset;havoc #t~ret678; {337160#false} is VALID [2018-11-19 18:40:04,722 INFO L273 TraceCheckUtils]: 391: Hoare triple {337160#false} assume !(0 == ~tmp___0~16);call #t~mem682.base, #t~mem682.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {337160#false} is VALID [2018-11-19 18:40:04,722 INFO L256 TraceCheckUtils]: 392: Hoare triple {337160#false} call #t~ret683 := usb_endpoint_maxp(#t~mem682.base, #t~mem682.offset); {337159#true} is VALID [2018-11-19 18:40:04,722 INFO L273 TraceCheckUtils]: 393: Hoare triple {337159#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {337159#true} is VALID [2018-11-19 18:40:04,723 INFO L273 TraceCheckUtils]: 394: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,723 INFO L268 TraceCheckUtils]: 395: Hoare quadruple {337159#true} {337160#false} #3143#return; {337160#false} is VALID [2018-11-19 18:40:04,723 INFO L273 TraceCheckUtils]: 396: Hoare triple {337160#false} assume -2147483648 <= #t~ret683 && #t~ret683 <= 2147483647;~tmp___1~7 := #t~ret683;havoc #t~mem682.base, #t~mem682.offset;havoc #t~ret683;call write~int(~tmp___1~7, ~pcu.base, 183 + ~pcu.offset, 4);call #t~mem684 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {337160#false} is VALID [2018-11-19 18:40:04,723 INFO L273 TraceCheckUtils]: 397: Hoare triple {337160#false} assume !(#t~mem684 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem684;call #t~mem689.base, #t~mem689.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem689.base, 63 + #t~mem689.offset, ~pcu.base, 131 + ~pcu.offset, 8);havoc #t~mem689.base, #t~mem689.offset;call #t~mem690.base, #t~mem690.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {337160#false} is VALID [2018-11-19 18:40:04,723 INFO L256 TraceCheckUtils]: 398: Hoare triple {337160#false} call #t~ret691 := usb_endpoint_is_bulk_in(#t~mem690.base, #t~mem690.offset); {337159#true} is VALID [2018-11-19 18:40:04,723 INFO L273 TraceCheckUtils]: 399: Hoare triple {337159#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~3;havoc ~tmp___0~0;havoc ~tmp___1~0; {337159#true} is VALID [2018-11-19 18:40:04,723 INFO L256 TraceCheckUtils]: 400: Hoare triple {337159#true} call #t~ret23 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {337159#true} is VALID [2018-11-19 18:40:04,723 INFO L273 TraceCheckUtils]: 401: Hoare triple {337159#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {337159#true} is VALID [2018-11-19 18:40:04,723 INFO L273 TraceCheckUtils]: 402: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,724 INFO L268 TraceCheckUtils]: 403: Hoare quadruple {337159#true} {337159#true} #2915#return; {337159#true} is VALID [2018-11-19 18:40:04,724 INFO L273 TraceCheckUtils]: 404: Hoare triple {337159#true} assume -2147483648 <= #t~ret23 && #t~ret23 <= 2147483647;~tmp~3 := #t~ret23;havoc #t~ret23; {337159#true} is VALID [2018-11-19 18:40:04,724 INFO L273 TraceCheckUtils]: 405: Hoare triple {337159#true} assume 0 != ~tmp~3; {337159#true} is VALID [2018-11-19 18:40:04,724 INFO L256 TraceCheckUtils]: 406: Hoare triple {337159#true} call #t~ret24 := usb_endpoint_dir_in(~epd.base, ~epd.offset); {337159#true} is VALID [2018-11-19 18:40:04,724 INFO L273 TraceCheckUtils]: 407: Hoare triple {337159#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem20 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem20 % 256 % 256 <= 127 then #t~mem20 % 256 % 256 else #t~mem20 % 256 % 256 - 256) < 0 then 1 else 0);havoc #t~mem20; {337159#true} is VALID [2018-11-19 18:40:04,724 INFO L273 TraceCheckUtils]: 408: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,724 INFO L268 TraceCheckUtils]: 409: Hoare quadruple {337159#true} {337159#true} #2917#return; {337159#true} is VALID [2018-11-19 18:40:04,724 INFO L273 TraceCheckUtils]: 410: Hoare triple {337159#true} assume -2147483648 <= #t~ret24 && #t~ret24 <= 2147483647;~tmp___0~0 := #t~ret24;havoc #t~ret24; {337159#true} is VALID [2018-11-19 18:40:04,724 INFO L273 TraceCheckUtils]: 411: Hoare triple {337159#true} assume 0 != ~tmp___0~0;~tmp___1~0 := 1; {337159#true} is VALID [2018-11-19 18:40:04,725 INFO L273 TraceCheckUtils]: 412: Hoare triple {337159#true} #res := ~tmp___1~0; {337159#true} is VALID [2018-11-19 18:40:04,725 INFO L273 TraceCheckUtils]: 413: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,725 INFO L268 TraceCheckUtils]: 414: Hoare quadruple {337159#true} {337160#false} #3145#return; {337160#false} is VALID [2018-11-19 18:40:04,725 INFO L273 TraceCheckUtils]: 415: Hoare triple {337160#false} assume -2147483648 <= #t~ret691 && #t~ret691 <= 2147483647;~tmp___2~3 := #t~ret691;havoc #t~ret691;havoc #t~mem690.base, #t~mem690.offset; {337160#false} is VALID [2018-11-19 18:40:04,725 INFO L273 TraceCheckUtils]: 416: Hoare triple {337160#false} assume !(0 == ~tmp___2~3);call #t~mem695.base, #t~mem695.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {337160#false} is VALID [2018-11-19 18:40:04,725 INFO L256 TraceCheckUtils]: 417: Hoare triple {337160#false} call #t~ret696 := usb_endpoint_maxp(#t~mem695.base, #t~mem695.offset); {337159#true} is VALID [2018-11-19 18:40:04,725 INFO L273 TraceCheckUtils]: 418: Hoare triple {337159#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {337159#true} is VALID [2018-11-19 18:40:04,725 INFO L273 TraceCheckUtils]: 419: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,726 INFO L268 TraceCheckUtils]: 420: Hoare quadruple {337159#true} {337160#false} #3147#return; {337160#false} is VALID [2018-11-19 18:40:04,726 INFO L273 TraceCheckUtils]: 421: Hoare triple {337160#false} assume -2147483648 <= #t~ret696 && #t~ret696 <= 2147483647;~tmp___3~2 := #t~ret696;havoc #t~ret696;havoc #t~mem695.base, #t~mem695.offset;call write~int(~tmp___3~2, ~pcu.base, 163 + ~pcu.offset, 4);call #t~mem697 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {337160#false} is VALID [2018-11-19 18:40:04,726 INFO L273 TraceCheckUtils]: 422: Hoare triple {337160#false} assume !(#t~mem697 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem697;#res := 0; {337160#false} is VALID [2018-11-19 18:40:04,726 INFO L273 TraceCheckUtils]: 423: Hoare triple {337160#false} assume true; {337160#false} is VALID [2018-11-19 18:40:04,726 INFO L268 TraceCheckUtils]: 424: Hoare quadruple {337160#false} {337159#true} #3103#return; {337160#false} is VALID [2018-11-19 18:40:04,726 INFO L273 TraceCheckUtils]: 425: Hoare triple {337160#false} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {337160#false} is VALID [2018-11-19 18:40:04,726 INFO L273 TraceCheckUtils]: 426: Hoare triple {337160#false} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {337160#false} is VALID [2018-11-19 18:40:04,726 INFO L273 TraceCheckUtils]: 427: Hoare triple {337160#false} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {337160#false} is VALID [2018-11-19 18:40:04,726 INFO L256 TraceCheckUtils]: 428: Hoare triple {337160#false} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {337159#true} is VALID [2018-11-19 18:40:04,727 INFO L273 TraceCheckUtils]: 429: Hoare triple {337159#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {337159#true} is VALID [2018-11-19 18:40:04,727 INFO L256 TraceCheckUtils]: 430: Hoare triple {337159#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {337159#true} is VALID [2018-11-19 18:40:04,727 INFO L273 TraceCheckUtils]: 431: Hoare triple {337159#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {337159#true} is VALID [2018-11-19 18:40:04,727 INFO L273 TraceCheckUtils]: 432: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,727 INFO L268 TraceCheckUtils]: 433: Hoare quadruple {337159#true} {337159#true} #2541#return; {337159#true} is VALID [2018-11-19 18:40:04,727 INFO L273 TraceCheckUtils]: 434: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,727 INFO L268 TraceCheckUtils]: 435: Hoare quadruple {337159#true} {337160#false} #3105#return; {337160#false} is VALID [2018-11-19 18:40:04,727 INFO L273 TraceCheckUtils]: 436: Hoare triple {337160#false} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {337160#false} is VALID [2018-11-19 18:40:04,728 INFO L256 TraceCheckUtils]: 437: Hoare triple {337160#false} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {337159#true} is VALID [2018-11-19 18:40:04,728 INFO L273 TraceCheckUtils]: 438: Hoare triple {337159#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {337159#true} is VALID [2018-11-19 18:40:04,728 INFO L256 TraceCheckUtils]: 439: Hoare triple {337159#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {337159#true} is VALID [2018-11-19 18:40:04,728 INFO L273 TraceCheckUtils]: 440: Hoare triple {337159#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {337159#true} is VALID [2018-11-19 18:40:04,728 INFO L273 TraceCheckUtils]: 441: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,728 INFO L268 TraceCheckUtils]: 442: Hoare quadruple {337159#true} {337159#true} #2541#return; {337159#true} is VALID [2018-11-19 18:40:04,728 INFO L273 TraceCheckUtils]: 443: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,728 INFO L268 TraceCheckUtils]: 444: Hoare quadruple {337159#true} {337160#false} #3107#return; {337160#false} is VALID [2018-11-19 18:40:04,728 INFO L273 TraceCheckUtils]: 445: Hoare triple {337160#false} havoc #t~mem837.base, #t~mem837.offset; {337160#false} is VALID [2018-11-19 18:40:04,729 INFO L256 TraceCheckUtils]: 446: Hoare triple {337160#false} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {337159#true} is VALID [2018-11-19 18:40:04,729 INFO L273 TraceCheckUtils]: 447: Hoare triple {337159#true} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {337159#true} is VALID [2018-11-19 18:40:04,729 INFO L273 TraceCheckUtils]: 448: Hoare triple {337159#true} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {337159#true} is VALID [2018-11-19 18:40:04,729 INFO L256 TraceCheckUtils]: 449: Hoare triple {337159#true} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {337159#true} is VALID [2018-11-19 18:40:04,729 INFO L273 TraceCheckUtils]: 450: Hoare triple {337159#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {337159#true} is VALID [2018-11-19 18:40:04,729 INFO L256 TraceCheckUtils]: 451: Hoare triple {337159#true} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {337159#true} is VALID [2018-11-19 18:40:04,729 INFO L273 TraceCheckUtils]: 452: Hoare triple {337159#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {337159#true} is VALID [2018-11-19 18:40:04,729 INFO L256 TraceCheckUtils]: 453: Hoare triple {337159#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {337159#true} is VALID [2018-11-19 18:40:04,729 INFO L273 TraceCheckUtils]: 454: Hoare triple {337159#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {337159#true} is VALID [2018-11-19 18:40:04,730 INFO L273 TraceCheckUtils]: 455: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,730 INFO L268 TraceCheckUtils]: 456: Hoare quadruple {337159#true} {337159#true} #2605#return; {337159#true} is VALID [2018-11-19 18:40:04,730 INFO L273 TraceCheckUtils]: 457: Hoare triple {337159#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {337159#true} is VALID [2018-11-19 18:40:04,730 INFO L256 TraceCheckUtils]: 458: Hoare triple {337159#true} call #t~ret965 := ldv_undef_int(); {337159#true} is VALID [2018-11-19 18:40:04,730 INFO L273 TraceCheckUtils]: 459: Hoare triple {337159#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {337159#true} is VALID [2018-11-19 18:40:04,730 INFO L273 TraceCheckUtils]: 460: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,730 INFO L268 TraceCheckUtils]: 461: Hoare quadruple {337159#true} {337159#true} #2607#return; {337159#true} is VALID [2018-11-19 18:40:04,730 INFO L273 TraceCheckUtils]: 462: Hoare triple {337159#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {337159#true} is VALID [2018-11-19 18:40:04,731 INFO L273 TraceCheckUtils]: 463: Hoare triple {337159#true} assume 0 != ~tmp___0~26; {337159#true} is VALID [2018-11-19 18:40:04,731 INFO L273 TraceCheckUtils]: 464: Hoare triple {337159#true} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {337159#true} is VALID [2018-11-19 18:40:04,731 INFO L273 TraceCheckUtils]: 465: Hoare triple {337159#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {337159#true} is VALID [2018-11-19 18:40:04,731 INFO L273 TraceCheckUtils]: 466: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,731 INFO L268 TraceCheckUtils]: 467: Hoare quadruple {337159#true} {337159#true} #3135#return; {337159#true} is VALID [2018-11-19 18:40:04,731 INFO L273 TraceCheckUtils]: 468: Hoare triple {337159#true} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {337159#true} is VALID [2018-11-19 18:40:04,731 INFO L273 TraceCheckUtils]: 469: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,731 INFO L268 TraceCheckUtils]: 470: Hoare quadruple {337159#true} {337159#true} #2709#return; {337159#true} is VALID [2018-11-19 18:40:04,731 INFO L273 TraceCheckUtils]: 471: Hoare triple {337159#true} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {337159#true} is VALID [2018-11-19 18:40:04,732 INFO L273 TraceCheckUtils]: 472: Hoare triple {337159#true} assume 0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616;havoc #t~mem561.base, #t~mem561.offset;havoc #t~nondet562;call #t~mem563.base, #t~mem563.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem563.base, #t~mem563.offset;~error~18 := -12; {337159#true} is VALID [2018-11-19 18:40:04,732 INFO L273 TraceCheckUtils]: 473: Hoare triple {337159#true} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {337159#true} is VALID [2018-11-19 18:40:04,732 INFO L273 TraceCheckUtils]: 474: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,732 INFO L268 TraceCheckUtils]: 475: Hoare quadruple {337159#true} {337160#false} #3109#return; {337160#false} is VALID [2018-11-19 18:40:04,732 INFO L273 TraceCheckUtils]: 476: Hoare triple {337160#false} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {337160#false} is VALID [2018-11-19 18:40:04,732 INFO L273 TraceCheckUtils]: 477: Hoare triple {337160#false} assume 0 != ~error~25; {337160#false} is VALID [2018-11-19 18:40:04,732 INFO L273 TraceCheckUtils]: 478: Hoare triple {337160#false} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {337160#false} is VALID [2018-11-19 18:40:04,732 INFO L273 TraceCheckUtils]: 479: Hoare triple {337160#false} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {337160#false} is VALID [2018-11-19 18:40:04,732 INFO L273 TraceCheckUtils]: 480: Hoare triple {337160#false} assume true; {337160#false} is VALID [2018-11-19 18:40:04,733 INFO L268 TraceCheckUtils]: 481: Hoare quadruple {337160#false} {337159#true} #3015#return; {337160#false} is VALID [2018-11-19 18:40:04,733 INFO L273 TraceCheckUtils]: 482: Hoare triple {337160#false} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {337160#false} is VALID [2018-11-19 18:40:04,733 INFO L273 TraceCheckUtils]: 483: Hoare triple {337160#false} assume 0 == ~ldv_retval_3~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {337160#false} is VALID [2018-11-19 18:40:04,733 INFO L273 TraceCheckUtils]: 484: Hoare triple {337160#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {337160#false} is VALID [2018-11-19 18:40:04,733 INFO L273 TraceCheckUtils]: 485: Hoare triple {337160#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {337160#false} is VALID [2018-11-19 18:40:04,733 INFO L273 TraceCheckUtils]: 486: Hoare triple {337160#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {337160#false} is VALID [2018-11-19 18:40:04,733 INFO L273 TraceCheckUtils]: 487: Hoare triple {337160#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {337160#false} is VALID [2018-11-19 18:40:04,733 INFO L273 TraceCheckUtils]: 488: Hoare triple {337160#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {337160#false} is VALID [2018-11-19 18:40:04,734 INFO L273 TraceCheckUtils]: 489: Hoare triple {337160#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {337160#false} is VALID [2018-11-19 18:40:04,734 INFO L273 TraceCheckUtils]: 490: Hoare triple {337160#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {337160#false} is VALID [2018-11-19 18:40:04,734 INFO L273 TraceCheckUtils]: 491: Hoare triple {337160#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {337160#false} is VALID [2018-11-19 18:40:04,734 INFO L273 TraceCheckUtils]: 492: Hoare triple {337160#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {337160#false} is VALID [2018-11-19 18:40:04,734 INFO L273 TraceCheckUtils]: 493: Hoare triple {337160#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {337160#false} is VALID [2018-11-19 18:40:04,734 INFO L273 TraceCheckUtils]: 494: Hoare triple {337160#false} assume #t~switch909; {337160#false} is VALID [2018-11-19 18:40:04,734 INFO L273 TraceCheckUtils]: 495: Hoare triple {337160#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {337160#false} is VALID [2018-11-19 18:40:04,734 INFO L273 TraceCheckUtils]: 496: Hoare triple {337160#false} assume #t~switch947; {337160#false} is VALID [2018-11-19 18:40:04,734 INFO L273 TraceCheckUtils]: 497: Hoare triple {337160#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {337160#false} is VALID [2018-11-19 18:40:04,735 INFO L256 TraceCheckUtils]: 498: Hoare triple {337160#false} call ims_pcu_driver_exit(); {337159#true} is VALID [2018-11-19 18:40:04,735 INFO L256 TraceCheckUtils]: 499: Hoare triple {337159#true} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {337159#true} is VALID [2018-11-19 18:40:04,735 INFO L273 TraceCheckUtils]: 500: Hoare triple {337159#true} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {337159#true} is VALID [2018-11-19 18:40:04,735 INFO L273 TraceCheckUtils]: 501: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,735 INFO L268 TraceCheckUtils]: 502: Hoare quadruple {337159#true} {337159#true} #2597#return; {337159#true} is VALID [2018-11-19 18:40:04,735 INFO L273 TraceCheckUtils]: 503: Hoare triple {337159#true} assume true; {337159#true} is VALID [2018-11-19 18:40:04,735 INFO L268 TraceCheckUtils]: 504: Hoare quadruple {337159#true} {337160#false} #3033#return; {337160#false} is VALID [2018-11-19 18:40:04,735 INFO L273 TraceCheckUtils]: 505: Hoare triple {337160#false} ~ldv_state_variable_0~0 := 2; {337160#false} is VALID [2018-11-19 18:40:04,735 INFO L256 TraceCheckUtils]: 506: Hoare triple {337160#false} call ldv_check_final_state(); {337160#false} is VALID [2018-11-19 18:40:04,736 INFO L273 TraceCheckUtils]: 507: Hoare triple {337160#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {337160#false} is VALID [2018-11-19 18:40:04,736 INFO L256 TraceCheckUtils]: 508: Hoare triple {337160#false} call ldv_error(); {337160#false} is VALID [2018-11-19 18:40:04,736 INFO L273 TraceCheckUtils]: 509: Hoare triple {337160#false} assume !false; {337160#false} is VALID [2018-11-19 18:40:04,816 INFO L134 CoverageAnalysis]: Checked inductivity of 2723 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 2701 trivial. 0 not checked. [2018-11-19 18:40:04,816 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:40:04,816 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-19 18:40:04,817 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 510 [2018-11-19 18:40:04,817 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:40:04,818 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-19 18:40:05,243 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 377 edges. 377 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:40:05,244 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-19 18:40:05,244 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-19 18:40:05,244 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-19 18:40:05,244 INFO L87 Difference]: Start difference. First operand 3878 states and 5250 transitions. Second operand 5 states. [2018-11-19 18:40:28,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:40:28,135 INFO L93 Difference]: Finished difference Result 7256 states and 9814 transitions. [2018-11-19 18:40:28,135 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-19 18:40:28,135 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 510 [2018-11-19 18:40:28,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:40:28,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-19 18:40:28,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 3264 transitions. [2018-11-19 18:40:28,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-19 18:40:28,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 3264 transitions. [2018-11-19 18:40:28,266 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 3264 transitions. [2018-11-19 18:40:31,012 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3264 edges. 3264 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:40:31,748 INFO L225 Difference]: With dead ends: 7256 [2018-11-19 18:40:31,748 INFO L226 Difference]: Without dead ends: 3890 [2018-11-19 18:40:31,753 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-19 18:40:31,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3890 states. [2018-11-19 18:40:39,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3890 to 3886. [2018-11-19 18:40:39,435 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:40:39,435 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3890 states. Second operand 3886 states. [2018-11-19 18:40:39,435 INFO L74 IsIncluded]: Start isIncluded. First operand 3890 states. Second operand 3886 states. [2018-11-19 18:40:39,435 INFO L87 Difference]: Start difference. First operand 3890 states. Second operand 3886 states. [2018-11-19 18:40:40,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:40:40,034 INFO L93 Difference]: Finished difference Result 3890 states and 5262 transitions. [2018-11-19 18:40:40,034 INFO L276 IsEmpty]: Start isEmpty. Operand 3890 states and 5262 transitions. [2018-11-19 18:40:40,039 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:40:40,039 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:40:40,039 INFO L74 IsIncluded]: Start isIncluded. First operand 3886 states. Second operand 3890 states. [2018-11-19 18:40:40,040 INFO L87 Difference]: Start difference. First operand 3886 states. Second operand 3890 states. [2018-11-19 18:40:40,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:40:40,639 INFO L93 Difference]: Finished difference Result 3890 states and 5262 transitions. [2018-11-19 18:40:40,640 INFO L276 IsEmpty]: Start isEmpty. Operand 3890 states and 5262 transitions. [2018-11-19 18:40:40,645 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:40:40,645 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:40:40,645 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:40:40,645 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:40:40,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3886 states. [2018-11-19 18:40:41,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3886 states to 3886 states and 5258 transitions. [2018-11-19 18:40:41,367 INFO L78 Accepts]: Start accepts. Automaton has 3886 states and 5258 transitions. Word has length 510 [2018-11-19 18:40:41,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:40:41,368 INFO L480 AbstractCegarLoop]: Abstraction has 3886 states and 5258 transitions. [2018-11-19 18:40:41,368 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-19 18:40:41,368 INFO L276 IsEmpty]: Start isEmpty. Operand 3886 states and 5258 transitions. [2018-11-19 18:40:41,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 523 [2018-11-19 18:40:41,375 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:40:41,375 INFO L384 BasicCegarLoop]: trace histogram [37, 37, 37, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:40:41,376 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:40:41,376 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:40:41,376 INFO L82 PathProgramCache]: Analyzing trace with hash -1248529125, now seen corresponding path program 1 times [2018-11-19 18:40:41,376 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:40:41,376 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:40:41,378 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:40:41,378 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:40:41,378 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:40:41,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:40:41,760 INFO L256 TraceCheckUtils]: 0: Hoare triple {359715#true} call ULTIMATE.init(); {359715#true} is VALID [2018-11-19 18:40:41,760 INFO L273 TraceCheckUtils]: 1: Hoare triple {359715#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,761 INFO L273 TraceCheckUtils]: 2: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,761 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {359715#true} {359715#true} #3175#return; {359715#true} is VALID [2018-11-19 18:40:41,761 INFO L256 TraceCheckUtils]: 4: Hoare triple {359715#true} call #t~ret973 := main(); {359715#true} is VALID [2018-11-19 18:40:41,761 INFO L273 TraceCheckUtils]: 5: Hoare triple {359715#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {359715#true} is VALID [2018-11-19 18:40:41,761 INFO L256 TraceCheckUtils]: 6: Hoare triple {359715#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {359715#true} is VALID [2018-11-19 18:40:41,761 INFO L273 TraceCheckUtils]: 7: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,761 INFO L273 TraceCheckUtils]: 8: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,761 INFO L273 TraceCheckUtils]: 9: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,762 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {359715#true} {359715#true} #2927#return; {359715#true} is VALID [2018-11-19 18:40:41,762 INFO L273 TraceCheckUtils]: 11: Hoare triple {359715#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {359715#true} is VALID [2018-11-19 18:40:41,762 INFO L256 TraceCheckUtils]: 12: Hoare triple {359715#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {359715#true} is VALID [2018-11-19 18:40:41,762 INFO L273 TraceCheckUtils]: 13: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,762 INFO L273 TraceCheckUtils]: 14: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,762 INFO L273 TraceCheckUtils]: 15: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,762 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {359715#true} {359715#true} #2929#return; {359715#true} is VALID [2018-11-19 18:40:41,762 INFO L273 TraceCheckUtils]: 17: Hoare triple {359715#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {359715#true} is VALID [2018-11-19 18:40:41,762 INFO L256 TraceCheckUtils]: 18: Hoare triple {359715#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {359715#true} is VALID [2018-11-19 18:40:41,763 INFO L273 TraceCheckUtils]: 19: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,763 INFO L273 TraceCheckUtils]: 20: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,763 INFO L273 TraceCheckUtils]: 21: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,763 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {359715#true} {359715#true} #2931#return; {359715#true} is VALID [2018-11-19 18:40:41,763 INFO L273 TraceCheckUtils]: 23: Hoare triple {359715#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {359715#true} is VALID [2018-11-19 18:40:41,763 INFO L256 TraceCheckUtils]: 24: Hoare triple {359715#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {359715#true} is VALID [2018-11-19 18:40:41,763 INFO L273 TraceCheckUtils]: 25: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,763 INFO L273 TraceCheckUtils]: 26: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,764 INFO L273 TraceCheckUtils]: 27: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,764 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {359715#true} {359715#true} #2933#return; {359715#true} is VALID [2018-11-19 18:40:41,764 INFO L273 TraceCheckUtils]: 29: Hoare triple {359715#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {359715#true} is VALID [2018-11-19 18:40:41,764 INFO L256 TraceCheckUtils]: 30: Hoare triple {359715#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {359715#true} is VALID [2018-11-19 18:40:41,764 INFO L273 TraceCheckUtils]: 31: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,764 INFO L273 TraceCheckUtils]: 32: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,764 INFO L273 TraceCheckUtils]: 33: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,764 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {359715#true} {359715#true} #2935#return; {359715#true} is VALID [2018-11-19 18:40:41,764 INFO L273 TraceCheckUtils]: 35: Hoare triple {359715#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {359715#true} is VALID [2018-11-19 18:40:41,765 INFO L256 TraceCheckUtils]: 36: Hoare triple {359715#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {359715#true} is VALID [2018-11-19 18:40:41,765 INFO L273 TraceCheckUtils]: 37: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,765 INFO L273 TraceCheckUtils]: 38: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,765 INFO L273 TraceCheckUtils]: 39: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,765 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {359715#true} {359715#true} #2937#return; {359715#true} is VALID [2018-11-19 18:40:41,765 INFO L273 TraceCheckUtils]: 41: Hoare triple {359715#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {359715#true} is VALID [2018-11-19 18:40:41,765 INFO L256 TraceCheckUtils]: 42: Hoare triple {359715#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {359715#true} is VALID [2018-11-19 18:40:41,765 INFO L273 TraceCheckUtils]: 43: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,766 INFO L273 TraceCheckUtils]: 44: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,766 INFO L273 TraceCheckUtils]: 45: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,766 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {359715#true} {359715#true} #2939#return; {359715#true} is VALID [2018-11-19 18:40:41,766 INFO L273 TraceCheckUtils]: 47: Hoare triple {359715#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {359715#true} is VALID [2018-11-19 18:40:41,766 INFO L256 TraceCheckUtils]: 48: Hoare triple {359715#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {359715#true} is VALID [2018-11-19 18:40:41,766 INFO L273 TraceCheckUtils]: 49: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,766 INFO L273 TraceCheckUtils]: 50: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,766 INFO L273 TraceCheckUtils]: 51: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,766 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {359715#true} {359715#true} #2941#return; {359715#true} is VALID [2018-11-19 18:40:41,767 INFO L273 TraceCheckUtils]: 53: Hoare triple {359715#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {359715#true} is VALID [2018-11-19 18:40:41,767 INFO L256 TraceCheckUtils]: 54: Hoare triple {359715#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {359715#true} is VALID [2018-11-19 18:40:41,767 INFO L273 TraceCheckUtils]: 55: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,767 INFO L273 TraceCheckUtils]: 56: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,767 INFO L273 TraceCheckUtils]: 57: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,767 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {359715#true} {359715#true} #2943#return; {359715#true} is VALID [2018-11-19 18:40:41,767 INFO L273 TraceCheckUtils]: 59: Hoare triple {359715#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {359715#true} is VALID [2018-11-19 18:40:41,767 INFO L256 TraceCheckUtils]: 60: Hoare triple {359715#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {359715#true} is VALID [2018-11-19 18:40:41,767 INFO L273 TraceCheckUtils]: 61: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,768 INFO L273 TraceCheckUtils]: 62: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,768 INFO L273 TraceCheckUtils]: 63: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,768 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {359715#true} {359715#true} #2945#return; {359715#true} is VALID [2018-11-19 18:40:41,768 INFO L273 TraceCheckUtils]: 65: Hoare triple {359715#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {359715#true} is VALID [2018-11-19 18:40:41,768 INFO L256 TraceCheckUtils]: 66: Hoare triple {359715#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {359715#true} is VALID [2018-11-19 18:40:41,768 INFO L273 TraceCheckUtils]: 67: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,768 INFO L273 TraceCheckUtils]: 68: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,768 INFO L273 TraceCheckUtils]: 69: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,769 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {359715#true} {359715#true} #2947#return; {359715#true} is VALID [2018-11-19 18:40:41,769 INFO L273 TraceCheckUtils]: 71: Hoare triple {359715#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {359715#true} is VALID [2018-11-19 18:40:41,769 INFO L256 TraceCheckUtils]: 72: Hoare triple {359715#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {359715#true} is VALID [2018-11-19 18:40:41,769 INFO L273 TraceCheckUtils]: 73: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,769 INFO L273 TraceCheckUtils]: 74: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,769 INFO L273 TraceCheckUtils]: 75: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,769 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {359715#true} {359715#true} #2949#return; {359715#true} is VALID [2018-11-19 18:40:41,769 INFO L273 TraceCheckUtils]: 77: Hoare triple {359715#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {359715#true} is VALID [2018-11-19 18:40:41,769 INFO L256 TraceCheckUtils]: 78: Hoare triple {359715#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {359715#true} is VALID [2018-11-19 18:40:41,770 INFO L273 TraceCheckUtils]: 79: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,770 INFO L273 TraceCheckUtils]: 80: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,770 INFO L273 TraceCheckUtils]: 81: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,770 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {359715#true} {359715#true} #2951#return; {359715#true} is VALID [2018-11-19 18:40:41,770 INFO L273 TraceCheckUtils]: 83: Hoare triple {359715#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {359715#true} is VALID [2018-11-19 18:40:41,770 INFO L256 TraceCheckUtils]: 84: Hoare triple {359715#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {359715#true} is VALID [2018-11-19 18:40:41,770 INFO L273 TraceCheckUtils]: 85: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,770 INFO L273 TraceCheckUtils]: 86: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,770 INFO L273 TraceCheckUtils]: 87: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,771 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {359715#true} {359715#true} #2953#return; {359715#true} is VALID [2018-11-19 18:40:41,771 INFO L273 TraceCheckUtils]: 89: Hoare triple {359715#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {359715#true} is VALID [2018-11-19 18:40:41,771 INFO L256 TraceCheckUtils]: 90: Hoare triple {359715#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {359715#true} is VALID [2018-11-19 18:40:41,771 INFO L273 TraceCheckUtils]: 91: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,771 INFO L273 TraceCheckUtils]: 92: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,771 INFO L273 TraceCheckUtils]: 93: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,771 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {359715#true} {359715#true} #2955#return; {359715#true} is VALID [2018-11-19 18:40:41,771 INFO L273 TraceCheckUtils]: 95: Hoare triple {359715#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {359715#true} is VALID [2018-11-19 18:40:41,772 INFO L256 TraceCheckUtils]: 96: Hoare triple {359715#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {359715#true} is VALID [2018-11-19 18:40:41,772 INFO L273 TraceCheckUtils]: 97: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,772 INFO L273 TraceCheckUtils]: 98: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,772 INFO L273 TraceCheckUtils]: 99: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,772 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {359715#true} {359715#true} #2957#return; {359715#true} is VALID [2018-11-19 18:40:41,772 INFO L273 TraceCheckUtils]: 101: Hoare triple {359715#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {359715#true} is VALID [2018-11-19 18:40:41,772 INFO L256 TraceCheckUtils]: 102: Hoare triple {359715#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {359715#true} is VALID [2018-11-19 18:40:41,772 INFO L273 TraceCheckUtils]: 103: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,772 INFO L273 TraceCheckUtils]: 104: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,773 INFO L273 TraceCheckUtils]: 105: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,773 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {359715#true} {359715#true} #2959#return; {359715#true} is VALID [2018-11-19 18:40:41,773 INFO L273 TraceCheckUtils]: 107: Hoare triple {359715#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {359715#true} is VALID [2018-11-19 18:40:41,773 INFO L256 TraceCheckUtils]: 108: Hoare triple {359715#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {359715#true} is VALID [2018-11-19 18:40:41,773 INFO L273 TraceCheckUtils]: 109: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,773 INFO L273 TraceCheckUtils]: 110: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,773 INFO L273 TraceCheckUtils]: 111: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,773 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {359715#true} {359715#true} #2961#return; {359715#true} is VALID [2018-11-19 18:40:41,774 INFO L273 TraceCheckUtils]: 113: Hoare triple {359715#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {359715#true} is VALID [2018-11-19 18:40:41,774 INFO L256 TraceCheckUtils]: 114: Hoare triple {359715#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {359715#true} is VALID [2018-11-19 18:40:41,774 INFO L273 TraceCheckUtils]: 115: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,774 INFO L273 TraceCheckUtils]: 116: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,774 INFO L273 TraceCheckUtils]: 117: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,774 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {359715#true} {359715#true} #2963#return; {359715#true} is VALID [2018-11-19 18:40:41,774 INFO L273 TraceCheckUtils]: 119: Hoare triple {359715#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {359715#true} is VALID [2018-11-19 18:40:41,774 INFO L256 TraceCheckUtils]: 120: Hoare triple {359715#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {359715#true} is VALID [2018-11-19 18:40:41,774 INFO L273 TraceCheckUtils]: 121: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,775 INFO L273 TraceCheckUtils]: 122: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,775 INFO L273 TraceCheckUtils]: 123: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,775 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {359715#true} {359715#true} #2965#return; {359715#true} is VALID [2018-11-19 18:40:41,775 INFO L273 TraceCheckUtils]: 125: Hoare triple {359715#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {359715#true} is VALID [2018-11-19 18:40:41,775 INFO L256 TraceCheckUtils]: 126: Hoare triple {359715#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {359715#true} is VALID [2018-11-19 18:40:41,775 INFO L273 TraceCheckUtils]: 127: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,775 INFO L273 TraceCheckUtils]: 128: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,775 INFO L273 TraceCheckUtils]: 129: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,776 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {359715#true} {359715#true} #2967#return; {359715#true} is VALID [2018-11-19 18:40:41,776 INFO L273 TraceCheckUtils]: 131: Hoare triple {359715#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {359715#true} is VALID [2018-11-19 18:40:41,776 INFO L256 TraceCheckUtils]: 132: Hoare triple {359715#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {359715#true} is VALID [2018-11-19 18:40:41,776 INFO L273 TraceCheckUtils]: 133: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,776 INFO L273 TraceCheckUtils]: 134: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,776 INFO L273 TraceCheckUtils]: 135: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,776 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {359715#true} {359715#true} #2969#return; {359715#true} is VALID [2018-11-19 18:40:41,776 INFO L273 TraceCheckUtils]: 137: Hoare triple {359715#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {359715#true} is VALID [2018-11-19 18:40:41,776 INFO L256 TraceCheckUtils]: 138: Hoare triple {359715#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {359715#true} is VALID [2018-11-19 18:40:41,777 INFO L273 TraceCheckUtils]: 139: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,777 INFO L273 TraceCheckUtils]: 140: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,777 INFO L273 TraceCheckUtils]: 141: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,777 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {359715#true} {359715#true} #2971#return; {359715#true} is VALID [2018-11-19 18:40:41,777 INFO L273 TraceCheckUtils]: 143: Hoare triple {359715#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {359715#true} is VALID [2018-11-19 18:40:41,777 INFO L256 TraceCheckUtils]: 144: Hoare triple {359715#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {359715#true} is VALID [2018-11-19 18:40:41,777 INFO L273 TraceCheckUtils]: 145: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,777 INFO L273 TraceCheckUtils]: 146: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,777 INFO L273 TraceCheckUtils]: 147: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,778 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {359715#true} {359715#true} #2973#return; {359715#true} is VALID [2018-11-19 18:40:41,778 INFO L273 TraceCheckUtils]: 149: Hoare triple {359715#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {359715#true} is VALID [2018-11-19 18:40:41,778 INFO L256 TraceCheckUtils]: 150: Hoare triple {359715#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {359715#true} is VALID [2018-11-19 18:40:41,778 INFO L273 TraceCheckUtils]: 151: Hoare triple {359715#true} #t~loopctr974 := 0; {359715#true} is VALID [2018-11-19 18:40:41,778 INFO L273 TraceCheckUtils]: 152: Hoare triple {359715#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {359715#true} is VALID [2018-11-19 18:40:41,778 INFO L273 TraceCheckUtils]: 153: Hoare triple {359715#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {359715#true} is VALID [2018-11-19 18:40:41,778 INFO L273 TraceCheckUtils]: 154: Hoare triple {359715#true} assume !(#t~loopctr974 < #amount); {359715#true} is VALID [2018-11-19 18:40:41,778 INFO L273 TraceCheckUtils]: 155: Hoare triple {359715#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {359715#true} is VALID [2018-11-19 18:40:41,779 INFO L268 TraceCheckUtils]: 156: Hoare quadruple {359715#true} {359715#true} #2975#return; {359715#true} is VALID [2018-11-19 18:40:41,779 INFO L273 TraceCheckUtils]: 157: Hoare triple {359715#true} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {359715#true} is VALID [2018-11-19 18:40:41,779 INFO L273 TraceCheckUtils]: 158: Hoare triple {359715#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,779 INFO L273 TraceCheckUtils]: 159: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,779 INFO L273 TraceCheckUtils]: 160: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,779 INFO L273 TraceCheckUtils]: 161: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,779 INFO L273 TraceCheckUtils]: 162: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,779 INFO L273 TraceCheckUtils]: 163: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,779 INFO L273 TraceCheckUtils]: 164: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,780 INFO L273 TraceCheckUtils]: 165: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,780 INFO L273 TraceCheckUtils]: 166: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,780 INFO L273 TraceCheckUtils]: 167: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,780 INFO L273 TraceCheckUtils]: 168: Hoare triple {359715#true} assume #t~switch909; {359715#true} is VALID [2018-11-19 18:40:41,780 INFO L273 TraceCheckUtils]: 169: Hoare triple {359715#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {359715#true} is VALID [2018-11-19 18:40:41,780 INFO L273 TraceCheckUtils]: 170: Hoare triple {359715#true} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {359715#true} is VALID [2018-11-19 18:40:41,780 INFO L273 TraceCheckUtils]: 171: Hoare triple {359715#true} assume #t~switch947; {359715#true} is VALID [2018-11-19 18:40:41,780 INFO L273 TraceCheckUtils]: 172: Hoare triple {359715#true} assume 1 == ~ldv_state_variable_0~0; {359715#true} is VALID [2018-11-19 18:40:41,780 INFO L256 TraceCheckUtils]: 173: Hoare triple {359715#true} call #t~ret948 := ims_pcu_driver_init(); {359715#true} is VALID [2018-11-19 18:40:41,781 INFO L273 TraceCheckUtils]: 174: Hoare triple {359715#true} havoc ~tmp~46; {359715#true} is VALID [2018-11-19 18:40:41,781 INFO L256 TraceCheckUtils]: 175: Hoare triple {359715#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {359715#true} is VALID [2018-11-19 18:40:41,781 INFO L273 TraceCheckUtils]: 176: Hoare triple {359715#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {359715#true} is VALID [2018-11-19 18:40:41,781 INFO L256 TraceCheckUtils]: 177: Hoare triple {359715#true} call ldv_usb_driver_1(); {359715#true} is VALID [2018-11-19 18:40:41,781 INFO L273 TraceCheckUtils]: 178: Hoare triple {359715#true} havoc ~tmp~53.base, ~tmp~53.offset; {359715#true} is VALID [2018-11-19 18:40:41,781 INFO L256 TraceCheckUtils]: 179: Hoare triple {359715#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {359715#true} is VALID [2018-11-19 18:40:41,781 INFO L273 TraceCheckUtils]: 180: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,781 INFO L273 TraceCheckUtils]: 181: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,782 INFO L273 TraceCheckUtils]: 182: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,782 INFO L268 TraceCheckUtils]: 183: Hoare quadruple {359715#true} {359715#true} #2613#return; {359715#true} is VALID [2018-11-19 18:40:41,782 INFO L273 TraceCheckUtils]: 184: Hoare triple {359715#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {359715#true} is VALID [2018-11-19 18:40:41,782 INFO L273 TraceCheckUtils]: 185: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,782 INFO L268 TraceCheckUtils]: 186: Hoare quadruple {359715#true} {359715#true} #2537#return; {359715#true} is VALID [2018-11-19 18:40:41,782 INFO L273 TraceCheckUtils]: 187: Hoare triple {359715#true} #res := ~ldv_func_res~0; {359715#true} is VALID [2018-11-19 18:40:41,782 INFO L273 TraceCheckUtils]: 188: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,782 INFO L268 TraceCheckUtils]: 189: Hoare quadruple {359715#true} {359715#true} #2777#return; {359715#true} is VALID [2018-11-19 18:40:41,782 INFO L273 TraceCheckUtils]: 190: Hoare triple {359715#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {359715#true} is VALID [2018-11-19 18:40:41,783 INFO L273 TraceCheckUtils]: 191: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,783 INFO L268 TraceCheckUtils]: 192: Hoare quadruple {359715#true} {359715#true} #3035#return; {359715#true} is VALID [2018-11-19 18:40:41,783 INFO L273 TraceCheckUtils]: 193: Hoare triple {359715#true} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {359715#true} is VALID [2018-11-19 18:40:41,783 INFO L273 TraceCheckUtils]: 194: Hoare triple {359715#true} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_10~0 := 1; {359715#true} is VALID [2018-11-19 18:40:41,783 INFO L256 TraceCheckUtils]: 195: Hoare triple {359715#true} call ldv_initialize_ims_pcu_attribute_10(); {359715#true} is VALID [2018-11-19 18:40:41,783 INFO L273 TraceCheckUtils]: 196: Hoare triple {359715#true} havoc ~tmp~47.base, ~tmp~47.offset;havoc ~tmp___0~19.base, ~tmp___0~19.offset; {359715#true} is VALID [2018-11-19 18:40:41,783 INFO L256 TraceCheckUtils]: 197: Hoare triple {359715#true} call #t~ret861.base, #t~ret861.offset := ldv_zalloc(1376); {359715#true} is VALID [2018-11-19 18:40:41,783 INFO L273 TraceCheckUtils]: 198: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,783 INFO L273 TraceCheckUtils]: 199: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,784 INFO L273 TraceCheckUtils]: 200: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,784 INFO L268 TraceCheckUtils]: 201: Hoare quadruple {359715#true} {359715#true} #2807#return; {359715#true} is VALID [2018-11-19 18:40:41,784 INFO L273 TraceCheckUtils]: 202: Hoare triple {359715#true} ~tmp~47.base, ~tmp~47.offset := #t~ret861.base, #t~ret861.offset;havoc #t~ret861.base, #t~ret861.offset;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := ~tmp~47.base, ~tmp~47.offset; {359715#true} is VALID [2018-11-19 18:40:41,784 INFO L256 TraceCheckUtils]: 203: Hoare triple {359715#true} call #t~ret862.base, #t~ret862.offset := ldv_zalloc(48); {359715#true} is VALID [2018-11-19 18:40:41,784 INFO L273 TraceCheckUtils]: 204: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,784 INFO L273 TraceCheckUtils]: 205: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,784 INFO L273 TraceCheckUtils]: 206: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,784 INFO L268 TraceCheckUtils]: 207: Hoare quadruple {359715#true} {359715#true} #2809#return; {359715#true} is VALID [2018-11-19 18:40:41,785 INFO L273 TraceCheckUtils]: 208: Hoare triple {359715#true} ~tmp___0~19.base, ~tmp___0~19.offset := #t~ret862.base, #t~ret862.offset;havoc #t~ret862.base, #t~ret862.offset;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := ~tmp___0~19.base, ~tmp___0~19.offset; {359715#true} is VALID [2018-11-19 18:40:41,785 INFO L273 TraceCheckUtils]: 209: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,785 INFO L268 TraceCheckUtils]: 210: Hoare quadruple {359715#true} {359715#true} #3037#return; {359715#true} is VALID [2018-11-19 18:40:41,785 INFO L273 TraceCheckUtils]: 211: Hoare triple {359715#true} ~ldv_state_variable_4~0 := 1;~ldv_state_variable_8~0 := 1; {359715#true} is VALID [2018-11-19 18:40:41,785 INFO L256 TraceCheckUtils]: 212: Hoare triple {359715#true} call ldv_initialize_ims_pcu_attribute_8(); {359715#true} is VALID [2018-11-19 18:40:41,785 INFO L273 TraceCheckUtils]: 213: Hoare triple {359715#true} havoc ~tmp~51.base, ~tmp~51.offset;havoc ~tmp___0~23.base, ~tmp___0~23.offset; {359715#true} is VALID [2018-11-19 18:40:41,785 INFO L256 TraceCheckUtils]: 214: Hoare triple {359715#true} call #t~ret869.base, #t~ret869.offset := ldv_zalloc(1376); {359715#true} is VALID [2018-11-19 18:40:41,785 INFO L273 TraceCheckUtils]: 215: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,785 INFO L273 TraceCheckUtils]: 216: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,786 INFO L273 TraceCheckUtils]: 217: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,786 INFO L268 TraceCheckUtils]: 218: Hoare quadruple {359715#true} {359715#true} #2631#return; {359715#true} is VALID [2018-11-19 18:40:41,786 INFO L273 TraceCheckUtils]: 219: Hoare triple {359715#true} ~tmp~51.base, ~tmp~51.offset := #t~ret869.base, #t~ret869.offset;havoc #t~ret869.base, #t~ret869.offset;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := ~tmp~51.base, ~tmp~51.offset; {359715#true} is VALID [2018-11-19 18:40:41,786 INFO L256 TraceCheckUtils]: 220: Hoare triple {359715#true} call #t~ret870.base, #t~ret870.offset := ldv_zalloc(48); {359715#true} is VALID [2018-11-19 18:40:41,786 INFO L273 TraceCheckUtils]: 221: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,786 INFO L273 TraceCheckUtils]: 222: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,786 INFO L273 TraceCheckUtils]: 223: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,786 INFO L268 TraceCheckUtils]: 224: Hoare quadruple {359715#true} {359715#true} #2633#return; {359715#true} is VALID [2018-11-19 18:40:41,786 INFO L273 TraceCheckUtils]: 225: Hoare triple {359715#true} ~tmp___0~23.base, ~tmp___0~23.offset := #t~ret870.base, #t~ret870.offset;havoc #t~ret870.base, #t~ret870.offset;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := ~tmp___0~23.base, ~tmp___0~23.offset; {359715#true} is VALID [2018-11-19 18:40:41,787 INFO L273 TraceCheckUtils]: 226: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,787 INFO L268 TraceCheckUtils]: 227: Hoare quadruple {359715#true} {359715#true} #3039#return; {359715#true} is VALID [2018-11-19 18:40:41,787 INFO L273 TraceCheckUtils]: 228: Hoare triple {359715#true} ~ldv_state_variable_2~0 := 1;~ldv_state_variable_9~0 := 1; {359715#true} is VALID [2018-11-19 18:40:41,787 INFO L256 TraceCheckUtils]: 229: Hoare triple {359715#true} call ldv_initialize_ims_pcu_attribute_9(); {359715#true} is VALID [2018-11-19 18:40:41,787 INFO L273 TraceCheckUtils]: 230: Hoare triple {359715#true} havoc ~tmp~49.base, ~tmp~49.offset;havoc ~tmp___0~21.base, ~tmp___0~21.offset; {359715#true} is VALID [2018-11-19 18:40:41,787 INFO L256 TraceCheckUtils]: 231: Hoare triple {359715#true} call #t~ret865.base, #t~ret865.offset := ldv_zalloc(1376); {359715#true} is VALID [2018-11-19 18:40:41,787 INFO L273 TraceCheckUtils]: 232: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,788 INFO L273 TraceCheckUtils]: 233: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,788 INFO L273 TraceCheckUtils]: 234: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,788 INFO L268 TraceCheckUtils]: 235: Hoare quadruple {359715#true} {359715#true} #2627#return; {359715#true} is VALID [2018-11-19 18:40:41,788 INFO L273 TraceCheckUtils]: 236: Hoare triple {359715#true} ~tmp~49.base, ~tmp~49.offset := #t~ret865.base, #t~ret865.offset;havoc #t~ret865.base, #t~ret865.offset;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := ~tmp~49.base, ~tmp~49.offset; {359715#true} is VALID [2018-11-19 18:40:41,788 INFO L256 TraceCheckUtils]: 237: Hoare triple {359715#true} call #t~ret866.base, #t~ret866.offset := ldv_zalloc(48); {359715#true} is VALID [2018-11-19 18:40:41,788 INFO L273 TraceCheckUtils]: 238: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,788 INFO L273 TraceCheckUtils]: 239: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,789 INFO L273 TraceCheckUtils]: 240: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,789 INFO L268 TraceCheckUtils]: 241: Hoare quadruple {359715#true} {359715#true} #2629#return; {359715#true} is VALID [2018-11-19 18:40:41,789 INFO L273 TraceCheckUtils]: 242: Hoare triple {359715#true} ~tmp___0~21.base, ~tmp___0~21.offset := #t~ret866.base, #t~ret866.offset;havoc #t~ret866.base, #t~ret866.offset;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := ~tmp___0~21.base, ~tmp___0~21.offset; {359715#true} is VALID [2018-11-19 18:40:41,789 INFO L273 TraceCheckUtils]: 243: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,789 INFO L268 TraceCheckUtils]: 244: Hoare quadruple {359715#true} {359715#true} #3041#return; {359715#true} is VALID [2018-11-19 18:40:41,789 INFO L273 TraceCheckUtils]: 245: Hoare triple {359715#true} ~ldv_state_variable_7~0 := 1; {359715#true} is VALID [2018-11-19 18:40:41,789 INFO L256 TraceCheckUtils]: 246: Hoare triple {359715#true} call ldv_initialize_ims_pcu_attribute_7(); {359715#true} is VALID [2018-11-19 18:40:41,789 INFO L273 TraceCheckUtils]: 247: Hoare triple {359715#true} havoc ~tmp~52.base, ~tmp~52.offset;havoc ~tmp___0~24.base, ~tmp___0~24.offset; {359715#true} is VALID [2018-11-19 18:40:41,789 INFO L256 TraceCheckUtils]: 248: Hoare triple {359715#true} call #t~ret871.base, #t~ret871.offset := ldv_zalloc(1376); {359715#true} is VALID [2018-11-19 18:40:41,790 INFO L273 TraceCheckUtils]: 249: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,790 INFO L273 TraceCheckUtils]: 250: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,790 INFO L273 TraceCheckUtils]: 251: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,790 INFO L268 TraceCheckUtils]: 252: Hoare quadruple {359715#true} {359715#true} #2619#return; {359715#true} is VALID [2018-11-19 18:40:41,790 INFO L273 TraceCheckUtils]: 253: Hoare triple {359715#true} ~tmp~52.base, ~tmp~52.offset := #t~ret871.base, #t~ret871.offset;havoc #t~ret871.base, #t~ret871.offset;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := ~tmp~52.base, ~tmp~52.offset; {359715#true} is VALID [2018-11-19 18:40:41,790 INFO L256 TraceCheckUtils]: 254: Hoare triple {359715#true} call #t~ret872.base, #t~ret872.offset := ldv_zalloc(48); {359715#true} is VALID [2018-11-19 18:40:41,790 INFO L273 TraceCheckUtils]: 255: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,790 INFO L273 TraceCheckUtils]: 256: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,791 INFO L273 TraceCheckUtils]: 257: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,791 INFO L268 TraceCheckUtils]: 258: Hoare quadruple {359715#true} {359715#true} #2621#return; {359715#true} is VALID [2018-11-19 18:40:41,791 INFO L273 TraceCheckUtils]: 259: Hoare triple {359715#true} ~tmp___0~24.base, ~tmp___0~24.offset := #t~ret872.base, #t~ret872.offset;havoc #t~ret872.base, #t~ret872.offset;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := ~tmp___0~24.base, ~tmp___0~24.offset; {359715#true} is VALID [2018-11-19 18:40:41,791 INFO L273 TraceCheckUtils]: 260: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,791 INFO L268 TraceCheckUtils]: 261: Hoare quadruple {359715#true} {359715#true} #3043#return; {359715#true} is VALID [2018-11-19 18:40:41,791 INFO L273 TraceCheckUtils]: 262: Hoare triple {359715#true} ~ldv_state_variable_3~0 := 1;~ldv_state_variable_11~0 := 1; {359715#true} is VALID [2018-11-19 18:40:41,791 INFO L256 TraceCheckUtils]: 263: Hoare triple {359715#true} call ldv_initialize_ims_pcu_attribute_11(); {359715#true} is VALID [2018-11-19 18:40:41,791 INFO L273 TraceCheckUtils]: 264: Hoare triple {359715#true} havoc ~tmp~50.base, ~tmp~50.offset;havoc ~tmp___0~22.base, ~tmp___0~22.offset; {359715#true} is VALID [2018-11-19 18:40:41,791 INFO L256 TraceCheckUtils]: 265: Hoare triple {359715#true} call #t~ret867.base, #t~ret867.offset := ldv_zalloc(1376); {359715#true} is VALID [2018-11-19 18:40:41,792 INFO L273 TraceCheckUtils]: 266: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,792 INFO L273 TraceCheckUtils]: 267: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,792 INFO L273 TraceCheckUtils]: 268: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,792 INFO L268 TraceCheckUtils]: 269: Hoare quadruple {359715#true} {359715#true} #2811#return; {359715#true} is VALID [2018-11-19 18:40:41,792 INFO L273 TraceCheckUtils]: 270: Hoare triple {359715#true} ~tmp~50.base, ~tmp~50.offset := #t~ret867.base, #t~ret867.offset;havoc #t~ret867.base, #t~ret867.offset;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := ~tmp~50.base, ~tmp~50.offset; {359715#true} is VALID [2018-11-19 18:40:41,792 INFO L256 TraceCheckUtils]: 271: Hoare triple {359715#true} call #t~ret868.base, #t~ret868.offset := ldv_zalloc(48); {359715#true} is VALID [2018-11-19 18:40:41,792 INFO L273 TraceCheckUtils]: 272: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,792 INFO L273 TraceCheckUtils]: 273: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,793 INFO L273 TraceCheckUtils]: 274: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,793 INFO L268 TraceCheckUtils]: 275: Hoare quadruple {359715#true} {359715#true} #2813#return; {359715#true} is VALID [2018-11-19 18:40:41,793 INFO L273 TraceCheckUtils]: 276: Hoare triple {359715#true} ~tmp___0~22.base, ~tmp___0~22.offset := #t~ret868.base, #t~ret868.offset;havoc #t~ret868.base, #t~ret868.offset;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := ~tmp___0~22.base, ~tmp___0~22.offset; {359715#true} is VALID [2018-11-19 18:40:41,793 INFO L273 TraceCheckUtils]: 277: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,793 INFO L268 TraceCheckUtils]: 278: Hoare quadruple {359715#true} {359715#true} #3045#return; {359715#true} is VALID [2018-11-19 18:40:41,793 INFO L273 TraceCheckUtils]: 279: Hoare triple {359715#true} ~ldv_state_variable_6~0 := 1; {359715#true} is VALID [2018-11-19 18:40:41,793 INFO L256 TraceCheckUtils]: 280: Hoare triple {359715#true} call ldv_initialize_ims_pcu_attribute_6(); {359715#true} is VALID [2018-11-19 18:40:41,793 INFO L273 TraceCheckUtils]: 281: Hoare triple {359715#true} havoc ~tmp~48.base, ~tmp~48.offset;havoc ~tmp___0~20.base, ~tmp___0~20.offset; {359715#true} is VALID [2018-11-19 18:40:41,793 INFO L256 TraceCheckUtils]: 282: Hoare triple {359715#true} call #t~ret863.base, #t~ret863.offset := ldv_zalloc(1376); {359715#true} is VALID [2018-11-19 18:40:41,794 INFO L273 TraceCheckUtils]: 283: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,794 INFO L273 TraceCheckUtils]: 284: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,794 INFO L273 TraceCheckUtils]: 285: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,794 INFO L268 TraceCheckUtils]: 286: Hoare quadruple {359715#true} {359715#true} #2623#return; {359715#true} is VALID [2018-11-19 18:40:41,794 INFO L273 TraceCheckUtils]: 287: Hoare triple {359715#true} ~tmp~48.base, ~tmp~48.offset := #t~ret863.base, #t~ret863.offset;havoc #t~ret863.base, #t~ret863.offset;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := ~tmp~48.base, ~tmp~48.offset; {359715#true} is VALID [2018-11-19 18:40:41,794 INFO L256 TraceCheckUtils]: 288: Hoare triple {359715#true} call #t~ret864.base, #t~ret864.offset := ldv_zalloc(48); {359715#true} is VALID [2018-11-19 18:40:41,794 INFO L273 TraceCheckUtils]: 289: Hoare triple {359715#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {359715#true} is VALID [2018-11-19 18:40:41,794 INFO L273 TraceCheckUtils]: 290: Hoare triple {359715#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {359715#true} is VALID [2018-11-19 18:40:41,794 INFO L273 TraceCheckUtils]: 291: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,795 INFO L268 TraceCheckUtils]: 292: Hoare quadruple {359715#true} {359715#true} #2625#return; {359715#true} is VALID [2018-11-19 18:40:41,795 INFO L273 TraceCheckUtils]: 293: Hoare triple {359715#true} ~tmp___0~20.base, ~tmp___0~20.offset := #t~ret864.base, #t~ret864.offset;havoc #t~ret864.base, #t~ret864.offset;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := ~tmp___0~20.base, ~tmp___0~20.offset; {359715#true} is VALID [2018-11-19 18:40:41,795 INFO L273 TraceCheckUtils]: 294: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,795 INFO L268 TraceCheckUtils]: 295: Hoare quadruple {359715#true} {359715#true} #3047#return; {359715#true} is VALID [2018-11-19 18:40:41,795 INFO L273 TraceCheckUtils]: 296: Hoare triple {359715#true} assume !(0 != ~ldv_retval_4~0); {359715#true} is VALID [2018-11-19 18:40:41,795 INFO L273 TraceCheckUtils]: 297: Hoare triple {359715#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,795 INFO L273 TraceCheckUtils]: 298: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,795 INFO L273 TraceCheckUtils]: 299: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,796 INFO L273 TraceCheckUtils]: 300: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,796 INFO L273 TraceCheckUtils]: 301: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,796 INFO L273 TraceCheckUtils]: 302: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,796 INFO L273 TraceCheckUtils]: 303: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,796 INFO L273 TraceCheckUtils]: 304: Hoare triple {359715#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {359715#true} is VALID [2018-11-19 18:40:41,796 INFO L273 TraceCheckUtils]: 305: Hoare triple {359715#true} assume #t~switch909; {359715#true} is VALID [2018-11-19 18:40:41,796 INFO L273 TraceCheckUtils]: 306: Hoare triple {359715#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {359715#true} is VALID [2018-11-19 18:40:41,796 INFO L273 TraceCheckUtils]: 307: Hoare triple {359715#true} assume #t~switch937; {359715#true} is VALID [2018-11-19 18:40:41,796 INFO L273 TraceCheckUtils]: 308: Hoare triple {359715#true} assume 1 == ~ldv_state_variable_1~0; {359715#true} is VALID [2018-11-19 18:40:41,797 INFO L256 TraceCheckUtils]: 309: Hoare triple {359715#true} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {359715#true} is VALID [2018-11-19 18:40:41,797 INFO L273 TraceCheckUtils]: 310: Hoare triple {359715#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {359715#true} is VALID [2018-11-19 18:40:41,797 INFO L256 TraceCheckUtils]: 311: Hoare triple {359715#true} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {359715#true} is VALID [2018-11-19 18:40:41,797 INFO L273 TraceCheckUtils]: 312: Hoare triple {359715#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {359715#true} is VALID [2018-11-19 18:40:41,797 INFO L256 TraceCheckUtils]: 313: Hoare triple {359715#true} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {359715#true} is VALID [2018-11-19 18:40:41,797 INFO L273 TraceCheckUtils]: 314: Hoare triple {359715#true} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {359715#true} is VALID [2018-11-19 18:40:41,797 INFO L256 TraceCheckUtils]: 315: Hoare triple {359715#true} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {359715#true} is VALID [2018-11-19 18:40:41,797 INFO L273 TraceCheckUtils]: 316: Hoare triple {359715#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {359715#true} is VALID [2018-11-19 18:40:41,797 INFO L273 TraceCheckUtils]: 317: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,798 INFO L268 TraceCheckUtils]: 318: Hoare quadruple {359715#true} {359715#true} #2817#return; {359715#true} is VALID [2018-11-19 18:40:41,798 INFO L273 TraceCheckUtils]: 319: Hoare triple {359715#true} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {359715#true} is VALID [2018-11-19 18:40:41,798 INFO L273 TraceCheckUtils]: 320: Hoare triple {359715#true} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {359715#true} is VALID [2018-11-19 18:40:41,798 INFO L273 TraceCheckUtils]: 321: Hoare triple {359715#true} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {359715#true} is VALID [2018-11-19 18:40:41,798 INFO L273 TraceCheckUtils]: 322: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,798 INFO L268 TraceCheckUtils]: 323: Hoare quadruple {359715#true} {359715#true} #3151#return; {359715#true} is VALID [2018-11-19 18:40:41,798 INFO L273 TraceCheckUtils]: 324: Hoare triple {359715#true} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {359715#true} is VALID [2018-11-19 18:40:41,798 INFO L273 TraceCheckUtils]: 325: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,798 INFO L268 TraceCheckUtils]: 326: Hoare quadruple {359715#true} {359715#true} #3095#return; {359715#true} is VALID [2018-11-19 18:40:41,799 INFO L273 TraceCheckUtils]: 327: Hoare triple {359715#true} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {359715#true} is VALID [2018-11-19 18:40:41,799 INFO L256 TraceCheckUtils]: 328: Hoare triple {359715#true} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {359715#true} is VALID [2018-11-19 18:40:41,799 INFO L273 TraceCheckUtils]: 329: Hoare triple {359715#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {359715#true} is VALID [2018-11-19 18:40:41,799 INFO L256 TraceCheckUtils]: 330: Hoare triple {359715#true} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {359715#true} is VALID [2018-11-19 18:40:41,799 INFO L273 TraceCheckUtils]: 331: Hoare triple {359715#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {359715#true} is VALID [2018-11-19 18:40:41,799 INFO L256 TraceCheckUtils]: 332: Hoare triple {359715#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {359715#true} is VALID [2018-11-19 18:40:41,799 INFO L273 TraceCheckUtils]: 333: Hoare triple {359715#true} ~size := #in~size;~t := #in~t; {359715#true} is VALID [2018-11-19 18:40:41,799 INFO L256 TraceCheckUtils]: 334: Hoare triple {359715#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {359715#true} is VALID [2018-11-19 18:40:41,800 INFO L273 TraceCheckUtils]: 335: Hoare triple {359715#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {359715#true} is VALID [2018-11-19 18:40:41,800 INFO L273 TraceCheckUtils]: 336: Hoare triple {359715#true} assume !(0 != ~tmp___0~2);call #t~malloc130.base, #t~malloc130.offset := #Ultimate.alloc(~size);~tmp~8.base, ~tmp~8.offset := #t~malloc130.base, #t~malloc130.offset;~p~0.base, ~p~0.offset := ~tmp~8.base, ~tmp~8.offset;assume 0 != (if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~0.base, ~p~0.offset; {359715#true} is VALID [2018-11-19 18:40:41,800 INFO L273 TraceCheckUtils]: 337: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,800 INFO L268 TraceCheckUtils]: 338: Hoare quadruple {359715#true} {359715#true} #2691#return; {359715#true} is VALID [2018-11-19 18:40:41,800 INFO L273 TraceCheckUtils]: 339: Hoare triple {359715#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {359715#true} is VALID [2018-11-19 18:40:41,800 INFO L273 TraceCheckUtils]: 340: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,800 INFO L268 TraceCheckUtils]: 341: Hoare quadruple {359715#true} {359715#true} #2781#return; {359715#true} is VALID [2018-11-19 18:40:41,800 INFO L273 TraceCheckUtils]: 342: Hoare triple {359715#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {359715#true} is VALID [2018-11-19 18:40:41,800 INFO L273 TraceCheckUtils]: 343: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,801 INFO L268 TraceCheckUtils]: 344: Hoare quadruple {359715#true} {359715#true} #2779#return; {359715#true} is VALID [2018-11-19 18:40:41,801 INFO L273 TraceCheckUtils]: 345: Hoare triple {359715#true} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {359715#true} is VALID [2018-11-19 18:40:41,801 INFO L273 TraceCheckUtils]: 346: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,801 INFO L268 TraceCheckUtils]: 347: Hoare quadruple {359715#true} {359715#true} #3097#return; {359715#true} is VALID [2018-11-19 18:40:41,801 INFO L273 TraceCheckUtils]: 348: Hoare triple {359715#true} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {359715#true} is VALID [2018-11-19 18:40:41,801 INFO L273 TraceCheckUtils]: 349: Hoare triple {359715#true} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {359715#true} is VALID [2018-11-19 18:40:41,801 INFO L256 TraceCheckUtils]: 350: Hoare triple {359715#true} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {359715#true} is VALID [2018-11-19 18:40:41,801 INFO L273 TraceCheckUtils]: 351: Hoare triple {359715#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {359715#true} is VALID [2018-11-19 18:40:41,801 INFO L273 TraceCheckUtils]: 352: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,802 INFO L268 TraceCheckUtils]: 353: Hoare quadruple {359715#true} {359715#true} #3099#return; {359715#true} is VALID [2018-11-19 18:40:41,802 INFO L256 TraceCheckUtils]: 354: Hoare triple {359715#true} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {359715#true} is VALID [2018-11-19 18:40:41,802 INFO L273 TraceCheckUtils]: 355: Hoare triple {359715#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {359715#true} is VALID [2018-11-19 18:40:41,802 INFO L273 TraceCheckUtils]: 356: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,802 INFO L268 TraceCheckUtils]: 357: Hoare quadruple {359715#true} {359715#true} #3101#return; {359715#true} is VALID [2018-11-19 18:40:41,802 INFO L256 TraceCheckUtils]: 358: Hoare triple {359715#true} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {359715#true} is VALID [2018-11-19 18:40:41,802 INFO L273 TraceCheckUtils]: 359: Hoare triple {359715#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {359715#true} is VALID [2018-11-19 18:40:41,802 INFO L256 TraceCheckUtils]: 360: Hoare triple {359715#true} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {359715#true} is VALID [2018-11-19 18:40:41,803 INFO L273 TraceCheckUtils]: 361: Hoare triple {359715#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {359715#true} is VALID [2018-11-19 18:40:41,803 INFO L273 TraceCheckUtils]: 362: Hoare triple {359715#true} assume !(0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616); {359715#true} is VALID [2018-11-19 18:40:41,803 INFO L273 TraceCheckUtils]: 363: Hoare triple {359715#true} assume !(0 == ~buflen~0 % 4294967296 % 18446744073709551616); {359715#true} is VALID [2018-11-19 18:40:41,803 INFO L273 TraceCheckUtils]: 364: Hoare triple {359715#true} assume 0 != ~buflen~0 % 4294967296 % 18446744073709551616; {359715#true} is VALID [2018-11-19 18:40:41,803 INFO L273 TraceCheckUtils]: 365: Hoare triple {359715#true} ~union_desc~0.base, ~union_desc~0.offset := ~buf~0.base, ~buf~0.offset;call #t~mem642 := read~int(~union_desc~0.base, 1 + ~union_desc~0.offset, 1);#t~short644 := 36 == #t~mem642 % 256 % 4294967296; {359715#true} is VALID [2018-11-19 18:40:41,803 INFO L273 TraceCheckUtils]: 366: Hoare triple {359715#true} assume #t~short644;call #t~mem643 := read~int(~union_desc~0.base, 2 + ~union_desc~0.offset, 1);#t~short644 := 6 == #t~mem643 % 256 % 4294967296; {359715#true} is VALID [2018-11-19 18:40:41,803 INFO L273 TraceCheckUtils]: 367: Hoare triple {359715#true} assume #t~short644;havoc #t~mem643;havoc #t~mem642;havoc #t~short644;call write~$Pointer$(#t~string645.base, #t~string645.offset, ~#descriptor~3.base, ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string646.base, #t~string646.offset, ~#descriptor~3.base, 8 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string647.base, #t~string647.offset, ~#descriptor~3.base, 16 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string648.base, #t~string648.offset, ~#descriptor~3.base, 24 + ~#descriptor~3.offset, 8);call write~int(1479, ~#descriptor~3.base, 32 + ~#descriptor~3.offset, 4);call write~int(0, ~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1);call #t~mem649 := read~int(~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1); {359715#true} is VALID [2018-11-19 18:40:41,803 INFO L256 TraceCheckUtils]: 368: Hoare triple {359715#true} call #t~ret650 := ldv__builtin_expect(~bitwiseAnd(#t~mem649 % 256, 1), 0); {359715#true} is VALID [2018-11-19 18:40:41,804 INFO L273 TraceCheckUtils]: 369: Hoare triple {359715#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {359715#true} is VALID [2018-11-19 18:40:41,804 INFO L273 TraceCheckUtils]: 370: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,804 INFO L268 TraceCheckUtils]: 371: Hoare quadruple {359715#true} {359715#true} #3075#return; {359715#true} is VALID [2018-11-19 18:40:41,804 INFO L273 TraceCheckUtils]: 372: Hoare triple {359715#true} assume -9223372036854775808 <= #t~ret650 && #t~ret650 <= 9223372036854775807;~tmp~36 := #t~ret650;havoc #t~ret650;havoc #t~mem649; {359715#true} is VALID [2018-11-19 18:40:41,804 INFO L273 TraceCheckUtils]: 373: Hoare triple {359715#true} assume !(0 != ~tmp~36); {359715#true} is VALID [2018-11-19 18:40:41,804 INFO L273 TraceCheckUtils]: 374: Hoare triple {359715#true} #res.base, #res.offset := ~union_desc~0.base, ~union_desc~0.offset;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {359715#true} is VALID [2018-11-19 18:40:41,804 INFO L273 TraceCheckUtils]: 375: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,804 INFO L268 TraceCheckUtils]: 376: Hoare quadruple {359715#true} {359715#true} #3137#return; {359715#true} is VALID [2018-11-19 18:40:41,804 INFO L273 TraceCheckUtils]: 377: Hoare triple {359715#true} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {359715#true} is VALID [2018-11-19 18:40:41,805 INFO L273 TraceCheckUtils]: 378: Hoare triple {359715#true} assume !(0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616);call #t~mem658.base, #t~mem658.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem659 := read~int(~union_desc~1.base, 3 + ~union_desc~1.offset, 1);call #t~ret660.base, #t~ret660.offset := usb_ifnum_to_if(#t~mem658.base, #t~mem658.offset, #t~mem659 % 256);call write~$Pointer$(#t~ret660.base, #t~ret660.offset, ~pcu.base, 79 + ~pcu.offset, 8);havoc #t~mem659;havoc #t~ret660.base, #t~ret660.offset;havoc #t~mem658.base, #t~mem658.offset;call #t~mem661.base, #t~mem661.offset := read~$Pointer$(~pcu.base, 79 + ~pcu.offset, 8);call #t~mem662.base, #t~mem662.offset := read~$Pointer$(#t~mem661.base, 8 + #t~mem661.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem662.base, #t~mem662.offset;havoc #t~mem662.base, #t~mem662.offset;havoc #t~mem661.base, #t~mem661.offset;call #t~mem663.base, #t~mem663.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem663.base, #t~mem663.offset, ~pcu.base, 87 + ~pcu.offset, 8);havoc #t~mem663.base, #t~mem663.offset;call #t~mem664.base, #t~mem664.offset := read~$Pointer$(~pcu.base, 87 + ~pcu.offset, 8); {359715#true} is VALID [2018-11-19 18:40:41,805 INFO L256 TraceCheckUtils]: 379: Hoare triple {359715#true} call #t~ret665 := usb_endpoint_maxp(#t~mem664.base, #t~mem664.offset); {359715#true} is VALID [2018-11-19 18:40:41,805 INFO L273 TraceCheckUtils]: 380: Hoare triple {359715#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {359715#true} is VALID [2018-11-19 18:40:41,805 INFO L273 TraceCheckUtils]: 381: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,805 INFO L268 TraceCheckUtils]: 382: Hoare quadruple {359715#true} {359715#true} #3139#return; {359715#true} is VALID [2018-11-19 18:40:41,805 INFO L273 TraceCheckUtils]: 383: Hoare triple {359715#true} assume -2147483648 <= #t~ret665 && #t~ret665 <= 2147483647;~tmp~37 := #t~ret665;havoc #t~ret665;havoc #t~mem664.base, #t~mem664.offset;call write~int(~tmp~37, ~pcu.base, 119 + ~pcu.offset, 4);call #t~mem666.base, #t~mem666.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem667 := read~int(~union_desc~1.base, 4 + ~union_desc~1.offset, 1);call #t~ret668.base, #t~ret668.offset := usb_ifnum_to_if(#t~mem666.base, #t~mem666.offset, #t~mem667 % 256);call write~$Pointer$(#t~ret668.base, #t~ret668.offset, ~pcu.base, 123 + ~pcu.offset, 8);havoc #t~mem666.base, #t~mem666.offset;havoc #t~mem667;havoc #t~ret668.base, #t~ret668.offset;call #t~mem669.base, #t~mem669.offset := read~$Pointer$(~pcu.base, 123 + ~pcu.offset, 8);call #t~mem670.base, #t~mem670.offset := read~$Pointer$(#t~mem669.base, 8 + #t~mem669.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem670.base, #t~mem670.offset;havoc #t~mem670.base, #t~mem670.offset;havoc #t~mem669.base, #t~mem669.offset;call #t~mem671 := read~int(~alt~0.base, 4 + ~alt~0.offset, 1); {359715#true} is VALID [2018-11-19 18:40:41,805 INFO L273 TraceCheckUtils]: 384: Hoare triple {359715#true} assume !(2 != #t~mem671 % 256 % 4294967296);havoc #t~mem671;call #t~mem676.base, #t~mem676.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem676.base, #t~mem676.offset, ~pcu.base, 167 + ~pcu.offset, 8);havoc #t~mem676.base, #t~mem676.offset;call #t~mem677.base, #t~mem677.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {359715#true} is VALID [2018-11-19 18:40:41,805 INFO L256 TraceCheckUtils]: 385: Hoare triple {359715#true} call #t~ret678 := usb_endpoint_is_bulk_out(#t~mem677.base, #t~mem677.offset); {359715#true} is VALID [2018-11-19 18:40:41,806 INFO L273 TraceCheckUtils]: 386: Hoare triple {359715#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~4;havoc ~tmp___0~1;havoc ~tmp___1~1; {359715#true} is VALID [2018-11-19 18:40:41,806 INFO L256 TraceCheckUtils]: 387: Hoare triple {359715#true} call #t~ret25 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {359715#true} is VALID [2018-11-19 18:40:41,806 INFO L273 TraceCheckUtils]: 388: Hoare triple {359715#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {359715#true} is VALID [2018-11-19 18:40:41,806 INFO L273 TraceCheckUtils]: 389: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,806 INFO L268 TraceCheckUtils]: 390: Hoare quadruple {359715#true} {359715#true} #2887#return; {359715#true} is VALID [2018-11-19 18:40:41,806 INFO L273 TraceCheckUtils]: 391: Hoare triple {359715#true} assume -2147483648 <= #t~ret25 && #t~ret25 <= 2147483647;~tmp~4 := #t~ret25;havoc #t~ret25; {359715#true} is VALID [2018-11-19 18:40:41,806 INFO L273 TraceCheckUtils]: 392: Hoare triple {359715#true} assume 0 != ~tmp~4; {359715#true} is VALID [2018-11-19 18:40:41,806 INFO L256 TraceCheckUtils]: 393: Hoare triple {359715#true} call #t~ret26 := usb_endpoint_dir_out(~epd.base, ~epd.offset); {359715#true} is VALID [2018-11-19 18:40:41,806 INFO L273 TraceCheckUtils]: 394: Hoare triple {359715#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem21 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem21 % 256 % 256 <= 127 then #t~mem21 % 256 % 256 else #t~mem21 % 256 % 256 - 256) >= 0 then 1 else 0);havoc #t~mem21; {359715#true} is VALID [2018-11-19 18:40:41,807 INFO L273 TraceCheckUtils]: 395: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,807 INFO L268 TraceCheckUtils]: 396: Hoare quadruple {359715#true} {359715#true} #2889#return; {359715#true} is VALID [2018-11-19 18:40:41,807 INFO L273 TraceCheckUtils]: 397: Hoare triple {359715#true} assume -2147483648 <= #t~ret26 && #t~ret26 <= 2147483647;~tmp___0~1 := #t~ret26;havoc #t~ret26; {359715#true} is VALID [2018-11-19 18:40:41,807 INFO L273 TraceCheckUtils]: 398: Hoare triple {359715#true} assume 0 != ~tmp___0~1;~tmp___1~1 := 1; {359715#true} is VALID [2018-11-19 18:40:41,807 INFO L273 TraceCheckUtils]: 399: Hoare triple {359715#true} #res := ~tmp___1~1; {359715#true} is VALID [2018-11-19 18:40:41,807 INFO L273 TraceCheckUtils]: 400: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,807 INFO L268 TraceCheckUtils]: 401: Hoare quadruple {359715#true} {359715#true} #3141#return; {359715#true} is VALID [2018-11-19 18:40:41,807 INFO L273 TraceCheckUtils]: 402: Hoare triple {359715#true} assume -2147483648 <= #t~ret678 && #t~ret678 <= 2147483647;~tmp___0~16 := #t~ret678;havoc #t~mem677.base, #t~mem677.offset;havoc #t~ret678; {359715#true} is VALID [2018-11-19 18:40:41,807 INFO L273 TraceCheckUtils]: 403: Hoare triple {359715#true} assume !(0 == ~tmp___0~16);call #t~mem682.base, #t~mem682.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {359715#true} is VALID [2018-11-19 18:40:41,808 INFO L256 TraceCheckUtils]: 404: Hoare triple {359715#true} call #t~ret683 := usb_endpoint_maxp(#t~mem682.base, #t~mem682.offset); {359715#true} is VALID [2018-11-19 18:40:41,808 INFO L273 TraceCheckUtils]: 405: Hoare triple {359715#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {359715#true} is VALID [2018-11-19 18:40:41,808 INFO L273 TraceCheckUtils]: 406: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,808 INFO L268 TraceCheckUtils]: 407: Hoare quadruple {359715#true} {359715#true} #3143#return; {359715#true} is VALID [2018-11-19 18:40:41,808 INFO L273 TraceCheckUtils]: 408: Hoare triple {359715#true} assume -2147483648 <= #t~ret683 && #t~ret683 <= 2147483647;~tmp___1~7 := #t~ret683;havoc #t~mem682.base, #t~mem682.offset;havoc #t~ret683;call write~int(~tmp___1~7, ~pcu.base, 183 + ~pcu.offset, 4);call #t~mem684 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {359715#true} is VALID [2018-11-19 18:40:41,808 INFO L273 TraceCheckUtils]: 409: Hoare triple {359715#true} assume !(#t~mem684 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem684;call #t~mem689.base, #t~mem689.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem689.base, 63 + #t~mem689.offset, ~pcu.base, 131 + ~pcu.offset, 8);havoc #t~mem689.base, #t~mem689.offset;call #t~mem690.base, #t~mem690.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {359715#true} is VALID [2018-11-19 18:40:41,808 INFO L256 TraceCheckUtils]: 410: Hoare triple {359715#true} call #t~ret691 := usb_endpoint_is_bulk_in(#t~mem690.base, #t~mem690.offset); {359715#true} is VALID [2018-11-19 18:40:41,808 INFO L273 TraceCheckUtils]: 411: Hoare triple {359715#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~3;havoc ~tmp___0~0;havoc ~tmp___1~0; {359715#true} is VALID [2018-11-19 18:40:41,809 INFO L256 TraceCheckUtils]: 412: Hoare triple {359715#true} call #t~ret23 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {359715#true} is VALID [2018-11-19 18:40:41,809 INFO L273 TraceCheckUtils]: 413: Hoare triple {359715#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {359715#true} is VALID [2018-11-19 18:40:41,809 INFO L273 TraceCheckUtils]: 414: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,809 INFO L268 TraceCheckUtils]: 415: Hoare quadruple {359715#true} {359715#true} #2915#return; {359715#true} is VALID [2018-11-19 18:40:41,809 INFO L273 TraceCheckUtils]: 416: Hoare triple {359715#true} assume -2147483648 <= #t~ret23 && #t~ret23 <= 2147483647;~tmp~3 := #t~ret23;havoc #t~ret23; {359715#true} is VALID [2018-11-19 18:40:41,809 INFO L273 TraceCheckUtils]: 417: Hoare triple {359715#true} assume 0 != ~tmp~3; {359715#true} is VALID [2018-11-19 18:40:41,809 INFO L256 TraceCheckUtils]: 418: Hoare triple {359715#true} call #t~ret24 := usb_endpoint_dir_in(~epd.base, ~epd.offset); {359715#true} is VALID [2018-11-19 18:40:41,809 INFO L273 TraceCheckUtils]: 419: Hoare triple {359715#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem20 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem20 % 256 % 256 <= 127 then #t~mem20 % 256 % 256 else #t~mem20 % 256 % 256 - 256) < 0 then 1 else 0);havoc #t~mem20; {359715#true} is VALID [2018-11-19 18:40:41,809 INFO L273 TraceCheckUtils]: 420: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,810 INFO L268 TraceCheckUtils]: 421: Hoare quadruple {359715#true} {359715#true} #2917#return; {359715#true} is VALID [2018-11-19 18:40:41,810 INFO L273 TraceCheckUtils]: 422: Hoare triple {359715#true} assume -2147483648 <= #t~ret24 && #t~ret24 <= 2147483647;~tmp___0~0 := #t~ret24;havoc #t~ret24; {359715#true} is VALID [2018-11-19 18:40:41,810 INFO L273 TraceCheckUtils]: 423: Hoare triple {359715#true} assume 0 != ~tmp___0~0;~tmp___1~0 := 1; {359715#true} is VALID [2018-11-19 18:40:41,810 INFO L273 TraceCheckUtils]: 424: Hoare triple {359715#true} #res := ~tmp___1~0; {359715#true} is VALID [2018-11-19 18:40:41,810 INFO L273 TraceCheckUtils]: 425: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,810 INFO L268 TraceCheckUtils]: 426: Hoare quadruple {359715#true} {359715#true} #3145#return; {359715#true} is VALID [2018-11-19 18:40:41,810 INFO L273 TraceCheckUtils]: 427: Hoare triple {359715#true} assume -2147483648 <= #t~ret691 && #t~ret691 <= 2147483647;~tmp___2~3 := #t~ret691;havoc #t~ret691;havoc #t~mem690.base, #t~mem690.offset; {359715#true} is VALID [2018-11-19 18:40:41,810 INFO L273 TraceCheckUtils]: 428: Hoare triple {359715#true} assume !(0 == ~tmp___2~3);call #t~mem695.base, #t~mem695.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {359715#true} is VALID [2018-11-19 18:40:41,810 INFO L256 TraceCheckUtils]: 429: Hoare triple {359715#true} call #t~ret696 := usb_endpoint_maxp(#t~mem695.base, #t~mem695.offset); {359715#true} is VALID [2018-11-19 18:40:41,811 INFO L273 TraceCheckUtils]: 430: Hoare triple {359715#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {359715#true} is VALID [2018-11-19 18:40:41,811 INFO L273 TraceCheckUtils]: 431: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,811 INFO L268 TraceCheckUtils]: 432: Hoare quadruple {359715#true} {359715#true} #3147#return; {359715#true} is VALID [2018-11-19 18:40:41,811 INFO L273 TraceCheckUtils]: 433: Hoare triple {359715#true} assume -2147483648 <= #t~ret696 && #t~ret696 <= 2147483647;~tmp___3~2 := #t~ret696;havoc #t~ret696;havoc #t~mem695.base, #t~mem695.offset;call write~int(~tmp___3~2, ~pcu.base, 163 + ~pcu.offset, 4);call #t~mem697 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {359715#true} is VALID [2018-11-19 18:40:41,811 INFO L273 TraceCheckUtils]: 434: Hoare triple {359715#true} assume !(#t~mem697 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem697;#res := 0; {359715#true} is VALID [2018-11-19 18:40:41,811 INFO L273 TraceCheckUtils]: 435: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,811 INFO L268 TraceCheckUtils]: 436: Hoare quadruple {359715#true} {359715#true} #3103#return; {359715#true} is VALID [2018-11-19 18:40:41,811 INFO L273 TraceCheckUtils]: 437: Hoare triple {359715#true} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {359715#true} is VALID [2018-11-19 18:40:41,811 INFO L273 TraceCheckUtils]: 438: Hoare triple {359715#true} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {359715#true} is VALID [2018-11-19 18:40:41,812 INFO L273 TraceCheckUtils]: 439: Hoare triple {359715#true} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {359715#true} is VALID [2018-11-19 18:40:41,812 INFO L256 TraceCheckUtils]: 440: Hoare triple {359715#true} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {359715#true} is VALID [2018-11-19 18:40:41,812 INFO L273 TraceCheckUtils]: 441: Hoare triple {359715#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {359715#true} is VALID [2018-11-19 18:40:41,812 INFO L256 TraceCheckUtils]: 442: Hoare triple {359715#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {359715#true} is VALID [2018-11-19 18:40:41,812 INFO L273 TraceCheckUtils]: 443: Hoare triple {359715#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {359715#true} is VALID [2018-11-19 18:40:41,812 INFO L273 TraceCheckUtils]: 444: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,812 INFO L268 TraceCheckUtils]: 445: Hoare quadruple {359715#true} {359715#true} #2541#return; {359715#true} is VALID [2018-11-19 18:40:41,812 INFO L273 TraceCheckUtils]: 446: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,813 INFO L268 TraceCheckUtils]: 447: Hoare quadruple {359715#true} {359715#true} #3105#return; {359715#true} is VALID [2018-11-19 18:40:41,813 INFO L273 TraceCheckUtils]: 448: Hoare triple {359715#true} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {359715#true} is VALID [2018-11-19 18:40:41,813 INFO L256 TraceCheckUtils]: 449: Hoare triple {359715#true} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {359715#true} is VALID [2018-11-19 18:40:41,813 INFO L273 TraceCheckUtils]: 450: Hoare triple {359715#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {359715#true} is VALID [2018-11-19 18:40:41,813 INFO L256 TraceCheckUtils]: 451: Hoare triple {359715#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {359715#true} is VALID [2018-11-19 18:40:41,813 INFO L273 TraceCheckUtils]: 452: Hoare triple {359715#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {359715#true} is VALID [2018-11-19 18:40:41,813 INFO L273 TraceCheckUtils]: 453: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,813 INFO L268 TraceCheckUtils]: 454: Hoare quadruple {359715#true} {359715#true} #2541#return; {359715#true} is VALID [2018-11-19 18:40:41,813 INFO L273 TraceCheckUtils]: 455: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,814 INFO L268 TraceCheckUtils]: 456: Hoare quadruple {359715#true} {359715#true} #3107#return; {359715#true} is VALID [2018-11-19 18:40:41,814 INFO L273 TraceCheckUtils]: 457: Hoare triple {359715#true} havoc #t~mem837.base, #t~mem837.offset; {359715#true} is VALID [2018-11-19 18:40:41,814 INFO L256 TraceCheckUtils]: 458: Hoare triple {359715#true} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {359715#true} is VALID [2018-11-19 18:40:41,814 INFO L273 TraceCheckUtils]: 459: Hoare triple {359715#true} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {359715#true} is VALID [2018-11-19 18:40:41,814 INFO L273 TraceCheckUtils]: 460: Hoare triple {359715#true} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {359715#true} is VALID [2018-11-19 18:40:41,814 INFO L256 TraceCheckUtils]: 461: Hoare triple {359715#true} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {359715#true} is VALID [2018-11-19 18:40:41,814 INFO L273 TraceCheckUtils]: 462: Hoare triple {359715#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {359715#true} is VALID [2018-11-19 18:40:41,814 INFO L256 TraceCheckUtils]: 463: Hoare triple {359715#true} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {359715#true} is VALID [2018-11-19 18:40:41,814 INFO L273 TraceCheckUtils]: 464: Hoare triple {359715#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {359715#true} is VALID [2018-11-19 18:40:41,815 INFO L256 TraceCheckUtils]: 465: Hoare triple {359715#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {359715#true} is VALID [2018-11-19 18:40:41,815 INFO L273 TraceCheckUtils]: 466: Hoare triple {359715#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {359715#true} is VALID [2018-11-19 18:40:41,815 INFO L273 TraceCheckUtils]: 467: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,815 INFO L268 TraceCheckUtils]: 468: Hoare quadruple {359715#true} {359715#true} #2605#return; {359715#true} is VALID [2018-11-19 18:40:41,815 INFO L273 TraceCheckUtils]: 469: Hoare triple {359715#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {359715#true} is VALID [2018-11-19 18:40:41,815 INFO L256 TraceCheckUtils]: 470: Hoare triple {359715#true} call #t~ret965 := ldv_undef_int(); {359715#true} is VALID [2018-11-19 18:40:41,815 INFO L273 TraceCheckUtils]: 471: Hoare triple {359715#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {359715#true} is VALID [2018-11-19 18:40:41,815 INFO L273 TraceCheckUtils]: 472: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,816 INFO L268 TraceCheckUtils]: 473: Hoare quadruple {359715#true} {359715#true} #2607#return; {359715#true} is VALID [2018-11-19 18:40:41,816 INFO L273 TraceCheckUtils]: 474: Hoare triple {359715#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {359715#true} is VALID [2018-11-19 18:40:41,816 INFO L273 TraceCheckUtils]: 475: Hoare triple {359715#true} assume 0 != ~tmp___0~26; {359715#true} is VALID [2018-11-19 18:40:41,816 INFO L273 TraceCheckUtils]: 476: Hoare triple {359715#true} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {359715#true} is VALID [2018-11-19 18:40:41,816 INFO L273 TraceCheckUtils]: 477: Hoare triple {359715#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {359715#true} is VALID [2018-11-19 18:40:41,816 INFO L273 TraceCheckUtils]: 478: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,816 INFO L268 TraceCheckUtils]: 479: Hoare quadruple {359715#true} {359715#true} #3135#return; {359715#true} is VALID [2018-11-19 18:40:41,816 INFO L273 TraceCheckUtils]: 480: Hoare triple {359715#true} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {359715#true} is VALID [2018-11-19 18:40:41,816 INFO L273 TraceCheckUtils]: 481: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,817 INFO L268 TraceCheckUtils]: 482: Hoare quadruple {359715#true} {359715#true} #2709#return; {359715#true} is VALID [2018-11-19 18:40:41,817 INFO L273 TraceCheckUtils]: 483: Hoare triple {359715#true} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {359715#true} is VALID [2018-11-19 18:40:41,823 INFO L273 TraceCheckUtils]: 484: Hoare triple {359715#true} assume 0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616;havoc #t~mem561.base, #t~mem561.offset;havoc #t~nondet562;call #t~mem563.base, #t~mem563.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem563.base, #t~mem563.offset;~error~18 := -12; {359717#(<= (+ ims_pcu_buffers_alloc_~error~18 12) 0)} is VALID [2018-11-19 18:40:41,830 INFO L273 TraceCheckUtils]: 485: Hoare triple {359717#(<= (+ ims_pcu_buffers_alloc_~error~18 12) 0)} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {359718#(<= (+ |ims_pcu_buffers_alloc_#res| 12) 0)} is VALID [2018-11-19 18:40:41,831 INFO L273 TraceCheckUtils]: 486: Hoare triple {359718#(<= (+ |ims_pcu_buffers_alloc_#res| 12) 0)} assume true; {359718#(<= (+ |ims_pcu_buffers_alloc_#res| 12) 0)} is VALID [2018-11-19 18:40:41,832 INFO L268 TraceCheckUtils]: 487: Hoare quadruple {359718#(<= (+ |ims_pcu_buffers_alloc_#res| 12) 0)} {359715#true} #3109#return; {359719#(<= (+ |ims_pcu_probe_#t~ret838| 12) 0)} is VALID [2018-11-19 18:40:41,833 INFO L273 TraceCheckUtils]: 488: Hoare triple {359719#(<= (+ |ims_pcu_probe_#t~ret838| 12) 0)} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {359720#(<= (+ ims_pcu_probe_~error~25 12) 0)} is VALID [2018-11-19 18:40:41,834 INFO L273 TraceCheckUtils]: 489: Hoare triple {359720#(<= (+ ims_pcu_probe_~error~25 12) 0)} assume 0 != ~error~25; {359720#(<= (+ ims_pcu_probe_~error~25 12) 0)} is VALID [2018-11-19 18:40:41,835 INFO L273 TraceCheckUtils]: 490: Hoare triple {359720#(<= (+ ims_pcu_probe_~error~25 12) 0)} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {359720#(<= (+ ims_pcu_probe_~error~25 12) 0)} is VALID [2018-11-19 18:40:41,837 INFO L273 TraceCheckUtils]: 491: Hoare triple {359720#(<= (+ ims_pcu_probe_~error~25 12) 0)} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {359721#(<= (+ |ims_pcu_probe_#res| 12) 0)} is VALID [2018-11-19 18:40:41,838 INFO L273 TraceCheckUtils]: 492: Hoare triple {359721#(<= (+ |ims_pcu_probe_#res| 12) 0)} assume true; {359721#(<= (+ |ims_pcu_probe_#res| 12) 0)} is VALID [2018-11-19 18:40:41,840 INFO L268 TraceCheckUtils]: 493: Hoare quadruple {359721#(<= (+ |ims_pcu_probe_#res| 12) 0)} {359715#true} #3015#return; {359722#(<= (+ |main_#t~ret938| 12) 0)} is VALID [2018-11-19 18:40:41,841 INFO L273 TraceCheckUtils]: 494: Hoare triple {359722#(<= (+ |main_#t~ret938| 12) 0)} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {359723#(<= (+ ~ldv_retval_3~0 12) 0)} is VALID [2018-11-19 18:40:41,842 INFO L273 TraceCheckUtils]: 495: Hoare triple {359723#(<= (+ ~ldv_retval_3~0 12) 0)} assume 0 == ~ldv_retval_3~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {359716#false} is VALID [2018-11-19 18:40:41,842 INFO L273 TraceCheckUtils]: 496: Hoare triple {359716#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {359716#false} is VALID [2018-11-19 18:40:41,842 INFO L273 TraceCheckUtils]: 497: Hoare triple {359716#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {359716#false} is VALID [2018-11-19 18:40:41,842 INFO L273 TraceCheckUtils]: 498: Hoare triple {359716#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {359716#false} is VALID [2018-11-19 18:40:41,843 INFO L273 TraceCheckUtils]: 499: Hoare triple {359716#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {359716#false} is VALID [2018-11-19 18:40:41,843 INFO L273 TraceCheckUtils]: 500: Hoare triple {359716#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {359716#false} is VALID [2018-11-19 18:40:41,843 INFO L273 TraceCheckUtils]: 501: Hoare triple {359716#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {359716#false} is VALID [2018-11-19 18:40:41,843 INFO L273 TraceCheckUtils]: 502: Hoare triple {359716#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {359716#false} is VALID [2018-11-19 18:40:41,843 INFO L273 TraceCheckUtils]: 503: Hoare triple {359716#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {359716#false} is VALID [2018-11-19 18:40:41,844 INFO L273 TraceCheckUtils]: 504: Hoare triple {359716#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {359716#false} is VALID [2018-11-19 18:40:41,844 INFO L273 TraceCheckUtils]: 505: Hoare triple {359716#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {359716#false} is VALID [2018-11-19 18:40:41,844 INFO L273 TraceCheckUtils]: 506: Hoare triple {359716#false} assume #t~switch909; {359716#false} is VALID [2018-11-19 18:40:41,844 INFO L273 TraceCheckUtils]: 507: Hoare triple {359716#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {359716#false} is VALID [2018-11-19 18:40:41,844 INFO L273 TraceCheckUtils]: 508: Hoare triple {359716#false} assume #t~switch947; {359716#false} is VALID [2018-11-19 18:40:41,845 INFO L273 TraceCheckUtils]: 509: Hoare triple {359716#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {359716#false} is VALID [2018-11-19 18:40:41,845 INFO L256 TraceCheckUtils]: 510: Hoare triple {359716#false} call ims_pcu_driver_exit(); {359715#true} is VALID [2018-11-19 18:40:41,845 INFO L256 TraceCheckUtils]: 511: Hoare triple {359715#true} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {359715#true} is VALID [2018-11-19 18:40:41,845 INFO L273 TraceCheckUtils]: 512: Hoare triple {359715#true} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {359715#true} is VALID [2018-11-19 18:40:41,845 INFO L273 TraceCheckUtils]: 513: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,845 INFO L268 TraceCheckUtils]: 514: Hoare quadruple {359715#true} {359715#true} #2597#return; {359715#true} is VALID [2018-11-19 18:40:41,846 INFO L273 TraceCheckUtils]: 515: Hoare triple {359715#true} assume true; {359715#true} is VALID [2018-11-19 18:40:41,846 INFO L268 TraceCheckUtils]: 516: Hoare quadruple {359715#true} {359716#false} #3033#return; {359716#false} is VALID [2018-11-19 18:40:41,846 INFO L273 TraceCheckUtils]: 517: Hoare triple {359716#false} ~ldv_state_variable_0~0 := 2; {359716#false} is VALID [2018-11-19 18:40:41,846 INFO L256 TraceCheckUtils]: 518: Hoare triple {359716#false} call ldv_check_final_state(); {359716#false} is VALID [2018-11-19 18:40:41,846 INFO L273 TraceCheckUtils]: 519: Hoare triple {359716#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {359716#false} is VALID [2018-11-19 18:40:41,846 INFO L256 TraceCheckUtils]: 520: Hoare triple {359716#false} call ldv_error(); {359716#false} is VALID [2018-11-19 18:40:41,846 INFO L273 TraceCheckUtils]: 521: Hoare triple {359716#false} assume !false; {359716#false} is VALID [2018-11-19 18:40:41,921 INFO L134 CoverageAnalysis]: Checked inductivity of 2723 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 2701 trivial. 0 not checked. [2018-11-19 18:40:41,921 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:40:41,922 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-19 18:40:41,923 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 522 [2018-11-19 18:40:41,923 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:40:41,923 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states. [2018-11-19 18:40:42,375 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 389 edges. 389 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:40:42,375 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-19 18:40:42,375 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-19 18:40:42,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-11-19 18:40:42,376 INFO L87 Difference]: Start difference. First operand 3886 states and 5258 transitions. Second operand 9 states. [2018-11-19 18:41:40,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:41:40,084 INFO L93 Difference]: Finished difference Result 10714 states and 14460 transitions. [2018-11-19 18:41:40,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-19 18:41:40,085 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 522 [2018-11-19 18:41:40,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:41:40,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-19 18:41:40,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 4884 transitions. [2018-11-19 18:41:40,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-19 18:41:40,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 4884 transitions. [2018-11-19 18:41:40,251 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states and 4884 transitions. [2018-11-19 18:41:44,457 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 4884 edges. 4884 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:41:47,124 INFO L225 Difference]: With dead ends: 10714 [2018-11-19 18:41:47,124 INFO L226 Difference]: Without dead ends: 7340 [2018-11-19 18:41:47,129 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=63, Invalid=279, Unknown=0, NotChecked=0, Total=342 [2018-11-19 18:41:47,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7340 states. [2018-11-19 18:42:03,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7340 to 7310. [2018-11-19 18:42:03,454 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:42:03,454 INFO L82 GeneralOperation]: Start isEquivalent. First operand 7340 states. Second operand 7310 states. [2018-11-19 18:42:03,454 INFO L74 IsIncluded]: Start isIncluded. First operand 7340 states. Second operand 7310 states. [2018-11-19 18:42:03,454 INFO L87 Difference]: Start difference. First operand 7340 states. Second operand 7310 states. [2018-11-19 18:42:05,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:42:05,556 INFO L93 Difference]: Finished difference Result 7340 states and 9898 transitions. [2018-11-19 18:42:05,556 INFO L276 IsEmpty]: Start isEmpty. Operand 7340 states and 9898 transitions. [2018-11-19 18:42:05,567 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:42:05,567 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:42:05,567 INFO L74 IsIncluded]: Start isIncluded. First operand 7310 states. Second operand 7340 states. [2018-11-19 18:42:05,567 INFO L87 Difference]: Start difference. First operand 7310 states. Second operand 7340 states. [2018-11-19 18:42:07,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:42:07,700 INFO L93 Difference]: Finished difference Result 7340 states and 9898 transitions. [2018-11-19 18:42:07,701 INFO L276 IsEmpty]: Start isEmpty. Operand 7340 states and 9898 transitions. [2018-11-19 18:42:07,711 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:42:07,711 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:42:07,711 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:42:07,711 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:42:07,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7310 states. [2018-11-19 18:42:10,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7310 states to 7310 states and 9867 transitions. [2018-11-19 18:42:10,231 INFO L78 Accepts]: Start accepts. Automaton has 7310 states and 9867 transitions. Word has length 522 [2018-11-19 18:42:10,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:42:10,231 INFO L480 AbstractCegarLoop]: Abstraction has 7310 states and 9867 transitions. [2018-11-19 18:42:10,231 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-19 18:42:10,231 INFO L276 IsEmpty]: Start isEmpty. Operand 7310 states and 9867 transitions. [2018-11-19 18:42:10,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 523 [2018-11-19 18:42:10,241 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:42:10,241 INFO L384 BasicCegarLoop]: trace histogram [37, 37, 37, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:42:10,241 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:42:10,242 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:42:10,242 INFO L82 PathProgramCache]: Analyzing trace with hash 674698909, now seen corresponding path program 1 times [2018-11-19 18:42:10,242 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:42:10,242 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:42:10,244 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:42:10,244 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:42:10,244 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:42:10,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:42:10,720 INFO L256 TraceCheckUtils]: 0: Hoare triple {398318#true} call ULTIMATE.init(); {398318#true} is VALID [2018-11-19 18:42:10,720 INFO L273 TraceCheckUtils]: 1: Hoare triple {398318#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,721 INFO L273 TraceCheckUtils]: 2: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,721 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {398318#true} {398318#true} #3175#return; {398318#true} is VALID [2018-11-19 18:42:10,721 INFO L256 TraceCheckUtils]: 4: Hoare triple {398318#true} call #t~ret973 := main(); {398318#true} is VALID [2018-11-19 18:42:10,721 INFO L273 TraceCheckUtils]: 5: Hoare triple {398318#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {398318#true} is VALID [2018-11-19 18:42:10,721 INFO L256 TraceCheckUtils]: 6: Hoare triple {398318#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:10,722 INFO L273 TraceCheckUtils]: 7: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,722 INFO L273 TraceCheckUtils]: 8: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,722 INFO L273 TraceCheckUtils]: 9: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,722 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {398318#true} {398318#true} #2927#return; {398318#true} is VALID [2018-11-19 18:42:10,722 INFO L273 TraceCheckUtils]: 11: Hoare triple {398318#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {398318#true} is VALID [2018-11-19 18:42:10,722 INFO L256 TraceCheckUtils]: 12: Hoare triple {398318#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:10,722 INFO L273 TraceCheckUtils]: 13: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,722 INFO L273 TraceCheckUtils]: 14: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,722 INFO L273 TraceCheckUtils]: 15: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,723 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {398318#true} {398318#true} #2929#return; {398318#true} is VALID [2018-11-19 18:42:10,723 INFO L273 TraceCheckUtils]: 17: Hoare triple {398318#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {398318#true} is VALID [2018-11-19 18:42:10,723 INFO L256 TraceCheckUtils]: 18: Hoare triple {398318#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:10,723 INFO L273 TraceCheckUtils]: 19: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,723 INFO L273 TraceCheckUtils]: 20: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,723 INFO L273 TraceCheckUtils]: 21: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,723 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {398318#true} {398318#true} #2931#return; {398318#true} is VALID [2018-11-19 18:42:10,723 INFO L273 TraceCheckUtils]: 23: Hoare triple {398318#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {398318#true} is VALID [2018-11-19 18:42:10,724 INFO L256 TraceCheckUtils]: 24: Hoare triple {398318#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:10,724 INFO L273 TraceCheckUtils]: 25: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,724 INFO L273 TraceCheckUtils]: 26: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,724 INFO L273 TraceCheckUtils]: 27: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,724 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {398318#true} {398318#true} #2933#return; {398318#true} is VALID [2018-11-19 18:42:10,724 INFO L273 TraceCheckUtils]: 29: Hoare triple {398318#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {398318#true} is VALID [2018-11-19 18:42:10,724 INFO L256 TraceCheckUtils]: 30: Hoare triple {398318#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {398318#true} is VALID [2018-11-19 18:42:10,724 INFO L273 TraceCheckUtils]: 31: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,724 INFO L273 TraceCheckUtils]: 32: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,725 INFO L273 TraceCheckUtils]: 33: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,725 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {398318#true} {398318#true} #2935#return; {398318#true} is VALID [2018-11-19 18:42:10,725 INFO L273 TraceCheckUtils]: 35: Hoare triple {398318#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {398318#true} is VALID [2018-11-19 18:42:10,725 INFO L256 TraceCheckUtils]: 36: Hoare triple {398318#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:10,725 INFO L273 TraceCheckUtils]: 37: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,725 INFO L273 TraceCheckUtils]: 38: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,725 INFO L273 TraceCheckUtils]: 39: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,725 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {398318#true} {398318#true} #2937#return; {398318#true} is VALID [2018-11-19 18:42:10,726 INFO L273 TraceCheckUtils]: 41: Hoare triple {398318#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {398318#true} is VALID [2018-11-19 18:42:10,726 INFO L256 TraceCheckUtils]: 42: Hoare triple {398318#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {398318#true} is VALID [2018-11-19 18:42:10,726 INFO L273 TraceCheckUtils]: 43: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,726 INFO L273 TraceCheckUtils]: 44: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,726 INFO L273 TraceCheckUtils]: 45: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,726 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {398318#true} {398318#true} #2939#return; {398318#true} is VALID [2018-11-19 18:42:10,726 INFO L273 TraceCheckUtils]: 47: Hoare triple {398318#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {398318#true} is VALID [2018-11-19 18:42:10,726 INFO L256 TraceCheckUtils]: 48: Hoare triple {398318#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:10,726 INFO L273 TraceCheckUtils]: 49: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,727 INFO L273 TraceCheckUtils]: 50: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,727 INFO L273 TraceCheckUtils]: 51: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,727 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {398318#true} {398318#true} #2941#return; {398318#true} is VALID [2018-11-19 18:42:10,727 INFO L273 TraceCheckUtils]: 53: Hoare triple {398318#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {398318#true} is VALID [2018-11-19 18:42:10,727 INFO L256 TraceCheckUtils]: 54: Hoare triple {398318#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:10,727 INFO L273 TraceCheckUtils]: 55: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,727 INFO L273 TraceCheckUtils]: 56: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,727 INFO L273 TraceCheckUtils]: 57: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,727 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {398318#true} {398318#true} #2943#return; {398318#true} is VALID [2018-11-19 18:42:10,728 INFO L273 TraceCheckUtils]: 59: Hoare triple {398318#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {398318#true} is VALID [2018-11-19 18:42:10,728 INFO L256 TraceCheckUtils]: 60: Hoare triple {398318#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:10,728 INFO L273 TraceCheckUtils]: 61: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,728 INFO L273 TraceCheckUtils]: 62: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,728 INFO L273 TraceCheckUtils]: 63: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,728 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {398318#true} {398318#true} #2945#return; {398318#true} is VALID [2018-11-19 18:42:10,728 INFO L273 TraceCheckUtils]: 65: Hoare triple {398318#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {398318#true} is VALID [2018-11-19 18:42:10,728 INFO L256 TraceCheckUtils]: 66: Hoare triple {398318#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:10,729 INFO L273 TraceCheckUtils]: 67: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,729 INFO L273 TraceCheckUtils]: 68: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,729 INFO L273 TraceCheckUtils]: 69: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,729 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {398318#true} {398318#true} #2947#return; {398318#true} is VALID [2018-11-19 18:42:10,729 INFO L273 TraceCheckUtils]: 71: Hoare triple {398318#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {398318#true} is VALID [2018-11-19 18:42:10,729 INFO L256 TraceCheckUtils]: 72: Hoare triple {398318#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {398318#true} is VALID [2018-11-19 18:42:10,729 INFO L273 TraceCheckUtils]: 73: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,729 INFO L273 TraceCheckUtils]: 74: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,729 INFO L273 TraceCheckUtils]: 75: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,730 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {398318#true} {398318#true} #2949#return; {398318#true} is VALID [2018-11-19 18:42:10,730 INFO L273 TraceCheckUtils]: 77: Hoare triple {398318#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {398318#true} is VALID [2018-11-19 18:42:10,730 INFO L256 TraceCheckUtils]: 78: Hoare triple {398318#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {398318#true} is VALID [2018-11-19 18:42:10,730 INFO L273 TraceCheckUtils]: 79: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,730 INFO L273 TraceCheckUtils]: 80: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,730 INFO L273 TraceCheckUtils]: 81: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,730 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {398318#true} {398318#true} #2951#return; {398318#true} is VALID [2018-11-19 18:42:10,730 INFO L273 TraceCheckUtils]: 83: Hoare triple {398318#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {398318#true} is VALID [2018-11-19 18:42:10,730 INFO L256 TraceCheckUtils]: 84: Hoare triple {398318#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:10,731 INFO L273 TraceCheckUtils]: 85: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,731 INFO L273 TraceCheckUtils]: 86: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,731 INFO L273 TraceCheckUtils]: 87: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,731 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {398318#true} {398318#true} #2953#return; {398318#true} is VALID [2018-11-19 18:42:10,731 INFO L273 TraceCheckUtils]: 89: Hoare triple {398318#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {398318#true} is VALID [2018-11-19 18:42:10,731 INFO L256 TraceCheckUtils]: 90: Hoare triple {398318#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:10,731 INFO L273 TraceCheckUtils]: 91: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,731 INFO L273 TraceCheckUtils]: 92: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,731 INFO L273 TraceCheckUtils]: 93: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,732 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {398318#true} {398318#true} #2955#return; {398318#true} is VALID [2018-11-19 18:42:10,732 INFO L273 TraceCheckUtils]: 95: Hoare triple {398318#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {398318#true} is VALID [2018-11-19 18:42:10,732 INFO L256 TraceCheckUtils]: 96: Hoare triple {398318#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {398318#true} is VALID [2018-11-19 18:42:10,732 INFO L273 TraceCheckUtils]: 97: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,732 INFO L273 TraceCheckUtils]: 98: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,732 INFO L273 TraceCheckUtils]: 99: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,732 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {398318#true} {398318#true} #2957#return; {398318#true} is VALID [2018-11-19 18:42:10,732 INFO L273 TraceCheckUtils]: 101: Hoare triple {398318#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {398318#true} is VALID [2018-11-19 18:42:10,733 INFO L256 TraceCheckUtils]: 102: Hoare triple {398318#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {398318#true} is VALID [2018-11-19 18:42:10,733 INFO L273 TraceCheckUtils]: 103: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,733 INFO L273 TraceCheckUtils]: 104: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,733 INFO L273 TraceCheckUtils]: 105: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,733 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {398318#true} {398318#true} #2959#return; {398318#true} is VALID [2018-11-19 18:42:10,733 INFO L273 TraceCheckUtils]: 107: Hoare triple {398318#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {398318#true} is VALID [2018-11-19 18:42:10,733 INFO L256 TraceCheckUtils]: 108: Hoare triple {398318#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {398318#true} is VALID [2018-11-19 18:42:10,733 INFO L273 TraceCheckUtils]: 109: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,733 INFO L273 TraceCheckUtils]: 110: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,734 INFO L273 TraceCheckUtils]: 111: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,734 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {398318#true} {398318#true} #2961#return; {398318#true} is VALID [2018-11-19 18:42:10,734 INFO L273 TraceCheckUtils]: 113: Hoare triple {398318#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {398318#true} is VALID [2018-11-19 18:42:10,734 INFO L256 TraceCheckUtils]: 114: Hoare triple {398318#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:10,734 INFO L273 TraceCheckUtils]: 115: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,734 INFO L273 TraceCheckUtils]: 116: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,734 INFO L273 TraceCheckUtils]: 117: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,734 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {398318#true} {398318#true} #2963#return; {398318#true} is VALID [2018-11-19 18:42:10,734 INFO L273 TraceCheckUtils]: 119: Hoare triple {398318#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {398318#true} is VALID [2018-11-19 18:42:10,735 INFO L256 TraceCheckUtils]: 120: Hoare triple {398318#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:10,735 INFO L273 TraceCheckUtils]: 121: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,735 INFO L273 TraceCheckUtils]: 122: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,735 INFO L273 TraceCheckUtils]: 123: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,735 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {398318#true} {398318#true} #2965#return; {398318#true} is VALID [2018-11-19 18:42:10,735 INFO L273 TraceCheckUtils]: 125: Hoare triple {398318#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {398318#true} is VALID [2018-11-19 18:42:10,735 INFO L256 TraceCheckUtils]: 126: Hoare triple {398318#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:10,735 INFO L273 TraceCheckUtils]: 127: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,736 INFO L273 TraceCheckUtils]: 128: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,736 INFO L273 TraceCheckUtils]: 129: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,736 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {398318#true} {398318#true} #2967#return; {398318#true} is VALID [2018-11-19 18:42:10,736 INFO L273 TraceCheckUtils]: 131: Hoare triple {398318#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {398318#true} is VALID [2018-11-19 18:42:10,736 INFO L256 TraceCheckUtils]: 132: Hoare triple {398318#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:10,736 INFO L273 TraceCheckUtils]: 133: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,736 INFO L273 TraceCheckUtils]: 134: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,736 INFO L273 TraceCheckUtils]: 135: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,736 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {398318#true} {398318#true} #2969#return; {398318#true} is VALID [2018-11-19 18:42:10,737 INFO L273 TraceCheckUtils]: 137: Hoare triple {398318#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {398318#true} is VALID [2018-11-19 18:42:10,737 INFO L256 TraceCheckUtils]: 138: Hoare triple {398318#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {398318#true} is VALID [2018-11-19 18:42:10,737 INFO L273 TraceCheckUtils]: 139: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,737 INFO L273 TraceCheckUtils]: 140: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,737 INFO L273 TraceCheckUtils]: 141: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,737 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {398318#true} {398318#true} #2971#return; {398318#true} is VALID [2018-11-19 18:42:10,737 INFO L273 TraceCheckUtils]: 143: Hoare triple {398318#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {398318#true} is VALID [2018-11-19 18:42:10,737 INFO L256 TraceCheckUtils]: 144: Hoare triple {398318#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {398318#true} is VALID [2018-11-19 18:42:10,737 INFO L273 TraceCheckUtils]: 145: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,738 INFO L273 TraceCheckUtils]: 146: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,738 INFO L273 TraceCheckUtils]: 147: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,738 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {398318#true} {398318#true} #2973#return; {398318#true} is VALID [2018-11-19 18:42:10,738 INFO L273 TraceCheckUtils]: 149: Hoare triple {398318#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {398318#true} is VALID [2018-11-19 18:42:10,738 INFO L256 TraceCheckUtils]: 150: Hoare triple {398318#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {398318#true} is VALID [2018-11-19 18:42:10,740 INFO L273 TraceCheckUtils]: 151: Hoare triple {398318#true} #t~loopctr974 := 0; {398320#(= |#Ultimate.C_memset_#t~loopctr974| 0)} is VALID [2018-11-19 18:42:10,742 INFO L273 TraceCheckUtils]: 152: Hoare triple {398320#(= |#Ultimate.C_memset_#t~loopctr974| 0)} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {398321#(or (not (= |#Ultimate.C_memset_#amount| 4)) (<= |#Ultimate.C_memset_#t~loopctr974| 1))} is VALID [2018-11-19 18:42:10,743 INFO L273 TraceCheckUtils]: 153: Hoare triple {398321#(or (not (= |#Ultimate.C_memset_#amount| 4)) (<= |#Ultimate.C_memset_#t~loopctr974| 1))} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {398322#(or (not (= |#Ultimate.C_memset_#amount| 4)) (<= |#Ultimate.C_memset_#t~loopctr974| 2))} is VALID [2018-11-19 18:42:10,744 INFO L273 TraceCheckUtils]: 154: Hoare triple {398322#(or (not (= |#Ultimate.C_memset_#amount| 4)) (<= |#Ultimate.C_memset_#t~loopctr974| 2))} assume !(#t~loopctr974 < #amount); {398323#(not (= |#Ultimate.C_memset_#amount| 4))} is VALID [2018-11-19 18:42:10,744 INFO L273 TraceCheckUtils]: 155: Hoare triple {398323#(not (= |#Ultimate.C_memset_#amount| 4))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {398323#(not (= |#Ultimate.C_memset_#amount| 4))} is VALID [2018-11-19 18:42:10,745 INFO L268 TraceCheckUtils]: 156: Hoare quadruple {398323#(not (= |#Ultimate.C_memset_#amount| 4))} {398318#true} #2975#return; {398319#false} is VALID [2018-11-19 18:42:10,745 INFO L273 TraceCheckUtils]: 157: Hoare triple {398319#false} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {398319#false} is VALID [2018-11-19 18:42:10,746 INFO L273 TraceCheckUtils]: 158: Hoare triple {398319#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,746 INFO L273 TraceCheckUtils]: 159: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,746 INFO L273 TraceCheckUtils]: 160: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,746 INFO L273 TraceCheckUtils]: 161: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,746 INFO L273 TraceCheckUtils]: 162: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,747 INFO L273 TraceCheckUtils]: 163: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,747 INFO L273 TraceCheckUtils]: 164: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,747 INFO L273 TraceCheckUtils]: 165: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,747 INFO L273 TraceCheckUtils]: 166: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,747 INFO L273 TraceCheckUtils]: 167: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,747 INFO L273 TraceCheckUtils]: 168: Hoare triple {398319#false} assume #t~switch909; {398319#false} is VALID [2018-11-19 18:42:10,748 INFO L273 TraceCheckUtils]: 169: Hoare triple {398319#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {398319#false} is VALID [2018-11-19 18:42:10,748 INFO L273 TraceCheckUtils]: 170: Hoare triple {398319#false} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {398319#false} is VALID [2018-11-19 18:42:10,748 INFO L273 TraceCheckUtils]: 171: Hoare triple {398319#false} assume #t~switch947; {398319#false} is VALID [2018-11-19 18:42:10,748 INFO L273 TraceCheckUtils]: 172: Hoare triple {398319#false} assume 1 == ~ldv_state_variable_0~0; {398319#false} is VALID [2018-11-19 18:42:10,748 INFO L256 TraceCheckUtils]: 173: Hoare triple {398319#false} call #t~ret948 := ims_pcu_driver_init(); {398318#true} is VALID [2018-11-19 18:42:10,748 INFO L273 TraceCheckUtils]: 174: Hoare triple {398318#true} havoc ~tmp~46; {398318#true} is VALID [2018-11-19 18:42:10,748 INFO L256 TraceCheckUtils]: 175: Hoare triple {398318#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {398318#true} is VALID [2018-11-19 18:42:10,748 INFO L273 TraceCheckUtils]: 176: Hoare triple {398318#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {398318#true} is VALID [2018-11-19 18:42:10,748 INFO L256 TraceCheckUtils]: 177: Hoare triple {398318#true} call ldv_usb_driver_1(); {398318#true} is VALID [2018-11-19 18:42:10,748 INFO L273 TraceCheckUtils]: 178: Hoare triple {398318#true} havoc ~tmp~53.base, ~tmp~53.offset; {398318#true} is VALID [2018-11-19 18:42:10,749 INFO L256 TraceCheckUtils]: 179: Hoare triple {398318#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {398318#true} is VALID [2018-11-19 18:42:10,749 INFO L273 TraceCheckUtils]: 180: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,749 INFO L273 TraceCheckUtils]: 181: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,749 INFO L273 TraceCheckUtils]: 182: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,749 INFO L268 TraceCheckUtils]: 183: Hoare quadruple {398318#true} {398318#true} #2613#return; {398318#true} is VALID [2018-11-19 18:42:10,749 INFO L273 TraceCheckUtils]: 184: Hoare triple {398318#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {398318#true} is VALID [2018-11-19 18:42:10,749 INFO L273 TraceCheckUtils]: 185: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,749 INFO L268 TraceCheckUtils]: 186: Hoare quadruple {398318#true} {398318#true} #2537#return; {398318#true} is VALID [2018-11-19 18:42:10,749 INFO L273 TraceCheckUtils]: 187: Hoare triple {398318#true} #res := ~ldv_func_res~0; {398318#true} is VALID [2018-11-19 18:42:10,750 INFO L273 TraceCheckUtils]: 188: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,750 INFO L268 TraceCheckUtils]: 189: Hoare quadruple {398318#true} {398318#true} #2777#return; {398318#true} is VALID [2018-11-19 18:42:10,750 INFO L273 TraceCheckUtils]: 190: Hoare triple {398318#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {398318#true} is VALID [2018-11-19 18:42:10,750 INFO L273 TraceCheckUtils]: 191: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,750 INFO L268 TraceCheckUtils]: 192: Hoare quadruple {398318#true} {398319#false} #3035#return; {398319#false} is VALID [2018-11-19 18:42:10,750 INFO L273 TraceCheckUtils]: 193: Hoare triple {398319#false} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {398319#false} is VALID [2018-11-19 18:42:10,750 INFO L273 TraceCheckUtils]: 194: Hoare triple {398319#false} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_10~0 := 1; {398319#false} is VALID [2018-11-19 18:42:10,750 INFO L256 TraceCheckUtils]: 195: Hoare triple {398319#false} call ldv_initialize_ims_pcu_attribute_10(); {398318#true} is VALID [2018-11-19 18:42:10,750 INFO L273 TraceCheckUtils]: 196: Hoare triple {398318#true} havoc ~tmp~47.base, ~tmp~47.offset;havoc ~tmp___0~19.base, ~tmp___0~19.offset; {398318#true} is VALID [2018-11-19 18:42:10,751 INFO L256 TraceCheckUtils]: 197: Hoare triple {398318#true} call #t~ret861.base, #t~ret861.offset := ldv_zalloc(1376); {398318#true} is VALID [2018-11-19 18:42:10,751 INFO L273 TraceCheckUtils]: 198: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,751 INFO L273 TraceCheckUtils]: 199: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,751 INFO L273 TraceCheckUtils]: 200: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,751 INFO L268 TraceCheckUtils]: 201: Hoare quadruple {398318#true} {398318#true} #2807#return; {398318#true} is VALID [2018-11-19 18:42:10,751 INFO L273 TraceCheckUtils]: 202: Hoare triple {398318#true} ~tmp~47.base, ~tmp~47.offset := #t~ret861.base, #t~ret861.offset;havoc #t~ret861.base, #t~ret861.offset;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := ~tmp~47.base, ~tmp~47.offset; {398318#true} is VALID [2018-11-19 18:42:10,751 INFO L256 TraceCheckUtils]: 203: Hoare triple {398318#true} call #t~ret862.base, #t~ret862.offset := ldv_zalloc(48); {398318#true} is VALID [2018-11-19 18:42:10,751 INFO L273 TraceCheckUtils]: 204: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,751 INFO L273 TraceCheckUtils]: 205: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,752 INFO L273 TraceCheckUtils]: 206: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,752 INFO L268 TraceCheckUtils]: 207: Hoare quadruple {398318#true} {398318#true} #2809#return; {398318#true} is VALID [2018-11-19 18:42:10,752 INFO L273 TraceCheckUtils]: 208: Hoare triple {398318#true} ~tmp___0~19.base, ~tmp___0~19.offset := #t~ret862.base, #t~ret862.offset;havoc #t~ret862.base, #t~ret862.offset;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := ~tmp___0~19.base, ~tmp___0~19.offset; {398318#true} is VALID [2018-11-19 18:42:10,752 INFO L273 TraceCheckUtils]: 209: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,752 INFO L268 TraceCheckUtils]: 210: Hoare quadruple {398318#true} {398319#false} #3037#return; {398319#false} is VALID [2018-11-19 18:42:10,752 INFO L273 TraceCheckUtils]: 211: Hoare triple {398319#false} ~ldv_state_variable_4~0 := 1;~ldv_state_variable_8~0 := 1; {398319#false} is VALID [2018-11-19 18:42:10,752 INFO L256 TraceCheckUtils]: 212: Hoare triple {398319#false} call ldv_initialize_ims_pcu_attribute_8(); {398318#true} is VALID [2018-11-19 18:42:10,752 INFO L273 TraceCheckUtils]: 213: Hoare triple {398318#true} havoc ~tmp~51.base, ~tmp~51.offset;havoc ~tmp___0~23.base, ~tmp___0~23.offset; {398318#true} is VALID [2018-11-19 18:42:10,752 INFO L256 TraceCheckUtils]: 214: Hoare triple {398318#true} call #t~ret869.base, #t~ret869.offset := ldv_zalloc(1376); {398318#true} is VALID [2018-11-19 18:42:10,752 INFO L273 TraceCheckUtils]: 215: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,753 INFO L273 TraceCheckUtils]: 216: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,753 INFO L273 TraceCheckUtils]: 217: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,753 INFO L268 TraceCheckUtils]: 218: Hoare quadruple {398318#true} {398318#true} #2631#return; {398318#true} is VALID [2018-11-19 18:42:10,753 INFO L273 TraceCheckUtils]: 219: Hoare triple {398318#true} ~tmp~51.base, ~tmp~51.offset := #t~ret869.base, #t~ret869.offset;havoc #t~ret869.base, #t~ret869.offset;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := ~tmp~51.base, ~tmp~51.offset; {398318#true} is VALID [2018-11-19 18:42:10,753 INFO L256 TraceCheckUtils]: 220: Hoare triple {398318#true} call #t~ret870.base, #t~ret870.offset := ldv_zalloc(48); {398318#true} is VALID [2018-11-19 18:42:10,753 INFO L273 TraceCheckUtils]: 221: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,753 INFO L273 TraceCheckUtils]: 222: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,753 INFO L273 TraceCheckUtils]: 223: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,754 INFO L268 TraceCheckUtils]: 224: Hoare quadruple {398318#true} {398318#true} #2633#return; {398318#true} is VALID [2018-11-19 18:42:10,754 INFO L273 TraceCheckUtils]: 225: Hoare triple {398318#true} ~tmp___0~23.base, ~tmp___0~23.offset := #t~ret870.base, #t~ret870.offset;havoc #t~ret870.base, #t~ret870.offset;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := ~tmp___0~23.base, ~tmp___0~23.offset; {398318#true} is VALID [2018-11-19 18:42:10,754 INFO L273 TraceCheckUtils]: 226: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,754 INFO L268 TraceCheckUtils]: 227: Hoare quadruple {398318#true} {398319#false} #3039#return; {398319#false} is VALID [2018-11-19 18:42:10,754 INFO L273 TraceCheckUtils]: 228: Hoare triple {398319#false} ~ldv_state_variable_2~0 := 1;~ldv_state_variable_9~0 := 1; {398319#false} is VALID [2018-11-19 18:42:10,754 INFO L256 TraceCheckUtils]: 229: Hoare triple {398319#false} call ldv_initialize_ims_pcu_attribute_9(); {398318#true} is VALID [2018-11-19 18:42:10,754 INFO L273 TraceCheckUtils]: 230: Hoare triple {398318#true} havoc ~tmp~49.base, ~tmp~49.offset;havoc ~tmp___0~21.base, ~tmp___0~21.offset; {398318#true} is VALID [2018-11-19 18:42:10,754 INFO L256 TraceCheckUtils]: 231: Hoare triple {398318#true} call #t~ret865.base, #t~ret865.offset := ldv_zalloc(1376); {398318#true} is VALID [2018-11-19 18:42:10,754 INFO L273 TraceCheckUtils]: 232: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,755 INFO L273 TraceCheckUtils]: 233: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,755 INFO L273 TraceCheckUtils]: 234: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,755 INFO L268 TraceCheckUtils]: 235: Hoare quadruple {398318#true} {398318#true} #2627#return; {398318#true} is VALID [2018-11-19 18:42:10,755 INFO L273 TraceCheckUtils]: 236: Hoare triple {398318#true} ~tmp~49.base, ~tmp~49.offset := #t~ret865.base, #t~ret865.offset;havoc #t~ret865.base, #t~ret865.offset;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := ~tmp~49.base, ~tmp~49.offset; {398318#true} is VALID [2018-11-19 18:42:10,755 INFO L256 TraceCheckUtils]: 237: Hoare triple {398318#true} call #t~ret866.base, #t~ret866.offset := ldv_zalloc(48); {398318#true} is VALID [2018-11-19 18:42:10,755 INFO L273 TraceCheckUtils]: 238: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,755 INFO L273 TraceCheckUtils]: 239: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,755 INFO L273 TraceCheckUtils]: 240: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,755 INFO L268 TraceCheckUtils]: 241: Hoare quadruple {398318#true} {398318#true} #2629#return; {398318#true} is VALID [2018-11-19 18:42:10,755 INFO L273 TraceCheckUtils]: 242: Hoare triple {398318#true} ~tmp___0~21.base, ~tmp___0~21.offset := #t~ret866.base, #t~ret866.offset;havoc #t~ret866.base, #t~ret866.offset;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := ~tmp___0~21.base, ~tmp___0~21.offset; {398318#true} is VALID [2018-11-19 18:42:10,756 INFO L273 TraceCheckUtils]: 243: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,756 INFO L268 TraceCheckUtils]: 244: Hoare quadruple {398318#true} {398319#false} #3041#return; {398319#false} is VALID [2018-11-19 18:42:10,756 INFO L273 TraceCheckUtils]: 245: Hoare triple {398319#false} ~ldv_state_variable_7~0 := 1; {398319#false} is VALID [2018-11-19 18:42:10,756 INFO L256 TraceCheckUtils]: 246: Hoare triple {398319#false} call ldv_initialize_ims_pcu_attribute_7(); {398318#true} is VALID [2018-11-19 18:42:10,756 INFO L273 TraceCheckUtils]: 247: Hoare triple {398318#true} havoc ~tmp~52.base, ~tmp~52.offset;havoc ~tmp___0~24.base, ~tmp___0~24.offset; {398318#true} is VALID [2018-11-19 18:42:10,756 INFO L256 TraceCheckUtils]: 248: Hoare triple {398318#true} call #t~ret871.base, #t~ret871.offset := ldv_zalloc(1376); {398318#true} is VALID [2018-11-19 18:42:10,756 INFO L273 TraceCheckUtils]: 249: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,756 INFO L273 TraceCheckUtils]: 250: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,756 INFO L273 TraceCheckUtils]: 251: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,757 INFO L268 TraceCheckUtils]: 252: Hoare quadruple {398318#true} {398318#true} #2619#return; {398318#true} is VALID [2018-11-19 18:42:10,757 INFO L273 TraceCheckUtils]: 253: Hoare triple {398318#true} ~tmp~52.base, ~tmp~52.offset := #t~ret871.base, #t~ret871.offset;havoc #t~ret871.base, #t~ret871.offset;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := ~tmp~52.base, ~tmp~52.offset; {398318#true} is VALID [2018-11-19 18:42:10,757 INFO L256 TraceCheckUtils]: 254: Hoare triple {398318#true} call #t~ret872.base, #t~ret872.offset := ldv_zalloc(48); {398318#true} is VALID [2018-11-19 18:42:10,757 INFO L273 TraceCheckUtils]: 255: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,757 INFO L273 TraceCheckUtils]: 256: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,757 INFO L273 TraceCheckUtils]: 257: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,757 INFO L268 TraceCheckUtils]: 258: Hoare quadruple {398318#true} {398318#true} #2621#return; {398318#true} is VALID [2018-11-19 18:42:10,757 INFO L273 TraceCheckUtils]: 259: Hoare triple {398318#true} ~tmp___0~24.base, ~tmp___0~24.offset := #t~ret872.base, #t~ret872.offset;havoc #t~ret872.base, #t~ret872.offset;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := ~tmp___0~24.base, ~tmp___0~24.offset; {398318#true} is VALID [2018-11-19 18:42:10,757 INFO L273 TraceCheckUtils]: 260: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,758 INFO L268 TraceCheckUtils]: 261: Hoare quadruple {398318#true} {398319#false} #3043#return; {398319#false} is VALID [2018-11-19 18:42:10,758 INFO L273 TraceCheckUtils]: 262: Hoare triple {398319#false} ~ldv_state_variable_3~0 := 1;~ldv_state_variable_11~0 := 1; {398319#false} is VALID [2018-11-19 18:42:10,758 INFO L256 TraceCheckUtils]: 263: Hoare triple {398319#false} call ldv_initialize_ims_pcu_attribute_11(); {398318#true} is VALID [2018-11-19 18:42:10,758 INFO L273 TraceCheckUtils]: 264: Hoare triple {398318#true} havoc ~tmp~50.base, ~tmp~50.offset;havoc ~tmp___0~22.base, ~tmp___0~22.offset; {398318#true} is VALID [2018-11-19 18:42:10,758 INFO L256 TraceCheckUtils]: 265: Hoare triple {398318#true} call #t~ret867.base, #t~ret867.offset := ldv_zalloc(1376); {398318#true} is VALID [2018-11-19 18:42:10,758 INFO L273 TraceCheckUtils]: 266: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,758 INFO L273 TraceCheckUtils]: 267: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,758 INFO L273 TraceCheckUtils]: 268: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,758 INFO L268 TraceCheckUtils]: 269: Hoare quadruple {398318#true} {398318#true} #2811#return; {398318#true} is VALID [2018-11-19 18:42:10,758 INFO L273 TraceCheckUtils]: 270: Hoare triple {398318#true} ~tmp~50.base, ~tmp~50.offset := #t~ret867.base, #t~ret867.offset;havoc #t~ret867.base, #t~ret867.offset;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := ~tmp~50.base, ~tmp~50.offset; {398318#true} is VALID [2018-11-19 18:42:10,759 INFO L256 TraceCheckUtils]: 271: Hoare triple {398318#true} call #t~ret868.base, #t~ret868.offset := ldv_zalloc(48); {398318#true} is VALID [2018-11-19 18:42:10,759 INFO L273 TraceCheckUtils]: 272: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,759 INFO L273 TraceCheckUtils]: 273: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,759 INFO L273 TraceCheckUtils]: 274: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,759 INFO L268 TraceCheckUtils]: 275: Hoare quadruple {398318#true} {398318#true} #2813#return; {398318#true} is VALID [2018-11-19 18:42:10,759 INFO L273 TraceCheckUtils]: 276: Hoare triple {398318#true} ~tmp___0~22.base, ~tmp___0~22.offset := #t~ret868.base, #t~ret868.offset;havoc #t~ret868.base, #t~ret868.offset;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := ~tmp___0~22.base, ~tmp___0~22.offset; {398318#true} is VALID [2018-11-19 18:42:10,759 INFO L273 TraceCheckUtils]: 277: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,759 INFO L268 TraceCheckUtils]: 278: Hoare quadruple {398318#true} {398319#false} #3045#return; {398319#false} is VALID [2018-11-19 18:42:10,759 INFO L273 TraceCheckUtils]: 279: Hoare triple {398319#false} ~ldv_state_variable_6~0 := 1; {398319#false} is VALID [2018-11-19 18:42:10,760 INFO L256 TraceCheckUtils]: 280: Hoare triple {398319#false} call ldv_initialize_ims_pcu_attribute_6(); {398318#true} is VALID [2018-11-19 18:42:10,760 INFO L273 TraceCheckUtils]: 281: Hoare triple {398318#true} havoc ~tmp~48.base, ~tmp~48.offset;havoc ~tmp___0~20.base, ~tmp___0~20.offset; {398318#true} is VALID [2018-11-19 18:42:10,760 INFO L256 TraceCheckUtils]: 282: Hoare triple {398318#true} call #t~ret863.base, #t~ret863.offset := ldv_zalloc(1376); {398318#true} is VALID [2018-11-19 18:42:10,760 INFO L273 TraceCheckUtils]: 283: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,760 INFO L273 TraceCheckUtils]: 284: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,760 INFO L273 TraceCheckUtils]: 285: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,760 INFO L268 TraceCheckUtils]: 286: Hoare quadruple {398318#true} {398318#true} #2623#return; {398318#true} is VALID [2018-11-19 18:42:10,760 INFO L273 TraceCheckUtils]: 287: Hoare triple {398318#true} ~tmp~48.base, ~tmp~48.offset := #t~ret863.base, #t~ret863.offset;havoc #t~ret863.base, #t~ret863.offset;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := ~tmp~48.base, ~tmp~48.offset; {398318#true} is VALID [2018-11-19 18:42:10,760 INFO L256 TraceCheckUtils]: 288: Hoare triple {398318#true} call #t~ret864.base, #t~ret864.offset := ldv_zalloc(48); {398318#true} is VALID [2018-11-19 18:42:10,760 INFO L273 TraceCheckUtils]: 289: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:10,761 INFO L273 TraceCheckUtils]: 290: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:10,761 INFO L273 TraceCheckUtils]: 291: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,761 INFO L268 TraceCheckUtils]: 292: Hoare quadruple {398318#true} {398318#true} #2625#return; {398318#true} is VALID [2018-11-19 18:42:10,761 INFO L273 TraceCheckUtils]: 293: Hoare triple {398318#true} ~tmp___0~20.base, ~tmp___0~20.offset := #t~ret864.base, #t~ret864.offset;havoc #t~ret864.base, #t~ret864.offset;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := ~tmp___0~20.base, ~tmp___0~20.offset; {398318#true} is VALID [2018-11-19 18:42:10,761 INFO L273 TraceCheckUtils]: 294: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,761 INFO L268 TraceCheckUtils]: 295: Hoare quadruple {398318#true} {398319#false} #3047#return; {398319#false} is VALID [2018-11-19 18:42:10,761 INFO L273 TraceCheckUtils]: 296: Hoare triple {398319#false} assume !(0 != ~ldv_retval_4~0); {398319#false} is VALID [2018-11-19 18:42:10,761 INFO L273 TraceCheckUtils]: 297: Hoare triple {398319#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,761 INFO L273 TraceCheckUtils]: 298: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,762 INFO L273 TraceCheckUtils]: 299: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,762 INFO L273 TraceCheckUtils]: 300: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,762 INFO L273 TraceCheckUtils]: 301: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,762 INFO L273 TraceCheckUtils]: 302: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,762 INFO L273 TraceCheckUtils]: 303: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,762 INFO L273 TraceCheckUtils]: 304: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,762 INFO L273 TraceCheckUtils]: 305: Hoare triple {398319#false} assume #t~switch909; {398319#false} is VALID [2018-11-19 18:42:10,762 INFO L273 TraceCheckUtils]: 306: Hoare triple {398319#false} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {398319#false} is VALID [2018-11-19 18:42:10,762 INFO L273 TraceCheckUtils]: 307: Hoare triple {398319#false} assume #t~switch937; {398319#false} is VALID [2018-11-19 18:42:10,762 INFO L273 TraceCheckUtils]: 308: Hoare triple {398319#false} assume 1 == ~ldv_state_variable_1~0; {398319#false} is VALID [2018-11-19 18:42:10,763 INFO L256 TraceCheckUtils]: 309: Hoare triple {398319#false} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {398318#true} is VALID [2018-11-19 18:42:10,763 INFO L273 TraceCheckUtils]: 310: Hoare triple {398318#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {398318#true} is VALID [2018-11-19 18:42:10,763 INFO L256 TraceCheckUtils]: 311: Hoare triple {398318#true} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {398318#true} is VALID [2018-11-19 18:42:10,763 INFO L273 TraceCheckUtils]: 312: Hoare triple {398318#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {398318#true} is VALID [2018-11-19 18:42:10,763 INFO L256 TraceCheckUtils]: 313: Hoare triple {398318#true} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {398318#true} is VALID [2018-11-19 18:42:10,763 INFO L273 TraceCheckUtils]: 314: Hoare triple {398318#true} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {398318#true} is VALID [2018-11-19 18:42:10,763 INFO L256 TraceCheckUtils]: 315: Hoare triple {398318#true} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {398318#true} is VALID [2018-11-19 18:42:10,763 INFO L273 TraceCheckUtils]: 316: Hoare triple {398318#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {398318#true} is VALID [2018-11-19 18:42:10,763 INFO L273 TraceCheckUtils]: 317: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,763 INFO L268 TraceCheckUtils]: 318: Hoare quadruple {398318#true} {398318#true} #2817#return; {398318#true} is VALID [2018-11-19 18:42:10,764 INFO L273 TraceCheckUtils]: 319: Hoare triple {398318#true} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {398318#true} is VALID [2018-11-19 18:42:10,764 INFO L273 TraceCheckUtils]: 320: Hoare triple {398318#true} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {398318#true} is VALID [2018-11-19 18:42:10,764 INFO L273 TraceCheckUtils]: 321: Hoare triple {398318#true} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {398318#true} is VALID [2018-11-19 18:42:10,764 INFO L273 TraceCheckUtils]: 322: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,764 INFO L268 TraceCheckUtils]: 323: Hoare quadruple {398318#true} {398318#true} #3151#return; {398318#true} is VALID [2018-11-19 18:42:10,764 INFO L273 TraceCheckUtils]: 324: Hoare triple {398318#true} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {398318#true} is VALID [2018-11-19 18:42:10,764 INFO L273 TraceCheckUtils]: 325: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,764 INFO L268 TraceCheckUtils]: 326: Hoare quadruple {398318#true} {398318#true} #3095#return; {398318#true} is VALID [2018-11-19 18:42:10,764 INFO L273 TraceCheckUtils]: 327: Hoare triple {398318#true} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {398318#true} is VALID [2018-11-19 18:42:10,765 INFO L256 TraceCheckUtils]: 328: Hoare triple {398318#true} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {398318#true} is VALID [2018-11-19 18:42:10,765 INFO L273 TraceCheckUtils]: 329: Hoare triple {398318#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {398318#true} is VALID [2018-11-19 18:42:10,765 INFO L256 TraceCheckUtils]: 330: Hoare triple {398318#true} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {398318#true} is VALID [2018-11-19 18:42:10,765 INFO L273 TraceCheckUtils]: 331: Hoare triple {398318#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {398318#true} is VALID [2018-11-19 18:42:10,765 INFO L256 TraceCheckUtils]: 332: Hoare triple {398318#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {398318#true} is VALID [2018-11-19 18:42:10,765 INFO L273 TraceCheckUtils]: 333: Hoare triple {398318#true} ~size := #in~size;~t := #in~t; {398318#true} is VALID [2018-11-19 18:42:10,765 INFO L256 TraceCheckUtils]: 334: Hoare triple {398318#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {398318#true} is VALID [2018-11-19 18:42:10,765 INFO L273 TraceCheckUtils]: 335: Hoare triple {398318#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {398318#true} is VALID [2018-11-19 18:42:10,765 INFO L273 TraceCheckUtils]: 336: Hoare triple {398318#true} assume !(0 != ~tmp___0~2);call #t~malloc130.base, #t~malloc130.offset := #Ultimate.alloc(~size);~tmp~8.base, ~tmp~8.offset := #t~malloc130.base, #t~malloc130.offset;~p~0.base, ~p~0.offset := ~tmp~8.base, ~tmp~8.offset;assume 0 != (if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~0.base, ~p~0.offset; {398318#true} is VALID [2018-11-19 18:42:10,765 INFO L273 TraceCheckUtils]: 337: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,766 INFO L268 TraceCheckUtils]: 338: Hoare quadruple {398318#true} {398318#true} #2691#return; {398318#true} is VALID [2018-11-19 18:42:10,766 INFO L273 TraceCheckUtils]: 339: Hoare triple {398318#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {398318#true} is VALID [2018-11-19 18:42:10,766 INFO L273 TraceCheckUtils]: 340: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,766 INFO L268 TraceCheckUtils]: 341: Hoare quadruple {398318#true} {398318#true} #2781#return; {398318#true} is VALID [2018-11-19 18:42:10,766 INFO L273 TraceCheckUtils]: 342: Hoare triple {398318#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {398318#true} is VALID [2018-11-19 18:42:10,766 INFO L273 TraceCheckUtils]: 343: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,766 INFO L268 TraceCheckUtils]: 344: Hoare quadruple {398318#true} {398318#true} #2779#return; {398318#true} is VALID [2018-11-19 18:42:10,766 INFO L273 TraceCheckUtils]: 345: Hoare triple {398318#true} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {398318#true} is VALID [2018-11-19 18:42:10,766 INFO L273 TraceCheckUtils]: 346: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,767 INFO L268 TraceCheckUtils]: 347: Hoare quadruple {398318#true} {398318#true} #3097#return; {398318#true} is VALID [2018-11-19 18:42:10,767 INFO L273 TraceCheckUtils]: 348: Hoare triple {398318#true} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {398318#true} is VALID [2018-11-19 18:42:10,767 INFO L273 TraceCheckUtils]: 349: Hoare triple {398318#true} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {398318#true} is VALID [2018-11-19 18:42:10,767 INFO L256 TraceCheckUtils]: 350: Hoare triple {398318#true} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {398318#true} is VALID [2018-11-19 18:42:10,767 INFO L273 TraceCheckUtils]: 351: Hoare triple {398318#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {398318#true} is VALID [2018-11-19 18:42:10,767 INFO L273 TraceCheckUtils]: 352: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,767 INFO L268 TraceCheckUtils]: 353: Hoare quadruple {398318#true} {398318#true} #3099#return; {398318#true} is VALID [2018-11-19 18:42:10,767 INFO L256 TraceCheckUtils]: 354: Hoare triple {398318#true} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {398318#true} is VALID [2018-11-19 18:42:10,767 INFO L273 TraceCheckUtils]: 355: Hoare triple {398318#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {398318#true} is VALID [2018-11-19 18:42:10,767 INFO L273 TraceCheckUtils]: 356: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,768 INFO L268 TraceCheckUtils]: 357: Hoare quadruple {398318#true} {398318#true} #3101#return; {398318#true} is VALID [2018-11-19 18:42:10,768 INFO L256 TraceCheckUtils]: 358: Hoare triple {398318#true} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {398318#true} is VALID [2018-11-19 18:42:10,768 INFO L273 TraceCheckUtils]: 359: Hoare triple {398318#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {398318#true} is VALID [2018-11-19 18:42:10,768 INFO L256 TraceCheckUtils]: 360: Hoare triple {398318#true} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {398318#true} is VALID [2018-11-19 18:42:10,768 INFO L273 TraceCheckUtils]: 361: Hoare triple {398318#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {398318#true} is VALID [2018-11-19 18:42:10,768 INFO L273 TraceCheckUtils]: 362: Hoare triple {398318#true} assume !(0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616); {398318#true} is VALID [2018-11-19 18:42:10,768 INFO L273 TraceCheckUtils]: 363: Hoare triple {398318#true} assume !(0 == ~buflen~0 % 4294967296 % 18446744073709551616); {398318#true} is VALID [2018-11-19 18:42:10,768 INFO L273 TraceCheckUtils]: 364: Hoare triple {398318#true} assume 0 != ~buflen~0 % 4294967296 % 18446744073709551616; {398318#true} is VALID [2018-11-19 18:42:10,768 INFO L273 TraceCheckUtils]: 365: Hoare triple {398318#true} ~union_desc~0.base, ~union_desc~0.offset := ~buf~0.base, ~buf~0.offset;call #t~mem642 := read~int(~union_desc~0.base, 1 + ~union_desc~0.offset, 1);#t~short644 := 36 == #t~mem642 % 256 % 4294967296; {398318#true} is VALID [2018-11-19 18:42:10,769 INFO L273 TraceCheckUtils]: 366: Hoare triple {398318#true} assume #t~short644;call #t~mem643 := read~int(~union_desc~0.base, 2 + ~union_desc~0.offset, 1);#t~short644 := 6 == #t~mem643 % 256 % 4294967296; {398318#true} is VALID [2018-11-19 18:42:10,769 INFO L273 TraceCheckUtils]: 367: Hoare triple {398318#true} assume #t~short644;havoc #t~mem643;havoc #t~mem642;havoc #t~short644;call write~$Pointer$(#t~string645.base, #t~string645.offset, ~#descriptor~3.base, ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string646.base, #t~string646.offset, ~#descriptor~3.base, 8 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string647.base, #t~string647.offset, ~#descriptor~3.base, 16 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string648.base, #t~string648.offset, ~#descriptor~3.base, 24 + ~#descriptor~3.offset, 8);call write~int(1479, ~#descriptor~3.base, 32 + ~#descriptor~3.offset, 4);call write~int(0, ~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1);call #t~mem649 := read~int(~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1); {398318#true} is VALID [2018-11-19 18:42:10,769 INFO L256 TraceCheckUtils]: 368: Hoare triple {398318#true} call #t~ret650 := ldv__builtin_expect(~bitwiseAnd(#t~mem649 % 256, 1), 0); {398318#true} is VALID [2018-11-19 18:42:10,769 INFO L273 TraceCheckUtils]: 369: Hoare triple {398318#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {398318#true} is VALID [2018-11-19 18:42:10,769 INFO L273 TraceCheckUtils]: 370: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,769 INFO L268 TraceCheckUtils]: 371: Hoare quadruple {398318#true} {398318#true} #3075#return; {398318#true} is VALID [2018-11-19 18:42:10,769 INFO L273 TraceCheckUtils]: 372: Hoare triple {398318#true} assume -9223372036854775808 <= #t~ret650 && #t~ret650 <= 9223372036854775807;~tmp~36 := #t~ret650;havoc #t~ret650;havoc #t~mem649; {398318#true} is VALID [2018-11-19 18:42:10,769 INFO L273 TraceCheckUtils]: 373: Hoare triple {398318#true} assume !(0 != ~tmp~36); {398318#true} is VALID [2018-11-19 18:42:10,769 INFO L273 TraceCheckUtils]: 374: Hoare triple {398318#true} #res.base, #res.offset := ~union_desc~0.base, ~union_desc~0.offset;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {398318#true} is VALID [2018-11-19 18:42:10,769 INFO L273 TraceCheckUtils]: 375: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,770 INFO L268 TraceCheckUtils]: 376: Hoare quadruple {398318#true} {398318#true} #3137#return; {398318#true} is VALID [2018-11-19 18:42:10,770 INFO L273 TraceCheckUtils]: 377: Hoare triple {398318#true} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {398318#true} is VALID [2018-11-19 18:42:10,770 INFO L273 TraceCheckUtils]: 378: Hoare triple {398318#true} assume !(0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616);call #t~mem658.base, #t~mem658.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem659 := read~int(~union_desc~1.base, 3 + ~union_desc~1.offset, 1);call #t~ret660.base, #t~ret660.offset := usb_ifnum_to_if(#t~mem658.base, #t~mem658.offset, #t~mem659 % 256);call write~$Pointer$(#t~ret660.base, #t~ret660.offset, ~pcu.base, 79 + ~pcu.offset, 8);havoc #t~mem659;havoc #t~ret660.base, #t~ret660.offset;havoc #t~mem658.base, #t~mem658.offset;call #t~mem661.base, #t~mem661.offset := read~$Pointer$(~pcu.base, 79 + ~pcu.offset, 8);call #t~mem662.base, #t~mem662.offset := read~$Pointer$(#t~mem661.base, 8 + #t~mem661.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem662.base, #t~mem662.offset;havoc #t~mem662.base, #t~mem662.offset;havoc #t~mem661.base, #t~mem661.offset;call #t~mem663.base, #t~mem663.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem663.base, #t~mem663.offset, ~pcu.base, 87 + ~pcu.offset, 8);havoc #t~mem663.base, #t~mem663.offset;call #t~mem664.base, #t~mem664.offset := read~$Pointer$(~pcu.base, 87 + ~pcu.offset, 8); {398318#true} is VALID [2018-11-19 18:42:10,770 INFO L256 TraceCheckUtils]: 379: Hoare triple {398318#true} call #t~ret665 := usb_endpoint_maxp(#t~mem664.base, #t~mem664.offset); {398318#true} is VALID [2018-11-19 18:42:10,770 INFO L273 TraceCheckUtils]: 380: Hoare triple {398318#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {398318#true} is VALID [2018-11-19 18:42:10,770 INFO L273 TraceCheckUtils]: 381: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,770 INFO L268 TraceCheckUtils]: 382: Hoare quadruple {398318#true} {398318#true} #3139#return; {398318#true} is VALID [2018-11-19 18:42:10,770 INFO L273 TraceCheckUtils]: 383: Hoare triple {398318#true} assume -2147483648 <= #t~ret665 && #t~ret665 <= 2147483647;~tmp~37 := #t~ret665;havoc #t~ret665;havoc #t~mem664.base, #t~mem664.offset;call write~int(~tmp~37, ~pcu.base, 119 + ~pcu.offset, 4);call #t~mem666.base, #t~mem666.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem667 := read~int(~union_desc~1.base, 4 + ~union_desc~1.offset, 1);call #t~ret668.base, #t~ret668.offset := usb_ifnum_to_if(#t~mem666.base, #t~mem666.offset, #t~mem667 % 256);call write~$Pointer$(#t~ret668.base, #t~ret668.offset, ~pcu.base, 123 + ~pcu.offset, 8);havoc #t~mem666.base, #t~mem666.offset;havoc #t~mem667;havoc #t~ret668.base, #t~ret668.offset;call #t~mem669.base, #t~mem669.offset := read~$Pointer$(~pcu.base, 123 + ~pcu.offset, 8);call #t~mem670.base, #t~mem670.offset := read~$Pointer$(#t~mem669.base, 8 + #t~mem669.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem670.base, #t~mem670.offset;havoc #t~mem670.base, #t~mem670.offset;havoc #t~mem669.base, #t~mem669.offset;call #t~mem671 := read~int(~alt~0.base, 4 + ~alt~0.offset, 1); {398318#true} is VALID [2018-11-19 18:42:10,770 INFO L273 TraceCheckUtils]: 384: Hoare triple {398318#true} assume !(2 != #t~mem671 % 256 % 4294967296);havoc #t~mem671;call #t~mem676.base, #t~mem676.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem676.base, #t~mem676.offset, ~pcu.base, 167 + ~pcu.offset, 8);havoc #t~mem676.base, #t~mem676.offset;call #t~mem677.base, #t~mem677.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {398318#true} is VALID [2018-11-19 18:42:10,771 INFO L256 TraceCheckUtils]: 385: Hoare triple {398318#true} call #t~ret678 := usb_endpoint_is_bulk_out(#t~mem677.base, #t~mem677.offset); {398318#true} is VALID [2018-11-19 18:42:10,771 INFO L273 TraceCheckUtils]: 386: Hoare triple {398318#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~4;havoc ~tmp___0~1;havoc ~tmp___1~1; {398318#true} is VALID [2018-11-19 18:42:10,771 INFO L256 TraceCheckUtils]: 387: Hoare triple {398318#true} call #t~ret25 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {398318#true} is VALID [2018-11-19 18:42:10,771 INFO L273 TraceCheckUtils]: 388: Hoare triple {398318#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {398318#true} is VALID [2018-11-19 18:42:10,771 INFO L273 TraceCheckUtils]: 389: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,771 INFO L268 TraceCheckUtils]: 390: Hoare quadruple {398318#true} {398318#true} #2887#return; {398318#true} is VALID [2018-11-19 18:42:10,771 INFO L273 TraceCheckUtils]: 391: Hoare triple {398318#true} assume -2147483648 <= #t~ret25 && #t~ret25 <= 2147483647;~tmp~4 := #t~ret25;havoc #t~ret25; {398318#true} is VALID [2018-11-19 18:42:10,771 INFO L273 TraceCheckUtils]: 392: Hoare triple {398318#true} assume 0 != ~tmp~4; {398318#true} is VALID [2018-11-19 18:42:10,771 INFO L256 TraceCheckUtils]: 393: Hoare triple {398318#true} call #t~ret26 := usb_endpoint_dir_out(~epd.base, ~epd.offset); {398318#true} is VALID [2018-11-19 18:42:10,771 INFO L273 TraceCheckUtils]: 394: Hoare triple {398318#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem21 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem21 % 256 % 256 <= 127 then #t~mem21 % 256 % 256 else #t~mem21 % 256 % 256 - 256) >= 0 then 1 else 0);havoc #t~mem21; {398318#true} is VALID [2018-11-19 18:42:10,772 INFO L273 TraceCheckUtils]: 395: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,772 INFO L268 TraceCheckUtils]: 396: Hoare quadruple {398318#true} {398318#true} #2889#return; {398318#true} is VALID [2018-11-19 18:42:10,772 INFO L273 TraceCheckUtils]: 397: Hoare triple {398318#true} assume -2147483648 <= #t~ret26 && #t~ret26 <= 2147483647;~tmp___0~1 := #t~ret26;havoc #t~ret26; {398318#true} is VALID [2018-11-19 18:42:10,772 INFO L273 TraceCheckUtils]: 398: Hoare triple {398318#true} assume 0 != ~tmp___0~1;~tmp___1~1 := 1; {398318#true} is VALID [2018-11-19 18:42:10,772 INFO L273 TraceCheckUtils]: 399: Hoare triple {398318#true} #res := ~tmp___1~1; {398318#true} is VALID [2018-11-19 18:42:10,772 INFO L273 TraceCheckUtils]: 400: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,772 INFO L268 TraceCheckUtils]: 401: Hoare quadruple {398318#true} {398318#true} #3141#return; {398318#true} is VALID [2018-11-19 18:42:10,772 INFO L273 TraceCheckUtils]: 402: Hoare triple {398318#true} assume -2147483648 <= #t~ret678 && #t~ret678 <= 2147483647;~tmp___0~16 := #t~ret678;havoc #t~mem677.base, #t~mem677.offset;havoc #t~ret678; {398318#true} is VALID [2018-11-19 18:42:10,772 INFO L273 TraceCheckUtils]: 403: Hoare triple {398318#true} assume !(0 == ~tmp___0~16);call #t~mem682.base, #t~mem682.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {398318#true} is VALID [2018-11-19 18:42:10,773 INFO L256 TraceCheckUtils]: 404: Hoare triple {398318#true} call #t~ret683 := usb_endpoint_maxp(#t~mem682.base, #t~mem682.offset); {398318#true} is VALID [2018-11-19 18:42:10,773 INFO L273 TraceCheckUtils]: 405: Hoare triple {398318#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {398318#true} is VALID [2018-11-19 18:42:10,773 INFO L273 TraceCheckUtils]: 406: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,773 INFO L268 TraceCheckUtils]: 407: Hoare quadruple {398318#true} {398318#true} #3143#return; {398318#true} is VALID [2018-11-19 18:42:10,773 INFO L273 TraceCheckUtils]: 408: Hoare triple {398318#true} assume -2147483648 <= #t~ret683 && #t~ret683 <= 2147483647;~tmp___1~7 := #t~ret683;havoc #t~mem682.base, #t~mem682.offset;havoc #t~ret683;call write~int(~tmp___1~7, ~pcu.base, 183 + ~pcu.offset, 4);call #t~mem684 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {398318#true} is VALID [2018-11-19 18:42:10,773 INFO L273 TraceCheckUtils]: 409: Hoare triple {398318#true} assume !(#t~mem684 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem684;call #t~mem689.base, #t~mem689.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem689.base, 63 + #t~mem689.offset, ~pcu.base, 131 + ~pcu.offset, 8);havoc #t~mem689.base, #t~mem689.offset;call #t~mem690.base, #t~mem690.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {398318#true} is VALID [2018-11-19 18:42:10,773 INFO L256 TraceCheckUtils]: 410: Hoare triple {398318#true} call #t~ret691 := usb_endpoint_is_bulk_in(#t~mem690.base, #t~mem690.offset); {398318#true} is VALID [2018-11-19 18:42:10,773 INFO L273 TraceCheckUtils]: 411: Hoare triple {398318#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~3;havoc ~tmp___0~0;havoc ~tmp___1~0; {398318#true} is VALID [2018-11-19 18:42:10,773 INFO L256 TraceCheckUtils]: 412: Hoare triple {398318#true} call #t~ret23 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {398318#true} is VALID [2018-11-19 18:42:10,773 INFO L273 TraceCheckUtils]: 413: Hoare triple {398318#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {398318#true} is VALID [2018-11-19 18:42:10,774 INFO L273 TraceCheckUtils]: 414: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,774 INFO L268 TraceCheckUtils]: 415: Hoare quadruple {398318#true} {398318#true} #2915#return; {398318#true} is VALID [2018-11-19 18:42:10,774 INFO L273 TraceCheckUtils]: 416: Hoare triple {398318#true} assume -2147483648 <= #t~ret23 && #t~ret23 <= 2147483647;~tmp~3 := #t~ret23;havoc #t~ret23; {398318#true} is VALID [2018-11-19 18:42:10,774 INFO L273 TraceCheckUtils]: 417: Hoare triple {398318#true} assume 0 != ~tmp~3; {398318#true} is VALID [2018-11-19 18:42:10,774 INFO L256 TraceCheckUtils]: 418: Hoare triple {398318#true} call #t~ret24 := usb_endpoint_dir_in(~epd.base, ~epd.offset); {398318#true} is VALID [2018-11-19 18:42:10,774 INFO L273 TraceCheckUtils]: 419: Hoare triple {398318#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem20 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem20 % 256 % 256 <= 127 then #t~mem20 % 256 % 256 else #t~mem20 % 256 % 256 - 256) < 0 then 1 else 0);havoc #t~mem20; {398318#true} is VALID [2018-11-19 18:42:10,774 INFO L273 TraceCheckUtils]: 420: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,774 INFO L268 TraceCheckUtils]: 421: Hoare quadruple {398318#true} {398318#true} #2917#return; {398318#true} is VALID [2018-11-19 18:42:10,774 INFO L273 TraceCheckUtils]: 422: Hoare triple {398318#true} assume -2147483648 <= #t~ret24 && #t~ret24 <= 2147483647;~tmp___0~0 := #t~ret24;havoc #t~ret24; {398318#true} is VALID [2018-11-19 18:42:10,775 INFO L273 TraceCheckUtils]: 423: Hoare triple {398318#true} assume 0 != ~tmp___0~0;~tmp___1~0 := 1; {398318#true} is VALID [2018-11-19 18:42:10,775 INFO L273 TraceCheckUtils]: 424: Hoare triple {398318#true} #res := ~tmp___1~0; {398318#true} is VALID [2018-11-19 18:42:10,775 INFO L273 TraceCheckUtils]: 425: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,775 INFO L268 TraceCheckUtils]: 426: Hoare quadruple {398318#true} {398318#true} #3145#return; {398318#true} is VALID [2018-11-19 18:42:10,775 INFO L273 TraceCheckUtils]: 427: Hoare triple {398318#true} assume -2147483648 <= #t~ret691 && #t~ret691 <= 2147483647;~tmp___2~3 := #t~ret691;havoc #t~ret691;havoc #t~mem690.base, #t~mem690.offset; {398318#true} is VALID [2018-11-19 18:42:10,775 INFO L273 TraceCheckUtils]: 428: Hoare triple {398318#true} assume !(0 == ~tmp___2~3);call #t~mem695.base, #t~mem695.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {398318#true} is VALID [2018-11-19 18:42:10,775 INFO L256 TraceCheckUtils]: 429: Hoare triple {398318#true} call #t~ret696 := usb_endpoint_maxp(#t~mem695.base, #t~mem695.offset); {398318#true} is VALID [2018-11-19 18:42:10,775 INFO L273 TraceCheckUtils]: 430: Hoare triple {398318#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {398318#true} is VALID [2018-11-19 18:42:10,775 INFO L273 TraceCheckUtils]: 431: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,775 INFO L268 TraceCheckUtils]: 432: Hoare quadruple {398318#true} {398318#true} #3147#return; {398318#true} is VALID [2018-11-19 18:42:10,776 INFO L273 TraceCheckUtils]: 433: Hoare triple {398318#true} assume -2147483648 <= #t~ret696 && #t~ret696 <= 2147483647;~tmp___3~2 := #t~ret696;havoc #t~ret696;havoc #t~mem695.base, #t~mem695.offset;call write~int(~tmp___3~2, ~pcu.base, 163 + ~pcu.offset, 4);call #t~mem697 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {398318#true} is VALID [2018-11-19 18:42:10,776 INFO L273 TraceCheckUtils]: 434: Hoare triple {398318#true} assume !(#t~mem697 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem697;#res := 0; {398318#true} is VALID [2018-11-19 18:42:10,776 INFO L273 TraceCheckUtils]: 435: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,776 INFO L268 TraceCheckUtils]: 436: Hoare quadruple {398318#true} {398318#true} #3103#return; {398318#true} is VALID [2018-11-19 18:42:10,776 INFO L273 TraceCheckUtils]: 437: Hoare triple {398318#true} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {398318#true} is VALID [2018-11-19 18:42:10,776 INFO L273 TraceCheckUtils]: 438: Hoare triple {398318#true} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {398318#true} is VALID [2018-11-19 18:42:10,776 INFO L273 TraceCheckUtils]: 439: Hoare triple {398318#true} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {398318#true} is VALID [2018-11-19 18:42:10,776 INFO L256 TraceCheckUtils]: 440: Hoare triple {398318#true} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {398318#true} is VALID [2018-11-19 18:42:10,776 INFO L273 TraceCheckUtils]: 441: Hoare triple {398318#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {398318#true} is VALID [2018-11-19 18:42:10,777 INFO L256 TraceCheckUtils]: 442: Hoare triple {398318#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {398318#true} is VALID [2018-11-19 18:42:10,777 INFO L273 TraceCheckUtils]: 443: Hoare triple {398318#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {398318#true} is VALID [2018-11-19 18:42:10,777 INFO L273 TraceCheckUtils]: 444: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,777 INFO L268 TraceCheckUtils]: 445: Hoare quadruple {398318#true} {398318#true} #2541#return; {398318#true} is VALID [2018-11-19 18:42:10,777 INFO L273 TraceCheckUtils]: 446: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,777 INFO L268 TraceCheckUtils]: 447: Hoare quadruple {398318#true} {398318#true} #3105#return; {398318#true} is VALID [2018-11-19 18:42:10,777 INFO L273 TraceCheckUtils]: 448: Hoare triple {398318#true} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {398318#true} is VALID [2018-11-19 18:42:10,777 INFO L256 TraceCheckUtils]: 449: Hoare triple {398318#true} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {398318#true} is VALID [2018-11-19 18:42:10,777 INFO L273 TraceCheckUtils]: 450: Hoare triple {398318#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {398318#true} is VALID [2018-11-19 18:42:10,777 INFO L256 TraceCheckUtils]: 451: Hoare triple {398318#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {398318#true} is VALID [2018-11-19 18:42:10,778 INFO L273 TraceCheckUtils]: 452: Hoare triple {398318#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {398318#true} is VALID [2018-11-19 18:42:10,778 INFO L273 TraceCheckUtils]: 453: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,778 INFO L268 TraceCheckUtils]: 454: Hoare quadruple {398318#true} {398318#true} #2541#return; {398318#true} is VALID [2018-11-19 18:42:10,778 INFO L273 TraceCheckUtils]: 455: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,778 INFO L268 TraceCheckUtils]: 456: Hoare quadruple {398318#true} {398318#true} #3107#return; {398318#true} is VALID [2018-11-19 18:42:10,778 INFO L273 TraceCheckUtils]: 457: Hoare triple {398318#true} havoc #t~mem837.base, #t~mem837.offset; {398318#true} is VALID [2018-11-19 18:42:10,778 INFO L256 TraceCheckUtils]: 458: Hoare triple {398318#true} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {398318#true} is VALID [2018-11-19 18:42:10,778 INFO L273 TraceCheckUtils]: 459: Hoare triple {398318#true} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {398318#true} is VALID [2018-11-19 18:42:10,778 INFO L273 TraceCheckUtils]: 460: Hoare triple {398318#true} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {398318#true} is VALID [2018-11-19 18:42:10,779 INFO L256 TraceCheckUtils]: 461: Hoare triple {398318#true} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {398318#true} is VALID [2018-11-19 18:42:10,779 INFO L273 TraceCheckUtils]: 462: Hoare triple {398318#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {398318#true} is VALID [2018-11-19 18:42:10,779 INFO L256 TraceCheckUtils]: 463: Hoare triple {398318#true} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {398318#true} is VALID [2018-11-19 18:42:10,779 INFO L273 TraceCheckUtils]: 464: Hoare triple {398318#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {398318#true} is VALID [2018-11-19 18:42:10,779 INFO L256 TraceCheckUtils]: 465: Hoare triple {398318#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {398318#true} is VALID [2018-11-19 18:42:10,779 INFO L273 TraceCheckUtils]: 466: Hoare triple {398318#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {398318#true} is VALID [2018-11-19 18:42:10,779 INFO L273 TraceCheckUtils]: 467: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,779 INFO L268 TraceCheckUtils]: 468: Hoare quadruple {398318#true} {398318#true} #2605#return; {398318#true} is VALID [2018-11-19 18:42:10,779 INFO L273 TraceCheckUtils]: 469: Hoare triple {398318#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {398318#true} is VALID [2018-11-19 18:42:10,779 INFO L256 TraceCheckUtils]: 470: Hoare triple {398318#true} call #t~ret965 := ldv_undef_int(); {398318#true} is VALID [2018-11-19 18:42:10,780 INFO L273 TraceCheckUtils]: 471: Hoare triple {398318#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {398318#true} is VALID [2018-11-19 18:42:10,780 INFO L273 TraceCheckUtils]: 472: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,780 INFO L268 TraceCheckUtils]: 473: Hoare quadruple {398318#true} {398318#true} #2607#return; {398318#true} is VALID [2018-11-19 18:42:10,780 INFO L273 TraceCheckUtils]: 474: Hoare triple {398318#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {398318#true} is VALID [2018-11-19 18:42:10,780 INFO L273 TraceCheckUtils]: 475: Hoare triple {398318#true} assume 0 != ~tmp___0~26; {398318#true} is VALID [2018-11-19 18:42:10,780 INFO L273 TraceCheckUtils]: 476: Hoare triple {398318#true} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {398318#true} is VALID [2018-11-19 18:42:10,780 INFO L273 TraceCheckUtils]: 477: Hoare triple {398318#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {398318#true} is VALID [2018-11-19 18:42:10,780 INFO L273 TraceCheckUtils]: 478: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,780 INFO L268 TraceCheckUtils]: 479: Hoare quadruple {398318#true} {398318#true} #3135#return; {398318#true} is VALID [2018-11-19 18:42:10,781 INFO L273 TraceCheckUtils]: 480: Hoare triple {398318#true} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {398318#true} is VALID [2018-11-19 18:42:10,781 INFO L273 TraceCheckUtils]: 481: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,781 INFO L268 TraceCheckUtils]: 482: Hoare quadruple {398318#true} {398318#true} #2709#return; {398318#true} is VALID [2018-11-19 18:42:10,781 INFO L273 TraceCheckUtils]: 483: Hoare triple {398318#true} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {398318#true} is VALID [2018-11-19 18:42:10,781 INFO L273 TraceCheckUtils]: 484: Hoare triple {398318#true} assume 0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616;havoc #t~mem561.base, #t~mem561.offset;havoc #t~nondet562;call #t~mem563.base, #t~mem563.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem563.base, #t~mem563.offset;~error~18 := -12; {398318#true} is VALID [2018-11-19 18:42:10,781 INFO L273 TraceCheckUtils]: 485: Hoare triple {398318#true} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {398318#true} is VALID [2018-11-19 18:42:10,781 INFO L273 TraceCheckUtils]: 486: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,781 INFO L268 TraceCheckUtils]: 487: Hoare quadruple {398318#true} {398318#true} #3109#return; {398318#true} is VALID [2018-11-19 18:42:10,781 INFO L273 TraceCheckUtils]: 488: Hoare triple {398318#true} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {398318#true} is VALID [2018-11-19 18:42:10,781 INFO L273 TraceCheckUtils]: 489: Hoare triple {398318#true} assume 0 != ~error~25; {398318#true} is VALID [2018-11-19 18:42:10,782 INFO L273 TraceCheckUtils]: 490: Hoare triple {398318#true} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {398318#true} is VALID [2018-11-19 18:42:10,782 INFO L273 TraceCheckUtils]: 491: Hoare triple {398318#true} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {398318#true} is VALID [2018-11-19 18:42:10,782 INFO L273 TraceCheckUtils]: 492: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,782 INFO L268 TraceCheckUtils]: 493: Hoare quadruple {398318#true} {398319#false} #3015#return; {398319#false} is VALID [2018-11-19 18:42:10,782 INFO L273 TraceCheckUtils]: 494: Hoare triple {398319#false} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {398319#false} is VALID [2018-11-19 18:42:10,782 INFO L273 TraceCheckUtils]: 495: Hoare triple {398319#false} assume !(0 == ~ldv_retval_3~0); {398319#false} is VALID [2018-11-19 18:42:10,782 INFO L273 TraceCheckUtils]: 496: Hoare triple {398319#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,782 INFO L273 TraceCheckUtils]: 497: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,782 INFO L273 TraceCheckUtils]: 498: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,783 INFO L273 TraceCheckUtils]: 499: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,783 INFO L273 TraceCheckUtils]: 500: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,783 INFO L273 TraceCheckUtils]: 501: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,783 INFO L273 TraceCheckUtils]: 502: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,783 INFO L273 TraceCheckUtils]: 503: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,783 INFO L273 TraceCheckUtils]: 504: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,783 INFO L273 TraceCheckUtils]: 505: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:10,783 INFO L273 TraceCheckUtils]: 506: Hoare triple {398319#false} assume #t~switch909; {398319#false} is VALID [2018-11-19 18:42:10,783 INFO L273 TraceCheckUtils]: 507: Hoare triple {398319#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {398319#false} is VALID [2018-11-19 18:42:10,783 INFO L273 TraceCheckUtils]: 508: Hoare triple {398319#false} assume #t~switch947; {398319#false} is VALID [2018-11-19 18:42:10,784 INFO L273 TraceCheckUtils]: 509: Hoare triple {398319#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {398319#false} is VALID [2018-11-19 18:42:10,784 INFO L256 TraceCheckUtils]: 510: Hoare triple {398319#false} call ims_pcu_driver_exit(); {398318#true} is VALID [2018-11-19 18:42:10,784 INFO L256 TraceCheckUtils]: 511: Hoare triple {398318#true} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {398318#true} is VALID [2018-11-19 18:42:10,784 INFO L273 TraceCheckUtils]: 512: Hoare triple {398318#true} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {398318#true} is VALID [2018-11-19 18:42:10,784 INFO L273 TraceCheckUtils]: 513: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,784 INFO L268 TraceCheckUtils]: 514: Hoare quadruple {398318#true} {398318#true} #2597#return; {398318#true} is VALID [2018-11-19 18:42:10,784 INFO L273 TraceCheckUtils]: 515: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:10,784 INFO L268 TraceCheckUtils]: 516: Hoare quadruple {398318#true} {398319#false} #3033#return; {398319#false} is VALID [2018-11-19 18:42:10,784 INFO L273 TraceCheckUtils]: 517: Hoare triple {398319#false} ~ldv_state_variable_0~0 := 2; {398319#false} is VALID [2018-11-19 18:42:10,785 INFO L256 TraceCheckUtils]: 518: Hoare triple {398319#false} call ldv_check_final_state(); {398319#false} is VALID [2018-11-19 18:42:10,785 INFO L273 TraceCheckUtils]: 519: Hoare triple {398319#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {398319#false} is VALID [2018-11-19 18:42:10,785 INFO L256 TraceCheckUtils]: 520: Hoare triple {398319#false} call ldv_error(); {398319#false} is VALID [2018-11-19 18:42:10,785 INFO L273 TraceCheckUtils]: 521: Hoare triple {398319#false} assume !false; {398319#false} is VALID [2018-11-19 18:42:10,908 INFO L134 CoverageAnalysis]: Checked inductivity of 2723 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2720 trivial. 0 not checked. [2018-11-19 18:42:10,908 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-19 18:42:10,909 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-19 18:42:10,921 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:42:11,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:42:11,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:42:12,000 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-19 18:42:12,317 INFO L256 TraceCheckUtils]: 0: Hoare triple {398318#true} call ULTIMATE.init(); {398318#true} is VALID [2018-11-19 18:42:12,317 INFO L273 TraceCheckUtils]: 1: Hoare triple {398318#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,318 INFO L273 TraceCheckUtils]: 2: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,318 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {398318#true} {398318#true} #3175#return; {398318#true} is VALID [2018-11-19 18:42:12,318 INFO L256 TraceCheckUtils]: 4: Hoare triple {398318#true} call #t~ret973 := main(); {398318#true} is VALID [2018-11-19 18:42:12,318 INFO L273 TraceCheckUtils]: 5: Hoare triple {398318#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {398318#true} is VALID [2018-11-19 18:42:12,318 INFO L256 TraceCheckUtils]: 6: Hoare triple {398318#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:12,319 INFO L273 TraceCheckUtils]: 7: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,319 INFO L273 TraceCheckUtils]: 8: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,319 INFO L273 TraceCheckUtils]: 9: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,319 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {398318#true} {398318#true} #2927#return; {398318#true} is VALID [2018-11-19 18:42:12,319 INFO L273 TraceCheckUtils]: 11: Hoare triple {398318#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {398318#true} is VALID [2018-11-19 18:42:12,320 INFO L256 TraceCheckUtils]: 12: Hoare triple {398318#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:12,320 INFO L273 TraceCheckUtils]: 13: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,320 INFO L273 TraceCheckUtils]: 14: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,320 INFO L273 TraceCheckUtils]: 15: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,320 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {398318#true} {398318#true} #2929#return; {398318#true} is VALID [2018-11-19 18:42:12,320 INFO L273 TraceCheckUtils]: 17: Hoare triple {398318#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {398318#true} is VALID [2018-11-19 18:42:12,321 INFO L256 TraceCheckUtils]: 18: Hoare triple {398318#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:12,321 INFO L273 TraceCheckUtils]: 19: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,321 INFO L273 TraceCheckUtils]: 20: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,321 INFO L273 TraceCheckUtils]: 21: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,321 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {398318#true} {398318#true} #2931#return; {398318#true} is VALID [2018-11-19 18:42:12,321 INFO L273 TraceCheckUtils]: 23: Hoare triple {398318#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {398318#true} is VALID [2018-11-19 18:42:12,322 INFO L256 TraceCheckUtils]: 24: Hoare triple {398318#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:12,322 INFO L273 TraceCheckUtils]: 25: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,322 INFO L273 TraceCheckUtils]: 26: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,322 INFO L273 TraceCheckUtils]: 27: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,322 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {398318#true} {398318#true} #2933#return; {398318#true} is VALID [2018-11-19 18:42:12,322 INFO L273 TraceCheckUtils]: 29: Hoare triple {398318#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {398318#true} is VALID [2018-11-19 18:42:12,322 INFO L256 TraceCheckUtils]: 30: Hoare triple {398318#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {398318#true} is VALID [2018-11-19 18:42:12,322 INFO L273 TraceCheckUtils]: 31: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,323 INFO L273 TraceCheckUtils]: 32: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,323 INFO L273 TraceCheckUtils]: 33: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,323 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {398318#true} {398318#true} #2935#return; {398318#true} is VALID [2018-11-19 18:42:12,323 INFO L273 TraceCheckUtils]: 35: Hoare triple {398318#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {398318#true} is VALID [2018-11-19 18:42:12,323 INFO L256 TraceCheckUtils]: 36: Hoare triple {398318#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:12,323 INFO L273 TraceCheckUtils]: 37: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,323 INFO L273 TraceCheckUtils]: 38: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,323 INFO L273 TraceCheckUtils]: 39: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,323 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {398318#true} {398318#true} #2937#return; {398318#true} is VALID [2018-11-19 18:42:12,324 INFO L273 TraceCheckUtils]: 41: Hoare triple {398318#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {398318#true} is VALID [2018-11-19 18:42:12,324 INFO L256 TraceCheckUtils]: 42: Hoare triple {398318#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {398318#true} is VALID [2018-11-19 18:42:12,324 INFO L273 TraceCheckUtils]: 43: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,324 INFO L273 TraceCheckUtils]: 44: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,324 INFO L273 TraceCheckUtils]: 45: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,324 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {398318#true} {398318#true} #2939#return; {398318#true} is VALID [2018-11-19 18:42:12,324 INFO L273 TraceCheckUtils]: 47: Hoare triple {398318#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {398318#true} is VALID [2018-11-19 18:42:12,324 INFO L256 TraceCheckUtils]: 48: Hoare triple {398318#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:12,324 INFO L273 TraceCheckUtils]: 49: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,325 INFO L273 TraceCheckUtils]: 50: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,325 INFO L273 TraceCheckUtils]: 51: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,325 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {398318#true} {398318#true} #2941#return; {398318#true} is VALID [2018-11-19 18:42:12,325 INFO L273 TraceCheckUtils]: 53: Hoare triple {398318#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {398318#true} is VALID [2018-11-19 18:42:12,325 INFO L256 TraceCheckUtils]: 54: Hoare triple {398318#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:12,325 INFO L273 TraceCheckUtils]: 55: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,325 INFO L273 TraceCheckUtils]: 56: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,325 INFO L273 TraceCheckUtils]: 57: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,325 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {398318#true} {398318#true} #2943#return; {398318#true} is VALID [2018-11-19 18:42:12,326 INFO L273 TraceCheckUtils]: 59: Hoare triple {398318#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {398318#true} is VALID [2018-11-19 18:42:12,326 INFO L256 TraceCheckUtils]: 60: Hoare triple {398318#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:12,326 INFO L273 TraceCheckUtils]: 61: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,326 INFO L273 TraceCheckUtils]: 62: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,326 INFO L273 TraceCheckUtils]: 63: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,326 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {398318#true} {398318#true} #2945#return; {398318#true} is VALID [2018-11-19 18:42:12,326 INFO L273 TraceCheckUtils]: 65: Hoare triple {398318#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {398318#true} is VALID [2018-11-19 18:42:12,326 INFO L256 TraceCheckUtils]: 66: Hoare triple {398318#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:12,326 INFO L273 TraceCheckUtils]: 67: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,327 INFO L273 TraceCheckUtils]: 68: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,327 INFO L273 TraceCheckUtils]: 69: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,327 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {398318#true} {398318#true} #2947#return; {398318#true} is VALID [2018-11-19 18:42:12,327 INFO L273 TraceCheckUtils]: 71: Hoare triple {398318#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {398318#true} is VALID [2018-11-19 18:42:12,327 INFO L256 TraceCheckUtils]: 72: Hoare triple {398318#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {398318#true} is VALID [2018-11-19 18:42:12,327 INFO L273 TraceCheckUtils]: 73: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,327 INFO L273 TraceCheckUtils]: 74: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,327 INFO L273 TraceCheckUtils]: 75: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,327 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {398318#true} {398318#true} #2949#return; {398318#true} is VALID [2018-11-19 18:42:12,328 INFO L273 TraceCheckUtils]: 77: Hoare triple {398318#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {398318#true} is VALID [2018-11-19 18:42:12,328 INFO L256 TraceCheckUtils]: 78: Hoare triple {398318#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {398318#true} is VALID [2018-11-19 18:42:12,328 INFO L273 TraceCheckUtils]: 79: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,328 INFO L273 TraceCheckUtils]: 80: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,328 INFO L273 TraceCheckUtils]: 81: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,328 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {398318#true} {398318#true} #2951#return; {398318#true} is VALID [2018-11-19 18:42:12,328 INFO L273 TraceCheckUtils]: 83: Hoare triple {398318#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {398318#true} is VALID [2018-11-19 18:42:12,328 INFO L256 TraceCheckUtils]: 84: Hoare triple {398318#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:12,328 INFO L273 TraceCheckUtils]: 85: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,329 INFO L273 TraceCheckUtils]: 86: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,329 INFO L273 TraceCheckUtils]: 87: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,329 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {398318#true} {398318#true} #2953#return; {398318#true} is VALID [2018-11-19 18:42:12,329 INFO L273 TraceCheckUtils]: 89: Hoare triple {398318#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {398318#true} is VALID [2018-11-19 18:42:12,329 INFO L256 TraceCheckUtils]: 90: Hoare triple {398318#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:12,329 INFO L273 TraceCheckUtils]: 91: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,329 INFO L273 TraceCheckUtils]: 92: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,329 INFO L273 TraceCheckUtils]: 93: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,330 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {398318#true} {398318#true} #2955#return; {398318#true} is VALID [2018-11-19 18:42:12,330 INFO L273 TraceCheckUtils]: 95: Hoare triple {398318#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {398318#true} is VALID [2018-11-19 18:42:12,330 INFO L256 TraceCheckUtils]: 96: Hoare triple {398318#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {398318#true} is VALID [2018-11-19 18:42:12,330 INFO L273 TraceCheckUtils]: 97: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,330 INFO L273 TraceCheckUtils]: 98: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,330 INFO L273 TraceCheckUtils]: 99: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,330 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {398318#true} {398318#true} #2957#return; {398318#true} is VALID [2018-11-19 18:42:12,330 INFO L273 TraceCheckUtils]: 101: Hoare triple {398318#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {398318#true} is VALID [2018-11-19 18:42:12,330 INFO L256 TraceCheckUtils]: 102: Hoare triple {398318#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {398318#true} is VALID [2018-11-19 18:42:12,331 INFO L273 TraceCheckUtils]: 103: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,331 INFO L273 TraceCheckUtils]: 104: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,331 INFO L273 TraceCheckUtils]: 105: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,331 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {398318#true} {398318#true} #2959#return; {398318#true} is VALID [2018-11-19 18:42:12,331 INFO L273 TraceCheckUtils]: 107: Hoare triple {398318#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {398318#true} is VALID [2018-11-19 18:42:12,331 INFO L256 TraceCheckUtils]: 108: Hoare triple {398318#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {398318#true} is VALID [2018-11-19 18:42:12,331 INFO L273 TraceCheckUtils]: 109: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,331 INFO L273 TraceCheckUtils]: 110: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,331 INFO L273 TraceCheckUtils]: 111: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,332 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {398318#true} {398318#true} #2961#return; {398318#true} is VALID [2018-11-19 18:42:12,332 INFO L273 TraceCheckUtils]: 113: Hoare triple {398318#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {398318#true} is VALID [2018-11-19 18:42:12,332 INFO L256 TraceCheckUtils]: 114: Hoare triple {398318#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:12,332 INFO L273 TraceCheckUtils]: 115: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,332 INFO L273 TraceCheckUtils]: 116: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,332 INFO L273 TraceCheckUtils]: 117: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,332 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {398318#true} {398318#true} #2963#return; {398318#true} is VALID [2018-11-19 18:42:12,332 INFO L273 TraceCheckUtils]: 119: Hoare triple {398318#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {398318#true} is VALID [2018-11-19 18:42:12,332 INFO L256 TraceCheckUtils]: 120: Hoare triple {398318#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:12,333 INFO L273 TraceCheckUtils]: 121: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,333 INFO L273 TraceCheckUtils]: 122: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,333 INFO L273 TraceCheckUtils]: 123: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,333 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {398318#true} {398318#true} #2965#return; {398318#true} is VALID [2018-11-19 18:42:12,333 INFO L273 TraceCheckUtils]: 125: Hoare triple {398318#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {398318#true} is VALID [2018-11-19 18:42:12,333 INFO L256 TraceCheckUtils]: 126: Hoare triple {398318#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:12,333 INFO L273 TraceCheckUtils]: 127: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,333 INFO L273 TraceCheckUtils]: 128: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,333 INFO L273 TraceCheckUtils]: 129: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,334 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {398318#true} {398318#true} #2967#return; {398318#true} is VALID [2018-11-19 18:42:12,334 INFO L273 TraceCheckUtils]: 131: Hoare triple {398318#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {398318#true} is VALID [2018-11-19 18:42:12,334 INFO L256 TraceCheckUtils]: 132: Hoare triple {398318#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {398318#true} is VALID [2018-11-19 18:42:12,334 INFO L273 TraceCheckUtils]: 133: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,334 INFO L273 TraceCheckUtils]: 134: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,334 INFO L273 TraceCheckUtils]: 135: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,334 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {398318#true} {398318#true} #2969#return; {398318#true} is VALID [2018-11-19 18:42:12,334 INFO L273 TraceCheckUtils]: 137: Hoare triple {398318#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {398318#true} is VALID [2018-11-19 18:42:12,334 INFO L256 TraceCheckUtils]: 138: Hoare triple {398318#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {398318#true} is VALID [2018-11-19 18:42:12,335 INFO L273 TraceCheckUtils]: 139: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,335 INFO L273 TraceCheckUtils]: 140: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,335 INFO L273 TraceCheckUtils]: 141: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,335 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {398318#true} {398318#true} #2971#return; {398318#true} is VALID [2018-11-19 18:42:12,335 INFO L273 TraceCheckUtils]: 143: Hoare triple {398318#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {398318#true} is VALID [2018-11-19 18:42:12,335 INFO L256 TraceCheckUtils]: 144: Hoare triple {398318#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {398318#true} is VALID [2018-11-19 18:42:12,335 INFO L273 TraceCheckUtils]: 145: Hoare triple {398318#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398318#true} is VALID [2018-11-19 18:42:12,335 INFO L273 TraceCheckUtils]: 146: Hoare triple {398318#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398318#true} is VALID [2018-11-19 18:42:12,336 INFO L273 TraceCheckUtils]: 147: Hoare triple {398318#true} assume true; {398318#true} is VALID [2018-11-19 18:42:12,336 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {398318#true} {398318#true} #2973#return; {398318#true} is VALID [2018-11-19 18:42:12,336 INFO L273 TraceCheckUtils]: 149: Hoare triple {398318#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {398318#true} is VALID [2018-11-19 18:42:12,336 INFO L256 TraceCheckUtils]: 150: Hoare triple {398318#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {398318#true} is VALID [2018-11-19 18:42:12,336 INFO L273 TraceCheckUtils]: 151: Hoare triple {398318#true} #t~loopctr974 := 0; {398780#(<= |#Ultimate.C_memset_#t~loopctr974| 0)} is VALID [2018-11-19 18:42:12,337 INFO L273 TraceCheckUtils]: 152: Hoare triple {398780#(<= |#Ultimate.C_memset_#t~loopctr974| 0)} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {398784#(<= |#Ultimate.C_memset_#t~loopctr974| 1)} is VALID [2018-11-19 18:42:12,338 INFO L273 TraceCheckUtils]: 153: Hoare triple {398784#(<= |#Ultimate.C_memset_#t~loopctr974| 1)} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {398788#(<= |#Ultimate.C_memset_#t~loopctr974| 2)} is VALID [2018-11-19 18:42:12,338 INFO L273 TraceCheckUtils]: 154: Hoare triple {398788#(<= |#Ultimate.C_memset_#t~loopctr974| 2)} assume !(#t~loopctr974 < #amount); {398792#(<= |#Ultimate.C_memset_#amount| 2)} is VALID [2018-11-19 18:42:12,339 INFO L273 TraceCheckUtils]: 155: Hoare triple {398792#(<= |#Ultimate.C_memset_#amount| 2)} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {398792#(<= |#Ultimate.C_memset_#amount| 2)} is VALID [2018-11-19 18:42:12,339 INFO L268 TraceCheckUtils]: 156: Hoare quadruple {398792#(<= |#Ultimate.C_memset_#amount| 2)} {398318#true} #2975#return; {398319#false} is VALID [2018-11-19 18:42:12,340 INFO L273 TraceCheckUtils]: 157: Hoare triple {398319#false} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {398319#false} is VALID [2018-11-19 18:42:12,340 INFO L273 TraceCheckUtils]: 158: Hoare triple {398319#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,340 INFO L273 TraceCheckUtils]: 159: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,340 INFO L273 TraceCheckUtils]: 160: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,340 INFO L273 TraceCheckUtils]: 161: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,340 INFO L273 TraceCheckUtils]: 162: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,340 INFO L273 TraceCheckUtils]: 163: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,340 INFO L273 TraceCheckUtils]: 164: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,340 INFO L273 TraceCheckUtils]: 165: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,341 INFO L273 TraceCheckUtils]: 166: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,341 INFO L273 TraceCheckUtils]: 167: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,341 INFO L273 TraceCheckUtils]: 168: Hoare triple {398319#false} assume #t~switch909; {398319#false} is VALID [2018-11-19 18:42:12,341 INFO L273 TraceCheckUtils]: 169: Hoare triple {398319#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {398319#false} is VALID [2018-11-19 18:42:12,341 INFO L273 TraceCheckUtils]: 170: Hoare triple {398319#false} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {398319#false} is VALID [2018-11-19 18:42:12,341 INFO L273 TraceCheckUtils]: 171: Hoare triple {398319#false} assume #t~switch947; {398319#false} is VALID [2018-11-19 18:42:12,341 INFO L273 TraceCheckUtils]: 172: Hoare triple {398319#false} assume 1 == ~ldv_state_variable_0~0; {398319#false} is VALID [2018-11-19 18:42:12,341 INFO L256 TraceCheckUtils]: 173: Hoare triple {398319#false} call #t~ret948 := ims_pcu_driver_init(); {398319#false} is VALID [2018-11-19 18:42:12,342 INFO L273 TraceCheckUtils]: 174: Hoare triple {398319#false} havoc ~tmp~46; {398319#false} is VALID [2018-11-19 18:42:12,342 INFO L256 TraceCheckUtils]: 175: Hoare triple {398319#false} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {398319#false} is VALID [2018-11-19 18:42:12,342 INFO L273 TraceCheckUtils]: 176: Hoare triple {398319#false} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {398319#false} is VALID [2018-11-19 18:42:12,342 INFO L256 TraceCheckUtils]: 177: Hoare triple {398319#false} call ldv_usb_driver_1(); {398319#false} is VALID [2018-11-19 18:42:12,343 INFO L273 TraceCheckUtils]: 178: Hoare triple {398319#false} havoc ~tmp~53.base, ~tmp~53.offset; {398319#false} is VALID [2018-11-19 18:42:12,343 INFO L256 TraceCheckUtils]: 179: Hoare triple {398319#false} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {398319#false} is VALID [2018-11-19 18:42:12,343 INFO L273 TraceCheckUtils]: 180: Hoare triple {398319#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398319#false} is VALID [2018-11-19 18:42:12,343 INFO L273 TraceCheckUtils]: 181: Hoare triple {398319#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398319#false} is VALID [2018-11-19 18:42:12,344 INFO L273 TraceCheckUtils]: 182: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,344 INFO L268 TraceCheckUtils]: 183: Hoare quadruple {398319#false} {398319#false} #2613#return; {398319#false} is VALID [2018-11-19 18:42:12,344 INFO L273 TraceCheckUtils]: 184: Hoare triple {398319#false} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {398319#false} is VALID [2018-11-19 18:42:12,344 INFO L273 TraceCheckUtils]: 185: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,344 INFO L268 TraceCheckUtils]: 186: Hoare quadruple {398319#false} {398319#false} #2537#return; {398319#false} is VALID [2018-11-19 18:42:12,344 INFO L273 TraceCheckUtils]: 187: Hoare triple {398319#false} #res := ~ldv_func_res~0; {398319#false} is VALID [2018-11-19 18:42:12,345 INFO L273 TraceCheckUtils]: 188: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,345 INFO L268 TraceCheckUtils]: 189: Hoare quadruple {398319#false} {398319#false} #2777#return; {398319#false} is VALID [2018-11-19 18:42:12,345 INFO L273 TraceCheckUtils]: 190: Hoare triple {398319#false} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {398319#false} is VALID [2018-11-19 18:42:12,345 INFO L273 TraceCheckUtils]: 191: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,345 INFO L268 TraceCheckUtils]: 192: Hoare quadruple {398319#false} {398319#false} #3035#return; {398319#false} is VALID [2018-11-19 18:42:12,345 INFO L273 TraceCheckUtils]: 193: Hoare triple {398319#false} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {398319#false} is VALID [2018-11-19 18:42:12,346 INFO L273 TraceCheckUtils]: 194: Hoare triple {398319#false} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_10~0 := 1; {398319#false} is VALID [2018-11-19 18:42:12,346 INFO L256 TraceCheckUtils]: 195: Hoare triple {398319#false} call ldv_initialize_ims_pcu_attribute_10(); {398319#false} is VALID [2018-11-19 18:42:12,346 INFO L273 TraceCheckUtils]: 196: Hoare triple {398319#false} havoc ~tmp~47.base, ~tmp~47.offset;havoc ~tmp___0~19.base, ~tmp___0~19.offset; {398319#false} is VALID [2018-11-19 18:42:12,346 INFO L256 TraceCheckUtils]: 197: Hoare triple {398319#false} call #t~ret861.base, #t~ret861.offset := ldv_zalloc(1376); {398319#false} is VALID [2018-11-19 18:42:12,346 INFO L273 TraceCheckUtils]: 198: Hoare triple {398319#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398319#false} is VALID [2018-11-19 18:42:12,346 INFO L273 TraceCheckUtils]: 199: Hoare triple {398319#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398319#false} is VALID [2018-11-19 18:42:12,347 INFO L273 TraceCheckUtils]: 200: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,347 INFO L268 TraceCheckUtils]: 201: Hoare quadruple {398319#false} {398319#false} #2807#return; {398319#false} is VALID [2018-11-19 18:42:12,347 INFO L273 TraceCheckUtils]: 202: Hoare triple {398319#false} ~tmp~47.base, ~tmp~47.offset := #t~ret861.base, #t~ret861.offset;havoc #t~ret861.base, #t~ret861.offset;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := ~tmp~47.base, ~tmp~47.offset; {398319#false} is VALID [2018-11-19 18:42:12,347 INFO L256 TraceCheckUtils]: 203: Hoare triple {398319#false} call #t~ret862.base, #t~ret862.offset := ldv_zalloc(48); {398319#false} is VALID [2018-11-19 18:42:12,347 INFO L273 TraceCheckUtils]: 204: Hoare triple {398319#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398319#false} is VALID [2018-11-19 18:42:12,347 INFO L273 TraceCheckUtils]: 205: Hoare triple {398319#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398319#false} is VALID [2018-11-19 18:42:12,348 INFO L273 TraceCheckUtils]: 206: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,348 INFO L268 TraceCheckUtils]: 207: Hoare quadruple {398319#false} {398319#false} #2809#return; {398319#false} is VALID [2018-11-19 18:42:12,348 INFO L273 TraceCheckUtils]: 208: Hoare triple {398319#false} ~tmp___0~19.base, ~tmp___0~19.offset := #t~ret862.base, #t~ret862.offset;havoc #t~ret862.base, #t~ret862.offset;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := ~tmp___0~19.base, ~tmp___0~19.offset; {398319#false} is VALID [2018-11-19 18:42:12,348 INFO L273 TraceCheckUtils]: 209: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,348 INFO L268 TraceCheckUtils]: 210: Hoare quadruple {398319#false} {398319#false} #3037#return; {398319#false} is VALID [2018-11-19 18:42:12,349 INFO L273 TraceCheckUtils]: 211: Hoare triple {398319#false} ~ldv_state_variable_4~0 := 1;~ldv_state_variable_8~0 := 1; {398319#false} is VALID [2018-11-19 18:42:12,349 INFO L256 TraceCheckUtils]: 212: Hoare triple {398319#false} call ldv_initialize_ims_pcu_attribute_8(); {398319#false} is VALID [2018-11-19 18:42:12,349 INFO L273 TraceCheckUtils]: 213: Hoare triple {398319#false} havoc ~tmp~51.base, ~tmp~51.offset;havoc ~tmp___0~23.base, ~tmp___0~23.offset; {398319#false} is VALID [2018-11-19 18:42:12,349 INFO L256 TraceCheckUtils]: 214: Hoare triple {398319#false} call #t~ret869.base, #t~ret869.offset := ldv_zalloc(1376); {398319#false} is VALID [2018-11-19 18:42:12,349 INFO L273 TraceCheckUtils]: 215: Hoare triple {398319#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398319#false} is VALID [2018-11-19 18:42:12,349 INFO L273 TraceCheckUtils]: 216: Hoare triple {398319#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398319#false} is VALID [2018-11-19 18:42:12,350 INFO L273 TraceCheckUtils]: 217: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,350 INFO L268 TraceCheckUtils]: 218: Hoare quadruple {398319#false} {398319#false} #2631#return; {398319#false} is VALID [2018-11-19 18:42:12,350 INFO L273 TraceCheckUtils]: 219: Hoare triple {398319#false} ~tmp~51.base, ~tmp~51.offset := #t~ret869.base, #t~ret869.offset;havoc #t~ret869.base, #t~ret869.offset;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := ~tmp~51.base, ~tmp~51.offset; {398319#false} is VALID [2018-11-19 18:42:12,350 INFO L256 TraceCheckUtils]: 220: Hoare triple {398319#false} call #t~ret870.base, #t~ret870.offset := ldv_zalloc(48); {398319#false} is VALID [2018-11-19 18:42:12,350 INFO L273 TraceCheckUtils]: 221: Hoare triple {398319#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398319#false} is VALID [2018-11-19 18:42:12,350 INFO L273 TraceCheckUtils]: 222: Hoare triple {398319#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398319#false} is VALID [2018-11-19 18:42:12,351 INFO L273 TraceCheckUtils]: 223: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,351 INFO L268 TraceCheckUtils]: 224: Hoare quadruple {398319#false} {398319#false} #2633#return; {398319#false} is VALID [2018-11-19 18:42:12,351 INFO L273 TraceCheckUtils]: 225: Hoare triple {398319#false} ~tmp___0~23.base, ~tmp___0~23.offset := #t~ret870.base, #t~ret870.offset;havoc #t~ret870.base, #t~ret870.offset;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := ~tmp___0~23.base, ~tmp___0~23.offset; {398319#false} is VALID [2018-11-19 18:42:12,351 INFO L273 TraceCheckUtils]: 226: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,351 INFO L268 TraceCheckUtils]: 227: Hoare quadruple {398319#false} {398319#false} #3039#return; {398319#false} is VALID [2018-11-19 18:42:12,351 INFO L273 TraceCheckUtils]: 228: Hoare triple {398319#false} ~ldv_state_variable_2~0 := 1;~ldv_state_variable_9~0 := 1; {398319#false} is VALID [2018-11-19 18:42:12,352 INFO L256 TraceCheckUtils]: 229: Hoare triple {398319#false} call ldv_initialize_ims_pcu_attribute_9(); {398319#false} is VALID [2018-11-19 18:42:12,352 INFO L273 TraceCheckUtils]: 230: Hoare triple {398319#false} havoc ~tmp~49.base, ~tmp~49.offset;havoc ~tmp___0~21.base, ~tmp___0~21.offset; {398319#false} is VALID [2018-11-19 18:42:12,352 INFO L256 TraceCheckUtils]: 231: Hoare triple {398319#false} call #t~ret865.base, #t~ret865.offset := ldv_zalloc(1376); {398319#false} is VALID [2018-11-19 18:42:12,352 INFO L273 TraceCheckUtils]: 232: Hoare triple {398319#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398319#false} is VALID [2018-11-19 18:42:12,352 INFO L273 TraceCheckUtils]: 233: Hoare triple {398319#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398319#false} is VALID [2018-11-19 18:42:12,352 INFO L273 TraceCheckUtils]: 234: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,353 INFO L268 TraceCheckUtils]: 235: Hoare quadruple {398319#false} {398319#false} #2627#return; {398319#false} is VALID [2018-11-19 18:42:12,353 INFO L273 TraceCheckUtils]: 236: Hoare triple {398319#false} ~tmp~49.base, ~tmp~49.offset := #t~ret865.base, #t~ret865.offset;havoc #t~ret865.base, #t~ret865.offset;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := ~tmp~49.base, ~tmp~49.offset; {398319#false} is VALID [2018-11-19 18:42:12,353 INFO L256 TraceCheckUtils]: 237: Hoare triple {398319#false} call #t~ret866.base, #t~ret866.offset := ldv_zalloc(48); {398319#false} is VALID [2018-11-19 18:42:12,353 INFO L273 TraceCheckUtils]: 238: Hoare triple {398319#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398319#false} is VALID [2018-11-19 18:42:12,353 INFO L273 TraceCheckUtils]: 239: Hoare triple {398319#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398319#false} is VALID [2018-11-19 18:42:12,353 INFO L273 TraceCheckUtils]: 240: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,354 INFO L268 TraceCheckUtils]: 241: Hoare quadruple {398319#false} {398319#false} #2629#return; {398319#false} is VALID [2018-11-19 18:42:12,354 INFO L273 TraceCheckUtils]: 242: Hoare triple {398319#false} ~tmp___0~21.base, ~tmp___0~21.offset := #t~ret866.base, #t~ret866.offset;havoc #t~ret866.base, #t~ret866.offset;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := ~tmp___0~21.base, ~tmp___0~21.offset; {398319#false} is VALID [2018-11-19 18:42:12,354 INFO L273 TraceCheckUtils]: 243: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,354 INFO L268 TraceCheckUtils]: 244: Hoare quadruple {398319#false} {398319#false} #3041#return; {398319#false} is VALID [2018-11-19 18:42:12,354 INFO L273 TraceCheckUtils]: 245: Hoare triple {398319#false} ~ldv_state_variable_7~0 := 1; {398319#false} is VALID [2018-11-19 18:42:12,354 INFO L256 TraceCheckUtils]: 246: Hoare triple {398319#false} call ldv_initialize_ims_pcu_attribute_7(); {398319#false} is VALID [2018-11-19 18:42:12,355 INFO L273 TraceCheckUtils]: 247: Hoare triple {398319#false} havoc ~tmp~52.base, ~tmp~52.offset;havoc ~tmp___0~24.base, ~tmp___0~24.offset; {398319#false} is VALID [2018-11-19 18:42:12,355 INFO L256 TraceCheckUtils]: 248: Hoare triple {398319#false} call #t~ret871.base, #t~ret871.offset := ldv_zalloc(1376); {398319#false} is VALID [2018-11-19 18:42:12,355 INFO L273 TraceCheckUtils]: 249: Hoare triple {398319#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398319#false} is VALID [2018-11-19 18:42:12,355 INFO L273 TraceCheckUtils]: 250: Hoare triple {398319#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398319#false} is VALID [2018-11-19 18:42:12,355 INFO L273 TraceCheckUtils]: 251: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,355 INFO L268 TraceCheckUtils]: 252: Hoare quadruple {398319#false} {398319#false} #2619#return; {398319#false} is VALID [2018-11-19 18:42:12,355 INFO L273 TraceCheckUtils]: 253: Hoare triple {398319#false} ~tmp~52.base, ~tmp~52.offset := #t~ret871.base, #t~ret871.offset;havoc #t~ret871.base, #t~ret871.offset;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := ~tmp~52.base, ~tmp~52.offset; {398319#false} is VALID [2018-11-19 18:42:12,356 INFO L256 TraceCheckUtils]: 254: Hoare triple {398319#false} call #t~ret872.base, #t~ret872.offset := ldv_zalloc(48); {398319#false} is VALID [2018-11-19 18:42:12,356 INFO L273 TraceCheckUtils]: 255: Hoare triple {398319#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398319#false} is VALID [2018-11-19 18:42:12,356 INFO L273 TraceCheckUtils]: 256: Hoare triple {398319#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398319#false} is VALID [2018-11-19 18:42:12,356 INFO L273 TraceCheckUtils]: 257: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,356 INFO L268 TraceCheckUtils]: 258: Hoare quadruple {398319#false} {398319#false} #2621#return; {398319#false} is VALID [2018-11-19 18:42:12,357 INFO L273 TraceCheckUtils]: 259: Hoare triple {398319#false} ~tmp___0~24.base, ~tmp___0~24.offset := #t~ret872.base, #t~ret872.offset;havoc #t~ret872.base, #t~ret872.offset;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := ~tmp___0~24.base, ~tmp___0~24.offset; {398319#false} is VALID [2018-11-19 18:42:12,357 INFO L273 TraceCheckUtils]: 260: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,357 INFO L268 TraceCheckUtils]: 261: Hoare quadruple {398319#false} {398319#false} #3043#return; {398319#false} is VALID [2018-11-19 18:42:12,357 INFO L273 TraceCheckUtils]: 262: Hoare triple {398319#false} ~ldv_state_variable_3~0 := 1;~ldv_state_variable_11~0 := 1; {398319#false} is VALID [2018-11-19 18:42:12,357 INFO L256 TraceCheckUtils]: 263: Hoare triple {398319#false} call ldv_initialize_ims_pcu_attribute_11(); {398319#false} is VALID [2018-11-19 18:42:12,357 INFO L273 TraceCheckUtils]: 264: Hoare triple {398319#false} havoc ~tmp~50.base, ~tmp~50.offset;havoc ~tmp___0~22.base, ~tmp___0~22.offset; {398319#false} is VALID [2018-11-19 18:42:12,358 INFO L256 TraceCheckUtils]: 265: Hoare triple {398319#false} call #t~ret867.base, #t~ret867.offset := ldv_zalloc(1376); {398319#false} is VALID [2018-11-19 18:42:12,358 INFO L273 TraceCheckUtils]: 266: Hoare triple {398319#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398319#false} is VALID [2018-11-19 18:42:12,358 INFO L273 TraceCheckUtils]: 267: Hoare triple {398319#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398319#false} is VALID [2018-11-19 18:42:12,358 INFO L273 TraceCheckUtils]: 268: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,358 INFO L268 TraceCheckUtils]: 269: Hoare quadruple {398319#false} {398319#false} #2811#return; {398319#false} is VALID [2018-11-19 18:42:12,358 INFO L273 TraceCheckUtils]: 270: Hoare triple {398319#false} ~tmp~50.base, ~tmp~50.offset := #t~ret867.base, #t~ret867.offset;havoc #t~ret867.base, #t~ret867.offset;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := ~tmp~50.base, ~tmp~50.offset; {398319#false} is VALID [2018-11-19 18:42:12,358 INFO L256 TraceCheckUtils]: 271: Hoare triple {398319#false} call #t~ret868.base, #t~ret868.offset := ldv_zalloc(48); {398319#false} is VALID [2018-11-19 18:42:12,359 INFO L273 TraceCheckUtils]: 272: Hoare triple {398319#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398319#false} is VALID [2018-11-19 18:42:12,359 INFO L273 TraceCheckUtils]: 273: Hoare triple {398319#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398319#false} is VALID [2018-11-19 18:42:12,359 INFO L273 TraceCheckUtils]: 274: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,359 INFO L268 TraceCheckUtils]: 275: Hoare quadruple {398319#false} {398319#false} #2813#return; {398319#false} is VALID [2018-11-19 18:42:12,359 INFO L273 TraceCheckUtils]: 276: Hoare triple {398319#false} ~tmp___0~22.base, ~tmp___0~22.offset := #t~ret868.base, #t~ret868.offset;havoc #t~ret868.base, #t~ret868.offset;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := ~tmp___0~22.base, ~tmp___0~22.offset; {398319#false} is VALID [2018-11-19 18:42:12,359 INFO L273 TraceCheckUtils]: 277: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,360 INFO L268 TraceCheckUtils]: 278: Hoare quadruple {398319#false} {398319#false} #3045#return; {398319#false} is VALID [2018-11-19 18:42:12,360 INFO L273 TraceCheckUtils]: 279: Hoare triple {398319#false} ~ldv_state_variable_6~0 := 1; {398319#false} is VALID [2018-11-19 18:42:12,360 INFO L256 TraceCheckUtils]: 280: Hoare triple {398319#false} call ldv_initialize_ims_pcu_attribute_6(); {398319#false} is VALID [2018-11-19 18:42:12,360 INFO L273 TraceCheckUtils]: 281: Hoare triple {398319#false} havoc ~tmp~48.base, ~tmp~48.offset;havoc ~tmp___0~20.base, ~tmp___0~20.offset; {398319#false} is VALID [2018-11-19 18:42:12,360 INFO L256 TraceCheckUtils]: 282: Hoare triple {398319#false} call #t~ret863.base, #t~ret863.offset := ldv_zalloc(1376); {398319#false} is VALID [2018-11-19 18:42:12,360 INFO L273 TraceCheckUtils]: 283: Hoare triple {398319#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398319#false} is VALID [2018-11-19 18:42:12,361 INFO L273 TraceCheckUtils]: 284: Hoare triple {398319#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398319#false} is VALID [2018-11-19 18:42:12,361 INFO L273 TraceCheckUtils]: 285: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,361 INFO L268 TraceCheckUtils]: 286: Hoare quadruple {398319#false} {398319#false} #2623#return; {398319#false} is VALID [2018-11-19 18:42:12,361 INFO L273 TraceCheckUtils]: 287: Hoare triple {398319#false} ~tmp~48.base, ~tmp~48.offset := #t~ret863.base, #t~ret863.offset;havoc #t~ret863.base, #t~ret863.offset;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := ~tmp~48.base, ~tmp~48.offset; {398319#false} is VALID [2018-11-19 18:42:12,361 INFO L256 TraceCheckUtils]: 288: Hoare triple {398319#false} call #t~ret864.base, #t~ret864.offset := ldv_zalloc(48); {398319#false} is VALID [2018-11-19 18:42:12,361 INFO L273 TraceCheckUtils]: 289: Hoare triple {398319#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {398319#false} is VALID [2018-11-19 18:42:12,362 INFO L273 TraceCheckUtils]: 290: Hoare triple {398319#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {398319#false} is VALID [2018-11-19 18:42:12,362 INFO L273 TraceCheckUtils]: 291: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,362 INFO L268 TraceCheckUtils]: 292: Hoare quadruple {398319#false} {398319#false} #2625#return; {398319#false} is VALID [2018-11-19 18:42:12,362 INFO L273 TraceCheckUtils]: 293: Hoare triple {398319#false} ~tmp___0~20.base, ~tmp___0~20.offset := #t~ret864.base, #t~ret864.offset;havoc #t~ret864.base, #t~ret864.offset;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := ~tmp___0~20.base, ~tmp___0~20.offset; {398319#false} is VALID [2018-11-19 18:42:12,362 INFO L273 TraceCheckUtils]: 294: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,362 INFO L268 TraceCheckUtils]: 295: Hoare quadruple {398319#false} {398319#false} #3047#return; {398319#false} is VALID [2018-11-19 18:42:12,362 INFO L273 TraceCheckUtils]: 296: Hoare triple {398319#false} assume !(0 != ~ldv_retval_4~0); {398319#false} is VALID [2018-11-19 18:42:12,363 INFO L273 TraceCheckUtils]: 297: Hoare triple {398319#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,363 INFO L273 TraceCheckUtils]: 298: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,363 INFO L273 TraceCheckUtils]: 299: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,363 INFO L273 TraceCheckUtils]: 300: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,363 INFO L273 TraceCheckUtils]: 301: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,363 INFO L273 TraceCheckUtils]: 302: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,364 INFO L273 TraceCheckUtils]: 303: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,364 INFO L273 TraceCheckUtils]: 304: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,364 INFO L273 TraceCheckUtils]: 305: Hoare triple {398319#false} assume #t~switch909; {398319#false} is VALID [2018-11-19 18:42:12,364 INFO L273 TraceCheckUtils]: 306: Hoare triple {398319#false} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {398319#false} is VALID [2018-11-19 18:42:12,364 INFO L273 TraceCheckUtils]: 307: Hoare triple {398319#false} assume #t~switch937; {398319#false} is VALID [2018-11-19 18:42:12,364 INFO L273 TraceCheckUtils]: 308: Hoare triple {398319#false} assume 1 == ~ldv_state_variable_1~0; {398319#false} is VALID [2018-11-19 18:42:12,365 INFO L256 TraceCheckUtils]: 309: Hoare triple {398319#false} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {398319#false} is VALID [2018-11-19 18:42:12,365 INFO L273 TraceCheckUtils]: 310: Hoare triple {398319#false} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {398319#false} is VALID [2018-11-19 18:42:12,365 INFO L256 TraceCheckUtils]: 311: Hoare triple {398319#false} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {398319#false} is VALID [2018-11-19 18:42:12,365 INFO L273 TraceCheckUtils]: 312: Hoare triple {398319#false} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {398319#false} is VALID [2018-11-19 18:42:12,365 INFO L256 TraceCheckUtils]: 313: Hoare triple {398319#false} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {398319#false} is VALID [2018-11-19 18:42:12,365 INFO L273 TraceCheckUtils]: 314: Hoare triple {398319#false} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {398319#false} is VALID [2018-11-19 18:42:12,366 INFO L256 TraceCheckUtils]: 315: Hoare triple {398319#false} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {398319#false} is VALID [2018-11-19 18:42:12,366 INFO L273 TraceCheckUtils]: 316: Hoare triple {398319#false} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {398319#false} is VALID [2018-11-19 18:42:12,366 INFO L273 TraceCheckUtils]: 317: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,366 INFO L268 TraceCheckUtils]: 318: Hoare quadruple {398319#false} {398319#false} #2817#return; {398319#false} is VALID [2018-11-19 18:42:12,366 INFO L273 TraceCheckUtils]: 319: Hoare triple {398319#false} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {398319#false} is VALID [2018-11-19 18:42:12,366 INFO L273 TraceCheckUtils]: 320: Hoare triple {398319#false} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {398319#false} is VALID [2018-11-19 18:42:12,367 INFO L273 TraceCheckUtils]: 321: Hoare triple {398319#false} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {398319#false} is VALID [2018-11-19 18:42:12,367 INFO L273 TraceCheckUtils]: 322: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,367 INFO L268 TraceCheckUtils]: 323: Hoare quadruple {398319#false} {398319#false} #3151#return; {398319#false} is VALID [2018-11-19 18:42:12,367 INFO L273 TraceCheckUtils]: 324: Hoare triple {398319#false} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {398319#false} is VALID [2018-11-19 18:42:12,367 INFO L273 TraceCheckUtils]: 325: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,367 INFO L268 TraceCheckUtils]: 326: Hoare quadruple {398319#false} {398319#false} #3095#return; {398319#false} is VALID [2018-11-19 18:42:12,368 INFO L273 TraceCheckUtils]: 327: Hoare triple {398319#false} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {398319#false} is VALID [2018-11-19 18:42:12,368 INFO L256 TraceCheckUtils]: 328: Hoare triple {398319#false} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {398319#false} is VALID [2018-11-19 18:42:12,368 INFO L273 TraceCheckUtils]: 329: Hoare triple {398319#false} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {398319#false} is VALID [2018-11-19 18:42:12,368 INFO L256 TraceCheckUtils]: 330: Hoare triple {398319#false} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {398319#false} is VALID [2018-11-19 18:42:12,368 INFO L273 TraceCheckUtils]: 331: Hoare triple {398319#false} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {398319#false} is VALID [2018-11-19 18:42:12,368 INFO L256 TraceCheckUtils]: 332: Hoare triple {398319#false} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {398319#false} is VALID [2018-11-19 18:42:12,369 INFO L273 TraceCheckUtils]: 333: Hoare triple {398319#false} ~size := #in~size;~t := #in~t; {398319#false} is VALID [2018-11-19 18:42:12,369 INFO L256 TraceCheckUtils]: 334: Hoare triple {398319#false} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {398319#false} is VALID [2018-11-19 18:42:12,369 INFO L273 TraceCheckUtils]: 335: Hoare triple {398319#false} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {398319#false} is VALID [2018-11-19 18:42:12,369 INFO L273 TraceCheckUtils]: 336: Hoare triple {398319#false} assume !(0 != ~tmp___0~2);call #t~malloc130.base, #t~malloc130.offset := #Ultimate.alloc(~size);~tmp~8.base, ~tmp~8.offset := #t~malloc130.base, #t~malloc130.offset;~p~0.base, ~p~0.offset := ~tmp~8.base, ~tmp~8.offset;assume 0 != (if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~0.base, ~p~0.offset; {398319#false} is VALID [2018-11-19 18:42:12,369 INFO L273 TraceCheckUtils]: 337: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,369 INFO L268 TraceCheckUtils]: 338: Hoare quadruple {398319#false} {398319#false} #2691#return; {398319#false} is VALID [2018-11-19 18:42:12,370 INFO L273 TraceCheckUtils]: 339: Hoare triple {398319#false} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {398319#false} is VALID [2018-11-19 18:42:12,370 INFO L273 TraceCheckUtils]: 340: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,370 INFO L268 TraceCheckUtils]: 341: Hoare quadruple {398319#false} {398319#false} #2781#return; {398319#false} is VALID [2018-11-19 18:42:12,370 INFO L273 TraceCheckUtils]: 342: Hoare triple {398319#false} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {398319#false} is VALID [2018-11-19 18:42:12,370 INFO L273 TraceCheckUtils]: 343: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,370 INFO L268 TraceCheckUtils]: 344: Hoare quadruple {398319#false} {398319#false} #2779#return; {398319#false} is VALID [2018-11-19 18:42:12,371 INFO L273 TraceCheckUtils]: 345: Hoare triple {398319#false} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {398319#false} is VALID [2018-11-19 18:42:12,371 INFO L273 TraceCheckUtils]: 346: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,371 INFO L268 TraceCheckUtils]: 347: Hoare quadruple {398319#false} {398319#false} #3097#return; {398319#false} is VALID [2018-11-19 18:42:12,371 INFO L273 TraceCheckUtils]: 348: Hoare triple {398319#false} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {398319#false} is VALID [2018-11-19 18:42:12,371 INFO L273 TraceCheckUtils]: 349: Hoare triple {398319#false} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {398319#false} is VALID [2018-11-19 18:42:12,371 INFO L256 TraceCheckUtils]: 350: Hoare triple {398319#false} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {398319#false} is VALID [2018-11-19 18:42:12,372 INFO L273 TraceCheckUtils]: 351: Hoare triple {398319#false} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {398319#false} is VALID [2018-11-19 18:42:12,372 INFO L273 TraceCheckUtils]: 352: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,372 INFO L268 TraceCheckUtils]: 353: Hoare quadruple {398319#false} {398319#false} #3099#return; {398319#false} is VALID [2018-11-19 18:42:12,372 INFO L256 TraceCheckUtils]: 354: Hoare triple {398319#false} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {398319#false} is VALID [2018-11-19 18:42:12,372 INFO L273 TraceCheckUtils]: 355: Hoare triple {398319#false} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {398319#false} is VALID [2018-11-19 18:42:12,372 INFO L273 TraceCheckUtils]: 356: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,373 INFO L268 TraceCheckUtils]: 357: Hoare quadruple {398319#false} {398319#false} #3101#return; {398319#false} is VALID [2018-11-19 18:42:12,373 INFO L256 TraceCheckUtils]: 358: Hoare triple {398319#false} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {398319#false} is VALID [2018-11-19 18:42:12,373 INFO L273 TraceCheckUtils]: 359: Hoare triple {398319#false} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {398319#false} is VALID [2018-11-19 18:42:12,373 INFO L256 TraceCheckUtils]: 360: Hoare triple {398319#false} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {398319#false} is VALID [2018-11-19 18:42:12,373 INFO L273 TraceCheckUtils]: 361: Hoare triple {398319#false} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {398319#false} is VALID [2018-11-19 18:42:12,373 INFO L273 TraceCheckUtils]: 362: Hoare triple {398319#false} assume !(0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616); {398319#false} is VALID [2018-11-19 18:42:12,374 INFO L273 TraceCheckUtils]: 363: Hoare triple {398319#false} assume !(0 == ~buflen~0 % 4294967296 % 18446744073709551616); {398319#false} is VALID [2018-11-19 18:42:12,374 INFO L273 TraceCheckUtils]: 364: Hoare triple {398319#false} assume 0 != ~buflen~0 % 4294967296 % 18446744073709551616; {398319#false} is VALID [2018-11-19 18:42:12,374 INFO L273 TraceCheckUtils]: 365: Hoare triple {398319#false} ~union_desc~0.base, ~union_desc~0.offset := ~buf~0.base, ~buf~0.offset;call #t~mem642 := read~int(~union_desc~0.base, 1 + ~union_desc~0.offset, 1);#t~short644 := 36 == #t~mem642 % 256 % 4294967296; {398319#false} is VALID [2018-11-19 18:42:12,374 INFO L273 TraceCheckUtils]: 366: Hoare triple {398319#false} assume #t~short644;call #t~mem643 := read~int(~union_desc~0.base, 2 + ~union_desc~0.offset, 1);#t~short644 := 6 == #t~mem643 % 256 % 4294967296; {398319#false} is VALID [2018-11-19 18:42:12,374 INFO L273 TraceCheckUtils]: 367: Hoare triple {398319#false} assume #t~short644;havoc #t~mem643;havoc #t~mem642;havoc #t~short644;call write~$Pointer$(#t~string645.base, #t~string645.offset, ~#descriptor~3.base, ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string646.base, #t~string646.offset, ~#descriptor~3.base, 8 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string647.base, #t~string647.offset, ~#descriptor~3.base, 16 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string648.base, #t~string648.offset, ~#descriptor~3.base, 24 + ~#descriptor~3.offset, 8);call write~int(1479, ~#descriptor~3.base, 32 + ~#descriptor~3.offset, 4);call write~int(0, ~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1);call #t~mem649 := read~int(~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1); {398319#false} is VALID [2018-11-19 18:42:12,374 INFO L256 TraceCheckUtils]: 368: Hoare triple {398319#false} call #t~ret650 := ldv__builtin_expect(~bitwiseAnd(#t~mem649 % 256, 1), 0); {398319#false} is VALID [2018-11-19 18:42:12,375 INFO L273 TraceCheckUtils]: 369: Hoare triple {398319#false} ~exp := #in~exp;~c := #in~c;#res := ~exp; {398319#false} is VALID [2018-11-19 18:42:12,375 INFO L273 TraceCheckUtils]: 370: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,375 INFO L268 TraceCheckUtils]: 371: Hoare quadruple {398319#false} {398319#false} #3075#return; {398319#false} is VALID [2018-11-19 18:42:12,375 INFO L273 TraceCheckUtils]: 372: Hoare triple {398319#false} assume -9223372036854775808 <= #t~ret650 && #t~ret650 <= 9223372036854775807;~tmp~36 := #t~ret650;havoc #t~ret650;havoc #t~mem649; {398319#false} is VALID [2018-11-19 18:42:12,375 INFO L273 TraceCheckUtils]: 373: Hoare triple {398319#false} assume !(0 != ~tmp~36); {398319#false} is VALID [2018-11-19 18:42:12,375 INFO L273 TraceCheckUtils]: 374: Hoare triple {398319#false} #res.base, #res.offset := ~union_desc~0.base, ~union_desc~0.offset;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {398319#false} is VALID [2018-11-19 18:42:12,375 INFO L273 TraceCheckUtils]: 375: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,376 INFO L268 TraceCheckUtils]: 376: Hoare quadruple {398319#false} {398319#false} #3137#return; {398319#false} is VALID [2018-11-19 18:42:12,376 INFO L273 TraceCheckUtils]: 377: Hoare triple {398319#false} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {398319#false} is VALID [2018-11-19 18:42:12,376 INFO L273 TraceCheckUtils]: 378: Hoare triple {398319#false} assume !(0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616);call #t~mem658.base, #t~mem658.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem659 := read~int(~union_desc~1.base, 3 + ~union_desc~1.offset, 1);call #t~ret660.base, #t~ret660.offset := usb_ifnum_to_if(#t~mem658.base, #t~mem658.offset, #t~mem659 % 256);call write~$Pointer$(#t~ret660.base, #t~ret660.offset, ~pcu.base, 79 + ~pcu.offset, 8);havoc #t~mem659;havoc #t~ret660.base, #t~ret660.offset;havoc #t~mem658.base, #t~mem658.offset;call #t~mem661.base, #t~mem661.offset := read~$Pointer$(~pcu.base, 79 + ~pcu.offset, 8);call #t~mem662.base, #t~mem662.offset := read~$Pointer$(#t~mem661.base, 8 + #t~mem661.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem662.base, #t~mem662.offset;havoc #t~mem662.base, #t~mem662.offset;havoc #t~mem661.base, #t~mem661.offset;call #t~mem663.base, #t~mem663.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem663.base, #t~mem663.offset, ~pcu.base, 87 + ~pcu.offset, 8);havoc #t~mem663.base, #t~mem663.offset;call #t~mem664.base, #t~mem664.offset := read~$Pointer$(~pcu.base, 87 + ~pcu.offset, 8); {398319#false} is VALID [2018-11-19 18:42:12,376 INFO L256 TraceCheckUtils]: 379: Hoare triple {398319#false} call #t~ret665 := usb_endpoint_maxp(#t~mem664.base, #t~mem664.offset); {398319#false} is VALID [2018-11-19 18:42:12,376 INFO L273 TraceCheckUtils]: 380: Hoare triple {398319#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {398319#false} is VALID [2018-11-19 18:42:12,377 INFO L273 TraceCheckUtils]: 381: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,377 INFO L268 TraceCheckUtils]: 382: Hoare quadruple {398319#false} {398319#false} #3139#return; {398319#false} is VALID [2018-11-19 18:42:12,377 INFO L273 TraceCheckUtils]: 383: Hoare triple {398319#false} assume -2147483648 <= #t~ret665 && #t~ret665 <= 2147483647;~tmp~37 := #t~ret665;havoc #t~ret665;havoc #t~mem664.base, #t~mem664.offset;call write~int(~tmp~37, ~pcu.base, 119 + ~pcu.offset, 4);call #t~mem666.base, #t~mem666.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem667 := read~int(~union_desc~1.base, 4 + ~union_desc~1.offset, 1);call #t~ret668.base, #t~ret668.offset := usb_ifnum_to_if(#t~mem666.base, #t~mem666.offset, #t~mem667 % 256);call write~$Pointer$(#t~ret668.base, #t~ret668.offset, ~pcu.base, 123 + ~pcu.offset, 8);havoc #t~mem666.base, #t~mem666.offset;havoc #t~mem667;havoc #t~ret668.base, #t~ret668.offset;call #t~mem669.base, #t~mem669.offset := read~$Pointer$(~pcu.base, 123 + ~pcu.offset, 8);call #t~mem670.base, #t~mem670.offset := read~$Pointer$(#t~mem669.base, 8 + #t~mem669.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem670.base, #t~mem670.offset;havoc #t~mem670.base, #t~mem670.offset;havoc #t~mem669.base, #t~mem669.offset;call #t~mem671 := read~int(~alt~0.base, 4 + ~alt~0.offset, 1); {398319#false} is VALID [2018-11-19 18:42:12,377 INFO L273 TraceCheckUtils]: 384: Hoare triple {398319#false} assume !(2 != #t~mem671 % 256 % 4294967296);havoc #t~mem671;call #t~mem676.base, #t~mem676.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem676.base, #t~mem676.offset, ~pcu.base, 167 + ~pcu.offset, 8);havoc #t~mem676.base, #t~mem676.offset;call #t~mem677.base, #t~mem677.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {398319#false} is VALID [2018-11-19 18:42:12,377 INFO L256 TraceCheckUtils]: 385: Hoare triple {398319#false} call #t~ret678 := usb_endpoint_is_bulk_out(#t~mem677.base, #t~mem677.offset); {398319#false} is VALID [2018-11-19 18:42:12,377 INFO L273 TraceCheckUtils]: 386: Hoare triple {398319#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~4;havoc ~tmp___0~1;havoc ~tmp___1~1; {398319#false} is VALID [2018-11-19 18:42:12,378 INFO L256 TraceCheckUtils]: 387: Hoare triple {398319#false} call #t~ret25 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {398319#false} is VALID [2018-11-19 18:42:12,378 INFO L273 TraceCheckUtils]: 388: Hoare triple {398319#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {398319#false} is VALID [2018-11-19 18:42:12,378 INFO L273 TraceCheckUtils]: 389: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,378 INFO L268 TraceCheckUtils]: 390: Hoare quadruple {398319#false} {398319#false} #2887#return; {398319#false} is VALID [2018-11-19 18:42:12,378 INFO L273 TraceCheckUtils]: 391: Hoare triple {398319#false} assume -2147483648 <= #t~ret25 && #t~ret25 <= 2147483647;~tmp~4 := #t~ret25;havoc #t~ret25; {398319#false} is VALID [2018-11-19 18:42:12,378 INFO L273 TraceCheckUtils]: 392: Hoare triple {398319#false} assume 0 != ~tmp~4; {398319#false} is VALID [2018-11-19 18:42:12,379 INFO L256 TraceCheckUtils]: 393: Hoare triple {398319#false} call #t~ret26 := usb_endpoint_dir_out(~epd.base, ~epd.offset); {398319#false} is VALID [2018-11-19 18:42:12,379 INFO L273 TraceCheckUtils]: 394: Hoare triple {398319#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem21 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem21 % 256 % 256 <= 127 then #t~mem21 % 256 % 256 else #t~mem21 % 256 % 256 - 256) >= 0 then 1 else 0);havoc #t~mem21; {398319#false} is VALID [2018-11-19 18:42:12,379 INFO L273 TraceCheckUtils]: 395: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,379 INFO L268 TraceCheckUtils]: 396: Hoare quadruple {398319#false} {398319#false} #2889#return; {398319#false} is VALID [2018-11-19 18:42:12,379 INFO L273 TraceCheckUtils]: 397: Hoare triple {398319#false} assume -2147483648 <= #t~ret26 && #t~ret26 <= 2147483647;~tmp___0~1 := #t~ret26;havoc #t~ret26; {398319#false} is VALID [2018-11-19 18:42:12,379 INFO L273 TraceCheckUtils]: 398: Hoare triple {398319#false} assume 0 != ~tmp___0~1;~tmp___1~1 := 1; {398319#false} is VALID [2018-11-19 18:42:12,380 INFO L273 TraceCheckUtils]: 399: Hoare triple {398319#false} #res := ~tmp___1~1; {398319#false} is VALID [2018-11-19 18:42:12,380 INFO L273 TraceCheckUtils]: 400: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,380 INFO L268 TraceCheckUtils]: 401: Hoare quadruple {398319#false} {398319#false} #3141#return; {398319#false} is VALID [2018-11-19 18:42:12,380 INFO L273 TraceCheckUtils]: 402: Hoare triple {398319#false} assume -2147483648 <= #t~ret678 && #t~ret678 <= 2147483647;~tmp___0~16 := #t~ret678;havoc #t~mem677.base, #t~mem677.offset;havoc #t~ret678; {398319#false} is VALID [2018-11-19 18:42:12,380 INFO L273 TraceCheckUtils]: 403: Hoare triple {398319#false} assume !(0 == ~tmp___0~16);call #t~mem682.base, #t~mem682.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {398319#false} is VALID [2018-11-19 18:42:12,380 INFO L256 TraceCheckUtils]: 404: Hoare triple {398319#false} call #t~ret683 := usb_endpoint_maxp(#t~mem682.base, #t~mem682.offset); {398319#false} is VALID [2018-11-19 18:42:12,381 INFO L273 TraceCheckUtils]: 405: Hoare triple {398319#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {398319#false} is VALID [2018-11-19 18:42:12,381 INFO L273 TraceCheckUtils]: 406: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,381 INFO L268 TraceCheckUtils]: 407: Hoare quadruple {398319#false} {398319#false} #3143#return; {398319#false} is VALID [2018-11-19 18:42:12,381 INFO L273 TraceCheckUtils]: 408: Hoare triple {398319#false} assume -2147483648 <= #t~ret683 && #t~ret683 <= 2147483647;~tmp___1~7 := #t~ret683;havoc #t~mem682.base, #t~mem682.offset;havoc #t~ret683;call write~int(~tmp___1~7, ~pcu.base, 183 + ~pcu.offset, 4);call #t~mem684 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {398319#false} is VALID [2018-11-19 18:42:12,381 INFO L273 TraceCheckUtils]: 409: Hoare triple {398319#false} assume !(#t~mem684 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem684;call #t~mem689.base, #t~mem689.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem689.base, 63 + #t~mem689.offset, ~pcu.base, 131 + ~pcu.offset, 8);havoc #t~mem689.base, #t~mem689.offset;call #t~mem690.base, #t~mem690.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {398319#false} is VALID [2018-11-19 18:42:12,381 INFO L256 TraceCheckUtils]: 410: Hoare triple {398319#false} call #t~ret691 := usb_endpoint_is_bulk_in(#t~mem690.base, #t~mem690.offset); {398319#false} is VALID [2018-11-19 18:42:12,382 INFO L273 TraceCheckUtils]: 411: Hoare triple {398319#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~3;havoc ~tmp___0~0;havoc ~tmp___1~0; {398319#false} is VALID [2018-11-19 18:42:12,382 INFO L256 TraceCheckUtils]: 412: Hoare triple {398319#false} call #t~ret23 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {398319#false} is VALID [2018-11-19 18:42:12,382 INFO L273 TraceCheckUtils]: 413: Hoare triple {398319#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {398319#false} is VALID [2018-11-19 18:42:12,382 INFO L273 TraceCheckUtils]: 414: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,382 INFO L268 TraceCheckUtils]: 415: Hoare quadruple {398319#false} {398319#false} #2915#return; {398319#false} is VALID [2018-11-19 18:42:12,382 INFO L273 TraceCheckUtils]: 416: Hoare triple {398319#false} assume -2147483648 <= #t~ret23 && #t~ret23 <= 2147483647;~tmp~3 := #t~ret23;havoc #t~ret23; {398319#false} is VALID [2018-11-19 18:42:12,383 INFO L273 TraceCheckUtils]: 417: Hoare triple {398319#false} assume 0 != ~tmp~3; {398319#false} is VALID [2018-11-19 18:42:12,383 INFO L256 TraceCheckUtils]: 418: Hoare triple {398319#false} call #t~ret24 := usb_endpoint_dir_in(~epd.base, ~epd.offset); {398319#false} is VALID [2018-11-19 18:42:12,383 INFO L273 TraceCheckUtils]: 419: Hoare triple {398319#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem20 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem20 % 256 % 256 <= 127 then #t~mem20 % 256 % 256 else #t~mem20 % 256 % 256 - 256) < 0 then 1 else 0);havoc #t~mem20; {398319#false} is VALID [2018-11-19 18:42:12,383 INFO L273 TraceCheckUtils]: 420: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,383 INFO L268 TraceCheckUtils]: 421: Hoare quadruple {398319#false} {398319#false} #2917#return; {398319#false} is VALID [2018-11-19 18:42:12,383 INFO L273 TraceCheckUtils]: 422: Hoare triple {398319#false} assume -2147483648 <= #t~ret24 && #t~ret24 <= 2147483647;~tmp___0~0 := #t~ret24;havoc #t~ret24; {398319#false} is VALID [2018-11-19 18:42:12,383 INFO L273 TraceCheckUtils]: 423: Hoare triple {398319#false} assume 0 != ~tmp___0~0;~tmp___1~0 := 1; {398319#false} is VALID [2018-11-19 18:42:12,384 INFO L273 TraceCheckUtils]: 424: Hoare triple {398319#false} #res := ~tmp___1~0; {398319#false} is VALID [2018-11-19 18:42:12,384 INFO L273 TraceCheckUtils]: 425: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,384 INFO L268 TraceCheckUtils]: 426: Hoare quadruple {398319#false} {398319#false} #3145#return; {398319#false} is VALID [2018-11-19 18:42:12,384 INFO L273 TraceCheckUtils]: 427: Hoare triple {398319#false} assume -2147483648 <= #t~ret691 && #t~ret691 <= 2147483647;~tmp___2~3 := #t~ret691;havoc #t~ret691;havoc #t~mem690.base, #t~mem690.offset; {398319#false} is VALID [2018-11-19 18:42:12,384 INFO L273 TraceCheckUtils]: 428: Hoare triple {398319#false} assume !(0 == ~tmp___2~3);call #t~mem695.base, #t~mem695.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {398319#false} is VALID [2018-11-19 18:42:12,384 INFO L256 TraceCheckUtils]: 429: Hoare triple {398319#false} call #t~ret696 := usb_endpoint_maxp(#t~mem695.base, #t~mem695.offset); {398319#false} is VALID [2018-11-19 18:42:12,385 INFO L273 TraceCheckUtils]: 430: Hoare triple {398319#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {398319#false} is VALID [2018-11-19 18:42:12,385 INFO L273 TraceCheckUtils]: 431: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,385 INFO L268 TraceCheckUtils]: 432: Hoare quadruple {398319#false} {398319#false} #3147#return; {398319#false} is VALID [2018-11-19 18:42:12,385 INFO L273 TraceCheckUtils]: 433: Hoare triple {398319#false} assume -2147483648 <= #t~ret696 && #t~ret696 <= 2147483647;~tmp___3~2 := #t~ret696;havoc #t~ret696;havoc #t~mem695.base, #t~mem695.offset;call write~int(~tmp___3~2, ~pcu.base, 163 + ~pcu.offset, 4);call #t~mem697 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {398319#false} is VALID [2018-11-19 18:42:12,385 INFO L273 TraceCheckUtils]: 434: Hoare triple {398319#false} assume !(#t~mem697 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem697;#res := 0; {398319#false} is VALID [2018-11-19 18:42:12,385 INFO L273 TraceCheckUtils]: 435: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,386 INFO L268 TraceCheckUtils]: 436: Hoare quadruple {398319#false} {398319#false} #3103#return; {398319#false} is VALID [2018-11-19 18:42:12,386 INFO L273 TraceCheckUtils]: 437: Hoare triple {398319#false} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {398319#false} is VALID [2018-11-19 18:42:12,386 INFO L273 TraceCheckUtils]: 438: Hoare triple {398319#false} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {398319#false} is VALID [2018-11-19 18:42:12,386 INFO L273 TraceCheckUtils]: 439: Hoare triple {398319#false} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {398319#false} is VALID [2018-11-19 18:42:12,386 INFO L256 TraceCheckUtils]: 440: Hoare triple {398319#false} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {398319#false} is VALID [2018-11-19 18:42:12,386 INFO L273 TraceCheckUtils]: 441: Hoare triple {398319#false} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {398319#false} is VALID [2018-11-19 18:42:12,387 INFO L256 TraceCheckUtils]: 442: Hoare triple {398319#false} call ldv_usb_set_intfdata(~data.base, ~data.offset); {398319#false} is VALID [2018-11-19 18:42:12,387 INFO L273 TraceCheckUtils]: 443: Hoare triple {398319#false} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {398319#false} is VALID [2018-11-19 18:42:12,387 INFO L273 TraceCheckUtils]: 444: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,387 INFO L268 TraceCheckUtils]: 445: Hoare quadruple {398319#false} {398319#false} #2541#return; {398319#false} is VALID [2018-11-19 18:42:12,387 INFO L273 TraceCheckUtils]: 446: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,387 INFO L268 TraceCheckUtils]: 447: Hoare quadruple {398319#false} {398319#false} #3105#return; {398319#false} is VALID [2018-11-19 18:42:12,388 INFO L273 TraceCheckUtils]: 448: Hoare triple {398319#false} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {398319#false} is VALID [2018-11-19 18:42:12,388 INFO L256 TraceCheckUtils]: 449: Hoare triple {398319#false} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {398319#false} is VALID [2018-11-19 18:42:12,388 INFO L273 TraceCheckUtils]: 450: Hoare triple {398319#false} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {398319#false} is VALID [2018-11-19 18:42:12,388 INFO L256 TraceCheckUtils]: 451: Hoare triple {398319#false} call ldv_usb_set_intfdata(~data.base, ~data.offset); {398319#false} is VALID [2018-11-19 18:42:12,388 INFO L273 TraceCheckUtils]: 452: Hoare triple {398319#false} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {398319#false} is VALID [2018-11-19 18:42:12,388 INFO L273 TraceCheckUtils]: 453: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,388 INFO L268 TraceCheckUtils]: 454: Hoare quadruple {398319#false} {398319#false} #2541#return; {398319#false} is VALID [2018-11-19 18:42:12,389 INFO L273 TraceCheckUtils]: 455: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,389 INFO L268 TraceCheckUtils]: 456: Hoare quadruple {398319#false} {398319#false} #3107#return; {398319#false} is VALID [2018-11-19 18:42:12,389 INFO L273 TraceCheckUtils]: 457: Hoare triple {398319#false} havoc #t~mem837.base, #t~mem837.offset; {398319#false} is VALID [2018-11-19 18:42:12,389 INFO L256 TraceCheckUtils]: 458: Hoare triple {398319#false} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {398319#false} is VALID [2018-11-19 18:42:12,389 INFO L273 TraceCheckUtils]: 459: Hoare triple {398319#false} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {398319#false} is VALID [2018-11-19 18:42:12,389 INFO L273 TraceCheckUtils]: 460: Hoare triple {398319#false} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {398319#false} is VALID [2018-11-19 18:42:12,390 INFO L256 TraceCheckUtils]: 461: Hoare triple {398319#false} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {398319#false} is VALID [2018-11-19 18:42:12,390 INFO L273 TraceCheckUtils]: 462: Hoare triple {398319#false} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {398319#false} is VALID [2018-11-19 18:42:12,390 INFO L256 TraceCheckUtils]: 463: Hoare triple {398319#false} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {398319#false} is VALID [2018-11-19 18:42:12,390 INFO L273 TraceCheckUtils]: 464: Hoare triple {398319#false} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {398319#false} is VALID [2018-11-19 18:42:12,390 INFO L256 TraceCheckUtils]: 465: Hoare triple {398319#false} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {398319#false} is VALID [2018-11-19 18:42:12,390 INFO L273 TraceCheckUtils]: 466: Hoare triple {398319#false} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {398319#false} is VALID [2018-11-19 18:42:12,391 INFO L273 TraceCheckUtils]: 467: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,391 INFO L268 TraceCheckUtils]: 468: Hoare quadruple {398319#false} {398319#false} #2605#return; {398319#false} is VALID [2018-11-19 18:42:12,391 INFO L273 TraceCheckUtils]: 469: Hoare triple {398319#false} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {398319#false} is VALID [2018-11-19 18:42:12,391 INFO L256 TraceCheckUtils]: 470: Hoare triple {398319#false} call #t~ret965 := ldv_undef_int(); {398319#false} is VALID [2018-11-19 18:42:12,391 INFO L273 TraceCheckUtils]: 471: Hoare triple {398319#false} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {398319#false} is VALID [2018-11-19 18:42:12,391 INFO L273 TraceCheckUtils]: 472: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,391 INFO L268 TraceCheckUtils]: 473: Hoare quadruple {398319#false} {398319#false} #2607#return; {398319#false} is VALID [2018-11-19 18:42:12,391 INFO L273 TraceCheckUtils]: 474: Hoare triple {398319#false} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {398319#false} is VALID [2018-11-19 18:42:12,392 INFO L273 TraceCheckUtils]: 475: Hoare triple {398319#false} assume 0 != ~tmp___0~26; {398319#false} is VALID [2018-11-19 18:42:12,392 INFO L273 TraceCheckUtils]: 476: Hoare triple {398319#false} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {398319#false} is VALID [2018-11-19 18:42:12,392 INFO L273 TraceCheckUtils]: 477: Hoare triple {398319#false} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {398319#false} is VALID [2018-11-19 18:42:12,392 INFO L273 TraceCheckUtils]: 478: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,392 INFO L268 TraceCheckUtils]: 479: Hoare quadruple {398319#false} {398319#false} #3135#return; {398319#false} is VALID [2018-11-19 18:42:12,392 INFO L273 TraceCheckUtils]: 480: Hoare triple {398319#false} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {398319#false} is VALID [2018-11-19 18:42:12,392 INFO L273 TraceCheckUtils]: 481: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,392 INFO L268 TraceCheckUtils]: 482: Hoare quadruple {398319#false} {398319#false} #2709#return; {398319#false} is VALID [2018-11-19 18:42:12,392 INFO L273 TraceCheckUtils]: 483: Hoare triple {398319#false} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {398319#false} is VALID [2018-11-19 18:42:12,393 INFO L273 TraceCheckUtils]: 484: Hoare triple {398319#false} assume 0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616;havoc #t~mem561.base, #t~mem561.offset;havoc #t~nondet562;call #t~mem563.base, #t~mem563.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem563.base, #t~mem563.offset;~error~18 := -12; {398319#false} is VALID [2018-11-19 18:42:12,393 INFO L273 TraceCheckUtils]: 485: Hoare triple {398319#false} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {398319#false} is VALID [2018-11-19 18:42:12,393 INFO L273 TraceCheckUtils]: 486: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,393 INFO L268 TraceCheckUtils]: 487: Hoare quadruple {398319#false} {398319#false} #3109#return; {398319#false} is VALID [2018-11-19 18:42:12,393 INFO L273 TraceCheckUtils]: 488: Hoare triple {398319#false} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {398319#false} is VALID [2018-11-19 18:42:12,393 INFO L273 TraceCheckUtils]: 489: Hoare triple {398319#false} assume 0 != ~error~25; {398319#false} is VALID [2018-11-19 18:42:12,393 INFO L273 TraceCheckUtils]: 490: Hoare triple {398319#false} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {398319#false} is VALID [2018-11-19 18:42:12,393 INFO L273 TraceCheckUtils]: 491: Hoare triple {398319#false} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {398319#false} is VALID [2018-11-19 18:42:12,394 INFO L273 TraceCheckUtils]: 492: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,394 INFO L268 TraceCheckUtils]: 493: Hoare quadruple {398319#false} {398319#false} #3015#return; {398319#false} is VALID [2018-11-19 18:42:12,394 INFO L273 TraceCheckUtils]: 494: Hoare triple {398319#false} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {398319#false} is VALID [2018-11-19 18:42:12,394 INFO L273 TraceCheckUtils]: 495: Hoare triple {398319#false} assume !(0 == ~ldv_retval_3~0); {398319#false} is VALID [2018-11-19 18:42:12,394 INFO L273 TraceCheckUtils]: 496: Hoare triple {398319#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,394 INFO L273 TraceCheckUtils]: 497: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,394 INFO L273 TraceCheckUtils]: 498: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,394 INFO L273 TraceCheckUtils]: 499: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,394 INFO L273 TraceCheckUtils]: 500: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,395 INFO L273 TraceCheckUtils]: 501: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,395 INFO L273 TraceCheckUtils]: 502: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,395 INFO L273 TraceCheckUtils]: 503: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,395 INFO L273 TraceCheckUtils]: 504: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,395 INFO L273 TraceCheckUtils]: 505: Hoare triple {398319#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {398319#false} is VALID [2018-11-19 18:42:12,395 INFO L273 TraceCheckUtils]: 506: Hoare triple {398319#false} assume #t~switch909; {398319#false} is VALID [2018-11-19 18:42:12,395 INFO L273 TraceCheckUtils]: 507: Hoare triple {398319#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {398319#false} is VALID [2018-11-19 18:42:12,395 INFO L273 TraceCheckUtils]: 508: Hoare triple {398319#false} assume #t~switch947; {398319#false} is VALID [2018-11-19 18:42:12,395 INFO L273 TraceCheckUtils]: 509: Hoare triple {398319#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {398319#false} is VALID [2018-11-19 18:42:12,396 INFO L256 TraceCheckUtils]: 510: Hoare triple {398319#false} call ims_pcu_driver_exit(); {398319#false} is VALID [2018-11-19 18:42:12,396 INFO L256 TraceCheckUtils]: 511: Hoare triple {398319#false} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {398319#false} is VALID [2018-11-19 18:42:12,396 INFO L273 TraceCheckUtils]: 512: Hoare triple {398319#false} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {398319#false} is VALID [2018-11-19 18:42:12,396 INFO L273 TraceCheckUtils]: 513: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,396 INFO L268 TraceCheckUtils]: 514: Hoare quadruple {398319#false} {398319#false} #2597#return; {398319#false} is VALID [2018-11-19 18:42:12,396 INFO L273 TraceCheckUtils]: 515: Hoare triple {398319#false} assume true; {398319#false} is VALID [2018-11-19 18:42:12,396 INFO L268 TraceCheckUtils]: 516: Hoare quadruple {398319#false} {398319#false} #3033#return; {398319#false} is VALID [2018-11-19 18:42:12,396 INFO L273 TraceCheckUtils]: 517: Hoare triple {398319#false} ~ldv_state_variable_0~0 := 2; {398319#false} is VALID [2018-11-19 18:42:12,396 INFO L256 TraceCheckUtils]: 518: Hoare triple {398319#false} call ldv_check_final_state(); {398319#false} is VALID [2018-11-19 18:42:12,397 INFO L273 TraceCheckUtils]: 519: Hoare triple {398319#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {398319#false} is VALID [2018-11-19 18:42:12,397 INFO L256 TraceCheckUtils]: 520: Hoare triple {398319#false} call ldv_error(); {398319#false} is VALID [2018-11-19 18:42:12,397 INFO L273 TraceCheckUtils]: 521: Hoare triple {398319#false} assume !false; {398319#false} is VALID [2018-11-19 18:42:12,483 INFO L134 CoverageAnalysis]: Checked inductivity of 2723 backedges. 1248 proven. 3 refuted. 0 times theorem prover too weak. 1472 trivial. 0 not checked. [2018-11-19 18:42:12,511 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-19 18:42:12,512 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2018-11-19 18:42:12,513 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 522 [2018-11-19 18:42:12,609 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:42:12,609 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states. [2018-11-19 18:42:13,234 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 640 edges. 640 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:42:13,235 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-19 18:42:13,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-19 18:42:13,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=54, Unknown=0, NotChecked=0, Total=90 [2018-11-19 18:42:13,236 INFO L87 Difference]: Start difference. First operand 7310 states and 9867 transitions. Second operand 10 states. [2018-11-19 18:42:48,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:42:48,467 INFO L93 Difference]: Finished difference Result 14645 states and 19792 transitions. [2018-11-19 18:42:48,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-19 18:42:48,467 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 522 [2018-11-19 18:42:48,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:42:48,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-19 18:42:48,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 3284 transitions. [2018-11-19 18:42:48,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-19 18:42:48,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 3284 transitions. [2018-11-19 18:42:48,598 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 3284 transitions. [2018-11-19 18:42:51,333 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3284 edges. 3284 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:42:53,892 INFO L225 Difference]: With dead ends: 14645 [2018-11-19 18:42:53,893 INFO L226 Difference]: Without dead ends: 7391 [2018-11-19 18:42:53,901 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 533 GetRequests, 519 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=95, Invalid=145, Unknown=0, NotChecked=0, Total=240 [2018-11-19 18:42:53,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7391 states. [2018-11-19 18:43:09,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7391 to 7315. [2018-11-19 18:43:09,432 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:43:09,432 INFO L82 GeneralOperation]: Start isEquivalent. First operand 7391 states. Second operand 7315 states. [2018-11-19 18:43:09,432 INFO L74 IsIncluded]: Start isIncluded. First operand 7391 states. Second operand 7315 states. [2018-11-19 18:43:09,432 INFO L87 Difference]: Start difference. First operand 7391 states. Second operand 7315 states. [2018-11-19 18:43:11,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:43:11,579 INFO L93 Difference]: Finished difference Result 7391 states and 9973 transitions. [2018-11-19 18:43:11,579 INFO L276 IsEmpty]: Start isEmpty. Operand 7391 states and 9973 transitions. [2018-11-19 18:43:11,655 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:43:11,655 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:43:11,655 INFO L74 IsIncluded]: Start isIncluded. First operand 7315 states. Second operand 7391 states. [2018-11-19 18:43:11,655 INFO L87 Difference]: Start difference. First operand 7315 states. Second operand 7391 states. [2018-11-19 18:43:13,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:43:13,827 INFO L93 Difference]: Finished difference Result 7391 states and 9973 transitions. [2018-11-19 18:43:13,827 INFO L276 IsEmpty]: Start isEmpty. Operand 7391 states and 9973 transitions. [2018-11-19 18:43:13,838 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:43:13,838 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:43:13,838 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:43:13,838 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:43:13,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7315 states. [2018-11-19 18:43:16,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7315 states to 7315 states and 9873 transitions. [2018-11-19 18:43:16,050 INFO L78 Accepts]: Start accepts. Automaton has 7315 states and 9873 transitions. Word has length 522 [2018-11-19 18:43:16,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:43:16,050 INFO L480 AbstractCegarLoop]: Abstraction has 7315 states and 9873 transitions. [2018-11-19 18:43:16,050 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-19 18:43:16,050 INFO L276 IsEmpty]: Start isEmpty. Operand 7315 states and 9873 transitions. [2018-11-19 18:43:16,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 524 [2018-11-19 18:43:16,058 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:43:16,058 INFO L384 BasicCegarLoop]: trace histogram [37, 37, 37, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:43:16,059 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:43:16,063 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:43:16,063 INFO L82 PathProgramCache]: Analyzing trace with hash -1728436538, now seen corresponding path program 2 times [2018-11-19 18:43:16,063 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:43:16,063 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:43:16,065 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:43:16,065 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:43:16,066 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:43:16,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:43:16,486 INFO L256 TraceCheckUtils]: 0: Hoare triple {443786#true} call ULTIMATE.init(); {443786#true} is VALID [2018-11-19 18:43:16,486 INFO L273 TraceCheckUtils]: 1: Hoare triple {443786#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,487 INFO L273 TraceCheckUtils]: 2: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,487 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {443786#true} {443786#true} #3175#return; {443786#true} is VALID [2018-11-19 18:43:16,487 INFO L256 TraceCheckUtils]: 4: Hoare triple {443786#true} call #t~ret973 := main(); {443786#true} is VALID [2018-11-19 18:43:16,487 INFO L273 TraceCheckUtils]: 5: Hoare triple {443786#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {443786#true} is VALID [2018-11-19 18:43:16,488 INFO L256 TraceCheckUtils]: 6: Hoare triple {443786#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:16,488 INFO L273 TraceCheckUtils]: 7: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,488 INFO L273 TraceCheckUtils]: 8: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,488 INFO L273 TraceCheckUtils]: 9: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,488 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {443786#true} {443786#true} #2927#return; {443786#true} is VALID [2018-11-19 18:43:16,489 INFO L273 TraceCheckUtils]: 11: Hoare triple {443786#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {443786#true} is VALID [2018-11-19 18:43:16,489 INFO L256 TraceCheckUtils]: 12: Hoare triple {443786#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:16,489 INFO L273 TraceCheckUtils]: 13: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,489 INFO L273 TraceCheckUtils]: 14: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,489 INFO L273 TraceCheckUtils]: 15: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,490 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {443786#true} {443786#true} #2929#return; {443786#true} is VALID [2018-11-19 18:43:16,490 INFO L273 TraceCheckUtils]: 17: Hoare triple {443786#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {443786#true} is VALID [2018-11-19 18:43:16,490 INFO L256 TraceCheckUtils]: 18: Hoare triple {443786#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:16,490 INFO L273 TraceCheckUtils]: 19: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,490 INFO L273 TraceCheckUtils]: 20: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,491 INFO L273 TraceCheckUtils]: 21: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,491 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {443786#true} {443786#true} #2931#return; {443786#true} is VALID [2018-11-19 18:43:16,491 INFO L273 TraceCheckUtils]: 23: Hoare triple {443786#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {443786#true} is VALID [2018-11-19 18:43:16,491 INFO L256 TraceCheckUtils]: 24: Hoare triple {443786#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:16,491 INFO L273 TraceCheckUtils]: 25: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,492 INFO L273 TraceCheckUtils]: 26: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,492 INFO L273 TraceCheckUtils]: 27: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,492 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {443786#true} {443786#true} #2933#return; {443786#true} is VALID [2018-11-19 18:43:16,492 INFO L273 TraceCheckUtils]: 29: Hoare triple {443786#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {443786#true} is VALID [2018-11-19 18:43:16,492 INFO L256 TraceCheckUtils]: 30: Hoare triple {443786#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {443786#true} is VALID [2018-11-19 18:43:16,493 INFO L273 TraceCheckUtils]: 31: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,493 INFO L273 TraceCheckUtils]: 32: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,493 INFO L273 TraceCheckUtils]: 33: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,493 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {443786#true} {443786#true} #2935#return; {443786#true} is VALID [2018-11-19 18:43:16,493 INFO L273 TraceCheckUtils]: 35: Hoare triple {443786#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {443786#true} is VALID [2018-11-19 18:43:16,493 INFO L256 TraceCheckUtils]: 36: Hoare triple {443786#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:16,493 INFO L273 TraceCheckUtils]: 37: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,493 INFO L273 TraceCheckUtils]: 38: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,493 INFO L273 TraceCheckUtils]: 39: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,494 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {443786#true} {443786#true} #2937#return; {443786#true} is VALID [2018-11-19 18:43:16,494 INFO L273 TraceCheckUtils]: 41: Hoare triple {443786#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {443786#true} is VALID [2018-11-19 18:43:16,494 INFO L256 TraceCheckUtils]: 42: Hoare triple {443786#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {443786#true} is VALID [2018-11-19 18:43:16,494 INFO L273 TraceCheckUtils]: 43: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,494 INFO L273 TraceCheckUtils]: 44: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,494 INFO L273 TraceCheckUtils]: 45: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,494 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {443786#true} {443786#true} #2939#return; {443786#true} is VALID [2018-11-19 18:43:16,494 INFO L273 TraceCheckUtils]: 47: Hoare triple {443786#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {443786#true} is VALID [2018-11-19 18:43:16,494 INFO L256 TraceCheckUtils]: 48: Hoare triple {443786#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:16,495 INFO L273 TraceCheckUtils]: 49: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,495 INFO L273 TraceCheckUtils]: 50: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,495 INFO L273 TraceCheckUtils]: 51: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,495 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {443786#true} {443786#true} #2941#return; {443786#true} is VALID [2018-11-19 18:43:16,495 INFO L273 TraceCheckUtils]: 53: Hoare triple {443786#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {443786#true} is VALID [2018-11-19 18:43:16,495 INFO L256 TraceCheckUtils]: 54: Hoare triple {443786#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:16,495 INFO L273 TraceCheckUtils]: 55: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,495 INFO L273 TraceCheckUtils]: 56: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,495 INFO L273 TraceCheckUtils]: 57: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,496 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {443786#true} {443786#true} #2943#return; {443786#true} is VALID [2018-11-19 18:43:16,496 INFO L273 TraceCheckUtils]: 59: Hoare triple {443786#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {443786#true} is VALID [2018-11-19 18:43:16,496 INFO L256 TraceCheckUtils]: 60: Hoare triple {443786#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:16,496 INFO L273 TraceCheckUtils]: 61: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,496 INFO L273 TraceCheckUtils]: 62: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,496 INFO L273 TraceCheckUtils]: 63: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,496 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {443786#true} {443786#true} #2945#return; {443786#true} is VALID [2018-11-19 18:43:16,496 INFO L273 TraceCheckUtils]: 65: Hoare triple {443786#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {443786#true} is VALID [2018-11-19 18:43:16,496 INFO L256 TraceCheckUtils]: 66: Hoare triple {443786#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:16,497 INFO L273 TraceCheckUtils]: 67: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,497 INFO L273 TraceCheckUtils]: 68: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,497 INFO L273 TraceCheckUtils]: 69: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,497 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {443786#true} {443786#true} #2947#return; {443786#true} is VALID [2018-11-19 18:43:16,497 INFO L273 TraceCheckUtils]: 71: Hoare triple {443786#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {443786#true} is VALID [2018-11-19 18:43:16,497 INFO L256 TraceCheckUtils]: 72: Hoare triple {443786#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {443786#true} is VALID [2018-11-19 18:43:16,497 INFO L273 TraceCheckUtils]: 73: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,497 INFO L273 TraceCheckUtils]: 74: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,497 INFO L273 TraceCheckUtils]: 75: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,498 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {443786#true} {443786#true} #2949#return; {443786#true} is VALID [2018-11-19 18:43:16,498 INFO L273 TraceCheckUtils]: 77: Hoare triple {443786#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {443786#true} is VALID [2018-11-19 18:43:16,498 INFO L256 TraceCheckUtils]: 78: Hoare triple {443786#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {443786#true} is VALID [2018-11-19 18:43:16,498 INFO L273 TraceCheckUtils]: 79: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,498 INFO L273 TraceCheckUtils]: 80: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,498 INFO L273 TraceCheckUtils]: 81: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,498 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {443786#true} {443786#true} #2951#return; {443786#true} is VALID [2018-11-19 18:43:16,498 INFO L273 TraceCheckUtils]: 83: Hoare triple {443786#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {443786#true} is VALID [2018-11-19 18:43:16,498 INFO L256 TraceCheckUtils]: 84: Hoare triple {443786#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:16,499 INFO L273 TraceCheckUtils]: 85: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,499 INFO L273 TraceCheckUtils]: 86: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,499 INFO L273 TraceCheckUtils]: 87: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,499 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {443786#true} {443786#true} #2953#return; {443786#true} is VALID [2018-11-19 18:43:16,499 INFO L273 TraceCheckUtils]: 89: Hoare triple {443786#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {443786#true} is VALID [2018-11-19 18:43:16,499 INFO L256 TraceCheckUtils]: 90: Hoare triple {443786#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:16,499 INFO L273 TraceCheckUtils]: 91: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,499 INFO L273 TraceCheckUtils]: 92: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,499 INFO L273 TraceCheckUtils]: 93: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,499 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {443786#true} {443786#true} #2955#return; {443786#true} is VALID [2018-11-19 18:43:16,500 INFO L273 TraceCheckUtils]: 95: Hoare triple {443786#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {443786#true} is VALID [2018-11-19 18:43:16,500 INFO L256 TraceCheckUtils]: 96: Hoare triple {443786#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {443786#true} is VALID [2018-11-19 18:43:16,500 INFO L273 TraceCheckUtils]: 97: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,500 INFO L273 TraceCheckUtils]: 98: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,500 INFO L273 TraceCheckUtils]: 99: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,500 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {443786#true} {443786#true} #2957#return; {443786#true} is VALID [2018-11-19 18:43:16,500 INFO L273 TraceCheckUtils]: 101: Hoare triple {443786#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {443786#true} is VALID [2018-11-19 18:43:16,500 INFO L256 TraceCheckUtils]: 102: Hoare triple {443786#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {443786#true} is VALID [2018-11-19 18:43:16,500 INFO L273 TraceCheckUtils]: 103: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,501 INFO L273 TraceCheckUtils]: 104: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,501 INFO L273 TraceCheckUtils]: 105: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,501 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {443786#true} {443786#true} #2959#return; {443786#true} is VALID [2018-11-19 18:43:16,501 INFO L273 TraceCheckUtils]: 107: Hoare triple {443786#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {443786#true} is VALID [2018-11-19 18:43:16,501 INFO L256 TraceCheckUtils]: 108: Hoare triple {443786#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {443786#true} is VALID [2018-11-19 18:43:16,501 INFO L273 TraceCheckUtils]: 109: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,501 INFO L273 TraceCheckUtils]: 110: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,501 INFO L273 TraceCheckUtils]: 111: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,501 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {443786#true} {443786#true} #2961#return; {443786#true} is VALID [2018-11-19 18:43:16,501 INFO L273 TraceCheckUtils]: 113: Hoare triple {443786#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {443786#true} is VALID [2018-11-19 18:43:16,502 INFO L256 TraceCheckUtils]: 114: Hoare triple {443786#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:16,502 INFO L273 TraceCheckUtils]: 115: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,502 INFO L273 TraceCheckUtils]: 116: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,502 INFO L273 TraceCheckUtils]: 117: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,502 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {443786#true} {443786#true} #2963#return; {443786#true} is VALID [2018-11-19 18:43:16,502 INFO L273 TraceCheckUtils]: 119: Hoare triple {443786#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {443786#true} is VALID [2018-11-19 18:43:16,502 INFO L256 TraceCheckUtils]: 120: Hoare triple {443786#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:16,502 INFO L273 TraceCheckUtils]: 121: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,502 INFO L273 TraceCheckUtils]: 122: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,502 INFO L273 TraceCheckUtils]: 123: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,503 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {443786#true} {443786#true} #2965#return; {443786#true} is VALID [2018-11-19 18:43:16,503 INFO L273 TraceCheckUtils]: 125: Hoare triple {443786#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {443786#true} is VALID [2018-11-19 18:43:16,503 INFO L256 TraceCheckUtils]: 126: Hoare triple {443786#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:16,503 INFO L273 TraceCheckUtils]: 127: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,503 INFO L273 TraceCheckUtils]: 128: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,503 INFO L273 TraceCheckUtils]: 129: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,503 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {443786#true} {443786#true} #2967#return; {443786#true} is VALID [2018-11-19 18:43:16,503 INFO L273 TraceCheckUtils]: 131: Hoare triple {443786#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {443786#true} is VALID [2018-11-19 18:43:16,503 INFO L256 TraceCheckUtils]: 132: Hoare triple {443786#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:16,503 INFO L273 TraceCheckUtils]: 133: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,504 INFO L273 TraceCheckUtils]: 134: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,504 INFO L273 TraceCheckUtils]: 135: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,504 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {443786#true} {443786#true} #2969#return; {443786#true} is VALID [2018-11-19 18:43:16,504 INFO L273 TraceCheckUtils]: 137: Hoare triple {443786#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {443786#true} is VALID [2018-11-19 18:43:16,504 INFO L256 TraceCheckUtils]: 138: Hoare triple {443786#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {443786#true} is VALID [2018-11-19 18:43:16,504 INFO L273 TraceCheckUtils]: 139: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,504 INFO L273 TraceCheckUtils]: 140: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,504 INFO L273 TraceCheckUtils]: 141: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,504 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {443786#true} {443786#true} #2971#return; {443786#true} is VALID [2018-11-19 18:43:16,505 INFO L273 TraceCheckUtils]: 143: Hoare triple {443786#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {443786#true} is VALID [2018-11-19 18:43:16,505 INFO L256 TraceCheckUtils]: 144: Hoare triple {443786#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {443786#true} is VALID [2018-11-19 18:43:16,505 INFO L273 TraceCheckUtils]: 145: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,505 INFO L273 TraceCheckUtils]: 146: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,505 INFO L273 TraceCheckUtils]: 147: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,505 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {443786#true} {443786#true} #2973#return; {443786#true} is VALID [2018-11-19 18:43:16,505 INFO L273 TraceCheckUtils]: 149: Hoare triple {443786#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {443786#true} is VALID [2018-11-19 18:43:16,505 INFO L256 TraceCheckUtils]: 150: Hoare triple {443786#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {443786#true} is VALID [2018-11-19 18:43:16,506 INFO L273 TraceCheckUtils]: 151: Hoare triple {443786#true} #t~loopctr974 := 0; {443788#(= |#Ultimate.C_memset_#t~loopctr974| 0)} is VALID [2018-11-19 18:43:16,507 INFO L273 TraceCheckUtils]: 152: Hoare triple {443788#(= |#Ultimate.C_memset_#t~loopctr974| 0)} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {443789#(or (not (= |#Ultimate.C_memset_#amount| 4)) (<= |#Ultimate.C_memset_#t~loopctr974| 1))} is VALID [2018-11-19 18:43:16,508 INFO L273 TraceCheckUtils]: 153: Hoare triple {443789#(or (not (= |#Ultimate.C_memset_#amount| 4)) (<= |#Ultimate.C_memset_#t~loopctr974| 1))} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {443790#(or (not (= |#Ultimate.C_memset_#amount| 4)) (<= |#Ultimate.C_memset_#t~loopctr974| 2))} is VALID [2018-11-19 18:43:16,510 INFO L273 TraceCheckUtils]: 154: Hoare triple {443790#(or (not (= |#Ultimate.C_memset_#amount| 4)) (<= |#Ultimate.C_memset_#t~loopctr974| 2))} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {443791#(or (not (= |#Ultimate.C_memset_#amount| 4)) (<= |#Ultimate.C_memset_#t~loopctr974| 3))} is VALID [2018-11-19 18:43:16,512 INFO L273 TraceCheckUtils]: 155: Hoare triple {443791#(or (not (= |#Ultimate.C_memset_#amount| 4)) (<= |#Ultimate.C_memset_#t~loopctr974| 3))} assume !(#t~loopctr974 < #amount); {443792#(not (= |#Ultimate.C_memset_#amount| 4))} is VALID [2018-11-19 18:43:16,512 INFO L273 TraceCheckUtils]: 156: Hoare triple {443792#(not (= |#Ultimate.C_memset_#amount| 4))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {443792#(not (= |#Ultimate.C_memset_#amount| 4))} is VALID [2018-11-19 18:43:16,513 INFO L268 TraceCheckUtils]: 157: Hoare quadruple {443792#(not (= |#Ultimate.C_memset_#amount| 4))} {443786#true} #2975#return; {443787#false} is VALID [2018-11-19 18:43:16,514 INFO L273 TraceCheckUtils]: 158: Hoare triple {443787#false} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {443787#false} is VALID [2018-11-19 18:43:16,514 INFO L273 TraceCheckUtils]: 159: Hoare triple {443787#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,514 INFO L273 TraceCheckUtils]: 160: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,514 INFO L273 TraceCheckUtils]: 161: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,514 INFO L273 TraceCheckUtils]: 162: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,515 INFO L273 TraceCheckUtils]: 163: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,515 INFO L273 TraceCheckUtils]: 164: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,515 INFO L273 TraceCheckUtils]: 165: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,515 INFO L273 TraceCheckUtils]: 166: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,515 INFO L273 TraceCheckUtils]: 167: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,515 INFO L273 TraceCheckUtils]: 168: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,516 INFO L273 TraceCheckUtils]: 169: Hoare triple {443787#false} assume #t~switch909; {443787#false} is VALID [2018-11-19 18:43:16,516 INFO L273 TraceCheckUtils]: 170: Hoare triple {443787#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {443787#false} is VALID [2018-11-19 18:43:16,516 INFO L273 TraceCheckUtils]: 171: Hoare triple {443787#false} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {443787#false} is VALID [2018-11-19 18:43:16,516 INFO L273 TraceCheckUtils]: 172: Hoare triple {443787#false} assume #t~switch947; {443787#false} is VALID [2018-11-19 18:43:16,516 INFO L273 TraceCheckUtils]: 173: Hoare triple {443787#false} assume 1 == ~ldv_state_variable_0~0; {443787#false} is VALID [2018-11-19 18:43:16,516 INFO L256 TraceCheckUtils]: 174: Hoare triple {443787#false} call #t~ret948 := ims_pcu_driver_init(); {443786#true} is VALID [2018-11-19 18:43:16,516 INFO L273 TraceCheckUtils]: 175: Hoare triple {443786#true} havoc ~tmp~46; {443786#true} is VALID [2018-11-19 18:43:16,516 INFO L256 TraceCheckUtils]: 176: Hoare triple {443786#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {443786#true} is VALID [2018-11-19 18:43:16,516 INFO L273 TraceCheckUtils]: 177: Hoare triple {443786#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {443786#true} is VALID [2018-11-19 18:43:16,517 INFO L256 TraceCheckUtils]: 178: Hoare triple {443786#true} call ldv_usb_driver_1(); {443786#true} is VALID [2018-11-19 18:43:16,517 INFO L273 TraceCheckUtils]: 179: Hoare triple {443786#true} havoc ~tmp~53.base, ~tmp~53.offset; {443786#true} is VALID [2018-11-19 18:43:16,517 INFO L256 TraceCheckUtils]: 180: Hoare triple {443786#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {443786#true} is VALID [2018-11-19 18:43:16,517 INFO L273 TraceCheckUtils]: 181: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,517 INFO L273 TraceCheckUtils]: 182: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,517 INFO L273 TraceCheckUtils]: 183: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,517 INFO L268 TraceCheckUtils]: 184: Hoare quadruple {443786#true} {443786#true} #2613#return; {443786#true} is VALID [2018-11-19 18:43:16,517 INFO L273 TraceCheckUtils]: 185: Hoare triple {443786#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {443786#true} is VALID [2018-11-19 18:43:16,517 INFO L273 TraceCheckUtils]: 186: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,518 INFO L268 TraceCheckUtils]: 187: Hoare quadruple {443786#true} {443786#true} #2537#return; {443786#true} is VALID [2018-11-19 18:43:16,518 INFO L273 TraceCheckUtils]: 188: Hoare triple {443786#true} #res := ~ldv_func_res~0; {443786#true} is VALID [2018-11-19 18:43:16,518 INFO L273 TraceCheckUtils]: 189: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,518 INFO L268 TraceCheckUtils]: 190: Hoare quadruple {443786#true} {443786#true} #2777#return; {443786#true} is VALID [2018-11-19 18:43:16,518 INFO L273 TraceCheckUtils]: 191: Hoare triple {443786#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {443786#true} is VALID [2018-11-19 18:43:16,518 INFO L273 TraceCheckUtils]: 192: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,518 INFO L268 TraceCheckUtils]: 193: Hoare quadruple {443786#true} {443787#false} #3035#return; {443787#false} is VALID [2018-11-19 18:43:16,518 INFO L273 TraceCheckUtils]: 194: Hoare triple {443787#false} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {443787#false} is VALID [2018-11-19 18:43:16,519 INFO L273 TraceCheckUtils]: 195: Hoare triple {443787#false} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_10~0 := 1; {443787#false} is VALID [2018-11-19 18:43:16,519 INFO L256 TraceCheckUtils]: 196: Hoare triple {443787#false} call ldv_initialize_ims_pcu_attribute_10(); {443786#true} is VALID [2018-11-19 18:43:16,519 INFO L273 TraceCheckUtils]: 197: Hoare triple {443786#true} havoc ~tmp~47.base, ~tmp~47.offset;havoc ~tmp___0~19.base, ~tmp___0~19.offset; {443786#true} is VALID [2018-11-19 18:43:16,519 INFO L256 TraceCheckUtils]: 198: Hoare triple {443786#true} call #t~ret861.base, #t~ret861.offset := ldv_zalloc(1376); {443786#true} is VALID [2018-11-19 18:43:16,519 INFO L273 TraceCheckUtils]: 199: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,519 INFO L273 TraceCheckUtils]: 200: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,519 INFO L273 TraceCheckUtils]: 201: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,519 INFO L268 TraceCheckUtils]: 202: Hoare quadruple {443786#true} {443786#true} #2807#return; {443786#true} is VALID [2018-11-19 18:43:16,519 INFO L273 TraceCheckUtils]: 203: Hoare triple {443786#true} ~tmp~47.base, ~tmp~47.offset := #t~ret861.base, #t~ret861.offset;havoc #t~ret861.base, #t~ret861.offset;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := ~tmp~47.base, ~tmp~47.offset; {443786#true} is VALID [2018-11-19 18:43:16,520 INFO L256 TraceCheckUtils]: 204: Hoare triple {443786#true} call #t~ret862.base, #t~ret862.offset := ldv_zalloc(48); {443786#true} is VALID [2018-11-19 18:43:16,520 INFO L273 TraceCheckUtils]: 205: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,520 INFO L273 TraceCheckUtils]: 206: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,520 INFO L273 TraceCheckUtils]: 207: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,520 INFO L268 TraceCheckUtils]: 208: Hoare quadruple {443786#true} {443786#true} #2809#return; {443786#true} is VALID [2018-11-19 18:43:16,520 INFO L273 TraceCheckUtils]: 209: Hoare triple {443786#true} ~tmp___0~19.base, ~tmp___0~19.offset := #t~ret862.base, #t~ret862.offset;havoc #t~ret862.base, #t~ret862.offset;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := ~tmp___0~19.base, ~tmp___0~19.offset; {443786#true} is VALID [2018-11-19 18:43:16,520 INFO L273 TraceCheckUtils]: 210: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,520 INFO L268 TraceCheckUtils]: 211: Hoare quadruple {443786#true} {443787#false} #3037#return; {443787#false} is VALID [2018-11-19 18:43:16,520 INFO L273 TraceCheckUtils]: 212: Hoare triple {443787#false} ~ldv_state_variable_4~0 := 1;~ldv_state_variable_8~0 := 1; {443787#false} is VALID [2018-11-19 18:43:16,521 INFO L256 TraceCheckUtils]: 213: Hoare triple {443787#false} call ldv_initialize_ims_pcu_attribute_8(); {443786#true} is VALID [2018-11-19 18:43:16,521 INFO L273 TraceCheckUtils]: 214: Hoare triple {443786#true} havoc ~tmp~51.base, ~tmp~51.offset;havoc ~tmp___0~23.base, ~tmp___0~23.offset; {443786#true} is VALID [2018-11-19 18:43:16,521 INFO L256 TraceCheckUtils]: 215: Hoare triple {443786#true} call #t~ret869.base, #t~ret869.offset := ldv_zalloc(1376); {443786#true} is VALID [2018-11-19 18:43:16,521 INFO L273 TraceCheckUtils]: 216: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,521 INFO L273 TraceCheckUtils]: 217: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,521 INFO L273 TraceCheckUtils]: 218: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,521 INFO L268 TraceCheckUtils]: 219: Hoare quadruple {443786#true} {443786#true} #2631#return; {443786#true} is VALID [2018-11-19 18:43:16,521 INFO L273 TraceCheckUtils]: 220: Hoare triple {443786#true} ~tmp~51.base, ~tmp~51.offset := #t~ret869.base, #t~ret869.offset;havoc #t~ret869.base, #t~ret869.offset;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := ~tmp~51.base, ~tmp~51.offset; {443786#true} is VALID [2018-11-19 18:43:16,521 INFO L256 TraceCheckUtils]: 221: Hoare triple {443786#true} call #t~ret870.base, #t~ret870.offset := ldv_zalloc(48); {443786#true} is VALID [2018-11-19 18:43:16,522 INFO L273 TraceCheckUtils]: 222: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,522 INFO L273 TraceCheckUtils]: 223: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,522 INFO L273 TraceCheckUtils]: 224: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,522 INFO L268 TraceCheckUtils]: 225: Hoare quadruple {443786#true} {443786#true} #2633#return; {443786#true} is VALID [2018-11-19 18:43:16,522 INFO L273 TraceCheckUtils]: 226: Hoare triple {443786#true} ~tmp___0~23.base, ~tmp___0~23.offset := #t~ret870.base, #t~ret870.offset;havoc #t~ret870.base, #t~ret870.offset;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := ~tmp___0~23.base, ~tmp___0~23.offset; {443786#true} is VALID [2018-11-19 18:43:16,522 INFO L273 TraceCheckUtils]: 227: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,522 INFO L268 TraceCheckUtils]: 228: Hoare quadruple {443786#true} {443787#false} #3039#return; {443787#false} is VALID [2018-11-19 18:43:16,522 INFO L273 TraceCheckUtils]: 229: Hoare triple {443787#false} ~ldv_state_variable_2~0 := 1;~ldv_state_variable_9~0 := 1; {443787#false} is VALID [2018-11-19 18:43:16,522 INFO L256 TraceCheckUtils]: 230: Hoare triple {443787#false} call ldv_initialize_ims_pcu_attribute_9(); {443786#true} is VALID [2018-11-19 18:43:16,523 INFO L273 TraceCheckUtils]: 231: Hoare triple {443786#true} havoc ~tmp~49.base, ~tmp~49.offset;havoc ~tmp___0~21.base, ~tmp___0~21.offset; {443786#true} is VALID [2018-11-19 18:43:16,523 INFO L256 TraceCheckUtils]: 232: Hoare triple {443786#true} call #t~ret865.base, #t~ret865.offset := ldv_zalloc(1376); {443786#true} is VALID [2018-11-19 18:43:16,523 INFO L273 TraceCheckUtils]: 233: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,523 INFO L273 TraceCheckUtils]: 234: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,523 INFO L273 TraceCheckUtils]: 235: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,524 INFO L268 TraceCheckUtils]: 236: Hoare quadruple {443786#true} {443786#true} #2627#return; {443786#true} is VALID [2018-11-19 18:43:16,524 INFO L273 TraceCheckUtils]: 237: Hoare triple {443786#true} ~tmp~49.base, ~tmp~49.offset := #t~ret865.base, #t~ret865.offset;havoc #t~ret865.base, #t~ret865.offset;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := ~tmp~49.base, ~tmp~49.offset; {443786#true} is VALID [2018-11-19 18:43:16,524 INFO L256 TraceCheckUtils]: 238: Hoare triple {443786#true} call #t~ret866.base, #t~ret866.offset := ldv_zalloc(48); {443786#true} is VALID [2018-11-19 18:43:16,524 INFO L273 TraceCheckUtils]: 239: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,524 INFO L273 TraceCheckUtils]: 240: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,524 INFO L273 TraceCheckUtils]: 241: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,524 INFO L268 TraceCheckUtils]: 242: Hoare quadruple {443786#true} {443786#true} #2629#return; {443786#true} is VALID [2018-11-19 18:43:16,524 INFO L273 TraceCheckUtils]: 243: Hoare triple {443786#true} ~tmp___0~21.base, ~tmp___0~21.offset := #t~ret866.base, #t~ret866.offset;havoc #t~ret866.base, #t~ret866.offset;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := ~tmp___0~21.base, ~tmp___0~21.offset; {443786#true} is VALID [2018-11-19 18:43:16,525 INFO L273 TraceCheckUtils]: 244: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,525 INFO L268 TraceCheckUtils]: 245: Hoare quadruple {443786#true} {443787#false} #3041#return; {443787#false} is VALID [2018-11-19 18:43:16,525 INFO L273 TraceCheckUtils]: 246: Hoare triple {443787#false} ~ldv_state_variable_7~0 := 1; {443787#false} is VALID [2018-11-19 18:43:16,525 INFO L256 TraceCheckUtils]: 247: Hoare triple {443787#false} call ldv_initialize_ims_pcu_attribute_7(); {443786#true} is VALID [2018-11-19 18:43:16,525 INFO L273 TraceCheckUtils]: 248: Hoare triple {443786#true} havoc ~tmp~52.base, ~tmp~52.offset;havoc ~tmp___0~24.base, ~tmp___0~24.offset; {443786#true} is VALID [2018-11-19 18:43:16,525 INFO L256 TraceCheckUtils]: 249: Hoare triple {443786#true} call #t~ret871.base, #t~ret871.offset := ldv_zalloc(1376); {443786#true} is VALID [2018-11-19 18:43:16,525 INFO L273 TraceCheckUtils]: 250: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,525 INFO L273 TraceCheckUtils]: 251: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,525 INFO L273 TraceCheckUtils]: 252: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,525 INFO L268 TraceCheckUtils]: 253: Hoare quadruple {443786#true} {443786#true} #2619#return; {443786#true} is VALID [2018-11-19 18:43:16,526 INFO L273 TraceCheckUtils]: 254: Hoare triple {443786#true} ~tmp~52.base, ~tmp~52.offset := #t~ret871.base, #t~ret871.offset;havoc #t~ret871.base, #t~ret871.offset;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := ~tmp~52.base, ~tmp~52.offset; {443786#true} is VALID [2018-11-19 18:43:16,526 INFO L256 TraceCheckUtils]: 255: Hoare triple {443786#true} call #t~ret872.base, #t~ret872.offset := ldv_zalloc(48); {443786#true} is VALID [2018-11-19 18:43:16,526 INFO L273 TraceCheckUtils]: 256: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,526 INFO L273 TraceCheckUtils]: 257: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,526 INFO L273 TraceCheckUtils]: 258: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,526 INFO L268 TraceCheckUtils]: 259: Hoare quadruple {443786#true} {443786#true} #2621#return; {443786#true} is VALID [2018-11-19 18:43:16,526 INFO L273 TraceCheckUtils]: 260: Hoare triple {443786#true} ~tmp___0~24.base, ~tmp___0~24.offset := #t~ret872.base, #t~ret872.offset;havoc #t~ret872.base, #t~ret872.offset;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := ~tmp___0~24.base, ~tmp___0~24.offset; {443786#true} is VALID [2018-11-19 18:43:16,526 INFO L273 TraceCheckUtils]: 261: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,526 INFO L268 TraceCheckUtils]: 262: Hoare quadruple {443786#true} {443787#false} #3043#return; {443787#false} is VALID [2018-11-19 18:43:16,526 INFO L273 TraceCheckUtils]: 263: Hoare triple {443787#false} ~ldv_state_variable_3~0 := 1;~ldv_state_variable_11~0 := 1; {443787#false} is VALID [2018-11-19 18:43:16,527 INFO L256 TraceCheckUtils]: 264: Hoare triple {443787#false} call ldv_initialize_ims_pcu_attribute_11(); {443786#true} is VALID [2018-11-19 18:43:16,527 INFO L273 TraceCheckUtils]: 265: Hoare triple {443786#true} havoc ~tmp~50.base, ~tmp~50.offset;havoc ~tmp___0~22.base, ~tmp___0~22.offset; {443786#true} is VALID [2018-11-19 18:43:16,527 INFO L256 TraceCheckUtils]: 266: Hoare triple {443786#true} call #t~ret867.base, #t~ret867.offset := ldv_zalloc(1376); {443786#true} is VALID [2018-11-19 18:43:16,527 INFO L273 TraceCheckUtils]: 267: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,527 INFO L273 TraceCheckUtils]: 268: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,527 INFO L273 TraceCheckUtils]: 269: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,527 INFO L268 TraceCheckUtils]: 270: Hoare quadruple {443786#true} {443786#true} #2811#return; {443786#true} is VALID [2018-11-19 18:43:16,527 INFO L273 TraceCheckUtils]: 271: Hoare triple {443786#true} ~tmp~50.base, ~tmp~50.offset := #t~ret867.base, #t~ret867.offset;havoc #t~ret867.base, #t~ret867.offset;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := ~tmp~50.base, ~tmp~50.offset; {443786#true} is VALID [2018-11-19 18:43:16,527 INFO L256 TraceCheckUtils]: 272: Hoare triple {443786#true} call #t~ret868.base, #t~ret868.offset := ldv_zalloc(48); {443786#true} is VALID [2018-11-19 18:43:16,528 INFO L273 TraceCheckUtils]: 273: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,528 INFO L273 TraceCheckUtils]: 274: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,528 INFO L273 TraceCheckUtils]: 275: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,528 INFO L268 TraceCheckUtils]: 276: Hoare quadruple {443786#true} {443786#true} #2813#return; {443786#true} is VALID [2018-11-19 18:43:16,528 INFO L273 TraceCheckUtils]: 277: Hoare triple {443786#true} ~tmp___0~22.base, ~tmp___0~22.offset := #t~ret868.base, #t~ret868.offset;havoc #t~ret868.base, #t~ret868.offset;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := ~tmp___0~22.base, ~tmp___0~22.offset; {443786#true} is VALID [2018-11-19 18:43:16,528 INFO L273 TraceCheckUtils]: 278: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,528 INFO L268 TraceCheckUtils]: 279: Hoare quadruple {443786#true} {443787#false} #3045#return; {443787#false} is VALID [2018-11-19 18:43:16,528 INFO L273 TraceCheckUtils]: 280: Hoare triple {443787#false} ~ldv_state_variable_6~0 := 1; {443787#false} is VALID [2018-11-19 18:43:16,528 INFO L256 TraceCheckUtils]: 281: Hoare triple {443787#false} call ldv_initialize_ims_pcu_attribute_6(); {443786#true} is VALID [2018-11-19 18:43:16,528 INFO L273 TraceCheckUtils]: 282: Hoare triple {443786#true} havoc ~tmp~48.base, ~tmp~48.offset;havoc ~tmp___0~20.base, ~tmp___0~20.offset; {443786#true} is VALID [2018-11-19 18:43:16,529 INFO L256 TraceCheckUtils]: 283: Hoare triple {443786#true} call #t~ret863.base, #t~ret863.offset := ldv_zalloc(1376); {443786#true} is VALID [2018-11-19 18:43:16,529 INFO L273 TraceCheckUtils]: 284: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,529 INFO L273 TraceCheckUtils]: 285: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,529 INFO L273 TraceCheckUtils]: 286: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,529 INFO L268 TraceCheckUtils]: 287: Hoare quadruple {443786#true} {443786#true} #2623#return; {443786#true} is VALID [2018-11-19 18:43:16,529 INFO L273 TraceCheckUtils]: 288: Hoare triple {443786#true} ~tmp~48.base, ~tmp~48.offset := #t~ret863.base, #t~ret863.offset;havoc #t~ret863.base, #t~ret863.offset;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := ~tmp~48.base, ~tmp~48.offset; {443786#true} is VALID [2018-11-19 18:43:16,529 INFO L256 TraceCheckUtils]: 289: Hoare triple {443786#true} call #t~ret864.base, #t~ret864.offset := ldv_zalloc(48); {443786#true} is VALID [2018-11-19 18:43:16,529 INFO L273 TraceCheckUtils]: 290: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:16,529 INFO L273 TraceCheckUtils]: 291: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:16,530 INFO L273 TraceCheckUtils]: 292: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,530 INFO L268 TraceCheckUtils]: 293: Hoare quadruple {443786#true} {443786#true} #2625#return; {443786#true} is VALID [2018-11-19 18:43:16,530 INFO L273 TraceCheckUtils]: 294: Hoare triple {443786#true} ~tmp___0~20.base, ~tmp___0~20.offset := #t~ret864.base, #t~ret864.offset;havoc #t~ret864.base, #t~ret864.offset;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := ~tmp___0~20.base, ~tmp___0~20.offset; {443786#true} is VALID [2018-11-19 18:43:16,530 INFO L273 TraceCheckUtils]: 295: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,530 INFO L268 TraceCheckUtils]: 296: Hoare quadruple {443786#true} {443787#false} #3047#return; {443787#false} is VALID [2018-11-19 18:43:16,530 INFO L273 TraceCheckUtils]: 297: Hoare triple {443787#false} assume !(0 != ~ldv_retval_4~0); {443787#false} is VALID [2018-11-19 18:43:16,530 INFO L273 TraceCheckUtils]: 298: Hoare triple {443787#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,530 INFO L273 TraceCheckUtils]: 299: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,530 INFO L273 TraceCheckUtils]: 300: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,531 INFO L273 TraceCheckUtils]: 301: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,531 INFO L273 TraceCheckUtils]: 302: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,531 INFO L273 TraceCheckUtils]: 303: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,531 INFO L273 TraceCheckUtils]: 304: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,531 INFO L273 TraceCheckUtils]: 305: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,531 INFO L273 TraceCheckUtils]: 306: Hoare triple {443787#false} assume #t~switch909; {443787#false} is VALID [2018-11-19 18:43:16,531 INFO L273 TraceCheckUtils]: 307: Hoare triple {443787#false} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {443787#false} is VALID [2018-11-19 18:43:16,531 INFO L273 TraceCheckUtils]: 308: Hoare triple {443787#false} assume #t~switch937; {443787#false} is VALID [2018-11-19 18:43:16,531 INFO L273 TraceCheckUtils]: 309: Hoare triple {443787#false} assume 1 == ~ldv_state_variable_1~0; {443787#false} is VALID [2018-11-19 18:43:16,532 INFO L256 TraceCheckUtils]: 310: Hoare triple {443787#false} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {443786#true} is VALID [2018-11-19 18:43:16,532 INFO L273 TraceCheckUtils]: 311: Hoare triple {443786#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {443786#true} is VALID [2018-11-19 18:43:16,532 INFO L256 TraceCheckUtils]: 312: Hoare triple {443786#true} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {443786#true} is VALID [2018-11-19 18:43:16,532 INFO L273 TraceCheckUtils]: 313: Hoare triple {443786#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {443786#true} is VALID [2018-11-19 18:43:16,532 INFO L256 TraceCheckUtils]: 314: Hoare triple {443786#true} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {443786#true} is VALID [2018-11-19 18:43:16,532 INFO L273 TraceCheckUtils]: 315: Hoare triple {443786#true} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {443786#true} is VALID [2018-11-19 18:43:16,532 INFO L256 TraceCheckUtils]: 316: Hoare triple {443786#true} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {443786#true} is VALID [2018-11-19 18:43:16,532 INFO L273 TraceCheckUtils]: 317: Hoare triple {443786#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {443786#true} is VALID [2018-11-19 18:43:16,532 INFO L273 TraceCheckUtils]: 318: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,533 INFO L268 TraceCheckUtils]: 319: Hoare quadruple {443786#true} {443786#true} #2817#return; {443786#true} is VALID [2018-11-19 18:43:16,533 INFO L273 TraceCheckUtils]: 320: Hoare triple {443786#true} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {443786#true} is VALID [2018-11-19 18:43:16,533 INFO L273 TraceCheckUtils]: 321: Hoare triple {443786#true} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {443786#true} is VALID [2018-11-19 18:43:16,533 INFO L273 TraceCheckUtils]: 322: Hoare triple {443786#true} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {443786#true} is VALID [2018-11-19 18:43:16,533 INFO L273 TraceCheckUtils]: 323: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,533 INFO L268 TraceCheckUtils]: 324: Hoare quadruple {443786#true} {443786#true} #3151#return; {443786#true} is VALID [2018-11-19 18:43:16,533 INFO L273 TraceCheckUtils]: 325: Hoare triple {443786#true} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {443786#true} is VALID [2018-11-19 18:43:16,533 INFO L273 TraceCheckUtils]: 326: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,533 INFO L268 TraceCheckUtils]: 327: Hoare quadruple {443786#true} {443786#true} #3095#return; {443786#true} is VALID [2018-11-19 18:43:16,534 INFO L273 TraceCheckUtils]: 328: Hoare triple {443786#true} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {443786#true} is VALID [2018-11-19 18:43:16,534 INFO L256 TraceCheckUtils]: 329: Hoare triple {443786#true} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {443786#true} is VALID [2018-11-19 18:43:16,534 INFO L273 TraceCheckUtils]: 330: Hoare triple {443786#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {443786#true} is VALID [2018-11-19 18:43:16,534 INFO L256 TraceCheckUtils]: 331: Hoare triple {443786#true} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {443786#true} is VALID [2018-11-19 18:43:16,534 INFO L273 TraceCheckUtils]: 332: Hoare triple {443786#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {443786#true} is VALID [2018-11-19 18:43:16,534 INFO L256 TraceCheckUtils]: 333: Hoare triple {443786#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {443786#true} is VALID [2018-11-19 18:43:16,534 INFO L273 TraceCheckUtils]: 334: Hoare triple {443786#true} ~size := #in~size;~t := #in~t; {443786#true} is VALID [2018-11-19 18:43:16,534 INFO L256 TraceCheckUtils]: 335: Hoare triple {443786#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {443786#true} is VALID [2018-11-19 18:43:16,534 INFO L273 TraceCheckUtils]: 336: Hoare triple {443786#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {443786#true} is VALID [2018-11-19 18:43:16,535 INFO L273 TraceCheckUtils]: 337: Hoare triple {443786#true} assume !(0 != ~tmp___0~2);call #t~malloc130.base, #t~malloc130.offset := #Ultimate.alloc(~size);~tmp~8.base, ~tmp~8.offset := #t~malloc130.base, #t~malloc130.offset;~p~0.base, ~p~0.offset := ~tmp~8.base, ~tmp~8.offset;assume 0 != (if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~0.base, ~p~0.offset; {443786#true} is VALID [2018-11-19 18:43:16,535 INFO L273 TraceCheckUtils]: 338: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,535 INFO L268 TraceCheckUtils]: 339: Hoare quadruple {443786#true} {443786#true} #2691#return; {443786#true} is VALID [2018-11-19 18:43:16,535 INFO L273 TraceCheckUtils]: 340: Hoare triple {443786#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {443786#true} is VALID [2018-11-19 18:43:16,535 INFO L273 TraceCheckUtils]: 341: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,535 INFO L268 TraceCheckUtils]: 342: Hoare quadruple {443786#true} {443786#true} #2781#return; {443786#true} is VALID [2018-11-19 18:43:16,535 INFO L273 TraceCheckUtils]: 343: Hoare triple {443786#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {443786#true} is VALID [2018-11-19 18:43:16,535 INFO L273 TraceCheckUtils]: 344: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,535 INFO L268 TraceCheckUtils]: 345: Hoare quadruple {443786#true} {443786#true} #2779#return; {443786#true} is VALID [2018-11-19 18:43:16,536 INFO L273 TraceCheckUtils]: 346: Hoare triple {443786#true} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {443786#true} is VALID [2018-11-19 18:43:16,536 INFO L273 TraceCheckUtils]: 347: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,536 INFO L268 TraceCheckUtils]: 348: Hoare quadruple {443786#true} {443786#true} #3097#return; {443786#true} is VALID [2018-11-19 18:43:16,536 INFO L273 TraceCheckUtils]: 349: Hoare triple {443786#true} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {443786#true} is VALID [2018-11-19 18:43:16,536 INFO L273 TraceCheckUtils]: 350: Hoare triple {443786#true} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {443786#true} is VALID [2018-11-19 18:43:16,536 INFO L256 TraceCheckUtils]: 351: Hoare triple {443786#true} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {443786#true} is VALID [2018-11-19 18:43:16,536 INFO L273 TraceCheckUtils]: 352: Hoare triple {443786#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {443786#true} is VALID [2018-11-19 18:43:16,536 INFO L273 TraceCheckUtils]: 353: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,536 INFO L268 TraceCheckUtils]: 354: Hoare quadruple {443786#true} {443786#true} #3099#return; {443786#true} is VALID [2018-11-19 18:43:16,537 INFO L256 TraceCheckUtils]: 355: Hoare triple {443786#true} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {443786#true} is VALID [2018-11-19 18:43:16,537 INFO L273 TraceCheckUtils]: 356: Hoare triple {443786#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {443786#true} is VALID [2018-11-19 18:43:16,537 INFO L273 TraceCheckUtils]: 357: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,537 INFO L268 TraceCheckUtils]: 358: Hoare quadruple {443786#true} {443786#true} #3101#return; {443786#true} is VALID [2018-11-19 18:43:16,537 INFO L256 TraceCheckUtils]: 359: Hoare triple {443786#true} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {443786#true} is VALID [2018-11-19 18:43:16,537 INFO L273 TraceCheckUtils]: 360: Hoare triple {443786#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {443786#true} is VALID [2018-11-19 18:43:16,537 INFO L256 TraceCheckUtils]: 361: Hoare triple {443786#true} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {443786#true} is VALID [2018-11-19 18:43:16,537 INFO L273 TraceCheckUtils]: 362: Hoare triple {443786#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {443786#true} is VALID [2018-11-19 18:43:16,537 INFO L273 TraceCheckUtils]: 363: Hoare triple {443786#true} assume !(0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616); {443786#true} is VALID [2018-11-19 18:43:16,537 INFO L273 TraceCheckUtils]: 364: Hoare triple {443786#true} assume !(0 == ~buflen~0 % 4294967296 % 18446744073709551616); {443786#true} is VALID [2018-11-19 18:43:16,538 INFO L273 TraceCheckUtils]: 365: Hoare triple {443786#true} assume 0 != ~buflen~0 % 4294967296 % 18446744073709551616; {443786#true} is VALID [2018-11-19 18:43:16,538 INFO L273 TraceCheckUtils]: 366: Hoare triple {443786#true} ~union_desc~0.base, ~union_desc~0.offset := ~buf~0.base, ~buf~0.offset;call #t~mem642 := read~int(~union_desc~0.base, 1 + ~union_desc~0.offset, 1);#t~short644 := 36 == #t~mem642 % 256 % 4294967296; {443786#true} is VALID [2018-11-19 18:43:16,538 INFO L273 TraceCheckUtils]: 367: Hoare triple {443786#true} assume #t~short644;call #t~mem643 := read~int(~union_desc~0.base, 2 + ~union_desc~0.offset, 1);#t~short644 := 6 == #t~mem643 % 256 % 4294967296; {443786#true} is VALID [2018-11-19 18:43:16,538 INFO L273 TraceCheckUtils]: 368: Hoare triple {443786#true} assume #t~short644;havoc #t~mem643;havoc #t~mem642;havoc #t~short644;call write~$Pointer$(#t~string645.base, #t~string645.offset, ~#descriptor~3.base, ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string646.base, #t~string646.offset, ~#descriptor~3.base, 8 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string647.base, #t~string647.offset, ~#descriptor~3.base, 16 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string648.base, #t~string648.offset, ~#descriptor~3.base, 24 + ~#descriptor~3.offset, 8);call write~int(1479, ~#descriptor~3.base, 32 + ~#descriptor~3.offset, 4);call write~int(0, ~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1);call #t~mem649 := read~int(~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1); {443786#true} is VALID [2018-11-19 18:43:16,538 INFO L256 TraceCheckUtils]: 369: Hoare triple {443786#true} call #t~ret650 := ldv__builtin_expect(~bitwiseAnd(#t~mem649 % 256, 1), 0); {443786#true} is VALID [2018-11-19 18:43:16,538 INFO L273 TraceCheckUtils]: 370: Hoare triple {443786#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {443786#true} is VALID [2018-11-19 18:43:16,538 INFO L273 TraceCheckUtils]: 371: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,538 INFO L268 TraceCheckUtils]: 372: Hoare quadruple {443786#true} {443786#true} #3075#return; {443786#true} is VALID [2018-11-19 18:43:16,538 INFO L273 TraceCheckUtils]: 373: Hoare triple {443786#true} assume -9223372036854775808 <= #t~ret650 && #t~ret650 <= 9223372036854775807;~tmp~36 := #t~ret650;havoc #t~ret650;havoc #t~mem649; {443786#true} is VALID [2018-11-19 18:43:16,539 INFO L273 TraceCheckUtils]: 374: Hoare triple {443786#true} assume !(0 != ~tmp~36); {443786#true} is VALID [2018-11-19 18:43:16,539 INFO L273 TraceCheckUtils]: 375: Hoare triple {443786#true} #res.base, #res.offset := ~union_desc~0.base, ~union_desc~0.offset;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {443786#true} is VALID [2018-11-19 18:43:16,539 INFO L273 TraceCheckUtils]: 376: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,539 INFO L268 TraceCheckUtils]: 377: Hoare quadruple {443786#true} {443786#true} #3137#return; {443786#true} is VALID [2018-11-19 18:43:16,539 INFO L273 TraceCheckUtils]: 378: Hoare triple {443786#true} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {443786#true} is VALID [2018-11-19 18:43:16,539 INFO L273 TraceCheckUtils]: 379: Hoare triple {443786#true} assume !(0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616);call #t~mem658.base, #t~mem658.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem659 := read~int(~union_desc~1.base, 3 + ~union_desc~1.offset, 1);call #t~ret660.base, #t~ret660.offset := usb_ifnum_to_if(#t~mem658.base, #t~mem658.offset, #t~mem659 % 256);call write~$Pointer$(#t~ret660.base, #t~ret660.offset, ~pcu.base, 79 + ~pcu.offset, 8);havoc #t~mem659;havoc #t~ret660.base, #t~ret660.offset;havoc #t~mem658.base, #t~mem658.offset;call #t~mem661.base, #t~mem661.offset := read~$Pointer$(~pcu.base, 79 + ~pcu.offset, 8);call #t~mem662.base, #t~mem662.offset := read~$Pointer$(#t~mem661.base, 8 + #t~mem661.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem662.base, #t~mem662.offset;havoc #t~mem662.base, #t~mem662.offset;havoc #t~mem661.base, #t~mem661.offset;call #t~mem663.base, #t~mem663.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem663.base, #t~mem663.offset, ~pcu.base, 87 + ~pcu.offset, 8);havoc #t~mem663.base, #t~mem663.offset;call #t~mem664.base, #t~mem664.offset := read~$Pointer$(~pcu.base, 87 + ~pcu.offset, 8); {443786#true} is VALID [2018-11-19 18:43:16,539 INFO L256 TraceCheckUtils]: 380: Hoare triple {443786#true} call #t~ret665 := usb_endpoint_maxp(#t~mem664.base, #t~mem664.offset); {443786#true} is VALID [2018-11-19 18:43:16,539 INFO L273 TraceCheckUtils]: 381: Hoare triple {443786#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {443786#true} is VALID [2018-11-19 18:43:16,539 INFO L273 TraceCheckUtils]: 382: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,540 INFO L268 TraceCheckUtils]: 383: Hoare quadruple {443786#true} {443786#true} #3139#return; {443786#true} is VALID [2018-11-19 18:43:16,540 INFO L273 TraceCheckUtils]: 384: Hoare triple {443786#true} assume -2147483648 <= #t~ret665 && #t~ret665 <= 2147483647;~tmp~37 := #t~ret665;havoc #t~ret665;havoc #t~mem664.base, #t~mem664.offset;call write~int(~tmp~37, ~pcu.base, 119 + ~pcu.offset, 4);call #t~mem666.base, #t~mem666.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem667 := read~int(~union_desc~1.base, 4 + ~union_desc~1.offset, 1);call #t~ret668.base, #t~ret668.offset := usb_ifnum_to_if(#t~mem666.base, #t~mem666.offset, #t~mem667 % 256);call write~$Pointer$(#t~ret668.base, #t~ret668.offset, ~pcu.base, 123 + ~pcu.offset, 8);havoc #t~mem666.base, #t~mem666.offset;havoc #t~mem667;havoc #t~ret668.base, #t~ret668.offset;call #t~mem669.base, #t~mem669.offset := read~$Pointer$(~pcu.base, 123 + ~pcu.offset, 8);call #t~mem670.base, #t~mem670.offset := read~$Pointer$(#t~mem669.base, 8 + #t~mem669.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem670.base, #t~mem670.offset;havoc #t~mem670.base, #t~mem670.offset;havoc #t~mem669.base, #t~mem669.offset;call #t~mem671 := read~int(~alt~0.base, 4 + ~alt~0.offset, 1); {443786#true} is VALID [2018-11-19 18:43:16,540 INFO L273 TraceCheckUtils]: 385: Hoare triple {443786#true} assume !(2 != #t~mem671 % 256 % 4294967296);havoc #t~mem671;call #t~mem676.base, #t~mem676.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem676.base, #t~mem676.offset, ~pcu.base, 167 + ~pcu.offset, 8);havoc #t~mem676.base, #t~mem676.offset;call #t~mem677.base, #t~mem677.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {443786#true} is VALID [2018-11-19 18:43:16,540 INFO L256 TraceCheckUtils]: 386: Hoare triple {443786#true} call #t~ret678 := usb_endpoint_is_bulk_out(#t~mem677.base, #t~mem677.offset); {443786#true} is VALID [2018-11-19 18:43:16,540 INFO L273 TraceCheckUtils]: 387: Hoare triple {443786#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~4;havoc ~tmp___0~1;havoc ~tmp___1~1; {443786#true} is VALID [2018-11-19 18:43:16,540 INFO L256 TraceCheckUtils]: 388: Hoare triple {443786#true} call #t~ret25 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {443786#true} is VALID [2018-11-19 18:43:16,540 INFO L273 TraceCheckUtils]: 389: Hoare triple {443786#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {443786#true} is VALID [2018-11-19 18:43:16,540 INFO L273 TraceCheckUtils]: 390: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,540 INFO L268 TraceCheckUtils]: 391: Hoare quadruple {443786#true} {443786#true} #2887#return; {443786#true} is VALID [2018-11-19 18:43:16,541 INFO L273 TraceCheckUtils]: 392: Hoare triple {443786#true} assume -2147483648 <= #t~ret25 && #t~ret25 <= 2147483647;~tmp~4 := #t~ret25;havoc #t~ret25; {443786#true} is VALID [2018-11-19 18:43:16,541 INFO L273 TraceCheckUtils]: 393: Hoare triple {443786#true} assume 0 != ~tmp~4; {443786#true} is VALID [2018-11-19 18:43:16,541 INFO L256 TraceCheckUtils]: 394: Hoare triple {443786#true} call #t~ret26 := usb_endpoint_dir_out(~epd.base, ~epd.offset); {443786#true} is VALID [2018-11-19 18:43:16,541 INFO L273 TraceCheckUtils]: 395: Hoare triple {443786#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem21 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem21 % 256 % 256 <= 127 then #t~mem21 % 256 % 256 else #t~mem21 % 256 % 256 - 256) >= 0 then 1 else 0);havoc #t~mem21; {443786#true} is VALID [2018-11-19 18:43:16,541 INFO L273 TraceCheckUtils]: 396: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,541 INFO L268 TraceCheckUtils]: 397: Hoare quadruple {443786#true} {443786#true} #2889#return; {443786#true} is VALID [2018-11-19 18:43:16,541 INFO L273 TraceCheckUtils]: 398: Hoare triple {443786#true} assume -2147483648 <= #t~ret26 && #t~ret26 <= 2147483647;~tmp___0~1 := #t~ret26;havoc #t~ret26; {443786#true} is VALID [2018-11-19 18:43:16,541 INFO L273 TraceCheckUtils]: 399: Hoare triple {443786#true} assume 0 != ~tmp___0~1;~tmp___1~1 := 1; {443786#true} is VALID [2018-11-19 18:43:16,541 INFO L273 TraceCheckUtils]: 400: Hoare triple {443786#true} #res := ~tmp___1~1; {443786#true} is VALID [2018-11-19 18:43:16,542 INFO L273 TraceCheckUtils]: 401: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,542 INFO L268 TraceCheckUtils]: 402: Hoare quadruple {443786#true} {443786#true} #3141#return; {443786#true} is VALID [2018-11-19 18:43:16,542 INFO L273 TraceCheckUtils]: 403: Hoare triple {443786#true} assume -2147483648 <= #t~ret678 && #t~ret678 <= 2147483647;~tmp___0~16 := #t~ret678;havoc #t~mem677.base, #t~mem677.offset;havoc #t~ret678; {443786#true} is VALID [2018-11-19 18:43:16,542 INFO L273 TraceCheckUtils]: 404: Hoare triple {443786#true} assume !(0 == ~tmp___0~16);call #t~mem682.base, #t~mem682.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {443786#true} is VALID [2018-11-19 18:43:16,542 INFO L256 TraceCheckUtils]: 405: Hoare triple {443786#true} call #t~ret683 := usb_endpoint_maxp(#t~mem682.base, #t~mem682.offset); {443786#true} is VALID [2018-11-19 18:43:16,542 INFO L273 TraceCheckUtils]: 406: Hoare triple {443786#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {443786#true} is VALID [2018-11-19 18:43:16,542 INFO L273 TraceCheckUtils]: 407: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,542 INFO L268 TraceCheckUtils]: 408: Hoare quadruple {443786#true} {443786#true} #3143#return; {443786#true} is VALID [2018-11-19 18:43:16,542 INFO L273 TraceCheckUtils]: 409: Hoare triple {443786#true} assume -2147483648 <= #t~ret683 && #t~ret683 <= 2147483647;~tmp___1~7 := #t~ret683;havoc #t~mem682.base, #t~mem682.offset;havoc #t~ret683;call write~int(~tmp___1~7, ~pcu.base, 183 + ~pcu.offset, 4);call #t~mem684 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {443786#true} is VALID [2018-11-19 18:43:16,543 INFO L273 TraceCheckUtils]: 410: Hoare triple {443786#true} assume !(#t~mem684 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem684;call #t~mem689.base, #t~mem689.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem689.base, 63 + #t~mem689.offset, ~pcu.base, 131 + ~pcu.offset, 8);havoc #t~mem689.base, #t~mem689.offset;call #t~mem690.base, #t~mem690.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {443786#true} is VALID [2018-11-19 18:43:16,543 INFO L256 TraceCheckUtils]: 411: Hoare triple {443786#true} call #t~ret691 := usb_endpoint_is_bulk_in(#t~mem690.base, #t~mem690.offset); {443786#true} is VALID [2018-11-19 18:43:16,543 INFO L273 TraceCheckUtils]: 412: Hoare triple {443786#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~3;havoc ~tmp___0~0;havoc ~tmp___1~0; {443786#true} is VALID [2018-11-19 18:43:16,543 INFO L256 TraceCheckUtils]: 413: Hoare triple {443786#true} call #t~ret23 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {443786#true} is VALID [2018-11-19 18:43:16,543 INFO L273 TraceCheckUtils]: 414: Hoare triple {443786#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {443786#true} is VALID [2018-11-19 18:43:16,543 INFO L273 TraceCheckUtils]: 415: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,543 INFO L268 TraceCheckUtils]: 416: Hoare quadruple {443786#true} {443786#true} #2915#return; {443786#true} is VALID [2018-11-19 18:43:16,543 INFO L273 TraceCheckUtils]: 417: Hoare triple {443786#true} assume -2147483648 <= #t~ret23 && #t~ret23 <= 2147483647;~tmp~3 := #t~ret23;havoc #t~ret23; {443786#true} is VALID [2018-11-19 18:43:16,543 INFO L273 TraceCheckUtils]: 418: Hoare triple {443786#true} assume 0 != ~tmp~3; {443786#true} is VALID [2018-11-19 18:43:16,544 INFO L256 TraceCheckUtils]: 419: Hoare triple {443786#true} call #t~ret24 := usb_endpoint_dir_in(~epd.base, ~epd.offset); {443786#true} is VALID [2018-11-19 18:43:16,544 INFO L273 TraceCheckUtils]: 420: Hoare triple {443786#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem20 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem20 % 256 % 256 <= 127 then #t~mem20 % 256 % 256 else #t~mem20 % 256 % 256 - 256) < 0 then 1 else 0);havoc #t~mem20; {443786#true} is VALID [2018-11-19 18:43:16,544 INFO L273 TraceCheckUtils]: 421: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,544 INFO L268 TraceCheckUtils]: 422: Hoare quadruple {443786#true} {443786#true} #2917#return; {443786#true} is VALID [2018-11-19 18:43:16,544 INFO L273 TraceCheckUtils]: 423: Hoare triple {443786#true} assume -2147483648 <= #t~ret24 && #t~ret24 <= 2147483647;~tmp___0~0 := #t~ret24;havoc #t~ret24; {443786#true} is VALID [2018-11-19 18:43:16,544 INFO L273 TraceCheckUtils]: 424: Hoare triple {443786#true} assume 0 != ~tmp___0~0;~tmp___1~0 := 1; {443786#true} is VALID [2018-11-19 18:43:16,544 INFO L273 TraceCheckUtils]: 425: Hoare triple {443786#true} #res := ~tmp___1~0; {443786#true} is VALID [2018-11-19 18:43:16,544 INFO L273 TraceCheckUtils]: 426: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,544 INFO L268 TraceCheckUtils]: 427: Hoare quadruple {443786#true} {443786#true} #3145#return; {443786#true} is VALID [2018-11-19 18:43:16,545 INFO L273 TraceCheckUtils]: 428: Hoare triple {443786#true} assume -2147483648 <= #t~ret691 && #t~ret691 <= 2147483647;~tmp___2~3 := #t~ret691;havoc #t~ret691;havoc #t~mem690.base, #t~mem690.offset; {443786#true} is VALID [2018-11-19 18:43:16,545 INFO L273 TraceCheckUtils]: 429: Hoare triple {443786#true} assume !(0 == ~tmp___2~3);call #t~mem695.base, #t~mem695.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {443786#true} is VALID [2018-11-19 18:43:16,545 INFO L256 TraceCheckUtils]: 430: Hoare triple {443786#true} call #t~ret696 := usb_endpoint_maxp(#t~mem695.base, #t~mem695.offset); {443786#true} is VALID [2018-11-19 18:43:16,545 INFO L273 TraceCheckUtils]: 431: Hoare triple {443786#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {443786#true} is VALID [2018-11-19 18:43:16,545 INFO L273 TraceCheckUtils]: 432: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,545 INFO L268 TraceCheckUtils]: 433: Hoare quadruple {443786#true} {443786#true} #3147#return; {443786#true} is VALID [2018-11-19 18:43:16,545 INFO L273 TraceCheckUtils]: 434: Hoare triple {443786#true} assume -2147483648 <= #t~ret696 && #t~ret696 <= 2147483647;~tmp___3~2 := #t~ret696;havoc #t~ret696;havoc #t~mem695.base, #t~mem695.offset;call write~int(~tmp___3~2, ~pcu.base, 163 + ~pcu.offset, 4);call #t~mem697 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {443786#true} is VALID [2018-11-19 18:43:16,545 INFO L273 TraceCheckUtils]: 435: Hoare triple {443786#true} assume !(#t~mem697 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem697;#res := 0; {443786#true} is VALID [2018-11-19 18:43:16,545 INFO L273 TraceCheckUtils]: 436: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,546 INFO L268 TraceCheckUtils]: 437: Hoare quadruple {443786#true} {443786#true} #3103#return; {443786#true} is VALID [2018-11-19 18:43:16,546 INFO L273 TraceCheckUtils]: 438: Hoare triple {443786#true} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {443786#true} is VALID [2018-11-19 18:43:16,546 INFO L273 TraceCheckUtils]: 439: Hoare triple {443786#true} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {443786#true} is VALID [2018-11-19 18:43:16,546 INFO L273 TraceCheckUtils]: 440: Hoare triple {443786#true} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {443786#true} is VALID [2018-11-19 18:43:16,546 INFO L256 TraceCheckUtils]: 441: Hoare triple {443786#true} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {443786#true} is VALID [2018-11-19 18:43:16,546 INFO L273 TraceCheckUtils]: 442: Hoare triple {443786#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {443786#true} is VALID [2018-11-19 18:43:16,546 INFO L256 TraceCheckUtils]: 443: Hoare triple {443786#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {443786#true} is VALID [2018-11-19 18:43:16,546 INFO L273 TraceCheckUtils]: 444: Hoare triple {443786#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {443786#true} is VALID [2018-11-19 18:43:16,546 INFO L273 TraceCheckUtils]: 445: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,547 INFO L268 TraceCheckUtils]: 446: Hoare quadruple {443786#true} {443786#true} #2541#return; {443786#true} is VALID [2018-11-19 18:43:16,547 INFO L273 TraceCheckUtils]: 447: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,547 INFO L268 TraceCheckUtils]: 448: Hoare quadruple {443786#true} {443786#true} #3105#return; {443786#true} is VALID [2018-11-19 18:43:16,547 INFO L273 TraceCheckUtils]: 449: Hoare triple {443786#true} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {443786#true} is VALID [2018-11-19 18:43:16,547 INFO L256 TraceCheckUtils]: 450: Hoare triple {443786#true} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {443786#true} is VALID [2018-11-19 18:43:16,547 INFO L273 TraceCheckUtils]: 451: Hoare triple {443786#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {443786#true} is VALID [2018-11-19 18:43:16,547 INFO L256 TraceCheckUtils]: 452: Hoare triple {443786#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {443786#true} is VALID [2018-11-19 18:43:16,547 INFO L273 TraceCheckUtils]: 453: Hoare triple {443786#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {443786#true} is VALID [2018-11-19 18:43:16,547 INFO L273 TraceCheckUtils]: 454: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,548 INFO L268 TraceCheckUtils]: 455: Hoare quadruple {443786#true} {443786#true} #2541#return; {443786#true} is VALID [2018-11-19 18:43:16,548 INFO L273 TraceCheckUtils]: 456: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,548 INFO L268 TraceCheckUtils]: 457: Hoare quadruple {443786#true} {443786#true} #3107#return; {443786#true} is VALID [2018-11-19 18:43:16,548 INFO L273 TraceCheckUtils]: 458: Hoare triple {443786#true} havoc #t~mem837.base, #t~mem837.offset; {443786#true} is VALID [2018-11-19 18:43:16,548 INFO L256 TraceCheckUtils]: 459: Hoare triple {443786#true} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {443786#true} is VALID [2018-11-19 18:43:16,548 INFO L273 TraceCheckUtils]: 460: Hoare triple {443786#true} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {443786#true} is VALID [2018-11-19 18:43:16,548 INFO L273 TraceCheckUtils]: 461: Hoare triple {443786#true} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {443786#true} is VALID [2018-11-19 18:43:16,548 INFO L256 TraceCheckUtils]: 462: Hoare triple {443786#true} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {443786#true} is VALID [2018-11-19 18:43:16,548 INFO L273 TraceCheckUtils]: 463: Hoare triple {443786#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {443786#true} is VALID [2018-11-19 18:43:16,549 INFO L256 TraceCheckUtils]: 464: Hoare triple {443786#true} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {443786#true} is VALID [2018-11-19 18:43:16,549 INFO L273 TraceCheckUtils]: 465: Hoare triple {443786#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {443786#true} is VALID [2018-11-19 18:43:16,549 INFO L256 TraceCheckUtils]: 466: Hoare triple {443786#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {443786#true} is VALID [2018-11-19 18:43:16,549 INFO L273 TraceCheckUtils]: 467: Hoare triple {443786#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {443786#true} is VALID [2018-11-19 18:43:16,549 INFO L273 TraceCheckUtils]: 468: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,549 INFO L268 TraceCheckUtils]: 469: Hoare quadruple {443786#true} {443786#true} #2605#return; {443786#true} is VALID [2018-11-19 18:43:16,549 INFO L273 TraceCheckUtils]: 470: Hoare triple {443786#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {443786#true} is VALID [2018-11-19 18:43:16,549 INFO L256 TraceCheckUtils]: 471: Hoare triple {443786#true} call #t~ret965 := ldv_undef_int(); {443786#true} is VALID [2018-11-19 18:43:16,549 INFO L273 TraceCheckUtils]: 472: Hoare triple {443786#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {443786#true} is VALID [2018-11-19 18:43:16,550 INFO L273 TraceCheckUtils]: 473: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,550 INFO L268 TraceCheckUtils]: 474: Hoare quadruple {443786#true} {443786#true} #2607#return; {443786#true} is VALID [2018-11-19 18:43:16,550 INFO L273 TraceCheckUtils]: 475: Hoare triple {443786#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {443786#true} is VALID [2018-11-19 18:43:16,550 INFO L273 TraceCheckUtils]: 476: Hoare triple {443786#true} assume 0 != ~tmp___0~26; {443786#true} is VALID [2018-11-19 18:43:16,550 INFO L273 TraceCheckUtils]: 477: Hoare triple {443786#true} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {443786#true} is VALID [2018-11-19 18:43:16,550 INFO L273 TraceCheckUtils]: 478: Hoare triple {443786#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {443786#true} is VALID [2018-11-19 18:43:16,550 INFO L273 TraceCheckUtils]: 479: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,550 INFO L268 TraceCheckUtils]: 480: Hoare quadruple {443786#true} {443786#true} #3135#return; {443786#true} is VALID [2018-11-19 18:43:16,550 INFO L273 TraceCheckUtils]: 481: Hoare triple {443786#true} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {443786#true} is VALID [2018-11-19 18:43:16,550 INFO L273 TraceCheckUtils]: 482: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,551 INFO L268 TraceCheckUtils]: 483: Hoare quadruple {443786#true} {443786#true} #2709#return; {443786#true} is VALID [2018-11-19 18:43:16,551 INFO L273 TraceCheckUtils]: 484: Hoare triple {443786#true} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {443786#true} is VALID [2018-11-19 18:43:16,551 INFO L273 TraceCheckUtils]: 485: Hoare triple {443786#true} assume 0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616;havoc #t~mem561.base, #t~mem561.offset;havoc #t~nondet562;call #t~mem563.base, #t~mem563.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem563.base, #t~mem563.offset;~error~18 := -12; {443786#true} is VALID [2018-11-19 18:43:16,551 INFO L273 TraceCheckUtils]: 486: Hoare triple {443786#true} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {443786#true} is VALID [2018-11-19 18:43:16,551 INFO L273 TraceCheckUtils]: 487: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,551 INFO L268 TraceCheckUtils]: 488: Hoare quadruple {443786#true} {443786#true} #3109#return; {443786#true} is VALID [2018-11-19 18:43:16,551 INFO L273 TraceCheckUtils]: 489: Hoare triple {443786#true} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {443786#true} is VALID [2018-11-19 18:43:16,551 INFO L273 TraceCheckUtils]: 490: Hoare triple {443786#true} assume 0 != ~error~25; {443786#true} is VALID [2018-11-19 18:43:16,551 INFO L273 TraceCheckUtils]: 491: Hoare triple {443786#true} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {443786#true} is VALID [2018-11-19 18:43:16,552 INFO L273 TraceCheckUtils]: 492: Hoare triple {443786#true} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {443786#true} is VALID [2018-11-19 18:43:16,552 INFO L273 TraceCheckUtils]: 493: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,552 INFO L268 TraceCheckUtils]: 494: Hoare quadruple {443786#true} {443787#false} #3015#return; {443787#false} is VALID [2018-11-19 18:43:16,552 INFO L273 TraceCheckUtils]: 495: Hoare triple {443787#false} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {443787#false} is VALID [2018-11-19 18:43:16,552 INFO L273 TraceCheckUtils]: 496: Hoare triple {443787#false} assume !(0 == ~ldv_retval_3~0); {443787#false} is VALID [2018-11-19 18:43:16,552 INFO L273 TraceCheckUtils]: 497: Hoare triple {443787#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,552 INFO L273 TraceCheckUtils]: 498: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,552 INFO L273 TraceCheckUtils]: 499: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,552 INFO L273 TraceCheckUtils]: 500: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,553 INFO L273 TraceCheckUtils]: 501: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,553 INFO L273 TraceCheckUtils]: 502: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,553 INFO L273 TraceCheckUtils]: 503: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,553 INFO L273 TraceCheckUtils]: 504: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,553 INFO L273 TraceCheckUtils]: 505: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,553 INFO L273 TraceCheckUtils]: 506: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:16,553 INFO L273 TraceCheckUtils]: 507: Hoare triple {443787#false} assume #t~switch909; {443787#false} is VALID [2018-11-19 18:43:16,553 INFO L273 TraceCheckUtils]: 508: Hoare triple {443787#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {443787#false} is VALID [2018-11-19 18:43:16,553 INFO L273 TraceCheckUtils]: 509: Hoare triple {443787#false} assume #t~switch947; {443787#false} is VALID [2018-11-19 18:43:16,554 INFO L273 TraceCheckUtils]: 510: Hoare triple {443787#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {443787#false} is VALID [2018-11-19 18:43:16,554 INFO L256 TraceCheckUtils]: 511: Hoare triple {443787#false} call ims_pcu_driver_exit(); {443786#true} is VALID [2018-11-19 18:43:16,554 INFO L256 TraceCheckUtils]: 512: Hoare triple {443786#true} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {443786#true} is VALID [2018-11-19 18:43:16,554 INFO L273 TraceCheckUtils]: 513: Hoare triple {443786#true} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {443786#true} is VALID [2018-11-19 18:43:16,554 INFO L273 TraceCheckUtils]: 514: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,554 INFO L268 TraceCheckUtils]: 515: Hoare quadruple {443786#true} {443786#true} #2597#return; {443786#true} is VALID [2018-11-19 18:43:16,554 INFO L273 TraceCheckUtils]: 516: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:16,554 INFO L268 TraceCheckUtils]: 517: Hoare quadruple {443786#true} {443787#false} #3033#return; {443787#false} is VALID [2018-11-19 18:43:16,554 INFO L273 TraceCheckUtils]: 518: Hoare triple {443787#false} ~ldv_state_variable_0~0 := 2; {443787#false} is VALID [2018-11-19 18:43:16,555 INFO L256 TraceCheckUtils]: 519: Hoare triple {443787#false} call ldv_check_final_state(); {443787#false} is VALID [2018-11-19 18:43:16,555 INFO L273 TraceCheckUtils]: 520: Hoare triple {443787#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {443787#false} is VALID [2018-11-19 18:43:16,555 INFO L256 TraceCheckUtils]: 521: Hoare triple {443787#false} call ldv_error(); {443787#false} is VALID [2018-11-19 18:43:16,555 INFO L273 TraceCheckUtils]: 522: Hoare triple {443787#false} assume !false; {443787#false} is VALID [2018-11-19 18:43:16,640 INFO L134 CoverageAnalysis]: Checked inductivity of 2726 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2720 trivial. 0 not checked. [2018-11-19 18:43:16,640 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-19 18:43:16,640 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-19 18:43:16,652 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-19 18:43:29,558 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-19 18:43:29,559 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-19 18:43:29,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:43:29,826 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-19 18:43:30,176 INFO L256 TraceCheckUtils]: 0: Hoare triple {443786#true} call ULTIMATE.init(); {443786#true} is VALID [2018-11-19 18:43:30,176 INFO L273 TraceCheckUtils]: 1: Hoare triple {443786#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,177 INFO L273 TraceCheckUtils]: 2: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,177 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {443786#true} {443786#true} #3175#return; {443786#true} is VALID [2018-11-19 18:43:30,177 INFO L256 TraceCheckUtils]: 4: Hoare triple {443786#true} call #t~ret973 := main(); {443786#true} is VALID [2018-11-19 18:43:30,177 INFO L273 TraceCheckUtils]: 5: Hoare triple {443786#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {443786#true} is VALID [2018-11-19 18:43:30,177 INFO L256 TraceCheckUtils]: 6: Hoare triple {443786#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:30,177 INFO L273 TraceCheckUtils]: 7: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,178 INFO L273 TraceCheckUtils]: 8: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,178 INFO L273 TraceCheckUtils]: 9: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,178 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {443786#true} {443786#true} #2927#return; {443786#true} is VALID [2018-11-19 18:43:30,178 INFO L273 TraceCheckUtils]: 11: Hoare triple {443786#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {443786#true} is VALID [2018-11-19 18:43:30,178 INFO L256 TraceCheckUtils]: 12: Hoare triple {443786#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:30,178 INFO L273 TraceCheckUtils]: 13: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,179 INFO L273 TraceCheckUtils]: 14: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,179 INFO L273 TraceCheckUtils]: 15: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,179 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {443786#true} {443786#true} #2929#return; {443786#true} is VALID [2018-11-19 18:43:30,179 INFO L273 TraceCheckUtils]: 17: Hoare triple {443786#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {443786#true} is VALID [2018-11-19 18:43:30,179 INFO L256 TraceCheckUtils]: 18: Hoare triple {443786#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:30,180 INFO L273 TraceCheckUtils]: 19: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,180 INFO L273 TraceCheckUtils]: 20: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,180 INFO L273 TraceCheckUtils]: 21: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,180 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {443786#true} {443786#true} #2931#return; {443786#true} is VALID [2018-11-19 18:43:30,180 INFO L273 TraceCheckUtils]: 23: Hoare triple {443786#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {443786#true} is VALID [2018-11-19 18:43:30,180 INFO L256 TraceCheckUtils]: 24: Hoare triple {443786#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:30,181 INFO L273 TraceCheckUtils]: 25: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,181 INFO L273 TraceCheckUtils]: 26: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,181 INFO L273 TraceCheckUtils]: 27: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,181 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {443786#true} {443786#true} #2933#return; {443786#true} is VALID [2018-11-19 18:43:30,181 INFO L273 TraceCheckUtils]: 29: Hoare triple {443786#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {443786#true} is VALID [2018-11-19 18:43:30,181 INFO L256 TraceCheckUtils]: 30: Hoare triple {443786#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {443786#true} is VALID [2018-11-19 18:43:30,182 INFO L273 TraceCheckUtils]: 31: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,182 INFO L273 TraceCheckUtils]: 32: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,182 INFO L273 TraceCheckUtils]: 33: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,182 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {443786#true} {443786#true} #2935#return; {443786#true} is VALID [2018-11-19 18:43:30,182 INFO L273 TraceCheckUtils]: 35: Hoare triple {443786#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {443786#true} is VALID [2018-11-19 18:43:30,182 INFO L256 TraceCheckUtils]: 36: Hoare triple {443786#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:30,183 INFO L273 TraceCheckUtils]: 37: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,183 INFO L273 TraceCheckUtils]: 38: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,183 INFO L273 TraceCheckUtils]: 39: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,183 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {443786#true} {443786#true} #2937#return; {443786#true} is VALID [2018-11-19 18:43:30,183 INFO L273 TraceCheckUtils]: 41: Hoare triple {443786#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {443786#true} is VALID [2018-11-19 18:43:30,184 INFO L256 TraceCheckUtils]: 42: Hoare triple {443786#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {443786#true} is VALID [2018-11-19 18:43:30,184 INFO L273 TraceCheckUtils]: 43: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,184 INFO L273 TraceCheckUtils]: 44: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,184 INFO L273 TraceCheckUtils]: 45: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,184 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {443786#true} {443786#true} #2939#return; {443786#true} is VALID [2018-11-19 18:43:30,184 INFO L273 TraceCheckUtils]: 47: Hoare triple {443786#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {443786#true} is VALID [2018-11-19 18:43:30,185 INFO L256 TraceCheckUtils]: 48: Hoare triple {443786#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:30,185 INFO L273 TraceCheckUtils]: 49: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,185 INFO L273 TraceCheckUtils]: 50: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,185 INFO L273 TraceCheckUtils]: 51: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,185 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {443786#true} {443786#true} #2941#return; {443786#true} is VALID [2018-11-19 18:43:30,185 INFO L273 TraceCheckUtils]: 53: Hoare triple {443786#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {443786#true} is VALID [2018-11-19 18:43:30,186 INFO L256 TraceCheckUtils]: 54: Hoare triple {443786#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:30,186 INFO L273 TraceCheckUtils]: 55: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,186 INFO L273 TraceCheckUtils]: 56: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,186 INFO L273 TraceCheckUtils]: 57: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,186 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {443786#true} {443786#true} #2943#return; {443786#true} is VALID [2018-11-19 18:43:30,186 INFO L273 TraceCheckUtils]: 59: Hoare triple {443786#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {443786#true} is VALID [2018-11-19 18:43:30,187 INFO L256 TraceCheckUtils]: 60: Hoare triple {443786#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:30,187 INFO L273 TraceCheckUtils]: 61: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,187 INFO L273 TraceCheckUtils]: 62: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,187 INFO L273 TraceCheckUtils]: 63: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,187 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {443786#true} {443786#true} #2945#return; {443786#true} is VALID [2018-11-19 18:43:30,187 INFO L273 TraceCheckUtils]: 65: Hoare triple {443786#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {443786#true} is VALID [2018-11-19 18:43:30,188 INFO L256 TraceCheckUtils]: 66: Hoare triple {443786#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:30,188 INFO L273 TraceCheckUtils]: 67: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,188 INFO L273 TraceCheckUtils]: 68: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,188 INFO L273 TraceCheckUtils]: 69: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,188 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {443786#true} {443786#true} #2947#return; {443786#true} is VALID [2018-11-19 18:43:30,188 INFO L273 TraceCheckUtils]: 71: Hoare triple {443786#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {443786#true} is VALID [2018-11-19 18:43:30,189 INFO L256 TraceCheckUtils]: 72: Hoare triple {443786#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {443786#true} is VALID [2018-11-19 18:43:30,189 INFO L273 TraceCheckUtils]: 73: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,189 INFO L273 TraceCheckUtils]: 74: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,189 INFO L273 TraceCheckUtils]: 75: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,189 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {443786#true} {443786#true} #2949#return; {443786#true} is VALID [2018-11-19 18:43:30,190 INFO L273 TraceCheckUtils]: 77: Hoare triple {443786#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {443786#true} is VALID [2018-11-19 18:43:30,190 INFO L256 TraceCheckUtils]: 78: Hoare triple {443786#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {443786#true} is VALID [2018-11-19 18:43:30,190 INFO L273 TraceCheckUtils]: 79: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,190 INFO L273 TraceCheckUtils]: 80: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,190 INFO L273 TraceCheckUtils]: 81: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,190 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {443786#true} {443786#true} #2951#return; {443786#true} is VALID [2018-11-19 18:43:30,191 INFO L273 TraceCheckUtils]: 83: Hoare triple {443786#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {443786#true} is VALID [2018-11-19 18:43:30,191 INFO L256 TraceCheckUtils]: 84: Hoare triple {443786#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:30,191 INFO L273 TraceCheckUtils]: 85: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,191 INFO L273 TraceCheckUtils]: 86: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,191 INFO L273 TraceCheckUtils]: 87: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,191 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {443786#true} {443786#true} #2953#return; {443786#true} is VALID [2018-11-19 18:43:30,192 INFO L273 TraceCheckUtils]: 89: Hoare triple {443786#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {443786#true} is VALID [2018-11-19 18:43:30,192 INFO L256 TraceCheckUtils]: 90: Hoare triple {443786#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:30,192 INFO L273 TraceCheckUtils]: 91: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,192 INFO L273 TraceCheckUtils]: 92: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,192 INFO L273 TraceCheckUtils]: 93: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,192 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {443786#true} {443786#true} #2955#return; {443786#true} is VALID [2018-11-19 18:43:30,193 INFO L273 TraceCheckUtils]: 95: Hoare triple {443786#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {443786#true} is VALID [2018-11-19 18:43:30,193 INFO L256 TraceCheckUtils]: 96: Hoare triple {443786#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {443786#true} is VALID [2018-11-19 18:43:30,193 INFO L273 TraceCheckUtils]: 97: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,193 INFO L273 TraceCheckUtils]: 98: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,193 INFO L273 TraceCheckUtils]: 99: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,193 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {443786#true} {443786#true} #2957#return; {443786#true} is VALID [2018-11-19 18:43:30,194 INFO L273 TraceCheckUtils]: 101: Hoare triple {443786#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {443786#true} is VALID [2018-11-19 18:43:30,194 INFO L256 TraceCheckUtils]: 102: Hoare triple {443786#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {443786#true} is VALID [2018-11-19 18:43:30,194 INFO L273 TraceCheckUtils]: 103: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,194 INFO L273 TraceCheckUtils]: 104: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,195 INFO L273 TraceCheckUtils]: 105: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,195 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {443786#true} {443786#true} #2959#return; {443786#true} is VALID [2018-11-19 18:43:30,195 INFO L273 TraceCheckUtils]: 107: Hoare triple {443786#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {443786#true} is VALID [2018-11-19 18:43:30,195 INFO L256 TraceCheckUtils]: 108: Hoare triple {443786#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {443786#true} is VALID [2018-11-19 18:43:30,195 INFO L273 TraceCheckUtils]: 109: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,196 INFO L273 TraceCheckUtils]: 110: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,196 INFO L273 TraceCheckUtils]: 111: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,196 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {443786#true} {443786#true} #2961#return; {443786#true} is VALID [2018-11-19 18:43:30,196 INFO L273 TraceCheckUtils]: 113: Hoare triple {443786#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {443786#true} is VALID [2018-11-19 18:43:30,196 INFO L256 TraceCheckUtils]: 114: Hoare triple {443786#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:30,197 INFO L273 TraceCheckUtils]: 115: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,197 INFO L273 TraceCheckUtils]: 116: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,197 INFO L273 TraceCheckUtils]: 117: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,197 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {443786#true} {443786#true} #2963#return; {443786#true} is VALID [2018-11-19 18:43:30,197 INFO L273 TraceCheckUtils]: 119: Hoare triple {443786#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {443786#true} is VALID [2018-11-19 18:43:30,198 INFO L256 TraceCheckUtils]: 120: Hoare triple {443786#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:30,198 INFO L273 TraceCheckUtils]: 121: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,198 INFO L273 TraceCheckUtils]: 122: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,198 INFO L273 TraceCheckUtils]: 123: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,198 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {443786#true} {443786#true} #2965#return; {443786#true} is VALID [2018-11-19 18:43:30,198 INFO L273 TraceCheckUtils]: 125: Hoare triple {443786#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {443786#true} is VALID [2018-11-19 18:43:30,199 INFO L256 TraceCheckUtils]: 126: Hoare triple {443786#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:30,199 INFO L273 TraceCheckUtils]: 127: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,199 INFO L273 TraceCheckUtils]: 128: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,199 INFO L273 TraceCheckUtils]: 129: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,199 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {443786#true} {443786#true} #2967#return; {443786#true} is VALID [2018-11-19 18:43:30,199 INFO L273 TraceCheckUtils]: 131: Hoare triple {443786#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {443786#true} is VALID [2018-11-19 18:43:30,199 INFO L256 TraceCheckUtils]: 132: Hoare triple {443786#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {443786#true} is VALID [2018-11-19 18:43:30,199 INFO L273 TraceCheckUtils]: 133: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,200 INFO L273 TraceCheckUtils]: 134: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,200 INFO L273 TraceCheckUtils]: 135: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,200 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {443786#true} {443786#true} #2969#return; {443786#true} is VALID [2018-11-19 18:43:30,200 INFO L273 TraceCheckUtils]: 137: Hoare triple {443786#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {443786#true} is VALID [2018-11-19 18:43:30,200 INFO L256 TraceCheckUtils]: 138: Hoare triple {443786#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {443786#true} is VALID [2018-11-19 18:43:30,200 INFO L273 TraceCheckUtils]: 139: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,200 INFO L273 TraceCheckUtils]: 140: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,200 INFO L273 TraceCheckUtils]: 141: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,200 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {443786#true} {443786#true} #2971#return; {443786#true} is VALID [2018-11-19 18:43:30,200 INFO L273 TraceCheckUtils]: 143: Hoare triple {443786#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {443786#true} is VALID [2018-11-19 18:43:30,201 INFO L256 TraceCheckUtils]: 144: Hoare triple {443786#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {443786#true} is VALID [2018-11-19 18:43:30,201 INFO L273 TraceCheckUtils]: 145: Hoare triple {443786#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443786#true} is VALID [2018-11-19 18:43:30,201 INFO L273 TraceCheckUtils]: 146: Hoare triple {443786#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443786#true} is VALID [2018-11-19 18:43:30,201 INFO L273 TraceCheckUtils]: 147: Hoare triple {443786#true} assume true; {443786#true} is VALID [2018-11-19 18:43:30,201 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {443786#true} {443786#true} #2973#return; {443786#true} is VALID [2018-11-19 18:43:30,201 INFO L273 TraceCheckUtils]: 149: Hoare triple {443786#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {443786#true} is VALID [2018-11-19 18:43:30,201 INFO L256 TraceCheckUtils]: 150: Hoare triple {443786#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {443786#true} is VALID [2018-11-19 18:43:30,206 INFO L273 TraceCheckUtils]: 151: Hoare triple {443786#true} #t~loopctr974 := 0; {444249#(<= |#Ultimate.C_memset_#t~loopctr974| 0)} is VALID [2018-11-19 18:43:30,207 INFO L273 TraceCheckUtils]: 152: Hoare triple {444249#(<= |#Ultimate.C_memset_#t~loopctr974| 0)} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {444253#(<= |#Ultimate.C_memset_#t~loopctr974| 1)} is VALID [2018-11-19 18:43:30,207 INFO L273 TraceCheckUtils]: 153: Hoare triple {444253#(<= |#Ultimate.C_memset_#t~loopctr974| 1)} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {444257#(<= |#Ultimate.C_memset_#t~loopctr974| 2)} is VALID [2018-11-19 18:43:30,209 INFO L273 TraceCheckUtils]: 154: Hoare triple {444257#(<= |#Ultimate.C_memset_#t~loopctr974| 2)} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {444261#(<= |#Ultimate.C_memset_#t~loopctr974| 3)} is VALID [2018-11-19 18:43:30,209 INFO L273 TraceCheckUtils]: 155: Hoare triple {444261#(<= |#Ultimate.C_memset_#t~loopctr974| 3)} assume !(#t~loopctr974 < #amount); {444265#(<= |#Ultimate.C_memset_#amount| 3)} is VALID [2018-11-19 18:43:30,211 INFO L273 TraceCheckUtils]: 156: Hoare triple {444265#(<= |#Ultimate.C_memset_#amount| 3)} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {444265#(<= |#Ultimate.C_memset_#amount| 3)} is VALID [2018-11-19 18:43:30,212 INFO L268 TraceCheckUtils]: 157: Hoare quadruple {444265#(<= |#Ultimate.C_memset_#amount| 3)} {443786#true} #2975#return; {443787#false} is VALID [2018-11-19 18:43:30,212 INFO L273 TraceCheckUtils]: 158: Hoare triple {443787#false} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {443787#false} is VALID [2018-11-19 18:43:30,212 INFO L273 TraceCheckUtils]: 159: Hoare triple {443787#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,212 INFO L273 TraceCheckUtils]: 160: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,212 INFO L273 TraceCheckUtils]: 161: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,212 INFO L273 TraceCheckUtils]: 162: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,212 INFO L273 TraceCheckUtils]: 163: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,213 INFO L273 TraceCheckUtils]: 164: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,213 INFO L273 TraceCheckUtils]: 165: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,213 INFO L273 TraceCheckUtils]: 166: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,213 INFO L273 TraceCheckUtils]: 167: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,213 INFO L273 TraceCheckUtils]: 168: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,213 INFO L273 TraceCheckUtils]: 169: Hoare triple {443787#false} assume #t~switch909; {443787#false} is VALID [2018-11-19 18:43:30,213 INFO L273 TraceCheckUtils]: 170: Hoare triple {443787#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {443787#false} is VALID [2018-11-19 18:43:30,213 INFO L273 TraceCheckUtils]: 171: Hoare triple {443787#false} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {443787#false} is VALID [2018-11-19 18:43:30,214 INFO L273 TraceCheckUtils]: 172: Hoare triple {443787#false} assume #t~switch947; {443787#false} is VALID [2018-11-19 18:43:30,214 INFO L273 TraceCheckUtils]: 173: Hoare triple {443787#false} assume 1 == ~ldv_state_variable_0~0; {443787#false} is VALID [2018-11-19 18:43:30,214 INFO L256 TraceCheckUtils]: 174: Hoare triple {443787#false} call #t~ret948 := ims_pcu_driver_init(); {443787#false} is VALID [2018-11-19 18:43:30,214 INFO L273 TraceCheckUtils]: 175: Hoare triple {443787#false} havoc ~tmp~46; {443787#false} is VALID [2018-11-19 18:43:30,214 INFO L256 TraceCheckUtils]: 176: Hoare triple {443787#false} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {443787#false} is VALID [2018-11-19 18:43:30,214 INFO L273 TraceCheckUtils]: 177: Hoare triple {443787#false} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {443787#false} is VALID [2018-11-19 18:43:30,214 INFO L256 TraceCheckUtils]: 178: Hoare triple {443787#false} call ldv_usb_driver_1(); {443787#false} is VALID [2018-11-19 18:43:30,214 INFO L273 TraceCheckUtils]: 179: Hoare triple {443787#false} havoc ~tmp~53.base, ~tmp~53.offset; {443787#false} is VALID [2018-11-19 18:43:30,214 INFO L256 TraceCheckUtils]: 180: Hoare triple {443787#false} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {443787#false} is VALID [2018-11-19 18:43:30,215 INFO L273 TraceCheckUtils]: 181: Hoare triple {443787#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443787#false} is VALID [2018-11-19 18:43:30,215 INFO L273 TraceCheckUtils]: 182: Hoare triple {443787#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443787#false} is VALID [2018-11-19 18:43:30,215 INFO L273 TraceCheckUtils]: 183: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,215 INFO L268 TraceCheckUtils]: 184: Hoare quadruple {443787#false} {443787#false} #2613#return; {443787#false} is VALID [2018-11-19 18:43:30,215 INFO L273 TraceCheckUtils]: 185: Hoare triple {443787#false} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {443787#false} is VALID [2018-11-19 18:43:30,215 INFO L273 TraceCheckUtils]: 186: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,215 INFO L268 TraceCheckUtils]: 187: Hoare quadruple {443787#false} {443787#false} #2537#return; {443787#false} is VALID [2018-11-19 18:43:30,215 INFO L273 TraceCheckUtils]: 188: Hoare triple {443787#false} #res := ~ldv_func_res~0; {443787#false} is VALID [2018-11-19 18:43:30,215 INFO L273 TraceCheckUtils]: 189: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,216 INFO L268 TraceCheckUtils]: 190: Hoare quadruple {443787#false} {443787#false} #2777#return; {443787#false} is VALID [2018-11-19 18:43:30,216 INFO L273 TraceCheckUtils]: 191: Hoare triple {443787#false} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {443787#false} is VALID [2018-11-19 18:43:30,216 INFO L273 TraceCheckUtils]: 192: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,216 INFO L268 TraceCheckUtils]: 193: Hoare quadruple {443787#false} {443787#false} #3035#return; {443787#false} is VALID [2018-11-19 18:43:30,216 INFO L273 TraceCheckUtils]: 194: Hoare triple {443787#false} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {443787#false} is VALID [2018-11-19 18:43:30,216 INFO L273 TraceCheckUtils]: 195: Hoare triple {443787#false} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_10~0 := 1; {443787#false} is VALID [2018-11-19 18:43:30,216 INFO L256 TraceCheckUtils]: 196: Hoare triple {443787#false} call ldv_initialize_ims_pcu_attribute_10(); {443787#false} is VALID [2018-11-19 18:43:30,216 INFO L273 TraceCheckUtils]: 197: Hoare triple {443787#false} havoc ~tmp~47.base, ~tmp~47.offset;havoc ~tmp___0~19.base, ~tmp___0~19.offset; {443787#false} is VALID [2018-11-19 18:43:30,216 INFO L256 TraceCheckUtils]: 198: Hoare triple {443787#false} call #t~ret861.base, #t~ret861.offset := ldv_zalloc(1376); {443787#false} is VALID [2018-11-19 18:43:30,217 INFO L273 TraceCheckUtils]: 199: Hoare triple {443787#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443787#false} is VALID [2018-11-19 18:43:30,217 INFO L273 TraceCheckUtils]: 200: Hoare triple {443787#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443787#false} is VALID [2018-11-19 18:43:30,217 INFO L273 TraceCheckUtils]: 201: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,217 INFO L268 TraceCheckUtils]: 202: Hoare quadruple {443787#false} {443787#false} #2807#return; {443787#false} is VALID [2018-11-19 18:43:30,217 INFO L273 TraceCheckUtils]: 203: Hoare triple {443787#false} ~tmp~47.base, ~tmp~47.offset := #t~ret861.base, #t~ret861.offset;havoc #t~ret861.base, #t~ret861.offset;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := ~tmp~47.base, ~tmp~47.offset; {443787#false} is VALID [2018-11-19 18:43:30,217 INFO L256 TraceCheckUtils]: 204: Hoare triple {443787#false} call #t~ret862.base, #t~ret862.offset := ldv_zalloc(48); {443787#false} is VALID [2018-11-19 18:43:30,217 INFO L273 TraceCheckUtils]: 205: Hoare triple {443787#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443787#false} is VALID [2018-11-19 18:43:30,217 INFO L273 TraceCheckUtils]: 206: Hoare triple {443787#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443787#false} is VALID [2018-11-19 18:43:30,217 INFO L273 TraceCheckUtils]: 207: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,218 INFO L268 TraceCheckUtils]: 208: Hoare quadruple {443787#false} {443787#false} #2809#return; {443787#false} is VALID [2018-11-19 18:43:30,218 INFO L273 TraceCheckUtils]: 209: Hoare triple {443787#false} ~tmp___0~19.base, ~tmp___0~19.offset := #t~ret862.base, #t~ret862.offset;havoc #t~ret862.base, #t~ret862.offset;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := ~tmp___0~19.base, ~tmp___0~19.offset; {443787#false} is VALID [2018-11-19 18:43:30,218 INFO L273 TraceCheckUtils]: 210: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,218 INFO L268 TraceCheckUtils]: 211: Hoare quadruple {443787#false} {443787#false} #3037#return; {443787#false} is VALID [2018-11-19 18:43:30,218 INFO L273 TraceCheckUtils]: 212: Hoare triple {443787#false} ~ldv_state_variable_4~0 := 1;~ldv_state_variable_8~0 := 1; {443787#false} is VALID [2018-11-19 18:43:30,218 INFO L256 TraceCheckUtils]: 213: Hoare triple {443787#false} call ldv_initialize_ims_pcu_attribute_8(); {443787#false} is VALID [2018-11-19 18:43:30,218 INFO L273 TraceCheckUtils]: 214: Hoare triple {443787#false} havoc ~tmp~51.base, ~tmp~51.offset;havoc ~tmp___0~23.base, ~tmp___0~23.offset; {443787#false} is VALID [2018-11-19 18:43:30,218 INFO L256 TraceCheckUtils]: 215: Hoare triple {443787#false} call #t~ret869.base, #t~ret869.offset := ldv_zalloc(1376); {443787#false} is VALID [2018-11-19 18:43:30,218 INFO L273 TraceCheckUtils]: 216: Hoare triple {443787#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443787#false} is VALID [2018-11-19 18:43:30,219 INFO L273 TraceCheckUtils]: 217: Hoare triple {443787#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443787#false} is VALID [2018-11-19 18:43:30,219 INFO L273 TraceCheckUtils]: 218: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,219 INFO L268 TraceCheckUtils]: 219: Hoare quadruple {443787#false} {443787#false} #2631#return; {443787#false} is VALID [2018-11-19 18:43:30,219 INFO L273 TraceCheckUtils]: 220: Hoare triple {443787#false} ~tmp~51.base, ~tmp~51.offset := #t~ret869.base, #t~ret869.offset;havoc #t~ret869.base, #t~ret869.offset;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := ~tmp~51.base, ~tmp~51.offset; {443787#false} is VALID [2018-11-19 18:43:30,219 INFO L256 TraceCheckUtils]: 221: Hoare triple {443787#false} call #t~ret870.base, #t~ret870.offset := ldv_zalloc(48); {443787#false} is VALID [2018-11-19 18:43:30,219 INFO L273 TraceCheckUtils]: 222: Hoare triple {443787#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443787#false} is VALID [2018-11-19 18:43:30,219 INFO L273 TraceCheckUtils]: 223: Hoare triple {443787#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443787#false} is VALID [2018-11-19 18:43:30,219 INFO L273 TraceCheckUtils]: 224: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,219 INFO L268 TraceCheckUtils]: 225: Hoare quadruple {443787#false} {443787#false} #2633#return; {443787#false} is VALID [2018-11-19 18:43:30,219 INFO L273 TraceCheckUtils]: 226: Hoare triple {443787#false} ~tmp___0~23.base, ~tmp___0~23.offset := #t~ret870.base, #t~ret870.offset;havoc #t~ret870.base, #t~ret870.offset;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := ~tmp___0~23.base, ~tmp___0~23.offset; {443787#false} is VALID [2018-11-19 18:43:30,220 INFO L273 TraceCheckUtils]: 227: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,220 INFO L268 TraceCheckUtils]: 228: Hoare quadruple {443787#false} {443787#false} #3039#return; {443787#false} is VALID [2018-11-19 18:43:30,220 INFO L273 TraceCheckUtils]: 229: Hoare triple {443787#false} ~ldv_state_variable_2~0 := 1;~ldv_state_variable_9~0 := 1; {443787#false} is VALID [2018-11-19 18:43:30,220 INFO L256 TraceCheckUtils]: 230: Hoare triple {443787#false} call ldv_initialize_ims_pcu_attribute_9(); {443787#false} is VALID [2018-11-19 18:43:30,220 INFO L273 TraceCheckUtils]: 231: Hoare triple {443787#false} havoc ~tmp~49.base, ~tmp~49.offset;havoc ~tmp___0~21.base, ~tmp___0~21.offset; {443787#false} is VALID [2018-11-19 18:43:30,220 INFO L256 TraceCheckUtils]: 232: Hoare triple {443787#false} call #t~ret865.base, #t~ret865.offset := ldv_zalloc(1376); {443787#false} is VALID [2018-11-19 18:43:30,220 INFO L273 TraceCheckUtils]: 233: Hoare triple {443787#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443787#false} is VALID [2018-11-19 18:43:30,220 INFO L273 TraceCheckUtils]: 234: Hoare triple {443787#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443787#false} is VALID [2018-11-19 18:43:30,220 INFO L273 TraceCheckUtils]: 235: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,221 INFO L268 TraceCheckUtils]: 236: Hoare quadruple {443787#false} {443787#false} #2627#return; {443787#false} is VALID [2018-11-19 18:43:30,221 INFO L273 TraceCheckUtils]: 237: Hoare triple {443787#false} ~tmp~49.base, ~tmp~49.offset := #t~ret865.base, #t~ret865.offset;havoc #t~ret865.base, #t~ret865.offset;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := ~tmp~49.base, ~tmp~49.offset; {443787#false} is VALID [2018-11-19 18:43:30,221 INFO L256 TraceCheckUtils]: 238: Hoare triple {443787#false} call #t~ret866.base, #t~ret866.offset := ldv_zalloc(48); {443787#false} is VALID [2018-11-19 18:43:30,221 INFO L273 TraceCheckUtils]: 239: Hoare triple {443787#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443787#false} is VALID [2018-11-19 18:43:30,221 INFO L273 TraceCheckUtils]: 240: Hoare triple {443787#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443787#false} is VALID [2018-11-19 18:43:30,221 INFO L273 TraceCheckUtils]: 241: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,221 INFO L268 TraceCheckUtils]: 242: Hoare quadruple {443787#false} {443787#false} #2629#return; {443787#false} is VALID [2018-11-19 18:43:30,221 INFO L273 TraceCheckUtils]: 243: Hoare triple {443787#false} ~tmp___0~21.base, ~tmp___0~21.offset := #t~ret866.base, #t~ret866.offset;havoc #t~ret866.base, #t~ret866.offset;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := ~tmp___0~21.base, ~tmp___0~21.offset; {443787#false} is VALID [2018-11-19 18:43:30,221 INFO L273 TraceCheckUtils]: 244: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,222 INFO L268 TraceCheckUtils]: 245: Hoare quadruple {443787#false} {443787#false} #3041#return; {443787#false} is VALID [2018-11-19 18:43:30,222 INFO L273 TraceCheckUtils]: 246: Hoare triple {443787#false} ~ldv_state_variable_7~0 := 1; {443787#false} is VALID [2018-11-19 18:43:30,222 INFO L256 TraceCheckUtils]: 247: Hoare triple {443787#false} call ldv_initialize_ims_pcu_attribute_7(); {443787#false} is VALID [2018-11-19 18:43:30,222 INFO L273 TraceCheckUtils]: 248: Hoare triple {443787#false} havoc ~tmp~52.base, ~tmp~52.offset;havoc ~tmp___0~24.base, ~tmp___0~24.offset; {443787#false} is VALID [2018-11-19 18:43:30,222 INFO L256 TraceCheckUtils]: 249: Hoare triple {443787#false} call #t~ret871.base, #t~ret871.offset := ldv_zalloc(1376); {443787#false} is VALID [2018-11-19 18:43:30,222 INFO L273 TraceCheckUtils]: 250: Hoare triple {443787#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443787#false} is VALID [2018-11-19 18:43:30,222 INFO L273 TraceCheckUtils]: 251: Hoare triple {443787#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443787#false} is VALID [2018-11-19 18:43:30,222 INFO L273 TraceCheckUtils]: 252: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,222 INFO L268 TraceCheckUtils]: 253: Hoare quadruple {443787#false} {443787#false} #2619#return; {443787#false} is VALID [2018-11-19 18:43:30,223 INFO L273 TraceCheckUtils]: 254: Hoare triple {443787#false} ~tmp~52.base, ~tmp~52.offset := #t~ret871.base, #t~ret871.offset;havoc #t~ret871.base, #t~ret871.offset;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := ~tmp~52.base, ~tmp~52.offset; {443787#false} is VALID [2018-11-19 18:43:30,223 INFO L256 TraceCheckUtils]: 255: Hoare triple {443787#false} call #t~ret872.base, #t~ret872.offset := ldv_zalloc(48); {443787#false} is VALID [2018-11-19 18:43:30,223 INFO L273 TraceCheckUtils]: 256: Hoare triple {443787#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443787#false} is VALID [2018-11-19 18:43:30,223 INFO L273 TraceCheckUtils]: 257: Hoare triple {443787#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443787#false} is VALID [2018-11-19 18:43:30,223 INFO L273 TraceCheckUtils]: 258: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,223 INFO L268 TraceCheckUtils]: 259: Hoare quadruple {443787#false} {443787#false} #2621#return; {443787#false} is VALID [2018-11-19 18:43:30,223 INFO L273 TraceCheckUtils]: 260: Hoare triple {443787#false} ~tmp___0~24.base, ~tmp___0~24.offset := #t~ret872.base, #t~ret872.offset;havoc #t~ret872.base, #t~ret872.offset;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := ~tmp___0~24.base, ~tmp___0~24.offset; {443787#false} is VALID [2018-11-19 18:43:30,223 INFO L273 TraceCheckUtils]: 261: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,223 INFO L268 TraceCheckUtils]: 262: Hoare quadruple {443787#false} {443787#false} #3043#return; {443787#false} is VALID [2018-11-19 18:43:30,223 INFO L273 TraceCheckUtils]: 263: Hoare triple {443787#false} ~ldv_state_variable_3~0 := 1;~ldv_state_variable_11~0 := 1; {443787#false} is VALID [2018-11-19 18:43:30,224 INFO L256 TraceCheckUtils]: 264: Hoare triple {443787#false} call ldv_initialize_ims_pcu_attribute_11(); {443787#false} is VALID [2018-11-19 18:43:30,224 INFO L273 TraceCheckUtils]: 265: Hoare triple {443787#false} havoc ~tmp~50.base, ~tmp~50.offset;havoc ~tmp___0~22.base, ~tmp___0~22.offset; {443787#false} is VALID [2018-11-19 18:43:30,224 INFO L256 TraceCheckUtils]: 266: Hoare triple {443787#false} call #t~ret867.base, #t~ret867.offset := ldv_zalloc(1376); {443787#false} is VALID [2018-11-19 18:43:30,224 INFO L273 TraceCheckUtils]: 267: Hoare triple {443787#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443787#false} is VALID [2018-11-19 18:43:30,224 INFO L273 TraceCheckUtils]: 268: Hoare triple {443787#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443787#false} is VALID [2018-11-19 18:43:30,224 INFO L273 TraceCheckUtils]: 269: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,224 INFO L268 TraceCheckUtils]: 270: Hoare quadruple {443787#false} {443787#false} #2811#return; {443787#false} is VALID [2018-11-19 18:43:30,224 INFO L273 TraceCheckUtils]: 271: Hoare triple {443787#false} ~tmp~50.base, ~tmp~50.offset := #t~ret867.base, #t~ret867.offset;havoc #t~ret867.base, #t~ret867.offset;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := ~tmp~50.base, ~tmp~50.offset; {443787#false} is VALID [2018-11-19 18:43:30,224 INFO L256 TraceCheckUtils]: 272: Hoare triple {443787#false} call #t~ret868.base, #t~ret868.offset := ldv_zalloc(48); {443787#false} is VALID [2018-11-19 18:43:30,224 INFO L273 TraceCheckUtils]: 273: Hoare triple {443787#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443787#false} is VALID [2018-11-19 18:43:30,225 INFO L273 TraceCheckUtils]: 274: Hoare triple {443787#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443787#false} is VALID [2018-11-19 18:43:30,225 INFO L273 TraceCheckUtils]: 275: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,225 INFO L268 TraceCheckUtils]: 276: Hoare quadruple {443787#false} {443787#false} #2813#return; {443787#false} is VALID [2018-11-19 18:43:30,225 INFO L273 TraceCheckUtils]: 277: Hoare triple {443787#false} ~tmp___0~22.base, ~tmp___0~22.offset := #t~ret868.base, #t~ret868.offset;havoc #t~ret868.base, #t~ret868.offset;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := ~tmp___0~22.base, ~tmp___0~22.offset; {443787#false} is VALID [2018-11-19 18:43:30,225 INFO L273 TraceCheckUtils]: 278: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,225 INFO L268 TraceCheckUtils]: 279: Hoare quadruple {443787#false} {443787#false} #3045#return; {443787#false} is VALID [2018-11-19 18:43:30,225 INFO L273 TraceCheckUtils]: 280: Hoare triple {443787#false} ~ldv_state_variable_6~0 := 1; {443787#false} is VALID [2018-11-19 18:43:30,225 INFO L256 TraceCheckUtils]: 281: Hoare triple {443787#false} call ldv_initialize_ims_pcu_attribute_6(); {443787#false} is VALID [2018-11-19 18:43:30,225 INFO L273 TraceCheckUtils]: 282: Hoare triple {443787#false} havoc ~tmp~48.base, ~tmp~48.offset;havoc ~tmp___0~20.base, ~tmp___0~20.offset; {443787#false} is VALID [2018-11-19 18:43:30,225 INFO L256 TraceCheckUtils]: 283: Hoare triple {443787#false} call #t~ret863.base, #t~ret863.offset := ldv_zalloc(1376); {443787#false} is VALID [2018-11-19 18:43:30,226 INFO L273 TraceCheckUtils]: 284: Hoare triple {443787#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443787#false} is VALID [2018-11-19 18:43:30,226 INFO L273 TraceCheckUtils]: 285: Hoare triple {443787#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443787#false} is VALID [2018-11-19 18:43:30,226 INFO L273 TraceCheckUtils]: 286: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,226 INFO L268 TraceCheckUtils]: 287: Hoare quadruple {443787#false} {443787#false} #2623#return; {443787#false} is VALID [2018-11-19 18:43:30,226 INFO L273 TraceCheckUtils]: 288: Hoare triple {443787#false} ~tmp~48.base, ~tmp~48.offset := #t~ret863.base, #t~ret863.offset;havoc #t~ret863.base, #t~ret863.offset;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := ~tmp~48.base, ~tmp~48.offset; {443787#false} is VALID [2018-11-19 18:43:30,226 INFO L256 TraceCheckUtils]: 289: Hoare triple {443787#false} call #t~ret864.base, #t~ret864.offset := ldv_zalloc(48); {443787#false} is VALID [2018-11-19 18:43:30,226 INFO L273 TraceCheckUtils]: 290: Hoare triple {443787#false} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {443787#false} is VALID [2018-11-19 18:43:30,226 INFO L273 TraceCheckUtils]: 291: Hoare triple {443787#false} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {443787#false} is VALID [2018-11-19 18:43:30,226 INFO L273 TraceCheckUtils]: 292: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,226 INFO L268 TraceCheckUtils]: 293: Hoare quadruple {443787#false} {443787#false} #2625#return; {443787#false} is VALID [2018-11-19 18:43:30,227 INFO L273 TraceCheckUtils]: 294: Hoare triple {443787#false} ~tmp___0~20.base, ~tmp___0~20.offset := #t~ret864.base, #t~ret864.offset;havoc #t~ret864.base, #t~ret864.offset;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := ~tmp___0~20.base, ~tmp___0~20.offset; {443787#false} is VALID [2018-11-19 18:43:30,227 INFO L273 TraceCheckUtils]: 295: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,227 INFO L268 TraceCheckUtils]: 296: Hoare quadruple {443787#false} {443787#false} #3047#return; {443787#false} is VALID [2018-11-19 18:43:30,227 INFO L273 TraceCheckUtils]: 297: Hoare triple {443787#false} assume !(0 != ~ldv_retval_4~0); {443787#false} is VALID [2018-11-19 18:43:30,227 INFO L273 TraceCheckUtils]: 298: Hoare triple {443787#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,227 INFO L273 TraceCheckUtils]: 299: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,227 INFO L273 TraceCheckUtils]: 300: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,227 INFO L273 TraceCheckUtils]: 301: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,227 INFO L273 TraceCheckUtils]: 302: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,227 INFO L273 TraceCheckUtils]: 303: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,228 INFO L273 TraceCheckUtils]: 304: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,228 INFO L273 TraceCheckUtils]: 305: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,228 INFO L273 TraceCheckUtils]: 306: Hoare triple {443787#false} assume #t~switch909; {443787#false} is VALID [2018-11-19 18:43:30,228 INFO L273 TraceCheckUtils]: 307: Hoare triple {443787#false} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {443787#false} is VALID [2018-11-19 18:43:30,228 INFO L273 TraceCheckUtils]: 308: Hoare triple {443787#false} assume #t~switch937; {443787#false} is VALID [2018-11-19 18:43:30,228 INFO L273 TraceCheckUtils]: 309: Hoare triple {443787#false} assume 1 == ~ldv_state_variable_1~0; {443787#false} is VALID [2018-11-19 18:43:30,228 INFO L256 TraceCheckUtils]: 310: Hoare triple {443787#false} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {443787#false} is VALID [2018-11-19 18:43:30,228 INFO L273 TraceCheckUtils]: 311: Hoare triple {443787#false} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {443787#false} is VALID [2018-11-19 18:43:30,228 INFO L256 TraceCheckUtils]: 312: Hoare triple {443787#false} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {443787#false} is VALID [2018-11-19 18:43:30,229 INFO L273 TraceCheckUtils]: 313: Hoare triple {443787#false} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {443787#false} is VALID [2018-11-19 18:43:30,229 INFO L256 TraceCheckUtils]: 314: Hoare triple {443787#false} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {443787#false} is VALID [2018-11-19 18:43:30,229 INFO L273 TraceCheckUtils]: 315: Hoare triple {443787#false} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {443787#false} is VALID [2018-11-19 18:43:30,229 INFO L256 TraceCheckUtils]: 316: Hoare triple {443787#false} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {443787#false} is VALID [2018-11-19 18:43:30,229 INFO L273 TraceCheckUtils]: 317: Hoare triple {443787#false} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {443787#false} is VALID [2018-11-19 18:43:30,229 INFO L273 TraceCheckUtils]: 318: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,229 INFO L268 TraceCheckUtils]: 319: Hoare quadruple {443787#false} {443787#false} #2817#return; {443787#false} is VALID [2018-11-19 18:43:30,229 INFO L273 TraceCheckUtils]: 320: Hoare triple {443787#false} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {443787#false} is VALID [2018-11-19 18:43:30,229 INFO L273 TraceCheckUtils]: 321: Hoare triple {443787#false} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {443787#false} is VALID [2018-11-19 18:43:30,229 INFO L273 TraceCheckUtils]: 322: Hoare triple {443787#false} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {443787#false} is VALID [2018-11-19 18:43:30,230 INFO L273 TraceCheckUtils]: 323: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,230 INFO L268 TraceCheckUtils]: 324: Hoare quadruple {443787#false} {443787#false} #3151#return; {443787#false} is VALID [2018-11-19 18:43:30,230 INFO L273 TraceCheckUtils]: 325: Hoare triple {443787#false} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {443787#false} is VALID [2018-11-19 18:43:30,230 INFO L273 TraceCheckUtils]: 326: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,230 INFO L268 TraceCheckUtils]: 327: Hoare quadruple {443787#false} {443787#false} #3095#return; {443787#false} is VALID [2018-11-19 18:43:30,230 INFO L273 TraceCheckUtils]: 328: Hoare triple {443787#false} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {443787#false} is VALID [2018-11-19 18:43:30,230 INFO L256 TraceCheckUtils]: 329: Hoare triple {443787#false} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {443787#false} is VALID [2018-11-19 18:43:30,230 INFO L273 TraceCheckUtils]: 330: Hoare triple {443787#false} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {443787#false} is VALID [2018-11-19 18:43:30,230 INFO L256 TraceCheckUtils]: 331: Hoare triple {443787#false} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {443787#false} is VALID [2018-11-19 18:43:30,230 INFO L273 TraceCheckUtils]: 332: Hoare triple {443787#false} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {443787#false} is VALID [2018-11-19 18:43:30,231 INFO L256 TraceCheckUtils]: 333: Hoare triple {443787#false} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {443787#false} is VALID [2018-11-19 18:43:30,231 INFO L273 TraceCheckUtils]: 334: Hoare triple {443787#false} ~size := #in~size;~t := #in~t; {443787#false} is VALID [2018-11-19 18:43:30,231 INFO L256 TraceCheckUtils]: 335: Hoare triple {443787#false} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {443787#false} is VALID [2018-11-19 18:43:30,231 INFO L273 TraceCheckUtils]: 336: Hoare triple {443787#false} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {443787#false} is VALID [2018-11-19 18:43:30,231 INFO L273 TraceCheckUtils]: 337: Hoare triple {443787#false} assume !(0 != ~tmp___0~2);call #t~malloc130.base, #t~malloc130.offset := #Ultimate.alloc(~size);~tmp~8.base, ~tmp~8.offset := #t~malloc130.base, #t~malloc130.offset;~p~0.base, ~p~0.offset := ~tmp~8.base, ~tmp~8.offset;assume 0 != (if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~0.base, ~p~0.offset; {443787#false} is VALID [2018-11-19 18:43:30,231 INFO L273 TraceCheckUtils]: 338: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,231 INFO L268 TraceCheckUtils]: 339: Hoare quadruple {443787#false} {443787#false} #2691#return; {443787#false} is VALID [2018-11-19 18:43:30,231 INFO L273 TraceCheckUtils]: 340: Hoare triple {443787#false} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {443787#false} is VALID [2018-11-19 18:43:30,231 INFO L273 TraceCheckUtils]: 341: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,231 INFO L268 TraceCheckUtils]: 342: Hoare quadruple {443787#false} {443787#false} #2781#return; {443787#false} is VALID [2018-11-19 18:43:30,232 INFO L273 TraceCheckUtils]: 343: Hoare triple {443787#false} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {443787#false} is VALID [2018-11-19 18:43:30,232 INFO L273 TraceCheckUtils]: 344: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,232 INFO L268 TraceCheckUtils]: 345: Hoare quadruple {443787#false} {443787#false} #2779#return; {443787#false} is VALID [2018-11-19 18:43:30,232 INFO L273 TraceCheckUtils]: 346: Hoare triple {443787#false} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {443787#false} is VALID [2018-11-19 18:43:30,232 INFO L273 TraceCheckUtils]: 347: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,232 INFO L268 TraceCheckUtils]: 348: Hoare quadruple {443787#false} {443787#false} #3097#return; {443787#false} is VALID [2018-11-19 18:43:30,232 INFO L273 TraceCheckUtils]: 349: Hoare triple {443787#false} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {443787#false} is VALID [2018-11-19 18:43:30,232 INFO L273 TraceCheckUtils]: 350: Hoare triple {443787#false} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {443787#false} is VALID [2018-11-19 18:43:30,232 INFO L256 TraceCheckUtils]: 351: Hoare triple {443787#false} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {443787#false} is VALID [2018-11-19 18:43:30,232 INFO L273 TraceCheckUtils]: 352: Hoare triple {443787#false} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {443787#false} is VALID [2018-11-19 18:43:30,233 INFO L273 TraceCheckUtils]: 353: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,233 INFO L268 TraceCheckUtils]: 354: Hoare quadruple {443787#false} {443787#false} #3099#return; {443787#false} is VALID [2018-11-19 18:43:30,233 INFO L256 TraceCheckUtils]: 355: Hoare triple {443787#false} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {443787#false} is VALID [2018-11-19 18:43:30,233 INFO L273 TraceCheckUtils]: 356: Hoare triple {443787#false} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {443787#false} is VALID [2018-11-19 18:43:30,233 INFO L273 TraceCheckUtils]: 357: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,233 INFO L268 TraceCheckUtils]: 358: Hoare quadruple {443787#false} {443787#false} #3101#return; {443787#false} is VALID [2018-11-19 18:43:30,233 INFO L256 TraceCheckUtils]: 359: Hoare triple {443787#false} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {443787#false} is VALID [2018-11-19 18:43:30,233 INFO L273 TraceCheckUtils]: 360: Hoare triple {443787#false} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {443787#false} is VALID [2018-11-19 18:43:30,233 INFO L256 TraceCheckUtils]: 361: Hoare triple {443787#false} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {443787#false} is VALID [2018-11-19 18:43:30,233 INFO L273 TraceCheckUtils]: 362: Hoare triple {443787#false} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {443787#false} is VALID [2018-11-19 18:43:30,234 INFO L273 TraceCheckUtils]: 363: Hoare triple {443787#false} assume !(0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616); {443787#false} is VALID [2018-11-19 18:43:30,234 INFO L273 TraceCheckUtils]: 364: Hoare triple {443787#false} assume !(0 == ~buflen~0 % 4294967296 % 18446744073709551616); {443787#false} is VALID [2018-11-19 18:43:30,234 INFO L273 TraceCheckUtils]: 365: Hoare triple {443787#false} assume 0 != ~buflen~0 % 4294967296 % 18446744073709551616; {443787#false} is VALID [2018-11-19 18:43:30,234 INFO L273 TraceCheckUtils]: 366: Hoare triple {443787#false} ~union_desc~0.base, ~union_desc~0.offset := ~buf~0.base, ~buf~0.offset;call #t~mem642 := read~int(~union_desc~0.base, 1 + ~union_desc~0.offset, 1);#t~short644 := 36 == #t~mem642 % 256 % 4294967296; {443787#false} is VALID [2018-11-19 18:43:30,234 INFO L273 TraceCheckUtils]: 367: Hoare triple {443787#false} assume #t~short644;call #t~mem643 := read~int(~union_desc~0.base, 2 + ~union_desc~0.offset, 1);#t~short644 := 6 == #t~mem643 % 256 % 4294967296; {443787#false} is VALID [2018-11-19 18:43:30,234 INFO L273 TraceCheckUtils]: 368: Hoare triple {443787#false} assume #t~short644;havoc #t~mem643;havoc #t~mem642;havoc #t~short644;call write~$Pointer$(#t~string645.base, #t~string645.offset, ~#descriptor~3.base, ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string646.base, #t~string646.offset, ~#descriptor~3.base, 8 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string647.base, #t~string647.offset, ~#descriptor~3.base, 16 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string648.base, #t~string648.offset, ~#descriptor~3.base, 24 + ~#descriptor~3.offset, 8);call write~int(1479, ~#descriptor~3.base, 32 + ~#descriptor~3.offset, 4);call write~int(0, ~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1);call #t~mem649 := read~int(~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1); {443787#false} is VALID [2018-11-19 18:43:30,234 INFO L256 TraceCheckUtils]: 369: Hoare triple {443787#false} call #t~ret650 := ldv__builtin_expect(~bitwiseAnd(#t~mem649 % 256, 1), 0); {443787#false} is VALID [2018-11-19 18:43:30,234 INFO L273 TraceCheckUtils]: 370: Hoare triple {443787#false} ~exp := #in~exp;~c := #in~c;#res := ~exp; {443787#false} is VALID [2018-11-19 18:43:30,234 INFO L273 TraceCheckUtils]: 371: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,235 INFO L268 TraceCheckUtils]: 372: Hoare quadruple {443787#false} {443787#false} #3075#return; {443787#false} is VALID [2018-11-19 18:43:30,235 INFO L273 TraceCheckUtils]: 373: Hoare triple {443787#false} assume -9223372036854775808 <= #t~ret650 && #t~ret650 <= 9223372036854775807;~tmp~36 := #t~ret650;havoc #t~ret650;havoc #t~mem649; {443787#false} is VALID [2018-11-19 18:43:30,235 INFO L273 TraceCheckUtils]: 374: Hoare triple {443787#false} assume !(0 != ~tmp~36); {443787#false} is VALID [2018-11-19 18:43:30,235 INFO L273 TraceCheckUtils]: 375: Hoare triple {443787#false} #res.base, #res.offset := ~union_desc~0.base, ~union_desc~0.offset;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {443787#false} is VALID [2018-11-19 18:43:30,235 INFO L273 TraceCheckUtils]: 376: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,235 INFO L268 TraceCheckUtils]: 377: Hoare quadruple {443787#false} {443787#false} #3137#return; {443787#false} is VALID [2018-11-19 18:43:30,235 INFO L273 TraceCheckUtils]: 378: Hoare triple {443787#false} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {443787#false} is VALID [2018-11-19 18:43:30,235 INFO L273 TraceCheckUtils]: 379: Hoare triple {443787#false} assume !(0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616);call #t~mem658.base, #t~mem658.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem659 := read~int(~union_desc~1.base, 3 + ~union_desc~1.offset, 1);call #t~ret660.base, #t~ret660.offset := usb_ifnum_to_if(#t~mem658.base, #t~mem658.offset, #t~mem659 % 256);call write~$Pointer$(#t~ret660.base, #t~ret660.offset, ~pcu.base, 79 + ~pcu.offset, 8);havoc #t~mem659;havoc #t~ret660.base, #t~ret660.offset;havoc #t~mem658.base, #t~mem658.offset;call #t~mem661.base, #t~mem661.offset := read~$Pointer$(~pcu.base, 79 + ~pcu.offset, 8);call #t~mem662.base, #t~mem662.offset := read~$Pointer$(#t~mem661.base, 8 + #t~mem661.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem662.base, #t~mem662.offset;havoc #t~mem662.base, #t~mem662.offset;havoc #t~mem661.base, #t~mem661.offset;call #t~mem663.base, #t~mem663.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem663.base, #t~mem663.offset, ~pcu.base, 87 + ~pcu.offset, 8);havoc #t~mem663.base, #t~mem663.offset;call #t~mem664.base, #t~mem664.offset := read~$Pointer$(~pcu.base, 87 + ~pcu.offset, 8); {443787#false} is VALID [2018-11-19 18:43:30,235 INFO L256 TraceCheckUtils]: 380: Hoare triple {443787#false} call #t~ret665 := usb_endpoint_maxp(#t~mem664.base, #t~mem664.offset); {443787#false} is VALID [2018-11-19 18:43:30,235 INFO L273 TraceCheckUtils]: 381: Hoare triple {443787#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {443787#false} is VALID [2018-11-19 18:43:30,236 INFO L273 TraceCheckUtils]: 382: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,236 INFO L268 TraceCheckUtils]: 383: Hoare quadruple {443787#false} {443787#false} #3139#return; {443787#false} is VALID [2018-11-19 18:43:30,236 INFO L273 TraceCheckUtils]: 384: Hoare triple {443787#false} assume -2147483648 <= #t~ret665 && #t~ret665 <= 2147483647;~tmp~37 := #t~ret665;havoc #t~ret665;havoc #t~mem664.base, #t~mem664.offset;call write~int(~tmp~37, ~pcu.base, 119 + ~pcu.offset, 4);call #t~mem666.base, #t~mem666.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem667 := read~int(~union_desc~1.base, 4 + ~union_desc~1.offset, 1);call #t~ret668.base, #t~ret668.offset := usb_ifnum_to_if(#t~mem666.base, #t~mem666.offset, #t~mem667 % 256);call write~$Pointer$(#t~ret668.base, #t~ret668.offset, ~pcu.base, 123 + ~pcu.offset, 8);havoc #t~mem666.base, #t~mem666.offset;havoc #t~mem667;havoc #t~ret668.base, #t~ret668.offset;call #t~mem669.base, #t~mem669.offset := read~$Pointer$(~pcu.base, 123 + ~pcu.offset, 8);call #t~mem670.base, #t~mem670.offset := read~$Pointer$(#t~mem669.base, 8 + #t~mem669.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem670.base, #t~mem670.offset;havoc #t~mem670.base, #t~mem670.offset;havoc #t~mem669.base, #t~mem669.offset;call #t~mem671 := read~int(~alt~0.base, 4 + ~alt~0.offset, 1); {443787#false} is VALID [2018-11-19 18:43:30,236 INFO L273 TraceCheckUtils]: 385: Hoare triple {443787#false} assume !(2 != #t~mem671 % 256 % 4294967296);havoc #t~mem671;call #t~mem676.base, #t~mem676.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem676.base, #t~mem676.offset, ~pcu.base, 167 + ~pcu.offset, 8);havoc #t~mem676.base, #t~mem676.offset;call #t~mem677.base, #t~mem677.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {443787#false} is VALID [2018-11-19 18:43:30,236 INFO L256 TraceCheckUtils]: 386: Hoare triple {443787#false} call #t~ret678 := usb_endpoint_is_bulk_out(#t~mem677.base, #t~mem677.offset); {443787#false} is VALID [2018-11-19 18:43:30,236 INFO L273 TraceCheckUtils]: 387: Hoare triple {443787#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~4;havoc ~tmp___0~1;havoc ~tmp___1~1; {443787#false} is VALID [2018-11-19 18:43:30,236 INFO L256 TraceCheckUtils]: 388: Hoare triple {443787#false} call #t~ret25 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {443787#false} is VALID [2018-11-19 18:43:30,236 INFO L273 TraceCheckUtils]: 389: Hoare triple {443787#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {443787#false} is VALID [2018-11-19 18:43:30,236 INFO L273 TraceCheckUtils]: 390: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,237 INFO L268 TraceCheckUtils]: 391: Hoare quadruple {443787#false} {443787#false} #2887#return; {443787#false} is VALID [2018-11-19 18:43:30,237 INFO L273 TraceCheckUtils]: 392: Hoare triple {443787#false} assume -2147483648 <= #t~ret25 && #t~ret25 <= 2147483647;~tmp~4 := #t~ret25;havoc #t~ret25; {443787#false} is VALID [2018-11-19 18:43:30,237 INFO L273 TraceCheckUtils]: 393: Hoare triple {443787#false} assume 0 != ~tmp~4; {443787#false} is VALID [2018-11-19 18:43:30,237 INFO L256 TraceCheckUtils]: 394: Hoare triple {443787#false} call #t~ret26 := usb_endpoint_dir_out(~epd.base, ~epd.offset); {443787#false} is VALID [2018-11-19 18:43:30,237 INFO L273 TraceCheckUtils]: 395: Hoare triple {443787#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem21 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem21 % 256 % 256 <= 127 then #t~mem21 % 256 % 256 else #t~mem21 % 256 % 256 - 256) >= 0 then 1 else 0);havoc #t~mem21; {443787#false} is VALID [2018-11-19 18:43:30,237 INFO L273 TraceCheckUtils]: 396: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,237 INFO L268 TraceCheckUtils]: 397: Hoare quadruple {443787#false} {443787#false} #2889#return; {443787#false} is VALID [2018-11-19 18:43:30,237 INFO L273 TraceCheckUtils]: 398: Hoare triple {443787#false} assume -2147483648 <= #t~ret26 && #t~ret26 <= 2147483647;~tmp___0~1 := #t~ret26;havoc #t~ret26; {443787#false} is VALID [2018-11-19 18:43:30,237 INFO L273 TraceCheckUtils]: 399: Hoare triple {443787#false} assume 0 != ~tmp___0~1;~tmp___1~1 := 1; {443787#false} is VALID [2018-11-19 18:43:30,237 INFO L273 TraceCheckUtils]: 400: Hoare triple {443787#false} #res := ~tmp___1~1; {443787#false} is VALID [2018-11-19 18:43:30,238 INFO L273 TraceCheckUtils]: 401: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,238 INFO L268 TraceCheckUtils]: 402: Hoare quadruple {443787#false} {443787#false} #3141#return; {443787#false} is VALID [2018-11-19 18:43:30,238 INFO L273 TraceCheckUtils]: 403: Hoare triple {443787#false} assume -2147483648 <= #t~ret678 && #t~ret678 <= 2147483647;~tmp___0~16 := #t~ret678;havoc #t~mem677.base, #t~mem677.offset;havoc #t~ret678; {443787#false} is VALID [2018-11-19 18:43:30,238 INFO L273 TraceCheckUtils]: 404: Hoare triple {443787#false} assume !(0 == ~tmp___0~16);call #t~mem682.base, #t~mem682.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {443787#false} is VALID [2018-11-19 18:43:30,238 INFO L256 TraceCheckUtils]: 405: Hoare triple {443787#false} call #t~ret683 := usb_endpoint_maxp(#t~mem682.base, #t~mem682.offset); {443787#false} is VALID [2018-11-19 18:43:30,238 INFO L273 TraceCheckUtils]: 406: Hoare triple {443787#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {443787#false} is VALID [2018-11-19 18:43:30,238 INFO L273 TraceCheckUtils]: 407: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,238 INFO L268 TraceCheckUtils]: 408: Hoare quadruple {443787#false} {443787#false} #3143#return; {443787#false} is VALID [2018-11-19 18:43:30,238 INFO L273 TraceCheckUtils]: 409: Hoare triple {443787#false} assume -2147483648 <= #t~ret683 && #t~ret683 <= 2147483647;~tmp___1~7 := #t~ret683;havoc #t~mem682.base, #t~mem682.offset;havoc #t~ret683;call write~int(~tmp___1~7, ~pcu.base, 183 + ~pcu.offset, 4);call #t~mem684 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {443787#false} is VALID [2018-11-19 18:43:30,238 INFO L273 TraceCheckUtils]: 410: Hoare triple {443787#false} assume !(#t~mem684 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem684;call #t~mem689.base, #t~mem689.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem689.base, 63 + #t~mem689.offset, ~pcu.base, 131 + ~pcu.offset, 8);havoc #t~mem689.base, #t~mem689.offset;call #t~mem690.base, #t~mem690.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {443787#false} is VALID [2018-11-19 18:43:30,239 INFO L256 TraceCheckUtils]: 411: Hoare triple {443787#false} call #t~ret691 := usb_endpoint_is_bulk_in(#t~mem690.base, #t~mem690.offset); {443787#false} is VALID [2018-11-19 18:43:30,239 INFO L273 TraceCheckUtils]: 412: Hoare triple {443787#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~3;havoc ~tmp___0~0;havoc ~tmp___1~0; {443787#false} is VALID [2018-11-19 18:43:30,239 INFO L256 TraceCheckUtils]: 413: Hoare triple {443787#false} call #t~ret23 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {443787#false} is VALID [2018-11-19 18:43:30,239 INFO L273 TraceCheckUtils]: 414: Hoare triple {443787#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {443787#false} is VALID [2018-11-19 18:43:30,239 INFO L273 TraceCheckUtils]: 415: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,239 INFO L268 TraceCheckUtils]: 416: Hoare quadruple {443787#false} {443787#false} #2915#return; {443787#false} is VALID [2018-11-19 18:43:30,239 INFO L273 TraceCheckUtils]: 417: Hoare triple {443787#false} assume -2147483648 <= #t~ret23 && #t~ret23 <= 2147483647;~tmp~3 := #t~ret23;havoc #t~ret23; {443787#false} is VALID [2018-11-19 18:43:30,239 INFO L273 TraceCheckUtils]: 418: Hoare triple {443787#false} assume 0 != ~tmp~3; {443787#false} is VALID [2018-11-19 18:43:30,239 INFO L256 TraceCheckUtils]: 419: Hoare triple {443787#false} call #t~ret24 := usb_endpoint_dir_in(~epd.base, ~epd.offset); {443787#false} is VALID [2018-11-19 18:43:30,239 INFO L273 TraceCheckUtils]: 420: Hoare triple {443787#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem20 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem20 % 256 % 256 <= 127 then #t~mem20 % 256 % 256 else #t~mem20 % 256 % 256 - 256) < 0 then 1 else 0);havoc #t~mem20; {443787#false} is VALID [2018-11-19 18:43:30,240 INFO L273 TraceCheckUtils]: 421: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,240 INFO L268 TraceCheckUtils]: 422: Hoare quadruple {443787#false} {443787#false} #2917#return; {443787#false} is VALID [2018-11-19 18:43:30,240 INFO L273 TraceCheckUtils]: 423: Hoare triple {443787#false} assume -2147483648 <= #t~ret24 && #t~ret24 <= 2147483647;~tmp___0~0 := #t~ret24;havoc #t~ret24; {443787#false} is VALID [2018-11-19 18:43:30,240 INFO L273 TraceCheckUtils]: 424: Hoare triple {443787#false} assume 0 != ~tmp___0~0;~tmp___1~0 := 1; {443787#false} is VALID [2018-11-19 18:43:30,240 INFO L273 TraceCheckUtils]: 425: Hoare triple {443787#false} #res := ~tmp___1~0; {443787#false} is VALID [2018-11-19 18:43:30,240 INFO L273 TraceCheckUtils]: 426: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,240 INFO L268 TraceCheckUtils]: 427: Hoare quadruple {443787#false} {443787#false} #3145#return; {443787#false} is VALID [2018-11-19 18:43:30,240 INFO L273 TraceCheckUtils]: 428: Hoare triple {443787#false} assume -2147483648 <= #t~ret691 && #t~ret691 <= 2147483647;~tmp___2~3 := #t~ret691;havoc #t~ret691;havoc #t~mem690.base, #t~mem690.offset; {443787#false} is VALID [2018-11-19 18:43:30,240 INFO L273 TraceCheckUtils]: 429: Hoare triple {443787#false} assume !(0 == ~tmp___2~3);call #t~mem695.base, #t~mem695.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {443787#false} is VALID [2018-11-19 18:43:30,240 INFO L256 TraceCheckUtils]: 430: Hoare triple {443787#false} call #t~ret696 := usb_endpoint_maxp(#t~mem695.base, #t~mem695.offset); {443787#false} is VALID [2018-11-19 18:43:30,241 INFO L273 TraceCheckUtils]: 431: Hoare triple {443787#false} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {443787#false} is VALID [2018-11-19 18:43:30,241 INFO L273 TraceCheckUtils]: 432: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,241 INFO L268 TraceCheckUtils]: 433: Hoare quadruple {443787#false} {443787#false} #3147#return; {443787#false} is VALID [2018-11-19 18:43:30,241 INFO L273 TraceCheckUtils]: 434: Hoare triple {443787#false} assume -2147483648 <= #t~ret696 && #t~ret696 <= 2147483647;~tmp___3~2 := #t~ret696;havoc #t~ret696;havoc #t~mem695.base, #t~mem695.offset;call write~int(~tmp___3~2, ~pcu.base, 163 + ~pcu.offset, 4);call #t~mem697 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {443787#false} is VALID [2018-11-19 18:43:30,241 INFO L273 TraceCheckUtils]: 435: Hoare triple {443787#false} assume !(#t~mem697 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem697;#res := 0; {443787#false} is VALID [2018-11-19 18:43:30,241 INFO L273 TraceCheckUtils]: 436: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,241 INFO L268 TraceCheckUtils]: 437: Hoare quadruple {443787#false} {443787#false} #3103#return; {443787#false} is VALID [2018-11-19 18:43:30,241 INFO L273 TraceCheckUtils]: 438: Hoare triple {443787#false} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {443787#false} is VALID [2018-11-19 18:43:30,241 INFO L273 TraceCheckUtils]: 439: Hoare triple {443787#false} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {443787#false} is VALID [2018-11-19 18:43:30,241 INFO L273 TraceCheckUtils]: 440: Hoare triple {443787#false} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {443787#false} is VALID [2018-11-19 18:43:30,242 INFO L256 TraceCheckUtils]: 441: Hoare triple {443787#false} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {443787#false} is VALID [2018-11-19 18:43:30,242 INFO L273 TraceCheckUtils]: 442: Hoare triple {443787#false} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {443787#false} is VALID [2018-11-19 18:43:30,242 INFO L256 TraceCheckUtils]: 443: Hoare triple {443787#false} call ldv_usb_set_intfdata(~data.base, ~data.offset); {443787#false} is VALID [2018-11-19 18:43:30,242 INFO L273 TraceCheckUtils]: 444: Hoare triple {443787#false} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {443787#false} is VALID [2018-11-19 18:43:30,242 INFO L273 TraceCheckUtils]: 445: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,242 INFO L268 TraceCheckUtils]: 446: Hoare quadruple {443787#false} {443787#false} #2541#return; {443787#false} is VALID [2018-11-19 18:43:30,242 INFO L273 TraceCheckUtils]: 447: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,242 INFO L268 TraceCheckUtils]: 448: Hoare quadruple {443787#false} {443787#false} #3105#return; {443787#false} is VALID [2018-11-19 18:43:30,242 INFO L273 TraceCheckUtils]: 449: Hoare triple {443787#false} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {443787#false} is VALID [2018-11-19 18:43:30,242 INFO L256 TraceCheckUtils]: 450: Hoare triple {443787#false} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {443787#false} is VALID [2018-11-19 18:43:30,243 INFO L273 TraceCheckUtils]: 451: Hoare triple {443787#false} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {443787#false} is VALID [2018-11-19 18:43:30,243 INFO L256 TraceCheckUtils]: 452: Hoare triple {443787#false} call ldv_usb_set_intfdata(~data.base, ~data.offset); {443787#false} is VALID [2018-11-19 18:43:30,243 INFO L273 TraceCheckUtils]: 453: Hoare triple {443787#false} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {443787#false} is VALID [2018-11-19 18:43:30,243 INFO L273 TraceCheckUtils]: 454: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,243 INFO L268 TraceCheckUtils]: 455: Hoare quadruple {443787#false} {443787#false} #2541#return; {443787#false} is VALID [2018-11-19 18:43:30,243 INFO L273 TraceCheckUtils]: 456: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,243 INFO L268 TraceCheckUtils]: 457: Hoare quadruple {443787#false} {443787#false} #3107#return; {443787#false} is VALID [2018-11-19 18:43:30,243 INFO L273 TraceCheckUtils]: 458: Hoare triple {443787#false} havoc #t~mem837.base, #t~mem837.offset; {443787#false} is VALID [2018-11-19 18:43:30,243 INFO L256 TraceCheckUtils]: 459: Hoare triple {443787#false} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {443787#false} is VALID [2018-11-19 18:43:30,243 INFO L273 TraceCheckUtils]: 460: Hoare triple {443787#false} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {443787#false} is VALID [2018-11-19 18:43:30,244 INFO L273 TraceCheckUtils]: 461: Hoare triple {443787#false} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {443787#false} is VALID [2018-11-19 18:43:30,244 INFO L256 TraceCheckUtils]: 462: Hoare triple {443787#false} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {443787#false} is VALID [2018-11-19 18:43:30,244 INFO L273 TraceCheckUtils]: 463: Hoare triple {443787#false} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {443787#false} is VALID [2018-11-19 18:43:30,244 INFO L256 TraceCheckUtils]: 464: Hoare triple {443787#false} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {443787#false} is VALID [2018-11-19 18:43:30,244 INFO L273 TraceCheckUtils]: 465: Hoare triple {443787#false} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {443787#false} is VALID [2018-11-19 18:43:30,244 INFO L256 TraceCheckUtils]: 466: Hoare triple {443787#false} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {443787#false} is VALID [2018-11-19 18:43:30,244 INFO L273 TraceCheckUtils]: 467: Hoare triple {443787#false} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {443787#false} is VALID [2018-11-19 18:43:30,244 INFO L273 TraceCheckUtils]: 468: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,244 INFO L268 TraceCheckUtils]: 469: Hoare quadruple {443787#false} {443787#false} #2605#return; {443787#false} is VALID [2018-11-19 18:43:30,245 INFO L273 TraceCheckUtils]: 470: Hoare triple {443787#false} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {443787#false} is VALID [2018-11-19 18:43:30,245 INFO L256 TraceCheckUtils]: 471: Hoare triple {443787#false} call #t~ret965 := ldv_undef_int(); {443787#false} is VALID [2018-11-19 18:43:30,245 INFO L273 TraceCheckUtils]: 472: Hoare triple {443787#false} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {443787#false} is VALID [2018-11-19 18:43:30,245 INFO L273 TraceCheckUtils]: 473: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,245 INFO L268 TraceCheckUtils]: 474: Hoare quadruple {443787#false} {443787#false} #2607#return; {443787#false} is VALID [2018-11-19 18:43:30,245 INFO L273 TraceCheckUtils]: 475: Hoare triple {443787#false} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {443787#false} is VALID [2018-11-19 18:43:30,245 INFO L273 TraceCheckUtils]: 476: Hoare triple {443787#false} assume 0 != ~tmp___0~26; {443787#false} is VALID [2018-11-19 18:43:30,245 INFO L273 TraceCheckUtils]: 477: Hoare triple {443787#false} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {443787#false} is VALID [2018-11-19 18:43:30,245 INFO L273 TraceCheckUtils]: 478: Hoare triple {443787#false} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {443787#false} is VALID [2018-11-19 18:43:30,246 INFO L273 TraceCheckUtils]: 479: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,246 INFO L268 TraceCheckUtils]: 480: Hoare quadruple {443787#false} {443787#false} #3135#return; {443787#false} is VALID [2018-11-19 18:43:30,246 INFO L273 TraceCheckUtils]: 481: Hoare triple {443787#false} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {443787#false} is VALID [2018-11-19 18:43:30,246 INFO L273 TraceCheckUtils]: 482: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,246 INFO L268 TraceCheckUtils]: 483: Hoare quadruple {443787#false} {443787#false} #2709#return; {443787#false} is VALID [2018-11-19 18:43:30,246 INFO L273 TraceCheckUtils]: 484: Hoare triple {443787#false} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {443787#false} is VALID [2018-11-19 18:43:30,246 INFO L273 TraceCheckUtils]: 485: Hoare triple {443787#false} assume 0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616;havoc #t~mem561.base, #t~mem561.offset;havoc #t~nondet562;call #t~mem563.base, #t~mem563.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem563.base, #t~mem563.offset;~error~18 := -12; {443787#false} is VALID [2018-11-19 18:43:30,246 INFO L273 TraceCheckUtils]: 486: Hoare triple {443787#false} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {443787#false} is VALID [2018-11-19 18:43:30,246 INFO L273 TraceCheckUtils]: 487: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,247 INFO L268 TraceCheckUtils]: 488: Hoare quadruple {443787#false} {443787#false} #3109#return; {443787#false} is VALID [2018-11-19 18:43:30,247 INFO L273 TraceCheckUtils]: 489: Hoare triple {443787#false} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {443787#false} is VALID [2018-11-19 18:43:30,247 INFO L273 TraceCheckUtils]: 490: Hoare triple {443787#false} assume 0 != ~error~25; {443787#false} is VALID [2018-11-19 18:43:30,247 INFO L273 TraceCheckUtils]: 491: Hoare triple {443787#false} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {443787#false} is VALID [2018-11-19 18:43:30,247 INFO L273 TraceCheckUtils]: 492: Hoare triple {443787#false} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {443787#false} is VALID [2018-11-19 18:43:30,247 INFO L273 TraceCheckUtils]: 493: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,247 INFO L268 TraceCheckUtils]: 494: Hoare quadruple {443787#false} {443787#false} #3015#return; {443787#false} is VALID [2018-11-19 18:43:30,247 INFO L273 TraceCheckUtils]: 495: Hoare triple {443787#false} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {443787#false} is VALID [2018-11-19 18:43:30,247 INFO L273 TraceCheckUtils]: 496: Hoare triple {443787#false} assume !(0 == ~ldv_retval_3~0); {443787#false} is VALID [2018-11-19 18:43:30,248 INFO L273 TraceCheckUtils]: 497: Hoare triple {443787#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,248 INFO L273 TraceCheckUtils]: 498: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,248 INFO L273 TraceCheckUtils]: 499: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,248 INFO L273 TraceCheckUtils]: 500: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,248 INFO L273 TraceCheckUtils]: 501: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,248 INFO L273 TraceCheckUtils]: 502: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,248 INFO L273 TraceCheckUtils]: 503: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,248 INFO L273 TraceCheckUtils]: 504: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,248 INFO L273 TraceCheckUtils]: 505: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,249 INFO L273 TraceCheckUtils]: 506: Hoare triple {443787#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {443787#false} is VALID [2018-11-19 18:43:30,249 INFO L273 TraceCheckUtils]: 507: Hoare triple {443787#false} assume #t~switch909; {443787#false} is VALID [2018-11-19 18:43:30,249 INFO L273 TraceCheckUtils]: 508: Hoare triple {443787#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {443787#false} is VALID [2018-11-19 18:43:30,249 INFO L273 TraceCheckUtils]: 509: Hoare triple {443787#false} assume #t~switch947; {443787#false} is VALID [2018-11-19 18:43:30,249 INFO L273 TraceCheckUtils]: 510: Hoare triple {443787#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {443787#false} is VALID [2018-11-19 18:43:30,249 INFO L256 TraceCheckUtils]: 511: Hoare triple {443787#false} call ims_pcu_driver_exit(); {443787#false} is VALID [2018-11-19 18:43:30,249 INFO L256 TraceCheckUtils]: 512: Hoare triple {443787#false} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {443787#false} is VALID [2018-11-19 18:43:30,249 INFO L273 TraceCheckUtils]: 513: Hoare triple {443787#false} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {443787#false} is VALID [2018-11-19 18:43:30,249 INFO L273 TraceCheckUtils]: 514: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,250 INFO L268 TraceCheckUtils]: 515: Hoare quadruple {443787#false} {443787#false} #2597#return; {443787#false} is VALID [2018-11-19 18:43:30,250 INFO L273 TraceCheckUtils]: 516: Hoare triple {443787#false} assume true; {443787#false} is VALID [2018-11-19 18:43:30,250 INFO L268 TraceCheckUtils]: 517: Hoare quadruple {443787#false} {443787#false} #3033#return; {443787#false} is VALID [2018-11-19 18:43:30,250 INFO L273 TraceCheckUtils]: 518: Hoare triple {443787#false} ~ldv_state_variable_0~0 := 2; {443787#false} is VALID [2018-11-19 18:43:30,250 INFO L256 TraceCheckUtils]: 519: Hoare triple {443787#false} call ldv_check_final_state(); {443787#false} is VALID [2018-11-19 18:43:30,250 INFO L273 TraceCheckUtils]: 520: Hoare triple {443787#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {443787#false} is VALID [2018-11-19 18:43:30,250 INFO L256 TraceCheckUtils]: 521: Hoare triple {443787#false} call ldv_error(); {443787#false} is VALID [2018-11-19 18:43:30,250 INFO L273 TraceCheckUtils]: 522: Hoare triple {443787#false} assume !false; {443787#false} is VALID [2018-11-19 18:43:30,336 INFO L134 CoverageAnalysis]: Checked inductivity of 2726 backedges. 1248 proven. 6 refuted. 0 times theorem prover too weak. 1472 trivial. 0 not checked. [2018-11-19 18:43:30,378 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-19 18:43:30,379 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-19 18:43:30,380 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 523 [2018-11-19 18:43:30,453 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:43:30,453 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-19 18:43:31,088 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 642 edges. 642 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:43:31,088 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-19 18:43:31,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-19 18:43:31,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=79, Unknown=0, NotChecked=0, Total=132 [2018-11-19 18:43:31,089 INFO L87 Difference]: Start difference. First operand 7315 states and 9873 transitions. Second operand 12 states. [2018-11-19 18:44:10,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:44:10,937 INFO L93 Difference]: Finished difference Result 14681 states and 19838 transitions. [2018-11-19 18:44:10,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-19 18:44:10,937 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 523 [2018-11-19 18:44:10,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:44:10,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-19 18:44:11,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 3289 transitions. [2018-11-19 18:44:11,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-19 18:44:11,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 3289 transitions. [2018-11-19 18:44:11,068 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 15 states and 3289 transitions. [2018-11-19 18:44:13,841 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3289 edges. 3289 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:44:16,577 INFO L225 Difference]: With dead ends: 14681 [2018-11-19 18:44:16,577 INFO L226 Difference]: Without dead ends: 7422 [2018-11-19 18:44:16,586 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 537 GetRequests, 519 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=149, Invalid=231, Unknown=0, NotChecked=0, Total=380 [2018-11-19 18:44:16,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7422 states. [2018-11-19 18:44:30,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7422 to 7320. [2018-11-19 18:44:30,553 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:44:30,553 INFO L82 GeneralOperation]: Start isEquivalent. First operand 7422 states. Second operand 7320 states. [2018-11-19 18:44:30,553 INFO L74 IsIncluded]: Start isIncluded. First operand 7422 states. Second operand 7320 states. [2018-11-19 18:44:30,554 INFO L87 Difference]: Start difference. First operand 7422 states. Second operand 7320 states. [2018-11-19 18:44:32,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:44:32,721 INFO L93 Difference]: Finished difference Result 7422 states and 10013 transitions. [2018-11-19 18:44:32,721 INFO L276 IsEmpty]: Start isEmpty. Operand 7422 states and 10013 transitions. [2018-11-19 18:44:32,735 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:44:32,735 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:44:32,735 INFO L74 IsIncluded]: Start isIncluded. First operand 7320 states. Second operand 7422 states. [2018-11-19 18:44:32,735 INFO L87 Difference]: Start difference. First operand 7320 states. Second operand 7422 states. [2018-11-19 18:44:34,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:44:34,904 INFO L93 Difference]: Finished difference Result 7422 states and 10013 transitions. [2018-11-19 18:44:34,905 INFO L276 IsEmpty]: Start isEmpty. Operand 7422 states and 10013 transitions. [2018-11-19 18:44:34,915 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:44:34,916 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:44:34,916 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:44:34,916 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:44:34,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7320 states. [2018-11-19 18:44:37,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7320 states to 7320 states and 9879 transitions. [2018-11-19 18:44:37,440 INFO L78 Accepts]: Start accepts. Automaton has 7320 states and 9879 transitions. Word has length 523 [2018-11-19 18:44:37,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:44:37,440 INFO L480 AbstractCegarLoop]: Abstraction has 7320 states and 9879 transitions. [2018-11-19 18:44:37,440 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-19 18:44:37,440 INFO L276 IsEmpty]: Start isEmpty. Operand 7320 states and 9879 transitions. [2018-11-19 18:44:37,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 525 [2018-11-19 18:44:37,450 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:44:37,451 INFO L384 BasicCegarLoop]: trace histogram [37, 37, 37, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:44:37,451 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:44:37,451 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:44:37,451 INFO L82 PathProgramCache]: Analyzing trace with hash 1083775933, now seen corresponding path program 3 times [2018-11-19 18:44:37,451 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:44:37,451 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:44:37,453 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:44:37,453 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-19 18:44:37,453 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:44:40,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:44:40,327 INFO L256 TraceCheckUtils]: 0: Hoare triple {489389#true} call ULTIMATE.init(); {489389#true} is VALID [2018-11-19 18:44:40,327 INFO L273 TraceCheckUtils]: 1: Hoare triple {489389#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,328 INFO L273 TraceCheckUtils]: 2: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,328 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {489389#true} {489389#true} #3175#return; {489389#true} is VALID [2018-11-19 18:44:40,328 INFO L256 TraceCheckUtils]: 4: Hoare triple {489389#true} call #t~ret973 := main(); {489389#true} is VALID [2018-11-19 18:44:40,328 INFO L273 TraceCheckUtils]: 5: Hoare triple {489389#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {489389#true} is VALID [2018-11-19 18:44:40,328 INFO L256 TraceCheckUtils]: 6: Hoare triple {489389#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {489389#true} is VALID [2018-11-19 18:44:40,328 INFO L273 TraceCheckUtils]: 7: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,329 INFO L273 TraceCheckUtils]: 8: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,329 INFO L273 TraceCheckUtils]: 9: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,329 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {489389#true} {489389#true} #2927#return; {489389#true} is VALID [2018-11-19 18:44:40,329 INFO L273 TraceCheckUtils]: 11: Hoare triple {489389#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {489389#true} is VALID [2018-11-19 18:44:40,329 INFO L256 TraceCheckUtils]: 12: Hoare triple {489389#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {489389#true} is VALID [2018-11-19 18:44:40,329 INFO L273 TraceCheckUtils]: 13: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,330 INFO L273 TraceCheckUtils]: 14: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,330 INFO L273 TraceCheckUtils]: 15: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,330 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {489389#true} {489389#true} #2929#return; {489389#true} is VALID [2018-11-19 18:44:40,330 INFO L273 TraceCheckUtils]: 17: Hoare triple {489389#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {489389#true} is VALID [2018-11-19 18:44:40,330 INFO L256 TraceCheckUtils]: 18: Hoare triple {489389#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {489389#true} is VALID [2018-11-19 18:44:40,330 INFO L273 TraceCheckUtils]: 19: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,330 INFO L273 TraceCheckUtils]: 20: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,330 INFO L273 TraceCheckUtils]: 21: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,331 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {489389#true} {489389#true} #2931#return; {489389#true} is VALID [2018-11-19 18:44:40,331 INFO L273 TraceCheckUtils]: 23: Hoare triple {489389#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {489389#true} is VALID [2018-11-19 18:44:40,331 INFO L256 TraceCheckUtils]: 24: Hoare triple {489389#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {489389#true} is VALID [2018-11-19 18:44:40,331 INFO L273 TraceCheckUtils]: 25: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,331 INFO L273 TraceCheckUtils]: 26: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,331 INFO L273 TraceCheckUtils]: 27: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,331 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {489389#true} {489389#true} #2933#return; {489389#true} is VALID [2018-11-19 18:44:40,331 INFO L273 TraceCheckUtils]: 29: Hoare triple {489389#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {489389#true} is VALID [2018-11-19 18:44:40,331 INFO L256 TraceCheckUtils]: 30: Hoare triple {489389#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {489389#true} is VALID [2018-11-19 18:44:40,331 INFO L273 TraceCheckUtils]: 31: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,332 INFO L273 TraceCheckUtils]: 32: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,332 INFO L273 TraceCheckUtils]: 33: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,332 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {489389#true} {489389#true} #2935#return; {489389#true} is VALID [2018-11-19 18:44:40,332 INFO L273 TraceCheckUtils]: 35: Hoare triple {489389#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {489389#true} is VALID [2018-11-19 18:44:40,332 INFO L256 TraceCheckUtils]: 36: Hoare triple {489389#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {489389#true} is VALID [2018-11-19 18:44:40,332 INFO L273 TraceCheckUtils]: 37: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,332 INFO L273 TraceCheckUtils]: 38: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,332 INFO L273 TraceCheckUtils]: 39: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,332 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {489389#true} {489389#true} #2937#return; {489389#true} is VALID [2018-11-19 18:44:40,332 INFO L273 TraceCheckUtils]: 41: Hoare triple {489389#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {489389#true} is VALID [2018-11-19 18:44:40,332 INFO L256 TraceCheckUtils]: 42: Hoare triple {489389#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {489389#true} is VALID [2018-11-19 18:44:40,333 INFO L273 TraceCheckUtils]: 43: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,333 INFO L273 TraceCheckUtils]: 44: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,333 INFO L273 TraceCheckUtils]: 45: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,333 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {489389#true} {489389#true} #2939#return; {489389#true} is VALID [2018-11-19 18:44:40,333 INFO L273 TraceCheckUtils]: 47: Hoare triple {489389#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {489389#true} is VALID [2018-11-19 18:44:40,333 INFO L256 TraceCheckUtils]: 48: Hoare triple {489389#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {489389#true} is VALID [2018-11-19 18:44:40,333 INFO L273 TraceCheckUtils]: 49: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,333 INFO L273 TraceCheckUtils]: 50: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,333 INFO L273 TraceCheckUtils]: 51: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,333 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {489389#true} {489389#true} #2941#return; {489389#true} is VALID [2018-11-19 18:44:40,334 INFO L273 TraceCheckUtils]: 53: Hoare triple {489389#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {489389#true} is VALID [2018-11-19 18:44:40,334 INFO L256 TraceCheckUtils]: 54: Hoare triple {489389#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {489389#true} is VALID [2018-11-19 18:44:40,334 INFO L273 TraceCheckUtils]: 55: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,334 INFO L273 TraceCheckUtils]: 56: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,334 INFO L273 TraceCheckUtils]: 57: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,334 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {489389#true} {489389#true} #2943#return; {489389#true} is VALID [2018-11-19 18:44:40,334 INFO L273 TraceCheckUtils]: 59: Hoare triple {489389#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {489389#true} is VALID [2018-11-19 18:44:40,334 INFO L256 TraceCheckUtils]: 60: Hoare triple {489389#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {489389#true} is VALID [2018-11-19 18:44:40,334 INFO L273 TraceCheckUtils]: 61: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,334 INFO L273 TraceCheckUtils]: 62: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,334 INFO L273 TraceCheckUtils]: 63: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,335 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {489389#true} {489389#true} #2945#return; {489389#true} is VALID [2018-11-19 18:44:40,335 INFO L273 TraceCheckUtils]: 65: Hoare triple {489389#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {489389#true} is VALID [2018-11-19 18:44:40,335 INFO L256 TraceCheckUtils]: 66: Hoare triple {489389#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {489389#true} is VALID [2018-11-19 18:44:40,335 INFO L273 TraceCheckUtils]: 67: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,335 INFO L273 TraceCheckUtils]: 68: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,335 INFO L273 TraceCheckUtils]: 69: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,335 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {489389#true} {489389#true} #2947#return; {489389#true} is VALID [2018-11-19 18:44:40,335 INFO L273 TraceCheckUtils]: 71: Hoare triple {489389#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {489389#true} is VALID [2018-11-19 18:44:40,335 INFO L256 TraceCheckUtils]: 72: Hoare triple {489389#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {489389#true} is VALID [2018-11-19 18:44:40,335 INFO L273 TraceCheckUtils]: 73: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,336 INFO L273 TraceCheckUtils]: 74: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,336 INFO L273 TraceCheckUtils]: 75: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,336 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {489389#true} {489389#true} #2949#return; {489389#true} is VALID [2018-11-19 18:44:40,336 INFO L273 TraceCheckUtils]: 77: Hoare triple {489389#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {489389#true} is VALID [2018-11-19 18:44:40,336 INFO L256 TraceCheckUtils]: 78: Hoare triple {489389#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {489389#true} is VALID [2018-11-19 18:44:40,336 INFO L273 TraceCheckUtils]: 79: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,336 INFO L273 TraceCheckUtils]: 80: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,336 INFO L273 TraceCheckUtils]: 81: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,336 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {489389#true} {489389#true} #2951#return; {489389#true} is VALID [2018-11-19 18:44:40,336 INFO L273 TraceCheckUtils]: 83: Hoare triple {489389#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {489389#true} is VALID [2018-11-19 18:44:40,336 INFO L256 TraceCheckUtils]: 84: Hoare triple {489389#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {489389#true} is VALID [2018-11-19 18:44:40,337 INFO L273 TraceCheckUtils]: 85: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,337 INFO L273 TraceCheckUtils]: 86: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,337 INFO L273 TraceCheckUtils]: 87: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,337 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {489389#true} {489389#true} #2953#return; {489389#true} is VALID [2018-11-19 18:44:40,337 INFO L273 TraceCheckUtils]: 89: Hoare triple {489389#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {489389#true} is VALID [2018-11-19 18:44:40,337 INFO L256 TraceCheckUtils]: 90: Hoare triple {489389#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {489389#true} is VALID [2018-11-19 18:44:40,337 INFO L273 TraceCheckUtils]: 91: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,337 INFO L273 TraceCheckUtils]: 92: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,337 INFO L273 TraceCheckUtils]: 93: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,337 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {489389#true} {489389#true} #2955#return; {489389#true} is VALID [2018-11-19 18:44:40,338 INFO L273 TraceCheckUtils]: 95: Hoare triple {489389#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {489389#true} is VALID [2018-11-19 18:44:40,338 INFO L256 TraceCheckUtils]: 96: Hoare triple {489389#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {489389#true} is VALID [2018-11-19 18:44:40,338 INFO L273 TraceCheckUtils]: 97: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,338 INFO L273 TraceCheckUtils]: 98: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,338 INFO L273 TraceCheckUtils]: 99: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,338 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {489389#true} {489389#true} #2957#return; {489389#true} is VALID [2018-11-19 18:44:40,338 INFO L273 TraceCheckUtils]: 101: Hoare triple {489389#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {489389#true} is VALID [2018-11-19 18:44:40,338 INFO L256 TraceCheckUtils]: 102: Hoare triple {489389#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {489389#true} is VALID [2018-11-19 18:44:40,338 INFO L273 TraceCheckUtils]: 103: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,338 INFO L273 TraceCheckUtils]: 104: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,339 INFO L273 TraceCheckUtils]: 105: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,339 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {489389#true} {489389#true} #2959#return; {489389#true} is VALID [2018-11-19 18:44:40,339 INFO L273 TraceCheckUtils]: 107: Hoare triple {489389#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {489389#true} is VALID [2018-11-19 18:44:40,339 INFO L256 TraceCheckUtils]: 108: Hoare triple {489389#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {489389#true} is VALID [2018-11-19 18:44:40,339 INFO L273 TraceCheckUtils]: 109: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,339 INFO L273 TraceCheckUtils]: 110: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,339 INFO L273 TraceCheckUtils]: 111: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,339 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {489389#true} {489389#true} #2961#return; {489389#true} is VALID [2018-11-19 18:44:40,339 INFO L273 TraceCheckUtils]: 113: Hoare triple {489389#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {489389#true} is VALID [2018-11-19 18:44:40,339 INFO L256 TraceCheckUtils]: 114: Hoare triple {489389#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {489389#true} is VALID [2018-11-19 18:44:40,339 INFO L273 TraceCheckUtils]: 115: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,340 INFO L273 TraceCheckUtils]: 116: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,340 INFO L273 TraceCheckUtils]: 117: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,340 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {489389#true} {489389#true} #2963#return; {489389#true} is VALID [2018-11-19 18:44:40,340 INFO L273 TraceCheckUtils]: 119: Hoare triple {489389#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {489389#true} is VALID [2018-11-19 18:44:40,340 INFO L256 TraceCheckUtils]: 120: Hoare triple {489389#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {489389#true} is VALID [2018-11-19 18:44:40,340 INFO L273 TraceCheckUtils]: 121: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,340 INFO L273 TraceCheckUtils]: 122: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,340 INFO L273 TraceCheckUtils]: 123: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,340 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {489389#true} {489389#true} #2965#return; {489389#true} is VALID [2018-11-19 18:44:40,340 INFO L273 TraceCheckUtils]: 125: Hoare triple {489389#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {489389#true} is VALID [2018-11-19 18:44:40,341 INFO L256 TraceCheckUtils]: 126: Hoare triple {489389#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {489389#true} is VALID [2018-11-19 18:44:40,341 INFO L273 TraceCheckUtils]: 127: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,341 INFO L273 TraceCheckUtils]: 128: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,341 INFO L273 TraceCheckUtils]: 129: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,341 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {489389#true} {489389#true} #2967#return; {489389#true} is VALID [2018-11-19 18:44:40,341 INFO L273 TraceCheckUtils]: 131: Hoare triple {489389#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {489389#true} is VALID [2018-11-19 18:44:40,341 INFO L256 TraceCheckUtils]: 132: Hoare triple {489389#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {489389#true} is VALID [2018-11-19 18:44:40,341 INFO L273 TraceCheckUtils]: 133: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,341 INFO L273 TraceCheckUtils]: 134: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,341 INFO L273 TraceCheckUtils]: 135: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,341 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {489389#true} {489389#true} #2969#return; {489389#true} is VALID [2018-11-19 18:44:40,342 INFO L273 TraceCheckUtils]: 137: Hoare triple {489389#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {489389#true} is VALID [2018-11-19 18:44:40,342 INFO L256 TraceCheckUtils]: 138: Hoare triple {489389#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {489389#true} is VALID [2018-11-19 18:44:40,342 INFO L273 TraceCheckUtils]: 139: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,342 INFO L273 TraceCheckUtils]: 140: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,342 INFO L273 TraceCheckUtils]: 141: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,342 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {489389#true} {489389#true} #2971#return; {489389#true} is VALID [2018-11-19 18:44:40,342 INFO L273 TraceCheckUtils]: 143: Hoare triple {489389#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {489389#true} is VALID [2018-11-19 18:44:40,342 INFO L256 TraceCheckUtils]: 144: Hoare triple {489389#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {489389#true} is VALID [2018-11-19 18:44:40,342 INFO L273 TraceCheckUtils]: 145: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,342 INFO L273 TraceCheckUtils]: 146: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,343 INFO L273 TraceCheckUtils]: 147: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,343 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {489389#true} {489389#true} #2973#return; {489389#true} is VALID [2018-11-19 18:44:40,343 INFO L273 TraceCheckUtils]: 149: Hoare triple {489389#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {489389#true} is VALID [2018-11-19 18:44:40,343 INFO L256 TraceCheckUtils]: 150: Hoare triple {489389#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {489389#true} is VALID [2018-11-19 18:44:40,343 INFO L273 TraceCheckUtils]: 151: Hoare triple {489389#true} #t~loopctr974 := 0; {489389#true} is VALID [2018-11-19 18:44:40,343 INFO L273 TraceCheckUtils]: 152: Hoare triple {489389#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {489389#true} is VALID [2018-11-19 18:44:40,343 INFO L273 TraceCheckUtils]: 153: Hoare triple {489389#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {489389#true} is VALID [2018-11-19 18:44:40,343 INFO L273 TraceCheckUtils]: 154: Hoare triple {489389#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {489389#true} is VALID [2018-11-19 18:44:40,343 INFO L273 TraceCheckUtils]: 155: Hoare triple {489389#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {489389#true} is VALID [2018-11-19 18:44:40,343 INFO L273 TraceCheckUtils]: 156: Hoare triple {489389#true} assume !(#t~loopctr974 < #amount); {489389#true} is VALID [2018-11-19 18:44:40,344 INFO L273 TraceCheckUtils]: 157: Hoare triple {489389#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {489389#true} is VALID [2018-11-19 18:44:40,344 INFO L268 TraceCheckUtils]: 158: Hoare quadruple {489389#true} {489389#true} #2975#return; {489389#true} is VALID [2018-11-19 18:44:40,344 INFO L273 TraceCheckUtils]: 159: Hoare triple {489389#true} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {489389#true} is VALID [2018-11-19 18:44:40,344 INFO L273 TraceCheckUtils]: 160: Hoare triple {489389#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,344 INFO L273 TraceCheckUtils]: 161: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,344 INFO L273 TraceCheckUtils]: 162: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,344 INFO L273 TraceCheckUtils]: 163: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,344 INFO L273 TraceCheckUtils]: 164: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,344 INFO L273 TraceCheckUtils]: 165: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,344 INFO L273 TraceCheckUtils]: 166: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,344 INFO L273 TraceCheckUtils]: 167: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,345 INFO L273 TraceCheckUtils]: 168: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,345 INFO L273 TraceCheckUtils]: 169: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,345 INFO L273 TraceCheckUtils]: 170: Hoare triple {489389#true} assume #t~switch909; {489389#true} is VALID [2018-11-19 18:44:40,345 INFO L273 TraceCheckUtils]: 171: Hoare triple {489389#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {489389#true} is VALID [2018-11-19 18:44:40,345 INFO L273 TraceCheckUtils]: 172: Hoare triple {489389#true} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {489389#true} is VALID [2018-11-19 18:44:40,345 INFO L273 TraceCheckUtils]: 173: Hoare triple {489389#true} assume #t~switch947; {489389#true} is VALID [2018-11-19 18:44:40,345 INFO L273 TraceCheckUtils]: 174: Hoare triple {489389#true} assume 1 == ~ldv_state_variable_0~0; {489389#true} is VALID [2018-11-19 18:44:40,345 INFO L256 TraceCheckUtils]: 175: Hoare triple {489389#true} call #t~ret948 := ims_pcu_driver_init(); {489389#true} is VALID [2018-11-19 18:44:40,345 INFO L273 TraceCheckUtils]: 176: Hoare triple {489389#true} havoc ~tmp~46; {489389#true} is VALID [2018-11-19 18:44:40,345 INFO L256 TraceCheckUtils]: 177: Hoare triple {489389#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {489389#true} is VALID [2018-11-19 18:44:40,346 INFO L273 TraceCheckUtils]: 178: Hoare triple {489389#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {489389#true} is VALID [2018-11-19 18:44:40,346 INFO L256 TraceCheckUtils]: 179: Hoare triple {489389#true} call ldv_usb_driver_1(); {489389#true} is VALID [2018-11-19 18:44:40,346 INFO L273 TraceCheckUtils]: 180: Hoare triple {489389#true} havoc ~tmp~53.base, ~tmp~53.offset; {489389#true} is VALID [2018-11-19 18:44:40,346 INFO L256 TraceCheckUtils]: 181: Hoare triple {489389#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {489389#true} is VALID [2018-11-19 18:44:40,346 INFO L273 TraceCheckUtils]: 182: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,346 INFO L273 TraceCheckUtils]: 183: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,346 INFO L273 TraceCheckUtils]: 184: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,346 INFO L268 TraceCheckUtils]: 185: Hoare quadruple {489389#true} {489389#true} #2613#return; {489389#true} is VALID [2018-11-19 18:44:40,346 INFO L273 TraceCheckUtils]: 186: Hoare triple {489389#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {489389#true} is VALID [2018-11-19 18:44:40,346 INFO L273 TraceCheckUtils]: 187: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,347 INFO L268 TraceCheckUtils]: 188: Hoare quadruple {489389#true} {489389#true} #2537#return; {489389#true} is VALID [2018-11-19 18:44:40,347 INFO L273 TraceCheckUtils]: 189: Hoare triple {489389#true} #res := ~ldv_func_res~0; {489389#true} is VALID [2018-11-19 18:44:40,347 INFO L273 TraceCheckUtils]: 190: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,347 INFO L268 TraceCheckUtils]: 191: Hoare quadruple {489389#true} {489389#true} #2777#return; {489389#true} is VALID [2018-11-19 18:44:40,347 INFO L273 TraceCheckUtils]: 192: Hoare triple {489389#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {489389#true} is VALID [2018-11-19 18:44:40,347 INFO L273 TraceCheckUtils]: 193: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,347 INFO L268 TraceCheckUtils]: 194: Hoare quadruple {489389#true} {489389#true} #3035#return; {489389#true} is VALID [2018-11-19 18:44:40,347 INFO L273 TraceCheckUtils]: 195: Hoare triple {489389#true} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {489389#true} is VALID [2018-11-19 18:44:40,347 INFO L273 TraceCheckUtils]: 196: Hoare triple {489389#true} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_10~0 := 1; {489389#true} is VALID [2018-11-19 18:44:40,347 INFO L256 TraceCheckUtils]: 197: Hoare triple {489389#true} call ldv_initialize_ims_pcu_attribute_10(); {489389#true} is VALID [2018-11-19 18:44:40,347 INFO L273 TraceCheckUtils]: 198: Hoare triple {489389#true} havoc ~tmp~47.base, ~tmp~47.offset;havoc ~tmp___0~19.base, ~tmp___0~19.offset; {489389#true} is VALID [2018-11-19 18:44:40,348 INFO L256 TraceCheckUtils]: 199: Hoare triple {489389#true} call #t~ret861.base, #t~ret861.offset := ldv_zalloc(1376); {489389#true} is VALID [2018-11-19 18:44:40,348 INFO L273 TraceCheckUtils]: 200: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,348 INFO L273 TraceCheckUtils]: 201: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,348 INFO L273 TraceCheckUtils]: 202: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,348 INFO L268 TraceCheckUtils]: 203: Hoare quadruple {489389#true} {489389#true} #2807#return; {489389#true} is VALID [2018-11-19 18:44:40,348 INFO L273 TraceCheckUtils]: 204: Hoare triple {489389#true} ~tmp~47.base, ~tmp~47.offset := #t~ret861.base, #t~ret861.offset;havoc #t~ret861.base, #t~ret861.offset;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := ~tmp~47.base, ~tmp~47.offset; {489389#true} is VALID [2018-11-19 18:44:40,348 INFO L256 TraceCheckUtils]: 205: Hoare triple {489389#true} call #t~ret862.base, #t~ret862.offset := ldv_zalloc(48); {489389#true} is VALID [2018-11-19 18:44:40,348 INFO L273 TraceCheckUtils]: 206: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,348 INFO L273 TraceCheckUtils]: 207: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,348 INFO L273 TraceCheckUtils]: 208: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,349 INFO L268 TraceCheckUtils]: 209: Hoare quadruple {489389#true} {489389#true} #2809#return; {489389#true} is VALID [2018-11-19 18:44:40,349 INFO L273 TraceCheckUtils]: 210: Hoare triple {489389#true} ~tmp___0~19.base, ~tmp___0~19.offset := #t~ret862.base, #t~ret862.offset;havoc #t~ret862.base, #t~ret862.offset;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := ~tmp___0~19.base, ~tmp___0~19.offset; {489389#true} is VALID [2018-11-19 18:44:40,349 INFO L273 TraceCheckUtils]: 211: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,349 INFO L268 TraceCheckUtils]: 212: Hoare quadruple {489389#true} {489389#true} #3037#return; {489389#true} is VALID [2018-11-19 18:44:40,349 INFO L273 TraceCheckUtils]: 213: Hoare triple {489389#true} ~ldv_state_variable_4~0 := 1;~ldv_state_variable_8~0 := 1; {489389#true} is VALID [2018-11-19 18:44:40,349 INFO L256 TraceCheckUtils]: 214: Hoare triple {489389#true} call ldv_initialize_ims_pcu_attribute_8(); {489389#true} is VALID [2018-11-19 18:44:40,349 INFO L273 TraceCheckUtils]: 215: Hoare triple {489389#true} havoc ~tmp~51.base, ~tmp~51.offset;havoc ~tmp___0~23.base, ~tmp___0~23.offset; {489389#true} is VALID [2018-11-19 18:44:40,349 INFO L256 TraceCheckUtils]: 216: Hoare triple {489389#true} call #t~ret869.base, #t~ret869.offset := ldv_zalloc(1376); {489389#true} is VALID [2018-11-19 18:44:40,349 INFO L273 TraceCheckUtils]: 217: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,349 INFO L273 TraceCheckUtils]: 218: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,349 INFO L273 TraceCheckUtils]: 219: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,350 INFO L268 TraceCheckUtils]: 220: Hoare quadruple {489389#true} {489389#true} #2631#return; {489389#true} is VALID [2018-11-19 18:44:40,350 INFO L273 TraceCheckUtils]: 221: Hoare triple {489389#true} ~tmp~51.base, ~tmp~51.offset := #t~ret869.base, #t~ret869.offset;havoc #t~ret869.base, #t~ret869.offset;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := ~tmp~51.base, ~tmp~51.offset; {489389#true} is VALID [2018-11-19 18:44:40,350 INFO L256 TraceCheckUtils]: 222: Hoare triple {489389#true} call #t~ret870.base, #t~ret870.offset := ldv_zalloc(48); {489389#true} is VALID [2018-11-19 18:44:40,350 INFO L273 TraceCheckUtils]: 223: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,350 INFO L273 TraceCheckUtils]: 224: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,350 INFO L273 TraceCheckUtils]: 225: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,350 INFO L268 TraceCheckUtils]: 226: Hoare quadruple {489389#true} {489389#true} #2633#return; {489389#true} is VALID [2018-11-19 18:44:40,350 INFO L273 TraceCheckUtils]: 227: Hoare triple {489389#true} ~tmp___0~23.base, ~tmp___0~23.offset := #t~ret870.base, #t~ret870.offset;havoc #t~ret870.base, #t~ret870.offset;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := ~tmp___0~23.base, ~tmp___0~23.offset; {489389#true} is VALID [2018-11-19 18:44:40,350 INFO L273 TraceCheckUtils]: 228: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,350 INFO L268 TraceCheckUtils]: 229: Hoare quadruple {489389#true} {489389#true} #3039#return; {489389#true} is VALID [2018-11-19 18:44:40,351 INFO L273 TraceCheckUtils]: 230: Hoare triple {489389#true} ~ldv_state_variable_2~0 := 1;~ldv_state_variable_9~0 := 1; {489389#true} is VALID [2018-11-19 18:44:40,351 INFO L256 TraceCheckUtils]: 231: Hoare triple {489389#true} call ldv_initialize_ims_pcu_attribute_9(); {489389#true} is VALID [2018-11-19 18:44:40,351 INFO L273 TraceCheckUtils]: 232: Hoare triple {489389#true} havoc ~tmp~49.base, ~tmp~49.offset;havoc ~tmp___0~21.base, ~tmp___0~21.offset; {489389#true} is VALID [2018-11-19 18:44:40,351 INFO L256 TraceCheckUtils]: 233: Hoare triple {489389#true} call #t~ret865.base, #t~ret865.offset := ldv_zalloc(1376); {489389#true} is VALID [2018-11-19 18:44:40,351 INFO L273 TraceCheckUtils]: 234: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,351 INFO L273 TraceCheckUtils]: 235: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,351 INFO L273 TraceCheckUtils]: 236: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,351 INFO L268 TraceCheckUtils]: 237: Hoare quadruple {489389#true} {489389#true} #2627#return; {489389#true} is VALID [2018-11-19 18:44:40,351 INFO L273 TraceCheckUtils]: 238: Hoare triple {489389#true} ~tmp~49.base, ~tmp~49.offset := #t~ret865.base, #t~ret865.offset;havoc #t~ret865.base, #t~ret865.offset;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := ~tmp~49.base, ~tmp~49.offset; {489389#true} is VALID [2018-11-19 18:44:40,351 INFO L256 TraceCheckUtils]: 239: Hoare triple {489389#true} call #t~ret866.base, #t~ret866.offset := ldv_zalloc(48); {489389#true} is VALID [2018-11-19 18:44:40,352 INFO L273 TraceCheckUtils]: 240: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,352 INFO L273 TraceCheckUtils]: 241: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,352 INFO L273 TraceCheckUtils]: 242: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,352 INFO L268 TraceCheckUtils]: 243: Hoare quadruple {489389#true} {489389#true} #2629#return; {489389#true} is VALID [2018-11-19 18:44:40,352 INFO L273 TraceCheckUtils]: 244: Hoare triple {489389#true} ~tmp___0~21.base, ~tmp___0~21.offset := #t~ret866.base, #t~ret866.offset;havoc #t~ret866.base, #t~ret866.offset;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := ~tmp___0~21.base, ~tmp___0~21.offset; {489389#true} is VALID [2018-11-19 18:44:40,352 INFO L273 TraceCheckUtils]: 245: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,352 INFO L268 TraceCheckUtils]: 246: Hoare quadruple {489389#true} {489389#true} #3041#return; {489389#true} is VALID [2018-11-19 18:44:40,352 INFO L273 TraceCheckUtils]: 247: Hoare triple {489389#true} ~ldv_state_variable_7~0 := 1; {489389#true} is VALID [2018-11-19 18:44:40,352 INFO L256 TraceCheckUtils]: 248: Hoare triple {489389#true} call ldv_initialize_ims_pcu_attribute_7(); {489389#true} is VALID [2018-11-19 18:44:40,352 INFO L273 TraceCheckUtils]: 249: Hoare triple {489389#true} havoc ~tmp~52.base, ~tmp~52.offset;havoc ~tmp___0~24.base, ~tmp___0~24.offset; {489389#true} is VALID [2018-11-19 18:44:40,352 INFO L256 TraceCheckUtils]: 250: Hoare triple {489389#true} call #t~ret871.base, #t~ret871.offset := ldv_zalloc(1376); {489389#true} is VALID [2018-11-19 18:44:40,353 INFO L273 TraceCheckUtils]: 251: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,353 INFO L273 TraceCheckUtils]: 252: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,353 INFO L273 TraceCheckUtils]: 253: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,353 INFO L268 TraceCheckUtils]: 254: Hoare quadruple {489389#true} {489389#true} #2619#return; {489389#true} is VALID [2018-11-19 18:44:40,353 INFO L273 TraceCheckUtils]: 255: Hoare triple {489389#true} ~tmp~52.base, ~tmp~52.offset := #t~ret871.base, #t~ret871.offset;havoc #t~ret871.base, #t~ret871.offset;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := ~tmp~52.base, ~tmp~52.offset; {489389#true} is VALID [2018-11-19 18:44:40,353 INFO L256 TraceCheckUtils]: 256: Hoare triple {489389#true} call #t~ret872.base, #t~ret872.offset := ldv_zalloc(48); {489389#true} is VALID [2018-11-19 18:44:40,353 INFO L273 TraceCheckUtils]: 257: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,353 INFO L273 TraceCheckUtils]: 258: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,353 INFO L273 TraceCheckUtils]: 259: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,353 INFO L268 TraceCheckUtils]: 260: Hoare quadruple {489389#true} {489389#true} #2621#return; {489389#true} is VALID [2018-11-19 18:44:40,354 INFO L273 TraceCheckUtils]: 261: Hoare triple {489389#true} ~tmp___0~24.base, ~tmp___0~24.offset := #t~ret872.base, #t~ret872.offset;havoc #t~ret872.base, #t~ret872.offset;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := ~tmp___0~24.base, ~tmp___0~24.offset; {489389#true} is VALID [2018-11-19 18:44:40,354 INFO L273 TraceCheckUtils]: 262: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,354 INFO L268 TraceCheckUtils]: 263: Hoare quadruple {489389#true} {489389#true} #3043#return; {489389#true} is VALID [2018-11-19 18:44:40,354 INFO L273 TraceCheckUtils]: 264: Hoare triple {489389#true} ~ldv_state_variable_3~0 := 1;~ldv_state_variable_11~0 := 1; {489389#true} is VALID [2018-11-19 18:44:40,354 INFO L256 TraceCheckUtils]: 265: Hoare triple {489389#true} call ldv_initialize_ims_pcu_attribute_11(); {489389#true} is VALID [2018-11-19 18:44:40,354 INFO L273 TraceCheckUtils]: 266: Hoare triple {489389#true} havoc ~tmp~50.base, ~tmp~50.offset;havoc ~tmp___0~22.base, ~tmp___0~22.offset; {489389#true} is VALID [2018-11-19 18:44:40,354 INFO L256 TraceCheckUtils]: 267: Hoare triple {489389#true} call #t~ret867.base, #t~ret867.offset := ldv_zalloc(1376); {489389#true} is VALID [2018-11-19 18:44:40,354 INFO L273 TraceCheckUtils]: 268: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,354 INFO L273 TraceCheckUtils]: 269: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,354 INFO L273 TraceCheckUtils]: 270: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,354 INFO L268 TraceCheckUtils]: 271: Hoare quadruple {489389#true} {489389#true} #2811#return; {489389#true} is VALID [2018-11-19 18:44:40,355 INFO L273 TraceCheckUtils]: 272: Hoare triple {489389#true} ~tmp~50.base, ~tmp~50.offset := #t~ret867.base, #t~ret867.offset;havoc #t~ret867.base, #t~ret867.offset;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := ~tmp~50.base, ~tmp~50.offset; {489389#true} is VALID [2018-11-19 18:44:40,355 INFO L256 TraceCheckUtils]: 273: Hoare triple {489389#true} call #t~ret868.base, #t~ret868.offset := ldv_zalloc(48); {489389#true} is VALID [2018-11-19 18:44:40,355 INFO L273 TraceCheckUtils]: 274: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,355 INFO L273 TraceCheckUtils]: 275: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,355 INFO L273 TraceCheckUtils]: 276: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,355 INFO L268 TraceCheckUtils]: 277: Hoare quadruple {489389#true} {489389#true} #2813#return; {489389#true} is VALID [2018-11-19 18:44:40,355 INFO L273 TraceCheckUtils]: 278: Hoare triple {489389#true} ~tmp___0~22.base, ~tmp___0~22.offset := #t~ret868.base, #t~ret868.offset;havoc #t~ret868.base, #t~ret868.offset;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := ~tmp___0~22.base, ~tmp___0~22.offset; {489389#true} is VALID [2018-11-19 18:44:40,355 INFO L273 TraceCheckUtils]: 279: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,355 INFO L268 TraceCheckUtils]: 280: Hoare quadruple {489389#true} {489389#true} #3045#return; {489389#true} is VALID [2018-11-19 18:44:40,355 INFO L273 TraceCheckUtils]: 281: Hoare triple {489389#true} ~ldv_state_variable_6~0 := 1; {489389#true} is VALID [2018-11-19 18:44:40,356 INFO L256 TraceCheckUtils]: 282: Hoare triple {489389#true} call ldv_initialize_ims_pcu_attribute_6(); {489389#true} is VALID [2018-11-19 18:44:40,356 INFO L273 TraceCheckUtils]: 283: Hoare triple {489389#true} havoc ~tmp~48.base, ~tmp~48.offset;havoc ~tmp___0~20.base, ~tmp___0~20.offset; {489389#true} is VALID [2018-11-19 18:44:40,356 INFO L256 TraceCheckUtils]: 284: Hoare triple {489389#true} call #t~ret863.base, #t~ret863.offset := ldv_zalloc(1376); {489389#true} is VALID [2018-11-19 18:44:40,356 INFO L273 TraceCheckUtils]: 285: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,356 INFO L273 TraceCheckUtils]: 286: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,356 INFO L273 TraceCheckUtils]: 287: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,356 INFO L268 TraceCheckUtils]: 288: Hoare quadruple {489389#true} {489389#true} #2623#return; {489389#true} is VALID [2018-11-19 18:44:40,356 INFO L273 TraceCheckUtils]: 289: Hoare triple {489389#true} ~tmp~48.base, ~tmp~48.offset := #t~ret863.base, #t~ret863.offset;havoc #t~ret863.base, #t~ret863.offset;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := ~tmp~48.base, ~tmp~48.offset; {489389#true} is VALID [2018-11-19 18:44:40,356 INFO L256 TraceCheckUtils]: 290: Hoare triple {489389#true} call #t~ret864.base, #t~ret864.offset := ldv_zalloc(48); {489389#true} is VALID [2018-11-19 18:44:40,356 INFO L273 TraceCheckUtils]: 291: Hoare triple {489389#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {489389#true} is VALID [2018-11-19 18:44:40,357 INFO L273 TraceCheckUtils]: 292: Hoare triple {489389#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {489389#true} is VALID [2018-11-19 18:44:40,357 INFO L273 TraceCheckUtils]: 293: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,357 INFO L268 TraceCheckUtils]: 294: Hoare quadruple {489389#true} {489389#true} #2625#return; {489389#true} is VALID [2018-11-19 18:44:40,357 INFO L273 TraceCheckUtils]: 295: Hoare triple {489389#true} ~tmp___0~20.base, ~tmp___0~20.offset := #t~ret864.base, #t~ret864.offset;havoc #t~ret864.base, #t~ret864.offset;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := ~tmp___0~20.base, ~tmp___0~20.offset; {489389#true} is VALID [2018-11-19 18:44:40,357 INFO L273 TraceCheckUtils]: 296: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,357 INFO L268 TraceCheckUtils]: 297: Hoare quadruple {489389#true} {489389#true} #3047#return; {489389#true} is VALID [2018-11-19 18:44:40,358 INFO L273 TraceCheckUtils]: 298: Hoare triple {489389#true} assume !(0 != ~ldv_retval_4~0); {489389#true} is VALID [2018-11-19 18:44:40,358 INFO L273 TraceCheckUtils]: 299: Hoare triple {489389#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,358 INFO L273 TraceCheckUtils]: 300: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,358 INFO L273 TraceCheckUtils]: 301: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,358 INFO L273 TraceCheckUtils]: 302: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,358 INFO L273 TraceCheckUtils]: 303: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,359 INFO L273 TraceCheckUtils]: 304: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,359 INFO L273 TraceCheckUtils]: 305: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,359 INFO L273 TraceCheckUtils]: 306: Hoare triple {489389#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {489389#true} is VALID [2018-11-19 18:44:40,359 INFO L273 TraceCheckUtils]: 307: Hoare triple {489389#true} assume #t~switch909; {489389#true} is VALID [2018-11-19 18:44:40,359 INFO L273 TraceCheckUtils]: 308: Hoare triple {489389#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {489389#true} is VALID [2018-11-19 18:44:40,359 INFO L273 TraceCheckUtils]: 309: Hoare triple {489389#true} assume #t~switch937; {489389#true} is VALID [2018-11-19 18:44:40,360 INFO L273 TraceCheckUtils]: 310: Hoare triple {489389#true} assume 1 == ~ldv_state_variable_1~0; {489389#true} is VALID [2018-11-19 18:44:40,360 INFO L256 TraceCheckUtils]: 311: Hoare triple {489389#true} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {489389#true} is VALID [2018-11-19 18:44:40,360 INFO L273 TraceCheckUtils]: 312: Hoare triple {489389#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {489389#true} is VALID [2018-11-19 18:44:40,360 INFO L256 TraceCheckUtils]: 313: Hoare triple {489389#true} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {489389#true} is VALID [2018-11-19 18:44:40,360 INFO L273 TraceCheckUtils]: 314: Hoare triple {489389#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {489389#true} is VALID [2018-11-19 18:44:40,360 INFO L256 TraceCheckUtils]: 315: Hoare triple {489389#true} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {489389#true} is VALID [2018-11-19 18:44:40,360 INFO L273 TraceCheckUtils]: 316: Hoare triple {489389#true} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {489389#true} is VALID [2018-11-19 18:44:40,361 INFO L256 TraceCheckUtils]: 317: Hoare triple {489389#true} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {489389#true} is VALID [2018-11-19 18:44:40,361 INFO L273 TraceCheckUtils]: 318: Hoare triple {489389#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {489389#true} is VALID [2018-11-19 18:44:40,361 INFO L273 TraceCheckUtils]: 319: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,361 INFO L268 TraceCheckUtils]: 320: Hoare quadruple {489389#true} {489389#true} #2817#return; {489389#true} is VALID [2018-11-19 18:44:40,361 INFO L273 TraceCheckUtils]: 321: Hoare triple {489389#true} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {489389#true} is VALID [2018-11-19 18:44:40,361 INFO L273 TraceCheckUtils]: 322: Hoare triple {489389#true} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {489389#true} is VALID [2018-11-19 18:44:40,361 INFO L273 TraceCheckUtils]: 323: Hoare triple {489389#true} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {489389#true} is VALID [2018-11-19 18:44:40,362 INFO L273 TraceCheckUtils]: 324: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,362 INFO L268 TraceCheckUtils]: 325: Hoare quadruple {489389#true} {489389#true} #3151#return; {489389#true} is VALID [2018-11-19 18:44:40,362 INFO L273 TraceCheckUtils]: 326: Hoare triple {489389#true} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {489389#true} is VALID [2018-11-19 18:44:40,362 INFO L273 TraceCheckUtils]: 327: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,362 INFO L268 TraceCheckUtils]: 328: Hoare quadruple {489389#true} {489389#true} #3095#return; {489389#true} is VALID [2018-11-19 18:44:40,362 INFO L273 TraceCheckUtils]: 329: Hoare triple {489389#true} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {489389#true} is VALID [2018-11-19 18:44:40,363 INFO L256 TraceCheckUtils]: 330: Hoare triple {489389#true} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {489389#true} is VALID [2018-11-19 18:44:40,363 INFO L273 TraceCheckUtils]: 331: Hoare triple {489389#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {489389#true} is VALID [2018-11-19 18:44:40,363 INFO L256 TraceCheckUtils]: 332: Hoare triple {489389#true} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {489389#true} is VALID [2018-11-19 18:44:40,363 INFO L273 TraceCheckUtils]: 333: Hoare triple {489389#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {489389#true} is VALID [2018-11-19 18:44:40,363 INFO L256 TraceCheckUtils]: 334: Hoare triple {489389#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {489389#true} is VALID [2018-11-19 18:44:40,363 INFO L273 TraceCheckUtils]: 335: Hoare triple {489389#true} ~size := #in~size;~t := #in~t; {489389#true} is VALID [2018-11-19 18:44:40,363 INFO L256 TraceCheckUtils]: 336: Hoare triple {489389#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {489389#true} is VALID [2018-11-19 18:44:40,364 INFO L273 TraceCheckUtils]: 337: Hoare triple {489389#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {489389#true} is VALID [2018-11-19 18:44:40,364 INFO L273 TraceCheckUtils]: 338: Hoare triple {489389#true} assume !(0 != ~tmp___0~2);call #t~malloc130.base, #t~malloc130.offset := #Ultimate.alloc(~size);~tmp~8.base, ~tmp~8.offset := #t~malloc130.base, #t~malloc130.offset;~p~0.base, ~p~0.offset := ~tmp~8.base, ~tmp~8.offset;assume 0 != (if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~0.base, ~p~0.offset; {489389#true} is VALID [2018-11-19 18:44:40,364 INFO L273 TraceCheckUtils]: 339: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,364 INFO L268 TraceCheckUtils]: 340: Hoare quadruple {489389#true} {489389#true} #2691#return; {489389#true} is VALID [2018-11-19 18:44:40,364 INFO L273 TraceCheckUtils]: 341: Hoare triple {489389#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {489389#true} is VALID [2018-11-19 18:44:40,364 INFO L273 TraceCheckUtils]: 342: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,364 INFO L268 TraceCheckUtils]: 343: Hoare quadruple {489389#true} {489389#true} #2781#return; {489389#true} is VALID [2018-11-19 18:44:40,365 INFO L273 TraceCheckUtils]: 344: Hoare triple {489389#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {489389#true} is VALID [2018-11-19 18:44:40,365 INFO L273 TraceCheckUtils]: 345: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,365 INFO L268 TraceCheckUtils]: 346: Hoare quadruple {489389#true} {489389#true} #2779#return; {489389#true} is VALID [2018-11-19 18:44:40,365 INFO L273 TraceCheckUtils]: 347: Hoare triple {489389#true} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {489389#true} is VALID [2018-11-19 18:44:40,365 INFO L273 TraceCheckUtils]: 348: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,365 INFO L268 TraceCheckUtils]: 349: Hoare quadruple {489389#true} {489389#true} #3097#return; {489389#true} is VALID [2018-11-19 18:44:40,366 INFO L273 TraceCheckUtils]: 350: Hoare triple {489389#true} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {489389#true} is VALID [2018-11-19 18:44:40,366 INFO L273 TraceCheckUtils]: 351: Hoare triple {489389#true} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {489389#true} is VALID [2018-11-19 18:44:40,366 INFO L256 TraceCheckUtils]: 352: Hoare triple {489389#true} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {489389#true} is VALID [2018-11-19 18:44:40,366 INFO L273 TraceCheckUtils]: 353: Hoare triple {489389#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {489389#true} is VALID [2018-11-19 18:44:40,366 INFO L273 TraceCheckUtils]: 354: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,366 INFO L268 TraceCheckUtils]: 355: Hoare quadruple {489389#true} {489389#true} #3099#return; {489389#true} is VALID [2018-11-19 18:44:40,366 INFO L256 TraceCheckUtils]: 356: Hoare triple {489389#true} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {489389#true} is VALID [2018-11-19 18:44:40,367 INFO L273 TraceCheckUtils]: 357: Hoare triple {489389#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {489389#true} is VALID [2018-11-19 18:44:40,367 INFO L273 TraceCheckUtils]: 358: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,367 INFO L268 TraceCheckUtils]: 359: Hoare quadruple {489389#true} {489389#true} #3101#return; {489389#true} is VALID [2018-11-19 18:44:40,367 INFO L256 TraceCheckUtils]: 360: Hoare triple {489389#true} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {489389#true} is VALID [2018-11-19 18:44:40,367 INFO L273 TraceCheckUtils]: 361: Hoare triple {489389#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {489389#true} is VALID [2018-11-19 18:44:40,367 INFO L256 TraceCheckUtils]: 362: Hoare triple {489389#true} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {489389#true} is VALID [2018-11-19 18:44:40,367 INFO L273 TraceCheckUtils]: 363: Hoare triple {489389#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {489389#true} is VALID [2018-11-19 18:44:40,368 INFO L273 TraceCheckUtils]: 364: Hoare triple {489389#true} assume !(0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616); {489389#true} is VALID [2018-11-19 18:44:40,368 INFO L273 TraceCheckUtils]: 365: Hoare triple {489389#true} assume !(0 == ~buflen~0 % 4294967296 % 18446744073709551616); {489389#true} is VALID [2018-11-19 18:44:40,368 INFO L273 TraceCheckUtils]: 366: Hoare triple {489389#true} assume 0 != ~buflen~0 % 4294967296 % 18446744073709551616; {489389#true} is VALID [2018-11-19 18:44:40,368 INFO L273 TraceCheckUtils]: 367: Hoare triple {489389#true} ~union_desc~0.base, ~union_desc~0.offset := ~buf~0.base, ~buf~0.offset;call #t~mem642 := read~int(~union_desc~0.base, 1 + ~union_desc~0.offset, 1);#t~short644 := 36 == #t~mem642 % 256 % 4294967296; {489389#true} is VALID [2018-11-19 18:44:40,368 INFO L273 TraceCheckUtils]: 368: Hoare triple {489389#true} assume #t~short644;call #t~mem643 := read~int(~union_desc~0.base, 2 + ~union_desc~0.offset, 1);#t~short644 := 6 == #t~mem643 % 256 % 4294967296; {489389#true} is VALID [2018-11-19 18:44:40,368 INFO L273 TraceCheckUtils]: 369: Hoare triple {489389#true} assume #t~short644;havoc #t~mem643;havoc #t~mem642;havoc #t~short644;call write~$Pointer$(#t~string645.base, #t~string645.offset, ~#descriptor~3.base, ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string646.base, #t~string646.offset, ~#descriptor~3.base, 8 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string647.base, #t~string647.offset, ~#descriptor~3.base, 16 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string648.base, #t~string648.offset, ~#descriptor~3.base, 24 + ~#descriptor~3.offset, 8);call write~int(1479, ~#descriptor~3.base, 32 + ~#descriptor~3.offset, 4);call write~int(0, ~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1);call #t~mem649 := read~int(~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1); {489389#true} is VALID [2018-11-19 18:44:40,369 INFO L256 TraceCheckUtils]: 370: Hoare triple {489389#true} call #t~ret650 := ldv__builtin_expect(~bitwiseAnd(#t~mem649 % 256, 1), 0); {489389#true} is VALID [2018-11-19 18:44:40,369 INFO L273 TraceCheckUtils]: 371: Hoare triple {489389#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {489389#true} is VALID [2018-11-19 18:44:40,369 INFO L273 TraceCheckUtils]: 372: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,369 INFO L268 TraceCheckUtils]: 373: Hoare quadruple {489389#true} {489389#true} #3075#return; {489389#true} is VALID [2018-11-19 18:44:40,369 INFO L273 TraceCheckUtils]: 374: Hoare triple {489389#true} assume -9223372036854775808 <= #t~ret650 && #t~ret650 <= 9223372036854775807;~tmp~36 := #t~ret650;havoc #t~ret650;havoc #t~mem649; {489389#true} is VALID [2018-11-19 18:44:40,369 INFO L273 TraceCheckUtils]: 375: Hoare triple {489389#true} assume !(0 != ~tmp~36); {489389#true} is VALID [2018-11-19 18:44:40,369 INFO L273 TraceCheckUtils]: 376: Hoare triple {489389#true} #res.base, #res.offset := ~union_desc~0.base, ~union_desc~0.offset;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {489389#true} is VALID [2018-11-19 18:44:40,369 INFO L273 TraceCheckUtils]: 377: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,369 INFO L268 TraceCheckUtils]: 378: Hoare quadruple {489389#true} {489389#true} #3137#return; {489389#true} is VALID [2018-11-19 18:44:40,369 INFO L273 TraceCheckUtils]: 379: Hoare triple {489389#true} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {489389#true} is VALID [2018-11-19 18:44:40,370 INFO L273 TraceCheckUtils]: 380: Hoare triple {489389#true} assume !(0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616);call #t~mem658.base, #t~mem658.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem659 := read~int(~union_desc~1.base, 3 + ~union_desc~1.offset, 1);call #t~ret660.base, #t~ret660.offset := usb_ifnum_to_if(#t~mem658.base, #t~mem658.offset, #t~mem659 % 256);call write~$Pointer$(#t~ret660.base, #t~ret660.offset, ~pcu.base, 79 + ~pcu.offset, 8);havoc #t~mem659;havoc #t~ret660.base, #t~ret660.offset;havoc #t~mem658.base, #t~mem658.offset;call #t~mem661.base, #t~mem661.offset := read~$Pointer$(~pcu.base, 79 + ~pcu.offset, 8);call #t~mem662.base, #t~mem662.offset := read~$Pointer$(#t~mem661.base, 8 + #t~mem661.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem662.base, #t~mem662.offset;havoc #t~mem662.base, #t~mem662.offset;havoc #t~mem661.base, #t~mem661.offset;call #t~mem663.base, #t~mem663.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem663.base, #t~mem663.offset, ~pcu.base, 87 + ~pcu.offset, 8);havoc #t~mem663.base, #t~mem663.offset;call #t~mem664.base, #t~mem664.offset := read~$Pointer$(~pcu.base, 87 + ~pcu.offset, 8); {489389#true} is VALID [2018-11-19 18:44:40,370 INFO L256 TraceCheckUtils]: 381: Hoare triple {489389#true} call #t~ret665 := usb_endpoint_maxp(#t~mem664.base, #t~mem664.offset); {489389#true} is VALID [2018-11-19 18:44:40,370 INFO L273 TraceCheckUtils]: 382: Hoare triple {489389#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {489389#true} is VALID [2018-11-19 18:44:40,370 INFO L273 TraceCheckUtils]: 383: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,370 INFO L268 TraceCheckUtils]: 384: Hoare quadruple {489389#true} {489389#true} #3139#return; {489389#true} is VALID [2018-11-19 18:44:40,370 INFO L273 TraceCheckUtils]: 385: Hoare triple {489389#true} assume -2147483648 <= #t~ret665 && #t~ret665 <= 2147483647;~tmp~37 := #t~ret665;havoc #t~ret665;havoc #t~mem664.base, #t~mem664.offset;call write~int(~tmp~37, ~pcu.base, 119 + ~pcu.offset, 4);call #t~mem666.base, #t~mem666.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem667 := read~int(~union_desc~1.base, 4 + ~union_desc~1.offset, 1);call #t~ret668.base, #t~ret668.offset := usb_ifnum_to_if(#t~mem666.base, #t~mem666.offset, #t~mem667 % 256);call write~$Pointer$(#t~ret668.base, #t~ret668.offset, ~pcu.base, 123 + ~pcu.offset, 8);havoc #t~mem666.base, #t~mem666.offset;havoc #t~mem667;havoc #t~ret668.base, #t~ret668.offset;call #t~mem669.base, #t~mem669.offset := read~$Pointer$(~pcu.base, 123 + ~pcu.offset, 8);call #t~mem670.base, #t~mem670.offset := read~$Pointer$(#t~mem669.base, 8 + #t~mem669.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem670.base, #t~mem670.offset;havoc #t~mem670.base, #t~mem670.offset;havoc #t~mem669.base, #t~mem669.offset;call #t~mem671 := read~int(~alt~0.base, 4 + ~alt~0.offset, 1); {489389#true} is VALID [2018-11-19 18:44:40,370 INFO L273 TraceCheckUtils]: 386: Hoare triple {489389#true} assume !(2 != #t~mem671 % 256 % 4294967296);havoc #t~mem671;call #t~mem676.base, #t~mem676.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem676.base, #t~mem676.offset, ~pcu.base, 167 + ~pcu.offset, 8);havoc #t~mem676.base, #t~mem676.offset;call #t~mem677.base, #t~mem677.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {489389#true} is VALID [2018-11-19 18:44:40,370 INFO L256 TraceCheckUtils]: 387: Hoare triple {489389#true} call #t~ret678 := usb_endpoint_is_bulk_out(#t~mem677.base, #t~mem677.offset); {489389#true} is VALID [2018-11-19 18:44:40,370 INFO L273 TraceCheckUtils]: 388: Hoare triple {489389#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~4;havoc ~tmp___0~1;havoc ~tmp___1~1; {489389#true} is VALID [2018-11-19 18:44:40,370 INFO L256 TraceCheckUtils]: 389: Hoare triple {489389#true} call #t~ret25 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {489389#true} is VALID [2018-11-19 18:44:40,371 INFO L273 TraceCheckUtils]: 390: Hoare triple {489389#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {489389#true} is VALID [2018-11-19 18:44:40,371 INFO L273 TraceCheckUtils]: 391: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,371 INFO L268 TraceCheckUtils]: 392: Hoare quadruple {489389#true} {489389#true} #2887#return; {489389#true} is VALID [2018-11-19 18:44:40,371 INFO L273 TraceCheckUtils]: 393: Hoare triple {489389#true} assume -2147483648 <= #t~ret25 && #t~ret25 <= 2147483647;~tmp~4 := #t~ret25;havoc #t~ret25; {489389#true} is VALID [2018-11-19 18:44:40,371 INFO L273 TraceCheckUtils]: 394: Hoare triple {489389#true} assume 0 != ~tmp~4; {489389#true} is VALID [2018-11-19 18:44:40,371 INFO L256 TraceCheckUtils]: 395: Hoare triple {489389#true} call #t~ret26 := usb_endpoint_dir_out(~epd.base, ~epd.offset); {489389#true} is VALID [2018-11-19 18:44:40,371 INFO L273 TraceCheckUtils]: 396: Hoare triple {489389#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem21 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem21 % 256 % 256 <= 127 then #t~mem21 % 256 % 256 else #t~mem21 % 256 % 256 - 256) >= 0 then 1 else 0);havoc #t~mem21; {489389#true} is VALID [2018-11-19 18:44:40,371 INFO L273 TraceCheckUtils]: 397: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,371 INFO L268 TraceCheckUtils]: 398: Hoare quadruple {489389#true} {489389#true} #2889#return; {489389#true} is VALID [2018-11-19 18:44:40,371 INFO L273 TraceCheckUtils]: 399: Hoare triple {489389#true} assume -2147483648 <= #t~ret26 && #t~ret26 <= 2147483647;~tmp___0~1 := #t~ret26;havoc #t~ret26; {489389#true} is VALID [2018-11-19 18:44:40,371 INFO L273 TraceCheckUtils]: 400: Hoare triple {489389#true} assume 0 != ~tmp___0~1;~tmp___1~1 := 1; {489389#true} is VALID [2018-11-19 18:44:40,372 INFO L273 TraceCheckUtils]: 401: Hoare triple {489389#true} #res := ~tmp___1~1; {489389#true} is VALID [2018-11-19 18:44:40,372 INFO L273 TraceCheckUtils]: 402: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,372 INFO L268 TraceCheckUtils]: 403: Hoare quadruple {489389#true} {489389#true} #3141#return; {489389#true} is VALID [2018-11-19 18:44:40,372 INFO L273 TraceCheckUtils]: 404: Hoare triple {489389#true} assume -2147483648 <= #t~ret678 && #t~ret678 <= 2147483647;~tmp___0~16 := #t~ret678;havoc #t~mem677.base, #t~mem677.offset;havoc #t~ret678; {489389#true} is VALID [2018-11-19 18:44:40,372 INFO L273 TraceCheckUtils]: 405: Hoare triple {489389#true} assume !(0 == ~tmp___0~16);call #t~mem682.base, #t~mem682.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {489389#true} is VALID [2018-11-19 18:44:40,372 INFO L256 TraceCheckUtils]: 406: Hoare triple {489389#true} call #t~ret683 := usb_endpoint_maxp(#t~mem682.base, #t~mem682.offset); {489389#true} is VALID [2018-11-19 18:44:40,372 INFO L273 TraceCheckUtils]: 407: Hoare triple {489389#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {489389#true} is VALID [2018-11-19 18:44:40,372 INFO L273 TraceCheckUtils]: 408: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,372 INFO L268 TraceCheckUtils]: 409: Hoare quadruple {489389#true} {489389#true} #3143#return; {489389#true} is VALID [2018-11-19 18:44:40,372 INFO L273 TraceCheckUtils]: 410: Hoare triple {489389#true} assume -2147483648 <= #t~ret683 && #t~ret683 <= 2147483647;~tmp___1~7 := #t~ret683;havoc #t~mem682.base, #t~mem682.offset;havoc #t~ret683;call write~int(~tmp___1~7, ~pcu.base, 183 + ~pcu.offset, 4);call #t~mem684 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {489389#true} is VALID [2018-11-19 18:44:40,373 INFO L273 TraceCheckUtils]: 411: Hoare triple {489389#true} assume !(#t~mem684 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem684;call #t~mem689.base, #t~mem689.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem689.base, 63 + #t~mem689.offset, ~pcu.base, 131 + ~pcu.offset, 8);havoc #t~mem689.base, #t~mem689.offset;call #t~mem690.base, #t~mem690.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {489389#true} is VALID [2018-11-19 18:44:40,373 INFO L256 TraceCheckUtils]: 412: Hoare triple {489389#true} call #t~ret691 := usb_endpoint_is_bulk_in(#t~mem690.base, #t~mem690.offset); {489389#true} is VALID [2018-11-19 18:44:40,373 INFO L273 TraceCheckUtils]: 413: Hoare triple {489389#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~3;havoc ~tmp___0~0;havoc ~tmp___1~0; {489389#true} is VALID [2018-11-19 18:44:40,373 INFO L256 TraceCheckUtils]: 414: Hoare triple {489389#true} call #t~ret23 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {489389#true} is VALID [2018-11-19 18:44:40,373 INFO L273 TraceCheckUtils]: 415: Hoare triple {489389#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {489389#true} is VALID [2018-11-19 18:44:40,373 INFO L273 TraceCheckUtils]: 416: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,373 INFO L268 TraceCheckUtils]: 417: Hoare quadruple {489389#true} {489389#true} #2915#return; {489389#true} is VALID [2018-11-19 18:44:40,373 INFO L273 TraceCheckUtils]: 418: Hoare triple {489389#true} assume -2147483648 <= #t~ret23 && #t~ret23 <= 2147483647;~tmp~3 := #t~ret23;havoc #t~ret23; {489389#true} is VALID [2018-11-19 18:44:40,373 INFO L273 TraceCheckUtils]: 419: Hoare triple {489389#true} assume 0 != ~tmp~3; {489389#true} is VALID [2018-11-19 18:44:40,373 INFO L256 TraceCheckUtils]: 420: Hoare triple {489389#true} call #t~ret24 := usb_endpoint_dir_in(~epd.base, ~epd.offset); {489389#true} is VALID [2018-11-19 18:44:40,373 INFO L273 TraceCheckUtils]: 421: Hoare triple {489389#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem20 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem20 % 256 % 256 <= 127 then #t~mem20 % 256 % 256 else #t~mem20 % 256 % 256 - 256) < 0 then 1 else 0);havoc #t~mem20; {489389#true} is VALID [2018-11-19 18:44:40,374 INFO L273 TraceCheckUtils]: 422: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,374 INFO L268 TraceCheckUtils]: 423: Hoare quadruple {489389#true} {489389#true} #2917#return; {489389#true} is VALID [2018-11-19 18:44:40,374 INFO L273 TraceCheckUtils]: 424: Hoare triple {489389#true} assume -2147483648 <= #t~ret24 && #t~ret24 <= 2147483647;~tmp___0~0 := #t~ret24;havoc #t~ret24; {489389#true} is VALID [2018-11-19 18:44:40,374 INFO L273 TraceCheckUtils]: 425: Hoare triple {489389#true} assume 0 != ~tmp___0~0;~tmp___1~0 := 1; {489389#true} is VALID [2018-11-19 18:44:40,374 INFO L273 TraceCheckUtils]: 426: Hoare triple {489389#true} #res := ~tmp___1~0; {489389#true} is VALID [2018-11-19 18:44:40,374 INFO L273 TraceCheckUtils]: 427: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,374 INFO L268 TraceCheckUtils]: 428: Hoare quadruple {489389#true} {489389#true} #3145#return; {489389#true} is VALID [2018-11-19 18:44:40,374 INFO L273 TraceCheckUtils]: 429: Hoare triple {489389#true} assume -2147483648 <= #t~ret691 && #t~ret691 <= 2147483647;~tmp___2~3 := #t~ret691;havoc #t~ret691;havoc #t~mem690.base, #t~mem690.offset; {489389#true} is VALID [2018-11-19 18:44:40,374 INFO L273 TraceCheckUtils]: 430: Hoare triple {489389#true} assume !(0 == ~tmp___2~3);call #t~mem695.base, #t~mem695.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {489389#true} is VALID [2018-11-19 18:44:40,374 INFO L256 TraceCheckUtils]: 431: Hoare triple {489389#true} call #t~ret696 := usb_endpoint_maxp(#t~mem695.base, #t~mem695.offset); {489389#true} is VALID [2018-11-19 18:44:40,375 INFO L273 TraceCheckUtils]: 432: Hoare triple {489389#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {489389#true} is VALID [2018-11-19 18:44:40,375 INFO L273 TraceCheckUtils]: 433: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,375 INFO L268 TraceCheckUtils]: 434: Hoare quadruple {489389#true} {489389#true} #3147#return; {489389#true} is VALID [2018-11-19 18:44:40,375 INFO L273 TraceCheckUtils]: 435: Hoare triple {489389#true} assume -2147483648 <= #t~ret696 && #t~ret696 <= 2147483647;~tmp___3~2 := #t~ret696;havoc #t~ret696;havoc #t~mem695.base, #t~mem695.offset;call write~int(~tmp___3~2, ~pcu.base, 163 + ~pcu.offset, 4);call #t~mem697 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {489389#true} is VALID [2018-11-19 18:44:40,375 INFO L273 TraceCheckUtils]: 436: Hoare triple {489389#true} assume !(#t~mem697 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem697;#res := 0; {489389#true} is VALID [2018-11-19 18:44:40,375 INFO L273 TraceCheckUtils]: 437: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,375 INFO L268 TraceCheckUtils]: 438: Hoare quadruple {489389#true} {489389#true} #3103#return; {489389#true} is VALID [2018-11-19 18:44:40,375 INFO L273 TraceCheckUtils]: 439: Hoare triple {489389#true} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {489389#true} is VALID [2018-11-19 18:44:40,375 INFO L273 TraceCheckUtils]: 440: Hoare triple {489389#true} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {489389#true} is VALID [2018-11-19 18:44:40,375 INFO L273 TraceCheckUtils]: 441: Hoare triple {489389#true} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {489389#true} is VALID [2018-11-19 18:44:40,375 INFO L256 TraceCheckUtils]: 442: Hoare triple {489389#true} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {489389#true} is VALID [2018-11-19 18:44:40,376 INFO L273 TraceCheckUtils]: 443: Hoare triple {489389#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {489389#true} is VALID [2018-11-19 18:44:40,376 INFO L256 TraceCheckUtils]: 444: Hoare triple {489389#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {489389#true} is VALID [2018-11-19 18:44:40,376 INFO L273 TraceCheckUtils]: 445: Hoare triple {489389#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {489389#true} is VALID [2018-11-19 18:44:40,376 INFO L273 TraceCheckUtils]: 446: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,376 INFO L268 TraceCheckUtils]: 447: Hoare quadruple {489389#true} {489389#true} #2541#return; {489389#true} is VALID [2018-11-19 18:44:40,376 INFO L273 TraceCheckUtils]: 448: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,376 INFO L268 TraceCheckUtils]: 449: Hoare quadruple {489389#true} {489389#true} #3105#return; {489389#true} is VALID [2018-11-19 18:44:40,376 INFO L273 TraceCheckUtils]: 450: Hoare triple {489389#true} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {489389#true} is VALID [2018-11-19 18:44:40,376 INFO L256 TraceCheckUtils]: 451: Hoare triple {489389#true} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {489389#true} is VALID [2018-11-19 18:44:40,376 INFO L273 TraceCheckUtils]: 452: Hoare triple {489389#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {489389#true} is VALID [2018-11-19 18:44:40,377 INFO L256 TraceCheckUtils]: 453: Hoare triple {489389#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {489389#true} is VALID [2018-11-19 18:44:40,377 INFO L273 TraceCheckUtils]: 454: Hoare triple {489389#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {489389#true} is VALID [2018-11-19 18:44:40,377 INFO L273 TraceCheckUtils]: 455: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,377 INFO L268 TraceCheckUtils]: 456: Hoare quadruple {489389#true} {489389#true} #2541#return; {489389#true} is VALID [2018-11-19 18:44:40,377 INFO L273 TraceCheckUtils]: 457: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,377 INFO L268 TraceCheckUtils]: 458: Hoare quadruple {489389#true} {489389#true} #3107#return; {489389#true} is VALID [2018-11-19 18:44:40,377 INFO L273 TraceCheckUtils]: 459: Hoare triple {489389#true} havoc #t~mem837.base, #t~mem837.offset; {489389#true} is VALID [2018-11-19 18:44:40,377 INFO L256 TraceCheckUtils]: 460: Hoare triple {489389#true} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {489389#true} is VALID [2018-11-19 18:44:40,377 INFO L273 TraceCheckUtils]: 461: Hoare triple {489389#true} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {489389#true} is VALID [2018-11-19 18:44:40,377 INFO L273 TraceCheckUtils]: 462: Hoare triple {489389#true} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {489389#true} is VALID [2018-11-19 18:44:40,377 INFO L256 TraceCheckUtils]: 463: Hoare triple {489389#true} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {489389#true} is VALID [2018-11-19 18:44:40,378 INFO L273 TraceCheckUtils]: 464: Hoare triple {489389#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {489389#true} is VALID [2018-11-19 18:44:40,378 INFO L256 TraceCheckUtils]: 465: Hoare triple {489389#true} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {489389#true} is VALID [2018-11-19 18:44:40,378 INFO L273 TraceCheckUtils]: 466: Hoare triple {489389#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {489389#true} is VALID [2018-11-19 18:44:40,378 INFO L256 TraceCheckUtils]: 467: Hoare triple {489389#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {489389#true} is VALID [2018-11-19 18:44:40,378 INFO L273 TraceCheckUtils]: 468: Hoare triple {489389#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {489389#true} is VALID [2018-11-19 18:44:40,378 INFO L273 TraceCheckUtils]: 469: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,378 INFO L268 TraceCheckUtils]: 470: Hoare quadruple {489389#true} {489389#true} #2605#return; {489389#true} is VALID [2018-11-19 18:44:40,378 INFO L273 TraceCheckUtils]: 471: Hoare triple {489389#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {489389#true} is VALID [2018-11-19 18:44:40,378 INFO L256 TraceCheckUtils]: 472: Hoare triple {489389#true} call #t~ret965 := ldv_undef_int(); {489389#true} is VALID [2018-11-19 18:44:40,378 INFO L273 TraceCheckUtils]: 473: Hoare triple {489389#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {489389#true} is VALID [2018-11-19 18:44:40,379 INFO L273 TraceCheckUtils]: 474: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,379 INFO L268 TraceCheckUtils]: 475: Hoare quadruple {489389#true} {489389#true} #2607#return; {489389#true} is VALID [2018-11-19 18:44:40,379 INFO L273 TraceCheckUtils]: 476: Hoare triple {489389#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {489389#true} is VALID [2018-11-19 18:44:40,379 INFO L273 TraceCheckUtils]: 477: Hoare triple {489389#true} assume 0 != ~tmp___0~26; {489389#true} is VALID [2018-11-19 18:44:40,380 INFO L273 TraceCheckUtils]: 478: Hoare triple {489389#true} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {489391#(<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (* 18446744073709551616 (div (+ ~usb_urb~0.offset (+ ~usb_urb~0.base (- 1))) 18446744073709551616)) 18446744073709551615))} is VALID [2018-11-19 18:44:40,381 INFO L273 TraceCheckUtils]: 479: Hoare triple {489391#(<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (* 18446744073709551616 (div (+ ~usb_urb~0.offset (+ ~usb_urb~0.base (- 1))) 18446744073709551616)) 18446744073709551615))} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {489392#(<= (+ |ldv_alloc_urb_#res.base| |ldv_alloc_urb_#res.offset|) (+ (* 18446744073709551616 (div (+ |ldv_alloc_urb_#res.offset| (+ |ldv_alloc_urb_#res.base| (- 1))) 18446744073709551616)) 18446744073709551615))} is VALID [2018-11-19 18:44:40,381 INFO L273 TraceCheckUtils]: 480: Hoare triple {489392#(<= (+ |ldv_alloc_urb_#res.base| |ldv_alloc_urb_#res.offset|) (+ (* 18446744073709551616 (div (+ |ldv_alloc_urb_#res.offset| (+ |ldv_alloc_urb_#res.base| (- 1))) 18446744073709551616)) 18446744073709551615))} assume true; {489392#(<= (+ |ldv_alloc_urb_#res.base| |ldv_alloc_urb_#res.offset|) (+ (* 18446744073709551616 (div (+ |ldv_alloc_urb_#res.offset| (+ |ldv_alloc_urb_#res.base| (- 1))) 18446744073709551616)) 18446744073709551615))} is VALID [2018-11-19 18:44:40,382 INFO L268 TraceCheckUtils]: 481: Hoare quadruple {489392#(<= (+ |ldv_alloc_urb_#res.base| |ldv_alloc_urb_#res.offset|) (+ (* 18446744073709551616 (div (+ |ldv_alloc_urb_#res.offset| (+ |ldv_alloc_urb_#res.base| (- 1))) 18446744073709551616)) 18446744073709551615))} {489389#true} #3135#return; {489393#(<= (+ |ldv_usb_alloc_urb_9_#t~ret959.offset| |ldv_usb_alloc_urb_9_#t~ret959.base|) (+ (* 18446744073709551616 (div (+ |ldv_usb_alloc_urb_9_#t~ret959.offset| (+ |ldv_usb_alloc_urb_9_#t~ret959.base| (- 1))) 18446744073709551616)) 18446744073709551615))} is VALID [2018-11-19 18:44:40,382 INFO L273 TraceCheckUtils]: 482: Hoare triple {489393#(<= (+ |ldv_usb_alloc_urb_9_#t~ret959.offset| |ldv_usb_alloc_urb_9_#t~ret959.base|) (+ (* 18446744073709551616 (div (+ |ldv_usb_alloc_urb_9_#t~ret959.offset| (+ |ldv_usb_alloc_urb_9_#t~ret959.base| (- 1))) 18446744073709551616)) 18446744073709551615))} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {489394#(<= (+ |ldv_usb_alloc_urb_9_#res.base| |ldv_usb_alloc_urb_9_#res.offset|) (+ (* 18446744073709551616 (div (+ |ldv_usb_alloc_urb_9_#res.offset| (+ |ldv_usb_alloc_urb_9_#res.base| (- 1))) 18446744073709551616)) 18446744073709551615))} is VALID [2018-11-19 18:44:40,383 INFO L273 TraceCheckUtils]: 483: Hoare triple {489394#(<= (+ |ldv_usb_alloc_urb_9_#res.base| |ldv_usb_alloc_urb_9_#res.offset|) (+ (* 18446744073709551616 (div (+ |ldv_usb_alloc_urb_9_#res.offset| (+ |ldv_usb_alloc_urb_9_#res.base| (- 1))) 18446744073709551616)) 18446744073709551615))} assume true; {489394#(<= (+ |ldv_usb_alloc_urb_9_#res.base| |ldv_usb_alloc_urb_9_#res.offset|) (+ (* 18446744073709551616 (div (+ |ldv_usb_alloc_urb_9_#res.offset| (+ |ldv_usb_alloc_urb_9_#res.base| (- 1))) 18446744073709551616)) 18446744073709551615))} is VALID [2018-11-19 18:44:40,384 INFO L268 TraceCheckUtils]: 484: Hoare quadruple {489394#(<= (+ |ldv_usb_alloc_urb_9_#res.base| |ldv_usb_alloc_urb_9_#res.offset|) (+ (* 18446744073709551616 (div (+ |ldv_usb_alloc_urb_9_#res.offset| (+ |ldv_usb_alloc_urb_9_#res.base| (- 1))) 18446744073709551616)) 18446744073709551615))} {489389#true} #2709#return; {489395#(<= (+ |ims_pcu_buffers_alloc_#t~ret560.base| |ims_pcu_buffers_alloc_#t~ret560.offset|) (+ (* 18446744073709551616 (div (+ |ims_pcu_buffers_alloc_#t~ret560.offset| (+ |ims_pcu_buffers_alloc_#t~ret560.base| (- 1))) 18446744073709551616)) 18446744073709551615))} is VALID [2018-11-19 18:44:40,385 INFO L273 TraceCheckUtils]: 485: Hoare triple {489395#(<= (+ |ims_pcu_buffers_alloc_#t~ret560.base| |ims_pcu_buffers_alloc_#t~ret560.offset|) (+ (* 18446744073709551616 (div (+ |ims_pcu_buffers_alloc_#t~ret560.offset| (+ |ims_pcu_buffers_alloc_#t~ret560.base| (- 1))) 18446744073709551616)) 18446744073709551615))} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {489396#(<= (+ (* 18446744073709551616 (div (+ |ims_pcu_buffers_alloc_#t~mem561.offset| |ims_pcu_buffers_alloc_#t~mem561.base|) 18446744073709551616)) 1) (+ |ims_pcu_buffers_alloc_#t~mem561.offset| |ims_pcu_buffers_alloc_#t~mem561.base|))} is VALID [2018-11-19 18:44:40,387 INFO L273 TraceCheckUtils]: 486: Hoare triple {489396#(<= (+ (* 18446744073709551616 (div (+ |ims_pcu_buffers_alloc_#t~mem561.offset| |ims_pcu_buffers_alloc_#t~mem561.base|) 18446744073709551616)) 1) (+ |ims_pcu_buffers_alloc_#t~mem561.offset| |ims_pcu_buffers_alloc_#t~mem561.base|))} assume 0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616;havoc #t~mem561.base, #t~mem561.offset;havoc #t~nondet562;call #t~mem563.base, #t~mem563.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem563.base, #t~mem563.offset;~error~18 := -12; {489390#false} is VALID [2018-11-19 18:44:40,387 INFO L273 TraceCheckUtils]: 487: Hoare triple {489390#false} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {489390#false} is VALID [2018-11-19 18:44:40,387 INFO L273 TraceCheckUtils]: 488: Hoare triple {489390#false} assume true; {489390#false} is VALID [2018-11-19 18:44:40,387 INFO L268 TraceCheckUtils]: 489: Hoare quadruple {489390#false} {489389#true} #3109#return; {489390#false} is VALID [2018-11-19 18:44:40,388 INFO L273 TraceCheckUtils]: 490: Hoare triple {489390#false} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {489390#false} is VALID [2018-11-19 18:44:40,388 INFO L273 TraceCheckUtils]: 491: Hoare triple {489390#false} assume 0 != ~error~25; {489390#false} is VALID [2018-11-19 18:44:40,388 INFO L273 TraceCheckUtils]: 492: Hoare triple {489390#false} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {489390#false} is VALID [2018-11-19 18:44:40,388 INFO L273 TraceCheckUtils]: 493: Hoare triple {489390#false} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {489390#false} is VALID [2018-11-19 18:44:40,388 INFO L273 TraceCheckUtils]: 494: Hoare triple {489390#false} assume true; {489390#false} is VALID [2018-11-19 18:44:40,388 INFO L268 TraceCheckUtils]: 495: Hoare quadruple {489390#false} {489389#true} #3015#return; {489390#false} is VALID [2018-11-19 18:44:40,389 INFO L273 TraceCheckUtils]: 496: Hoare triple {489390#false} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {489390#false} is VALID [2018-11-19 18:44:40,389 INFO L273 TraceCheckUtils]: 497: Hoare triple {489390#false} assume !(0 == ~ldv_retval_3~0); {489390#false} is VALID [2018-11-19 18:44:40,389 INFO L273 TraceCheckUtils]: 498: Hoare triple {489390#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {489390#false} is VALID [2018-11-19 18:44:40,389 INFO L273 TraceCheckUtils]: 499: Hoare triple {489390#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {489390#false} is VALID [2018-11-19 18:44:40,389 INFO L273 TraceCheckUtils]: 500: Hoare triple {489390#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {489390#false} is VALID [2018-11-19 18:44:40,390 INFO L273 TraceCheckUtils]: 501: Hoare triple {489390#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {489390#false} is VALID [2018-11-19 18:44:40,390 INFO L273 TraceCheckUtils]: 502: Hoare triple {489390#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {489390#false} is VALID [2018-11-19 18:44:40,390 INFO L273 TraceCheckUtils]: 503: Hoare triple {489390#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {489390#false} is VALID [2018-11-19 18:44:40,390 INFO L273 TraceCheckUtils]: 504: Hoare triple {489390#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {489390#false} is VALID [2018-11-19 18:44:40,390 INFO L273 TraceCheckUtils]: 505: Hoare triple {489390#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {489390#false} is VALID [2018-11-19 18:44:40,390 INFO L273 TraceCheckUtils]: 506: Hoare triple {489390#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {489390#false} is VALID [2018-11-19 18:44:40,391 INFO L273 TraceCheckUtils]: 507: Hoare triple {489390#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {489390#false} is VALID [2018-11-19 18:44:40,391 INFO L273 TraceCheckUtils]: 508: Hoare triple {489390#false} assume #t~switch909; {489390#false} is VALID [2018-11-19 18:44:40,391 INFO L273 TraceCheckUtils]: 509: Hoare triple {489390#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {489390#false} is VALID [2018-11-19 18:44:40,391 INFO L273 TraceCheckUtils]: 510: Hoare triple {489390#false} assume #t~switch947; {489390#false} is VALID [2018-11-19 18:44:40,391 INFO L273 TraceCheckUtils]: 511: Hoare triple {489390#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {489390#false} is VALID [2018-11-19 18:44:40,391 INFO L256 TraceCheckUtils]: 512: Hoare triple {489390#false} call ims_pcu_driver_exit(); {489389#true} is VALID [2018-11-19 18:44:40,392 INFO L256 TraceCheckUtils]: 513: Hoare triple {489389#true} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {489389#true} is VALID [2018-11-19 18:44:40,392 INFO L273 TraceCheckUtils]: 514: Hoare triple {489389#true} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {489389#true} is VALID [2018-11-19 18:44:40,392 INFO L273 TraceCheckUtils]: 515: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,392 INFO L268 TraceCheckUtils]: 516: Hoare quadruple {489389#true} {489389#true} #2597#return; {489389#true} is VALID [2018-11-19 18:44:40,392 INFO L273 TraceCheckUtils]: 517: Hoare triple {489389#true} assume true; {489389#true} is VALID [2018-11-19 18:44:40,392 INFO L268 TraceCheckUtils]: 518: Hoare quadruple {489389#true} {489390#false} #3033#return; {489390#false} is VALID [2018-11-19 18:44:40,392 INFO L273 TraceCheckUtils]: 519: Hoare triple {489390#false} ~ldv_state_variable_0~0 := 2; {489390#false} is VALID [2018-11-19 18:44:40,392 INFO L256 TraceCheckUtils]: 520: Hoare triple {489390#false} call ldv_check_final_state(); {489390#false} is VALID [2018-11-19 18:44:40,392 INFO L273 TraceCheckUtils]: 521: Hoare triple {489390#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {489390#false} is VALID [2018-11-19 18:44:40,392 INFO L256 TraceCheckUtils]: 522: Hoare triple {489390#false} call ldv_error(); {489390#false} is VALID [2018-11-19 18:44:40,393 INFO L273 TraceCheckUtils]: 523: Hoare triple {489390#false} assume !false; {489390#false} is VALID [2018-11-19 18:44:40,509 INFO L134 CoverageAnalysis]: Checked inductivity of 2730 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 2708 trivial. 0 not checked. [2018-11-19 18:44:40,509 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:44:40,509 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-19 18:44:40,510 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 524 [2018-11-19 18:44:40,510 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:44:40,511 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states. [2018-11-19 18:44:40,952 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 389 edges. 389 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:44:40,952 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-19 18:44:40,953 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-19 18:44:40,953 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-19 18:44:40,953 INFO L87 Difference]: Start difference. First operand 7320 states and 9879 transitions. Second operand 8 states. [2018-11-19 18:45:43,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:45:43,045 INFO L93 Difference]: Finished difference Result 14128 states and 19056 transitions. [2018-11-19 18:45:43,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-19 18:45:43,045 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 524 [2018-11-19 18:45:43,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:45:43,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-19 18:45:43,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 4862 transitions. [2018-11-19 18:45:43,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-19 18:45:43,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 4862 transitions. [2018-11-19 18:45:43,220 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states and 4862 transitions. [2018-11-19 18:45:48,206 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 4862 edges. 4862 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:45:50,492 INFO L225 Difference]: With dead ends: 14128 [2018-11-19 18:45:50,492 INFO L226 Difference]: Without dead ends: 7320 [2018-11-19 18:45:50,501 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-11-19 18:45:50,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7320 states. [2018-11-19 18:46:07,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7320 to 7320. [2018-11-19 18:46:07,316 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:46:07,316 INFO L82 GeneralOperation]: Start isEquivalent. First operand 7320 states. Second operand 7320 states. [2018-11-19 18:46:07,316 INFO L74 IsIncluded]: Start isIncluded. First operand 7320 states. Second operand 7320 states. [2018-11-19 18:46:07,316 INFO L87 Difference]: Start difference. First operand 7320 states. Second operand 7320 states. [2018-11-19 18:46:09,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:46:09,038 INFO L93 Difference]: Finished difference Result 7320 states and 9877 transitions. [2018-11-19 18:46:09,038 INFO L276 IsEmpty]: Start isEmpty. Operand 7320 states and 9877 transitions. [2018-11-19 18:46:09,047 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:46:09,047 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:46:09,048 INFO L74 IsIncluded]: Start isIncluded. First operand 7320 states. Second operand 7320 states. [2018-11-19 18:46:09,048 INFO L87 Difference]: Start difference. First operand 7320 states. Second operand 7320 states. [2018-11-19 18:46:10,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:46:10,760 INFO L93 Difference]: Finished difference Result 7320 states and 9877 transitions. [2018-11-19 18:46:10,760 INFO L276 IsEmpty]: Start isEmpty. Operand 7320 states and 9877 transitions. [2018-11-19 18:46:10,769 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:46:10,769 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:46:10,769 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:46:10,769 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:46:10,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7320 states. [2018-11-19 18:46:12,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7320 states to 7320 states and 9877 transitions. [2018-11-19 18:46:12,861 INFO L78 Accepts]: Start accepts. Automaton has 7320 states and 9877 transitions. Word has length 524 [2018-11-19 18:46:12,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:46:12,861 INFO L480 AbstractCegarLoop]: Abstraction has 7320 states and 9877 transitions. [2018-11-19 18:46:12,861 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-19 18:46:12,861 INFO L276 IsEmpty]: Start isEmpty. Operand 7320 states and 9877 transitions. [2018-11-19 18:46:12,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 568 [2018-11-19 18:46:12,870 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:46:12,871 INFO L384 BasicCegarLoop]: trace histogram [37, 37, 37, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:46:12,871 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:46:12,871 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:46:12,872 INFO L82 PathProgramCache]: Analyzing trace with hash 961391038, now seen corresponding path program 1 times [2018-11-19 18:46:12,872 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:46:12,872 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:46:12,873 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:46:12,873 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-19 18:46:12,873 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:46:14,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:46:15,284 INFO L256 TraceCheckUtils]: 0: Hoare triple {532502#true} call ULTIMATE.init(); {532502#true} is VALID [2018-11-19 18:46:15,284 INFO L273 TraceCheckUtils]: 1: Hoare triple {532502#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,285 INFO L273 TraceCheckUtils]: 2: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,285 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {532502#true} {532502#true} #3175#return; {532502#true} is VALID [2018-11-19 18:46:15,285 INFO L256 TraceCheckUtils]: 4: Hoare triple {532502#true} call #t~ret973 := main(); {532502#true} is VALID [2018-11-19 18:46:15,285 INFO L273 TraceCheckUtils]: 5: Hoare triple {532502#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {532502#true} is VALID [2018-11-19 18:46:15,286 INFO L256 TraceCheckUtils]: 6: Hoare triple {532502#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {532502#true} is VALID [2018-11-19 18:46:15,286 INFO L273 TraceCheckUtils]: 7: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,286 INFO L273 TraceCheckUtils]: 8: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,286 INFO L273 TraceCheckUtils]: 9: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,286 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {532502#true} {532502#true} #2927#return; {532502#true} is VALID [2018-11-19 18:46:15,286 INFO L273 TraceCheckUtils]: 11: Hoare triple {532502#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {532502#true} is VALID [2018-11-19 18:46:15,287 INFO L256 TraceCheckUtils]: 12: Hoare triple {532502#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {532502#true} is VALID [2018-11-19 18:46:15,287 INFO L273 TraceCheckUtils]: 13: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,287 INFO L273 TraceCheckUtils]: 14: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,287 INFO L273 TraceCheckUtils]: 15: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,287 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {532502#true} {532502#true} #2929#return; {532502#true} is VALID [2018-11-19 18:46:15,287 INFO L273 TraceCheckUtils]: 17: Hoare triple {532502#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {532502#true} is VALID [2018-11-19 18:46:15,287 INFO L256 TraceCheckUtils]: 18: Hoare triple {532502#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {532502#true} is VALID [2018-11-19 18:46:15,288 INFO L273 TraceCheckUtils]: 19: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,288 INFO L273 TraceCheckUtils]: 20: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,288 INFO L273 TraceCheckUtils]: 21: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,288 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {532502#true} {532502#true} #2931#return; {532502#true} is VALID [2018-11-19 18:46:15,288 INFO L273 TraceCheckUtils]: 23: Hoare triple {532502#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {532502#true} is VALID [2018-11-19 18:46:15,288 INFO L256 TraceCheckUtils]: 24: Hoare triple {532502#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {532502#true} is VALID [2018-11-19 18:46:15,289 INFO L273 TraceCheckUtils]: 25: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,289 INFO L273 TraceCheckUtils]: 26: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,289 INFO L273 TraceCheckUtils]: 27: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,289 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {532502#true} {532502#true} #2933#return; {532502#true} is VALID [2018-11-19 18:46:15,289 INFO L273 TraceCheckUtils]: 29: Hoare triple {532502#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {532502#true} is VALID [2018-11-19 18:46:15,289 INFO L256 TraceCheckUtils]: 30: Hoare triple {532502#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {532502#true} is VALID [2018-11-19 18:46:15,289 INFO L273 TraceCheckUtils]: 31: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,290 INFO L273 TraceCheckUtils]: 32: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,290 INFO L273 TraceCheckUtils]: 33: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,290 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {532502#true} {532502#true} #2935#return; {532502#true} is VALID [2018-11-19 18:46:15,290 INFO L273 TraceCheckUtils]: 35: Hoare triple {532502#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {532502#true} is VALID [2018-11-19 18:46:15,290 INFO L256 TraceCheckUtils]: 36: Hoare triple {532502#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {532502#true} is VALID [2018-11-19 18:46:15,290 INFO L273 TraceCheckUtils]: 37: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,290 INFO L273 TraceCheckUtils]: 38: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,291 INFO L273 TraceCheckUtils]: 39: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,291 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {532502#true} {532502#true} #2937#return; {532502#true} is VALID [2018-11-19 18:46:15,291 INFO L273 TraceCheckUtils]: 41: Hoare triple {532502#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {532502#true} is VALID [2018-11-19 18:46:15,291 INFO L256 TraceCheckUtils]: 42: Hoare triple {532502#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {532502#true} is VALID [2018-11-19 18:46:15,291 INFO L273 TraceCheckUtils]: 43: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,291 INFO L273 TraceCheckUtils]: 44: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,292 INFO L273 TraceCheckUtils]: 45: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,292 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {532502#true} {532502#true} #2939#return; {532502#true} is VALID [2018-11-19 18:46:15,292 INFO L273 TraceCheckUtils]: 47: Hoare triple {532502#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {532502#true} is VALID [2018-11-19 18:46:15,292 INFO L256 TraceCheckUtils]: 48: Hoare triple {532502#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {532502#true} is VALID [2018-11-19 18:46:15,292 INFO L273 TraceCheckUtils]: 49: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,292 INFO L273 TraceCheckUtils]: 50: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,293 INFO L273 TraceCheckUtils]: 51: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,293 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {532502#true} {532502#true} #2941#return; {532502#true} is VALID [2018-11-19 18:46:15,293 INFO L273 TraceCheckUtils]: 53: Hoare triple {532502#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {532502#true} is VALID [2018-11-19 18:46:15,293 INFO L256 TraceCheckUtils]: 54: Hoare triple {532502#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {532502#true} is VALID [2018-11-19 18:46:15,293 INFO L273 TraceCheckUtils]: 55: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,293 INFO L273 TraceCheckUtils]: 56: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,293 INFO L273 TraceCheckUtils]: 57: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,294 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {532502#true} {532502#true} #2943#return; {532502#true} is VALID [2018-11-19 18:46:15,294 INFO L273 TraceCheckUtils]: 59: Hoare triple {532502#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {532502#true} is VALID [2018-11-19 18:46:15,294 INFO L256 TraceCheckUtils]: 60: Hoare triple {532502#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {532502#true} is VALID [2018-11-19 18:46:15,294 INFO L273 TraceCheckUtils]: 61: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,294 INFO L273 TraceCheckUtils]: 62: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,294 INFO L273 TraceCheckUtils]: 63: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,295 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {532502#true} {532502#true} #2945#return; {532502#true} is VALID [2018-11-19 18:46:15,295 INFO L273 TraceCheckUtils]: 65: Hoare triple {532502#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {532502#true} is VALID [2018-11-19 18:46:15,295 INFO L256 TraceCheckUtils]: 66: Hoare triple {532502#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {532502#true} is VALID [2018-11-19 18:46:15,295 INFO L273 TraceCheckUtils]: 67: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,295 INFO L273 TraceCheckUtils]: 68: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,295 INFO L273 TraceCheckUtils]: 69: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,296 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {532502#true} {532502#true} #2947#return; {532502#true} is VALID [2018-11-19 18:46:15,296 INFO L273 TraceCheckUtils]: 71: Hoare triple {532502#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {532502#true} is VALID [2018-11-19 18:46:15,296 INFO L256 TraceCheckUtils]: 72: Hoare triple {532502#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {532502#true} is VALID [2018-11-19 18:46:15,296 INFO L273 TraceCheckUtils]: 73: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,296 INFO L273 TraceCheckUtils]: 74: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,296 INFO L273 TraceCheckUtils]: 75: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,297 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {532502#true} {532502#true} #2949#return; {532502#true} is VALID [2018-11-19 18:46:15,297 INFO L273 TraceCheckUtils]: 77: Hoare triple {532502#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {532502#true} is VALID [2018-11-19 18:46:15,297 INFO L256 TraceCheckUtils]: 78: Hoare triple {532502#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {532502#true} is VALID [2018-11-19 18:46:15,297 INFO L273 TraceCheckUtils]: 79: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,297 INFO L273 TraceCheckUtils]: 80: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,297 INFO L273 TraceCheckUtils]: 81: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,298 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {532502#true} {532502#true} #2951#return; {532502#true} is VALID [2018-11-19 18:46:15,298 INFO L273 TraceCheckUtils]: 83: Hoare triple {532502#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,298 INFO L256 TraceCheckUtils]: 84: Hoare triple {532502#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {532502#true} is VALID [2018-11-19 18:46:15,298 INFO L273 TraceCheckUtils]: 85: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,298 INFO L273 TraceCheckUtils]: 86: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,298 INFO L273 TraceCheckUtils]: 87: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,298 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {532502#true} {532502#true} #2953#return; {532502#true} is VALID [2018-11-19 18:46:15,299 INFO L273 TraceCheckUtils]: 89: Hoare triple {532502#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,299 INFO L256 TraceCheckUtils]: 90: Hoare triple {532502#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {532502#true} is VALID [2018-11-19 18:46:15,299 INFO L273 TraceCheckUtils]: 91: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,299 INFO L273 TraceCheckUtils]: 92: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,299 INFO L273 TraceCheckUtils]: 93: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,299 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {532502#true} {532502#true} #2955#return; {532502#true} is VALID [2018-11-19 18:46:15,300 INFO L273 TraceCheckUtils]: 95: Hoare triple {532502#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {532502#true} is VALID [2018-11-19 18:46:15,300 INFO L256 TraceCheckUtils]: 96: Hoare triple {532502#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {532502#true} is VALID [2018-11-19 18:46:15,300 INFO L273 TraceCheckUtils]: 97: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,300 INFO L273 TraceCheckUtils]: 98: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,300 INFO L273 TraceCheckUtils]: 99: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,300 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {532502#true} {532502#true} #2957#return; {532502#true} is VALID [2018-11-19 18:46:15,301 INFO L273 TraceCheckUtils]: 101: Hoare triple {532502#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,301 INFO L256 TraceCheckUtils]: 102: Hoare triple {532502#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {532502#true} is VALID [2018-11-19 18:46:15,301 INFO L273 TraceCheckUtils]: 103: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,301 INFO L273 TraceCheckUtils]: 104: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,301 INFO L273 TraceCheckUtils]: 105: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,301 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {532502#true} {532502#true} #2959#return; {532502#true} is VALID [2018-11-19 18:46:15,301 INFO L273 TraceCheckUtils]: 107: Hoare triple {532502#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,302 INFO L256 TraceCheckUtils]: 108: Hoare triple {532502#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {532502#true} is VALID [2018-11-19 18:46:15,302 INFO L273 TraceCheckUtils]: 109: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,302 INFO L273 TraceCheckUtils]: 110: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,302 INFO L273 TraceCheckUtils]: 111: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,302 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {532502#true} {532502#true} #2961#return; {532502#true} is VALID [2018-11-19 18:46:15,302 INFO L273 TraceCheckUtils]: 113: Hoare triple {532502#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,302 INFO L256 TraceCheckUtils]: 114: Hoare triple {532502#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {532502#true} is VALID [2018-11-19 18:46:15,303 INFO L273 TraceCheckUtils]: 115: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,303 INFO L273 TraceCheckUtils]: 116: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,303 INFO L273 TraceCheckUtils]: 117: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,303 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {532502#true} {532502#true} #2963#return; {532502#true} is VALID [2018-11-19 18:46:15,303 INFO L273 TraceCheckUtils]: 119: Hoare triple {532502#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {532502#true} is VALID [2018-11-19 18:46:15,303 INFO L256 TraceCheckUtils]: 120: Hoare triple {532502#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {532502#true} is VALID [2018-11-19 18:46:15,304 INFO L273 TraceCheckUtils]: 121: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,304 INFO L273 TraceCheckUtils]: 122: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,304 INFO L273 TraceCheckUtils]: 123: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,304 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {532502#true} {532502#true} #2965#return; {532502#true} is VALID [2018-11-19 18:46:15,304 INFO L273 TraceCheckUtils]: 125: Hoare triple {532502#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,304 INFO L256 TraceCheckUtils]: 126: Hoare triple {532502#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {532502#true} is VALID [2018-11-19 18:46:15,304 INFO L273 TraceCheckUtils]: 127: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,305 INFO L273 TraceCheckUtils]: 128: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,305 INFO L273 TraceCheckUtils]: 129: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,305 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {532502#true} {532502#true} #2967#return; {532502#true} is VALID [2018-11-19 18:46:15,305 INFO L273 TraceCheckUtils]: 131: Hoare triple {532502#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {532502#true} is VALID [2018-11-19 18:46:15,305 INFO L256 TraceCheckUtils]: 132: Hoare triple {532502#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {532502#true} is VALID [2018-11-19 18:46:15,305 INFO L273 TraceCheckUtils]: 133: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,306 INFO L273 TraceCheckUtils]: 134: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,306 INFO L273 TraceCheckUtils]: 135: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,306 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {532502#true} {532502#true} #2969#return; {532502#true} is VALID [2018-11-19 18:46:15,306 INFO L273 TraceCheckUtils]: 137: Hoare triple {532502#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,306 INFO L256 TraceCheckUtils]: 138: Hoare triple {532502#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {532502#true} is VALID [2018-11-19 18:46:15,306 INFO L273 TraceCheckUtils]: 139: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,306 INFO L273 TraceCheckUtils]: 140: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,307 INFO L273 TraceCheckUtils]: 141: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,307 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {532502#true} {532502#true} #2971#return; {532502#true} is VALID [2018-11-19 18:46:15,307 INFO L273 TraceCheckUtils]: 143: Hoare triple {532502#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,307 INFO L256 TraceCheckUtils]: 144: Hoare triple {532502#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {532502#true} is VALID [2018-11-19 18:46:15,307 INFO L273 TraceCheckUtils]: 145: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,307 INFO L273 TraceCheckUtils]: 146: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,308 INFO L273 TraceCheckUtils]: 147: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,308 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {532502#true} {532502#true} #2973#return; {532502#true} is VALID [2018-11-19 18:46:15,308 INFO L273 TraceCheckUtils]: 149: Hoare triple {532502#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {532502#true} is VALID [2018-11-19 18:46:15,308 INFO L256 TraceCheckUtils]: 150: Hoare triple {532502#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {532502#true} is VALID [2018-11-19 18:46:15,308 INFO L273 TraceCheckUtils]: 151: Hoare triple {532502#true} #t~loopctr974 := 0; {532502#true} is VALID [2018-11-19 18:46:15,308 INFO L273 TraceCheckUtils]: 152: Hoare triple {532502#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {532502#true} is VALID [2018-11-19 18:46:15,308 INFO L273 TraceCheckUtils]: 153: Hoare triple {532502#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {532502#true} is VALID [2018-11-19 18:46:15,309 INFO L273 TraceCheckUtils]: 154: Hoare triple {532502#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {532502#true} is VALID [2018-11-19 18:46:15,309 INFO L273 TraceCheckUtils]: 155: Hoare triple {532502#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {532502#true} is VALID [2018-11-19 18:46:15,309 INFO L273 TraceCheckUtils]: 156: Hoare triple {532502#true} assume !(#t~loopctr974 < #amount); {532502#true} is VALID [2018-11-19 18:46:15,309 INFO L273 TraceCheckUtils]: 157: Hoare triple {532502#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {532502#true} is VALID [2018-11-19 18:46:15,309 INFO L268 TraceCheckUtils]: 158: Hoare quadruple {532502#true} {532502#true} #2975#return; {532502#true} is VALID [2018-11-19 18:46:15,309 INFO L273 TraceCheckUtils]: 159: Hoare triple {532502#true} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {532502#true} is VALID [2018-11-19 18:46:15,309 INFO L273 TraceCheckUtils]: 160: Hoare triple {532502#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,310 INFO L273 TraceCheckUtils]: 161: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,310 INFO L273 TraceCheckUtils]: 162: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,310 INFO L273 TraceCheckUtils]: 163: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,310 INFO L273 TraceCheckUtils]: 164: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,310 INFO L273 TraceCheckUtils]: 165: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,310 INFO L273 TraceCheckUtils]: 166: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,311 INFO L273 TraceCheckUtils]: 167: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,311 INFO L273 TraceCheckUtils]: 168: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,311 INFO L273 TraceCheckUtils]: 169: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,311 INFO L273 TraceCheckUtils]: 170: Hoare triple {532502#true} assume #t~switch909; {532502#true} is VALID [2018-11-19 18:46:15,311 INFO L273 TraceCheckUtils]: 171: Hoare triple {532502#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {532502#true} is VALID [2018-11-19 18:46:15,311 INFO L273 TraceCheckUtils]: 172: Hoare triple {532502#true} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {532502#true} is VALID [2018-11-19 18:46:15,311 INFO L273 TraceCheckUtils]: 173: Hoare triple {532502#true} assume #t~switch947; {532502#true} is VALID [2018-11-19 18:46:15,312 INFO L273 TraceCheckUtils]: 174: Hoare triple {532502#true} assume 1 == ~ldv_state_variable_0~0; {532502#true} is VALID [2018-11-19 18:46:15,312 INFO L256 TraceCheckUtils]: 175: Hoare triple {532502#true} call #t~ret948 := ims_pcu_driver_init(); {532502#true} is VALID [2018-11-19 18:46:15,312 INFO L273 TraceCheckUtils]: 176: Hoare triple {532502#true} havoc ~tmp~46; {532502#true} is VALID [2018-11-19 18:46:15,312 INFO L256 TraceCheckUtils]: 177: Hoare triple {532502#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {532502#true} is VALID [2018-11-19 18:46:15,312 INFO L273 TraceCheckUtils]: 178: Hoare triple {532502#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {532502#true} is VALID [2018-11-19 18:46:15,312 INFO L256 TraceCheckUtils]: 179: Hoare triple {532502#true} call ldv_usb_driver_1(); {532502#true} is VALID [2018-11-19 18:46:15,312 INFO L273 TraceCheckUtils]: 180: Hoare triple {532502#true} havoc ~tmp~53.base, ~tmp~53.offset; {532502#true} is VALID [2018-11-19 18:46:15,313 INFO L256 TraceCheckUtils]: 181: Hoare triple {532502#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {532502#true} is VALID [2018-11-19 18:46:15,313 INFO L273 TraceCheckUtils]: 182: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,313 INFO L273 TraceCheckUtils]: 183: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,313 INFO L273 TraceCheckUtils]: 184: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,313 INFO L268 TraceCheckUtils]: 185: Hoare quadruple {532502#true} {532502#true} #2613#return; {532502#true} is VALID [2018-11-19 18:46:15,313 INFO L273 TraceCheckUtils]: 186: Hoare triple {532502#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {532502#true} is VALID [2018-11-19 18:46:15,314 INFO L273 TraceCheckUtils]: 187: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,314 INFO L268 TraceCheckUtils]: 188: Hoare quadruple {532502#true} {532502#true} #2537#return; {532502#true} is VALID [2018-11-19 18:46:15,314 INFO L273 TraceCheckUtils]: 189: Hoare triple {532502#true} #res := ~ldv_func_res~0; {532502#true} is VALID [2018-11-19 18:46:15,314 INFO L273 TraceCheckUtils]: 190: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,314 INFO L268 TraceCheckUtils]: 191: Hoare quadruple {532502#true} {532502#true} #2777#return; {532502#true} is VALID [2018-11-19 18:46:15,314 INFO L273 TraceCheckUtils]: 192: Hoare triple {532502#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {532502#true} is VALID [2018-11-19 18:46:15,314 INFO L273 TraceCheckUtils]: 193: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,315 INFO L268 TraceCheckUtils]: 194: Hoare quadruple {532502#true} {532502#true} #3035#return; {532502#true} is VALID [2018-11-19 18:46:15,315 INFO L273 TraceCheckUtils]: 195: Hoare triple {532502#true} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {532502#true} is VALID [2018-11-19 18:46:15,315 INFO L273 TraceCheckUtils]: 196: Hoare triple {532502#true} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_10~0 := 1; {532502#true} is VALID [2018-11-19 18:46:15,315 INFO L256 TraceCheckUtils]: 197: Hoare triple {532502#true} call ldv_initialize_ims_pcu_attribute_10(); {532502#true} is VALID [2018-11-19 18:46:15,315 INFO L273 TraceCheckUtils]: 198: Hoare triple {532502#true} havoc ~tmp~47.base, ~tmp~47.offset;havoc ~tmp___0~19.base, ~tmp___0~19.offset; {532502#true} is VALID [2018-11-19 18:46:15,315 INFO L256 TraceCheckUtils]: 199: Hoare triple {532502#true} call #t~ret861.base, #t~ret861.offset := ldv_zalloc(1376); {532502#true} is VALID [2018-11-19 18:46:15,316 INFO L273 TraceCheckUtils]: 200: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,316 INFO L273 TraceCheckUtils]: 201: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,316 INFO L273 TraceCheckUtils]: 202: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,316 INFO L268 TraceCheckUtils]: 203: Hoare quadruple {532502#true} {532502#true} #2807#return; {532502#true} is VALID [2018-11-19 18:46:15,316 INFO L273 TraceCheckUtils]: 204: Hoare triple {532502#true} ~tmp~47.base, ~tmp~47.offset := #t~ret861.base, #t~ret861.offset;havoc #t~ret861.base, #t~ret861.offset;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := ~tmp~47.base, ~tmp~47.offset; {532502#true} is VALID [2018-11-19 18:46:15,316 INFO L256 TraceCheckUtils]: 205: Hoare triple {532502#true} call #t~ret862.base, #t~ret862.offset := ldv_zalloc(48); {532502#true} is VALID [2018-11-19 18:46:15,316 INFO L273 TraceCheckUtils]: 206: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,317 INFO L273 TraceCheckUtils]: 207: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,317 INFO L273 TraceCheckUtils]: 208: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,317 INFO L268 TraceCheckUtils]: 209: Hoare quadruple {532502#true} {532502#true} #2809#return; {532502#true} is VALID [2018-11-19 18:46:15,317 INFO L273 TraceCheckUtils]: 210: Hoare triple {532502#true} ~tmp___0~19.base, ~tmp___0~19.offset := #t~ret862.base, #t~ret862.offset;havoc #t~ret862.base, #t~ret862.offset;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := ~tmp___0~19.base, ~tmp___0~19.offset; {532502#true} is VALID [2018-11-19 18:46:15,317 INFO L273 TraceCheckUtils]: 211: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,317 INFO L268 TraceCheckUtils]: 212: Hoare quadruple {532502#true} {532502#true} #3037#return; {532502#true} is VALID [2018-11-19 18:46:15,317 INFO L273 TraceCheckUtils]: 213: Hoare triple {532502#true} ~ldv_state_variable_4~0 := 1;~ldv_state_variable_8~0 := 1; {532502#true} is VALID [2018-11-19 18:46:15,318 INFO L256 TraceCheckUtils]: 214: Hoare triple {532502#true} call ldv_initialize_ims_pcu_attribute_8(); {532502#true} is VALID [2018-11-19 18:46:15,318 INFO L273 TraceCheckUtils]: 215: Hoare triple {532502#true} havoc ~tmp~51.base, ~tmp~51.offset;havoc ~tmp___0~23.base, ~tmp___0~23.offset; {532502#true} is VALID [2018-11-19 18:46:15,318 INFO L256 TraceCheckUtils]: 216: Hoare triple {532502#true} call #t~ret869.base, #t~ret869.offset := ldv_zalloc(1376); {532502#true} is VALID [2018-11-19 18:46:15,318 INFO L273 TraceCheckUtils]: 217: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,318 INFO L273 TraceCheckUtils]: 218: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,318 INFO L273 TraceCheckUtils]: 219: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,319 INFO L268 TraceCheckUtils]: 220: Hoare quadruple {532502#true} {532502#true} #2631#return; {532502#true} is VALID [2018-11-19 18:46:15,319 INFO L273 TraceCheckUtils]: 221: Hoare triple {532502#true} ~tmp~51.base, ~tmp~51.offset := #t~ret869.base, #t~ret869.offset;havoc #t~ret869.base, #t~ret869.offset;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := ~tmp~51.base, ~tmp~51.offset; {532502#true} is VALID [2018-11-19 18:46:15,319 INFO L256 TraceCheckUtils]: 222: Hoare triple {532502#true} call #t~ret870.base, #t~ret870.offset := ldv_zalloc(48); {532502#true} is VALID [2018-11-19 18:46:15,319 INFO L273 TraceCheckUtils]: 223: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,319 INFO L273 TraceCheckUtils]: 224: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,319 INFO L273 TraceCheckUtils]: 225: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,319 INFO L268 TraceCheckUtils]: 226: Hoare quadruple {532502#true} {532502#true} #2633#return; {532502#true} is VALID [2018-11-19 18:46:15,320 INFO L273 TraceCheckUtils]: 227: Hoare triple {532502#true} ~tmp___0~23.base, ~tmp___0~23.offset := #t~ret870.base, #t~ret870.offset;havoc #t~ret870.base, #t~ret870.offset;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := ~tmp___0~23.base, ~tmp___0~23.offset; {532502#true} is VALID [2018-11-19 18:46:15,320 INFO L273 TraceCheckUtils]: 228: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,320 INFO L268 TraceCheckUtils]: 229: Hoare quadruple {532502#true} {532502#true} #3039#return; {532502#true} is VALID [2018-11-19 18:46:15,320 INFO L273 TraceCheckUtils]: 230: Hoare triple {532502#true} ~ldv_state_variable_2~0 := 1;~ldv_state_variable_9~0 := 1; {532502#true} is VALID [2018-11-19 18:46:15,320 INFO L256 TraceCheckUtils]: 231: Hoare triple {532502#true} call ldv_initialize_ims_pcu_attribute_9(); {532502#true} is VALID [2018-11-19 18:46:15,320 INFO L273 TraceCheckUtils]: 232: Hoare triple {532502#true} havoc ~tmp~49.base, ~tmp~49.offset;havoc ~tmp___0~21.base, ~tmp___0~21.offset; {532502#true} is VALID [2018-11-19 18:46:15,321 INFO L256 TraceCheckUtils]: 233: Hoare triple {532502#true} call #t~ret865.base, #t~ret865.offset := ldv_zalloc(1376); {532502#true} is VALID [2018-11-19 18:46:15,321 INFO L273 TraceCheckUtils]: 234: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,321 INFO L273 TraceCheckUtils]: 235: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,321 INFO L273 TraceCheckUtils]: 236: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,321 INFO L268 TraceCheckUtils]: 237: Hoare quadruple {532502#true} {532502#true} #2627#return; {532502#true} is VALID [2018-11-19 18:46:15,321 INFO L273 TraceCheckUtils]: 238: Hoare triple {532502#true} ~tmp~49.base, ~tmp~49.offset := #t~ret865.base, #t~ret865.offset;havoc #t~ret865.base, #t~ret865.offset;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := ~tmp~49.base, ~tmp~49.offset; {532502#true} is VALID [2018-11-19 18:46:15,322 INFO L256 TraceCheckUtils]: 239: Hoare triple {532502#true} call #t~ret866.base, #t~ret866.offset := ldv_zalloc(48); {532502#true} is VALID [2018-11-19 18:46:15,322 INFO L273 TraceCheckUtils]: 240: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,322 INFO L273 TraceCheckUtils]: 241: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,322 INFO L273 TraceCheckUtils]: 242: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,322 INFO L268 TraceCheckUtils]: 243: Hoare quadruple {532502#true} {532502#true} #2629#return; {532502#true} is VALID [2018-11-19 18:46:15,322 INFO L273 TraceCheckUtils]: 244: Hoare triple {532502#true} ~tmp___0~21.base, ~tmp___0~21.offset := #t~ret866.base, #t~ret866.offset;havoc #t~ret866.base, #t~ret866.offset;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := ~tmp___0~21.base, ~tmp___0~21.offset; {532502#true} is VALID [2018-11-19 18:46:15,323 INFO L273 TraceCheckUtils]: 245: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,323 INFO L268 TraceCheckUtils]: 246: Hoare quadruple {532502#true} {532502#true} #3041#return; {532502#true} is VALID [2018-11-19 18:46:15,323 INFO L273 TraceCheckUtils]: 247: Hoare triple {532502#true} ~ldv_state_variable_7~0 := 1; {532502#true} is VALID [2018-11-19 18:46:15,323 INFO L256 TraceCheckUtils]: 248: Hoare triple {532502#true} call ldv_initialize_ims_pcu_attribute_7(); {532502#true} is VALID [2018-11-19 18:46:15,323 INFO L273 TraceCheckUtils]: 249: Hoare triple {532502#true} havoc ~tmp~52.base, ~tmp~52.offset;havoc ~tmp___0~24.base, ~tmp___0~24.offset; {532502#true} is VALID [2018-11-19 18:46:15,323 INFO L256 TraceCheckUtils]: 250: Hoare triple {532502#true} call #t~ret871.base, #t~ret871.offset := ldv_zalloc(1376); {532502#true} is VALID [2018-11-19 18:46:15,323 INFO L273 TraceCheckUtils]: 251: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,323 INFO L273 TraceCheckUtils]: 252: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,324 INFO L273 TraceCheckUtils]: 253: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,324 INFO L268 TraceCheckUtils]: 254: Hoare quadruple {532502#true} {532502#true} #2619#return; {532502#true} is VALID [2018-11-19 18:46:15,324 INFO L273 TraceCheckUtils]: 255: Hoare triple {532502#true} ~tmp~52.base, ~tmp~52.offset := #t~ret871.base, #t~ret871.offset;havoc #t~ret871.base, #t~ret871.offset;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := ~tmp~52.base, ~tmp~52.offset; {532502#true} is VALID [2018-11-19 18:46:15,324 INFO L256 TraceCheckUtils]: 256: Hoare triple {532502#true} call #t~ret872.base, #t~ret872.offset := ldv_zalloc(48); {532502#true} is VALID [2018-11-19 18:46:15,324 INFO L273 TraceCheckUtils]: 257: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,324 INFO L273 TraceCheckUtils]: 258: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,325 INFO L273 TraceCheckUtils]: 259: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,325 INFO L268 TraceCheckUtils]: 260: Hoare quadruple {532502#true} {532502#true} #2621#return; {532502#true} is VALID [2018-11-19 18:46:15,325 INFO L273 TraceCheckUtils]: 261: Hoare triple {532502#true} ~tmp___0~24.base, ~tmp___0~24.offset := #t~ret872.base, #t~ret872.offset;havoc #t~ret872.base, #t~ret872.offset;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := ~tmp___0~24.base, ~tmp___0~24.offset; {532502#true} is VALID [2018-11-19 18:46:15,325 INFO L273 TraceCheckUtils]: 262: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,325 INFO L268 TraceCheckUtils]: 263: Hoare quadruple {532502#true} {532502#true} #3043#return; {532502#true} is VALID [2018-11-19 18:46:15,325 INFO L273 TraceCheckUtils]: 264: Hoare triple {532502#true} ~ldv_state_variable_3~0 := 1;~ldv_state_variable_11~0 := 1; {532502#true} is VALID [2018-11-19 18:46:15,326 INFO L256 TraceCheckUtils]: 265: Hoare triple {532502#true} call ldv_initialize_ims_pcu_attribute_11(); {532502#true} is VALID [2018-11-19 18:46:15,326 INFO L273 TraceCheckUtils]: 266: Hoare triple {532502#true} havoc ~tmp~50.base, ~tmp~50.offset;havoc ~tmp___0~22.base, ~tmp___0~22.offset; {532502#true} is VALID [2018-11-19 18:46:15,326 INFO L256 TraceCheckUtils]: 267: Hoare triple {532502#true} call #t~ret867.base, #t~ret867.offset := ldv_zalloc(1376); {532502#true} is VALID [2018-11-19 18:46:15,326 INFO L273 TraceCheckUtils]: 268: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,326 INFO L273 TraceCheckUtils]: 269: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,326 INFO L273 TraceCheckUtils]: 270: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,326 INFO L268 TraceCheckUtils]: 271: Hoare quadruple {532502#true} {532502#true} #2811#return; {532502#true} is VALID [2018-11-19 18:46:15,327 INFO L273 TraceCheckUtils]: 272: Hoare triple {532502#true} ~tmp~50.base, ~tmp~50.offset := #t~ret867.base, #t~ret867.offset;havoc #t~ret867.base, #t~ret867.offset;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := ~tmp~50.base, ~tmp~50.offset; {532502#true} is VALID [2018-11-19 18:46:15,327 INFO L256 TraceCheckUtils]: 273: Hoare triple {532502#true} call #t~ret868.base, #t~ret868.offset := ldv_zalloc(48); {532502#true} is VALID [2018-11-19 18:46:15,327 INFO L273 TraceCheckUtils]: 274: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,327 INFO L273 TraceCheckUtils]: 275: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,327 INFO L273 TraceCheckUtils]: 276: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,327 INFO L268 TraceCheckUtils]: 277: Hoare quadruple {532502#true} {532502#true} #2813#return; {532502#true} is VALID [2018-11-19 18:46:15,328 INFO L273 TraceCheckUtils]: 278: Hoare triple {532502#true} ~tmp___0~22.base, ~tmp___0~22.offset := #t~ret868.base, #t~ret868.offset;havoc #t~ret868.base, #t~ret868.offset;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := ~tmp___0~22.base, ~tmp___0~22.offset; {532502#true} is VALID [2018-11-19 18:46:15,328 INFO L273 TraceCheckUtils]: 279: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,328 INFO L268 TraceCheckUtils]: 280: Hoare quadruple {532502#true} {532502#true} #3045#return; {532502#true} is VALID [2018-11-19 18:46:15,328 INFO L273 TraceCheckUtils]: 281: Hoare triple {532502#true} ~ldv_state_variable_6~0 := 1; {532502#true} is VALID [2018-11-19 18:46:15,328 INFO L256 TraceCheckUtils]: 282: Hoare triple {532502#true} call ldv_initialize_ims_pcu_attribute_6(); {532502#true} is VALID [2018-11-19 18:46:15,328 INFO L273 TraceCheckUtils]: 283: Hoare triple {532502#true} havoc ~tmp~48.base, ~tmp~48.offset;havoc ~tmp___0~20.base, ~tmp___0~20.offset; {532502#true} is VALID [2018-11-19 18:46:15,329 INFO L256 TraceCheckUtils]: 284: Hoare triple {532502#true} call #t~ret863.base, #t~ret863.offset := ldv_zalloc(1376); {532502#true} is VALID [2018-11-19 18:46:15,329 INFO L273 TraceCheckUtils]: 285: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,329 INFO L273 TraceCheckUtils]: 286: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,329 INFO L273 TraceCheckUtils]: 287: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,329 INFO L268 TraceCheckUtils]: 288: Hoare quadruple {532502#true} {532502#true} #2623#return; {532502#true} is VALID [2018-11-19 18:46:15,329 INFO L273 TraceCheckUtils]: 289: Hoare triple {532502#true} ~tmp~48.base, ~tmp~48.offset := #t~ret863.base, #t~ret863.offset;havoc #t~ret863.base, #t~ret863.offset;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := ~tmp~48.base, ~tmp~48.offset; {532502#true} is VALID [2018-11-19 18:46:15,330 INFO L256 TraceCheckUtils]: 290: Hoare triple {532502#true} call #t~ret864.base, #t~ret864.offset := ldv_zalloc(48); {532502#true} is VALID [2018-11-19 18:46:15,330 INFO L273 TraceCheckUtils]: 291: Hoare triple {532502#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {532502#true} is VALID [2018-11-19 18:46:15,330 INFO L273 TraceCheckUtils]: 292: Hoare triple {532502#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,330 INFO L273 TraceCheckUtils]: 293: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,330 INFO L268 TraceCheckUtils]: 294: Hoare quadruple {532502#true} {532502#true} #2625#return; {532502#true} is VALID [2018-11-19 18:46:15,330 INFO L273 TraceCheckUtils]: 295: Hoare triple {532502#true} ~tmp___0~20.base, ~tmp___0~20.offset := #t~ret864.base, #t~ret864.offset;havoc #t~ret864.base, #t~ret864.offset;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := ~tmp___0~20.base, ~tmp___0~20.offset; {532502#true} is VALID [2018-11-19 18:46:15,331 INFO L273 TraceCheckUtils]: 296: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,331 INFO L268 TraceCheckUtils]: 297: Hoare quadruple {532502#true} {532502#true} #3047#return; {532502#true} is VALID [2018-11-19 18:46:15,331 INFO L273 TraceCheckUtils]: 298: Hoare triple {532502#true} assume !(0 != ~ldv_retval_4~0); {532502#true} is VALID [2018-11-19 18:46:15,331 INFO L273 TraceCheckUtils]: 299: Hoare triple {532502#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,331 INFO L273 TraceCheckUtils]: 300: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,332 INFO L273 TraceCheckUtils]: 301: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,332 INFO L273 TraceCheckUtils]: 302: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,332 INFO L273 TraceCheckUtils]: 303: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,332 INFO L273 TraceCheckUtils]: 304: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,332 INFO L273 TraceCheckUtils]: 305: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,332 INFO L273 TraceCheckUtils]: 306: Hoare triple {532502#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {532502#true} is VALID [2018-11-19 18:46:15,333 INFO L273 TraceCheckUtils]: 307: Hoare triple {532502#true} assume #t~switch909; {532502#true} is VALID [2018-11-19 18:46:15,333 INFO L273 TraceCheckUtils]: 308: Hoare triple {532502#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {532502#true} is VALID [2018-11-19 18:46:15,333 INFO L273 TraceCheckUtils]: 309: Hoare triple {532502#true} assume #t~switch937; {532502#true} is VALID [2018-11-19 18:46:15,333 INFO L273 TraceCheckUtils]: 310: Hoare triple {532502#true} assume 1 == ~ldv_state_variable_1~0; {532502#true} is VALID [2018-11-19 18:46:15,333 INFO L256 TraceCheckUtils]: 311: Hoare triple {532502#true} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {532502#true} is VALID [2018-11-19 18:46:15,334 INFO L273 TraceCheckUtils]: 312: Hoare triple {532502#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {532502#true} is VALID [2018-11-19 18:46:15,334 INFO L256 TraceCheckUtils]: 313: Hoare triple {532502#true} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {532502#true} is VALID [2018-11-19 18:46:15,334 INFO L273 TraceCheckUtils]: 314: Hoare triple {532502#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {532502#true} is VALID [2018-11-19 18:46:15,334 INFO L256 TraceCheckUtils]: 315: Hoare triple {532502#true} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {532502#true} is VALID [2018-11-19 18:46:15,334 INFO L273 TraceCheckUtils]: 316: Hoare triple {532502#true} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {532502#true} is VALID [2018-11-19 18:46:15,335 INFO L256 TraceCheckUtils]: 317: Hoare triple {532502#true} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {532502#true} is VALID [2018-11-19 18:46:15,335 INFO L273 TraceCheckUtils]: 318: Hoare triple {532502#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {532502#true} is VALID [2018-11-19 18:46:15,335 INFO L273 TraceCheckUtils]: 319: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,335 INFO L268 TraceCheckUtils]: 320: Hoare quadruple {532502#true} {532502#true} #2817#return; {532502#true} is VALID [2018-11-19 18:46:15,335 INFO L273 TraceCheckUtils]: 321: Hoare triple {532502#true} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {532502#true} is VALID [2018-11-19 18:46:15,335 INFO L273 TraceCheckUtils]: 322: Hoare triple {532502#true} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {532502#true} is VALID [2018-11-19 18:46:15,336 INFO L273 TraceCheckUtils]: 323: Hoare triple {532502#true} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,336 INFO L273 TraceCheckUtils]: 324: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,336 INFO L268 TraceCheckUtils]: 325: Hoare quadruple {532502#true} {532502#true} #3151#return; {532502#true} is VALID [2018-11-19 18:46:15,336 INFO L273 TraceCheckUtils]: 326: Hoare triple {532502#true} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {532502#true} is VALID [2018-11-19 18:46:15,336 INFO L273 TraceCheckUtils]: 327: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,336 INFO L268 TraceCheckUtils]: 328: Hoare quadruple {532502#true} {532502#true} #3095#return; {532502#true} is VALID [2018-11-19 18:46:15,337 INFO L273 TraceCheckUtils]: 329: Hoare triple {532502#true} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {532502#true} is VALID [2018-11-19 18:46:15,337 INFO L256 TraceCheckUtils]: 330: Hoare triple {532502#true} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {532502#true} is VALID [2018-11-19 18:46:15,337 INFO L273 TraceCheckUtils]: 331: Hoare triple {532502#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {532502#true} is VALID [2018-11-19 18:46:15,337 INFO L256 TraceCheckUtils]: 332: Hoare triple {532502#true} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {532502#true} is VALID [2018-11-19 18:46:15,337 INFO L273 TraceCheckUtils]: 333: Hoare triple {532502#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,337 INFO L256 TraceCheckUtils]: 334: Hoare triple {532502#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {532502#true} is VALID [2018-11-19 18:46:15,337 INFO L273 TraceCheckUtils]: 335: Hoare triple {532502#true} ~size := #in~size;~t := #in~t; {532502#true} is VALID [2018-11-19 18:46:15,338 INFO L256 TraceCheckUtils]: 336: Hoare triple {532502#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {532502#true} is VALID [2018-11-19 18:46:15,338 INFO L273 TraceCheckUtils]: 337: Hoare triple {532502#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {532502#true} is VALID [2018-11-19 18:46:15,338 INFO L273 TraceCheckUtils]: 338: Hoare triple {532502#true} assume !(0 != ~tmp___0~2);call #t~malloc130.base, #t~malloc130.offset := #Ultimate.alloc(~size);~tmp~8.base, ~tmp~8.offset := #t~malloc130.base, #t~malloc130.offset;~p~0.base, ~p~0.offset := ~tmp~8.base, ~tmp~8.offset;assume 0 != (if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~0.base, ~p~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,338 INFO L273 TraceCheckUtils]: 339: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,338 INFO L268 TraceCheckUtils]: 340: Hoare quadruple {532502#true} {532502#true} #2691#return; {532502#true} is VALID [2018-11-19 18:46:15,338 INFO L273 TraceCheckUtils]: 341: Hoare triple {532502#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {532502#true} is VALID [2018-11-19 18:46:15,339 INFO L273 TraceCheckUtils]: 342: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,339 INFO L268 TraceCheckUtils]: 343: Hoare quadruple {532502#true} {532502#true} #2781#return; {532502#true} is VALID [2018-11-19 18:46:15,339 INFO L273 TraceCheckUtils]: 344: Hoare triple {532502#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,339 INFO L273 TraceCheckUtils]: 345: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,339 INFO L268 TraceCheckUtils]: 346: Hoare quadruple {532502#true} {532502#true} #2779#return; {532502#true} is VALID [2018-11-19 18:46:15,339 INFO L273 TraceCheckUtils]: 347: Hoare triple {532502#true} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {532502#true} is VALID [2018-11-19 18:46:15,340 INFO L273 TraceCheckUtils]: 348: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,340 INFO L268 TraceCheckUtils]: 349: Hoare quadruple {532502#true} {532502#true} #3097#return; {532502#true} is VALID [2018-11-19 18:46:15,340 INFO L273 TraceCheckUtils]: 350: Hoare triple {532502#true} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {532502#true} is VALID [2018-11-19 18:46:15,340 INFO L273 TraceCheckUtils]: 351: Hoare triple {532502#true} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {532502#true} is VALID [2018-11-19 18:46:15,340 INFO L256 TraceCheckUtils]: 352: Hoare triple {532502#true} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {532502#true} is VALID [2018-11-19 18:46:15,340 INFO L273 TraceCheckUtils]: 353: Hoare triple {532502#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,340 INFO L273 TraceCheckUtils]: 354: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,341 INFO L268 TraceCheckUtils]: 355: Hoare quadruple {532502#true} {532502#true} #3099#return; {532502#true} is VALID [2018-11-19 18:46:15,341 INFO L256 TraceCheckUtils]: 356: Hoare triple {532502#true} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {532502#true} is VALID [2018-11-19 18:46:15,341 INFO L273 TraceCheckUtils]: 357: Hoare triple {532502#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,341 INFO L273 TraceCheckUtils]: 358: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,341 INFO L268 TraceCheckUtils]: 359: Hoare quadruple {532502#true} {532502#true} #3101#return; {532502#true} is VALID [2018-11-19 18:46:15,341 INFO L256 TraceCheckUtils]: 360: Hoare triple {532502#true} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {532502#true} is VALID [2018-11-19 18:46:15,342 INFO L273 TraceCheckUtils]: 361: Hoare triple {532502#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {532502#true} is VALID [2018-11-19 18:46:15,342 INFO L256 TraceCheckUtils]: 362: Hoare triple {532502#true} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {532502#true} is VALID [2018-11-19 18:46:15,342 INFO L273 TraceCheckUtils]: 363: Hoare triple {532502#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {532502#true} is VALID [2018-11-19 18:46:15,342 INFO L273 TraceCheckUtils]: 364: Hoare triple {532502#true} assume !(0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616); {532502#true} is VALID [2018-11-19 18:46:15,342 INFO L273 TraceCheckUtils]: 365: Hoare triple {532502#true} assume !(0 == ~buflen~0 % 4294967296 % 18446744073709551616); {532502#true} is VALID [2018-11-19 18:46:15,342 INFO L273 TraceCheckUtils]: 366: Hoare triple {532502#true} assume 0 != ~buflen~0 % 4294967296 % 18446744073709551616; {532502#true} is VALID [2018-11-19 18:46:15,343 INFO L273 TraceCheckUtils]: 367: Hoare triple {532502#true} ~union_desc~0.base, ~union_desc~0.offset := ~buf~0.base, ~buf~0.offset;call #t~mem642 := read~int(~union_desc~0.base, 1 + ~union_desc~0.offset, 1);#t~short644 := 36 == #t~mem642 % 256 % 4294967296; {532502#true} is VALID [2018-11-19 18:46:15,343 INFO L273 TraceCheckUtils]: 368: Hoare triple {532502#true} assume #t~short644;call #t~mem643 := read~int(~union_desc~0.base, 2 + ~union_desc~0.offset, 1);#t~short644 := 6 == #t~mem643 % 256 % 4294967296; {532502#true} is VALID [2018-11-19 18:46:15,343 INFO L273 TraceCheckUtils]: 369: Hoare triple {532502#true} assume #t~short644;havoc #t~mem643;havoc #t~mem642;havoc #t~short644;call write~$Pointer$(#t~string645.base, #t~string645.offset, ~#descriptor~3.base, ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string646.base, #t~string646.offset, ~#descriptor~3.base, 8 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string647.base, #t~string647.offset, ~#descriptor~3.base, 16 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string648.base, #t~string648.offset, ~#descriptor~3.base, 24 + ~#descriptor~3.offset, 8);call write~int(1479, ~#descriptor~3.base, 32 + ~#descriptor~3.offset, 4);call write~int(0, ~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1);call #t~mem649 := read~int(~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1); {532502#true} is VALID [2018-11-19 18:46:15,343 INFO L256 TraceCheckUtils]: 370: Hoare triple {532502#true} call #t~ret650 := ldv__builtin_expect(~bitwiseAnd(#t~mem649 % 256, 1), 0); {532502#true} is VALID [2018-11-19 18:46:15,343 INFO L273 TraceCheckUtils]: 371: Hoare triple {532502#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {532502#true} is VALID [2018-11-19 18:46:15,343 INFO L273 TraceCheckUtils]: 372: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,343 INFO L268 TraceCheckUtils]: 373: Hoare quadruple {532502#true} {532502#true} #3075#return; {532502#true} is VALID [2018-11-19 18:46:15,344 INFO L273 TraceCheckUtils]: 374: Hoare triple {532502#true} assume -9223372036854775808 <= #t~ret650 && #t~ret650 <= 9223372036854775807;~tmp~36 := #t~ret650;havoc #t~ret650;havoc #t~mem649; {532502#true} is VALID [2018-11-19 18:46:15,344 INFO L273 TraceCheckUtils]: 375: Hoare triple {532502#true} assume !(0 != ~tmp~36); {532502#true} is VALID [2018-11-19 18:46:15,344 INFO L273 TraceCheckUtils]: 376: Hoare triple {532502#true} #res.base, #res.offset := ~union_desc~0.base, ~union_desc~0.offset;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {532502#true} is VALID [2018-11-19 18:46:15,344 INFO L273 TraceCheckUtils]: 377: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,344 INFO L268 TraceCheckUtils]: 378: Hoare quadruple {532502#true} {532502#true} #3137#return; {532502#true} is VALID [2018-11-19 18:46:15,344 INFO L273 TraceCheckUtils]: 379: Hoare triple {532502#true} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {532502#true} is VALID [2018-11-19 18:46:15,344 INFO L273 TraceCheckUtils]: 380: Hoare triple {532502#true} assume !(0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616);call #t~mem658.base, #t~mem658.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem659 := read~int(~union_desc~1.base, 3 + ~union_desc~1.offset, 1);call #t~ret660.base, #t~ret660.offset := usb_ifnum_to_if(#t~mem658.base, #t~mem658.offset, #t~mem659 % 256);call write~$Pointer$(#t~ret660.base, #t~ret660.offset, ~pcu.base, 79 + ~pcu.offset, 8);havoc #t~mem659;havoc #t~ret660.base, #t~ret660.offset;havoc #t~mem658.base, #t~mem658.offset;call #t~mem661.base, #t~mem661.offset := read~$Pointer$(~pcu.base, 79 + ~pcu.offset, 8);call #t~mem662.base, #t~mem662.offset := read~$Pointer$(#t~mem661.base, 8 + #t~mem661.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem662.base, #t~mem662.offset;havoc #t~mem662.base, #t~mem662.offset;havoc #t~mem661.base, #t~mem661.offset;call #t~mem663.base, #t~mem663.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem663.base, #t~mem663.offset, ~pcu.base, 87 + ~pcu.offset, 8);havoc #t~mem663.base, #t~mem663.offset;call #t~mem664.base, #t~mem664.offset := read~$Pointer$(~pcu.base, 87 + ~pcu.offset, 8); {532502#true} is VALID [2018-11-19 18:46:15,345 INFO L256 TraceCheckUtils]: 381: Hoare triple {532502#true} call #t~ret665 := usb_endpoint_maxp(#t~mem664.base, #t~mem664.offset); {532502#true} is VALID [2018-11-19 18:46:15,345 INFO L273 TraceCheckUtils]: 382: Hoare triple {532502#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {532502#true} is VALID [2018-11-19 18:46:15,345 INFO L273 TraceCheckUtils]: 383: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,345 INFO L268 TraceCheckUtils]: 384: Hoare quadruple {532502#true} {532502#true} #3139#return; {532502#true} is VALID [2018-11-19 18:46:15,345 INFO L273 TraceCheckUtils]: 385: Hoare triple {532502#true} assume -2147483648 <= #t~ret665 && #t~ret665 <= 2147483647;~tmp~37 := #t~ret665;havoc #t~ret665;havoc #t~mem664.base, #t~mem664.offset;call write~int(~tmp~37, ~pcu.base, 119 + ~pcu.offset, 4);call #t~mem666.base, #t~mem666.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem667 := read~int(~union_desc~1.base, 4 + ~union_desc~1.offset, 1);call #t~ret668.base, #t~ret668.offset := usb_ifnum_to_if(#t~mem666.base, #t~mem666.offset, #t~mem667 % 256);call write~$Pointer$(#t~ret668.base, #t~ret668.offset, ~pcu.base, 123 + ~pcu.offset, 8);havoc #t~mem666.base, #t~mem666.offset;havoc #t~mem667;havoc #t~ret668.base, #t~ret668.offset;call #t~mem669.base, #t~mem669.offset := read~$Pointer$(~pcu.base, 123 + ~pcu.offset, 8);call #t~mem670.base, #t~mem670.offset := read~$Pointer$(#t~mem669.base, 8 + #t~mem669.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem670.base, #t~mem670.offset;havoc #t~mem670.base, #t~mem670.offset;havoc #t~mem669.base, #t~mem669.offset;call #t~mem671 := read~int(~alt~0.base, 4 + ~alt~0.offset, 1); {532502#true} is VALID [2018-11-19 18:46:15,345 INFO L273 TraceCheckUtils]: 386: Hoare triple {532502#true} assume !(2 != #t~mem671 % 256 % 4294967296);havoc #t~mem671;call #t~mem676.base, #t~mem676.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem676.base, #t~mem676.offset, ~pcu.base, 167 + ~pcu.offset, 8);havoc #t~mem676.base, #t~mem676.offset;call #t~mem677.base, #t~mem677.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {532502#true} is VALID [2018-11-19 18:46:15,345 INFO L256 TraceCheckUtils]: 387: Hoare triple {532502#true} call #t~ret678 := usb_endpoint_is_bulk_out(#t~mem677.base, #t~mem677.offset); {532502#true} is VALID [2018-11-19 18:46:15,345 INFO L273 TraceCheckUtils]: 388: Hoare triple {532502#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~4;havoc ~tmp___0~1;havoc ~tmp___1~1; {532502#true} is VALID [2018-11-19 18:46:15,345 INFO L256 TraceCheckUtils]: 389: Hoare triple {532502#true} call #t~ret25 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {532502#true} is VALID [2018-11-19 18:46:15,345 INFO L273 TraceCheckUtils]: 390: Hoare triple {532502#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {532502#true} is VALID [2018-11-19 18:46:15,346 INFO L273 TraceCheckUtils]: 391: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,346 INFO L268 TraceCheckUtils]: 392: Hoare quadruple {532502#true} {532502#true} #2887#return; {532502#true} is VALID [2018-11-19 18:46:15,346 INFO L273 TraceCheckUtils]: 393: Hoare triple {532502#true} assume -2147483648 <= #t~ret25 && #t~ret25 <= 2147483647;~tmp~4 := #t~ret25;havoc #t~ret25; {532502#true} is VALID [2018-11-19 18:46:15,346 INFO L273 TraceCheckUtils]: 394: Hoare triple {532502#true} assume 0 != ~tmp~4; {532502#true} is VALID [2018-11-19 18:46:15,346 INFO L256 TraceCheckUtils]: 395: Hoare triple {532502#true} call #t~ret26 := usb_endpoint_dir_out(~epd.base, ~epd.offset); {532502#true} is VALID [2018-11-19 18:46:15,346 INFO L273 TraceCheckUtils]: 396: Hoare triple {532502#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem21 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem21 % 256 % 256 <= 127 then #t~mem21 % 256 % 256 else #t~mem21 % 256 % 256 - 256) >= 0 then 1 else 0);havoc #t~mem21; {532502#true} is VALID [2018-11-19 18:46:15,347 INFO L273 TraceCheckUtils]: 397: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,347 INFO L268 TraceCheckUtils]: 398: Hoare quadruple {532502#true} {532502#true} #2889#return; {532502#true} is VALID [2018-11-19 18:46:15,347 INFO L273 TraceCheckUtils]: 399: Hoare triple {532502#true} assume -2147483648 <= #t~ret26 && #t~ret26 <= 2147483647;~tmp___0~1 := #t~ret26;havoc #t~ret26; {532502#true} is VALID [2018-11-19 18:46:15,347 INFO L273 TraceCheckUtils]: 400: Hoare triple {532502#true} assume 0 != ~tmp___0~1;~tmp___1~1 := 1; {532502#true} is VALID [2018-11-19 18:46:15,347 INFO L273 TraceCheckUtils]: 401: Hoare triple {532502#true} #res := ~tmp___1~1; {532502#true} is VALID [2018-11-19 18:46:15,347 INFO L273 TraceCheckUtils]: 402: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,347 INFO L268 TraceCheckUtils]: 403: Hoare quadruple {532502#true} {532502#true} #3141#return; {532502#true} is VALID [2018-11-19 18:46:15,348 INFO L273 TraceCheckUtils]: 404: Hoare triple {532502#true} assume -2147483648 <= #t~ret678 && #t~ret678 <= 2147483647;~tmp___0~16 := #t~ret678;havoc #t~mem677.base, #t~mem677.offset;havoc #t~ret678; {532502#true} is VALID [2018-11-19 18:46:15,348 INFO L273 TraceCheckUtils]: 405: Hoare triple {532502#true} assume !(0 == ~tmp___0~16);call #t~mem682.base, #t~mem682.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {532502#true} is VALID [2018-11-19 18:46:15,348 INFO L256 TraceCheckUtils]: 406: Hoare triple {532502#true} call #t~ret683 := usb_endpoint_maxp(#t~mem682.base, #t~mem682.offset); {532502#true} is VALID [2018-11-19 18:46:15,348 INFO L273 TraceCheckUtils]: 407: Hoare triple {532502#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {532502#true} is VALID [2018-11-19 18:46:15,348 INFO L273 TraceCheckUtils]: 408: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,348 INFO L268 TraceCheckUtils]: 409: Hoare quadruple {532502#true} {532502#true} #3143#return; {532502#true} is VALID [2018-11-19 18:46:15,349 INFO L273 TraceCheckUtils]: 410: Hoare triple {532502#true} assume -2147483648 <= #t~ret683 && #t~ret683 <= 2147483647;~tmp___1~7 := #t~ret683;havoc #t~mem682.base, #t~mem682.offset;havoc #t~ret683;call write~int(~tmp___1~7, ~pcu.base, 183 + ~pcu.offset, 4);call #t~mem684 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {532502#true} is VALID [2018-11-19 18:46:15,349 INFO L273 TraceCheckUtils]: 411: Hoare triple {532502#true} assume !(#t~mem684 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem684;call #t~mem689.base, #t~mem689.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem689.base, 63 + #t~mem689.offset, ~pcu.base, 131 + ~pcu.offset, 8);havoc #t~mem689.base, #t~mem689.offset;call #t~mem690.base, #t~mem690.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {532502#true} is VALID [2018-11-19 18:46:15,349 INFO L256 TraceCheckUtils]: 412: Hoare triple {532502#true} call #t~ret691 := usb_endpoint_is_bulk_in(#t~mem690.base, #t~mem690.offset); {532502#true} is VALID [2018-11-19 18:46:15,349 INFO L273 TraceCheckUtils]: 413: Hoare triple {532502#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~3;havoc ~tmp___0~0;havoc ~tmp___1~0; {532502#true} is VALID [2018-11-19 18:46:15,349 INFO L256 TraceCheckUtils]: 414: Hoare triple {532502#true} call #t~ret23 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {532502#true} is VALID [2018-11-19 18:46:15,349 INFO L273 TraceCheckUtils]: 415: Hoare triple {532502#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {532502#true} is VALID [2018-11-19 18:46:15,350 INFO L273 TraceCheckUtils]: 416: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,350 INFO L268 TraceCheckUtils]: 417: Hoare quadruple {532502#true} {532502#true} #2915#return; {532502#true} is VALID [2018-11-19 18:46:15,350 INFO L273 TraceCheckUtils]: 418: Hoare triple {532502#true} assume -2147483648 <= #t~ret23 && #t~ret23 <= 2147483647;~tmp~3 := #t~ret23;havoc #t~ret23; {532502#true} is VALID [2018-11-19 18:46:15,350 INFO L273 TraceCheckUtils]: 419: Hoare triple {532502#true} assume 0 != ~tmp~3; {532502#true} is VALID [2018-11-19 18:46:15,350 INFO L256 TraceCheckUtils]: 420: Hoare triple {532502#true} call #t~ret24 := usb_endpoint_dir_in(~epd.base, ~epd.offset); {532502#true} is VALID [2018-11-19 18:46:15,350 INFO L273 TraceCheckUtils]: 421: Hoare triple {532502#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem20 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem20 % 256 % 256 <= 127 then #t~mem20 % 256 % 256 else #t~mem20 % 256 % 256 - 256) < 0 then 1 else 0);havoc #t~mem20; {532502#true} is VALID [2018-11-19 18:46:15,350 INFO L273 TraceCheckUtils]: 422: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,351 INFO L268 TraceCheckUtils]: 423: Hoare quadruple {532502#true} {532502#true} #2917#return; {532502#true} is VALID [2018-11-19 18:46:15,351 INFO L273 TraceCheckUtils]: 424: Hoare triple {532502#true} assume -2147483648 <= #t~ret24 && #t~ret24 <= 2147483647;~tmp___0~0 := #t~ret24;havoc #t~ret24; {532502#true} is VALID [2018-11-19 18:46:15,351 INFO L273 TraceCheckUtils]: 425: Hoare triple {532502#true} assume 0 != ~tmp___0~0;~tmp___1~0 := 1; {532502#true} is VALID [2018-11-19 18:46:15,351 INFO L273 TraceCheckUtils]: 426: Hoare triple {532502#true} #res := ~tmp___1~0; {532502#true} is VALID [2018-11-19 18:46:15,351 INFO L273 TraceCheckUtils]: 427: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,351 INFO L268 TraceCheckUtils]: 428: Hoare quadruple {532502#true} {532502#true} #3145#return; {532502#true} is VALID [2018-11-19 18:46:15,352 INFO L273 TraceCheckUtils]: 429: Hoare triple {532502#true} assume -2147483648 <= #t~ret691 && #t~ret691 <= 2147483647;~tmp___2~3 := #t~ret691;havoc #t~ret691;havoc #t~mem690.base, #t~mem690.offset; {532502#true} is VALID [2018-11-19 18:46:15,352 INFO L273 TraceCheckUtils]: 430: Hoare triple {532502#true} assume !(0 == ~tmp___2~3);call #t~mem695.base, #t~mem695.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {532502#true} is VALID [2018-11-19 18:46:15,352 INFO L256 TraceCheckUtils]: 431: Hoare triple {532502#true} call #t~ret696 := usb_endpoint_maxp(#t~mem695.base, #t~mem695.offset); {532502#true} is VALID [2018-11-19 18:46:15,352 INFO L273 TraceCheckUtils]: 432: Hoare triple {532502#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {532502#true} is VALID [2018-11-19 18:46:15,352 INFO L273 TraceCheckUtils]: 433: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,352 INFO L268 TraceCheckUtils]: 434: Hoare quadruple {532502#true} {532502#true} #3147#return; {532502#true} is VALID [2018-11-19 18:46:15,353 INFO L273 TraceCheckUtils]: 435: Hoare triple {532502#true} assume -2147483648 <= #t~ret696 && #t~ret696 <= 2147483647;~tmp___3~2 := #t~ret696;havoc #t~ret696;havoc #t~mem695.base, #t~mem695.offset;call write~int(~tmp___3~2, ~pcu.base, 163 + ~pcu.offset, 4);call #t~mem697 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {532502#true} is VALID [2018-11-19 18:46:15,353 INFO L273 TraceCheckUtils]: 436: Hoare triple {532502#true} assume !(#t~mem697 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem697;#res := 0; {532502#true} is VALID [2018-11-19 18:46:15,353 INFO L273 TraceCheckUtils]: 437: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,353 INFO L268 TraceCheckUtils]: 438: Hoare quadruple {532502#true} {532502#true} #3103#return; {532502#true} is VALID [2018-11-19 18:46:15,353 INFO L273 TraceCheckUtils]: 439: Hoare triple {532502#true} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {532502#true} is VALID [2018-11-19 18:46:15,353 INFO L273 TraceCheckUtils]: 440: Hoare triple {532502#true} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {532502#true} is VALID [2018-11-19 18:46:15,354 INFO L273 TraceCheckUtils]: 441: Hoare triple {532502#true} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {532502#true} is VALID [2018-11-19 18:46:15,354 INFO L256 TraceCheckUtils]: 442: Hoare triple {532502#true} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {532502#true} is VALID [2018-11-19 18:46:15,354 INFO L273 TraceCheckUtils]: 443: Hoare triple {532502#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {532502#true} is VALID [2018-11-19 18:46:15,354 INFO L256 TraceCheckUtils]: 444: Hoare triple {532502#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {532502#true} is VALID [2018-11-19 18:46:15,354 INFO L273 TraceCheckUtils]: 445: Hoare triple {532502#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {532502#true} is VALID [2018-11-19 18:46:15,354 INFO L273 TraceCheckUtils]: 446: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,354 INFO L268 TraceCheckUtils]: 447: Hoare quadruple {532502#true} {532502#true} #2541#return; {532502#true} is VALID [2018-11-19 18:46:15,355 INFO L273 TraceCheckUtils]: 448: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,355 INFO L268 TraceCheckUtils]: 449: Hoare quadruple {532502#true} {532502#true} #3105#return; {532502#true} is VALID [2018-11-19 18:46:15,355 INFO L273 TraceCheckUtils]: 450: Hoare triple {532502#true} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {532502#true} is VALID [2018-11-19 18:46:15,355 INFO L256 TraceCheckUtils]: 451: Hoare triple {532502#true} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {532502#true} is VALID [2018-11-19 18:46:15,355 INFO L273 TraceCheckUtils]: 452: Hoare triple {532502#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {532502#true} is VALID [2018-11-19 18:46:15,355 INFO L256 TraceCheckUtils]: 453: Hoare triple {532502#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {532502#true} is VALID [2018-11-19 18:46:15,356 INFO L273 TraceCheckUtils]: 454: Hoare triple {532502#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {532502#true} is VALID [2018-11-19 18:46:15,356 INFO L273 TraceCheckUtils]: 455: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,356 INFO L268 TraceCheckUtils]: 456: Hoare quadruple {532502#true} {532502#true} #2541#return; {532502#true} is VALID [2018-11-19 18:46:15,356 INFO L273 TraceCheckUtils]: 457: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,356 INFO L268 TraceCheckUtils]: 458: Hoare quadruple {532502#true} {532502#true} #3107#return; {532502#true} is VALID [2018-11-19 18:46:15,356 INFO L273 TraceCheckUtils]: 459: Hoare triple {532502#true} havoc #t~mem837.base, #t~mem837.offset; {532502#true} is VALID [2018-11-19 18:46:15,356 INFO L256 TraceCheckUtils]: 460: Hoare triple {532502#true} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {532502#true} is VALID [2018-11-19 18:46:15,357 INFO L273 TraceCheckUtils]: 461: Hoare triple {532502#true} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {532502#true} is VALID [2018-11-19 18:46:15,357 INFO L273 TraceCheckUtils]: 462: Hoare triple {532502#true} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {532502#true} is VALID [2018-11-19 18:46:15,357 INFO L256 TraceCheckUtils]: 463: Hoare triple {532502#true} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {532502#true} is VALID [2018-11-19 18:46:15,357 INFO L273 TraceCheckUtils]: 464: Hoare triple {532502#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {532502#true} is VALID [2018-11-19 18:46:15,357 INFO L256 TraceCheckUtils]: 465: Hoare triple {532502#true} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {532502#true} is VALID [2018-11-19 18:46:15,357 INFO L273 TraceCheckUtils]: 466: Hoare triple {532502#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {532502#true} is VALID [2018-11-19 18:46:15,358 INFO L256 TraceCheckUtils]: 467: Hoare triple {532502#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {532502#true} is VALID [2018-11-19 18:46:15,358 INFO L273 TraceCheckUtils]: 468: Hoare triple {532502#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {532502#true} is VALID [2018-11-19 18:46:15,358 INFO L273 TraceCheckUtils]: 469: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,358 INFO L268 TraceCheckUtils]: 470: Hoare quadruple {532502#true} {532502#true} #2605#return; {532502#true} is VALID [2018-11-19 18:46:15,358 INFO L273 TraceCheckUtils]: 471: Hoare triple {532502#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {532502#true} is VALID [2018-11-19 18:46:15,358 INFO L256 TraceCheckUtils]: 472: Hoare triple {532502#true} call #t~ret965 := ldv_undef_int(); {532502#true} is VALID [2018-11-19 18:46:15,358 INFO L273 TraceCheckUtils]: 473: Hoare triple {532502#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {532502#true} is VALID [2018-11-19 18:46:15,359 INFO L273 TraceCheckUtils]: 474: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,359 INFO L268 TraceCheckUtils]: 475: Hoare quadruple {532502#true} {532502#true} #2607#return; {532502#true} is VALID [2018-11-19 18:46:15,359 INFO L273 TraceCheckUtils]: 476: Hoare triple {532502#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {532502#true} is VALID [2018-11-19 18:46:15,359 INFO L273 TraceCheckUtils]: 477: Hoare triple {532502#true} assume 0 != ~tmp___0~26; {532502#true} is VALID [2018-11-19 18:46:15,359 INFO L273 TraceCheckUtils]: 478: Hoare triple {532502#true} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {532502#true} is VALID [2018-11-19 18:46:15,360 INFO L273 TraceCheckUtils]: 479: Hoare triple {532502#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {532504#(and (<= (+ |ldv_alloc_urb_#res.base| |ldv_alloc_urb_#res.offset|) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ |ldv_alloc_urb_#res.base| |ldv_alloc_urb_#res.offset|)))} is VALID [2018-11-19 18:46:15,361 INFO L273 TraceCheckUtils]: 480: Hoare triple {532504#(and (<= (+ |ldv_alloc_urb_#res.base| |ldv_alloc_urb_#res.offset|) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ |ldv_alloc_urb_#res.base| |ldv_alloc_urb_#res.offset|)))} assume true; {532504#(and (<= (+ |ldv_alloc_urb_#res.base| |ldv_alloc_urb_#res.offset|) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ |ldv_alloc_urb_#res.base| |ldv_alloc_urb_#res.offset|)))} is VALID [2018-11-19 18:46:15,362 INFO L268 TraceCheckUtils]: 481: Hoare quadruple {532504#(and (<= (+ |ldv_alloc_urb_#res.base| |ldv_alloc_urb_#res.offset|) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ |ldv_alloc_urb_#res.base| |ldv_alloc_urb_#res.offset|)))} {532502#true} #3135#return; {532505#(and (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ |ldv_usb_alloc_urb_9_#t~ret959.offset| |ldv_usb_alloc_urb_9_#t~ret959.base|)) (<= (+ |ldv_usb_alloc_urb_9_#t~ret959.offset| |ldv_usb_alloc_urb_9_#t~ret959.base|) (+ ~usb_urb~0.offset ~usb_urb~0.base)))} is VALID [2018-11-19 18:46:15,363 INFO L273 TraceCheckUtils]: 482: Hoare triple {532505#(and (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ |ldv_usb_alloc_urb_9_#t~ret959.offset| |ldv_usb_alloc_urb_9_#t~ret959.base|)) (<= (+ |ldv_usb_alloc_urb_9_#t~ret959.offset| |ldv_usb_alloc_urb_9_#t~ret959.base|) (+ ~usb_urb~0.offset ~usb_urb~0.base)))} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {532506#(and (<= (+ |ldv_usb_alloc_urb_9_#res.base| |ldv_usb_alloc_urb_9_#res.offset|) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ |ldv_usb_alloc_urb_9_#res.base| |ldv_usb_alloc_urb_9_#res.offset|)))} is VALID [2018-11-19 18:46:15,363 INFO L273 TraceCheckUtils]: 483: Hoare triple {532506#(and (<= (+ |ldv_usb_alloc_urb_9_#res.base| |ldv_usb_alloc_urb_9_#res.offset|) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ |ldv_usb_alloc_urb_9_#res.base| |ldv_usb_alloc_urb_9_#res.offset|)))} assume true; {532506#(and (<= (+ |ldv_usb_alloc_urb_9_#res.base| |ldv_usb_alloc_urb_9_#res.offset|) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ |ldv_usb_alloc_urb_9_#res.base| |ldv_usb_alloc_urb_9_#res.offset|)))} is VALID [2018-11-19 18:46:15,365 INFO L268 TraceCheckUtils]: 484: Hoare quadruple {532506#(and (<= (+ |ldv_usb_alloc_urb_9_#res.base| |ldv_usb_alloc_urb_9_#res.offset|) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ |ldv_usb_alloc_urb_9_#res.base| |ldv_usb_alloc_urb_9_#res.offset|)))} {532502#true} #2709#return; {532507#(and (<= (+ |ims_pcu_buffers_alloc_#t~ret560.base| |ims_pcu_buffers_alloc_#t~ret560.offset|) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ |ims_pcu_buffers_alloc_#t~ret560.base| |ims_pcu_buffers_alloc_#t~ret560.offset|)))} is VALID [2018-11-19 18:46:15,366 INFO L273 TraceCheckUtils]: 485: Hoare triple {532507#(and (<= (+ |ims_pcu_buffers_alloc_#t~ret560.base| |ims_pcu_buffers_alloc_#t~ret560.offset|) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ |ims_pcu_buffers_alloc_#t~ret560.base| |ims_pcu_buffers_alloc_#t~ret560.offset|)))} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} is VALID [2018-11-19 18:46:15,367 INFO L273 TraceCheckUtils]: 486: Hoare triple {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} assume !(0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616);havoc #t~mem561.base, #t~mem561.offset;call #t~mem565.base, #t~mem565.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem566.base, #t~mem566.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem567 := read~int(#t~mem566.base, 92 + #t~mem566.offset, 4);call write~int(~bitwiseOr(#t~mem567, 4), #t~mem565.base, 92 + #t~mem565.offset, 4);havoc #t~mem565.base, #t~mem565.offset;havoc #t~mem567;havoc #t~mem566.base, #t~mem566.offset;call #t~mem568.base, #t~mem568.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem569 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call write~int(#t~mem569, #t~mem568.base, 104 + #t~mem568.offset, 8);havoc #t~mem569;havoc #t~mem568.base, #t~mem568.offset;call #t~mem570.base, #t~mem570.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem571.base, #t~mem571.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8);call #t~mem572 := read~int(#t~mem571.base, 2 + #t~mem571.offset, 1); {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} is VALID [2018-11-19 18:46:15,367 INFO L256 TraceCheckUtils]: 487: Hoare triple {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} call #t~ret573 := __create_pipe(#t~mem570.base, #t~mem570.offset, #t~mem572 % 256); {532502#true} is VALID [2018-11-19 18:46:15,368 INFO L273 TraceCheckUtils]: 488: Hoare triple {532502#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~endpoint := #in~endpoint;call #t~mem123 := read~int(~dev.base, ~dev.offset, 4);#res := ~bitwiseOr(256 * #t~mem123, 32768 * ~endpoint);havoc #t~mem123; {532502#true} is VALID [2018-11-19 18:46:15,368 INFO L273 TraceCheckUtils]: 489: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,369 INFO L268 TraceCheckUtils]: 490: Hoare quadruple {532502#true} {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} #2711#return; {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} is VALID [2018-11-19 18:46:15,370 INFO L273 TraceCheckUtils]: 491: Hoare triple {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} ~tmp___0~15 := #t~ret573;havoc #t~mem571.base, #t~mem571.offset;havoc #t~mem570.base, #t~mem570.offset;havoc #t~mem572;havoc #t~ret573;call #t~mem574.base, #t~mem574.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem575.base, #t~mem575.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem576.base, #t~mem576.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem577 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} is VALID [2018-11-19 18:46:15,370 INFO L256 TraceCheckUtils]: 492: Hoare triple {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} call ldv_usb_fill_bulk_urb_10(#t~mem574.base, #t~mem574.offset, #t~mem575.base, #t~mem575.offset, ~bitwiseOr(~tmp___0~15, 3221225600), #t~mem576.base, #t~mem576.offset, (if #t~mem577 % 4294967296 % 4294967296 <= 2147483647 then #t~mem577 % 4294967296 % 4294967296 else #t~mem577 % 4294967296 % 4294967296 - 4294967296), #funAddr~ims_pcu_irq.base, #funAddr~ims_pcu_irq.offset, ~pcu.base, ~pcu.offset); {532502#true} is VALID [2018-11-19 18:46:15,370 INFO L273 TraceCheckUtils]: 493: Hoare triple {532502#true} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset;~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~pipe := #in~pipe;~transfer_buffer.base, ~transfer_buffer.offset := #in~transfer_buffer.base, #in~transfer_buffer.offset;~buffer_length := #in~buffer_length;~complete_fn.base, ~complete_fn.offset := #in~complete_fn.base, #in~complete_fn.offset;~context.base, ~context.offset := #in~context.base, #in~context.offset; {532502#true} is VALID [2018-11-19 18:46:15,370 INFO L256 TraceCheckUtils]: 494: Hoare triple {532502#true} call ldv_fill_bulk_urb(~urb.base, ~urb.offset, ~complete_fn.base, ~complete_fn.offset); {532502#true} is VALID [2018-11-19 18:46:15,371 INFO L273 TraceCheckUtils]: 495: Hoare triple {532502#true} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset;~complete_fn.base, ~complete_fn.offset := #in~complete_fn.base, #in~complete_fn.offset; {532502#true} is VALID [2018-11-19 18:46:15,371 INFO L273 TraceCheckUtils]: 496: Hoare triple {532502#true} assume (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616 == (~urb.base + ~urb.offset) % 18446744073709551616;~completeFnBulk~0.base, ~completeFnBulk~0.offset := ~complete_fn.base, ~complete_fn.offset;~completeFnBulkCounter~0 := 1 + ~completeFnBulkCounter~0; {532502#true} is VALID [2018-11-19 18:46:15,371 INFO L273 TraceCheckUtils]: 497: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,371 INFO L268 TraceCheckUtils]: 498: Hoare quadruple {532502#true} {532502#true} #2587#return; {532502#true} is VALID [2018-11-19 18:46:15,371 INFO L273 TraceCheckUtils]: 499: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,373 INFO L268 TraceCheckUtils]: 500: Hoare quadruple {532502#true} {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} #2713#return; {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} is VALID [2018-11-19 18:46:15,373 INFO L273 TraceCheckUtils]: 501: Hoare triple {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} havoc #t~mem574.base, #t~mem574.offset;havoc #t~mem575.base, #t~mem575.offset;havoc #t~mem576.base, #t~mem576.offset;havoc #t~mem577;call #t~mem578 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} is VALID [2018-11-19 18:46:15,374 INFO L256 TraceCheckUtils]: 502: Hoare triple {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} call #t~ret579.base, #t~ret579.offset := kmalloc(#t~mem578, 208); {532502#true} is VALID [2018-11-19 18:46:15,374 INFO L273 TraceCheckUtils]: 503: Hoare triple {532502#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,374 INFO L256 TraceCheckUtils]: 504: Hoare triple {532502#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {532502#true} is VALID [2018-11-19 18:46:15,374 INFO L273 TraceCheckUtils]: 505: Hoare triple {532502#true} ~size := #in~size;~t := #in~t; {532502#true} is VALID [2018-11-19 18:46:15,374 INFO L256 TraceCheckUtils]: 506: Hoare triple {532502#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {532502#true} is VALID [2018-11-19 18:46:15,375 INFO L273 TraceCheckUtils]: 507: Hoare triple {532502#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {532502#true} is VALID [2018-11-19 18:46:15,375 INFO L273 TraceCheckUtils]: 508: Hoare triple {532502#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {532502#true} is VALID [2018-11-19 18:46:15,375 INFO L273 TraceCheckUtils]: 509: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,375 INFO L268 TraceCheckUtils]: 510: Hoare quadruple {532502#true} {532502#true} #2691#return; {532502#true} is VALID [2018-11-19 18:46:15,375 INFO L273 TraceCheckUtils]: 511: Hoare triple {532502#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {532502#true} is VALID [2018-11-19 18:46:15,375 INFO L273 TraceCheckUtils]: 512: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,375 INFO L268 TraceCheckUtils]: 513: Hoare quadruple {532502#true} {532502#true} #2781#return; {532502#true} is VALID [2018-11-19 18:46:15,376 INFO L273 TraceCheckUtils]: 514: Hoare triple {532502#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {532502#true} is VALID [2018-11-19 18:46:15,376 INFO L273 TraceCheckUtils]: 515: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,377 INFO L268 TraceCheckUtils]: 516: Hoare quadruple {532502#true} {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} #2715#return; {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} is VALID [2018-11-19 18:46:15,378 INFO L273 TraceCheckUtils]: 517: Hoare triple {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} ~tmp___1~6.base, ~tmp___1~6.offset := #t~ret579.base, #t~ret579.offset;havoc #t~mem578;havoc #t~ret579.base, #t~ret579.offset;call write~$Pointer$(~tmp___1~6.base, ~tmp___1~6.offset, ~pcu.base, 175 + ~pcu.offset, 8);call #t~mem580.base, #t~mem580.offset := read~$Pointer$(~pcu.base, 175 + ~pcu.offset, 8); {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} is VALID [2018-11-19 18:46:15,379 INFO L273 TraceCheckUtils]: 518: Hoare triple {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} assume 0 == (#t~mem580.base + #t~mem580.offset) % 18446744073709551616;havoc #t~mem580.base, #t~mem580.offset;havoc #t~nondet581;call #t~mem582.base, #t~mem582.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem582.base, #t~mem582.offset;~error~18 := -12; {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} is VALID [2018-11-19 18:46:15,380 INFO L273 TraceCheckUtils]: 519: Hoare triple {532508#(and (<= (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139))) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ (select (select |#memory_$Pointer$.base| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)) (select (select |#memory_$Pointer$.offset| ims_pcu_buffers_alloc_~pcu.base) (+ ims_pcu_buffers_alloc_~pcu.offset 139)))))} call #t~mem616.base, #t~mem616.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {532509#(and (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ |ims_pcu_buffers_alloc_#t~mem616.offset| |ims_pcu_buffers_alloc_#t~mem616.base|)) (<= (+ |ims_pcu_buffers_alloc_#t~mem616.offset| |ims_pcu_buffers_alloc_#t~mem616.base|) (+ ~usb_urb~0.offset ~usb_urb~0.base)))} is VALID [2018-11-19 18:46:15,381 INFO L256 TraceCheckUtils]: 520: Hoare triple {532509#(and (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ |ims_pcu_buffers_alloc_#t~mem616.offset| |ims_pcu_buffers_alloc_#t~mem616.base|)) (<= (+ |ims_pcu_buffers_alloc_#t~mem616.offset| |ims_pcu_buffers_alloc_#t~mem616.base|) (+ ~usb_urb~0.offset ~usb_urb~0.base)))} call ldv_usb_free_urb_13(#t~mem616.base, #t~mem616.offset); {532510#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:46:15,382 INFO L273 TraceCheckUtils]: 521: Hoare triple {532510#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset; {532511#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |ldv_usb_free_urb_13_#in~urb.base| ldv_usb_free_urb_13_~urb.base) (= |ldv_usb_free_urb_13_#in~urb.offset| ldv_usb_free_urb_13_~urb.offset) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:46:15,383 INFO L256 TraceCheckUtils]: 522: Hoare triple {532511#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |ldv_usb_free_urb_13_#in~urb.base| ldv_usb_free_urb_13_~urb.base) (= |ldv_usb_free_urb_13_#in~urb.offset| ldv_usb_free_urb_13_~urb.offset) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call ldv_free_urb(~urb.base, ~urb.offset); {532510#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:46:15,383 INFO L273 TraceCheckUtils]: 523: Hoare triple {532510#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset; {532512#(and (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ldv_free_urb_~urb.offset |ldv_free_urb_#in~urb.offset|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|) (= ldv_free_urb_~urb.base |ldv_free_urb_#in~urb.base|))} is VALID [2018-11-19 18:46:15,395 INFO L273 TraceCheckUtils]: 524: Hoare triple {532512#(and (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ldv_free_urb_~urb.offset |ldv_free_urb_#in~urb.offset|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|) (= ldv_free_urb_~urb.base |ldv_free_urb_#in~urb.base|))} assume !((~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616 == (~urb.base + ~urb.offset) % 18446744073709551616 && 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {532513#(and (or (<= (+ ~usb_urb~0.offset ~usb_urb~0.base 1) (+ |ldv_free_urb_#in~urb.offset| |ldv_free_urb_#in~urb.base|)) (= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616))) (<= (+ |ldv_free_urb_#in~urb.offset| |ldv_free_urb_#in~urb.base| 1) (+ ~usb_urb~0.offset ~usb_urb~0.base))) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|))} is VALID [2018-11-19 18:46:15,396 INFO L273 TraceCheckUtils]: 525: Hoare triple {532513#(and (or (<= (+ ~usb_urb~0.offset ~usb_urb~0.base 1) (+ |ldv_free_urb_#in~urb.offset| |ldv_free_urb_#in~urb.base|)) (= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616))) (<= (+ |ldv_free_urb_#in~urb.offset| |ldv_free_urb_#in~urb.base| 1) (+ ~usb_urb~0.offset ~usb_urb~0.base))) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|))} assume true; {532513#(and (or (<= (+ ~usb_urb~0.offset ~usb_urb~0.base 1) (+ |ldv_free_urb_#in~urb.offset| |ldv_free_urb_#in~urb.base|)) (= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616))) (<= (+ |ldv_free_urb_#in~urb.offset| |ldv_free_urb_#in~urb.base| 1) (+ ~usb_urb~0.offset ~usb_urb~0.base))) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|))} is VALID [2018-11-19 18:46:15,398 INFO L268 TraceCheckUtils]: 526: Hoare quadruple {532513#(and (or (<= (+ ~usb_urb~0.offset ~usb_urb~0.base 1) (+ |ldv_free_urb_#in~urb.offset| |ldv_free_urb_#in~urb.base|)) (= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616))) (<= (+ |ldv_free_urb_#in~urb.offset| |ldv_free_urb_#in~urb.base| 1) (+ ~usb_urb~0.offset ~usb_urb~0.base))) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|))} {532511#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |ldv_usb_free_urb_13_#in~urb.base| ldv_usb_free_urb_13_~urb.base) (= |ldv_usb_free_urb_13_#in~urb.offset| ldv_usb_free_urb_13_~urb.offset) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #2695#return; {532514#(and (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|) (or (<= (+ |ldv_usb_free_urb_13_#in~urb.base| |ldv_usb_free_urb_13_#in~urb.offset| 1) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616))) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base 1) (+ |ldv_usb_free_urb_13_#in~urb.base| |ldv_usb_free_urb_13_#in~urb.offset|))))} is VALID [2018-11-19 18:46:15,399 INFO L273 TraceCheckUtils]: 527: Hoare triple {532514#(and (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|) (or (<= (+ |ldv_usb_free_urb_13_#in~urb.base| |ldv_usb_free_urb_13_#in~urb.offset| 1) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616))) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base 1) (+ |ldv_usb_free_urb_13_#in~urb.base| |ldv_usb_free_urb_13_#in~urb.offset|))))} assume true; {532514#(and (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|) (or (<= (+ |ldv_usb_free_urb_13_#in~urb.base| |ldv_usb_free_urb_13_#in~urb.offset| 1) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616))) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base 1) (+ |ldv_usb_free_urb_13_#in~urb.base| |ldv_usb_free_urb_13_#in~urb.offset|))))} is VALID [2018-11-19 18:46:15,401 INFO L268 TraceCheckUtils]: 528: Hoare quadruple {532514#(and (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|) (or (<= (+ |ldv_usb_free_urb_13_#in~urb.base| |ldv_usb_free_urb_13_#in~urb.offset| 1) (+ ~usb_urb~0.offset ~usb_urb~0.base)) (= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616))) (<= (+ ~usb_urb~0.offset ~usb_urb~0.base 1) (+ |ldv_usb_free_urb_13_#in~urb.base| |ldv_usb_free_urb_13_#in~urb.offset|))))} {532509#(and (<= (+ ~usb_urb~0.offset ~usb_urb~0.base) (+ |ims_pcu_buffers_alloc_#t~mem616.offset| |ims_pcu_buffers_alloc_#t~mem616.base|)) (<= (+ |ims_pcu_buffers_alloc_#t~mem616.offset| |ims_pcu_buffers_alloc_#t~mem616.base|) (+ ~usb_urb~0.offset ~usb_urb~0.base)))} #2723#return; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,401 INFO L273 TraceCheckUtils]: 529: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} havoc #t~mem616.base, #t~mem616.offset; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,402 INFO L273 TraceCheckUtils]: 530: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,402 INFO L273 TraceCheckUtils]: 531: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume true; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,403 INFO L268 TraceCheckUtils]: 532: Hoare quadruple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} {532502#true} #3109#return; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,403 INFO L273 TraceCheckUtils]: 533: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,404 INFO L273 TraceCheckUtils]: 534: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume 0 != ~error~25; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,404 INFO L273 TraceCheckUtils]: 535: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,405 INFO L273 TraceCheckUtils]: 536: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,405 INFO L273 TraceCheckUtils]: 537: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume true; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,406 INFO L268 TraceCheckUtils]: 538: Hoare quadruple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} {532502#true} #3015#return; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,407 INFO L273 TraceCheckUtils]: 539: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,407 INFO L273 TraceCheckUtils]: 540: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume !(0 == ~ldv_retval_3~0); {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,408 INFO L273 TraceCheckUtils]: 541: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,408 INFO L273 TraceCheckUtils]: 542: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,408 INFO L273 TraceCheckUtils]: 543: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,409 INFO L273 TraceCheckUtils]: 544: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,410 INFO L273 TraceCheckUtils]: 545: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,411 INFO L273 TraceCheckUtils]: 546: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,411 INFO L273 TraceCheckUtils]: 547: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,411 INFO L273 TraceCheckUtils]: 548: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,412 INFO L273 TraceCheckUtils]: 549: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,412 INFO L273 TraceCheckUtils]: 550: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,413 INFO L273 TraceCheckUtils]: 551: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume #t~switch909; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,413 INFO L273 TraceCheckUtils]: 552: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,413 INFO L273 TraceCheckUtils]: 553: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume #t~switch947; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,414 INFO L273 TraceCheckUtils]: 554: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,414 INFO L256 TraceCheckUtils]: 555: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} call ims_pcu_driver_exit(); {532502#true} is VALID [2018-11-19 18:46:15,414 INFO L256 TraceCheckUtils]: 556: Hoare triple {532502#true} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {532502#true} is VALID [2018-11-19 18:46:15,414 INFO L273 TraceCheckUtils]: 557: Hoare triple {532502#true} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {532502#true} is VALID [2018-11-19 18:46:15,415 INFO L273 TraceCheckUtils]: 558: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,415 INFO L268 TraceCheckUtils]: 559: Hoare quadruple {532502#true} {532502#true} #2597#return; {532502#true} is VALID [2018-11-19 18:46:15,415 INFO L273 TraceCheckUtils]: 560: Hoare triple {532502#true} assume true; {532502#true} is VALID [2018-11-19 18:46:15,415 INFO L268 TraceCheckUtils]: 561: Hoare quadruple {532502#true} {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} #3033#return; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,416 INFO L273 TraceCheckUtils]: 562: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} ~ldv_state_variable_0~0 := 2; {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,416 INFO L256 TraceCheckUtils]: 563: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} call ldv_check_final_state(); {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} is VALID [2018-11-19 18:46:15,417 INFO L273 TraceCheckUtils]: 564: Hoare triple {532515#(= (+ ~usb_urb~0.offset ~usb_urb~0.base) (* 18446744073709551616 (div (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616)))} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {532503#false} is VALID [2018-11-19 18:46:15,417 INFO L256 TraceCheckUtils]: 565: Hoare triple {532503#false} call ldv_error(); {532503#false} is VALID [2018-11-19 18:46:15,418 INFO L273 TraceCheckUtils]: 566: Hoare triple {532503#false} assume !false; {532503#false} is VALID [2018-11-19 18:46:15,618 INFO L134 CoverageAnalysis]: Checked inductivity of 2744 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 2722 trivial. 0 not checked. [2018-11-19 18:46:15,618 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:46:15,618 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-11-19 18:46:15,619 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 567 [2018-11-19 18:46:15,619 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:46:15,619 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states. [2018-11-19 18:46:16,141 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 420 edges. 420 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:46:16,141 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-19 18:46:16,141 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-19 18:46:16,142 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2018-11-19 18:46:16,142 INFO L87 Difference]: Start difference. First operand 7320 states and 9877 transitions. Second operand 14 states. [2018-11-19 18:49:02,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:49:02,275 INFO L93 Difference]: Finished difference Result 18485 states and 25145 transitions. [2018-11-19 18:49:02,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-11-19 18:49:02,276 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 567 [2018-11-19 18:49:02,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:49:02,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-19 18:49:02,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 5363 transitions. [2018-11-19 18:49:02,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-19 18:49:02,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 5363 transitions. [2018-11-19 18:49:02,486 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 31 states and 5363 transitions. [2018-11-19 18:49:08,475 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 5363 edges. 5363 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:49:14,939 INFO L225 Difference]: With dead ends: 18485 [2018-11-19 18:49:14,939 INFO L226 Difference]: Without dead ends: 11666 [2018-11-19 18:49:14,948 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 193 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=166, Invalid=956, Unknown=0, NotChecked=0, Total=1122 [2018-11-19 18:49:14,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11666 states. [2018-11-19 18:49:40,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11666 to 11074. [2018-11-19 18:49:40,270 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:49:40,271 INFO L82 GeneralOperation]: Start isEquivalent. First operand 11666 states. Second operand 11074 states. [2018-11-19 18:49:40,271 INFO L74 IsIncluded]: Start isIncluded. First operand 11666 states. Second operand 11074 states. [2018-11-19 18:49:40,271 INFO L87 Difference]: Start difference. First operand 11666 states. Second operand 11074 states. [2018-11-19 18:49:45,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:49:45,211 INFO L93 Difference]: Finished difference Result 11666 states and 15889 transitions. [2018-11-19 18:49:45,211 INFO L276 IsEmpty]: Start isEmpty. Operand 11666 states and 15889 transitions. [2018-11-19 18:49:45,229 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:49:45,229 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:49:45,229 INFO L74 IsIncluded]: Start isIncluded. First operand 11074 states. Second operand 11666 states. [2018-11-19 18:49:45,229 INFO L87 Difference]: Start difference. First operand 11074 states. Second operand 11666 states. [2018-11-19 18:49:50,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:49:50,320 INFO L93 Difference]: Finished difference Result 11666 states and 15889 transitions. [2018-11-19 18:49:50,321 INFO L276 IsEmpty]: Start isEmpty. Operand 11666 states and 15889 transitions. [2018-11-19 18:49:50,340 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:49:50,340 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:49:50,340 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:49:50,340 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:49:50,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11074 states. [2018-11-19 18:49:55,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11074 states to 11074 states and 14918 transitions. [2018-11-19 18:49:55,277 INFO L78 Accepts]: Start accepts. Automaton has 11074 states and 14918 transitions. Word has length 567 [2018-11-19 18:49:55,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:49:55,278 INFO L480 AbstractCegarLoop]: Abstraction has 11074 states and 14918 transitions. [2018-11-19 18:49:55,278 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-19 18:49:55,278 INFO L276 IsEmpty]: Start isEmpty. Operand 11074 states and 14918 transitions. [2018-11-19 18:49:55,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 594 [2018-11-19 18:49:55,289 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:49:55,289 INFO L384 BasicCegarLoop]: trace histogram [37, 37, 37, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:49:55,290 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:49:55,291 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:49:55,292 INFO L82 PathProgramCache]: Analyzing trace with hash -1444028314, now seen corresponding path program 1 times [2018-11-19 18:49:55,292 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:49:55,292 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:49:55,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:49:55,294 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:49:55,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:49:55,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:49:55,826 INFO L256 TraceCheckUtils]: 0: Hoare triple {594998#true} call ULTIMATE.init(); {594998#true} is VALID [2018-11-19 18:49:55,827 INFO L273 TraceCheckUtils]: 1: Hoare triple {594998#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,827 INFO L273 TraceCheckUtils]: 2: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,827 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {594998#true} {594998#true} #3175#return; {594998#true} is VALID [2018-11-19 18:49:55,828 INFO L256 TraceCheckUtils]: 4: Hoare triple {594998#true} call #t~ret973 := main(); {594998#true} is VALID [2018-11-19 18:49:55,828 INFO L273 TraceCheckUtils]: 5: Hoare triple {594998#true} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {594998#true} is VALID [2018-11-19 18:49:55,828 INFO L256 TraceCheckUtils]: 6: Hoare triple {594998#true} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {594998#true} is VALID [2018-11-19 18:49:55,828 INFO L273 TraceCheckUtils]: 7: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,828 INFO L273 TraceCheckUtils]: 8: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,828 INFO L273 TraceCheckUtils]: 9: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,828 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {594998#true} {594998#true} #2927#return; {594998#true} is VALID [2018-11-19 18:49:55,829 INFO L273 TraceCheckUtils]: 11: Hoare triple {594998#true} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {594998#true} is VALID [2018-11-19 18:49:55,829 INFO L256 TraceCheckUtils]: 12: Hoare triple {594998#true} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {594998#true} is VALID [2018-11-19 18:49:55,829 INFO L273 TraceCheckUtils]: 13: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,829 INFO L273 TraceCheckUtils]: 14: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,829 INFO L273 TraceCheckUtils]: 15: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,829 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {594998#true} {594998#true} #2929#return; {594998#true} is VALID [2018-11-19 18:49:55,829 INFO L273 TraceCheckUtils]: 17: Hoare triple {594998#true} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {594998#true} is VALID [2018-11-19 18:49:55,830 INFO L256 TraceCheckUtils]: 18: Hoare triple {594998#true} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {594998#true} is VALID [2018-11-19 18:49:55,830 INFO L273 TraceCheckUtils]: 19: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,830 INFO L273 TraceCheckUtils]: 20: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,830 INFO L273 TraceCheckUtils]: 21: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,830 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {594998#true} {594998#true} #2931#return; {594998#true} is VALID [2018-11-19 18:49:55,830 INFO L273 TraceCheckUtils]: 23: Hoare triple {594998#true} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {594998#true} is VALID [2018-11-19 18:49:55,831 INFO L256 TraceCheckUtils]: 24: Hoare triple {594998#true} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {594998#true} is VALID [2018-11-19 18:49:55,831 INFO L273 TraceCheckUtils]: 25: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,831 INFO L273 TraceCheckUtils]: 26: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,831 INFO L273 TraceCheckUtils]: 27: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,831 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {594998#true} {594998#true} #2933#return; {594998#true} is VALID [2018-11-19 18:49:55,831 INFO L273 TraceCheckUtils]: 29: Hoare triple {594998#true} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {594998#true} is VALID [2018-11-19 18:49:55,831 INFO L256 TraceCheckUtils]: 30: Hoare triple {594998#true} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {594998#true} is VALID [2018-11-19 18:49:55,832 INFO L273 TraceCheckUtils]: 31: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,832 INFO L273 TraceCheckUtils]: 32: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,832 INFO L273 TraceCheckUtils]: 33: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,832 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {594998#true} {594998#true} #2935#return; {594998#true} is VALID [2018-11-19 18:49:55,832 INFO L273 TraceCheckUtils]: 35: Hoare triple {594998#true} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {594998#true} is VALID [2018-11-19 18:49:55,832 INFO L256 TraceCheckUtils]: 36: Hoare triple {594998#true} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {594998#true} is VALID [2018-11-19 18:49:55,832 INFO L273 TraceCheckUtils]: 37: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,833 INFO L273 TraceCheckUtils]: 38: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,833 INFO L273 TraceCheckUtils]: 39: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,833 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {594998#true} {594998#true} #2937#return; {594998#true} is VALID [2018-11-19 18:49:55,833 INFO L273 TraceCheckUtils]: 41: Hoare triple {594998#true} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {594998#true} is VALID [2018-11-19 18:49:55,833 INFO L256 TraceCheckUtils]: 42: Hoare triple {594998#true} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {594998#true} is VALID [2018-11-19 18:49:55,833 INFO L273 TraceCheckUtils]: 43: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,833 INFO L273 TraceCheckUtils]: 44: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,834 INFO L273 TraceCheckUtils]: 45: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,834 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {594998#true} {594998#true} #2939#return; {594998#true} is VALID [2018-11-19 18:49:55,834 INFO L273 TraceCheckUtils]: 47: Hoare triple {594998#true} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {594998#true} is VALID [2018-11-19 18:49:55,834 INFO L256 TraceCheckUtils]: 48: Hoare triple {594998#true} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {594998#true} is VALID [2018-11-19 18:49:55,834 INFO L273 TraceCheckUtils]: 49: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,835 INFO L273 TraceCheckUtils]: 50: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,835 INFO L273 TraceCheckUtils]: 51: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,835 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {594998#true} {594998#true} #2941#return; {594998#true} is VALID [2018-11-19 18:49:55,835 INFO L273 TraceCheckUtils]: 53: Hoare triple {594998#true} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {594998#true} is VALID [2018-11-19 18:49:55,835 INFO L256 TraceCheckUtils]: 54: Hoare triple {594998#true} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {594998#true} is VALID [2018-11-19 18:49:55,835 INFO L273 TraceCheckUtils]: 55: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,835 INFO L273 TraceCheckUtils]: 56: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,836 INFO L273 TraceCheckUtils]: 57: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,836 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {594998#true} {594998#true} #2943#return; {594998#true} is VALID [2018-11-19 18:49:55,836 INFO L273 TraceCheckUtils]: 59: Hoare triple {594998#true} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {594998#true} is VALID [2018-11-19 18:49:55,836 INFO L256 TraceCheckUtils]: 60: Hoare triple {594998#true} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {594998#true} is VALID [2018-11-19 18:49:55,836 INFO L273 TraceCheckUtils]: 61: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,836 INFO L273 TraceCheckUtils]: 62: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,837 INFO L273 TraceCheckUtils]: 63: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,837 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {594998#true} {594998#true} #2945#return; {594998#true} is VALID [2018-11-19 18:49:55,837 INFO L273 TraceCheckUtils]: 65: Hoare triple {594998#true} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {594998#true} is VALID [2018-11-19 18:49:55,837 INFO L256 TraceCheckUtils]: 66: Hoare triple {594998#true} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {594998#true} is VALID [2018-11-19 18:49:55,837 INFO L273 TraceCheckUtils]: 67: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,837 INFO L273 TraceCheckUtils]: 68: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,838 INFO L273 TraceCheckUtils]: 69: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,838 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {594998#true} {594998#true} #2947#return; {594998#true} is VALID [2018-11-19 18:49:55,838 INFO L273 TraceCheckUtils]: 71: Hoare triple {594998#true} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {594998#true} is VALID [2018-11-19 18:49:55,838 INFO L256 TraceCheckUtils]: 72: Hoare triple {594998#true} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {594998#true} is VALID [2018-11-19 18:49:55,838 INFO L273 TraceCheckUtils]: 73: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,838 INFO L273 TraceCheckUtils]: 74: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,839 INFO L273 TraceCheckUtils]: 75: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,839 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {594998#true} {594998#true} #2949#return; {594998#true} is VALID [2018-11-19 18:49:55,839 INFO L273 TraceCheckUtils]: 77: Hoare triple {594998#true} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {594998#true} is VALID [2018-11-19 18:49:55,839 INFO L256 TraceCheckUtils]: 78: Hoare triple {594998#true} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {594998#true} is VALID [2018-11-19 18:49:55,839 INFO L273 TraceCheckUtils]: 79: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,839 INFO L273 TraceCheckUtils]: 80: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,840 INFO L273 TraceCheckUtils]: 81: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,840 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {594998#true} {594998#true} #2951#return; {594998#true} is VALID [2018-11-19 18:49:55,840 INFO L273 TraceCheckUtils]: 83: Hoare triple {594998#true} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,840 INFO L256 TraceCheckUtils]: 84: Hoare triple {594998#true} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {594998#true} is VALID [2018-11-19 18:49:55,840 INFO L273 TraceCheckUtils]: 85: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,840 INFO L273 TraceCheckUtils]: 86: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,840 INFO L273 TraceCheckUtils]: 87: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,841 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {594998#true} {594998#true} #2953#return; {594998#true} is VALID [2018-11-19 18:49:55,841 INFO L273 TraceCheckUtils]: 89: Hoare triple {594998#true} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,841 INFO L256 TraceCheckUtils]: 90: Hoare triple {594998#true} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {594998#true} is VALID [2018-11-19 18:49:55,841 INFO L273 TraceCheckUtils]: 91: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,841 INFO L273 TraceCheckUtils]: 92: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,841 INFO L273 TraceCheckUtils]: 93: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,842 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {594998#true} {594998#true} #2955#return; {594998#true} is VALID [2018-11-19 18:49:55,842 INFO L273 TraceCheckUtils]: 95: Hoare triple {594998#true} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {594998#true} is VALID [2018-11-19 18:49:55,842 INFO L256 TraceCheckUtils]: 96: Hoare triple {594998#true} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {594998#true} is VALID [2018-11-19 18:49:55,842 INFO L273 TraceCheckUtils]: 97: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,842 INFO L273 TraceCheckUtils]: 98: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,842 INFO L273 TraceCheckUtils]: 99: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,842 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {594998#true} {594998#true} #2957#return; {594998#true} is VALID [2018-11-19 18:49:55,843 INFO L273 TraceCheckUtils]: 101: Hoare triple {594998#true} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,843 INFO L256 TraceCheckUtils]: 102: Hoare triple {594998#true} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {594998#true} is VALID [2018-11-19 18:49:55,843 INFO L273 TraceCheckUtils]: 103: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,843 INFO L273 TraceCheckUtils]: 104: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,843 INFO L273 TraceCheckUtils]: 105: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,843 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {594998#true} {594998#true} #2959#return; {594998#true} is VALID [2018-11-19 18:49:55,844 INFO L273 TraceCheckUtils]: 107: Hoare triple {594998#true} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,844 INFO L256 TraceCheckUtils]: 108: Hoare triple {594998#true} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {594998#true} is VALID [2018-11-19 18:49:55,844 INFO L273 TraceCheckUtils]: 109: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,844 INFO L273 TraceCheckUtils]: 110: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,844 INFO L273 TraceCheckUtils]: 111: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,844 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {594998#true} {594998#true} #2961#return; {594998#true} is VALID [2018-11-19 18:49:55,844 INFO L273 TraceCheckUtils]: 113: Hoare triple {594998#true} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,845 INFO L256 TraceCheckUtils]: 114: Hoare triple {594998#true} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {594998#true} is VALID [2018-11-19 18:49:55,845 INFO L273 TraceCheckUtils]: 115: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,845 INFO L273 TraceCheckUtils]: 116: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,845 INFO L273 TraceCheckUtils]: 117: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,845 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {594998#true} {594998#true} #2963#return; {594998#true} is VALID [2018-11-19 18:49:55,845 INFO L273 TraceCheckUtils]: 119: Hoare triple {594998#true} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {594998#true} is VALID [2018-11-19 18:49:55,846 INFO L256 TraceCheckUtils]: 120: Hoare triple {594998#true} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {594998#true} is VALID [2018-11-19 18:49:55,846 INFO L273 TraceCheckUtils]: 121: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,846 INFO L273 TraceCheckUtils]: 122: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,846 INFO L273 TraceCheckUtils]: 123: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,846 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {594998#true} {594998#true} #2965#return; {594998#true} is VALID [2018-11-19 18:49:55,846 INFO L273 TraceCheckUtils]: 125: Hoare triple {594998#true} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,846 INFO L256 TraceCheckUtils]: 126: Hoare triple {594998#true} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {594998#true} is VALID [2018-11-19 18:49:55,847 INFO L273 TraceCheckUtils]: 127: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,847 INFO L273 TraceCheckUtils]: 128: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,847 INFO L273 TraceCheckUtils]: 129: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,847 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {594998#true} {594998#true} #2967#return; {594998#true} is VALID [2018-11-19 18:49:55,847 INFO L273 TraceCheckUtils]: 131: Hoare triple {594998#true} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {594998#true} is VALID [2018-11-19 18:49:55,847 INFO L256 TraceCheckUtils]: 132: Hoare triple {594998#true} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {594998#true} is VALID [2018-11-19 18:49:55,848 INFO L273 TraceCheckUtils]: 133: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,848 INFO L273 TraceCheckUtils]: 134: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,848 INFO L273 TraceCheckUtils]: 135: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,848 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {594998#true} {594998#true} #2969#return; {594998#true} is VALID [2018-11-19 18:49:55,848 INFO L273 TraceCheckUtils]: 137: Hoare triple {594998#true} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,848 INFO L256 TraceCheckUtils]: 138: Hoare triple {594998#true} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {594998#true} is VALID [2018-11-19 18:49:55,848 INFO L273 TraceCheckUtils]: 139: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,849 INFO L273 TraceCheckUtils]: 140: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,849 INFO L273 TraceCheckUtils]: 141: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,849 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {594998#true} {594998#true} #2971#return; {594998#true} is VALID [2018-11-19 18:49:55,849 INFO L273 TraceCheckUtils]: 143: Hoare triple {594998#true} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,849 INFO L256 TraceCheckUtils]: 144: Hoare triple {594998#true} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {594998#true} is VALID [2018-11-19 18:49:55,849 INFO L273 TraceCheckUtils]: 145: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,850 INFO L273 TraceCheckUtils]: 146: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,850 INFO L273 TraceCheckUtils]: 147: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,850 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {594998#true} {594998#true} #2973#return; {594998#true} is VALID [2018-11-19 18:49:55,850 INFO L273 TraceCheckUtils]: 149: Hoare triple {594998#true} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {594998#true} is VALID [2018-11-19 18:49:55,850 INFO L256 TraceCheckUtils]: 150: Hoare triple {594998#true} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {594998#true} is VALID [2018-11-19 18:49:55,850 INFO L273 TraceCheckUtils]: 151: Hoare triple {594998#true} #t~loopctr974 := 0; {594998#true} is VALID [2018-11-19 18:49:55,850 INFO L273 TraceCheckUtils]: 152: Hoare triple {594998#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {594998#true} is VALID [2018-11-19 18:49:55,851 INFO L273 TraceCheckUtils]: 153: Hoare triple {594998#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {594998#true} is VALID [2018-11-19 18:49:55,851 INFO L273 TraceCheckUtils]: 154: Hoare triple {594998#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {594998#true} is VALID [2018-11-19 18:49:55,851 INFO L273 TraceCheckUtils]: 155: Hoare triple {594998#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {594998#true} is VALID [2018-11-19 18:49:55,851 INFO L273 TraceCheckUtils]: 156: Hoare triple {594998#true} assume !(#t~loopctr974 < #amount); {594998#true} is VALID [2018-11-19 18:49:55,851 INFO L273 TraceCheckUtils]: 157: Hoare triple {594998#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {594998#true} is VALID [2018-11-19 18:49:55,851 INFO L268 TraceCheckUtils]: 158: Hoare quadruple {594998#true} {594998#true} #2975#return; {594998#true} is VALID [2018-11-19 18:49:55,851 INFO L273 TraceCheckUtils]: 159: Hoare triple {594998#true} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {594998#true} is VALID [2018-11-19 18:49:55,852 INFO L273 TraceCheckUtils]: 160: Hoare triple {594998#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,852 INFO L273 TraceCheckUtils]: 161: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,852 INFO L273 TraceCheckUtils]: 162: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,852 INFO L273 TraceCheckUtils]: 163: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,852 INFO L273 TraceCheckUtils]: 164: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,852 INFO L273 TraceCheckUtils]: 165: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,852 INFO L273 TraceCheckUtils]: 166: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,853 INFO L273 TraceCheckUtils]: 167: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,853 INFO L273 TraceCheckUtils]: 168: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,853 INFO L273 TraceCheckUtils]: 169: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,853 INFO L273 TraceCheckUtils]: 170: Hoare triple {594998#true} assume #t~switch909; {594998#true} is VALID [2018-11-19 18:49:55,853 INFO L273 TraceCheckUtils]: 171: Hoare triple {594998#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {594998#true} is VALID [2018-11-19 18:49:55,853 INFO L273 TraceCheckUtils]: 172: Hoare triple {594998#true} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {594998#true} is VALID [2018-11-19 18:49:55,853 INFO L273 TraceCheckUtils]: 173: Hoare triple {594998#true} assume #t~switch947; {594998#true} is VALID [2018-11-19 18:49:55,854 INFO L273 TraceCheckUtils]: 174: Hoare triple {594998#true} assume 1 == ~ldv_state_variable_0~0; {594998#true} is VALID [2018-11-19 18:49:55,854 INFO L256 TraceCheckUtils]: 175: Hoare triple {594998#true} call #t~ret948 := ims_pcu_driver_init(); {594998#true} is VALID [2018-11-19 18:49:55,854 INFO L273 TraceCheckUtils]: 176: Hoare triple {594998#true} havoc ~tmp~46; {594998#true} is VALID [2018-11-19 18:49:55,854 INFO L256 TraceCheckUtils]: 177: Hoare triple {594998#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {594998#true} is VALID [2018-11-19 18:49:55,854 INFO L273 TraceCheckUtils]: 178: Hoare triple {594998#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {594998#true} is VALID [2018-11-19 18:49:55,854 INFO L256 TraceCheckUtils]: 179: Hoare triple {594998#true} call ldv_usb_driver_1(); {594998#true} is VALID [2018-11-19 18:49:55,855 INFO L273 TraceCheckUtils]: 180: Hoare triple {594998#true} havoc ~tmp~53.base, ~tmp~53.offset; {594998#true} is VALID [2018-11-19 18:49:55,855 INFO L256 TraceCheckUtils]: 181: Hoare triple {594998#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {594998#true} is VALID [2018-11-19 18:49:55,855 INFO L273 TraceCheckUtils]: 182: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,855 INFO L273 TraceCheckUtils]: 183: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,855 INFO L273 TraceCheckUtils]: 184: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,855 INFO L268 TraceCheckUtils]: 185: Hoare quadruple {594998#true} {594998#true} #2613#return; {594998#true} is VALID [2018-11-19 18:49:55,855 INFO L273 TraceCheckUtils]: 186: Hoare triple {594998#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {594998#true} is VALID [2018-11-19 18:49:55,856 INFO L273 TraceCheckUtils]: 187: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,856 INFO L268 TraceCheckUtils]: 188: Hoare quadruple {594998#true} {594998#true} #2537#return; {594998#true} is VALID [2018-11-19 18:49:55,856 INFO L273 TraceCheckUtils]: 189: Hoare triple {594998#true} #res := ~ldv_func_res~0; {594998#true} is VALID [2018-11-19 18:49:55,856 INFO L273 TraceCheckUtils]: 190: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,856 INFO L268 TraceCheckUtils]: 191: Hoare quadruple {594998#true} {594998#true} #2777#return; {594998#true} is VALID [2018-11-19 18:49:55,856 INFO L273 TraceCheckUtils]: 192: Hoare triple {594998#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {594998#true} is VALID [2018-11-19 18:49:55,856 INFO L273 TraceCheckUtils]: 193: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,857 INFO L268 TraceCheckUtils]: 194: Hoare quadruple {594998#true} {594998#true} #3035#return; {594998#true} is VALID [2018-11-19 18:49:55,857 INFO L273 TraceCheckUtils]: 195: Hoare triple {594998#true} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {594998#true} is VALID [2018-11-19 18:49:55,857 INFO L273 TraceCheckUtils]: 196: Hoare triple {594998#true} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_10~0 := 1; {594998#true} is VALID [2018-11-19 18:49:55,857 INFO L256 TraceCheckUtils]: 197: Hoare triple {594998#true} call ldv_initialize_ims_pcu_attribute_10(); {594998#true} is VALID [2018-11-19 18:49:55,857 INFO L273 TraceCheckUtils]: 198: Hoare triple {594998#true} havoc ~tmp~47.base, ~tmp~47.offset;havoc ~tmp___0~19.base, ~tmp___0~19.offset; {594998#true} is VALID [2018-11-19 18:49:55,857 INFO L256 TraceCheckUtils]: 199: Hoare triple {594998#true} call #t~ret861.base, #t~ret861.offset := ldv_zalloc(1376); {594998#true} is VALID [2018-11-19 18:49:55,857 INFO L273 TraceCheckUtils]: 200: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,858 INFO L273 TraceCheckUtils]: 201: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,858 INFO L273 TraceCheckUtils]: 202: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,858 INFO L268 TraceCheckUtils]: 203: Hoare quadruple {594998#true} {594998#true} #2807#return; {594998#true} is VALID [2018-11-19 18:49:55,858 INFO L273 TraceCheckUtils]: 204: Hoare triple {594998#true} ~tmp~47.base, ~tmp~47.offset := #t~ret861.base, #t~ret861.offset;havoc #t~ret861.base, #t~ret861.offset;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := ~tmp~47.base, ~tmp~47.offset; {594998#true} is VALID [2018-11-19 18:49:55,858 INFO L256 TraceCheckUtils]: 205: Hoare triple {594998#true} call #t~ret862.base, #t~ret862.offset := ldv_zalloc(48); {594998#true} is VALID [2018-11-19 18:49:55,858 INFO L273 TraceCheckUtils]: 206: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,858 INFO L273 TraceCheckUtils]: 207: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,859 INFO L273 TraceCheckUtils]: 208: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,859 INFO L268 TraceCheckUtils]: 209: Hoare quadruple {594998#true} {594998#true} #2809#return; {594998#true} is VALID [2018-11-19 18:49:55,859 INFO L273 TraceCheckUtils]: 210: Hoare triple {594998#true} ~tmp___0~19.base, ~tmp___0~19.offset := #t~ret862.base, #t~ret862.offset;havoc #t~ret862.base, #t~ret862.offset;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := ~tmp___0~19.base, ~tmp___0~19.offset; {594998#true} is VALID [2018-11-19 18:49:55,859 INFO L273 TraceCheckUtils]: 211: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,859 INFO L268 TraceCheckUtils]: 212: Hoare quadruple {594998#true} {594998#true} #3037#return; {594998#true} is VALID [2018-11-19 18:49:55,859 INFO L273 TraceCheckUtils]: 213: Hoare triple {594998#true} ~ldv_state_variable_4~0 := 1;~ldv_state_variable_8~0 := 1; {594998#true} is VALID [2018-11-19 18:49:55,859 INFO L256 TraceCheckUtils]: 214: Hoare triple {594998#true} call ldv_initialize_ims_pcu_attribute_8(); {594998#true} is VALID [2018-11-19 18:49:55,860 INFO L273 TraceCheckUtils]: 215: Hoare triple {594998#true} havoc ~tmp~51.base, ~tmp~51.offset;havoc ~tmp___0~23.base, ~tmp___0~23.offset; {594998#true} is VALID [2018-11-19 18:49:55,860 INFO L256 TraceCheckUtils]: 216: Hoare triple {594998#true} call #t~ret869.base, #t~ret869.offset := ldv_zalloc(1376); {594998#true} is VALID [2018-11-19 18:49:55,860 INFO L273 TraceCheckUtils]: 217: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,860 INFO L273 TraceCheckUtils]: 218: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,860 INFO L273 TraceCheckUtils]: 219: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,860 INFO L268 TraceCheckUtils]: 220: Hoare quadruple {594998#true} {594998#true} #2631#return; {594998#true} is VALID [2018-11-19 18:49:55,860 INFO L273 TraceCheckUtils]: 221: Hoare triple {594998#true} ~tmp~51.base, ~tmp~51.offset := #t~ret869.base, #t~ret869.offset;havoc #t~ret869.base, #t~ret869.offset;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := ~tmp~51.base, ~tmp~51.offset; {594998#true} is VALID [2018-11-19 18:49:55,861 INFO L256 TraceCheckUtils]: 222: Hoare triple {594998#true} call #t~ret870.base, #t~ret870.offset := ldv_zalloc(48); {594998#true} is VALID [2018-11-19 18:49:55,861 INFO L273 TraceCheckUtils]: 223: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,861 INFO L273 TraceCheckUtils]: 224: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,861 INFO L273 TraceCheckUtils]: 225: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,861 INFO L268 TraceCheckUtils]: 226: Hoare quadruple {594998#true} {594998#true} #2633#return; {594998#true} is VALID [2018-11-19 18:49:55,861 INFO L273 TraceCheckUtils]: 227: Hoare triple {594998#true} ~tmp___0~23.base, ~tmp___0~23.offset := #t~ret870.base, #t~ret870.offset;havoc #t~ret870.base, #t~ret870.offset;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := ~tmp___0~23.base, ~tmp___0~23.offset; {594998#true} is VALID [2018-11-19 18:49:55,861 INFO L273 TraceCheckUtils]: 228: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,862 INFO L268 TraceCheckUtils]: 229: Hoare quadruple {594998#true} {594998#true} #3039#return; {594998#true} is VALID [2018-11-19 18:49:55,862 INFO L273 TraceCheckUtils]: 230: Hoare triple {594998#true} ~ldv_state_variable_2~0 := 1;~ldv_state_variable_9~0 := 1; {594998#true} is VALID [2018-11-19 18:49:55,862 INFO L256 TraceCheckUtils]: 231: Hoare triple {594998#true} call ldv_initialize_ims_pcu_attribute_9(); {594998#true} is VALID [2018-11-19 18:49:55,862 INFO L273 TraceCheckUtils]: 232: Hoare triple {594998#true} havoc ~tmp~49.base, ~tmp~49.offset;havoc ~tmp___0~21.base, ~tmp___0~21.offset; {594998#true} is VALID [2018-11-19 18:49:55,862 INFO L256 TraceCheckUtils]: 233: Hoare triple {594998#true} call #t~ret865.base, #t~ret865.offset := ldv_zalloc(1376); {594998#true} is VALID [2018-11-19 18:49:55,862 INFO L273 TraceCheckUtils]: 234: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,862 INFO L273 TraceCheckUtils]: 235: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,863 INFO L273 TraceCheckUtils]: 236: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,863 INFO L268 TraceCheckUtils]: 237: Hoare quadruple {594998#true} {594998#true} #2627#return; {594998#true} is VALID [2018-11-19 18:49:55,863 INFO L273 TraceCheckUtils]: 238: Hoare triple {594998#true} ~tmp~49.base, ~tmp~49.offset := #t~ret865.base, #t~ret865.offset;havoc #t~ret865.base, #t~ret865.offset;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := ~tmp~49.base, ~tmp~49.offset; {594998#true} is VALID [2018-11-19 18:49:55,863 INFO L256 TraceCheckUtils]: 239: Hoare triple {594998#true} call #t~ret866.base, #t~ret866.offset := ldv_zalloc(48); {594998#true} is VALID [2018-11-19 18:49:55,863 INFO L273 TraceCheckUtils]: 240: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,863 INFO L273 TraceCheckUtils]: 241: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,863 INFO L273 TraceCheckUtils]: 242: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,864 INFO L268 TraceCheckUtils]: 243: Hoare quadruple {594998#true} {594998#true} #2629#return; {594998#true} is VALID [2018-11-19 18:49:55,864 INFO L273 TraceCheckUtils]: 244: Hoare triple {594998#true} ~tmp___0~21.base, ~tmp___0~21.offset := #t~ret866.base, #t~ret866.offset;havoc #t~ret866.base, #t~ret866.offset;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := ~tmp___0~21.base, ~tmp___0~21.offset; {594998#true} is VALID [2018-11-19 18:49:55,864 INFO L273 TraceCheckUtils]: 245: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,864 INFO L268 TraceCheckUtils]: 246: Hoare quadruple {594998#true} {594998#true} #3041#return; {594998#true} is VALID [2018-11-19 18:49:55,864 INFO L273 TraceCheckUtils]: 247: Hoare triple {594998#true} ~ldv_state_variable_7~0 := 1; {594998#true} is VALID [2018-11-19 18:49:55,864 INFO L256 TraceCheckUtils]: 248: Hoare triple {594998#true} call ldv_initialize_ims_pcu_attribute_7(); {594998#true} is VALID [2018-11-19 18:49:55,864 INFO L273 TraceCheckUtils]: 249: Hoare triple {594998#true} havoc ~tmp~52.base, ~tmp~52.offset;havoc ~tmp___0~24.base, ~tmp___0~24.offset; {594998#true} is VALID [2018-11-19 18:49:55,865 INFO L256 TraceCheckUtils]: 250: Hoare triple {594998#true} call #t~ret871.base, #t~ret871.offset := ldv_zalloc(1376); {594998#true} is VALID [2018-11-19 18:49:55,865 INFO L273 TraceCheckUtils]: 251: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,865 INFO L273 TraceCheckUtils]: 252: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,865 INFO L273 TraceCheckUtils]: 253: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,865 INFO L268 TraceCheckUtils]: 254: Hoare quadruple {594998#true} {594998#true} #2619#return; {594998#true} is VALID [2018-11-19 18:49:55,865 INFO L273 TraceCheckUtils]: 255: Hoare triple {594998#true} ~tmp~52.base, ~tmp~52.offset := #t~ret871.base, #t~ret871.offset;havoc #t~ret871.base, #t~ret871.offset;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := ~tmp~52.base, ~tmp~52.offset; {594998#true} is VALID [2018-11-19 18:49:55,865 INFO L256 TraceCheckUtils]: 256: Hoare triple {594998#true} call #t~ret872.base, #t~ret872.offset := ldv_zalloc(48); {594998#true} is VALID [2018-11-19 18:49:55,866 INFO L273 TraceCheckUtils]: 257: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,866 INFO L273 TraceCheckUtils]: 258: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,866 INFO L273 TraceCheckUtils]: 259: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,866 INFO L268 TraceCheckUtils]: 260: Hoare quadruple {594998#true} {594998#true} #2621#return; {594998#true} is VALID [2018-11-19 18:49:55,866 INFO L273 TraceCheckUtils]: 261: Hoare triple {594998#true} ~tmp___0~24.base, ~tmp___0~24.offset := #t~ret872.base, #t~ret872.offset;havoc #t~ret872.base, #t~ret872.offset;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := ~tmp___0~24.base, ~tmp___0~24.offset; {594998#true} is VALID [2018-11-19 18:49:55,866 INFO L273 TraceCheckUtils]: 262: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,867 INFO L268 TraceCheckUtils]: 263: Hoare quadruple {594998#true} {594998#true} #3043#return; {594998#true} is VALID [2018-11-19 18:49:55,867 INFO L273 TraceCheckUtils]: 264: Hoare triple {594998#true} ~ldv_state_variable_3~0 := 1;~ldv_state_variable_11~0 := 1; {594998#true} is VALID [2018-11-19 18:49:55,867 INFO L256 TraceCheckUtils]: 265: Hoare triple {594998#true} call ldv_initialize_ims_pcu_attribute_11(); {594998#true} is VALID [2018-11-19 18:49:55,867 INFO L273 TraceCheckUtils]: 266: Hoare triple {594998#true} havoc ~tmp~50.base, ~tmp~50.offset;havoc ~tmp___0~22.base, ~tmp___0~22.offset; {594998#true} is VALID [2018-11-19 18:49:55,867 INFO L256 TraceCheckUtils]: 267: Hoare triple {594998#true} call #t~ret867.base, #t~ret867.offset := ldv_zalloc(1376); {594998#true} is VALID [2018-11-19 18:49:55,867 INFO L273 TraceCheckUtils]: 268: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,867 INFO L273 TraceCheckUtils]: 269: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,868 INFO L273 TraceCheckUtils]: 270: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,868 INFO L268 TraceCheckUtils]: 271: Hoare quadruple {594998#true} {594998#true} #2811#return; {594998#true} is VALID [2018-11-19 18:49:55,868 INFO L273 TraceCheckUtils]: 272: Hoare triple {594998#true} ~tmp~50.base, ~tmp~50.offset := #t~ret867.base, #t~ret867.offset;havoc #t~ret867.base, #t~ret867.offset;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := ~tmp~50.base, ~tmp~50.offset; {594998#true} is VALID [2018-11-19 18:49:55,868 INFO L256 TraceCheckUtils]: 273: Hoare triple {594998#true} call #t~ret868.base, #t~ret868.offset := ldv_zalloc(48); {594998#true} is VALID [2018-11-19 18:49:55,868 INFO L273 TraceCheckUtils]: 274: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,868 INFO L273 TraceCheckUtils]: 275: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,868 INFO L273 TraceCheckUtils]: 276: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,869 INFO L268 TraceCheckUtils]: 277: Hoare quadruple {594998#true} {594998#true} #2813#return; {594998#true} is VALID [2018-11-19 18:49:55,869 INFO L273 TraceCheckUtils]: 278: Hoare triple {594998#true} ~tmp___0~22.base, ~tmp___0~22.offset := #t~ret868.base, #t~ret868.offset;havoc #t~ret868.base, #t~ret868.offset;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := ~tmp___0~22.base, ~tmp___0~22.offset; {594998#true} is VALID [2018-11-19 18:49:55,869 INFO L273 TraceCheckUtils]: 279: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,869 INFO L268 TraceCheckUtils]: 280: Hoare quadruple {594998#true} {594998#true} #3045#return; {594998#true} is VALID [2018-11-19 18:49:55,869 INFO L273 TraceCheckUtils]: 281: Hoare triple {594998#true} ~ldv_state_variable_6~0 := 1; {594998#true} is VALID [2018-11-19 18:49:55,869 INFO L256 TraceCheckUtils]: 282: Hoare triple {594998#true} call ldv_initialize_ims_pcu_attribute_6(); {594998#true} is VALID [2018-11-19 18:49:55,870 INFO L273 TraceCheckUtils]: 283: Hoare triple {594998#true} havoc ~tmp~48.base, ~tmp~48.offset;havoc ~tmp___0~20.base, ~tmp___0~20.offset; {594998#true} is VALID [2018-11-19 18:49:55,870 INFO L256 TraceCheckUtils]: 284: Hoare triple {594998#true} call #t~ret863.base, #t~ret863.offset := ldv_zalloc(1376); {594998#true} is VALID [2018-11-19 18:49:55,870 INFO L273 TraceCheckUtils]: 285: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,870 INFO L273 TraceCheckUtils]: 286: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,870 INFO L273 TraceCheckUtils]: 287: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,870 INFO L268 TraceCheckUtils]: 288: Hoare quadruple {594998#true} {594998#true} #2623#return; {594998#true} is VALID [2018-11-19 18:49:55,870 INFO L273 TraceCheckUtils]: 289: Hoare triple {594998#true} ~tmp~48.base, ~tmp~48.offset := #t~ret863.base, #t~ret863.offset;havoc #t~ret863.base, #t~ret863.offset;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := ~tmp~48.base, ~tmp~48.offset; {594998#true} is VALID [2018-11-19 18:49:55,871 INFO L256 TraceCheckUtils]: 290: Hoare triple {594998#true} call #t~ret864.base, #t~ret864.offset := ldv_zalloc(48); {594998#true} is VALID [2018-11-19 18:49:55,871 INFO L273 TraceCheckUtils]: 291: Hoare triple {594998#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {594998#true} is VALID [2018-11-19 18:49:55,871 INFO L273 TraceCheckUtils]: 292: Hoare triple {594998#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {594998#true} is VALID [2018-11-19 18:49:55,871 INFO L273 TraceCheckUtils]: 293: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,871 INFO L268 TraceCheckUtils]: 294: Hoare quadruple {594998#true} {594998#true} #2625#return; {594998#true} is VALID [2018-11-19 18:49:55,871 INFO L273 TraceCheckUtils]: 295: Hoare triple {594998#true} ~tmp___0~20.base, ~tmp___0~20.offset := #t~ret864.base, #t~ret864.offset;havoc #t~ret864.base, #t~ret864.offset;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := ~tmp___0~20.base, ~tmp___0~20.offset; {594998#true} is VALID [2018-11-19 18:49:55,871 INFO L273 TraceCheckUtils]: 296: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,872 INFO L268 TraceCheckUtils]: 297: Hoare quadruple {594998#true} {594998#true} #3047#return; {594998#true} is VALID [2018-11-19 18:49:55,872 INFO L273 TraceCheckUtils]: 298: Hoare triple {594998#true} assume !(0 != ~ldv_retval_4~0); {594998#true} is VALID [2018-11-19 18:49:55,872 INFO L273 TraceCheckUtils]: 299: Hoare triple {594998#true} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,872 INFO L273 TraceCheckUtils]: 300: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,872 INFO L273 TraceCheckUtils]: 301: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,872 INFO L273 TraceCheckUtils]: 302: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,872 INFO L273 TraceCheckUtils]: 303: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,873 INFO L273 TraceCheckUtils]: 304: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,873 INFO L273 TraceCheckUtils]: 305: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,873 INFO L273 TraceCheckUtils]: 306: Hoare triple {594998#true} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {594998#true} is VALID [2018-11-19 18:49:55,873 INFO L273 TraceCheckUtils]: 307: Hoare triple {594998#true} assume #t~switch909; {594998#true} is VALID [2018-11-19 18:49:55,873 INFO L273 TraceCheckUtils]: 308: Hoare triple {594998#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {594998#true} is VALID [2018-11-19 18:49:55,873 INFO L273 TraceCheckUtils]: 309: Hoare triple {594998#true} assume #t~switch937; {594998#true} is VALID [2018-11-19 18:49:55,874 INFO L273 TraceCheckUtils]: 310: Hoare triple {594998#true} assume 1 == ~ldv_state_variable_1~0; {594998#true} is VALID [2018-11-19 18:49:55,874 INFO L256 TraceCheckUtils]: 311: Hoare triple {594998#true} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {594998#true} is VALID [2018-11-19 18:49:55,874 INFO L273 TraceCheckUtils]: 312: Hoare triple {594998#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {594998#true} is VALID [2018-11-19 18:49:55,874 INFO L256 TraceCheckUtils]: 313: Hoare triple {594998#true} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {594998#true} is VALID [2018-11-19 18:49:55,874 INFO L273 TraceCheckUtils]: 314: Hoare triple {594998#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {594998#true} is VALID [2018-11-19 18:49:55,874 INFO L256 TraceCheckUtils]: 315: Hoare triple {594998#true} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {594998#true} is VALID [2018-11-19 18:49:55,874 INFO L273 TraceCheckUtils]: 316: Hoare triple {594998#true} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {594998#true} is VALID [2018-11-19 18:49:55,875 INFO L256 TraceCheckUtils]: 317: Hoare triple {594998#true} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {594998#true} is VALID [2018-11-19 18:49:55,875 INFO L273 TraceCheckUtils]: 318: Hoare triple {594998#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {594998#true} is VALID [2018-11-19 18:49:55,875 INFO L273 TraceCheckUtils]: 319: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,875 INFO L268 TraceCheckUtils]: 320: Hoare quadruple {594998#true} {594998#true} #2817#return; {594998#true} is VALID [2018-11-19 18:49:55,875 INFO L273 TraceCheckUtils]: 321: Hoare triple {594998#true} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {594998#true} is VALID [2018-11-19 18:49:55,875 INFO L273 TraceCheckUtils]: 322: Hoare triple {594998#true} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {594998#true} is VALID [2018-11-19 18:49:55,876 INFO L273 TraceCheckUtils]: 323: Hoare triple {594998#true} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,876 INFO L273 TraceCheckUtils]: 324: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,876 INFO L268 TraceCheckUtils]: 325: Hoare quadruple {594998#true} {594998#true} #3151#return; {594998#true} is VALID [2018-11-19 18:49:55,876 INFO L273 TraceCheckUtils]: 326: Hoare triple {594998#true} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {594998#true} is VALID [2018-11-19 18:49:55,876 INFO L273 TraceCheckUtils]: 327: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,876 INFO L268 TraceCheckUtils]: 328: Hoare quadruple {594998#true} {594998#true} #3095#return; {594998#true} is VALID [2018-11-19 18:49:55,876 INFO L273 TraceCheckUtils]: 329: Hoare triple {594998#true} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {594998#true} is VALID [2018-11-19 18:49:55,877 INFO L256 TraceCheckUtils]: 330: Hoare triple {594998#true} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {594998#true} is VALID [2018-11-19 18:49:55,877 INFO L273 TraceCheckUtils]: 331: Hoare triple {594998#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {594998#true} is VALID [2018-11-19 18:49:55,877 INFO L256 TraceCheckUtils]: 332: Hoare triple {594998#true} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {594998#true} is VALID [2018-11-19 18:49:55,877 INFO L273 TraceCheckUtils]: 333: Hoare triple {594998#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,877 INFO L256 TraceCheckUtils]: 334: Hoare triple {594998#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {594998#true} is VALID [2018-11-19 18:49:55,877 INFO L273 TraceCheckUtils]: 335: Hoare triple {594998#true} ~size := #in~size;~t := #in~t; {594998#true} is VALID [2018-11-19 18:49:55,877 INFO L256 TraceCheckUtils]: 336: Hoare triple {594998#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {594998#true} is VALID [2018-11-19 18:49:55,878 INFO L273 TraceCheckUtils]: 337: Hoare triple {594998#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {594998#true} is VALID [2018-11-19 18:49:55,878 INFO L273 TraceCheckUtils]: 338: Hoare triple {594998#true} assume !(0 != ~tmp___0~2);call #t~malloc130.base, #t~malloc130.offset := #Ultimate.alloc(~size);~tmp~8.base, ~tmp~8.offset := #t~malloc130.base, #t~malloc130.offset;~p~0.base, ~p~0.offset := ~tmp~8.base, ~tmp~8.offset;assume 0 != (if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~0.base, ~p~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,878 INFO L273 TraceCheckUtils]: 339: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,878 INFO L268 TraceCheckUtils]: 340: Hoare quadruple {594998#true} {594998#true} #2691#return; {594998#true} is VALID [2018-11-19 18:49:55,878 INFO L273 TraceCheckUtils]: 341: Hoare triple {594998#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {594998#true} is VALID [2018-11-19 18:49:55,878 INFO L273 TraceCheckUtils]: 342: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,878 INFO L268 TraceCheckUtils]: 343: Hoare quadruple {594998#true} {594998#true} #2781#return; {594998#true} is VALID [2018-11-19 18:49:55,879 INFO L273 TraceCheckUtils]: 344: Hoare triple {594998#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,879 INFO L273 TraceCheckUtils]: 345: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,879 INFO L268 TraceCheckUtils]: 346: Hoare quadruple {594998#true} {594998#true} #2779#return; {594998#true} is VALID [2018-11-19 18:49:55,879 INFO L273 TraceCheckUtils]: 347: Hoare triple {594998#true} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {594998#true} is VALID [2018-11-19 18:49:55,879 INFO L273 TraceCheckUtils]: 348: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,879 INFO L268 TraceCheckUtils]: 349: Hoare quadruple {594998#true} {594998#true} #3097#return; {594998#true} is VALID [2018-11-19 18:49:55,879 INFO L273 TraceCheckUtils]: 350: Hoare triple {594998#true} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {594998#true} is VALID [2018-11-19 18:49:55,880 INFO L273 TraceCheckUtils]: 351: Hoare triple {594998#true} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {594998#true} is VALID [2018-11-19 18:49:55,880 INFO L256 TraceCheckUtils]: 352: Hoare triple {594998#true} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {594998#true} is VALID [2018-11-19 18:49:55,880 INFO L273 TraceCheckUtils]: 353: Hoare triple {594998#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,880 INFO L273 TraceCheckUtils]: 354: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,880 INFO L268 TraceCheckUtils]: 355: Hoare quadruple {594998#true} {594998#true} #3099#return; {594998#true} is VALID [2018-11-19 18:49:55,880 INFO L256 TraceCheckUtils]: 356: Hoare triple {594998#true} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {594998#true} is VALID [2018-11-19 18:49:55,880 INFO L273 TraceCheckUtils]: 357: Hoare triple {594998#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,881 INFO L273 TraceCheckUtils]: 358: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,881 INFO L268 TraceCheckUtils]: 359: Hoare quadruple {594998#true} {594998#true} #3101#return; {594998#true} is VALID [2018-11-19 18:49:55,881 INFO L256 TraceCheckUtils]: 360: Hoare triple {594998#true} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {594998#true} is VALID [2018-11-19 18:49:55,881 INFO L273 TraceCheckUtils]: 361: Hoare triple {594998#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {594998#true} is VALID [2018-11-19 18:49:55,881 INFO L256 TraceCheckUtils]: 362: Hoare triple {594998#true} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {594998#true} is VALID [2018-11-19 18:49:55,881 INFO L273 TraceCheckUtils]: 363: Hoare triple {594998#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {594998#true} is VALID [2018-11-19 18:49:55,881 INFO L273 TraceCheckUtils]: 364: Hoare triple {594998#true} assume !(0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616); {594998#true} is VALID [2018-11-19 18:49:55,882 INFO L273 TraceCheckUtils]: 365: Hoare triple {594998#true} assume !(0 == ~buflen~0 % 4294967296 % 18446744073709551616); {594998#true} is VALID [2018-11-19 18:49:55,882 INFO L273 TraceCheckUtils]: 366: Hoare triple {594998#true} assume 0 != ~buflen~0 % 4294967296 % 18446744073709551616; {594998#true} is VALID [2018-11-19 18:49:55,882 INFO L273 TraceCheckUtils]: 367: Hoare triple {594998#true} ~union_desc~0.base, ~union_desc~0.offset := ~buf~0.base, ~buf~0.offset;call #t~mem642 := read~int(~union_desc~0.base, 1 + ~union_desc~0.offset, 1);#t~short644 := 36 == #t~mem642 % 256 % 4294967296; {594998#true} is VALID [2018-11-19 18:49:55,882 INFO L273 TraceCheckUtils]: 368: Hoare triple {594998#true} assume #t~short644;call #t~mem643 := read~int(~union_desc~0.base, 2 + ~union_desc~0.offset, 1);#t~short644 := 6 == #t~mem643 % 256 % 4294967296; {594998#true} is VALID [2018-11-19 18:49:55,882 INFO L273 TraceCheckUtils]: 369: Hoare triple {594998#true} assume #t~short644;havoc #t~mem643;havoc #t~mem642;havoc #t~short644;call write~$Pointer$(#t~string645.base, #t~string645.offset, ~#descriptor~3.base, ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string646.base, #t~string646.offset, ~#descriptor~3.base, 8 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string647.base, #t~string647.offset, ~#descriptor~3.base, 16 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string648.base, #t~string648.offset, ~#descriptor~3.base, 24 + ~#descriptor~3.offset, 8);call write~int(1479, ~#descriptor~3.base, 32 + ~#descriptor~3.offset, 4);call write~int(0, ~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1);call #t~mem649 := read~int(~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1); {594998#true} is VALID [2018-11-19 18:49:55,882 INFO L256 TraceCheckUtils]: 370: Hoare triple {594998#true} call #t~ret650 := ldv__builtin_expect(~bitwiseAnd(#t~mem649 % 256, 1), 0); {594998#true} is VALID [2018-11-19 18:49:55,882 INFO L273 TraceCheckUtils]: 371: Hoare triple {594998#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {594998#true} is VALID [2018-11-19 18:49:55,883 INFO L273 TraceCheckUtils]: 372: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,883 INFO L268 TraceCheckUtils]: 373: Hoare quadruple {594998#true} {594998#true} #3075#return; {594998#true} is VALID [2018-11-19 18:49:55,883 INFO L273 TraceCheckUtils]: 374: Hoare triple {594998#true} assume -9223372036854775808 <= #t~ret650 && #t~ret650 <= 9223372036854775807;~tmp~36 := #t~ret650;havoc #t~ret650;havoc #t~mem649; {594998#true} is VALID [2018-11-19 18:49:55,883 INFO L273 TraceCheckUtils]: 375: Hoare triple {594998#true} assume !(0 != ~tmp~36); {594998#true} is VALID [2018-11-19 18:49:55,883 INFO L273 TraceCheckUtils]: 376: Hoare triple {594998#true} #res.base, #res.offset := ~union_desc~0.base, ~union_desc~0.offset;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {594998#true} is VALID [2018-11-19 18:49:55,883 INFO L273 TraceCheckUtils]: 377: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,884 INFO L268 TraceCheckUtils]: 378: Hoare quadruple {594998#true} {594998#true} #3137#return; {594998#true} is VALID [2018-11-19 18:49:55,884 INFO L273 TraceCheckUtils]: 379: Hoare triple {594998#true} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {594998#true} is VALID [2018-11-19 18:49:55,884 INFO L273 TraceCheckUtils]: 380: Hoare triple {594998#true} assume !(0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616);call #t~mem658.base, #t~mem658.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem659 := read~int(~union_desc~1.base, 3 + ~union_desc~1.offset, 1);call #t~ret660.base, #t~ret660.offset := usb_ifnum_to_if(#t~mem658.base, #t~mem658.offset, #t~mem659 % 256);call write~$Pointer$(#t~ret660.base, #t~ret660.offset, ~pcu.base, 79 + ~pcu.offset, 8);havoc #t~mem659;havoc #t~ret660.base, #t~ret660.offset;havoc #t~mem658.base, #t~mem658.offset;call #t~mem661.base, #t~mem661.offset := read~$Pointer$(~pcu.base, 79 + ~pcu.offset, 8);call #t~mem662.base, #t~mem662.offset := read~$Pointer$(#t~mem661.base, 8 + #t~mem661.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem662.base, #t~mem662.offset;havoc #t~mem662.base, #t~mem662.offset;havoc #t~mem661.base, #t~mem661.offset;call #t~mem663.base, #t~mem663.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem663.base, #t~mem663.offset, ~pcu.base, 87 + ~pcu.offset, 8);havoc #t~mem663.base, #t~mem663.offset;call #t~mem664.base, #t~mem664.offset := read~$Pointer$(~pcu.base, 87 + ~pcu.offset, 8); {594998#true} is VALID [2018-11-19 18:49:55,884 INFO L256 TraceCheckUtils]: 381: Hoare triple {594998#true} call #t~ret665 := usb_endpoint_maxp(#t~mem664.base, #t~mem664.offset); {594998#true} is VALID [2018-11-19 18:49:55,884 INFO L273 TraceCheckUtils]: 382: Hoare triple {594998#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {594998#true} is VALID [2018-11-19 18:49:55,884 INFO L273 TraceCheckUtils]: 383: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,884 INFO L268 TraceCheckUtils]: 384: Hoare quadruple {594998#true} {594998#true} #3139#return; {594998#true} is VALID [2018-11-19 18:49:55,885 INFO L273 TraceCheckUtils]: 385: Hoare triple {594998#true} assume -2147483648 <= #t~ret665 && #t~ret665 <= 2147483647;~tmp~37 := #t~ret665;havoc #t~ret665;havoc #t~mem664.base, #t~mem664.offset;call write~int(~tmp~37, ~pcu.base, 119 + ~pcu.offset, 4);call #t~mem666.base, #t~mem666.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem667 := read~int(~union_desc~1.base, 4 + ~union_desc~1.offset, 1);call #t~ret668.base, #t~ret668.offset := usb_ifnum_to_if(#t~mem666.base, #t~mem666.offset, #t~mem667 % 256);call write~$Pointer$(#t~ret668.base, #t~ret668.offset, ~pcu.base, 123 + ~pcu.offset, 8);havoc #t~mem666.base, #t~mem666.offset;havoc #t~mem667;havoc #t~ret668.base, #t~ret668.offset;call #t~mem669.base, #t~mem669.offset := read~$Pointer$(~pcu.base, 123 + ~pcu.offset, 8);call #t~mem670.base, #t~mem670.offset := read~$Pointer$(#t~mem669.base, 8 + #t~mem669.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem670.base, #t~mem670.offset;havoc #t~mem670.base, #t~mem670.offset;havoc #t~mem669.base, #t~mem669.offset;call #t~mem671 := read~int(~alt~0.base, 4 + ~alt~0.offset, 1); {594998#true} is VALID [2018-11-19 18:49:55,885 INFO L273 TraceCheckUtils]: 386: Hoare triple {594998#true} assume !(2 != #t~mem671 % 256 % 4294967296);havoc #t~mem671;call #t~mem676.base, #t~mem676.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem676.base, #t~mem676.offset, ~pcu.base, 167 + ~pcu.offset, 8);havoc #t~mem676.base, #t~mem676.offset;call #t~mem677.base, #t~mem677.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {594998#true} is VALID [2018-11-19 18:49:55,885 INFO L256 TraceCheckUtils]: 387: Hoare triple {594998#true} call #t~ret678 := usb_endpoint_is_bulk_out(#t~mem677.base, #t~mem677.offset); {594998#true} is VALID [2018-11-19 18:49:55,885 INFO L273 TraceCheckUtils]: 388: Hoare triple {594998#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~4;havoc ~tmp___0~1;havoc ~tmp___1~1; {594998#true} is VALID [2018-11-19 18:49:55,885 INFO L256 TraceCheckUtils]: 389: Hoare triple {594998#true} call #t~ret25 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {594998#true} is VALID [2018-11-19 18:49:55,885 INFO L273 TraceCheckUtils]: 390: Hoare triple {594998#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {594998#true} is VALID [2018-11-19 18:49:55,886 INFO L273 TraceCheckUtils]: 391: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,886 INFO L268 TraceCheckUtils]: 392: Hoare quadruple {594998#true} {594998#true} #2887#return; {594998#true} is VALID [2018-11-19 18:49:55,886 INFO L273 TraceCheckUtils]: 393: Hoare triple {594998#true} assume -2147483648 <= #t~ret25 && #t~ret25 <= 2147483647;~tmp~4 := #t~ret25;havoc #t~ret25; {594998#true} is VALID [2018-11-19 18:49:55,886 INFO L273 TraceCheckUtils]: 394: Hoare triple {594998#true} assume 0 != ~tmp~4; {594998#true} is VALID [2018-11-19 18:49:55,886 INFO L256 TraceCheckUtils]: 395: Hoare triple {594998#true} call #t~ret26 := usb_endpoint_dir_out(~epd.base, ~epd.offset); {594998#true} is VALID [2018-11-19 18:49:55,886 INFO L273 TraceCheckUtils]: 396: Hoare triple {594998#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem21 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem21 % 256 % 256 <= 127 then #t~mem21 % 256 % 256 else #t~mem21 % 256 % 256 - 256) >= 0 then 1 else 0);havoc #t~mem21; {594998#true} is VALID [2018-11-19 18:49:55,886 INFO L273 TraceCheckUtils]: 397: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,887 INFO L268 TraceCheckUtils]: 398: Hoare quadruple {594998#true} {594998#true} #2889#return; {594998#true} is VALID [2018-11-19 18:49:55,887 INFO L273 TraceCheckUtils]: 399: Hoare triple {594998#true} assume -2147483648 <= #t~ret26 && #t~ret26 <= 2147483647;~tmp___0~1 := #t~ret26;havoc #t~ret26; {594998#true} is VALID [2018-11-19 18:49:55,887 INFO L273 TraceCheckUtils]: 400: Hoare triple {594998#true} assume 0 != ~tmp___0~1;~tmp___1~1 := 1; {594998#true} is VALID [2018-11-19 18:49:55,887 INFO L273 TraceCheckUtils]: 401: Hoare triple {594998#true} #res := ~tmp___1~1; {594998#true} is VALID [2018-11-19 18:49:55,887 INFO L273 TraceCheckUtils]: 402: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,887 INFO L268 TraceCheckUtils]: 403: Hoare quadruple {594998#true} {594998#true} #3141#return; {594998#true} is VALID [2018-11-19 18:49:55,888 INFO L273 TraceCheckUtils]: 404: Hoare triple {594998#true} assume -2147483648 <= #t~ret678 && #t~ret678 <= 2147483647;~tmp___0~16 := #t~ret678;havoc #t~mem677.base, #t~mem677.offset;havoc #t~ret678; {594998#true} is VALID [2018-11-19 18:49:55,888 INFO L273 TraceCheckUtils]: 405: Hoare triple {594998#true} assume !(0 == ~tmp___0~16);call #t~mem682.base, #t~mem682.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {594998#true} is VALID [2018-11-19 18:49:55,888 INFO L256 TraceCheckUtils]: 406: Hoare triple {594998#true} call #t~ret683 := usb_endpoint_maxp(#t~mem682.base, #t~mem682.offset); {594998#true} is VALID [2018-11-19 18:49:55,888 INFO L273 TraceCheckUtils]: 407: Hoare triple {594998#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {594998#true} is VALID [2018-11-19 18:49:55,888 INFO L273 TraceCheckUtils]: 408: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,888 INFO L268 TraceCheckUtils]: 409: Hoare quadruple {594998#true} {594998#true} #3143#return; {594998#true} is VALID [2018-11-19 18:49:55,888 INFO L273 TraceCheckUtils]: 410: Hoare triple {594998#true} assume -2147483648 <= #t~ret683 && #t~ret683 <= 2147483647;~tmp___1~7 := #t~ret683;havoc #t~mem682.base, #t~mem682.offset;havoc #t~ret683;call write~int(~tmp___1~7, ~pcu.base, 183 + ~pcu.offset, 4);call #t~mem684 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {594998#true} is VALID [2018-11-19 18:49:55,889 INFO L273 TraceCheckUtils]: 411: Hoare triple {594998#true} assume !(#t~mem684 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem684;call #t~mem689.base, #t~mem689.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem689.base, 63 + #t~mem689.offset, ~pcu.base, 131 + ~pcu.offset, 8);havoc #t~mem689.base, #t~mem689.offset;call #t~mem690.base, #t~mem690.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {594998#true} is VALID [2018-11-19 18:49:55,889 INFO L256 TraceCheckUtils]: 412: Hoare triple {594998#true} call #t~ret691 := usb_endpoint_is_bulk_in(#t~mem690.base, #t~mem690.offset); {594998#true} is VALID [2018-11-19 18:49:55,889 INFO L273 TraceCheckUtils]: 413: Hoare triple {594998#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~3;havoc ~tmp___0~0;havoc ~tmp___1~0; {594998#true} is VALID [2018-11-19 18:49:55,889 INFO L256 TraceCheckUtils]: 414: Hoare triple {594998#true} call #t~ret23 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {594998#true} is VALID [2018-11-19 18:49:55,889 INFO L273 TraceCheckUtils]: 415: Hoare triple {594998#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {594998#true} is VALID [2018-11-19 18:49:55,889 INFO L273 TraceCheckUtils]: 416: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,889 INFO L268 TraceCheckUtils]: 417: Hoare quadruple {594998#true} {594998#true} #2915#return; {594998#true} is VALID [2018-11-19 18:49:55,890 INFO L273 TraceCheckUtils]: 418: Hoare triple {594998#true} assume -2147483648 <= #t~ret23 && #t~ret23 <= 2147483647;~tmp~3 := #t~ret23;havoc #t~ret23; {594998#true} is VALID [2018-11-19 18:49:55,890 INFO L273 TraceCheckUtils]: 419: Hoare triple {594998#true} assume 0 != ~tmp~3; {594998#true} is VALID [2018-11-19 18:49:55,890 INFO L256 TraceCheckUtils]: 420: Hoare triple {594998#true} call #t~ret24 := usb_endpoint_dir_in(~epd.base, ~epd.offset); {594998#true} is VALID [2018-11-19 18:49:55,890 INFO L273 TraceCheckUtils]: 421: Hoare triple {594998#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem20 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem20 % 256 % 256 <= 127 then #t~mem20 % 256 % 256 else #t~mem20 % 256 % 256 - 256) < 0 then 1 else 0);havoc #t~mem20; {594998#true} is VALID [2018-11-19 18:49:55,890 INFO L273 TraceCheckUtils]: 422: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,890 INFO L268 TraceCheckUtils]: 423: Hoare quadruple {594998#true} {594998#true} #2917#return; {594998#true} is VALID [2018-11-19 18:49:55,890 INFO L273 TraceCheckUtils]: 424: Hoare triple {594998#true} assume -2147483648 <= #t~ret24 && #t~ret24 <= 2147483647;~tmp___0~0 := #t~ret24;havoc #t~ret24; {594998#true} is VALID [2018-11-19 18:49:55,891 INFO L273 TraceCheckUtils]: 425: Hoare triple {594998#true} assume 0 != ~tmp___0~0;~tmp___1~0 := 1; {594998#true} is VALID [2018-11-19 18:49:55,891 INFO L273 TraceCheckUtils]: 426: Hoare triple {594998#true} #res := ~tmp___1~0; {594998#true} is VALID [2018-11-19 18:49:55,891 INFO L273 TraceCheckUtils]: 427: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,891 INFO L268 TraceCheckUtils]: 428: Hoare quadruple {594998#true} {594998#true} #3145#return; {594998#true} is VALID [2018-11-19 18:49:55,891 INFO L273 TraceCheckUtils]: 429: Hoare triple {594998#true} assume -2147483648 <= #t~ret691 && #t~ret691 <= 2147483647;~tmp___2~3 := #t~ret691;havoc #t~ret691;havoc #t~mem690.base, #t~mem690.offset; {594998#true} is VALID [2018-11-19 18:49:55,891 INFO L273 TraceCheckUtils]: 430: Hoare triple {594998#true} assume !(0 == ~tmp___2~3);call #t~mem695.base, #t~mem695.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {594998#true} is VALID [2018-11-19 18:49:55,892 INFO L256 TraceCheckUtils]: 431: Hoare triple {594998#true} call #t~ret696 := usb_endpoint_maxp(#t~mem695.base, #t~mem695.offset); {594998#true} is VALID [2018-11-19 18:49:55,892 INFO L273 TraceCheckUtils]: 432: Hoare triple {594998#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {594998#true} is VALID [2018-11-19 18:49:55,892 INFO L273 TraceCheckUtils]: 433: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,892 INFO L268 TraceCheckUtils]: 434: Hoare quadruple {594998#true} {594998#true} #3147#return; {594998#true} is VALID [2018-11-19 18:49:55,892 INFO L273 TraceCheckUtils]: 435: Hoare triple {594998#true} assume -2147483648 <= #t~ret696 && #t~ret696 <= 2147483647;~tmp___3~2 := #t~ret696;havoc #t~ret696;havoc #t~mem695.base, #t~mem695.offset;call write~int(~tmp___3~2, ~pcu.base, 163 + ~pcu.offset, 4);call #t~mem697 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {594998#true} is VALID [2018-11-19 18:49:55,892 INFO L273 TraceCheckUtils]: 436: Hoare triple {594998#true} assume !(#t~mem697 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem697;#res := 0; {594998#true} is VALID [2018-11-19 18:49:55,892 INFO L273 TraceCheckUtils]: 437: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,893 INFO L268 TraceCheckUtils]: 438: Hoare quadruple {594998#true} {594998#true} #3103#return; {594998#true} is VALID [2018-11-19 18:49:55,893 INFO L273 TraceCheckUtils]: 439: Hoare triple {594998#true} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {594998#true} is VALID [2018-11-19 18:49:55,893 INFO L273 TraceCheckUtils]: 440: Hoare triple {594998#true} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {594998#true} is VALID [2018-11-19 18:49:55,893 INFO L273 TraceCheckUtils]: 441: Hoare triple {594998#true} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {594998#true} is VALID [2018-11-19 18:49:55,893 INFO L256 TraceCheckUtils]: 442: Hoare triple {594998#true} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {594998#true} is VALID [2018-11-19 18:49:55,893 INFO L273 TraceCheckUtils]: 443: Hoare triple {594998#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {594998#true} is VALID [2018-11-19 18:49:55,893 INFO L256 TraceCheckUtils]: 444: Hoare triple {594998#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {594998#true} is VALID [2018-11-19 18:49:55,894 INFO L273 TraceCheckUtils]: 445: Hoare triple {594998#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {594998#true} is VALID [2018-11-19 18:49:55,894 INFO L273 TraceCheckUtils]: 446: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,894 INFO L268 TraceCheckUtils]: 447: Hoare quadruple {594998#true} {594998#true} #2541#return; {594998#true} is VALID [2018-11-19 18:49:55,895 INFO L273 TraceCheckUtils]: 448: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,895 INFO L268 TraceCheckUtils]: 449: Hoare quadruple {594998#true} {594998#true} #3105#return; {594998#true} is VALID [2018-11-19 18:49:55,895 INFO L273 TraceCheckUtils]: 450: Hoare triple {594998#true} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {594998#true} is VALID [2018-11-19 18:49:55,895 INFO L256 TraceCheckUtils]: 451: Hoare triple {594998#true} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {594998#true} is VALID [2018-11-19 18:49:55,895 INFO L273 TraceCheckUtils]: 452: Hoare triple {594998#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {594998#true} is VALID [2018-11-19 18:49:55,895 INFO L256 TraceCheckUtils]: 453: Hoare triple {594998#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {594998#true} is VALID [2018-11-19 18:49:55,896 INFO L273 TraceCheckUtils]: 454: Hoare triple {594998#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {594998#true} is VALID [2018-11-19 18:49:55,896 INFO L273 TraceCheckUtils]: 455: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,896 INFO L268 TraceCheckUtils]: 456: Hoare quadruple {594998#true} {594998#true} #2541#return; {594998#true} is VALID [2018-11-19 18:49:55,896 INFO L273 TraceCheckUtils]: 457: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,896 INFO L268 TraceCheckUtils]: 458: Hoare quadruple {594998#true} {594998#true} #3107#return; {594998#true} is VALID [2018-11-19 18:49:55,896 INFO L273 TraceCheckUtils]: 459: Hoare triple {594998#true} havoc #t~mem837.base, #t~mem837.offset; {594998#true} is VALID [2018-11-19 18:49:55,896 INFO L256 TraceCheckUtils]: 460: Hoare triple {594998#true} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {594998#true} is VALID [2018-11-19 18:49:55,897 INFO L273 TraceCheckUtils]: 461: Hoare triple {594998#true} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {594998#true} is VALID [2018-11-19 18:49:55,897 INFO L273 TraceCheckUtils]: 462: Hoare triple {594998#true} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {594998#true} is VALID [2018-11-19 18:49:55,897 INFO L256 TraceCheckUtils]: 463: Hoare triple {594998#true} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {594998#true} is VALID [2018-11-19 18:49:55,897 INFO L273 TraceCheckUtils]: 464: Hoare triple {594998#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {594998#true} is VALID [2018-11-19 18:49:55,897 INFO L256 TraceCheckUtils]: 465: Hoare triple {594998#true} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {594998#true} is VALID [2018-11-19 18:49:55,897 INFO L273 TraceCheckUtils]: 466: Hoare triple {594998#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {594998#true} is VALID [2018-11-19 18:49:55,898 INFO L256 TraceCheckUtils]: 467: Hoare triple {594998#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {594998#true} is VALID [2018-11-19 18:49:55,898 INFO L273 TraceCheckUtils]: 468: Hoare triple {594998#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {594998#true} is VALID [2018-11-19 18:49:55,898 INFO L273 TraceCheckUtils]: 469: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,898 INFO L268 TraceCheckUtils]: 470: Hoare quadruple {594998#true} {594998#true} #2605#return; {594998#true} is VALID [2018-11-19 18:49:55,898 INFO L273 TraceCheckUtils]: 471: Hoare triple {594998#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {594998#true} is VALID [2018-11-19 18:49:55,898 INFO L256 TraceCheckUtils]: 472: Hoare triple {594998#true} call #t~ret965 := ldv_undef_int(); {594998#true} is VALID [2018-11-19 18:49:55,899 INFO L273 TraceCheckUtils]: 473: Hoare triple {594998#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {594998#true} is VALID [2018-11-19 18:49:55,899 INFO L273 TraceCheckUtils]: 474: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,899 INFO L268 TraceCheckUtils]: 475: Hoare quadruple {594998#true} {594998#true} #2607#return; {594998#true} is VALID [2018-11-19 18:49:55,899 INFO L273 TraceCheckUtils]: 476: Hoare triple {594998#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {594998#true} is VALID [2018-11-19 18:49:55,899 INFO L273 TraceCheckUtils]: 477: Hoare triple {594998#true} assume !(0 != ~tmp___0~26); {594998#true} is VALID [2018-11-19 18:49:55,899 INFO L273 TraceCheckUtils]: 478: Hoare triple {594998#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,900 INFO L273 TraceCheckUtils]: 479: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,900 INFO L268 TraceCheckUtils]: 480: Hoare quadruple {594998#true} {594998#true} #3135#return; {594998#true} is VALID [2018-11-19 18:49:55,900 INFO L273 TraceCheckUtils]: 481: Hoare triple {594998#true} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {594998#true} is VALID [2018-11-19 18:49:55,900 INFO L273 TraceCheckUtils]: 482: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,900 INFO L268 TraceCheckUtils]: 483: Hoare quadruple {594998#true} {594998#true} #2709#return; {594998#true} is VALID [2018-11-19 18:49:55,900 INFO L273 TraceCheckUtils]: 484: Hoare triple {594998#true} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {594998#true} is VALID [2018-11-19 18:49:55,901 INFO L273 TraceCheckUtils]: 485: Hoare triple {594998#true} assume !(0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616);havoc #t~mem561.base, #t~mem561.offset;call #t~mem565.base, #t~mem565.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem566.base, #t~mem566.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem567 := read~int(#t~mem566.base, 92 + #t~mem566.offset, 4);call write~int(~bitwiseOr(#t~mem567, 4), #t~mem565.base, 92 + #t~mem565.offset, 4);havoc #t~mem565.base, #t~mem565.offset;havoc #t~mem567;havoc #t~mem566.base, #t~mem566.offset;call #t~mem568.base, #t~mem568.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem569 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call write~int(#t~mem569, #t~mem568.base, 104 + #t~mem568.offset, 8);havoc #t~mem569;havoc #t~mem568.base, #t~mem568.offset;call #t~mem570.base, #t~mem570.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem571.base, #t~mem571.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8);call #t~mem572 := read~int(#t~mem571.base, 2 + #t~mem571.offset, 1); {594998#true} is VALID [2018-11-19 18:49:55,901 INFO L256 TraceCheckUtils]: 486: Hoare triple {594998#true} call #t~ret573 := __create_pipe(#t~mem570.base, #t~mem570.offset, #t~mem572 % 256); {594998#true} is VALID [2018-11-19 18:49:55,901 INFO L273 TraceCheckUtils]: 487: Hoare triple {594998#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~endpoint := #in~endpoint;call #t~mem123 := read~int(~dev.base, ~dev.offset, 4);#res := ~bitwiseOr(256 * #t~mem123, 32768 * ~endpoint);havoc #t~mem123; {594998#true} is VALID [2018-11-19 18:49:55,901 INFO L273 TraceCheckUtils]: 488: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,901 INFO L268 TraceCheckUtils]: 489: Hoare quadruple {594998#true} {594998#true} #2711#return; {594998#true} is VALID [2018-11-19 18:49:55,901 INFO L273 TraceCheckUtils]: 490: Hoare triple {594998#true} ~tmp___0~15 := #t~ret573;havoc #t~mem571.base, #t~mem571.offset;havoc #t~mem570.base, #t~mem570.offset;havoc #t~mem572;havoc #t~ret573;call #t~mem574.base, #t~mem574.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem575.base, #t~mem575.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem576.base, #t~mem576.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem577 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {594998#true} is VALID [2018-11-19 18:49:55,902 INFO L256 TraceCheckUtils]: 491: Hoare triple {594998#true} call ldv_usb_fill_bulk_urb_10(#t~mem574.base, #t~mem574.offset, #t~mem575.base, #t~mem575.offset, ~bitwiseOr(~tmp___0~15, 3221225600), #t~mem576.base, #t~mem576.offset, (if #t~mem577 % 4294967296 % 4294967296 <= 2147483647 then #t~mem577 % 4294967296 % 4294967296 else #t~mem577 % 4294967296 % 4294967296 - 4294967296), #funAddr~ims_pcu_irq.base, #funAddr~ims_pcu_irq.offset, ~pcu.base, ~pcu.offset); {594998#true} is VALID [2018-11-19 18:49:55,902 INFO L273 TraceCheckUtils]: 492: Hoare triple {594998#true} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset;~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~pipe := #in~pipe;~transfer_buffer.base, ~transfer_buffer.offset := #in~transfer_buffer.base, #in~transfer_buffer.offset;~buffer_length := #in~buffer_length;~complete_fn.base, ~complete_fn.offset := #in~complete_fn.base, #in~complete_fn.offset;~context.base, ~context.offset := #in~context.base, #in~context.offset; {594998#true} is VALID [2018-11-19 18:49:55,902 INFO L256 TraceCheckUtils]: 493: Hoare triple {594998#true} call ldv_fill_bulk_urb(~urb.base, ~urb.offset, ~complete_fn.base, ~complete_fn.offset); {594998#true} is VALID [2018-11-19 18:49:55,902 INFO L273 TraceCheckUtils]: 494: Hoare triple {594998#true} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset;~complete_fn.base, ~complete_fn.offset := #in~complete_fn.base, #in~complete_fn.offset; {594998#true} is VALID [2018-11-19 18:49:55,902 INFO L273 TraceCheckUtils]: 495: Hoare triple {594998#true} assume (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616 == (~urb.base + ~urb.offset) % 18446744073709551616;~completeFnBulk~0.base, ~completeFnBulk~0.offset := ~complete_fn.base, ~complete_fn.offset;~completeFnBulkCounter~0 := 1 + ~completeFnBulkCounter~0; {594998#true} is VALID [2018-11-19 18:49:55,902 INFO L273 TraceCheckUtils]: 496: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,903 INFO L268 TraceCheckUtils]: 497: Hoare quadruple {594998#true} {594998#true} #2587#return; {594998#true} is VALID [2018-11-19 18:49:55,903 INFO L273 TraceCheckUtils]: 498: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,903 INFO L268 TraceCheckUtils]: 499: Hoare quadruple {594998#true} {594998#true} #2713#return; {594998#true} is VALID [2018-11-19 18:49:55,903 INFO L273 TraceCheckUtils]: 500: Hoare triple {594998#true} havoc #t~mem574.base, #t~mem574.offset;havoc #t~mem575.base, #t~mem575.offset;havoc #t~mem576.base, #t~mem576.offset;havoc #t~mem577;call #t~mem578 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {594998#true} is VALID [2018-11-19 18:49:55,903 INFO L256 TraceCheckUtils]: 501: Hoare triple {594998#true} call #t~ret579.base, #t~ret579.offset := kmalloc(#t~mem578, 208); {594998#true} is VALID [2018-11-19 18:49:55,903 INFO L273 TraceCheckUtils]: 502: Hoare triple {594998#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,903 INFO L256 TraceCheckUtils]: 503: Hoare triple {594998#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {594998#true} is VALID [2018-11-19 18:49:55,904 INFO L273 TraceCheckUtils]: 504: Hoare triple {594998#true} ~size := #in~size;~t := #in~t; {594998#true} is VALID [2018-11-19 18:49:55,904 INFO L256 TraceCheckUtils]: 505: Hoare triple {594998#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {594998#true} is VALID [2018-11-19 18:49:55,904 INFO L273 TraceCheckUtils]: 506: Hoare triple {594998#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {594998#true} is VALID [2018-11-19 18:49:55,905 INFO L273 TraceCheckUtils]: 507: Hoare triple {594998#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {595000#(and (= 0 |ldv_malloc_#res.offset|) (= 0 |ldv_malloc_#res.base|))} is VALID [2018-11-19 18:49:55,905 INFO L273 TraceCheckUtils]: 508: Hoare triple {595000#(and (= 0 |ldv_malloc_#res.offset|) (= 0 |ldv_malloc_#res.base|))} assume true; {595000#(and (= 0 |ldv_malloc_#res.offset|) (= 0 |ldv_malloc_#res.base|))} is VALID [2018-11-19 18:49:55,906 INFO L268 TraceCheckUtils]: 509: Hoare quadruple {595000#(and (= 0 |ldv_malloc_#res.offset|) (= 0 |ldv_malloc_#res.base|))} {594998#true} #2691#return; {595001#(and (= 0 |__kmalloc_#t~ret126.base|) (= 0 |__kmalloc_#t~ret126.offset|))} is VALID [2018-11-19 18:49:55,907 INFO L273 TraceCheckUtils]: 510: Hoare triple {595001#(and (= 0 |__kmalloc_#t~ret126.base|) (= 0 |__kmalloc_#t~ret126.offset|))} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {595002#(and (= 0 |__kmalloc_#res.offset|) (= 0 |__kmalloc_#res.base|))} is VALID [2018-11-19 18:49:55,907 INFO L273 TraceCheckUtils]: 511: Hoare triple {595002#(and (= 0 |__kmalloc_#res.offset|) (= 0 |__kmalloc_#res.base|))} assume true; {595002#(and (= 0 |__kmalloc_#res.offset|) (= 0 |__kmalloc_#res.base|))} is VALID [2018-11-19 18:49:55,909 INFO L268 TraceCheckUtils]: 512: Hoare quadruple {595002#(and (= 0 |__kmalloc_#res.offset|) (= 0 |__kmalloc_#res.base|))} {594998#true} #2781#return; {595003#(and (= 0 |kmalloc_#t~ret127.base|) (= 0 |kmalloc_#t~ret127.offset|))} is VALID [2018-11-19 18:49:55,909 INFO L273 TraceCheckUtils]: 513: Hoare triple {595003#(and (= 0 |kmalloc_#t~ret127.base|) (= 0 |kmalloc_#t~ret127.offset|))} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {595004#(and (= 0 |kmalloc_#res.offset|) (= 0 |kmalloc_#res.base|))} is VALID [2018-11-19 18:49:55,910 INFO L273 TraceCheckUtils]: 514: Hoare triple {595004#(and (= 0 |kmalloc_#res.offset|) (= 0 |kmalloc_#res.base|))} assume true; {595004#(and (= 0 |kmalloc_#res.offset|) (= 0 |kmalloc_#res.base|))} is VALID [2018-11-19 18:49:55,911 INFO L268 TraceCheckUtils]: 515: Hoare quadruple {595004#(and (= 0 |kmalloc_#res.offset|) (= 0 |kmalloc_#res.base|))} {594998#true} #2715#return; {595005#(and (= 0 |ims_pcu_buffers_alloc_#t~ret579.base|) (= 0 |ims_pcu_buffers_alloc_#t~ret579.offset|))} is VALID [2018-11-19 18:49:55,912 INFO L273 TraceCheckUtils]: 516: Hoare triple {595005#(and (= 0 |ims_pcu_buffers_alloc_#t~ret579.base|) (= 0 |ims_pcu_buffers_alloc_#t~ret579.offset|))} ~tmp___1~6.base, ~tmp___1~6.offset := #t~ret579.base, #t~ret579.offset;havoc #t~mem578;havoc #t~ret579.base, #t~ret579.offset;call write~$Pointer$(~tmp___1~6.base, ~tmp___1~6.offset, ~pcu.base, 175 + ~pcu.offset, 8);call #t~mem580.base, #t~mem580.offset := read~$Pointer$(~pcu.base, 175 + ~pcu.offset, 8); {595006#(and (= |ims_pcu_buffers_alloc_#t~mem580.base| 0) (= |ims_pcu_buffers_alloc_#t~mem580.offset| 0))} is VALID [2018-11-19 18:49:55,913 INFO L273 TraceCheckUtils]: 517: Hoare triple {595006#(and (= |ims_pcu_buffers_alloc_#t~mem580.base| 0) (= |ims_pcu_buffers_alloc_#t~mem580.offset| 0))} assume !(0 == (#t~mem580.base + #t~mem580.offset) % 18446744073709551616);havoc #t~mem580.base, #t~mem580.offset;call #t~mem584.base, #t~mem584.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem585 := read~int(~pcu.base, 119 + ~pcu.offset, 4);call #t~ret586.base, #t~ret586.offset := usb_alloc_coherent(#t~mem584.base, #t~mem584.offset, #t~mem585, 208, ~pcu.base, 111 + ~pcu.offset);~tmp___2~2.base, ~tmp___2~2.offset := #t~ret586.base, #t~ret586.offset;havoc #t~ret586.base, #t~ret586.offset;havoc #t~mem585;havoc #t~mem584.base, #t~mem584.offset;call write~$Pointer$(~tmp___2~2.base, ~tmp___2~2.offset, ~pcu.base, 103 + ~pcu.offset, 8);call #t~mem587.base, #t~mem587.offset := read~$Pointer$(~pcu.base, 103 + ~pcu.offset, 8); {594999#false} is VALID [2018-11-19 18:49:55,913 INFO L273 TraceCheckUtils]: 518: Hoare triple {594999#false} assume !(0 == (#t~mem587.base + #t~mem587.offset) % 18446744073709551616);havoc #t~mem587.base, #t~mem587.offset; {594999#false} is VALID [2018-11-19 18:49:55,913 INFO L256 TraceCheckUtils]: 519: Hoare triple {594999#false} call #t~ret591.base, #t~ret591.offset := ldv_usb_alloc_urb_11(0, 208); {594998#true} is VALID [2018-11-19 18:49:55,913 INFO L273 TraceCheckUtils]: 520: Hoare triple {594998#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~59.base, ~tmp~59.offset; {594998#true} is VALID [2018-11-19 18:49:55,913 INFO L256 TraceCheckUtils]: 521: Hoare triple {594998#true} call #t~ret960.base, #t~ret960.offset := ldv_alloc_urb(); {594998#true} is VALID [2018-11-19 18:49:55,914 INFO L273 TraceCheckUtils]: 522: Hoare triple {594998#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {594998#true} is VALID [2018-11-19 18:49:55,914 INFO L256 TraceCheckUtils]: 523: Hoare triple {594998#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {594998#true} is VALID [2018-11-19 18:49:55,914 INFO L273 TraceCheckUtils]: 524: Hoare triple {594998#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {594998#true} is VALID [2018-11-19 18:49:55,914 INFO L273 TraceCheckUtils]: 525: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,914 INFO L268 TraceCheckUtils]: 526: Hoare quadruple {594998#true} {594998#true} #2605#return; {594998#true} is VALID [2018-11-19 18:49:55,914 INFO L273 TraceCheckUtils]: 527: Hoare triple {594998#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {594998#true} is VALID [2018-11-19 18:49:55,914 INFO L256 TraceCheckUtils]: 528: Hoare triple {594998#true} call #t~ret965 := ldv_undef_int(); {594998#true} is VALID [2018-11-19 18:49:55,915 INFO L273 TraceCheckUtils]: 529: Hoare triple {594998#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {594998#true} is VALID [2018-11-19 18:49:55,915 INFO L273 TraceCheckUtils]: 530: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,915 INFO L268 TraceCheckUtils]: 531: Hoare quadruple {594998#true} {594998#true} #2607#return; {594998#true} is VALID [2018-11-19 18:49:55,915 INFO L273 TraceCheckUtils]: 532: Hoare triple {594998#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {594998#true} is VALID [2018-11-19 18:49:55,915 INFO L273 TraceCheckUtils]: 533: Hoare triple {594998#true} assume 0 != ~tmp___0~26; {594998#true} is VALID [2018-11-19 18:49:55,915 INFO L273 TraceCheckUtils]: 534: Hoare triple {594998#true} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {594998#true} is VALID [2018-11-19 18:49:55,915 INFO L273 TraceCheckUtils]: 535: Hoare triple {594998#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {594998#true} is VALID [2018-11-19 18:49:55,916 INFO L273 TraceCheckUtils]: 536: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,916 INFO L268 TraceCheckUtils]: 537: Hoare quadruple {594998#true} {594998#true} #2683#return; {594998#true} is VALID [2018-11-19 18:49:55,916 INFO L273 TraceCheckUtils]: 538: Hoare triple {594998#true} ~tmp~59.base, ~tmp~59.offset := #t~ret960.base, #t~ret960.offset;havoc #t~ret960.base, #t~ret960.offset;#res.base, #res.offset := ~tmp~59.base, ~tmp~59.offset; {594998#true} is VALID [2018-11-19 18:49:55,916 INFO L273 TraceCheckUtils]: 539: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,916 INFO L268 TraceCheckUtils]: 540: Hoare quadruple {594998#true} {594999#false} #2717#return; {594999#false} is VALID [2018-11-19 18:49:55,916 INFO L273 TraceCheckUtils]: 541: Hoare triple {594999#false} call write~$Pointer$(#t~ret591.base, #t~ret591.offset, ~pcu.base, 95 + ~pcu.offset, 8);havoc #t~ret591.base, #t~ret591.offset;call #t~mem592.base, #t~mem592.offset := read~$Pointer$(~pcu.base, 95 + ~pcu.offset, 8); {594999#false} is VALID [2018-11-19 18:49:55,916 INFO L273 TraceCheckUtils]: 542: Hoare triple {594999#false} assume 0 == (#t~mem592.base + #t~mem592.offset) % 18446744073709551616;havoc #t~mem592.base, #t~mem592.offset;havoc #t~nondet593;call #t~mem594.base, #t~mem594.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem594.base, #t~mem594.offset;~error~18 := -12; {594999#false} is VALID [2018-11-19 18:49:55,917 INFO L273 TraceCheckUtils]: 543: Hoare triple {594999#false} call #t~mem611.base, #t~mem611.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem612 := read~int(~pcu.base, 119 + ~pcu.offset, 4);call #t~mem613.base, #t~mem613.offset := read~$Pointer$(~pcu.base, 103 + ~pcu.offset, 8);call #t~mem614 := read~int(~pcu.base, 111 + ~pcu.offset, 8);call usb_free_coherent(#t~mem611.base, #t~mem611.offset, #t~mem612, #t~mem613.base, #t~mem613.offset, #t~mem614);havoc #t~mem612;havoc #t~mem611.base, #t~mem611.offset;havoc #t~mem614;havoc #t~mem613.base, #t~mem613.offset; {594999#false} is VALID [2018-11-19 18:49:55,917 INFO L273 TraceCheckUtils]: 544: Hoare triple {594999#false} call #t~mem615.base, #t~mem615.offset := read~$Pointer$(~pcu.base, 175 + ~pcu.offset, 8);call kfree(#t~mem615.base, #t~mem615.offset);havoc #t~mem615.base, #t~mem615.offset; {594999#false} is VALID [2018-11-19 18:49:55,917 INFO L273 TraceCheckUtils]: 545: Hoare triple {594999#false} call #t~mem616.base, #t~mem616.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {594999#false} is VALID [2018-11-19 18:49:55,917 INFO L256 TraceCheckUtils]: 546: Hoare triple {594999#false} call ldv_usb_free_urb_13(#t~mem616.base, #t~mem616.offset); {594998#true} is VALID [2018-11-19 18:49:55,917 INFO L273 TraceCheckUtils]: 547: Hoare triple {594998#true} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset; {594998#true} is VALID [2018-11-19 18:49:55,917 INFO L256 TraceCheckUtils]: 548: Hoare triple {594998#true} call ldv_free_urb(~urb.base, ~urb.offset); {594998#true} is VALID [2018-11-19 18:49:55,918 INFO L273 TraceCheckUtils]: 549: Hoare triple {594998#true} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset; {594998#true} is VALID [2018-11-19 18:49:55,918 INFO L273 TraceCheckUtils]: 550: Hoare triple {594998#true} assume !((~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616 == (~urb.base + ~urb.offset) % 18446744073709551616 && 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {594998#true} is VALID [2018-11-19 18:49:55,918 INFO L273 TraceCheckUtils]: 551: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,918 INFO L268 TraceCheckUtils]: 552: Hoare quadruple {594998#true} {594998#true} #2695#return; {594998#true} is VALID [2018-11-19 18:49:55,918 INFO L273 TraceCheckUtils]: 553: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,918 INFO L268 TraceCheckUtils]: 554: Hoare quadruple {594998#true} {594999#false} #2723#return; {594999#false} is VALID [2018-11-19 18:49:55,918 INFO L273 TraceCheckUtils]: 555: Hoare triple {594999#false} havoc #t~mem616.base, #t~mem616.offset; {594999#false} is VALID [2018-11-19 18:49:55,919 INFO L273 TraceCheckUtils]: 556: Hoare triple {594999#false} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {594999#false} is VALID [2018-11-19 18:49:55,919 INFO L273 TraceCheckUtils]: 557: Hoare triple {594999#false} assume true; {594999#false} is VALID [2018-11-19 18:49:55,919 INFO L268 TraceCheckUtils]: 558: Hoare quadruple {594999#false} {594998#true} #3109#return; {594999#false} is VALID [2018-11-19 18:49:55,919 INFO L273 TraceCheckUtils]: 559: Hoare triple {594999#false} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {594999#false} is VALID [2018-11-19 18:49:55,919 INFO L273 TraceCheckUtils]: 560: Hoare triple {594999#false} assume 0 != ~error~25; {594999#false} is VALID [2018-11-19 18:49:55,919 INFO L273 TraceCheckUtils]: 561: Hoare triple {594999#false} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {594999#false} is VALID [2018-11-19 18:49:55,919 INFO L273 TraceCheckUtils]: 562: Hoare triple {594999#false} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {594999#false} is VALID [2018-11-19 18:49:55,920 INFO L273 TraceCheckUtils]: 563: Hoare triple {594999#false} assume true; {594999#false} is VALID [2018-11-19 18:49:55,920 INFO L268 TraceCheckUtils]: 564: Hoare quadruple {594999#false} {594998#true} #3015#return; {594999#false} is VALID [2018-11-19 18:49:55,920 INFO L273 TraceCheckUtils]: 565: Hoare triple {594999#false} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {594999#false} is VALID [2018-11-19 18:49:55,920 INFO L273 TraceCheckUtils]: 566: Hoare triple {594999#false} assume !(0 == ~ldv_retval_3~0); {594999#false} is VALID [2018-11-19 18:49:55,920 INFO L273 TraceCheckUtils]: 567: Hoare triple {594999#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {594999#false} is VALID [2018-11-19 18:49:55,920 INFO L273 TraceCheckUtils]: 568: Hoare triple {594999#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {594999#false} is VALID [2018-11-19 18:49:55,920 INFO L273 TraceCheckUtils]: 569: Hoare triple {594999#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {594999#false} is VALID [2018-11-19 18:49:55,921 INFO L273 TraceCheckUtils]: 570: Hoare triple {594999#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {594999#false} is VALID [2018-11-19 18:49:55,921 INFO L273 TraceCheckUtils]: 571: Hoare triple {594999#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {594999#false} is VALID [2018-11-19 18:49:55,921 INFO L273 TraceCheckUtils]: 572: Hoare triple {594999#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {594999#false} is VALID [2018-11-19 18:49:55,921 INFO L273 TraceCheckUtils]: 573: Hoare triple {594999#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {594999#false} is VALID [2018-11-19 18:49:55,921 INFO L273 TraceCheckUtils]: 574: Hoare triple {594999#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {594999#false} is VALID [2018-11-19 18:49:55,921 INFO L273 TraceCheckUtils]: 575: Hoare triple {594999#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {594999#false} is VALID [2018-11-19 18:49:55,922 INFO L273 TraceCheckUtils]: 576: Hoare triple {594999#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {594999#false} is VALID [2018-11-19 18:49:55,922 INFO L273 TraceCheckUtils]: 577: Hoare triple {594999#false} assume #t~switch909; {594999#false} is VALID [2018-11-19 18:49:55,922 INFO L273 TraceCheckUtils]: 578: Hoare triple {594999#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {594999#false} is VALID [2018-11-19 18:49:55,922 INFO L273 TraceCheckUtils]: 579: Hoare triple {594999#false} assume #t~switch947; {594999#false} is VALID [2018-11-19 18:49:55,922 INFO L273 TraceCheckUtils]: 580: Hoare triple {594999#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {594999#false} is VALID [2018-11-19 18:49:55,922 INFO L256 TraceCheckUtils]: 581: Hoare triple {594999#false} call ims_pcu_driver_exit(); {594998#true} is VALID [2018-11-19 18:49:55,922 INFO L256 TraceCheckUtils]: 582: Hoare triple {594998#true} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {594998#true} is VALID [2018-11-19 18:49:55,923 INFO L273 TraceCheckUtils]: 583: Hoare triple {594998#true} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {594998#true} is VALID [2018-11-19 18:49:55,923 INFO L273 TraceCheckUtils]: 584: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,923 INFO L268 TraceCheckUtils]: 585: Hoare quadruple {594998#true} {594998#true} #2597#return; {594998#true} is VALID [2018-11-19 18:49:55,923 INFO L273 TraceCheckUtils]: 586: Hoare triple {594998#true} assume true; {594998#true} is VALID [2018-11-19 18:49:55,923 INFO L268 TraceCheckUtils]: 587: Hoare quadruple {594998#true} {594999#false} #3033#return; {594999#false} is VALID [2018-11-19 18:49:55,923 INFO L273 TraceCheckUtils]: 588: Hoare triple {594999#false} ~ldv_state_variable_0~0 := 2; {594999#false} is VALID [2018-11-19 18:49:55,923 INFO L256 TraceCheckUtils]: 589: Hoare triple {594999#false} call ldv_check_final_state(); {594999#false} is VALID [2018-11-19 18:49:55,924 INFO L273 TraceCheckUtils]: 590: Hoare triple {594999#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {594999#false} is VALID [2018-11-19 18:49:55,924 INFO L256 TraceCheckUtils]: 591: Hoare triple {594999#false} call ldv_error(); {594999#false} is VALID [2018-11-19 18:49:55,924 INFO L273 TraceCheckUtils]: 592: Hoare triple {594999#false} assume !false; {594999#false} is VALID [2018-11-19 18:49:56,084 INFO L134 CoverageAnalysis]: Checked inductivity of 2762 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 2732 trivial. 0 not checked. [2018-11-19 18:49:56,084 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 18:49:56,084 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-19 18:49:56,085 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 593 [2018-11-19 18:49:56,085 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 18:49:56,086 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states. [2018-11-19 18:49:56,637 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 440 edges. 440 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:49:56,637 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-19 18:49:56,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-19 18:49:56,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-11-19 18:49:56,638 INFO L87 Difference]: Start difference. First operand 11074 states and 14918 transitions. Second operand 9 states. [2018-11-19 18:51:15,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:51:15,256 INFO L93 Difference]: Finished difference Result 21652 states and 29250 transitions. [2018-11-19 18:51:15,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-19 18:51:15,257 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 593 [2018-11-19 18:51:15,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 18:51:15,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-19 18:51:15,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 3269 transitions. [2018-11-19 18:51:15,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-19 18:51:15,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 3269 transitions. [2018-11-19 18:51:15,387 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 3269 transitions. [2018-11-19 18:51:18,124 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3269 edges. 3269 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 18:51:24,225 INFO L225 Difference]: With dead ends: 21652 [2018-11-19 18:51:24,225 INFO L226 Difference]: Without dead ends: 11090 [2018-11-19 18:51:24,237 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-11-19 18:51:24,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11090 states. [2018-11-19 18:51:52,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11090 to 11090. [2018-11-19 18:51:52,375 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 18:51:52,375 INFO L82 GeneralOperation]: Start isEquivalent. First operand 11090 states. Second operand 11090 states. [2018-11-19 18:51:52,375 INFO L74 IsIncluded]: Start isIncluded. First operand 11090 states. Second operand 11090 states. [2018-11-19 18:51:52,375 INFO L87 Difference]: Start difference. First operand 11090 states. Second operand 11090 states. [2018-11-19 18:51:56,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:51:56,798 INFO L93 Difference]: Finished difference Result 11090 states and 14934 transitions. [2018-11-19 18:51:56,799 INFO L276 IsEmpty]: Start isEmpty. Operand 11090 states and 14934 transitions. [2018-11-19 18:51:56,815 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:51:56,815 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:51:56,815 INFO L74 IsIncluded]: Start isIncluded. First operand 11090 states. Second operand 11090 states. [2018-11-19 18:51:56,815 INFO L87 Difference]: Start difference. First operand 11090 states. Second operand 11090 states. [2018-11-19 18:52:01,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 18:52:01,450 INFO L93 Difference]: Finished difference Result 11090 states and 14934 transitions. [2018-11-19 18:52:01,450 INFO L276 IsEmpty]: Start isEmpty. Operand 11090 states and 14934 transitions. [2018-11-19 18:52:01,467 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 18:52:01,467 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 18:52:01,467 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 18:52:01,467 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 18:52:01,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11090 states. [2018-11-19 18:52:06,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11090 states to 11090 states and 14934 transitions. [2018-11-19 18:52:06,879 INFO L78 Accepts]: Start accepts. Automaton has 11090 states and 14934 transitions. Word has length 593 [2018-11-19 18:52:06,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 18:52:06,880 INFO L480 AbstractCegarLoop]: Abstraction has 11090 states and 14934 transitions. [2018-11-19 18:52:06,880 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-19 18:52:06,880 INFO L276 IsEmpty]: Start isEmpty. Operand 11090 states and 14934 transitions. [2018-11-19 18:52:06,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 594 [2018-11-19 18:52:06,892 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 18:52:06,893 INFO L384 BasicCegarLoop]: trace histogram [37, 37, 37, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 18:52:06,893 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 18:52:06,895 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 18:52:06,896 INFO L82 PathProgramCache]: Analyzing trace with hash -275832059, now seen corresponding path program 1 times [2018-11-19 18:52:06,896 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 18:52:06,896 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 18:52:06,898 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:52:06,898 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:52:06,898 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 18:52:10,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:52:11,115 INFO L256 TraceCheckUtils]: 0: Hoare triple {660590#true} call ULTIMATE.init(); {660590#true} is VALID [2018-11-19 18:52:11,169 INFO L273 TraceCheckUtils]: 1: Hoare triple {660590#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,171 INFO L273 TraceCheckUtils]: 2: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,171 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660590#true} #3175#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,172 INFO L256 TraceCheckUtils]: 4: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret973 := main(); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,173 INFO L273 TraceCheckUtils]: 5: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,173 INFO L256 TraceCheckUtils]: 6: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {660590#true} is VALID [2018-11-19 18:52:11,173 INFO L273 TraceCheckUtils]: 7: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,173 INFO L273 TraceCheckUtils]: 8: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,174 INFO L273 TraceCheckUtils]: 9: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,174 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2927#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,175 INFO L273 TraceCheckUtils]: 11: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,175 INFO L256 TraceCheckUtils]: 12: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {660590#true} is VALID [2018-11-19 18:52:11,175 INFO L273 TraceCheckUtils]: 13: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,175 INFO L273 TraceCheckUtils]: 14: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,175 INFO L273 TraceCheckUtils]: 15: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,176 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2929#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,176 INFO L273 TraceCheckUtils]: 17: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,176 INFO L256 TraceCheckUtils]: 18: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {660590#true} is VALID [2018-11-19 18:52:11,176 INFO L273 TraceCheckUtils]: 19: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,176 INFO L273 TraceCheckUtils]: 20: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,176 INFO L273 TraceCheckUtils]: 21: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,177 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2931#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,177 INFO L273 TraceCheckUtils]: 23: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,177 INFO L256 TraceCheckUtils]: 24: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {660590#true} is VALID [2018-11-19 18:52:11,177 INFO L273 TraceCheckUtils]: 25: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,178 INFO L273 TraceCheckUtils]: 26: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,178 INFO L273 TraceCheckUtils]: 27: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,178 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2933#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,178 INFO L273 TraceCheckUtils]: 29: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,179 INFO L256 TraceCheckUtils]: 30: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {660590#true} is VALID [2018-11-19 18:52:11,179 INFO L273 TraceCheckUtils]: 31: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,179 INFO L273 TraceCheckUtils]: 32: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,179 INFO L273 TraceCheckUtils]: 33: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,179 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2935#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,180 INFO L273 TraceCheckUtils]: 35: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,180 INFO L256 TraceCheckUtils]: 36: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {660590#true} is VALID [2018-11-19 18:52:11,180 INFO L273 TraceCheckUtils]: 37: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,180 INFO L273 TraceCheckUtils]: 38: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,180 INFO L273 TraceCheckUtils]: 39: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,181 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2937#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,181 INFO L273 TraceCheckUtils]: 41: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,181 INFO L256 TraceCheckUtils]: 42: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {660590#true} is VALID [2018-11-19 18:52:11,181 INFO L273 TraceCheckUtils]: 43: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,181 INFO L273 TraceCheckUtils]: 44: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,182 INFO L273 TraceCheckUtils]: 45: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,182 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2939#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,182 INFO L273 TraceCheckUtils]: 47: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,183 INFO L256 TraceCheckUtils]: 48: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {660590#true} is VALID [2018-11-19 18:52:11,183 INFO L273 TraceCheckUtils]: 49: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,183 INFO L273 TraceCheckUtils]: 50: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,183 INFO L273 TraceCheckUtils]: 51: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,183 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2941#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,184 INFO L273 TraceCheckUtils]: 53: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,184 INFO L256 TraceCheckUtils]: 54: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {660590#true} is VALID [2018-11-19 18:52:11,184 INFO L273 TraceCheckUtils]: 55: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,185 INFO L273 TraceCheckUtils]: 56: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,185 INFO L273 TraceCheckUtils]: 57: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,186 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2943#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,186 INFO L273 TraceCheckUtils]: 59: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,186 INFO L256 TraceCheckUtils]: 60: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {660590#true} is VALID [2018-11-19 18:52:11,187 INFO L273 TraceCheckUtils]: 61: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,187 INFO L273 TraceCheckUtils]: 62: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,187 INFO L273 TraceCheckUtils]: 63: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,187 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2945#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,188 INFO L273 TraceCheckUtils]: 65: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,188 INFO L256 TraceCheckUtils]: 66: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {660590#true} is VALID [2018-11-19 18:52:11,188 INFO L273 TraceCheckUtils]: 67: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,188 INFO L273 TraceCheckUtils]: 68: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,188 INFO L273 TraceCheckUtils]: 69: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,189 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2947#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,189 INFO L273 TraceCheckUtils]: 71: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,189 INFO L256 TraceCheckUtils]: 72: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {660590#true} is VALID [2018-11-19 18:52:11,189 INFO L273 TraceCheckUtils]: 73: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,189 INFO L273 TraceCheckUtils]: 74: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,190 INFO L273 TraceCheckUtils]: 75: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,190 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2949#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,191 INFO L273 TraceCheckUtils]: 77: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,191 INFO L256 TraceCheckUtils]: 78: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {660590#true} is VALID [2018-11-19 18:52:11,191 INFO L273 TraceCheckUtils]: 79: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,191 INFO L273 TraceCheckUtils]: 80: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,191 INFO L273 TraceCheckUtils]: 81: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,192 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2951#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,193 INFO L273 TraceCheckUtils]: 83: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,193 INFO L256 TraceCheckUtils]: 84: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {660590#true} is VALID [2018-11-19 18:52:11,193 INFO L273 TraceCheckUtils]: 85: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,193 INFO L273 TraceCheckUtils]: 86: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,193 INFO L273 TraceCheckUtils]: 87: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,194 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2953#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,195 INFO L273 TraceCheckUtils]: 89: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,195 INFO L256 TraceCheckUtils]: 90: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {660590#true} is VALID [2018-11-19 18:52:11,195 INFO L273 TraceCheckUtils]: 91: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,195 INFO L273 TraceCheckUtils]: 92: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,195 INFO L273 TraceCheckUtils]: 93: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,196 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2955#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,196 INFO L273 TraceCheckUtils]: 95: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,196 INFO L256 TraceCheckUtils]: 96: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {660590#true} is VALID [2018-11-19 18:52:11,196 INFO L273 TraceCheckUtils]: 97: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,196 INFO L273 TraceCheckUtils]: 98: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,197 INFO L273 TraceCheckUtils]: 99: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,197 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2957#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,198 INFO L273 TraceCheckUtils]: 101: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,198 INFO L256 TraceCheckUtils]: 102: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {660590#true} is VALID [2018-11-19 18:52:11,198 INFO L273 TraceCheckUtils]: 103: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,199 INFO L273 TraceCheckUtils]: 104: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,199 INFO L273 TraceCheckUtils]: 105: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,202 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2959#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,202 INFO L273 TraceCheckUtils]: 107: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,203 INFO L256 TraceCheckUtils]: 108: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {660590#true} is VALID [2018-11-19 18:52:11,203 INFO L273 TraceCheckUtils]: 109: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,203 INFO L273 TraceCheckUtils]: 110: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,203 INFO L273 TraceCheckUtils]: 111: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,204 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2961#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,204 INFO L273 TraceCheckUtils]: 113: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,204 INFO L256 TraceCheckUtils]: 114: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {660590#true} is VALID [2018-11-19 18:52:11,204 INFO L273 TraceCheckUtils]: 115: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,204 INFO L273 TraceCheckUtils]: 116: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,205 INFO L273 TraceCheckUtils]: 117: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,205 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2963#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,206 INFO L273 TraceCheckUtils]: 119: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,206 INFO L256 TraceCheckUtils]: 120: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {660590#true} is VALID [2018-11-19 18:52:11,206 INFO L273 TraceCheckUtils]: 121: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,207 INFO L273 TraceCheckUtils]: 122: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,207 INFO L273 TraceCheckUtils]: 123: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,208 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2965#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,216 INFO L273 TraceCheckUtils]: 125: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,216 INFO L256 TraceCheckUtils]: 126: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {660590#true} is VALID [2018-11-19 18:52:11,216 INFO L273 TraceCheckUtils]: 127: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,216 INFO L273 TraceCheckUtils]: 128: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,216 INFO L273 TraceCheckUtils]: 129: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,217 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2967#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,218 INFO L273 TraceCheckUtils]: 131: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,218 INFO L256 TraceCheckUtils]: 132: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {660590#true} is VALID [2018-11-19 18:52:11,218 INFO L273 TraceCheckUtils]: 133: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,218 INFO L273 TraceCheckUtils]: 134: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,219 INFO L273 TraceCheckUtils]: 135: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,219 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2969#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,220 INFO L273 TraceCheckUtils]: 137: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,220 INFO L256 TraceCheckUtils]: 138: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {660590#true} is VALID [2018-11-19 18:52:11,220 INFO L273 TraceCheckUtils]: 139: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,220 INFO L273 TraceCheckUtils]: 140: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,220 INFO L273 TraceCheckUtils]: 141: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,221 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2971#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,222 INFO L273 TraceCheckUtils]: 143: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,222 INFO L256 TraceCheckUtils]: 144: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {660590#true} is VALID [2018-11-19 18:52:11,222 INFO L273 TraceCheckUtils]: 145: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,222 INFO L273 TraceCheckUtils]: 146: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,222 INFO L273 TraceCheckUtils]: 147: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,223 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2973#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,223 INFO L273 TraceCheckUtils]: 149: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,224 INFO L256 TraceCheckUtils]: 150: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {660590#true} is VALID [2018-11-19 18:52:11,224 INFO L273 TraceCheckUtils]: 151: Hoare triple {660590#true} #t~loopctr974 := 0; {660590#true} is VALID [2018-11-19 18:52:11,224 INFO L273 TraceCheckUtils]: 152: Hoare triple {660590#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {660590#true} is VALID [2018-11-19 18:52:11,224 INFO L273 TraceCheckUtils]: 153: Hoare triple {660590#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {660590#true} is VALID [2018-11-19 18:52:11,224 INFO L273 TraceCheckUtils]: 154: Hoare triple {660590#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {660590#true} is VALID [2018-11-19 18:52:11,224 INFO L273 TraceCheckUtils]: 155: Hoare triple {660590#true} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {660590#true} is VALID [2018-11-19 18:52:11,225 INFO L273 TraceCheckUtils]: 156: Hoare triple {660590#true} assume !(#t~loopctr974 < #amount); {660590#true} is VALID [2018-11-19 18:52:11,225 INFO L273 TraceCheckUtils]: 157: Hoare triple {660590#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {660590#true} is VALID [2018-11-19 18:52:11,226 INFO L268 TraceCheckUtils]: 158: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2975#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,226 INFO L273 TraceCheckUtils]: 159: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,227 INFO L273 TraceCheckUtils]: 160: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,228 INFO L273 TraceCheckUtils]: 161: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,228 INFO L273 TraceCheckUtils]: 162: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,229 INFO L273 TraceCheckUtils]: 163: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,229 INFO L273 TraceCheckUtils]: 164: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,230 INFO L273 TraceCheckUtils]: 165: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,230 INFO L273 TraceCheckUtils]: 166: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,231 INFO L273 TraceCheckUtils]: 167: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,231 INFO L273 TraceCheckUtils]: 168: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,232 INFO L273 TraceCheckUtils]: 169: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,232 INFO L273 TraceCheckUtils]: 170: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume #t~switch909; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,233 INFO L273 TraceCheckUtils]: 171: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,233 INFO L273 TraceCheckUtils]: 172: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,233 INFO L273 TraceCheckUtils]: 173: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume #t~switch947; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,234 INFO L273 TraceCheckUtils]: 174: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 1 == ~ldv_state_variable_0~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,234 INFO L256 TraceCheckUtils]: 175: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret948 := ims_pcu_driver_init(); {660590#true} is VALID [2018-11-19 18:52:11,234 INFO L273 TraceCheckUtils]: 176: Hoare triple {660590#true} havoc ~tmp~46; {660590#true} is VALID [2018-11-19 18:52:11,234 INFO L256 TraceCheckUtils]: 177: Hoare triple {660590#true} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {660590#true} is VALID [2018-11-19 18:52:11,234 INFO L273 TraceCheckUtils]: 178: Hoare triple {660590#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {660590#true} is VALID [2018-11-19 18:52:11,234 INFO L256 TraceCheckUtils]: 179: Hoare triple {660590#true} call ldv_usb_driver_1(); {660590#true} is VALID [2018-11-19 18:52:11,235 INFO L273 TraceCheckUtils]: 180: Hoare triple {660590#true} havoc ~tmp~53.base, ~tmp~53.offset; {660590#true} is VALID [2018-11-19 18:52:11,235 INFO L256 TraceCheckUtils]: 181: Hoare triple {660590#true} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {660590#true} is VALID [2018-11-19 18:52:11,235 INFO L273 TraceCheckUtils]: 182: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,235 INFO L273 TraceCheckUtils]: 183: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,235 INFO L273 TraceCheckUtils]: 184: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,235 INFO L268 TraceCheckUtils]: 185: Hoare quadruple {660590#true} {660590#true} #2613#return; {660590#true} is VALID [2018-11-19 18:52:11,235 INFO L273 TraceCheckUtils]: 186: Hoare triple {660590#true} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {660590#true} is VALID [2018-11-19 18:52:11,236 INFO L273 TraceCheckUtils]: 187: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,236 INFO L268 TraceCheckUtils]: 188: Hoare quadruple {660590#true} {660590#true} #2537#return; {660590#true} is VALID [2018-11-19 18:52:11,236 INFO L273 TraceCheckUtils]: 189: Hoare triple {660590#true} #res := ~ldv_func_res~0; {660590#true} is VALID [2018-11-19 18:52:11,236 INFO L273 TraceCheckUtils]: 190: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,236 INFO L268 TraceCheckUtils]: 191: Hoare quadruple {660590#true} {660590#true} #2777#return; {660590#true} is VALID [2018-11-19 18:52:11,236 INFO L273 TraceCheckUtils]: 192: Hoare triple {660590#true} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {660590#true} is VALID [2018-11-19 18:52:11,236 INFO L273 TraceCheckUtils]: 193: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,237 INFO L268 TraceCheckUtils]: 194: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3035#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,237 INFO L273 TraceCheckUtils]: 195: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,238 INFO L273 TraceCheckUtils]: 196: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_10~0 := 1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,238 INFO L256 TraceCheckUtils]: 197: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call ldv_initialize_ims_pcu_attribute_10(); {660590#true} is VALID [2018-11-19 18:52:11,238 INFO L273 TraceCheckUtils]: 198: Hoare triple {660590#true} havoc ~tmp~47.base, ~tmp~47.offset;havoc ~tmp___0~19.base, ~tmp___0~19.offset; {660590#true} is VALID [2018-11-19 18:52:11,238 INFO L256 TraceCheckUtils]: 199: Hoare triple {660590#true} call #t~ret861.base, #t~ret861.offset := ldv_zalloc(1376); {660590#true} is VALID [2018-11-19 18:52:11,238 INFO L273 TraceCheckUtils]: 200: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,238 INFO L273 TraceCheckUtils]: 201: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,238 INFO L273 TraceCheckUtils]: 202: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,239 INFO L268 TraceCheckUtils]: 203: Hoare quadruple {660590#true} {660590#true} #2807#return; {660590#true} is VALID [2018-11-19 18:52:11,239 INFO L273 TraceCheckUtils]: 204: Hoare triple {660590#true} ~tmp~47.base, ~tmp~47.offset := #t~ret861.base, #t~ret861.offset;havoc #t~ret861.base, #t~ret861.offset;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := ~tmp~47.base, ~tmp~47.offset; {660590#true} is VALID [2018-11-19 18:52:11,239 INFO L256 TraceCheckUtils]: 205: Hoare triple {660590#true} call #t~ret862.base, #t~ret862.offset := ldv_zalloc(48); {660590#true} is VALID [2018-11-19 18:52:11,239 INFO L273 TraceCheckUtils]: 206: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,239 INFO L273 TraceCheckUtils]: 207: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,239 INFO L273 TraceCheckUtils]: 208: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,239 INFO L268 TraceCheckUtils]: 209: Hoare quadruple {660590#true} {660590#true} #2809#return; {660590#true} is VALID [2018-11-19 18:52:11,239 INFO L273 TraceCheckUtils]: 210: Hoare triple {660590#true} ~tmp___0~19.base, ~tmp___0~19.offset := #t~ret862.base, #t~ret862.offset;havoc #t~ret862.base, #t~ret862.offset;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := ~tmp___0~19.base, ~tmp___0~19.offset; {660590#true} is VALID [2018-11-19 18:52:11,239 INFO L273 TraceCheckUtils]: 211: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,240 INFO L268 TraceCheckUtils]: 212: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3037#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,240 INFO L273 TraceCheckUtils]: 213: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~ldv_state_variable_4~0 := 1;~ldv_state_variable_8~0 := 1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,240 INFO L256 TraceCheckUtils]: 214: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call ldv_initialize_ims_pcu_attribute_8(); {660590#true} is VALID [2018-11-19 18:52:11,240 INFO L273 TraceCheckUtils]: 215: Hoare triple {660590#true} havoc ~tmp~51.base, ~tmp~51.offset;havoc ~tmp___0~23.base, ~tmp___0~23.offset; {660590#true} is VALID [2018-11-19 18:52:11,240 INFO L256 TraceCheckUtils]: 216: Hoare triple {660590#true} call #t~ret869.base, #t~ret869.offset := ldv_zalloc(1376); {660590#true} is VALID [2018-11-19 18:52:11,241 INFO L273 TraceCheckUtils]: 217: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,241 INFO L273 TraceCheckUtils]: 218: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,241 INFO L273 TraceCheckUtils]: 219: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,241 INFO L268 TraceCheckUtils]: 220: Hoare quadruple {660590#true} {660590#true} #2631#return; {660590#true} is VALID [2018-11-19 18:52:11,241 INFO L273 TraceCheckUtils]: 221: Hoare triple {660590#true} ~tmp~51.base, ~tmp~51.offset := #t~ret869.base, #t~ret869.offset;havoc #t~ret869.base, #t~ret869.offset;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := ~tmp~51.base, ~tmp~51.offset; {660590#true} is VALID [2018-11-19 18:52:11,241 INFO L256 TraceCheckUtils]: 222: Hoare triple {660590#true} call #t~ret870.base, #t~ret870.offset := ldv_zalloc(48); {660590#true} is VALID [2018-11-19 18:52:11,241 INFO L273 TraceCheckUtils]: 223: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,242 INFO L273 TraceCheckUtils]: 224: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,242 INFO L273 TraceCheckUtils]: 225: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,242 INFO L268 TraceCheckUtils]: 226: Hoare quadruple {660590#true} {660590#true} #2633#return; {660590#true} is VALID [2018-11-19 18:52:11,242 INFO L273 TraceCheckUtils]: 227: Hoare triple {660590#true} ~tmp___0~23.base, ~tmp___0~23.offset := #t~ret870.base, #t~ret870.offset;havoc #t~ret870.base, #t~ret870.offset;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := ~tmp___0~23.base, ~tmp___0~23.offset; {660590#true} is VALID [2018-11-19 18:52:11,242 INFO L273 TraceCheckUtils]: 228: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,242 INFO L268 TraceCheckUtils]: 229: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3039#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,243 INFO L273 TraceCheckUtils]: 230: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~ldv_state_variable_2~0 := 1;~ldv_state_variable_9~0 := 1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,243 INFO L256 TraceCheckUtils]: 231: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call ldv_initialize_ims_pcu_attribute_9(); {660590#true} is VALID [2018-11-19 18:52:11,243 INFO L273 TraceCheckUtils]: 232: Hoare triple {660590#true} havoc ~tmp~49.base, ~tmp~49.offset;havoc ~tmp___0~21.base, ~tmp___0~21.offset; {660590#true} is VALID [2018-11-19 18:52:11,243 INFO L256 TraceCheckUtils]: 233: Hoare triple {660590#true} call #t~ret865.base, #t~ret865.offset := ldv_zalloc(1376); {660590#true} is VALID [2018-11-19 18:52:11,244 INFO L273 TraceCheckUtils]: 234: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,244 INFO L273 TraceCheckUtils]: 235: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,244 INFO L273 TraceCheckUtils]: 236: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,244 INFO L268 TraceCheckUtils]: 237: Hoare quadruple {660590#true} {660590#true} #2627#return; {660590#true} is VALID [2018-11-19 18:52:11,244 INFO L273 TraceCheckUtils]: 238: Hoare triple {660590#true} ~tmp~49.base, ~tmp~49.offset := #t~ret865.base, #t~ret865.offset;havoc #t~ret865.base, #t~ret865.offset;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := ~tmp~49.base, ~tmp~49.offset; {660590#true} is VALID [2018-11-19 18:52:11,244 INFO L256 TraceCheckUtils]: 239: Hoare triple {660590#true} call #t~ret866.base, #t~ret866.offset := ldv_zalloc(48); {660590#true} is VALID [2018-11-19 18:52:11,244 INFO L273 TraceCheckUtils]: 240: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,245 INFO L273 TraceCheckUtils]: 241: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,245 INFO L273 TraceCheckUtils]: 242: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,245 INFO L268 TraceCheckUtils]: 243: Hoare quadruple {660590#true} {660590#true} #2629#return; {660590#true} is VALID [2018-11-19 18:52:11,245 INFO L273 TraceCheckUtils]: 244: Hoare triple {660590#true} ~tmp___0~21.base, ~tmp___0~21.offset := #t~ret866.base, #t~ret866.offset;havoc #t~ret866.base, #t~ret866.offset;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := ~tmp___0~21.base, ~tmp___0~21.offset; {660590#true} is VALID [2018-11-19 18:52:11,245 INFO L273 TraceCheckUtils]: 245: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,246 INFO L268 TraceCheckUtils]: 246: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3041#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,246 INFO L273 TraceCheckUtils]: 247: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~ldv_state_variable_7~0 := 1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,246 INFO L256 TraceCheckUtils]: 248: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call ldv_initialize_ims_pcu_attribute_7(); {660590#true} is VALID [2018-11-19 18:52:11,246 INFO L273 TraceCheckUtils]: 249: Hoare triple {660590#true} havoc ~tmp~52.base, ~tmp~52.offset;havoc ~tmp___0~24.base, ~tmp___0~24.offset; {660590#true} is VALID [2018-11-19 18:52:11,246 INFO L256 TraceCheckUtils]: 250: Hoare triple {660590#true} call #t~ret871.base, #t~ret871.offset := ldv_zalloc(1376); {660590#true} is VALID [2018-11-19 18:52:11,247 INFO L273 TraceCheckUtils]: 251: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,247 INFO L273 TraceCheckUtils]: 252: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,247 INFO L273 TraceCheckUtils]: 253: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,247 INFO L268 TraceCheckUtils]: 254: Hoare quadruple {660590#true} {660590#true} #2619#return; {660590#true} is VALID [2018-11-19 18:52:11,247 INFO L273 TraceCheckUtils]: 255: Hoare triple {660590#true} ~tmp~52.base, ~tmp~52.offset := #t~ret871.base, #t~ret871.offset;havoc #t~ret871.base, #t~ret871.offset;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := ~tmp~52.base, ~tmp~52.offset; {660590#true} is VALID [2018-11-19 18:52:11,247 INFO L256 TraceCheckUtils]: 256: Hoare triple {660590#true} call #t~ret872.base, #t~ret872.offset := ldv_zalloc(48); {660590#true} is VALID [2018-11-19 18:52:11,247 INFO L273 TraceCheckUtils]: 257: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,247 INFO L273 TraceCheckUtils]: 258: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,247 INFO L273 TraceCheckUtils]: 259: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,247 INFO L268 TraceCheckUtils]: 260: Hoare quadruple {660590#true} {660590#true} #2621#return; {660590#true} is VALID [2018-11-19 18:52:11,248 INFO L273 TraceCheckUtils]: 261: Hoare triple {660590#true} ~tmp___0~24.base, ~tmp___0~24.offset := #t~ret872.base, #t~ret872.offset;havoc #t~ret872.base, #t~ret872.offset;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := ~tmp___0~24.base, ~tmp___0~24.offset; {660590#true} is VALID [2018-11-19 18:52:11,248 INFO L273 TraceCheckUtils]: 262: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,248 INFO L268 TraceCheckUtils]: 263: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3043#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,249 INFO L273 TraceCheckUtils]: 264: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~ldv_state_variable_3~0 := 1;~ldv_state_variable_11~0 := 1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,249 INFO L256 TraceCheckUtils]: 265: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call ldv_initialize_ims_pcu_attribute_11(); {660590#true} is VALID [2018-11-19 18:52:11,249 INFO L273 TraceCheckUtils]: 266: Hoare triple {660590#true} havoc ~tmp~50.base, ~tmp~50.offset;havoc ~tmp___0~22.base, ~tmp___0~22.offset; {660590#true} is VALID [2018-11-19 18:52:11,249 INFO L256 TraceCheckUtils]: 267: Hoare triple {660590#true} call #t~ret867.base, #t~ret867.offset := ldv_zalloc(1376); {660590#true} is VALID [2018-11-19 18:52:11,249 INFO L273 TraceCheckUtils]: 268: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,249 INFO L273 TraceCheckUtils]: 269: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,249 INFO L273 TraceCheckUtils]: 270: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,249 INFO L268 TraceCheckUtils]: 271: Hoare quadruple {660590#true} {660590#true} #2811#return; {660590#true} is VALID [2018-11-19 18:52:11,249 INFO L273 TraceCheckUtils]: 272: Hoare triple {660590#true} ~tmp~50.base, ~tmp~50.offset := #t~ret867.base, #t~ret867.offset;havoc #t~ret867.base, #t~ret867.offset;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := ~tmp~50.base, ~tmp~50.offset; {660590#true} is VALID [2018-11-19 18:52:11,249 INFO L256 TraceCheckUtils]: 273: Hoare triple {660590#true} call #t~ret868.base, #t~ret868.offset := ldv_zalloc(48); {660590#true} is VALID [2018-11-19 18:52:11,250 INFO L273 TraceCheckUtils]: 274: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,250 INFO L273 TraceCheckUtils]: 275: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,250 INFO L273 TraceCheckUtils]: 276: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,250 INFO L268 TraceCheckUtils]: 277: Hoare quadruple {660590#true} {660590#true} #2813#return; {660590#true} is VALID [2018-11-19 18:52:11,250 INFO L273 TraceCheckUtils]: 278: Hoare triple {660590#true} ~tmp___0~22.base, ~tmp___0~22.offset := #t~ret868.base, #t~ret868.offset;havoc #t~ret868.base, #t~ret868.offset;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := ~tmp___0~22.base, ~tmp___0~22.offset; {660590#true} is VALID [2018-11-19 18:52:11,250 INFO L273 TraceCheckUtils]: 279: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,250 INFO L268 TraceCheckUtils]: 280: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3045#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,252 INFO L273 TraceCheckUtils]: 281: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~ldv_state_variable_6~0 := 1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,252 INFO L256 TraceCheckUtils]: 282: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call ldv_initialize_ims_pcu_attribute_6(); {660590#true} is VALID [2018-11-19 18:52:11,252 INFO L273 TraceCheckUtils]: 283: Hoare triple {660590#true} havoc ~tmp~48.base, ~tmp~48.offset;havoc ~tmp___0~20.base, ~tmp___0~20.offset; {660590#true} is VALID [2018-11-19 18:52:11,252 INFO L256 TraceCheckUtils]: 284: Hoare triple {660590#true} call #t~ret863.base, #t~ret863.offset := ldv_zalloc(1376); {660590#true} is VALID [2018-11-19 18:52:11,252 INFO L273 TraceCheckUtils]: 285: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,252 INFO L273 TraceCheckUtils]: 286: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,252 INFO L273 TraceCheckUtils]: 287: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,252 INFO L268 TraceCheckUtils]: 288: Hoare quadruple {660590#true} {660590#true} #2623#return; {660590#true} is VALID [2018-11-19 18:52:11,252 INFO L273 TraceCheckUtils]: 289: Hoare triple {660590#true} ~tmp~48.base, ~tmp~48.offset := #t~ret863.base, #t~ret863.offset;havoc #t~ret863.base, #t~ret863.offset;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := ~tmp~48.base, ~tmp~48.offset; {660590#true} is VALID [2018-11-19 18:52:11,253 INFO L256 TraceCheckUtils]: 290: Hoare triple {660590#true} call #t~ret864.base, #t~ret864.offset := ldv_zalloc(48); {660590#true} is VALID [2018-11-19 18:52:11,253 INFO L273 TraceCheckUtils]: 291: Hoare triple {660590#true} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660590#true} is VALID [2018-11-19 18:52:11,253 INFO L273 TraceCheckUtils]: 292: Hoare triple {660590#true} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660590#true} is VALID [2018-11-19 18:52:11,253 INFO L273 TraceCheckUtils]: 293: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,253 INFO L268 TraceCheckUtils]: 294: Hoare quadruple {660590#true} {660590#true} #2625#return; {660590#true} is VALID [2018-11-19 18:52:11,253 INFO L273 TraceCheckUtils]: 295: Hoare triple {660590#true} ~tmp___0~20.base, ~tmp___0~20.offset := #t~ret864.base, #t~ret864.offset;havoc #t~ret864.base, #t~ret864.offset;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := ~tmp___0~20.base, ~tmp___0~20.offset; {660590#true} is VALID [2018-11-19 18:52:11,253 INFO L273 TraceCheckUtils]: 296: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,254 INFO L268 TraceCheckUtils]: 297: Hoare quadruple {660590#true} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3047#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,256 INFO L273 TraceCheckUtils]: 298: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !(0 != ~ldv_retval_4~0); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,256 INFO L273 TraceCheckUtils]: 299: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,260 INFO L273 TraceCheckUtils]: 300: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,260 INFO L273 TraceCheckUtils]: 301: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,263 INFO L273 TraceCheckUtils]: 302: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,264 INFO L273 TraceCheckUtils]: 303: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,264 INFO L273 TraceCheckUtils]: 304: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,265 INFO L273 TraceCheckUtils]: 305: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,265 INFO L273 TraceCheckUtils]: 306: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,269 INFO L273 TraceCheckUtils]: 307: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume #t~switch909; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,269 INFO L273 TraceCheckUtils]: 308: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,270 INFO L273 TraceCheckUtils]: 309: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume #t~switch937; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,270 INFO L273 TraceCheckUtils]: 310: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 1 == ~ldv_state_variable_1~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:11,271 INFO L256 TraceCheckUtils]: 311: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,272 INFO L273 TraceCheckUtils]: 312: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,272 INFO L256 TraceCheckUtils]: 313: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {660590#true} is VALID [2018-11-19 18:52:11,272 INFO L273 TraceCheckUtils]: 314: Hoare triple {660590#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {660590#true} is VALID [2018-11-19 18:52:11,273 INFO L256 TraceCheckUtils]: 315: Hoare triple {660590#true} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {660590#true} is VALID [2018-11-19 18:52:11,273 INFO L273 TraceCheckUtils]: 316: Hoare triple {660590#true} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {660590#true} is VALID [2018-11-19 18:52:11,273 INFO L256 TraceCheckUtils]: 317: Hoare triple {660590#true} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {660590#true} is VALID [2018-11-19 18:52:11,273 INFO L273 TraceCheckUtils]: 318: Hoare triple {660590#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {660590#true} is VALID [2018-11-19 18:52:11,273 INFO L273 TraceCheckUtils]: 319: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,273 INFO L268 TraceCheckUtils]: 320: Hoare quadruple {660590#true} {660590#true} #2817#return; {660590#true} is VALID [2018-11-19 18:52:11,274 INFO L273 TraceCheckUtils]: 321: Hoare triple {660590#true} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {660590#true} is VALID [2018-11-19 18:52:11,274 INFO L273 TraceCheckUtils]: 322: Hoare triple {660590#true} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {660590#true} is VALID [2018-11-19 18:52:11,274 INFO L273 TraceCheckUtils]: 323: Hoare triple {660590#true} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {660590#true} is VALID [2018-11-19 18:52:11,274 INFO L273 TraceCheckUtils]: 324: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,274 INFO L268 TraceCheckUtils]: 325: Hoare quadruple {660590#true} {660590#true} #3151#return; {660590#true} is VALID [2018-11-19 18:52:11,274 INFO L273 TraceCheckUtils]: 326: Hoare triple {660590#true} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {660590#true} is VALID [2018-11-19 18:52:11,274 INFO L273 TraceCheckUtils]: 327: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,275 INFO L268 TraceCheckUtils]: 328: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3095#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,275 INFO L273 TraceCheckUtils]: 329: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,275 INFO L256 TraceCheckUtils]: 330: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {660590#true} is VALID [2018-11-19 18:52:11,275 INFO L273 TraceCheckUtils]: 331: Hoare triple {660590#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {660590#true} is VALID [2018-11-19 18:52:11,275 INFO L256 TraceCheckUtils]: 332: Hoare triple {660590#true} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {660590#true} is VALID [2018-11-19 18:52:11,276 INFO L273 TraceCheckUtils]: 333: Hoare triple {660590#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {660590#true} is VALID [2018-11-19 18:52:11,276 INFO L256 TraceCheckUtils]: 334: Hoare triple {660590#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {660590#true} is VALID [2018-11-19 18:52:11,276 INFO L273 TraceCheckUtils]: 335: Hoare triple {660590#true} ~size := #in~size;~t := #in~t; {660590#true} is VALID [2018-11-19 18:52:11,276 INFO L256 TraceCheckUtils]: 336: Hoare triple {660590#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {660590#true} is VALID [2018-11-19 18:52:11,276 INFO L273 TraceCheckUtils]: 337: Hoare triple {660590#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {660590#true} is VALID [2018-11-19 18:52:11,276 INFO L273 TraceCheckUtils]: 338: Hoare triple {660590#true} assume !(0 != ~tmp___0~2);call #t~malloc130.base, #t~malloc130.offset := #Ultimate.alloc(~size);~tmp~8.base, ~tmp~8.offset := #t~malloc130.base, #t~malloc130.offset;~p~0.base, ~p~0.offset := ~tmp~8.base, ~tmp~8.offset;assume 0 != (if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~0.base, ~p~0.offset; {660590#true} is VALID [2018-11-19 18:52:11,276 INFO L273 TraceCheckUtils]: 339: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,276 INFO L268 TraceCheckUtils]: 340: Hoare quadruple {660590#true} {660590#true} #2691#return; {660590#true} is VALID [2018-11-19 18:52:11,276 INFO L273 TraceCheckUtils]: 341: Hoare triple {660590#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {660590#true} is VALID [2018-11-19 18:52:11,276 INFO L273 TraceCheckUtils]: 342: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,277 INFO L268 TraceCheckUtils]: 343: Hoare quadruple {660590#true} {660590#true} #2781#return; {660590#true} is VALID [2018-11-19 18:52:11,277 INFO L273 TraceCheckUtils]: 344: Hoare triple {660590#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {660590#true} is VALID [2018-11-19 18:52:11,277 INFO L273 TraceCheckUtils]: 345: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,277 INFO L268 TraceCheckUtils]: 346: Hoare quadruple {660590#true} {660590#true} #2779#return; {660590#true} is VALID [2018-11-19 18:52:11,277 INFO L273 TraceCheckUtils]: 347: Hoare triple {660590#true} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {660590#true} is VALID [2018-11-19 18:52:11,277 INFO L273 TraceCheckUtils]: 348: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,278 INFO L268 TraceCheckUtils]: 349: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3097#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,278 INFO L273 TraceCheckUtils]: 350: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,279 INFO L273 TraceCheckUtils]: 351: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,279 INFO L256 TraceCheckUtils]: 352: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {660590#true} is VALID [2018-11-19 18:52:11,279 INFO L273 TraceCheckUtils]: 353: Hoare triple {660590#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {660590#true} is VALID [2018-11-19 18:52:11,279 INFO L273 TraceCheckUtils]: 354: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,279 INFO L268 TraceCheckUtils]: 355: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3099#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,279 INFO L256 TraceCheckUtils]: 356: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {660590#true} is VALID [2018-11-19 18:52:11,280 INFO L273 TraceCheckUtils]: 357: Hoare triple {660590#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {660590#true} is VALID [2018-11-19 18:52:11,280 INFO L273 TraceCheckUtils]: 358: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,280 INFO L268 TraceCheckUtils]: 359: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3101#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,280 INFO L256 TraceCheckUtils]: 360: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {660590#true} is VALID [2018-11-19 18:52:11,280 INFO L273 TraceCheckUtils]: 361: Hoare triple {660590#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {660590#true} is VALID [2018-11-19 18:52:11,280 INFO L256 TraceCheckUtils]: 362: Hoare triple {660590#true} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {660590#true} is VALID [2018-11-19 18:52:11,280 INFO L273 TraceCheckUtils]: 363: Hoare triple {660590#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {660590#true} is VALID [2018-11-19 18:52:11,281 INFO L273 TraceCheckUtils]: 364: Hoare triple {660590#true} assume !(0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616); {660590#true} is VALID [2018-11-19 18:52:11,281 INFO L273 TraceCheckUtils]: 365: Hoare triple {660590#true} assume !(0 == ~buflen~0 % 4294967296 % 18446744073709551616); {660590#true} is VALID [2018-11-19 18:52:11,281 INFO L273 TraceCheckUtils]: 366: Hoare triple {660590#true} assume 0 != ~buflen~0 % 4294967296 % 18446744073709551616; {660590#true} is VALID [2018-11-19 18:52:11,281 INFO L273 TraceCheckUtils]: 367: Hoare triple {660590#true} ~union_desc~0.base, ~union_desc~0.offset := ~buf~0.base, ~buf~0.offset;call #t~mem642 := read~int(~union_desc~0.base, 1 + ~union_desc~0.offset, 1);#t~short644 := 36 == #t~mem642 % 256 % 4294967296; {660590#true} is VALID [2018-11-19 18:52:11,281 INFO L273 TraceCheckUtils]: 368: Hoare triple {660590#true} assume #t~short644;call #t~mem643 := read~int(~union_desc~0.base, 2 + ~union_desc~0.offset, 1);#t~short644 := 6 == #t~mem643 % 256 % 4294967296; {660590#true} is VALID [2018-11-19 18:52:11,281 INFO L273 TraceCheckUtils]: 369: Hoare triple {660590#true} assume #t~short644;havoc #t~mem643;havoc #t~mem642;havoc #t~short644;call write~$Pointer$(#t~string645.base, #t~string645.offset, ~#descriptor~3.base, ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string646.base, #t~string646.offset, ~#descriptor~3.base, 8 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string647.base, #t~string647.offset, ~#descriptor~3.base, 16 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string648.base, #t~string648.offset, ~#descriptor~3.base, 24 + ~#descriptor~3.offset, 8);call write~int(1479, ~#descriptor~3.base, 32 + ~#descriptor~3.offset, 4);call write~int(0, ~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1);call #t~mem649 := read~int(~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1); {660590#true} is VALID [2018-11-19 18:52:11,281 INFO L256 TraceCheckUtils]: 370: Hoare triple {660590#true} call #t~ret650 := ldv__builtin_expect(~bitwiseAnd(#t~mem649 % 256, 1), 0); {660590#true} is VALID [2018-11-19 18:52:11,282 INFO L273 TraceCheckUtils]: 371: Hoare triple {660590#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {660590#true} is VALID [2018-11-19 18:52:11,282 INFO L273 TraceCheckUtils]: 372: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,282 INFO L268 TraceCheckUtils]: 373: Hoare quadruple {660590#true} {660590#true} #3075#return; {660590#true} is VALID [2018-11-19 18:52:11,282 INFO L273 TraceCheckUtils]: 374: Hoare triple {660590#true} assume -9223372036854775808 <= #t~ret650 && #t~ret650 <= 9223372036854775807;~tmp~36 := #t~ret650;havoc #t~ret650;havoc #t~mem649; {660590#true} is VALID [2018-11-19 18:52:11,282 INFO L273 TraceCheckUtils]: 375: Hoare triple {660590#true} assume !(0 != ~tmp~36); {660590#true} is VALID [2018-11-19 18:52:11,282 INFO L273 TraceCheckUtils]: 376: Hoare triple {660590#true} #res.base, #res.offset := ~union_desc~0.base, ~union_desc~0.offset;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {660590#true} is VALID [2018-11-19 18:52:11,283 INFO L273 TraceCheckUtils]: 377: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,283 INFO L268 TraceCheckUtils]: 378: Hoare quadruple {660590#true} {660590#true} #3137#return; {660590#true} is VALID [2018-11-19 18:52:11,283 INFO L273 TraceCheckUtils]: 379: Hoare triple {660590#true} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {660590#true} is VALID [2018-11-19 18:52:11,283 INFO L273 TraceCheckUtils]: 380: Hoare triple {660590#true} assume !(0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616);call #t~mem658.base, #t~mem658.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem659 := read~int(~union_desc~1.base, 3 + ~union_desc~1.offset, 1);call #t~ret660.base, #t~ret660.offset := usb_ifnum_to_if(#t~mem658.base, #t~mem658.offset, #t~mem659 % 256);call write~$Pointer$(#t~ret660.base, #t~ret660.offset, ~pcu.base, 79 + ~pcu.offset, 8);havoc #t~mem659;havoc #t~ret660.base, #t~ret660.offset;havoc #t~mem658.base, #t~mem658.offset;call #t~mem661.base, #t~mem661.offset := read~$Pointer$(~pcu.base, 79 + ~pcu.offset, 8);call #t~mem662.base, #t~mem662.offset := read~$Pointer$(#t~mem661.base, 8 + #t~mem661.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem662.base, #t~mem662.offset;havoc #t~mem662.base, #t~mem662.offset;havoc #t~mem661.base, #t~mem661.offset;call #t~mem663.base, #t~mem663.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem663.base, #t~mem663.offset, ~pcu.base, 87 + ~pcu.offset, 8);havoc #t~mem663.base, #t~mem663.offset;call #t~mem664.base, #t~mem664.offset := read~$Pointer$(~pcu.base, 87 + ~pcu.offset, 8); {660590#true} is VALID [2018-11-19 18:52:11,283 INFO L256 TraceCheckUtils]: 381: Hoare triple {660590#true} call #t~ret665 := usb_endpoint_maxp(#t~mem664.base, #t~mem664.offset); {660590#true} is VALID [2018-11-19 18:52:11,283 INFO L273 TraceCheckUtils]: 382: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {660590#true} is VALID [2018-11-19 18:52:11,284 INFO L273 TraceCheckUtils]: 383: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,284 INFO L268 TraceCheckUtils]: 384: Hoare quadruple {660590#true} {660590#true} #3139#return; {660590#true} is VALID [2018-11-19 18:52:11,284 INFO L273 TraceCheckUtils]: 385: Hoare triple {660590#true} assume -2147483648 <= #t~ret665 && #t~ret665 <= 2147483647;~tmp~37 := #t~ret665;havoc #t~ret665;havoc #t~mem664.base, #t~mem664.offset;call write~int(~tmp~37, ~pcu.base, 119 + ~pcu.offset, 4);call #t~mem666.base, #t~mem666.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem667 := read~int(~union_desc~1.base, 4 + ~union_desc~1.offset, 1);call #t~ret668.base, #t~ret668.offset := usb_ifnum_to_if(#t~mem666.base, #t~mem666.offset, #t~mem667 % 256);call write~$Pointer$(#t~ret668.base, #t~ret668.offset, ~pcu.base, 123 + ~pcu.offset, 8);havoc #t~mem666.base, #t~mem666.offset;havoc #t~mem667;havoc #t~ret668.base, #t~ret668.offset;call #t~mem669.base, #t~mem669.offset := read~$Pointer$(~pcu.base, 123 + ~pcu.offset, 8);call #t~mem670.base, #t~mem670.offset := read~$Pointer$(#t~mem669.base, 8 + #t~mem669.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem670.base, #t~mem670.offset;havoc #t~mem670.base, #t~mem670.offset;havoc #t~mem669.base, #t~mem669.offset;call #t~mem671 := read~int(~alt~0.base, 4 + ~alt~0.offset, 1); {660590#true} is VALID [2018-11-19 18:52:11,284 INFO L273 TraceCheckUtils]: 386: Hoare triple {660590#true} assume !(2 != #t~mem671 % 256 % 4294967296);havoc #t~mem671;call #t~mem676.base, #t~mem676.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem676.base, #t~mem676.offset, ~pcu.base, 167 + ~pcu.offset, 8);havoc #t~mem676.base, #t~mem676.offset;call #t~mem677.base, #t~mem677.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {660590#true} is VALID [2018-11-19 18:52:11,284 INFO L256 TraceCheckUtils]: 387: Hoare triple {660590#true} call #t~ret678 := usb_endpoint_is_bulk_out(#t~mem677.base, #t~mem677.offset); {660590#true} is VALID [2018-11-19 18:52:11,284 INFO L273 TraceCheckUtils]: 388: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~4;havoc ~tmp___0~1;havoc ~tmp___1~1; {660590#true} is VALID [2018-11-19 18:52:11,284 INFO L256 TraceCheckUtils]: 389: Hoare triple {660590#true} call #t~ret25 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {660590#true} is VALID [2018-11-19 18:52:11,284 INFO L273 TraceCheckUtils]: 390: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {660590#true} is VALID [2018-11-19 18:52:11,284 INFO L273 TraceCheckUtils]: 391: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,285 INFO L268 TraceCheckUtils]: 392: Hoare quadruple {660590#true} {660590#true} #2887#return; {660590#true} is VALID [2018-11-19 18:52:11,285 INFO L273 TraceCheckUtils]: 393: Hoare triple {660590#true} assume -2147483648 <= #t~ret25 && #t~ret25 <= 2147483647;~tmp~4 := #t~ret25;havoc #t~ret25; {660590#true} is VALID [2018-11-19 18:52:11,285 INFO L273 TraceCheckUtils]: 394: Hoare triple {660590#true} assume 0 != ~tmp~4; {660590#true} is VALID [2018-11-19 18:52:11,285 INFO L256 TraceCheckUtils]: 395: Hoare triple {660590#true} call #t~ret26 := usb_endpoint_dir_out(~epd.base, ~epd.offset); {660590#true} is VALID [2018-11-19 18:52:11,285 INFO L273 TraceCheckUtils]: 396: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem21 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem21 % 256 % 256 <= 127 then #t~mem21 % 256 % 256 else #t~mem21 % 256 % 256 - 256) >= 0 then 1 else 0);havoc #t~mem21; {660590#true} is VALID [2018-11-19 18:52:11,285 INFO L273 TraceCheckUtils]: 397: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,285 INFO L268 TraceCheckUtils]: 398: Hoare quadruple {660590#true} {660590#true} #2889#return; {660590#true} is VALID [2018-11-19 18:52:11,285 INFO L273 TraceCheckUtils]: 399: Hoare triple {660590#true} assume -2147483648 <= #t~ret26 && #t~ret26 <= 2147483647;~tmp___0~1 := #t~ret26;havoc #t~ret26; {660590#true} is VALID [2018-11-19 18:52:11,285 INFO L273 TraceCheckUtils]: 400: Hoare triple {660590#true} assume 0 != ~tmp___0~1;~tmp___1~1 := 1; {660590#true} is VALID [2018-11-19 18:52:11,285 INFO L273 TraceCheckUtils]: 401: Hoare triple {660590#true} #res := ~tmp___1~1; {660590#true} is VALID [2018-11-19 18:52:11,286 INFO L273 TraceCheckUtils]: 402: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,286 INFO L268 TraceCheckUtils]: 403: Hoare quadruple {660590#true} {660590#true} #3141#return; {660590#true} is VALID [2018-11-19 18:52:11,286 INFO L273 TraceCheckUtils]: 404: Hoare triple {660590#true} assume -2147483648 <= #t~ret678 && #t~ret678 <= 2147483647;~tmp___0~16 := #t~ret678;havoc #t~mem677.base, #t~mem677.offset;havoc #t~ret678; {660590#true} is VALID [2018-11-19 18:52:11,286 INFO L273 TraceCheckUtils]: 405: Hoare triple {660590#true} assume !(0 == ~tmp___0~16);call #t~mem682.base, #t~mem682.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {660590#true} is VALID [2018-11-19 18:52:11,286 INFO L256 TraceCheckUtils]: 406: Hoare triple {660590#true} call #t~ret683 := usb_endpoint_maxp(#t~mem682.base, #t~mem682.offset); {660590#true} is VALID [2018-11-19 18:52:11,286 INFO L273 TraceCheckUtils]: 407: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {660590#true} is VALID [2018-11-19 18:52:11,286 INFO L273 TraceCheckUtils]: 408: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,286 INFO L268 TraceCheckUtils]: 409: Hoare quadruple {660590#true} {660590#true} #3143#return; {660590#true} is VALID [2018-11-19 18:52:11,286 INFO L273 TraceCheckUtils]: 410: Hoare triple {660590#true} assume -2147483648 <= #t~ret683 && #t~ret683 <= 2147483647;~tmp___1~7 := #t~ret683;havoc #t~mem682.base, #t~mem682.offset;havoc #t~ret683;call write~int(~tmp___1~7, ~pcu.base, 183 + ~pcu.offset, 4);call #t~mem684 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {660590#true} is VALID [2018-11-19 18:52:11,286 INFO L273 TraceCheckUtils]: 411: Hoare triple {660590#true} assume !(#t~mem684 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem684;call #t~mem689.base, #t~mem689.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem689.base, 63 + #t~mem689.offset, ~pcu.base, 131 + ~pcu.offset, 8);havoc #t~mem689.base, #t~mem689.offset;call #t~mem690.base, #t~mem690.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {660590#true} is VALID [2018-11-19 18:52:11,287 INFO L256 TraceCheckUtils]: 412: Hoare triple {660590#true} call #t~ret691 := usb_endpoint_is_bulk_in(#t~mem690.base, #t~mem690.offset); {660590#true} is VALID [2018-11-19 18:52:11,287 INFO L273 TraceCheckUtils]: 413: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~3;havoc ~tmp___0~0;havoc ~tmp___1~0; {660590#true} is VALID [2018-11-19 18:52:11,287 INFO L256 TraceCheckUtils]: 414: Hoare triple {660590#true} call #t~ret23 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {660590#true} is VALID [2018-11-19 18:52:11,287 INFO L273 TraceCheckUtils]: 415: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {660590#true} is VALID [2018-11-19 18:52:11,287 INFO L273 TraceCheckUtils]: 416: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,287 INFO L268 TraceCheckUtils]: 417: Hoare quadruple {660590#true} {660590#true} #2915#return; {660590#true} is VALID [2018-11-19 18:52:11,287 INFO L273 TraceCheckUtils]: 418: Hoare triple {660590#true} assume -2147483648 <= #t~ret23 && #t~ret23 <= 2147483647;~tmp~3 := #t~ret23;havoc #t~ret23; {660590#true} is VALID [2018-11-19 18:52:11,287 INFO L273 TraceCheckUtils]: 419: Hoare triple {660590#true} assume 0 != ~tmp~3; {660590#true} is VALID [2018-11-19 18:52:11,287 INFO L256 TraceCheckUtils]: 420: Hoare triple {660590#true} call #t~ret24 := usb_endpoint_dir_in(~epd.base, ~epd.offset); {660590#true} is VALID [2018-11-19 18:52:11,287 INFO L273 TraceCheckUtils]: 421: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem20 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem20 % 256 % 256 <= 127 then #t~mem20 % 256 % 256 else #t~mem20 % 256 % 256 - 256) < 0 then 1 else 0);havoc #t~mem20; {660590#true} is VALID [2018-11-19 18:52:11,288 INFO L273 TraceCheckUtils]: 422: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,288 INFO L268 TraceCheckUtils]: 423: Hoare quadruple {660590#true} {660590#true} #2917#return; {660590#true} is VALID [2018-11-19 18:52:11,288 INFO L273 TraceCheckUtils]: 424: Hoare triple {660590#true} assume -2147483648 <= #t~ret24 && #t~ret24 <= 2147483647;~tmp___0~0 := #t~ret24;havoc #t~ret24; {660590#true} is VALID [2018-11-19 18:52:11,288 INFO L273 TraceCheckUtils]: 425: Hoare triple {660590#true} assume 0 != ~tmp___0~0;~tmp___1~0 := 1; {660590#true} is VALID [2018-11-19 18:52:11,288 INFO L273 TraceCheckUtils]: 426: Hoare triple {660590#true} #res := ~tmp___1~0; {660590#true} is VALID [2018-11-19 18:52:11,288 INFO L273 TraceCheckUtils]: 427: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,288 INFO L268 TraceCheckUtils]: 428: Hoare quadruple {660590#true} {660590#true} #3145#return; {660590#true} is VALID [2018-11-19 18:52:11,288 INFO L273 TraceCheckUtils]: 429: Hoare triple {660590#true} assume -2147483648 <= #t~ret691 && #t~ret691 <= 2147483647;~tmp___2~3 := #t~ret691;havoc #t~ret691;havoc #t~mem690.base, #t~mem690.offset; {660590#true} is VALID [2018-11-19 18:52:11,288 INFO L273 TraceCheckUtils]: 430: Hoare triple {660590#true} assume !(0 == ~tmp___2~3);call #t~mem695.base, #t~mem695.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {660590#true} is VALID [2018-11-19 18:52:11,288 INFO L256 TraceCheckUtils]: 431: Hoare triple {660590#true} call #t~ret696 := usb_endpoint_maxp(#t~mem695.base, #t~mem695.offset); {660590#true} is VALID [2018-11-19 18:52:11,289 INFO L273 TraceCheckUtils]: 432: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {660590#true} is VALID [2018-11-19 18:52:11,289 INFO L273 TraceCheckUtils]: 433: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,289 INFO L268 TraceCheckUtils]: 434: Hoare quadruple {660590#true} {660590#true} #3147#return; {660590#true} is VALID [2018-11-19 18:52:11,289 INFO L273 TraceCheckUtils]: 435: Hoare triple {660590#true} assume -2147483648 <= #t~ret696 && #t~ret696 <= 2147483647;~tmp___3~2 := #t~ret696;havoc #t~ret696;havoc #t~mem695.base, #t~mem695.offset;call write~int(~tmp___3~2, ~pcu.base, 163 + ~pcu.offset, 4);call #t~mem697 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {660590#true} is VALID [2018-11-19 18:52:11,289 INFO L273 TraceCheckUtils]: 436: Hoare triple {660590#true} assume !(#t~mem697 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem697;#res := 0; {660590#true} is VALID [2018-11-19 18:52:11,289 INFO L273 TraceCheckUtils]: 437: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,290 INFO L268 TraceCheckUtils]: 438: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3103#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,290 INFO L273 TraceCheckUtils]: 439: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,290 INFO L273 TraceCheckUtils]: 440: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,291 INFO L273 TraceCheckUtils]: 441: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,291 INFO L256 TraceCheckUtils]: 442: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {660590#true} is VALID [2018-11-19 18:52:11,291 INFO L273 TraceCheckUtils]: 443: Hoare triple {660590#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {660590#true} is VALID [2018-11-19 18:52:11,291 INFO L256 TraceCheckUtils]: 444: Hoare triple {660590#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {660590#true} is VALID [2018-11-19 18:52:11,291 INFO L273 TraceCheckUtils]: 445: Hoare triple {660590#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {660590#true} is VALID [2018-11-19 18:52:11,291 INFO L273 TraceCheckUtils]: 446: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,291 INFO L268 TraceCheckUtils]: 447: Hoare quadruple {660590#true} {660590#true} #2541#return; {660590#true} is VALID [2018-11-19 18:52:11,291 INFO L273 TraceCheckUtils]: 448: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,292 INFO L268 TraceCheckUtils]: 449: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3105#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,292 INFO L273 TraceCheckUtils]: 450: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,293 INFO L256 TraceCheckUtils]: 451: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {660590#true} is VALID [2018-11-19 18:52:11,293 INFO L273 TraceCheckUtils]: 452: Hoare triple {660590#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {660590#true} is VALID [2018-11-19 18:52:11,293 INFO L256 TraceCheckUtils]: 453: Hoare triple {660590#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {660590#true} is VALID [2018-11-19 18:52:11,293 INFO L273 TraceCheckUtils]: 454: Hoare triple {660590#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {660590#true} is VALID [2018-11-19 18:52:11,293 INFO L273 TraceCheckUtils]: 455: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,293 INFO L268 TraceCheckUtils]: 456: Hoare quadruple {660590#true} {660590#true} #2541#return; {660590#true} is VALID [2018-11-19 18:52:11,293 INFO L273 TraceCheckUtils]: 457: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,294 INFO L268 TraceCheckUtils]: 458: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3107#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,294 INFO L273 TraceCheckUtils]: 459: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} havoc #t~mem837.base, #t~mem837.offset; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,295 INFO L256 TraceCheckUtils]: 460: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,296 INFO L273 TraceCheckUtils]: 461: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,296 INFO L273 TraceCheckUtils]: 462: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,297 INFO L256 TraceCheckUtils]: 463: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,298 INFO L273 TraceCheckUtils]: 464: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,298 INFO L256 TraceCheckUtils]: 465: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,299 INFO L273 TraceCheckUtils]: 466: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,299 INFO L256 TraceCheckUtils]: 467: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {660590#true} is VALID [2018-11-19 18:52:11,299 INFO L273 TraceCheckUtils]: 468: Hoare triple {660590#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {660590#true} is VALID [2018-11-19 18:52:11,299 INFO L273 TraceCheckUtils]: 469: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,300 INFO L268 TraceCheckUtils]: 470: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #2605#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,300 INFO L273 TraceCheckUtils]: 471: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,301 INFO L256 TraceCheckUtils]: 472: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret965 := ldv_undef_int(); {660590#true} is VALID [2018-11-19 18:52:11,301 INFO L273 TraceCheckUtils]: 473: Hoare triple {660590#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {660590#true} is VALID [2018-11-19 18:52:11,301 INFO L273 TraceCheckUtils]: 474: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,302 INFO L268 TraceCheckUtils]: 475: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #2607#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,302 INFO L273 TraceCheckUtils]: 476: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,303 INFO L273 TraceCheckUtils]: 477: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} assume !(0 != ~tmp___0~26); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:11,303 INFO L273 TraceCheckUtils]: 478: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {660594#(and (= |old(~usb_urb~0.offset)| |ldv_alloc_urb_#res.offset|) (= |old(~usb_urb~0.base)| |ldv_alloc_urb_#res.base|))} is VALID [2018-11-19 18:52:11,303 INFO L273 TraceCheckUtils]: 479: Hoare triple {660594#(and (= |old(~usb_urb~0.offset)| |ldv_alloc_urb_#res.offset|) (= |old(~usb_urb~0.base)| |ldv_alloc_urb_#res.base|))} assume true; {660594#(and (= |old(~usb_urb~0.offset)| |ldv_alloc_urb_#res.offset|) (= |old(~usb_urb~0.base)| |ldv_alloc_urb_#res.base|))} is VALID [2018-11-19 18:52:11,304 INFO L268 TraceCheckUtils]: 480: Hoare quadruple {660594#(and (= |old(~usb_urb~0.offset)| |ldv_alloc_urb_#res.offset|) (= |old(~usb_urb~0.base)| |ldv_alloc_urb_#res.base|))} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3135#return; {660595#(and (= |old(~usb_urb~0.base)| |ldv_usb_alloc_urb_9_#t~ret959.base|) (= |old(~usb_urb~0.offset)| |ldv_usb_alloc_urb_9_#t~ret959.offset|))} is VALID [2018-11-19 18:52:11,305 INFO L273 TraceCheckUtils]: 481: Hoare triple {660595#(and (= |old(~usb_urb~0.base)| |ldv_usb_alloc_urb_9_#t~ret959.base|) (= |old(~usb_urb~0.offset)| |ldv_usb_alloc_urb_9_#t~ret959.offset|))} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {660596#(and (= |old(~usb_urb~0.base)| |ldv_usb_alloc_urb_9_#res.base|) (= |old(~usb_urb~0.offset)| |ldv_usb_alloc_urb_9_#res.offset|))} is VALID [2018-11-19 18:52:11,305 INFO L273 TraceCheckUtils]: 482: Hoare triple {660596#(and (= |old(~usb_urb~0.base)| |ldv_usb_alloc_urb_9_#res.base|) (= |old(~usb_urb~0.offset)| |ldv_usb_alloc_urb_9_#res.offset|))} assume true; {660596#(and (= |old(~usb_urb~0.base)| |ldv_usb_alloc_urb_9_#res.base|) (= |old(~usb_urb~0.offset)| |ldv_usb_alloc_urb_9_#res.offset|))} is VALID [2018-11-19 18:52:11,306 INFO L268 TraceCheckUtils]: 483: Hoare quadruple {660596#(and (= |old(~usb_urb~0.base)| |ldv_usb_alloc_urb_9_#res.base|) (= |old(~usb_urb~0.offset)| |ldv_usb_alloc_urb_9_#res.offset|))} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #2709#return; {660597#(and (= |old(~usb_urb~0.offset)| |ims_pcu_buffers_alloc_#t~ret560.offset|) (= |old(~usb_urb~0.base)| |ims_pcu_buffers_alloc_#t~ret560.base|))} is VALID [2018-11-19 18:52:11,307 INFO L273 TraceCheckUtils]: 484: Hoare triple {660597#(and (= |old(~usb_urb~0.offset)| |ims_pcu_buffers_alloc_#t~ret560.offset|) (= |old(~usb_urb~0.base)| |ims_pcu_buffers_alloc_#t~ret560.base|))} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {660598#(and (or (not (= |ims_pcu_buffers_alloc_#t~mem561.base| 0)) (= |old(~usb_urb~0.offset)| |ims_pcu_buffers_alloc_#t~mem561.offset|) (= |ims_pcu_buffers_alloc_#t~mem561.offset| 0)) (or (= |ims_pcu_buffers_alloc_#t~mem561.base| 0) (= |old(~usb_urb~0.base)| |ims_pcu_buffers_alloc_#t~mem561.base|)))} is VALID [2018-11-19 18:52:11,309 INFO L273 TraceCheckUtils]: 485: Hoare triple {660598#(and (or (not (= |ims_pcu_buffers_alloc_#t~mem561.base| 0)) (= |old(~usb_urb~0.offset)| |ims_pcu_buffers_alloc_#t~mem561.offset|) (= |ims_pcu_buffers_alloc_#t~mem561.offset| 0)) (or (= |ims_pcu_buffers_alloc_#t~mem561.base| 0) (= |old(~usb_urb~0.base)| |ims_pcu_buffers_alloc_#t~mem561.base|)))} assume !(0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616);havoc #t~mem561.base, #t~mem561.offset;call #t~mem565.base, #t~mem565.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem566.base, #t~mem566.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem567 := read~int(#t~mem566.base, 92 + #t~mem566.offset, 4);call write~int(~bitwiseOr(#t~mem567, 4), #t~mem565.base, 92 + #t~mem565.offset, 4);havoc #t~mem565.base, #t~mem565.offset;havoc #t~mem567;havoc #t~mem566.base, #t~mem566.offset;call #t~mem568.base, #t~mem568.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem569 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call write~int(#t~mem569, #t~mem568.base, 104 + #t~mem568.offset, 8);havoc #t~mem569;havoc #t~mem568.base, #t~mem568.offset;call #t~mem570.base, #t~mem570.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem571.base, #t~mem571.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8);call #t~mem572 := read~int(#t~mem571.base, 2 + #t~mem571.offset, 1); {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,309 INFO L256 TraceCheckUtils]: 486: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} call #t~ret573 := __create_pipe(#t~mem570.base, #t~mem570.offset, #t~mem572 % 256); {660590#true} is VALID [2018-11-19 18:52:11,309 INFO L273 TraceCheckUtils]: 487: Hoare triple {660590#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~endpoint := #in~endpoint;call #t~mem123 := read~int(~dev.base, ~dev.offset, 4);#res := ~bitwiseOr(256 * #t~mem123, 32768 * ~endpoint);havoc #t~mem123; {660590#true} is VALID [2018-11-19 18:52:11,309 INFO L273 TraceCheckUtils]: 488: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,310 INFO L268 TraceCheckUtils]: 489: Hoare quadruple {660590#true} {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} #2711#return; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,311 INFO L273 TraceCheckUtils]: 490: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} ~tmp___0~15 := #t~ret573;havoc #t~mem571.base, #t~mem571.offset;havoc #t~mem570.base, #t~mem570.offset;havoc #t~mem572;havoc #t~ret573;call #t~mem574.base, #t~mem574.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem575.base, #t~mem575.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem576.base, #t~mem576.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem577 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,311 INFO L256 TraceCheckUtils]: 491: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} call ldv_usb_fill_bulk_urb_10(#t~mem574.base, #t~mem574.offset, #t~mem575.base, #t~mem575.offset, ~bitwiseOr(~tmp___0~15, 3221225600), #t~mem576.base, #t~mem576.offset, (if #t~mem577 % 4294967296 % 4294967296 <= 2147483647 then #t~mem577 % 4294967296 % 4294967296 else #t~mem577 % 4294967296 % 4294967296 - 4294967296), #funAddr~ims_pcu_irq.base, #funAddr~ims_pcu_irq.offset, ~pcu.base, ~pcu.offset); {660590#true} is VALID [2018-11-19 18:52:11,311 INFO L273 TraceCheckUtils]: 492: Hoare triple {660590#true} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset;~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~pipe := #in~pipe;~transfer_buffer.base, ~transfer_buffer.offset := #in~transfer_buffer.base, #in~transfer_buffer.offset;~buffer_length := #in~buffer_length;~complete_fn.base, ~complete_fn.offset := #in~complete_fn.base, #in~complete_fn.offset;~context.base, ~context.offset := #in~context.base, #in~context.offset; {660590#true} is VALID [2018-11-19 18:52:11,311 INFO L256 TraceCheckUtils]: 493: Hoare triple {660590#true} call ldv_fill_bulk_urb(~urb.base, ~urb.offset, ~complete_fn.base, ~complete_fn.offset); {660590#true} is VALID [2018-11-19 18:52:11,311 INFO L273 TraceCheckUtils]: 494: Hoare triple {660590#true} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset;~complete_fn.base, ~complete_fn.offset := #in~complete_fn.base, #in~complete_fn.offset; {660590#true} is VALID [2018-11-19 18:52:11,311 INFO L273 TraceCheckUtils]: 495: Hoare triple {660590#true} assume (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616 == (~urb.base + ~urb.offset) % 18446744073709551616;~completeFnBulk~0.base, ~completeFnBulk~0.offset := ~complete_fn.base, ~complete_fn.offset;~completeFnBulkCounter~0 := 1 + ~completeFnBulkCounter~0; {660590#true} is VALID [2018-11-19 18:52:11,312 INFO L273 TraceCheckUtils]: 496: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,312 INFO L268 TraceCheckUtils]: 497: Hoare quadruple {660590#true} {660590#true} #2587#return; {660590#true} is VALID [2018-11-19 18:52:11,312 INFO L273 TraceCheckUtils]: 498: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,313 INFO L268 TraceCheckUtils]: 499: Hoare quadruple {660590#true} {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} #2713#return; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,313 INFO L273 TraceCheckUtils]: 500: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} havoc #t~mem574.base, #t~mem574.offset;havoc #t~mem575.base, #t~mem575.offset;havoc #t~mem576.base, #t~mem576.offset;havoc #t~mem577;call #t~mem578 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,313 INFO L256 TraceCheckUtils]: 501: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} call #t~ret579.base, #t~ret579.offset := kmalloc(#t~mem578, 208); {660590#true} is VALID [2018-11-19 18:52:11,314 INFO L273 TraceCheckUtils]: 502: Hoare triple {660590#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {660590#true} is VALID [2018-11-19 18:52:11,314 INFO L256 TraceCheckUtils]: 503: Hoare triple {660590#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {660590#true} is VALID [2018-11-19 18:52:11,314 INFO L273 TraceCheckUtils]: 504: Hoare triple {660590#true} ~size := #in~size;~t := #in~t; {660590#true} is VALID [2018-11-19 18:52:11,314 INFO L256 TraceCheckUtils]: 505: Hoare triple {660590#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {660590#true} is VALID [2018-11-19 18:52:11,314 INFO L273 TraceCheckUtils]: 506: Hoare triple {660590#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {660590#true} is VALID [2018-11-19 18:52:11,314 INFO L273 TraceCheckUtils]: 507: Hoare triple {660590#true} assume !(0 != ~tmp___0~2);call #t~malloc130.base, #t~malloc130.offset := #Ultimate.alloc(~size);~tmp~8.base, ~tmp~8.offset := #t~malloc130.base, #t~malloc130.offset;~p~0.base, ~p~0.offset := ~tmp~8.base, ~tmp~8.offset;assume 0 != (if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~0.base, ~p~0.offset; {660590#true} is VALID [2018-11-19 18:52:11,314 INFO L273 TraceCheckUtils]: 508: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,314 INFO L268 TraceCheckUtils]: 509: Hoare quadruple {660590#true} {660590#true} #2691#return; {660590#true} is VALID [2018-11-19 18:52:11,314 INFO L273 TraceCheckUtils]: 510: Hoare triple {660590#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {660590#true} is VALID [2018-11-19 18:52:11,314 INFO L273 TraceCheckUtils]: 511: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,315 INFO L268 TraceCheckUtils]: 512: Hoare quadruple {660590#true} {660590#true} #2781#return; {660590#true} is VALID [2018-11-19 18:52:11,315 INFO L273 TraceCheckUtils]: 513: Hoare triple {660590#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {660590#true} is VALID [2018-11-19 18:52:11,315 INFO L273 TraceCheckUtils]: 514: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,315 INFO L268 TraceCheckUtils]: 515: Hoare quadruple {660590#true} {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} #2715#return; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,316 INFO L273 TraceCheckUtils]: 516: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} ~tmp___1~6.base, ~tmp___1~6.offset := #t~ret579.base, #t~ret579.offset;havoc #t~mem578;havoc #t~ret579.base, #t~ret579.offset;call write~$Pointer$(~tmp___1~6.base, ~tmp___1~6.offset, ~pcu.base, 175 + ~pcu.offset, 8);call #t~mem580.base, #t~mem580.offset := read~$Pointer$(~pcu.base, 175 + ~pcu.offset, 8); {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,316 INFO L273 TraceCheckUtils]: 517: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} assume !(0 == (#t~mem580.base + #t~mem580.offset) % 18446744073709551616);havoc #t~mem580.base, #t~mem580.offset;call #t~mem584.base, #t~mem584.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem585 := read~int(~pcu.base, 119 + ~pcu.offset, 4);call #t~ret586.base, #t~ret586.offset := usb_alloc_coherent(#t~mem584.base, #t~mem584.offset, #t~mem585, 208, ~pcu.base, 111 + ~pcu.offset);~tmp___2~2.base, ~tmp___2~2.offset := #t~ret586.base, #t~ret586.offset;havoc #t~ret586.base, #t~ret586.offset;havoc #t~mem585;havoc #t~mem584.base, #t~mem584.offset;call write~$Pointer$(~tmp___2~2.base, ~tmp___2~2.offset, ~pcu.base, 103 + ~pcu.offset, 8);call #t~mem587.base, #t~mem587.offset := read~$Pointer$(~pcu.base, 103 + ~pcu.offset, 8); {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,316 INFO L273 TraceCheckUtils]: 518: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} assume !(0 == (#t~mem587.base + #t~mem587.offset) % 18446744073709551616);havoc #t~mem587.base, #t~mem587.offset; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,316 INFO L256 TraceCheckUtils]: 519: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} call #t~ret591.base, #t~ret591.offset := ldv_usb_alloc_urb_11(0, 208); {660590#true} is VALID [2018-11-19 18:52:11,316 INFO L273 TraceCheckUtils]: 520: Hoare triple {660590#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~59.base, ~tmp~59.offset; {660590#true} is VALID [2018-11-19 18:52:11,316 INFO L256 TraceCheckUtils]: 521: Hoare triple {660590#true} call #t~ret960.base, #t~ret960.offset := ldv_alloc_urb(); {660590#true} is VALID [2018-11-19 18:52:11,317 INFO L273 TraceCheckUtils]: 522: Hoare triple {660590#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {660590#true} is VALID [2018-11-19 18:52:11,317 INFO L256 TraceCheckUtils]: 523: Hoare triple {660590#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {660590#true} is VALID [2018-11-19 18:52:11,317 INFO L273 TraceCheckUtils]: 524: Hoare triple {660590#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {660590#true} is VALID [2018-11-19 18:52:11,317 INFO L273 TraceCheckUtils]: 525: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,317 INFO L268 TraceCheckUtils]: 526: Hoare quadruple {660590#true} {660590#true} #2605#return; {660590#true} is VALID [2018-11-19 18:52:11,317 INFO L273 TraceCheckUtils]: 527: Hoare triple {660590#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {660590#true} is VALID [2018-11-19 18:52:11,317 INFO L256 TraceCheckUtils]: 528: Hoare triple {660590#true} call #t~ret965 := ldv_undef_int(); {660590#true} is VALID [2018-11-19 18:52:11,317 INFO L273 TraceCheckUtils]: 529: Hoare triple {660590#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {660590#true} is VALID [2018-11-19 18:52:11,317 INFO L273 TraceCheckUtils]: 530: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,317 INFO L268 TraceCheckUtils]: 531: Hoare quadruple {660590#true} {660590#true} #2607#return; {660590#true} is VALID [2018-11-19 18:52:11,318 INFO L273 TraceCheckUtils]: 532: Hoare triple {660590#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {660590#true} is VALID [2018-11-19 18:52:11,318 INFO L273 TraceCheckUtils]: 533: Hoare triple {660590#true} assume 0 != ~tmp___0~26; {660590#true} is VALID [2018-11-19 18:52:11,318 INFO L273 TraceCheckUtils]: 534: Hoare triple {660590#true} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {660590#true} is VALID [2018-11-19 18:52:11,318 INFO L273 TraceCheckUtils]: 535: Hoare triple {660590#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {660590#true} is VALID [2018-11-19 18:52:11,318 INFO L273 TraceCheckUtils]: 536: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,318 INFO L268 TraceCheckUtils]: 537: Hoare quadruple {660590#true} {660590#true} #2683#return; {660590#true} is VALID [2018-11-19 18:52:11,318 INFO L273 TraceCheckUtils]: 538: Hoare triple {660590#true} ~tmp~59.base, ~tmp~59.offset := #t~ret960.base, #t~ret960.offset;havoc #t~ret960.base, #t~ret960.offset;#res.base, #res.offset := ~tmp~59.base, ~tmp~59.offset; {660590#true} is VALID [2018-11-19 18:52:11,318 INFO L273 TraceCheckUtils]: 539: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,319 INFO L268 TraceCheckUtils]: 540: Hoare quadruple {660590#true} {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} #2717#return; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,319 INFO L273 TraceCheckUtils]: 541: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} call write~$Pointer$(#t~ret591.base, #t~ret591.offset, ~pcu.base, 95 + ~pcu.offset, 8);havoc #t~ret591.base, #t~ret591.offset;call #t~mem592.base, #t~mem592.offset := read~$Pointer$(~pcu.base, 95 + ~pcu.offset, 8); {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,319 INFO L273 TraceCheckUtils]: 542: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} assume 0 == (#t~mem592.base + #t~mem592.offset) % 18446744073709551616;havoc #t~mem592.base, #t~mem592.offset;havoc #t~nondet593;call #t~mem594.base, #t~mem594.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem594.base, #t~mem594.offset;~error~18 := -12; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,320 INFO L273 TraceCheckUtils]: 543: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} call #t~mem611.base, #t~mem611.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem612 := read~int(~pcu.base, 119 + ~pcu.offset, 4);call #t~mem613.base, #t~mem613.offset := read~$Pointer$(~pcu.base, 103 + ~pcu.offset, 8);call #t~mem614 := read~int(~pcu.base, 111 + ~pcu.offset, 8);call usb_free_coherent(#t~mem611.base, #t~mem611.offset, #t~mem612, #t~mem613.base, #t~mem613.offset, #t~mem614);havoc #t~mem612;havoc #t~mem611.base, #t~mem611.offset;havoc #t~mem614;havoc #t~mem613.base, #t~mem613.offset; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,320 INFO L273 TraceCheckUtils]: 544: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} call #t~mem615.base, #t~mem615.offset := read~$Pointer$(~pcu.base, 175 + ~pcu.offset, 8);call kfree(#t~mem615.base, #t~mem615.offset);havoc #t~mem615.base, #t~mem615.offset; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,320 INFO L273 TraceCheckUtils]: 545: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} call #t~mem616.base, #t~mem616.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,320 INFO L256 TraceCheckUtils]: 546: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} call ldv_usb_free_urb_13(#t~mem616.base, #t~mem616.offset); {660590#true} is VALID [2018-11-19 18:52:11,320 INFO L273 TraceCheckUtils]: 547: Hoare triple {660590#true} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset; {660590#true} is VALID [2018-11-19 18:52:11,321 INFO L256 TraceCheckUtils]: 548: Hoare triple {660590#true} call ldv_free_urb(~urb.base, ~urb.offset); {660590#true} is VALID [2018-11-19 18:52:11,321 INFO L273 TraceCheckUtils]: 549: Hoare triple {660590#true} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset; {660590#true} is VALID [2018-11-19 18:52:11,321 INFO L273 TraceCheckUtils]: 550: Hoare triple {660590#true} assume !((~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616 == (~urb.base + ~urb.offset) % 18446744073709551616 && 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {660590#true} is VALID [2018-11-19 18:52:11,321 INFO L273 TraceCheckUtils]: 551: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,321 INFO L268 TraceCheckUtils]: 552: Hoare quadruple {660590#true} {660590#true} #2695#return; {660590#true} is VALID [2018-11-19 18:52:11,321 INFO L273 TraceCheckUtils]: 553: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,321 INFO L268 TraceCheckUtils]: 554: Hoare quadruple {660590#true} {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} #2723#return; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,322 INFO L273 TraceCheckUtils]: 555: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} havoc #t~mem616.base, #t~mem616.offset; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,322 INFO L273 TraceCheckUtils]: 556: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,322 INFO L273 TraceCheckUtils]: 557: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} assume true; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,323 INFO L268 TraceCheckUtils]: 558: Hoare quadruple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3109#return; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,323 INFO L273 TraceCheckUtils]: 559: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,324 INFO L273 TraceCheckUtils]: 560: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} assume 0 != ~error~25; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,324 INFO L273 TraceCheckUtils]: 561: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,324 INFO L273 TraceCheckUtils]: 562: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,325 INFO L273 TraceCheckUtils]: 563: Hoare triple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} assume true; {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} is VALID [2018-11-19 18:52:11,326 INFO L268 TraceCheckUtils]: 564: Hoare quadruple {660599#(or (not (= |old(~usb_urb~0.base)| 0)) (not (= |old(~usb_urb~0.offset)| 0)))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3015#return; {660591#false} is VALID [2018-11-19 18:52:11,326 INFO L273 TraceCheckUtils]: 565: Hoare triple {660591#false} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {660591#false} is VALID [2018-11-19 18:52:11,326 INFO L273 TraceCheckUtils]: 566: Hoare triple {660591#false} assume !(0 == ~ldv_retval_3~0); {660591#false} is VALID [2018-11-19 18:52:11,326 INFO L273 TraceCheckUtils]: 567: Hoare triple {660591#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:11,326 INFO L273 TraceCheckUtils]: 568: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:11,327 INFO L273 TraceCheckUtils]: 569: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:11,327 INFO L273 TraceCheckUtils]: 570: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:11,327 INFO L273 TraceCheckUtils]: 571: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:11,327 INFO L273 TraceCheckUtils]: 572: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:11,327 INFO L273 TraceCheckUtils]: 573: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:11,327 INFO L273 TraceCheckUtils]: 574: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:11,328 INFO L273 TraceCheckUtils]: 575: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:11,328 INFO L273 TraceCheckUtils]: 576: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:11,328 INFO L273 TraceCheckUtils]: 577: Hoare triple {660591#false} assume #t~switch909; {660591#false} is VALID [2018-11-19 18:52:11,328 INFO L273 TraceCheckUtils]: 578: Hoare triple {660591#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {660591#false} is VALID [2018-11-19 18:52:11,328 INFO L273 TraceCheckUtils]: 579: Hoare triple {660591#false} assume #t~switch947; {660591#false} is VALID [2018-11-19 18:52:11,328 INFO L273 TraceCheckUtils]: 580: Hoare triple {660591#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {660591#false} is VALID [2018-11-19 18:52:11,329 INFO L256 TraceCheckUtils]: 581: Hoare triple {660591#false} call ims_pcu_driver_exit(); {660590#true} is VALID [2018-11-19 18:52:11,329 INFO L256 TraceCheckUtils]: 582: Hoare triple {660590#true} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {660590#true} is VALID [2018-11-19 18:52:11,329 INFO L273 TraceCheckUtils]: 583: Hoare triple {660590#true} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {660590#true} is VALID [2018-11-19 18:52:11,329 INFO L273 TraceCheckUtils]: 584: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,329 INFO L268 TraceCheckUtils]: 585: Hoare quadruple {660590#true} {660590#true} #2597#return; {660590#true} is VALID [2018-11-19 18:52:11,329 INFO L273 TraceCheckUtils]: 586: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:11,329 INFO L268 TraceCheckUtils]: 587: Hoare quadruple {660590#true} {660591#false} #3033#return; {660591#false} is VALID [2018-11-19 18:52:11,329 INFO L273 TraceCheckUtils]: 588: Hoare triple {660591#false} ~ldv_state_variable_0~0 := 2; {660591#false} is VALID [2018-11-19 18:52:11,329 INFO L256 TraceCheckUtils]: 589: Hoare triple {660591#false} call ldv_check_final_state(); {660591#false} is VALID [2018-11-19 18:52:11,330 INFO L273 TraceCheckUtils]: 590: Hoare triple {660591#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {660591#false} is VALID [2018-11-19 18:52:11,330 INFO L256 TraceCheckUtils]: 591: Hoare triple {660591#false} call ldv_error(); {660591#false} is VALID [2018-11-19 18:52:11,330 INFO L273 TraceCheckUtils]: 592: Hoare triple {660591#false} assume !false; {660591#false} is VALID [2018-11-19 18:52:11,570 INFO L134 CoverageAnalysis]: Checked inductivity of 2762 backedges. 22 proven. 9 refuted. 0 times theorem prover too weak. 2731 trivial. 0 not checked. [2018-11-19 18:52:11,571 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-19 18:52:11,571 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-19 18:52:11,585 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 18:52:18,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:52:19,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 18:52:19,148 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-19 18:52:20,028 INFO L256 TraceCheckUtils]: 0: Hoare triple {660590#true} call ULTIMATE.init(); {660590#true} is VALID [2018-11-19 18:52:20,094 INFO L273 TraceCheckUtils]: 1: Hoare triple {660590#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string57.base, #t~string57.offset := #Ultimate.alloc(9);call #t~string91.base, #t~string91.offset := #Ultimate.alloc(10);call #t~string162.base, #t~string162.offset := #Ultimate.alloc(38);call #t~string193.base, #t~string193.offset := #Ultimate.alloc(42);call #t~string195.base, #t~string195.offset := #Ultimate.alloc(28);call #t~string199.base, #t~string199.offset := #Ultimate.alloc(8);call #t~string208.base, #t~string208.offset := #Ultimate.alloc(45);call #t~string216.base, #t~string216.offset := #Ultimate.alloc(38);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(29);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(8);call #t~string229.base, #t~string229.offset := #Ultimate.alloc(45);call #t~string257.base, #t~string257.offset := #Ultimate.alloc(48);call #t~string262.base, #t~string262.offset := #Ultimate.alloc(44);call #t~string267.base, #t~string267.offset := #Ultimate.alloc(49);call #t~string280.base, #t~string280.offset := #Ultimate.alloc(8);call #t~string281.base, #t~string281.offset := #Ultimate.alloc(23);call #t~string282.base, #t~string282.offset := #Ultimate.alloc(220);call #t~string283.base, #t~string283.offset := #Ultimate.alloc(47);call #t~string288.base, #t~string288.offset := #Ultimate.alloc(47);call #t~string318.base, #t~string318.offset := #Ultimate.alloc(8);call #t~string319.base, #t~string319.offset := #Ultimate.alloc(26);call #t~string320.base, #t~string320.offset := #Ultimate.alloc(220);call #t~string321.base, #t~string321.offset := #Ultimate.alloc(26);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(26);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(62);call #t~string338.base, #t~string338.offset := #Ultimate.alloc(60);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(36);call #t~string359.base, #t~string359.offset := #Ultimate.alloc(48);call #t~string363.base, #t~string363.offset := #Ultimate.alloc(61);call #t~string369.base, #t~string369.offset := #Ultimate.alloc(55);call #t~string376.base, #t~string376.offset := #Ultimate.alloc(58);call #t~string381.base, #t~string381.offset := #Ultimate.alloc(37);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(46);call #t~string395.base, #t~string395.offset := #Ultimate.alloc(52);call #t~string404.base, #t~string404.offset := #Ultimate.alloc(44);call #t~string407.base, #t~string407.offset := #Ultimate.alloc(33);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(10);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(46);call #t~string417.base, #t~string417.offset := #Ultimate.alloc(23);call #t~string420.base, #t~string420.offset := #Ultimate.alloc(27);call #t~string421.base, #t~string421.offset := #Ultimate.alloc(10);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(24);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(10);call #t~string432.base, #t~string432.offset := #Ultimate.alloc(48);call #t~string437.base, #t~string437.offset := #Ultimate.alloc(45);call #t~string440.base, #t~string440.offset := #Ultimate.alloc(19);call #t~string442.base, #t~string442.offset := #Ultimate.alloc(21);call #t~string448.base, #t~string448.offset := #Ultimate.alloc(52);call #t~string453.base, #t~string453.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string453.base,#t~string453.offset := 37];#memory_int := #memory_int[#t~string453.base,1 + #t~string453.offset := 46];#memory_int := #memory_int[#t~string453.base,2 + #t~string453.offset := 42];#memory_int := #memory_int[#t~string453.base,3 + #t~string453.offset := 115];#memory_int := #memory_int[#t~string453.base,4 + #t~string453.offset := 10];#memory_int := #memory_int[#t~string453.base,5 + #t~string453.offset := 0];call #t~string468.base, #t~string468.offset := #Ultimate.alloc(12);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(14);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(22);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(11);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(11);call #t~string473.base, #t~string473.offset := #Ultimate.alloc(13);call #t~string479.base, #t~string479.offset := #Ultimate.alloc(28);call #t~string483.base, #t~string483.offset := #Ultimate.alloc(35);call #t~string484.base, #t~string484.offset := #Ultimate.alloc(13);call #t~string489.base, #t~string489.offset := #Ultimate.alloc(10);call #t~string494.base, #t~string494.offset := #Ultimate.alloc(42);call #t~string495.base, #t~string495.offset := #Ultimate.alloc(10);call #t~string502.base, #t~string502.offset := #Ultimate.alloc(16);call #t~string505.base, #t~string505.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string505.base,#t~string505.offset := 37];#memory_int := #memory_int[#t~string505.base,1 + #t~string505.offset := 100];#memory_int := #memory_int[#t~string505.base,2 + #t~string505.offset := 10];#memory_int := #memory_int[#t~string505.base,3 + #t~string505.offset := 0];call #t~string507.base, #t~string507.offset := #Ultimate.alloc(23);call #t~string514.base, #t~string514.offset := #Ultimate.alloc(8);call #t~string515.base, #t~string515.offset := #Ultimate.alloc(12);call #t~string516.base, #t~string516.offset := #Ultimate.alloc(220);call #t~string517.base, #t~string517.offset := #Ultimate.alloc(40);call #t~string522.base, #t~string522.offset := #Ultimate.alloc(40);call #t~string523.base, #t~string523.offset := #Ultimate.alloc(12);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(8);call #t~string525.base, #t~string525.offset := #Ultimate.alloc(12);call #t~string526.base, #t~string526.offset := #Ultimate.alloc(220);call #t~string527.base, #t~string527.offset := #Ultimate.alloc(38);call #t~string532.base, #t~string532.offset := #Ultimate.alloc(38);call #t~string533.base, #t~string533.offset := #Ultimate.alloc(12);call #t~string534.base, #t~string534.offset := #Ultimate.alloc(8);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(12);call #t~string536.base, #t~string536.offset := #Ultimate.alloc(220);call #t~string537.base, #t~string537.offset := #Ultimate.alloc(23);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(23);call #t~string543.base, #t~string543.offset := #Ultimate.alloc(12);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(43);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(12);call #t~string559.base, #t~string559.offset := #Ultimate.alloc(43);call #t~string564.base, #t~string564.offset := #Ultimate.alloc(30);call #t~string583.base, #t~string583.offset := #Ultimate.alloc(44);call #t~string590.base, #t~string590.offset := #Ultimate.alloc(43);call #t~string595.base, #t~string595.offset := #Ultimate.alloc(30);call #t~string639.base, #t~string639.offset := #Ultimate.alloc(25);call #t~string641.base, #t~string641.offset := #Ultimate.alloc(24);call #t~string645.base, #t~string645.offset := #Ultimate.alloc(8);call #t~string646.base, #t~string646.offset := #Ultimate.alloc(27);call #t~string647.base, #t~string647.offset := #Ultimate.alloc(220);call #t~string648.base, #t~string648.offset := #Ultimate.alloc(20);call #t~string652.base, #t~string652.offset := #Ultimate.alloc(20);call #t~string656.base, #t~string656.offset := #Ultimate.alloc(30);call #t~string674.base, #t~string674.offset := #Ultimate.alloc(54);call #t~string681.base, #t~string681.offset := #Ultimate.alloc(50);call #t~string687.base, #t~string687.offset := #Ultimate.alloc(40);call #t~string694.base, #t~string694.offset := #Ultimate.alloc(50);call #t~string700.base, #t~string700.offset := #Ultimate.alloc(39);call #t~string706.base, #t~string706.offset := #Ultimate.alloc(68);call #t~string711.base, #t~string711.offset := #Ultimate.alloc(60);call #t~string725.base, #t~string725.offset := #Ultimate.alloc(38);call #t~string733.base, #t~string733.offset := #Ultimate.alloc(37);call #t~string738.base, #t~string738.offset := #Ultimate.alloc(42);call #t~string740.base, #t~string740.offset := #Ultimate.alloc(22);call #t~string750.base, #t~string750.offset := #Ultimate.alloc(42);call #t~string752.base, #t~string752.offset := #Ultimate.alloc(22);call #t~string762.base, #t~string762.offset := #Ultimate.alloc(40);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(5);#memory_int := #memory_int[#t~string764.base,#t~string764.offset := 37];#memory_int := #memory_int[#t~string764.base,1 + #t~string764.offset := 48];#memory_int := #memory_int[#t~string764.base,2 + #t~string764.offset := 50];#memory_int := #memory_int[#t~string764.base,3 + #t~string764.offset := 120];#memory_int := #memory_int[#t~string764.base,4 + #t~string764.offset := 0];call #t~string766.base, #t~string766.offset := #Ultimate.alloc(8);call #t~string767.base, #t~string767.offset := #Ultimate.alloc(24);call #t~string768.base, #t~string768.offset := #Ultimate.alloc(220);call #t~string769.base, #t~string769.offset := #Ultimate.alloc(50);call #t~string774.base, #t~string774.offset := #Ultimate.alloc(50);call #t~string778.base, #t~string778.offset := #Ultimate.alloc(41);call #t~string780.base, #t~string780.offset := #Ultimate.alloc(8);call #t~string781.base, #t~string781.offset := #Ultimate.alloc(22);call #t~string782.base, #t~string782.offset := #Ultimate.alloc(220);call #t~string783.base, #t~string783.offset := #Ultimate.alloc(24);call #t~string788.base, #t~string788.offset := #Ultimate.alloc(24);call #t~string794.base, #t~string794.offset := #Ultimate.alloc(38);call #t~string801.base, #t~string801.offset := #Ultimate.alloc(27);call #t~string816.base, #t~string816.offset := #Ultimate.alloc(39);call #t~string821.base, #t~string821.offset := #Ultimate.alloc(72);call #t~string824.base, #t~string824.offset := #Ultimate.alloc(10);call #t~string830.base, #t~string830.offset := #Ultimate.alloc(16);call #t~string835.base, #t~string835.offset := #Ultimate.alloc(50);call #t~string858.base, #t~string858.offset := #Ultimate.alloc(8);call #t~string859.base, #t~string859.offset := #Ultimate.alloc(8);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;call ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_1~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);call ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := #Ultimate.alloc(14);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_2~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);call ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_3~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);call ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := #Ultimate.alloc(38);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_4~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~unchecked~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);call ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := #Ultimate.alloc(8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_keymap_5~0.base);call write~unchecked~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~unchecked~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;call ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := #Ultimate.alloc(78);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_device_info~0.base);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_device_info~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 12 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 13 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 21 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 26 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(7, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 38 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 39 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 47 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 52 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(19, ~#ims_pcu_device_info~0.base, 60 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(1, ~#ims_pcu_device_info~0.base, 64 + ~#ims_pcu_device_info~0.offset, 1);call write~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 65 + ~#ims_pcu_device_info~0.offset, 8);call write~unchecked~int(4, ~#ims_pcu_device_info~0.base, 73 + ~#ims_pcu_device_info~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_device_info~0.base, 77 + ~#ims_pcu_device_info~0.offset, 1);call ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_part_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~$Pointer$(#t~string468.base, #t~string468.offset, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~unchecked~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 4);call write~unchecked~int(15, ~#ims_pcu_attr_part_number~0.base, 47 + ~#ims_pcu_attr_part_number~0.offset, 4);call ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_serial_number~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~$Pointer$(#t~string469.base, #t~string469.offset, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~unchecked~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_serial_number~0.base, 47 + ~#ims_pcu_attr_serial_number~0.offset, 4);call ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_date_of_manufacturing~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~$Pointer$(#t~string470.base, #t~string470.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~unchecked~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call write~unchecked~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 47 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);call ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_fw_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~$Pointer$(#t~string471.base, #t~string471.offset, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~unchecked~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_fw_version~0.base, 47 + ~#ims_pcu_attr_fw_version~0.offset, 4);call ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_bl_version~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~$Pointer$(#t~string472.base, #t~string472.offset, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~unchecked~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 4);call write~unchecked~int(10, ~#ims_pcu_attr_bl_version~0.base, 47 + ~#ims_pcu_attr_bl_version~0.offset, 4);call ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := #Ultimate.alloc(51);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_attr_reset_reason~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~$Pointer$(#t~string473.base, #t~string473.offset, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~unchecked~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call write~unchecked~int(3, ~#ims_pcu_attr_reset_reason~0.base, 47 + ~#ims_pcu_attr_reset_reason~0.offset, 4);call ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_reset_device~0.base);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#t~string484.base, #t~string484.offset, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);call ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#t~string502.base, #t~string502.offset, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);call ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := #Ultimate.alloc(43);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#dev_attr_update_firmware_status~0.base);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(#t~string507.base, #t~string507.offset, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~unchecked~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);call ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := #Ultimate.alloc(80);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_attrs~0.base);call write~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);call ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);call ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := #Ultimate.alloc(75);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#ims_pcu_id_table~0.base);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~unchecked~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~unchecked~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := #Ultimate.alloc(285);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ims_pcu_driver~0.base);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(#t~string858.base, #t~string858.offset, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~unchecked~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,096 INFO L273 TraceCheckUtils]: 2: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,097 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660590#true} #3175#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,097 INFO L256 TraceCheckUtils]: 4: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret973 := main(); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,098 INFO L273 TraceCheckUtils]: 5: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} havoc ~ldvarg1~0;havoc ~tmp~54;havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~25.base, ~tmp___0~25.offset;havoc ~ldvarg2~0.base, ~ldvarg2~0.offset;havoc ~tmp___1~9.base, ~tmp___1~9.offset;havoc ~ldvarg4~0;havoc ~tmp___2~5;havoc ~ldvarg3~0.base, ~ldvarg3~0.offset;havoc ~tmp___3~3.base, ~tmp___3~3.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___4~1.base, ~tmp___4~1.offset;havoc ~ldvarg8~0.base, ~ldvarg8~0.offset;havoc ~tmp___5~1.base, ~tmp___5~1.offset;havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___6~1.base, ~tmp___6~1.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___7~1.base, ~tmp___7~1.offset;havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp___8~1.base, ~tmp___8~1.offset;havoc ~ldvarg10~0;havoc ~tmp___9~1;havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___10~1.base, ~tmp___10~1.offset;havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___11~1.base, ~tmp___11~1.offset;havoc ~ldvarg13~0;havoc ~tmp___12~1;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___13~1.base, ~tmp___13~1.offset;havoc ~ldvarg17~0.base, ~ldvarg17~0.offset;havoc ~tmp___14~0.base, ~tmp___14~0.offset;havoc ~ldvarg16~0;havoc ~tmp___15~0;havoc ~ldvarg15~0.base, ~ldvarg15~0.offset;havoc ~tmp___16~0.base, ~tmp___16~0.offset;havoc ~ldvarg18~0.base, ~ldvarg18~0.offset;havoc ~tmp___17~0.base, ~tmp___17~0.offset;havoc ~ldvarg20~0.base, ~ldvarg20~0.offset;havoc ~tmp___18~0.base, ~tmp___18~0.offset;havoc ~ldvarg19~0;havoc ~tmp___19~0;call ~#ldvarg21~0.base, ~#ldvarg21~0.offset := #Ultimate.alloc(4);havoc ~ldvarg22~0.base, ~ldvarg22~0.offset;havoc ~tmp___20~0.base, ~tmp___20~0.offset;havoc ~ldvarg24~0.base, ~ldvarg24~0.offset;havoc ~tmp___21~0.base, ~tmp___21~0.offset;havoc ~ldvarg26~0.base, ~ldvarg26~0.offset;havoc ~tmp___22~0.base, ~tmp___22~0.offset;havoc ~ldvarg25~0.base, ~ldvarg25~0.offset;havoc ~tmp___23~0.base, ~tmp___23~0.offset;havoc ~ldvarg23~0;havoc ~tmp___24~0;havoc ~ldvarg27~0.base, ~ldvarg27~0.offset;havoc ~tmp___25~0.base, ~tmp___25~0.offset;havoc ~ldvarg29~0.base, ~ldvarg29~0.offset;havoc ~tmp___26~0.base, ~tmp___26~0.offset;havoc ~ldvarg28~0;havoc ~tmp___27~0;havoc ~ldvarg32~0.base, ~ldvarg32~0.offset;havoc ~tmp___28~0.base, ~tmp___28~0.offset;havoc ~ldvarg31~0.base, ~ldvarg31~0.offset;havoc ~tmp___29~0.base, ~tmp___29~0.offset;havoc ~ldvarg33~0.base, ~ldvarg33~0.offset;havoc ~tmp___30~0.base, ~tmp___30~0.offset;havoc ~ldvarg30~0;havoc ~tmp___31~0;havoc ~tmp___32~0;havoc ~tmp___33~0;havoc ~tmp___34~0;havoc ~tmp___35~0;havoc ~tmp___36~0;havoc ~tmp___37~0;havoc ~tmp___38~0;havoc ~tmp___39~0;havoc ~tmp___40~0;havoc ~tmp___41~0;havoc ~tmp___42~0;havoc ~tmp___43~0;havoc ~tmp___44~0;assume -2147483648 <= #t~nondet874 && #t~nondet874 <= 2147483647;~tmp~54 := #t~nondet874;havoc #t~nondet874;~ldvarg1~0 := ~tmp~54; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,105 INFO L256 TraceCheckUtils]: 6: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret875.base, #t~ret875.offset := ldv_zalloc(1); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,105 INFO L273 TraceCheckUtils]: 7: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,106 INFO L273 TraceCheckUtils]: 8: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,107 INFO L273 TraceCheckUtils]: 9: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,108 INFO L268 TraceCheckUtils]: 10: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2927#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,108 INFO L273 TraceCheckUtils]: 11: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___0~25.base, ~tmp___0~25.offset := #t~ret875.base, #t~ret875.offset;havoc #t~ret875.base, #t~ret875.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~25.base, ~tmp___0~25.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,109 INFO L256 TraceCheckUtils]: 12: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret876.base, #t~ret876.offset := ldv_zalloc(1); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,110 INFO L273 TraceCheckUtils]: 13: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,110 INFO L273 TraceCheckUtils]: 14: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,111 INFO L273 TraceCheckUtils]: 15: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,112 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2929#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,112 INFO L273 TraceCheckUtils]: 17: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___1~9.base, ~tmp___1~9.offset := #t~ret876.base, #t~ret876.offset;havoc #t~ret876.base, #t~ret876.offset;~ldvarg2~0.base, ~ldvarg2~0.offset := ~tmp___1~9.base, ~tmp___1~9.offset;assume -2147483648 <= #t~nondet877 && #t~nondet877 <= 2147483647;~tmp___2~5 := #t~nondet877;havoc #t~nondet877;~ldvarg4~0 := ~tmp___2~5; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,117 INFO L256 TraceCheckUtils]: 18: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret878.base, #t~ret878.offset := ldv_zalloc(1); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,118 INFO L273 TraceCheckUtils]: 19: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,121 INFO L273 TraceCheckUtils]: 20: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,122 INFO L273 TraceCheckUtils]: 21: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,128 INFO L268 TraceCheckUtils]: 22: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2931#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,132 INFO L273 TraceCheckUtils]: 23: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___3~3.base, ~tmp___3~3.offset := #t~ret878.base, #t~ret878.offset;havoc #t~ret878.base, #t~ret878.offset;~ldvarg3~0.base, ~ldvarg3~0.offset := ~tmp___3~3.base, ~tmp___3~3.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,132 INFO L256 TraceCheckUtils]: 24: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret879.base, #t~ret879.offset := ldv_zalloc(1); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,133 INFO L273 TraceCheckUtils]: 25: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,134 INFO L273 TraceCheckUtils]: 26: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,135 INFO L273 TraceCheckUtils]: 27: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,141 INFO L268 TraceCheckUtils]: 28: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2933#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,141 INFO L273 TraceCheckUtils]: 29: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___4~1.base, ~tmp___4~1.offset := #t~ret879.base, #t~ret879.offset;havoc #t~ret879.base, #t~ret879.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___4~1.base, ~tmp___4~1.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,142 INFO L256 TraceCheckUtils]: 30: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret880.base, #t~ret880.offset := ldv_zalloc(48); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,143 INFO L273 TraceCheckUtils]: 31: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,144 INFO L273 TraceCheckUtils]: 32: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,148 INFO L273 TraceCheckUtils]: 33: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,152 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2935#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,155 INFO L273 TraceCheckUtils]: 35: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___5~1.base, ~tmp___5~1.offset := #t~ret880.base, #t~ret880.offset;havoc #t~ret880.base, #t~ret880.offset;~ldvarg8~0.base, ~ldvarg8~0.offset := ~tmp___5~1.base, ~tmp___5~1.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,155 INFO L256 TraceCheckUtils]: 36: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret881.base, #t~ret881.offset := ldv_zalloc(1); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,156 INFO L273 TraceCheckUtils]: 37: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,157 INFO L273 TraceCheckUtils]: 38: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,157 INFO L273 TraceCheckUtils]: 39: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,158 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2937#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,159 INFO L273 TraceCheckUtils]: 41: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___6~1.base, ~tmp___6~1.offset := #t~ret881.base, #t~ret881.offset;havoc #t~ret881.base, #t~ret881.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___6~1.base, ~tmp___6~1.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,159 INFO L256 TraceCheckUtils]: 42: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret882.base, #t~ret882.offset := ldv_zalloc(1376); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,160 INFO L273 TraceCheckUtils]: 43: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,161 INFO L273 TraceCheckUtils]: 44: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,161 INFO L273 TraceCheckUtils]: 45: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,162 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2939#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,163 INFO L273 TraceCheckUtils]: 47: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___7~1.base, ~tmp___7~1.offset := #t~ret882.base, #t~ret882.offset;havoc #t~ret882.base, #t~ret882.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___7~1.base, ~tmp___7~1.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,163 INFO L256 TraceCheckUtils]: 48: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret883.base, #t~ret883.offset := ldv_zalloc(1); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,164 INFO L273 TraceCheckUtils]: 49: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,165 INFO L273 TraceCheckUtils]: 50: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,170 INFO L273 TraceCheckUtils]: 51: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,170 INFO L268 TraceCheckUtils]: 52: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2941#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,171 INFO L273 TraceCheckUtils]: 53: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___8~1.base, ~tmp___8~1.offset := #t~ret883.base, #t~ret883.offset;havoc #t~ret883.base, #t~ret883.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp___8~1.base, ~tmp___8~1.offset;assume -2147483648 <= #t~nondet884 && #t~nondet884 <= 2147483647;~tmp___9~1 := #t~nondet884;havoc #t~nondet884;~ldvarg10~0 := ~tmp___9~1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,172 INFO L256 TraceCheckUtils]: 54: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret885.base, #t~ret885.offset := ldv_zalloc(1); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,172 INFO L273 TraceCheckUtils]: 55: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,173 INFO L273 TraceCheckUtils]: 56: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,173 INFO L273 TraceCheckUtils]: 57: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,174 INFO L268 TraceCheckUtils]: 58: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2943#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,174 INFO L273 TraceCheckUtils]: 59: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___10~1.base, ~tmp___10~1.offset := #t~ret885.base, #t~ret885.offset;havoc #t~ret885.base, #t~ret885.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___10~1.base, ~tmp___10~1.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,175 INFO L256 TraceCheckUtils]: 60: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret886.base, #t~ret886.offset := ldv_zalloc(1); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,176 INFO L273 TraceCheckUtils]: 61: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,176 INFO L273 TraceCheckUtils]: 62: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,177 INFO L273 TraceCheckUtils]: 63: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,177 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2945#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,178 INFO L273 TraceCheckUtils]: 65: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___11~1.base, ~tmp___11~1.offset := #t~ret886.base, #t~ret886.offset;havoc #t~ret886.base, #t~ret886.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___11~1.base, ~tmp___11~1.offset;assume -2147483648 <= #t~nondet887 && #t~nondet887 <= 2147483647;~tmp___12~1 := #t~nondet887;havoc #t~nondet887;~ldvarg13~0 := ~tmp___12~1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,178 INFO L256 TraceCheckUtils]: 66: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret888.base, #t~ret888.offset := ldv_zalloc(1); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,179 INFO L273 TraceCheckUtils]: 67: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,180 INFO L273 TraceCheckUtils]: 68: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,180 INFO L273 TraceCheckUtils]: 69: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,181 INFO L268 TraceCheckUtils]: 70: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2947#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,181 INFO L273 TraceCheckUtils]: 71: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___13~1.base, ~tmp___13~1.offset := #t~ret888.base, #t~ret888.offset;havoc #t~ret888.base, #t~ret888.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___13~1.base, ~tmp___13~1.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,182 INFO L256 TraceCheckUtils]: 72: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret889.base, #t~ret889.offset := ldv_zalloc(32); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,182 INFO L273 TraceCheckUtils]: 73: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,183 INFO L273 TraceCheckUtils]: 74: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,183 INFO L273 TraceCheckUtils]: 75: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,184 INFO L268 TraceCheckUtils]: 76: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2949#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,185 INFO L273 TraceCheckUtils]: 77: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___14~0.base, ~tmp___14~0.offset := #t~ret889.base, #t~ret889.offset;havoc #t~ret889.base, #t~ret889.offset;~ldvarg17~0.base, ~ldvarg17~0.offset := ~tmp___14~0.base, ~tmp___14~0.offset;assume -2147483648 <= #t~nondet890 && #t~nondet890 <= 2147483647;~tmp___15~0 := #t~nondet890;havoc #t~nondet890;~ldvarg16~0 := ~tmp___15~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,185 INFO L256 TraceCheckUtils]: 78: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret891.base, #t~ret891.offset := ldv_zalloc(296); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,186 INFO L273 TraceCheckUtils]: 79: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,186 INFO L273 TraceCheckUtils]: 80: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,187 INFO L273 TraceCheckUtils]: 81: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,187 INFO L268 TraceCheckUtils]: 82: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2951#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,188 INFO L273 TraceCheckUtils]: 83: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___16~0.base, ~tmp___16~0.offset := #t~ret891.base, #t~ret891.offset;havoc #t~ret891.base, #t~ret891.offset;~ldvarg15~0.base, ~ldvarg15~0.offset := ~tmp___16~0.base, ~tmp___16~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,189 INFO L256 TraceCheckUtils]: 84: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret892.base, #t~ret892.offset := ldv_zalloc(1); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,189 INFO L273 TraceCheckUtils]: 85: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,190 INFO L273 TraceCheckUtils]: 86: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,190 INFO L273 TraceCheckUtils]: 87: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,191 INFO L268 TraceCheckUtils]: 88: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2953#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,191 INFO L273 TraceCheckUtils]: 89: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___17~0.base, ~tmp___17~0.offset := #t~ret892.base, #t~ret892.offset;havoc #t~ret892.base, #t~ret892.offset;~ldvarg18~0.base, ~ldvarg18~0.offset := ~tmp___17~0.base, ~tmp___17~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,192 INFO L256 TraceCheckUtils]: 90: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret893.base, #t~ret893.offset := ldv_zalloc(1); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,192 INFO L273 TraceCheckUtils]: 91: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,193 INFO L273 TraceCheckUtils]: 92: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,193 INFO L273 TraceCheckUtils]: 93: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,194 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2955#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,195 INFO L273 TraceCheckUtils]: 95: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___18~0.base, ~tmp___18~0.offset := #t~ret893.base, #t~ret893.offset;havoc #t~ret893.base, #t~ret893.offset;~ldvarg20~0.base, ~ldvarg20~0.offset := ~tmp___18~0.base, ~tmp___18~0.offset;assume -2147483648 <= #t~nondet894 && #t~nondet894 <= 2147483647;~tmp___19~0 := #t~nondet894;havoc #t~nondet894;~ldvarg19~0 := ~tmp___19~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,195 INFO L256 TraceCheckUtils]: 96: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret895.base, #t~ret895.offset := ldv_zalloc(32); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,196 INFO L273 TraceCheckUtils]: 97: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,197 INFO L273 TraceCheckUtils]: 98: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,197 INFO L273 TraceCheckUtils]: 99: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,198 INFO L268 TraceCheckUtils]: 100: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2957#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,198 INFO L273 TraceCheckUtils]: 101: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___20~0.base, ~tmp___20~0.offset := #t~ret895.base, #t~ret895.offset;havoc #t~ret895.base, #t~ret895.offset;~ldvarg22~0.base, ~ldvarg22~0.offset := ~tmp___20~0.base, ~tmp___20~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,199 INFO L256 TraceCheckUtils]: 102: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret896.base, #t~ret896.offset := ldv_zalloc(1376); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,199 INFO L273 TraceCheckUtils]: 103: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,200 INFO L273 TraceCheckUtils]: 104: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,201 INFO L273 TraceCheckUtils]: 105: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,201 INFO L268 TraceCheckUtils]: 106: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2959#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,202 INFO L273 TraceCheckUtils]: 107: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___21~0.base, ~tmp___21~0.offset := #t~ret896.base, #t~ret896.offset;havoc #t~ret896.base, #t~ret896.offset;~ldvarg24~0.base, ~ldvarg24~0.offset := ~tmp___21~0.base, ~tmp___21~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,202 INFO L256 TraceCheckUtils]: 108: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret897.base, #t~ret897.offset := ldv_zalloc(48); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,203 INFO L273 TraceCheckUtils]: 109: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,203 INFO L273 TraceCheckUtils]: 110: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,204 INFO L273 TraceCheckUtils]: 111: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,205 INFO L268 TraceCheckUtils]: 112: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2961#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,205 INFO L273 TraceCheckUtils]: 113: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___22~0.base, ~tmp___22~0.offset := #t~ret897.base, #t~ret897.offset;havoc #t~ret897.base, #t~ret897.offset;~ldvarg26~0.base, ~ldvarg26~0.offset := ~tmp___22~0.base, ~tmp___22~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,206 INFO L256 TraceCheckUtils]: 114: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret898.base, #t~ret898.offset := ldv_zalloc(1); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,206 INFO L273 TraceCheckUtils]: 115: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,207 INFO L273 TraceCheckUtils]: 116: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,207 INFO L273 TraceCheckUtils]: 117: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,208 INFO L268 TraceCheckUtils]: 118: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2963#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,209 INFO L273 TraceCheckUtils]: 119: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___23~0.base, ~tmp___23~0.offset := #t~ret898.base, #t~ret898.offset;havoc #t~ret898.base, #t~ret898.offset;~ldvarg25~0.base, ~ldvarg25~0.offset := ~tmp___23~0.base, ~tmp___23~0.offset;assume -2147483648 <= #t~nondet899 && #t~nondet899 <= 2147483647;~tmp___24~0 := #t~nondet899;havoc #t~nondet899;~ldvarg23~0 := ~tmp___24~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,209 INFO L256 TraceCheckUtils]: 120: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret900.base, #t~ret900.offset := ldv_zalloc(1); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,210 INFO L273 TraceCheckUtils]: 121: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,210 INFO L273 TraceCheckUtils]: 122: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,211 INFO L273 TraceCheckUtils]: 123: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,211 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2965#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,212 INFO L273 TraceCheckUtils]: 125: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___25~0.base, ~tmp___25~0.offset := #t~ret900.base, #t~ret900.offset;havoc #t~ret900.base, #t~ret900.offset;~ldvarg27~0.base, ~ldvarg27~0.offset := ~tmp___25~0.base, ~tmp___25~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,212 INFO L256 TraceCheckUtils]: 126: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret901.base, #t~ret901.offset := ldv_zalloc(1); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,213 INFO L273 TraceCheckUtils]: 127: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,214 INFO L273 TraceCheckUtils]: 128: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,214 INFO L273 TraceCheckUtils]: 129: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,215 INFO L268 TraceCheckUtils]: 130: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2967#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,215 INFO L273 TraceCheckUtils]: 131: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___26~0.base, ~tmp___26~0.offset := #t~ret901.base, #t~ret901.offset;havoc #t~ret901.base, #t~ret901.offset;~ldvarg29~0.base, ~ldvarg29~0.offset := ~tmp___26~0.base, ~tmp___26~0.offset;assume -2147483648 <= #t~nondet902 && #t~nondet902 <= 2147483647;~tmp___27~0 := #t~nondet902;havoc #t~nondet902;~ldvarg28~0 := ~tmp___27~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,216 INFO L256 TraceCheckUtils]: 132: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret903.base, #t~ret903.offset := ldv_zalloc(1); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,216 INFO L273 TraceCheckUtils]: 133: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,217 INFO L273 TraceCheckUtils]: 134: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,217 INFO L273 TraceCheckUtils]: 135: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,218 INFO L268 TraceCheckUtils]: 136: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2969#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,219 INFO L273 TraceCheckUtils]: 137: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___28~0.base, ~tmp___28~0.offset := #t~ret903.base, #t~ret903.offset;havoc #t~ret903.base, #t~ret903.offset;~ldvarg32~0.base, ~ldvarg32~0.offset := ~tmp___28~0.base, ~tmp___28~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,219 INFO L256 TraceCheckUtils]: 138: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret904.base, #t~ret904.offset := ldv_zalloc(1376); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,220 INFO L273 TraceCheckUtils]: 139: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,220 INFO L273 TraceCheckUtils]: 140: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,221 INFO L273 TraceCheckUtils]: 141: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,221 INFO L268 TraceCheckUtils]: 142: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2971#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,222 INFO L273 TraceCheckUtils]: 143: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___29~0.base, ~tmp___29~0.offset := #t~ret904.base, #t~ret904.offset;havoc #t~ret904.base, #t~ret904.offset;~ldvarg31~0.base, ~ldvarg31~0.offset := ~tmp___29~0.base, ~tmp___29~0.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,223 INFO L256 TraceCheckUtils]: 144: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret905.base, #t~ret905.offset := ldv_zalloc(48); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,223 INFO L273 TraceCheckUtils]: 145: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,224 INFO L273 TraceCheckUtils]: 146: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,224 INFO L273 TraceCheckUtils]: 147: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,225 INFO L268 TraceCheckUtils]: 148: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2973#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,226 INFO L273 TraceCheckUtils]: 149: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___30~0.base, ~tmp___30~0.offset := #t~ret905.base, #t~ret905.offset;havoc #t~ret905.base, #t~ret905.offset;~ldvarg33~0.base, ~ldvarg33~0.offset := ~tmp___30~0.base, ~tmp___30~0.offset;assume -2147483648 <= #t~nondet906 && #t~nondet906 <= 2147483647;~tmp___31~0 := #t~nondet906;havoc #t~nondet906;~ldvarg30~0 := ~tmp___31~0;call ldv_initialize(); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,227 INFO L256 TraceCheckUtils]: 150: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~memset~res907.base, #t~memset~res907.offset := #Ultimate.C_memset(~#ldvarg21~0.base, ~#ldvarg21~0.offset, 0, 4); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,227 INFO L273 TraceCheckUtils]: 151: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #t~loopctr974 := 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,228 INFO L273 TraceCheckUtils]: 152: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,229 INFO L273 TraceCheckUtils]: 153: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,230 INFO L273 TraceCheckUtils]: 154: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,230 INFO L273 TraceCheckUtils]: 155: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume #t~loopctr974 < #amount;#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#ptr.base,#ptr.offset + #t~loopctr974 := 0], #memory_$Pointer$.offset[#ptr.base,#ptr.offset + #t~loopctr974 := #value % 256];#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr974 := #value];#t~loopctr974 := 1 + #t~loopctr974; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,235 INFO L273 TraceCheckUtils]: 156: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !(#t~loopctr974 < #amount); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,239 INFO L273 TraceCheckUtils]: 157: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,239 INFO L268 TraceCheckUtils]: 158: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2975#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,243 INFO L273 TraceCheckUtils]: 159: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} havoc #t~memset~res907.base, #t~memset~res907.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,244 INFO L273 TraceCheckUtils]: 160: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,244 INFO L273 TraceCheckUtils]: 161: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,245 INFO L273 TraceCheckUtils]: 162: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,246 INFO L273 TraceCheckUtils]: 163: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,246 INFO L273 TraceCheckUtils]: 164: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,247 INFO L273 TraceCheckUtils]: 165: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,248 INFO L273 TraceCheckUtils]: 166: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,248 INFO L273 TraceCheckUtils]: 167: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,249 INFO L273 TraceCheckUtils]: 168: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,250 INFO L273 TraceCheckUtils]: 169: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,250 INFO L273 TraceCheckUtils]: 170: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume #t~switch909; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,251 INFO L273 TraceCheckUtils]: 171: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,251 INFO L273 TraceCheckUtils]: 172: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch947;#t~switch947 := #t~switch947 || 1 == ~tmp___42~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,252 INFO L273 TraceCheckUtils]: 173: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume #t~switch947; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,252 INFO L273 TraceCheckUtils]: 174: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 1 == ~ldv_state_variable_0~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,253 INFO L256 TraceCheckUtils]: 175: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret948 := ims_pcu_driver_init(); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,253 INFO L273 TraceCheckUtils]: 176: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} havoc ~tmp~46; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,254 INFO L256 TraceCheckUtils]: 177: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret860 := ldv_usb_register_driver_24(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string859.base, #t~string859.offset); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,255 INFO L273 TraceCheckUtils]: 178: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~0;havoc ~tmp~62;call #t~ret963 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret963 && #t~ret963 <= 2147483647;~tmp~62 := #t~ret963;havoc #t~ret963;~ldv_func_res~0 := ~tmp~62;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,255 INFO L256 TraceCheckUtils]: 179: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call ldv_usb_driver_1(); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,256 INFO L273 TraceCheckUtils]: 180: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} havoc ~tmp~53.base, ~tmp~53.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,256 INFO L256 TraceCheckUtils]: 181: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret873.base, #t~ret873.offset := ldv_zalloc(1520); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,257 INFO L273 TraceCheckUtils]: 182: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,258 INFO L273 TraceCheckUtils]: 183: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,258 INFO L273 TraceCheckUtils]: 184: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,259 INFO L268 TraceCheckUtils]: 185: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2613#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,259 INFO L273 TraceCheckUtils]: 186: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp~53.base, ~tmp~53.offset := #t~ret873.base, #t~ret873.offset;havoc #t~ret873.base, #t~ret873.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ~tmp~53.base, ~tmp~53.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,260 INFO L273 TraceCheckUtils]: 187: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,261 INFO L268 TraceCheckUtils]: 188: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2537#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,263 INFO L273 TraceCheckUtils]: 189: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #res := ~ldv_func_res~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,263 INFO L273 TraceCheckUtils]: 190: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,264 INFO L268 TraceCheckUtils]: 191: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2777#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,265 INFO L273 TraceCheckUtils]: 192: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume -2147483648 <= #t~ret860 && #t~ret860 <= 2147483647;~tmp~46 := #t~ret860;havoc #t~ret860;#res := ~tmp~46; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,266 INFO L273 TraceCheckUtils]: 193: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,266 INFO L268 TraceCheckUtils]: 194: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3035#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,267 INFO L273 TraceCheckUtils]: 195: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume -2147483648 <= #t~ret948 && #t~ret948 <= 2147483647;~ldv_retval_4~0 := #t~ret948;havoc #t~ret948; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,267 INFO L273 TraceCheckUtils]: 196: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_10~0 := 1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,268 INFO L256 TraceCheckUtils]: 197: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call ldv_initialize_ims_pcu_attribute_10(); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,268 INFO L273 TraceCheckUtils]: 198: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} havoc ~tmp~47.base, ~tmp~47.offset;havoc ~tmp___0~19.base, ~tmp___0~19.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,269 INFO L256 TraceCheckUtils]: 199: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret861.base, #t~ret861.offset := ldv_zalloc(1376); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,269 INFO L273 TraceCheckUtils]: 200: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,270 INFO L273 TraceCheckUtils]: 201: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,270 INFO L273 TraceCheckUtils]: 202: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,271 INFO L268 TraceCheckUtils]: 203: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2807#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,272 INFO L273 TraceCheckUtils]: 204: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp~47.base, ~tmp~47.offset := #t~ret861.base, #t~ret861.offset;havoc #t~ret861.base, #t~ret861.offset;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := ~tmp~47.base, ~tmp~47.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,272 INFO L256 TraceCheckUtils]: 205: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret862.base, #t~ret862.offset := ldv_zalloc(48); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,272 INFO L273 TraceCheckUtils]: 206: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,273 INFO L273 TraceCheckUtils]: 207: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,273 INFO L273 TraceCheckUtils]: 208: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,274 INFO L268 TraceCheckUtils]: 209: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2809#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,274 INFO L273 TraceCheckUtils]: 210: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___0~19.base, ~tmp___0~19.offset := #t~ret862.base, #t~ret862.offset;havoc #t~ret862.base, #t~ret862.offset;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := ~tmp___0~19.base, ~tmp___0~19.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,275 INFO L273 TraceCheckUtils]: 211: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,275 INFO L268 TraceCheckUtils]: 212: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3037#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,275 INFO L273 TraceCheckUtils]: 213: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~ldv_state_variable_4~0 := 1;~ldv_state_variable_8~0 := 1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,276 INFO L256 TraceCheckUtils]: 214: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call ldv_initialize_ims_pcu_attribute_8(); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,276 INFO L273 TraceCheckUtils]: 215: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} havoc ~tmp~51.base, ~tmp~51.offset;havoc ~tmp___0~23.base, ~tmp___0~23.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,277 INFO L256 TraceCheckUtils]: 216: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret869.base, #t~ret869.offset := ldv_zalloc(1376); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,277 INFO L273 TraceCheckUtils]: 217: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,277 INFO L273 TraceCheckUtils]: 218: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,278 INFO L273 TraceCheckUtils]: 219: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,278 INFO L268 TraceCheckUtils]: 220: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2631#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,279 INFO L273 TraceCheckUtils]: 221: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp~51.base, ~tmp~51.offset := #t~ret869.base, #t~ret869.offset;havoc #t~ret869.base, #t~ret869.offset;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := ~tmp~51.base, ~tmp~51.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,279 INFO L256 TraceCheckUtils]: 222: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret870.base, #t~ret870.offset := ldv_zalloc(48); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,280 INFO L273 TraceCheckUtils]: 223: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,280 INFO L273 TraceCheckUtils]: 224: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,280 INFO L273 TraceCheckUtils]: 225: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,281 INFO L268 TraceCheckUtils]: 226: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2633#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,281 INFO L273 TraceCheckUtils]: 227: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___0~23.base, ~tmp___0~23.offset := #t~ret870.base, #t~ret870.offset;havoc #t~ret870.base, #t~ret870.offset;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := ~tmp___0~23.base, ~tmp___0~23.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,282 INFO L273 TraceCheckUtils]: 228: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,282 INFO L268 TraceCheckUtils]: 229: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3039#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,283 INFO L273 TraceCheckUtils]: 230: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~ldv_state_variable_2~0 := 1;~ldv_state_variable_9~0 := 1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,283 INFO L256 TraceCheckUtils]: 231: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call ldv_initialize_ims_pcu_attribute_9(); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,283 INFO L273 TraceCheckUtils]: 232: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} havoc ~tmp~49.base, ~tmp~49.offset;havoc ~tmp___0~21.base, ~tmp___0~21.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,284 INFO L256 TraceCheckUtils]: 233: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret865.base, #t~ret865.offset := ldv_zalloc(1376); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,284 INFO L273 TraceCheckUtils]: 234: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,285 INFO L273 TraceCheckUtils]: 235: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,285 INFO L273 TraceCheckUtils]: 236: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,285 INFO L268 TraceCheckUtils]: 237: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2627#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,286 INFO L273 TraceCheckUtils]: 238: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp~49.base, ~tmp~49.offset := #t~ret865.base, #t~ret865.offset;havoc #t~ret865.base, #t~ret865.offset;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := ~tmp~49.base, ~tmp~49.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,286 INFO L256 TraceCheckUtils]: 239: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret866.base, #t~ret866.offset := ldv_zalloc(48); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,287 INFO L273 TraceCheckUtils]: 240: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,287 INFO L273 TraceCheckUtils]: 241: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,288 INFO L273 TraceCheckUtils]: 242: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,288 INFO L268 TraceCheckUtils]: 243: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2629#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,289 INFO L273 TraceCheckUtils]: 244: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___0~21.base, ~tmp___0~21.offset := #t~ret866.base, #t~ret866.offset;havoc #t~ret866.base, #t~ret866.offset;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := ~tmp___0~21.base, ~tmp___0~21.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,289 INFO L273 TraceCheckUtils]: 245: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,289 INFO L268 TraceCheckUtils]: 246: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3041#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,290 INFO L273 TraceCheckUtils]: 247: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~ldv_state_variable_7~0 := 1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,290 INFO L256 TraceCheckUtils]: 248: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call ldv_initialize_ims_pcu_attribute_7(); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,291 INFO L273 TraceCheckUtils]: 249: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} havoc ~tmp~52.base, ~tmp~52.offset;havoc ~tmp___0~24.base, ~tmp___0~24.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,291 INFO L256 TraceCheckUtils]: 250: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret871.base, #t~ret871.offset := ldv_zalloc(1376); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,292 INFO L273 TraceCheckUtils]: 251: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,293 INFO L273 TraceCheckUtils]: 252: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,293 INFO L273 TraceCheckUtils]: 253: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,294 INFO L268 TraceCheckUtils]: 254: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2619#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,294 INFO L273 TraceCheckUtils]: 255: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp~52.base, ~tmp~52.offset := #t~ret871.base, #t~ret871.offset;havoc #t~ret871.base, #t~ret871.offset;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := ~tmp~52.base, ~tmp~52.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,295 INFO L256 TraceCheckUtils]: 256: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret872.base, #t~ret872.offset := ldv_zalloc(48); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,296 INFO L273 TraceCheckUtils]: 257: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,296 INFO L273 TraceCheckUtils]: 258: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,297 INFO L273 TraceCheckUtils]: 259: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,297 INFO L268 TraceCheckUtils]: 260: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2621#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,298 INFO L273 TraceCheckUtils]: 261: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___0~24.base, ~tmp___0~24.offset := #t~ret872.base, #t~ret872.offset;havoc #t~ret872.base, #t~ret872.offset;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := ~tmp___0~24.base, ~tmp___0~24.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,298 INFO L273 TraceCheckUtils]: 262: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,299 INFO L268 TraceCheckUtils]: 263: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3043#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,299 INFO L273 TraceCheckUtils]: 264: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~ldv_state_variable_3~0 := 1;~ldv_state_variable_11~0 := 1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,300 INFO L256 TraceCheckUtils]: 265: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call ldv_initialize_ims_pcu_attribute_11(); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,300 INFO L273 TraceCheckUtils]: 266: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} havoc ~tmp~50.base, ~tmp~50.offset;havoc ~tmp___0~22.base, ~tmp___0~22.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,301 INFO L256 TraceCheckUtils]: 267: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret867.base, #t~ret867.offset := ldv_zalloc(1376); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,302 INFO L273 TraceCheckUtils]: 268: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,302 INFO L273 TraceCheckUtils]: 269: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,303 INFO L273 TraceCheckUtils]: 270: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,303 INFO L268 TraceCheckUtils]: 271: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2811#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,304 INFO L273 TraceCheckUtils]: 272: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp~50.base, ~tmp~50.offset := #t~ret867.base, #t~ret867.offset;havoc #t~ret867.base, #t~ret867.offset;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := ~tmp~50.base, ~tmp~50.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,304 INFO L256 TraceCheckUtils]: 273: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret868.base, #t~ret868.offset := ldv_zalloc(48); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,305 INFO L273 TraceCheckUtils]: 274: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,306 INFO L273 TraceCheckUtils]: 275: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,306 INFO L273 TraceCheckUtils]: 276: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,307 INFO L268 TraceCheckUtils]: 277: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2813#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,307 INFO L273 TraceCheckUtils]: 278: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___0~22.base, ~tmp___0~22.offset := #t~ret868.base, #t~ret868.offset;havoc #t~ret868.base, #t~ret868.offset;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := ~tmp___0~22.base, ~tmp___0~22.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,308 INFO L273 TraceCheckUtils]: 279: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,308 INFO L268 TraceCheckUtils]: 280: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3045#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,309 INFO L273 TraceCheckUtils]: 281: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~ldv_state_variable_6~0 := 1; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,309 INFO L256 TraceCheckUtils]: 282: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call ldv_initialize_ims_pcu_attribute_6(); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,310 INFO L273 TraceCheckUtils]: 283: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} havoc ~tmp~48.base, ~tmp~48.offset;havoc ~tmp___0~20.base, ~tmp___0~20.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,310 INFO L256 TraceCheckUtils]: 284: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret863.base, #t~ret863.offset := ldv_zalloc(1376); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,311 INFO L273 TraceCheckUtils]: 285: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,312 INFO L273 TraceCheckUtils]: 286: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,312 INFO L273 TraceCheckUtils]: 287: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,313 INFO L268 TraceCheckUtils]: 288: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2623#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,313 INFO L273 TraceCheckUtils]: 289: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp~48.base, ~tmp~48.offset := #t~ret863.base, #t~ret863.offset;havoc #t~ret863.base, #t~ret863.offset;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := ~tmp~48.base, ~tmp~48.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,314 INFO L256 TraceCheckUtils]: 290: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret864.base, #t~ret864.offset := ldv_zalloc(48); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,315 INFO L273 TraceCheckUtils]: 291: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~size := #in~size;havoc ~p~1.base, ~p~1.offset;havoc ~tmp~9.base, ~tmp~9.offset;havoc ~tmp___0~3;assume -2147483648 <= #t~nondet131 && #t~nondet131 <= 2147483647;~tmp___0~3 := #t~nondet131;havoc #t~nondet131; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,315 INFO L273 TraceCheckUtils]: 292: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~tmp___0~3;#res.base, #res.offset := 0, 0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,316 INFO L273 TraceCheckUtils]: 293: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,316 INFO L268 TraceCheckUtils]: 294: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #2625#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,317 INFO L273 TraceCheckUtils]: 295: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} ~tmp___0~20.base, ~tmp___0~20.offset := #t~ret864.base, #t~ret864.offset;havoc #t~ret864.base, #t~ret864.offset;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := ~tmp___0~20.base, ~tmp___0~20.offset; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,317 INFO L273 TraceCheckUtils]: 296: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume true; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,318 INFO L268 TraceCheckUtils]: 297: Hoare quadruple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3047#return; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,318 INFO L273 TraceCheckUtils]: 298: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !(0 != ~ldv_retval_4~0); {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,319 INFO L273 TraceCheckUtils]: 299: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,320 INFO L273 TraceCheckUtils]: 300: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,320 INFO L273 TraceCheckUtils]: 301: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,321 INFO L273 TraceCheckUtils]: 302: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,321 INFO L273 TraceCheckUtils]: 303: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,322 INFO L273 TraceCheckUtils]: 304: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,323 INFO L273 TraceCheckUtils]: 305: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,323 INFO L273 TraceCheckUtils]: 306: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,324 INFO L273 TraceCheckUtils]: 307: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume #t~switch909; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,325 INFO L273 TraceCheckUtils]: 308: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= #t~nondet936 && #t~nondet936 <= 2147483647;~tmp___40~0 := #t~nondet936;havoc #t~nondet936;#t~switch937 := 0 == ~tmp___40~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,325 INFO L273 TraceCheckUtils]: 309: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume #t~switch937; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,326 INFO L273 TraceCheckUtils]: 310: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} assume 1 == ~ldv_state_variable_1~0; {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} is VALID [2018-11-19 18:52:20,328 INFO L256 TraceCheckUtils]: 311: Hoare triple {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} call #t~ret938 := ims_pcu_probe(~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset, ~ldvarg22~0.base, ~ldvarg22~0.offset); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,328 INFO L273 TraceCheckUtils]: 312: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~id.base, ~id.offset := #in~id.base, #in~id.offset;havoc ~udev~0.base, ~udev~0.offset;havoc ~tmp~42.base, ~tmp~42.offset;havoc ~pcu~10.base, ~pcu~10.offset;havoc ~error~25;havoc ~tmp___0~18.base, ~tmp___0~18.offset;call ~#__key~2.base, ~#__key~2.offset := #Ultimate.alloc(8);havoc ~tmp___1~8;havoc ~tmp___2~4; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,329 INFO L256 TraceCheckUtils]: 313: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret827.base, #t~ret827.offset := interface_to_usbdev(~intf.base, ~intf.offset); {660590#true} is VALID [2018-11-19 18:52:20,329 INFO L273 TraceCheckUtils]: 314: Hoare triple {660590#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~55.base, ~tmp~55.offset; {660590#true} is VALID [2018-11-19 18:52:20,329 INFO L256 TraceCheckUtils]: 315: Hoare triple {660590#true} call #t~ret956.base, #t~ret956.offset := ldv_interface_to_usbdev(); {660590#true} is VALID [2018-11-19 18:52:20,329 INFO L273 TraceCheckUtils]: 316: Hoare triple {660590#true} havoc ~result~0.base, ~result~0.offset;havoc ~tmp~65.base, ~tmp~65.offset; {660590#true} is VALID [2018-11-19 18:52:20,329 INFO L256 TraceCheckUtils]: 317: Hoare triple {660590#true} call #t~ret969.base, #t~ret969.offset := ldv_undef_ptr(); {660590#true} is VALID [2018-11-19 18:52:20,329 INFO L273 TraceCheckUtils]: 318: Hoare triple {660590#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {660590#true} is VALID [2018-11-19 18:52:20,330 INFO L273 TraceCheckUtils]: 319: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,330 INFO L268 TraceCheckUtils]: 320: Hoare quadruple {660590#true} {660590#true} #2817#return; {660590#true} is VALID [2018-11-19 18:52:20,330 INFO L273 TraceCheckUtils]: 321: Hoare triple {660590#true} ~tmp~65.base, ~tmp~65.offset := #t~ret969.base, #t~ret969.offset;havoc #t~ret969.base, #t~ret969.offset;~result~0.base, ~result~0.offset := ~tmp~65.base, ~tmp~65.offset; {660590#true} is VALID [2018-11-19 18:52:20,330 INFO L273 TraceCheckUtils]: 322: Hoare triple {660590#true} assume 0 != (~result~0.base + ~result~0.offset) % 18446744073709551616; {660590#true} is VALID [2018-11-19 18:52:20,330 INFO L273 TraceCheckUtils]: 323: Hoare triple {660590#true} #res.base, #res.offset := ~result~0.base, ~result~0.offset; {660590#true} is VALID [2018-11-19 18:52:20,330 INFO L273 TraceCheckUtils]: 324: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,331 INFO L268 TraceCheckUtils]: 325: Hoare quadruple {660590#true} {660590#true} #3151#return; {660590#true} is VALID [2018-11-19 18:52:20,331 INFO L273 TraceCheckUtils]: 326: Hoare triple {660590#true} ~tmp~55.base, ~tmp~55.offset := #t~ret956.base, #t~ret956.offset;havoc #t~ret956.base, #t~ret956.offset;#res.base, #res.offset := ~tmp~55.base, ~tmp~55.offset; {660590#true} is VALID [2018-11-19 18:52:20,331 INFO L273 TraceCheckUtils]: 327: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,333 INFO L268 TraceCheckUtils]: 328: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3095#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,336 INFO L273 TraceCheckUtils]: 329: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} ~tmp~42.base, ~tmp~42.offset := #t~ret827.base, #t~ret827.offset;havoc #t~ret827.base, #t~ret827.offset;~udev~0.base, ~udev~0.offset := ~tmp~42.base, ~tmp~42.offset; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,336 INFO L256 TraceCheckUtils]: 330: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret828.base, #t~ret828.offset := kzalloc(1608, 208); {660590#true} is VALID [2018-11-19 18:52:20,336 INFO L273 TraceCheckUtils]: 331: Hoare triple {660590#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp~7.base, ~tmp~7.offset; {660590#true} is VALID [2018-11-19 18:52:20,336 INFO L256 TraceCheckUtils]: 332: Hoare triple {660590#true} call #t~ret128.base, #t~ret128.offset := kmalloc(~size, ~bitwiseOr(~flags, 32768)); {660590#true} is VALID [2018-11-19 18:52:20,336 INFO L273 TraceCheckUtils]: 333: Hoare triple {660590#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {660590#true} is VALID [2018-11-19 18:52:20,337 INFO L256 TraceCheckUtils]: 334: Hoare triple {660590#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {660590#true} is VALID [2018-11-19 18:52:20,337 INFO L273 TraceCheckUtils]: 335: Hoare triple {660590#true} ~size := #in~size;~t := #in~t; {660590#true} is VALID [2018-11-19 18:52:20,337 INFO L256 TraceCheckUtils]: 336: Hoare triple {660590#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {660590#true} is VALID [2018-11-19 18:52:20,337 INFO L273 TraceCheckUtils]: 337: Hoare triple {660590#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {660590#true} is VALID [2018-11-19 18:52:20,337 INFO L273 TraceCheckUtils]: 338: Hoare triple {660590#true} assume !(0 != ~tmp___0~2);call #t~malloc130.base, #t~malloc130.offset := #Ultimate.alloc(~size);~tmp~8.base, ~tmp~8.offset := #t~malloc130.base, #t~malloc130.offset;~p~0.base, ~p~0.offset := ~tmp~8.base, ~tmp~8.offset;assume 0 != (if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~0.base, ~p~0.offset; {660590#true} is VALID [2018-11-19 18:52:20,337 INFO L273 TraceCheckUtils]: 339: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,338 INFO L268 TraceCheckUtils]: 340: Hoare quadruple {660590#true} {660590#true} #2691#return; {660590#true} is VALID [2018-11-19 18:52:20,338 INFO L273 TraceCheckUtils]: 341: Hoare triple {660590#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {660590#true} is VALID [2018-11-19 18:52:20,338 INFO L273 TraceCheckUtils]: 342: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,338 INFO L268 TraceCheckUtils]: 343: Hoare quadruple {660590#true} {660590#true} #2781#return; {660590#true} is VALID [2018-11-19 18:52:20,338 INFO L273 TraceCheckUtils]: 344: Hoare triple {660590#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {660590#true} is VALID [2018-11-19 18:52:20,338 INFO L273 TraceCheckUtils]: 345: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,339 INFO L268 TraceCheckUtils]: 346: Hoare quadruple {660590#true} {660590#true} #2779#return; {660590#true} is VALID [2018-11-19 18:52:20,339 INFO L273 TraceCheckUtils]: 347: Hoare triple {660590#true} ~tmp~7.base, ~tmp~7.offset := #t~ret128.base, #t~ret128.offset;havoc #t~ret128.base, #t~ret128.offset;#res.base, #res.offset := ~tmp~7.base, ~tmp~7.offset; {660590#true} is VALID [2018-11-19 18:52:20,339 INFO L273 TraceCheckUtils]: 348: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,341 INFO L268 TraceCheckUtils]: 349: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3097#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,342 INFO L273 TraceCheckUtils]: 350: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} ~tmp___0~18.base, ~tmp___0~18.offset := #t~ret828.base, #t~ret828.offset;havoc #t~ret828.base, #t~ret828.offset;~pcu~10.base, ~pcu~10.offset := ~tmp___0~18.base, ~tmp___0~18.offset; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,344 INFO L273 TraceCheckUtils]: 351: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} assume !(0 == (~pcu~10.base + ~pcu~10.offset) % 18446744073709551616);call write~$Pointer$(~intf.base, 44 + ~intf.offset, ~pcu~10.base, 8 + ~pcu~10.offset, 8);call write~$Pointer$(~udev~0.base, ~udev~0.offset, ~pcu~10.base, ~pcu~10.offset, 8);call #t~mem829 := read~int(~id.base, 17 + ~id.offset, 8);call write~int((if 0 == (if 1 == #t~mem829 % 18446744073709551616 then 1 else 0) then 0 else 1), ~pcu~10.base, 20 + ~pcu~10.offset, 1);havoc #t~mem829;call __mutex_init(~pcu~10.base, 538 + ~pcu~10.offset, #t~string830.base, #t~string830.offset, ~#__key~2.base, ~#__key~2.offset); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,344 INFO L256 TraceCheckUtils]: 352: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call init_completion(~pcu~10.base, 450 + ~pcu~10.offset); {660590#true} is VALID [2018-11-19 18:52:20,344 INFO L273 TraceCheckUtils]: 353: Hoare triple {660590#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {660590#true} is VALID [2018-11-19 18:52:20,344 INFO L273 TraceCheckUtils]: 354: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,345 INFO L268 TraceCheckUtils]: 355: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3099#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,345 INFO L256 TraceCheckUtils]: 356: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call init_completion(~pcu~10.base, 702 + ~pcu~10.offset); {660590#true} is VALID [2018-11-19 18:52:20,345 INFO L273 TraceCheckUtils]: 357: Hoare triple {660590#true} ~x.base, ~x.offset := #in~x.base, #in~x.offset;call ~#__key~0.base, ~#__key~0.offset := #Ultimate.alloc(8);call write~int(0, ~x.base, ~x.offset, 4);call __init_waitqueue_head(~x.base, 4 + ~x.offset, #t~string57.base, #t~string57.offset, ~#__key~0.base, ~#__key~0.offset);call ULTIMATE.dealloc(~#__key~0.base, ~#__key~0.offset);havoc ~#__key~0.base, ~#__key~0.offset; {660590#true} is VALID [2018-11-19 18:52:20,346 INFO L273 TraceCheckUtils]: 358: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,346 INFO L268 TraceCheckUtils]: 359: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3101#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,347 INFO L256 TraceCheckUtils]: 360: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret831 := ims_pcu_parse_cdc_data(~intf.base, ~intf.offset, ~pcu~10.base, ~pcu~10.offset); {660590#true} is VALID [2018-11-19 18:52:20,347 INFO L273 TraceCheckUtils]: 361: Hoare triple {660590#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~union_desc~1.base, ~union_desc~1.offset;havoc ~alt~0.base, ~alt~0.offset;havoc ~tmp~37;havoc ~tmp___0~16;havoc ~tmp___1~7;havoc ~tmp___2~3;havoc ~tmp___3~2; {660590#true} is VALID [2018-11-19 18:52:20,347 INFO L256 TraceCheckUtils]: 362: Hoare triple {660590#true} call #t~ret657.base, #t~ret657.offset := ims_pcu_get_cdc_union_desc(~intf.base, ~intf.offset); {660590#true} is VALID [2018-11-19 18:52:20,347 INFO L273 TraceCheckUtils]: 363: Hoare triple {660590#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~buf~0.base, ~buf~0.offset;havoc ~buflen~0;havoc ~union_desc~0.base, ~union_desc~0.offset;call ~#descriptor~3.base, ~#descriptor~3.offset := #Ultimate.alloc(37);havoc ~tmp~36;call #t~mem634.base, #t~mem634.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem635.base, #t~mem635.offset := read~$Pointer$(#t~mem634.base, 13 + #t~mem634.offset, 8);~buf~0.base, ~buf~0.offset := #t~mem635.base, #t~mem635.offset;havoc #t~mem634.base, #t~mem634.offset;havoc #t~mem635.base, #t~mem635.offset;call #t~mem636.base, #t~mem636.offset := read~$Pointer$(~intf.base, ~intf.offset, 8);call #t~mem637 := read~int(#t~mem636.base, 9 + #t~mem636.offset, 4);~buflen~0 := #t~mem637;havoc #t~mem636.base, #t~mem636.offset;havoc #t~mem637; {660590#true} is VALID [2018-11-19 18:52:20,347 INFO L273 TraceCheckUtils]: 364: Hoare triple {660590#true} assume !(0 == (~buf~0.base + ~buf~0.offset) % 18446744073709551616); {660590#true} is VALID [2018-11-19 18:52:20,347 INFO L273 TraceCheckUtils]: 365: Hoare triple {660590#true} assume !(0 == ~buflen~0 % 4294967296 % 18446744073709551616); {660590#true} is VALID [2018-11-19 18:52:20,348 INFO L273 TraceCheckUtils]: 366: Hoare triple {660590#true} assume 0 != ~buflen~0 % 4294967296 % 18446744073709551616; {660590#true} is VALID [2018-11-19 18:52:20,348 INFO L273 TraceCheckUtils]: 367: Hoare triple {660590#true} ~union_desc~0.base, ~union_desc~0.offset := ~buf~0.base, ~buf~0.offset;call #t~mem642 := read~int(~union_desc~0.base, 1 + ~union_desc~0.offset, 1);#t~short644 := 36 == #t~mem642 % 256 % 4294967296; {660590#true} is VALID [2018-11-19 18:52:20,348 INFO L273 TraceCheckUtils]: 368: Hoare triple {660590#true} assume #t~short644;call #t~mem643 := read~int(~union_desc~0.base, 2 + ~union_desc~0.offset, 1);#t~short644 := 6 == #t~mem643 % 256 % 4294967296; {660590#true} is VALID [2018-11-19 18:52:20,348 INFO L273 TraceCheckUtils]: 369: Hoare triple {660590#true} assume #t~short644;havoc #t~mem643;havoc #t~mem642;havoc #t~short644;call write~$Pointer$(#t~string645.base, #t~string645.offset, ~#descriptor~3.base, ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string646.base, #t~string646.offset, ~#descriptor~3.base, 8 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string647.base, #t~string647.offset, ~#descriptor~3.base, 16 + ~#descriptor~3.offset, 8);call write~$Pointer$(#t~string648.base, #t~string648.offset, ~#descriptor~3.base, 24 + ~#descriptor~3.offset, 8);call write~int(1479, ~#descriptor~3.base, 32 + ~#descriptor~3.offset, 4);call write~int(0, ~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1);call #t~mem649 := read~int(~#descriptor~3.base, 36 + ~#descriptor~3.offset, 1); {660590#true} is VALID [2018-11-19 18:52:20,348 INFO L256 TraceCheckUtils]: 370: Hoare triple {660590#true} call #t~ret650 := ldv__builtin_expect(~bitwiseAnd(#t~mem649 % 256, 1), 0); {660590#true} is VALID [2018-11-19 18:52:20,348 INFO L273 TraceCheckUtils]: 371: Hoare triple {660590#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {660590#true} is VALID [2018-11-19 18:52:20,348 INFO L273 TraceCheckUtils]: 372: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,348 INFO L268 TraceCheckUtils]: 373: Hoare quadruple {660590#true} {660590#true} #3075#return; {660590#true} is VALID [2018-11-19 18:52:20,348 INFO L273 TraceCheckUtils]: 374: Hoare triple {660590#true} assume -9223372036854775808 <= #t~ret650 && #t~ret650 <= 9223372036854775807;~tmp~36 := #t~ret650;havoc #t~ret650;havoc #t~mem649; {660590#true} is VALID [2018-11-19 18:52:20,348 INFO L273 TraceCheckUtils]: 375: Hoare triple {660590#true} assume !(0 != ~tmp~36); {660590#true} is VALID [2018-11-19 18:52:20,349 INFO L273 TraceCheckUtils]: 376: Hoare triple {660590#true} #res.base, #res.offset := ~union_desc~0.base, ~union_desc~0.offset;call ULTIMATE.dealloc(~#descriptor~3.base, ~#descriptor~3.offset);havoc ~#descriptor~3.base, ~#descriptor~3.offset; {660590#true} is VALID [2018-11-19 18:52:20,349 INFO L273 TraceCheckUtils]: 377: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,349 INFO L268 TraceCheckUtils]: 378: Hoare quadruple {660590#true} {660590#true} #3137#return; {660590#true} is VALID [2018-11-19 18:52:20,349 INFO L273 TraceCheckUtils]: 379: Hoare triple {660590#true} ~union_desc~1.base, ~union_desc~1.offset := #t~ret657.base, #t~ret657.offset;havoc #t~ret657.base, #t~ret657.offset; {660590#true} is VALID [2018-11-19 18:52:20,349 INFO L273 TraceCheckUtils]: 380: Hoare triple {660590#true} assume !(0 == (~union_desc~1.base + ~union_desc~1.offset) % 18446744073709551616);call #t~mem658.base, #t~mem658.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem659 := read~int(~union_desc~1.base, 3 + ~union_desc~1.offset, 1);call #t~ret660.base, #t~ret660.offset := usb_ifnum_to_if(#t~mem658.base, #t~mem658.offset, #t~mem659 % 256);call write~$Pointer$(#t~ret660.base, #t~ret660.offset, ~pcu.base, 79 + ~pcu.offset, 8);havoc #t~mem659;havoc #t~ret660.base, #t~ret660.offset;havoc #t~mem658.base, #t~mem658.offset;call #t~mem661.base, #t~mem661.offset := read~$Pointer$(~pcu.base, 79 + ~pcu.offset, 8);call #t~mem662.base, #t~mem662.offset := read~$Pointer$(#t~mem661.base, 8 + #t~mem661.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem662.base, #t~mem662.offset;havoc #t~mem662.base, #t~mem662.offset;havoc #t~mem661.base, #t~mem661.offset;call #t~mem663.base, #t~mem663.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem663.base, #t~mem663.offset, ~pcu.base, 87 + ~pcu.offset, 8);havoc #t~mem663.base, #t~mem663.offset;call #t~mem664.base, #t~mem664.offset := read~$Pointer$(~pcu.base, 87 + ~pcu.offset, 8); {660590#true} is VALID [2018-11-19 18:52:20,349 INFO L256 TraceCheckUtils]: 381: Hoare triple {660590#true} call #t~ret665 := usb_endpoint_maxp(#t~mem664.base, #t~mem664.offset); {660590#true} is VALID [2018-11-19 18:52:20,349 INFO L273 TraceCheckUtils]: 382: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {660590#true} is VALID [2018-11-19 18:52:20,349 INFO L273 TraceCheckUtils]: 383: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,349 INFO L268 TraceCheckUtils]: 384: Hoare quadruple {660590#true} {660590#true} #3139#return; {660590#true} is VALID [2018-11-19 18:52:20,349 INFO L273 TraceCheckUtils]: 385: Hoare triple {660590#true} assume -2147483648 <= #t~ret665 && #t~ret665 <= 2147483647;~tmp~37 := #t~ret665;havoc #t~ret665;havoc #t~mem664.base, #t~mem664.offset;call write~int(~tmp~37, ~pcu.base, 119 + ~pcu.offset, 4);call #t~mem666.base, #t~mem666.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem667 := read~int(~union_desc~1.base, 4 + ~union_desc~1.offset, 1);call #t~ret668.base, #t~ret668.offset := usb_ifnum_to_if(#t~mem666.base, #t~mem666.offset, #t~mem667 % 256);call write~$Pointer$(#t~ret668.base, #t~ret668.offset, ~pcu.base, 123 + ~pcu.offset, 8);havoc #t~mem666.base, #t~mem666.offset;havoc #t~mem667;havoc #t~ret668.base, #t~ret668.offset;call #t~mem669.base, #t~mem669.offset := read~$Pointer$(~pcu.base, 123 + ~pcu.offset, 8);call #t~mem670.base, #t~mem670.offset := read~$Pointer$(#t~mem669.base, 8 + #t~mem669.offset, 8);~alt~0.base, ~alt~0.offset := #t~mem670.base, #t~mem670.offset;havoc #t~mem670.base, #t~mem670.offset;havoc #t~mem669.base, #t~mem669.offset;call #t~mem671 := read~int(~alt~0.base, 4 + ~alt~0.offset, 1); {660590#true} is VALID [2018-11-19 18:52:20,350 INFO L273 TraceCheckUtils]: 386: Hoare triple {660590#true} assume !(2 != #t~mem671 % 256 % 4294967296);havoc #t~mem671;call #t~mem676.base, #t~mem676.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem676.base, #t~mem676.offset, ~pcu.base, 167 + ~pcu.offset, 8);havoc #t~mem676.base, #t~mem676.offset;call #t~mem677.base, #t~mem677.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {660590#true} is VALID [2018-11-19 18:52:20,350 INFO L256 TraceCheckUtils]: 387: Hoare triple {660590#true} call #t~ret678 := usb_endpoint_is_bulk_out(#t~mem677.base, #t~mem677.offset); {660590#true} is VALID [2018-11-19 18:52:20,350 INFO L273 TraceCheckUtils]: 388: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~4;havoc ~tmp___0~1;havoc ~tmp___1~1; {660590#true} is VALID [2018-11-19 18:52:20,350 INFO L256 TraceCheckUtils]: 389: Hoare triple {660590#true} call #t~ret25 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {660590#true} is VALID [2018-11-19 18:52:20,350 INFO L273 TraceCheckUtils]: 390: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {660590#true} is VALID [2018-11-19 18:52:20,350 INFO L273 TraceCheckUtils]: 391: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,350 INFO L268 TraceCheckUtils]: 392: Hoare quadruple {660590#true} {660590#true} #2887#return; {660590#true} is VALID [2018-11-19 18:52:20,350 INFO L273 TraceCheckUtils]: 393: Hoare triple {660590#true} assume -2147483648 <= #t~ret25 && #t~ret25 <= 2147483647;~tmp~4 := #t~ret25;havoc #t~ret25; {660590#true} is VALID [2018-11-19 18:52:20,350 INFO L273 TraceCheckUtils]: 394: Hoare triple {660590#true} assume 0 != ~tmp~4; {660590#true} is VALID [2018-11-19 18:52:20,350 INFO L256 TraceCheckUtils]: 395: Hoare triple {660590#true} call #t~ret26 := usb_endpoint_dir_out(~epd.base, ~epd.offset); {660590#true} is VALID [2018-11-19 18:52:20,351 INFO L273 TraceCheckUtils]: 396: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem21 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem21 % 256 % 256 <= 127 then #t~mem21 % 256 % 256 else #t~mem21 % 256 % 256 - 256) >= 0 then 1 else 0);havoc #t~mem21; {660590#true} is VALID [2018-11-19 18:52:20,351 INFO L273 TraceCheckUtils]: 397: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,351 INFO L268 TraceCheckUtils]: 398: Hoare quadruple {660590#true} {660590#true} #2889#return; {660590#true} is VALID [2018-11-19 18:52:20,351 INFO L273 TraceCheckUtils]: 399: Hoare triple {660590#true} assume -2147483648 <= #t~ret26 && #t~ret26 <= 2147483647;~tmp___0~1 := #t~ret26;havoc #t~ret26; {660590#true} is VALID [2018-11-19 18:52:20,351 INFO L273 TraceCheckUtils]: 400: Hoare triple {660590#true} assume 0 != ~tmp___0~1;~tmp___1~1 := 1; {660590#true} is VALID [2018-11-19 18:52:20,351 INFO L273 TraceCheckUtils]: 401: Hoare triple {660590#true} #res := ~tmp___1~1; {660590#true} is VALID [2018-11-19 18:52:20,351 INFO L273 TraceCheckUtils]: 402: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,351 INFO L268 TraceCheckUtils]: 403: Hoare quadruple {660590#true} {660590#true} #3141#return; {660590#true} is VALID [2018-11-19 18:52:20,351 INFO L273 TraceCheckUtils]: 404: Hoare triple {660590#true} assume -2147483648 <= #t~ret678 && #t~ret678 <= 2147483647;~tmp___0~16 := #t~ret678;havoc #t~mem677.base, #t~mem677.offset;havoc #t~ret678; {660590#true} is VALID [2018-11-19 18:52:20,351 INFO L273 TraceCheckUtils]: 405: Hoare triple {660590#true} assume !(0 == ~tmp___0~16);call #t~mem682.base, #t~mem682.offset := read~$Pointer$(~pcu.base, 167 + ~pcu.offset, 8); {660590#true} is VALID [2018-11-19 18:52:20,352 INFO L256 TraceCheckUtils]: 406: Hoare triple {660590#true} call #t~ret683 := usb_endpoint_maxp(#t~mem682.base, #t~mem682.offset); {660590#true} is VALID [2018-11-19 18:52:20,352 INFO L273 TraceCheckUtils]: 407: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {660590#true} is VALID [2018-11-19 18:52:20,352 INFO L273 TraceCheckUtils]: 408: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,352 INFO L268 TraceCheckUtils]: 409: Hoare quadruple {660590#true} {660590#true} #3143#return; {660590#true} is VALID [2018-11-19 18:52:20,352 INFO L273 TraceCheckUtils]: 410: Hoare triple {660590#true} assume -2147483648 <= #t~ret683 && #t~ret683 <= 2147483647;~tmp___1~7 := #t~ret683;havoc #t~mem682.base, #t~mem682.offset;havoc #t~ret683;call write~int(~tmp___1~7, ~pcu.base, 183 + ~pcu.offset, 4);call #t~mem684 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {660590#true} is VALID [2018-11-19 18:52:20,352 INFO L273 TraceCheckUtils]: 411: Hoare triple {660590#true} assume !(#t~mem684 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem684;call #t~mem689.base, #t~mem689.offset := read~$Pointer$(~alt~0.base, 21 + ~alt~0.offset, 8);call write~$Pointer$(#t~mem689.base, 63 + #t~mem689.offset, ~pcu.base, 131 + ~pcu.offset, 8);havoc #t~mem689.base, #t~mem689.offset;call #t~mem690.base, #t~mem690.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {660590#true} is VALID [2018-11-19 18:52:20,352 INFO L256 TraceCheckUtils]: 412: Hoare triple {660590#true} call #t~ret691 := usb_endpoint_is_bulk_in(#t~mem690.base, #t~mem690.offset); {660590#true} is VALID [2018-11-19 18:52:20,352 INFO L273 TraceCheckUtils]: 413: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;havoc ~tmp~3;havoc ~tmp___0~0;havoc ~tmp___1~0; {660590#true} is VALID [2018-11-19 18:52:20,352 INFO L256 TraceCheckUtils]: 414: Hoare triple {660590#true} call #t~ret23 := usb_endpoint_xfer_bulk(~epd.base, ~epd.offset); {660590#true} is VALID [2018-11-19 18:52:20,352 INFO L273 TraceCheckUtils]: 415: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem22 := read~int(~epd.base, 3 + ~epd.offset, 1);#res := (if 2 == ~bitwiseAnd(#t~mem22 % 256, 3) then 1 else 0);havoc #t~mem22; {660590#true} is VALID [2018-11-19 18:52:20,353 INFO L273 TraceCheckUtils]: 416: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,353 INFO L268 TraceCheckUtils]: 417: Hoare quadruple {660590#true} {660590#true} #2915#return; {660590#true} is VALID [2018-11-19 18:52:20,353 INFO L273 TraceCheckUtils]: 418: Hoare triple {660590#true} assume -2147483648 <= #t~ret23 && #t~ret23 <= 2147483647;~tmp~3 := #t~ret23;havoc #t~ret23; {660590#true} is VALID [2018-11-19 18:52:20,353 INFO L273 TraceCheckUtils]: 419: Hoare triple {660590#true} assume 0 != ~tmp~3; {660590#true} is VALID [2018-11-19 18:52:20,353 INFO L256 TraceCheckUtils]: 420: Hoare triple {660590#true} call #t~ret24 := usb_endpoint_dir_in(~epd.base, ~epd.offset); {660590#true} is VALID [2018-11-19 18:52:20,353 INFO L273 TraceCheckUtils]: 421: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem20 := read~int(~epd.base, 2 + ~epd.offset, 1);#res := (if (if #t~mem20 % 256 % 256 <= 127 then #t~mem20 % 256 % 256 else #t~mem20 % 256 % 256 - 256) < 0 then 1 else 0);havoc #t~mem20; {660590#true} is VALID [2018-11-19 18:52:20,353 INFO L273 TraceCheckUtils]: 422: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,353 INFO L268 TraceCheckUtils]: 423: Hoare quadruple {660590#true} {660590#true} #2917#return; {660590#true} is VALID [2018-11-19 18:52:20,353 INFO L273 TraceCheckUtils]: 424: Hoare triple {660590#true} assume -2147483648 <= #t~ret24 && #t~ret24 <= 2147483647;~tmp___0~0 := #t~ret24;havoc #t~ret24; {660590#true} is VALID [2018-11-19 18:52:20,353 INFO L273 TraceCheckUtils]: 425: Hoare triple {660590#true} assume 0 != ~tmp___0~0;~tmp___1~0 := 1; {660590#true} is VALID [2018-11-19 18:52:20,354 INFO L273 TraceCheckUtils]: 426: Hoare triple {660590#true} #res := ~tmp___1~0; {660590#true} is VALID [2018-11-19 18:52:20,354 INFO L273 TraceCheckUtils]: 427: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,354 INFO L268 TraceCheckUtils]: 428: Hoare quadruple {660590#true} {660590#true} #3145#return; {660590#true} is VALID [2018-11-19 18:52:20,354 INFO L273 TraceCheckUtils]: 429: Hoare triple {660590#true} assume -2147483648 <= #t~ret691 && #t~ret691 <= 2147483647;~tmp___2~3 := #t~ret691;havoc #t~ret691;havoc #t~mem690.base, #t~mem690.offset; {660590#true} is VALID [2018-11-19 18:52:20,354 INFO L273 TraceCheckUtils]: 430: Hoare triple {660590#true} assume !(0 == ~tmp___2~3);call #t~mem695.base, #t~mem695.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8); {660590#true} is VALID [2018-11-19 18:52:20,354 INFO L256 TraceCheckUtils]: 431: Hoare triple {660590#true} call #t~ret696 := usb_endpoint_maxp(#t~mem695.base, #t~mem695.offset); {660590#true} is VALID [2018-11-19 18:52:20,354 INFO L273 TraceCheckUtils]: 432: Hoare triple {660590#true} ~epd.base, ~epd.offset := #in~epd.base, #in~epd.offset;call #t~mem27 := read~int(~epd.base, 4 + ~epd.offset, 2);#res := #t~mem27 % 65536;havoc #t~mem27; {660590#true} is VALID [2018-11-19 18:52:20,354 INFO L273 TraceCheckUtils]: 433: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,354 INFO L268 TraceCheckUtils]: 434: Hoare quadruple {660590#true} {660590#true} #3147#return; {660590#true} is VALID [2018-11-19 18:52:20,354 INFO L273 TraceCheckUtils]: 435: Hoare triple {660590#true} assume -2147483648 <= #t~ret696 && #t~ret696 <= 2147483647;~tmp___3~2 := #t~ret696;havoc #t~ret696;havoc #t~mem695.base, #t~mem695.offset;call write~int(~tmp___3~2, ~pcu.base, 163 + ~pcu.offset, 4);call #t~mem697 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {660590#true} is VALID [2018-11-19 18:52:20,355 INFO L273 TraceCheckUtils]: 436: Hoare triple {660590#true} assume !(#t~mem697 % 4294967296 % 18446744073709551616 <= 7);havoc #t~mem697;#res := 0; {660590#true} is VALID [2018-11-19 18:52:20,355 INFO L273 TraceCheckUtils]: 437: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,355 INFO L268 TraceCheckUtils]: 438: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3103#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,359 INFO L273 TraceCheckUtils]: 439: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} assume -2147483648 <= #t~ret831 && #t~ret831 <= 2147483647;~error~25 := #t~ret831;havoc #t~ret831; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,359 INFO L273 TraceCheckUtils]: 440: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} assume !(0 != ~error~25);call #t~mem832.base, #t~mem832.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call #t~ret833 := usb_driver_claim_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem832.base, #t~mem832.offset, ~pcu~10.base, ~pcu~10.offset);assume -2147483648 <= #t~ret833 && #t~ret833 <= 2147483647;~error~25 := #t~ret833;havoc #t~mem832.base, #t~mem832.offset;havoc #t~ret833; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,360 INFO L273 TraceCheckUtils]: 441: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} assume !(0 != ~error~25);call #t~mem836.base, #t~mem836.offset := read~$Pointer$(~pcu~10.base, 79 + ~pcu~10.offset, 8); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,360 INFO L256 TraceCheckUtils]: 442: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call ldv_usb_set_intfdata_18(#t~mem836.base, #t~mem836.offset, ~pcu~10.base, ~pcu~10.offset); {660590#true} is VALID [2018-11-19 18:52:20,361 INFO L273 TraceCheckUtils]: 443: Hoare triple {660590#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {660590#true} is VALID [2018-11-19 18:52:20,361 INFO L256 TraceCheckUtils]: 444: Hoare triple {660590#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {660590#true} is VALID [2018-11-19 18:52:20,361 INFO L273 TraceCheckUtils]: 445: Hoare triple {660590#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {660590#true} is VALID [2018-11-19 18:52:20,361 INFO L273 TraceCheckUtils]: 446: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,362 INFO L268 TraceCheckUtils]: 447: Hoare quadruple {660590#true} {660590#true} #2541#return; {660590#true} is VALID [2018-11-19 18:52:20,362 INFO L273 TraceCheckUtils]: 448: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,363 INFO L268 TraceCheckUtils]: 449: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3105#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,363 INFO L273 TraceCheckUtils]: 450: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} havoc #t~mem836.base, #t~mem836.offset;call #t~mem837.base, #t~mem837.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,363 INFO L256 TraceCheckUtils]: 451: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call ldv_usb_set_intfdata_18(#t~mem837.base, #t~mem837.offset, ~pcu~10.base, ~pcu~10.offset); {660590#true} is VALID [2018-11-19 18:52:20,363 INFO L273 TraceCheckUtils]: 452: Hoare triple {660590#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;~data.base, ~data.offset := #in~data.base, #in~data.offset; {660590#true} is VALID [2018-11-19 18:52:20,364 INFO L256 TraceCheckUtils]: 453: Hoare triple {660590#true} call ldv_usb_set_intfdata(~data.base, ~data.offset); {660590#true} is VALID [2018-11-19 18:52:20,364 INFO L273 TraceCheckUtils]: 454: Hoare triple {660590#true} ~data.base, ~data.offset := #in~data.base, #in~data.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ~data.base, ~data.offset; {660590#true} is VALID [2018-11-19 18:52:20,364 INFO L273 TraceCheckUtils]: 455: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,364 INFO L268 TraceCheckUtils]: 456: Hoare quadruple {660590#true} {660590#true} #2541#return; {660590#true} is VALID [2018-11-19 18:52:20,364 INFO L273 TraceCheckUtils]: 457: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,364 INFO L268 TraceCheckUtils]: 458: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3107#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,365 INFO L273 TraceCheckUtils]: 459: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} havoc #t~mem837.base, #t~mem837.offset; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,367 INFO L256 TraceCheckUtils]: 460: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret838 := ims_pcu_buffers_alloc(~pcu~10.base, ~pcu~10.offset); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,367 INFO L273 TraceCheckUtils]: 461: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} ~pcu.base, ~pcu.offset := #in~pcu.base, #in~pcu.offset;havoc ~error~18;havoc ~tmp~35.base, ~tmp~35.offset;havoc ~tmp___0~15;havoc ~tmp___1~6.base, ~tmp___1~6.offset;havoc ~tmp___2~2.base, ~tmp___2~2.offset;havoc ~tmp___3~1;call #t~mem553.base, #t~mem553.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem554 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~ret555.base, #t~ret555.offset := usb_alloc_coherent(#t~mem553.base, #t~mem553.offset, #t~mem554, 208, ~pcu.base, 155 + ~pcu.offset);~tmp~35.base, ~tmp~35.offset := #t~ret555.base, #t~ret555.offset;havoc #t~mem553.base, #t~mem553.offset;havoc #t~mem554;havoc #t~ret555.base, #t~ret555.offset;call write~$Pointer$(~tmp~35.base, ~tmp~35.offset, ~pcu.base, 147 + ~pcu.offset, 8);call #t~mem556.base, #t~mem556.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,368 INFO L273 TraceCheckUtils]: 462: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} assume !(0 == (#t~mem556.base + #t~mem556.offset) % 18446744073709551616);havoc #t~mem556.base, #t~mem556.offset; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,368 INFO L256 TraceCheckUtils]: 463: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret560.base, #t~ret560.offset := ldv_usb_alloc_urb_9(0, 208); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,369 INFO L273 TraceCheckUtils]: 464: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~58.base, ~tmp~58.offset; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,370 INFO L256 TraceCheckUtils]: 465: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret959.base, #t~ret959.offset := ldv_alloc_urb(); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,370 INFO L273 TraceCheckUtils]: 466: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,371 INFO L256 TraceCheckUtils]: 467: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {660590#true} is VALID [2018-11-19 18:52:20,371 INFO L273 TraceCheckUtils]: 468: Hoare triple {660590#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {660590#true} is VALID [2018-11-19 18:52:20,371 INFO L273 TraceCheckUtils]: 469: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,372 INFO L268 TraceCheckUtils]: 470: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #2605#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,372 INFO L273 TraceCheckUtils]: 471: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,372 INFO L256 TraceCheckUtils]: 472: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} call #t~ret965 := ldv_undef_int(); {660590#true} is VALID [2018-11-19 18:52:20,372 INFO L273 TraceCheckUtils]: 473: Hoare triple {660590#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {660590#true} is VALID [2018-11-19 18:52:20,372 INFO L273 TraceCheckUtils]: 474: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,373 INFO L268 TraceCheckUtils]: 475: Hoare quadruple {660590#true} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #2607#return; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,373 INFO L273 TraceCheckUtils]: 476: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,374 INFO L273 TraceCheckUtils]: 477: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} assume !(0 != ~tmp___0~26); {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,374 INFO L273 TraceCheckUtils]: 478: Hoare triple {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {662037#(and (= ~usb_urb~0.base |ldv_alloc_urb_#res.base|) (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |ldv_alloc_urb_#res.offset| ~usb_urb~0.offset) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,375 INFO L273 TraceCheckUtils]: 479: Hoare triple {662037#(and (= ~usb_urb~0.base |ldv_alloc_urb_#res.base|) (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |ldv_alloc_urb_#res.offset| ~usb_urb~0.offset) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} assume true; {662037#(and (= ~usb_urb~0.base |ldv_alloc_urb_#res.base|) (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |ldv_alloc_urb_#res.offset| ~usb_urb~0.offset) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} is VALID [2018-11-19 18:52:20,376 INFO L268 TraceCheckUtils]: 480: Hoare quadruple {662037#(and (= ~usb_urb~0.base |ldv_alloc_urb_#res.base|) (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |ldv_alloc_urb_#res.offset| ~usb_urb~0.offset) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3135#return; {662044#(and (= ~usb_urb~0.base |ldv_usb_alloc_urb_9_#t~ret959.base|) (= |ldv_usb_alloc_urb_9_#t~ret959.offset| ~usb_urb~0.offset) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|))} is VALID [2018-11-19 18:52:20,377 INFO L273 TraceCheckUtils]: 481: Hoare triple {662044#(and (= ~usb_urb~0.base |ldv_usb_alloc_urb_9_#t~ret959.base|) (= |ldv_usb_alloc_urb_9_#t~ret959.offset| ~usb_urb~0.offset) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|))} ~tmp~58.base, ~tmp~58.offset := #t~ret959.base, #t~ret959.offset;havoc #t~ret959.base, #t~ret959.offset;#res.base, #res.offset := ~tmp~58.base, ~tmp~58.offset; {662048#(and (= ~usb_urb~0.base |ldv_usb_alloc_urb_9_#res.base|) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= |ldv_usb_alloc_urb_9_#res.offset| ~usb_urb~0.offset) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|))} is VALID [2018-11-19 18:52:20,378 INFO L273 TraceCheckUtils]: 482: Hoare triple {662048#(and (= ~usb_urb~0.base |ldv_usb_alloc_urb_9_#res.base|) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= |ldv_usb_alloc_urb_9_#res.offset| ~usb_urb~0.offset) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|))} assume true; {662048#(and (= ~usb_urb~0.base |ldv_usb_alloc_urb_9_#res.base|) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= |ldv_usb_alloc_urb_9_#res.offset| ~usb_urb~0.offset) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|))} is VALID [2018-11-19 18:52:20,379 INFO L268 TraceCheckUtils]: 483: Hoare quadruple {662048#(and (= ~usb_urb~0.base |ldv_usb_alloc_urb_9_#res.base|) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= |ldv_usb_alloc_urb_9_#res.offset| ~usb_urb~0.offset) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|))} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #2709#return; {660597#(and (= |old(~usb_urb~0.offset)| |ims_pcu_buffers_alloc_#t~ret560.offset|) (= |old(~usb_urb~0.base)| |ims_pcu_buffers_alloc_#t~ret560.base|))} is VALID [2018-11-19 18:52:20,380 INFO L273 TraceCheckUtils]: 484: Hoare triple {660597#(and (= |old(~usb_urb~0.offset)| |ims_pcu_buffers_alloc_#t~ret560.offset|) (= |old(~usb_urb~0.base)| |ims_pcu_buffers_alloc_#t~ret560.base|))} call write~$Pointer$(#t~ret560.base, #t~ret560.offset, ~pcu.base, 139 + ~pcu.offset, 8);havoc #t~ret560.base, #t~ret560.offset;call #t~mem561.base, #t~mem561.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {662058#(and (= |ims_pcu_buffers_alloc_#t~mem561.base| |old(~usb_urb~0.base)|) (= |ims_pcu_buffers_alloc_#t~mem561.offset| |old(~usb_urb~0.offset)|))} is VALID [2018-11-19 18:52:20,381 INFO L273 TraceCheckUtils]: 485: Hoare triple {662058#(and (= |ims_pcu_buffers_alloc_#t~mem561.base| |old(~usb_urb~0.base)|) (= |ims_pcu_buffers_alloc_#t~mem561.offset| |old(~usb_urb~0.offset)|))} assume !(0 == (#t~mem561.base + #t~mem561.offset) % 18446744073709551616);havoc #t~mem561.base, #t~mem561.offset;call #t~mem565.base, #t~mem565.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem566.base, #t~mem566.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem567 := read~int(#t~mem566.base, 92 + #t~mem566.offset, 4);call write~int(~bitwiseOr(#t~mem567, 4), #t~mem565.base, 92 + #t~mem565.offset, 4);havoc #t~mem565.base, #t~mem565.offset;havoc #t~mem567;havoc #t~mem566.base, #t~mem566.offset;call #t~mem568.base, #t~mem568.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem569 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call write~int(#t~mem569, #t~mem568.base, 104 + #t~mem568.offset, 8);havoc #t~mem569;havoc #t~mem568.base, #t~mem568.offset;call #t~mem570.base, #t~mem570.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem571.base, #t~mem571.offset := read~$Pointer$(~pcu.base, 131 + ~pcu.offset, 8);call #t~mem572 := read~int(#t~mem571.base, 2 + #t~mem571.offset, 1); {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,381 INFO L256 TraceCheckUtils]: 486: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} call #t~ret573 := __create_pipe(#t~mem570.base, #t~mem570.offset, #t~mem572 % 256); {660590#true} is VALID [2018-11-19 18:52:20,381 INFO L273 TraceCheckUtils]: 487: Hoare triple {660590#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~endpoint := #in~endpoint;call #t~mem123 := read~int(~dev.base, ~dev.offset, 4);#res := ~bitwiseOr(256 * #t~mem123, 32768 * ~endpoint);havoc #t~mem123; {660590#true} is VALID [2018-11-19 18:52:20,382 INFO L273 TraceCheckUtils]: 488: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,382 INFO L268 TraceCheckUtils]: 489: Hoare quadruple {660590#true} {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} #2711#return; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,383 INFO L273 TraceCheckUtils]: 490: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} ~tmp___0~15 := #t~ret573;havoc #t~mem571.base, #t~mem571.offset;havoc #t~mem570.base, #t~mem570.offset;havoc #t~mem572;havoc #t~ret573;call #t~mem574.base, #t~mem574.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8);call #t~mem575.base, #t~mem575.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem576.base, #t~mem576.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem577 := read~int(~pcu.base, 163 + ~pcu.offset, 4); {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,383 INFO L256 TraceCheckUtils]: 491: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} call ldv_usb_fill_bulk_urb_10(#t~mem574.base, #t~mem574.offset, #t~mem575.base, #t~mem575.offset, ~bitwiseOr(~tmp___0~15, 3221225600), #t~mem576.base, #t~mem576.offset, (if #t~mem577 % 4294967296 % 4294967296 <= 2147483647 then #t~mem577 % 4294967296 % 4294967296 else #t~mem577 % 4294967296 % 4294967296 - 4294967296), #funAddr~ims_pcu_irq.base, #funAddr~ims_pcu_irq.offset, ~pcu.base, ~pcu.offset); {660590#true} is VALID [2018-11-19 18:52:20,383 INFO L273 TraceCheckUtils]: 492: Hoare triple {660590#true} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset;~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~pipe := #in~pipe;~transfer_buffer.base, ~transfer_buffer.offset := #in~transfer_buffer.base, #in~transfer_buffer.offset;~buffer_length := #in~buffer_length;~complete_fn.base, ~complete_fn.offset := #in~complete_fn.base, #in~complete_fn.offset;~context.base, ~context.offset := #in~context.base, #in~context.offset; {660590#true} is VALID [2018-11-19 18:52:20,383 INFO L256 TraceCheckUtils]: 493: Hoare triple {660590#true} call ldv_fill_bulk_urb(~urb.base, ~urb.offset, ~complete_fn.base, ~complete_fn.offset); {660590#true} is VALID [2018-11-19 18:52:20,384 INFO L273 TraceCheckUtils]: 494: Hoare triple {660590#true} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset;~complete_fn.base, ~complete_fn.offset := #in~complete_fn.base, #in~complete_fn.offset; {660590#true} is VALID [2018-11-19 18:52:20,384 INFO L273 TraceCheckUtils]: 495: Hoare triple {660590#true} assume (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616 == (~urb.base + ~urb.offset) % 18446744073709551616;~completeFnBulk~0.base, ~completeFnBulk~0.offset := ~complete_fn.base, ~complete_fn.offset;~completeFnBulkCounter~0 := 1 + ~completeFnBulkCounter~0; {660590#true} is VALID [2018-11-19 18:52:20,384 INFO L273 TraceCheckUtils]: 496: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,384 INFO L268 TraceCheckUtils]: 497: Hoare quadruple {660590#true} {660590#true} #2587#return; {660590#true} is VALID [2018-11-19 18:52:20,384 INFO L273 TraceCheckUtils]: 498: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,385 INFO L268 TraceCheckUtils]: 499: Hoare quadruple {660590#true} {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} #2713#return; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,386 INFO L273 TraceCheckUtils]: 500: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} havoc #t~mem574.base, #t~mem574.offset;havoc #t~mem575.base, #t~mem575.offset;havoc #t~mem576.base, #t~mem576.offset;havoc #t~mem577;call #t~mem578 := read~int(~pcu.base, 183 + ~pcu.offset, 4); {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,386 INFO L256 TraceCheckUtils]: 501: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} call #t~ret579.base, #t~ret579.offset := kmalloc(#t~mem578, 208); {660590#true} is VALID [2018-11-19 18:52:20,386 INFO L273 TraceCheckUtils]: 502: Hoare triple {660590#true} ~size := #in~size;~flags := #in~flags;havoc ~tmp___2~0.base, ~tmp___2~0.offset; {660590#true} is VALID [2018-11-19 18:52:20,386 INFO L256 TraceCheckUtils]: 503: Hoare triple {660590#true} call #t~ret127.base, #t~ret127.offset := __kmalloc(~size, ~flags); {660590#true} is VALID [2018-11-19 18:52:20,386 INFO L273 TraceCheckUtils]: 504: Hoare triple {660590#true} ~size := #in~size;~t := #in~t; {660590#true} is VALID [2018-11-19 18:52:20,386 INFO L256 TraceCheckUtils]: 505: Hoare triple {660590#true} call #t~ret126.base, #t~ret126.offset := ldv_malloc(~size); {660590#true} is VALID [2018-11-19 18:52:20,386 INFO L273 TraceCheckUtils]: 506: Hoare triple {660590#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~8.base, ~tmp~8.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet129 && #t~nondet129 <= 2147483647;~tmp___0~2 := #t~nondet129;havoc #t~nondet129; {660590#true} is VALID [2018-11-19 18:52:20,386 INFO L273 TraceCheckUtils]: 507: Hoare triple {660590#true} assume !(0 != ~tmp___0~2);call #t~malloc130.base, #t~malloc130.offset := #Ultimate.alloc(~size);~tmp~8.base, ~tmp~8.offset := #t~malloc130.base, #t~malloc130.offset;~p~0.base, ~p~0.offset := ~tmp~8.base, ~tmp~8.offset;assume 0 != (if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~0.base, ~p~0.offset; {660590#true} is VALID [2018-11-19 18:52:20,386 INFO L273 TraceCheckUtils]: 508: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,387 INFO L268 TraceCheckUtils]: 509: Hoare quadruple {660590#true} {660590#true} #2691#return; {660590#true} is VALID [2018-11-19 18:52:20,387 INFO L273 TraceCheckUtils]: 510: Hoare triple {660590#true} #res.base, #res.offset := #t~ret126.base, #t~ret126.offset;havoc #t~ret126.base, #t~ret126.offset; {660590#true} is VALID [2018-11-19 18:52:20,387 INFO L273 TraceCheckUtils]: 511: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,387 INFO L268 TraceCheckUtils]: 512: Hoare quadruple {660590#true} {660590#true} #2781#return; {660590#true} is VALID [2018-11-19 18:52:20,387 INFO L273 TraceCheckUtils]: 513: Hoare triple {660590#true} ~tmp___2~0.base, ~tmp___2~0.offset := #t~ret127.base, #t~ret127.offset;havoc #t~ret127.base, #t~ret127.offset;#res.base, #res.offset := ~tmp___2~0.base, ~tmp___2~0.offset; {660590#true} is VALID [2018-11-19 18:52:20,387 INFO L273 TraceCheckUtils]: 514: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,388 INFO L268 TraceCheckUtils]: 515: Hoare quadruple {660590#true} {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} #2715#return; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,388 INFO L273 TraceCheckUtils]: 516: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} ~tmp___1~6.base, ~tmp___1~6.offset := #t~ret579.base, #t~ret579.offset;havoc #t~mem578;havoc #t~ret579.base, #t~ret579.offset;call write~$Pointer$(~tmp___1~6.base, ~tmp___1~6.offset, ~pcu.base, 175 + ~pcu.offset, 8);call #t~mem580.base, #t~mem580.offset := read~$Pointer$(~pcu.base, 175 + ~pcu.offset, 8); {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,388 INFO L273 TraceCheckUtils]: 517: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} assume !(0 == (#t~mem580.base + #t~mem580.offset) % 18446744073709551616);havoc #t~mem580.base, #t~mem580.offset;call #t~mem584.base, #t~mem584.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem585 := read~int(~pcu.base, 119 + ~pcu.offset, 4);call #t~ret586.base, #t~ret586.offset := usb_alloc_coherent(#t~mem584.base, #t~mem584.offset, #t~mem585, 208, ~pcu.base, 111 + ~pcu.offset);~tmp___2~2.base, ~tmp___2~2.offset := #t~ret586.base, #t~ret586.offset;havoc #t~ret586.base, #t~ret586.offset;havoc #t~mem585;havoc #t~mem584.base, #t~mem584.offset;call write~$Pointer$(~tmp___2~2.base, ~tmp___2~2.offset, ~pcu.base, 103 + ~pcu.offset, 8);call #t~mem587.base, #t~mem587.offset := read~$Pointer$(~pcu.base, 103 + ~pcu.offset, 8); {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,388 INFO L273 TraceCheckUtils]: 518: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} assume !(0 == (#t~mem587.base + #t~mem587.offset) % 18446744073709551616);havoc #t~mem587.base, #t~mem587.offset; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,389 INFO L256 TraceCheckUtils]: 519: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} call #t~ret591.base, #t~ret591.offset := ldv_usb_alloc_urb_11(0, 208); {660590#true} is VALID [2018-11-19 18:52:20,389 INFO L273 TraceCheckUtils]: 520: Hoare triple {660590#true} ~iso_packets := #in~iso_packets;~mem_flags := #in~mem_flags;havoc ~tmp~59.base, ~tmp~59.offset; {660590#true} is VALID [2018-11-19 18:52:20,389 INFO L256 TraceCheckUtils]: 521: Hoare triple {660590#true} call #t~ret960.base, #t~ret960.offset := ldv_alloc_urb(); {660590#true} is VALID [2018-11-19 18:52:20,389 INFO L273 TraceCheckUtils]: 522: Hoare triple {660590#true} havoc ~value~2.base, ~value~2.offset;havoc ~tmp~63.base, ~tmp~63.offset;havoc ~tmp___0~26; {660590#true} is VALID [2018-11-19 18:52:20,389 INFO L256 TraceCheckUtils]: 523: Hoare triple {660590#true} call #t~ret964.base, #t~ret964.offset := ldv_undef_ptr(); {660590#true} is VALID [2018-11-19 18:52:20,389 INFO L273 TraceCheckUtils]: 524: Hoare triple {660590#true} havoc ~tmp~11.base, ~tmp~11.offset;~tmp~11.base, ~tmp~11.offset := #t~nondet134.base, #t~nondet134.offset;havoc #t~nondet134.base, #t~nondet134.offset;#res.base, #res.offset := ~tmp~11.base, ~tmp~11.offset; {660590#true} is VALID [2018-11-19 18:52:20,389 INFO L273 TraceCheckUtils]: 525: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,389 INFO L268 TraceCheckUtils]: 526: Hoare quadruple {660590#true} {660590#true} #2605#return; {660590#true} is VALID [2018-11-19 18:52:20,389 INFO L273 TraceCheckUtils]: 527: Hoare triple {660590#true} ~tmp~63.base, ~tmp~63.offset := #t~ret964.base, #t~ret964.offset;havoc #t~ret964.base, #t~ret964.offset;~value~2.base, ~value~2.offset := ~tmp~63.base, ~tmp~63.offset; {660590#true} is VALID [2018-11-19 18:52:20,389 INFO L256 TraceCheckUtils]: 528: Hoare triple {660590#true} call #t~ret965 := ldv_undef_int(); {660590#true} is VALID [2018-11-19 18:52:20,390 INFO L273 TraceCheckUtils]: 529: Hoare triple {660590#true} havoc ~tmp~10;assume -2147483648 <= #t~nondet133 && #t~nondet133 <= 2147483647;~tmp~10 := #t~nondet133;havoc #t~nondet133;#res := ~tmp~10; {660590#true} is VALID [2018-11-19 18:52:20,390 INFO L273 TraceCheckUtils]: 530: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,390 INFO L268 TraceCheckUtils]: 531: Hoare quadruple {660590#true} {660590#true} #2607#return; {660590#true} is VALID [2018-11-19 18:52:20,390 INFO L273 TraceCheckUtils]: 532: Hoare triple {660590#true} assume -2147483648 <= #t~ret965 && #t~ret965 <= 2147483647;~tmp___0~26 := #t~ret965;havoc #t~ret965; {660590#true} is VALID [2018-11-19 18:52:20,390 INFO L273 TraceCheckUtils]: 533: Hoare triple {660590#true} assume 0 != ~tmp___0~26; {660590#true} is VALID [2018-11-19 18:52:20,390 INFO L273 TraceCheckUtils]: 534: Hoare triple {660590#true} assume 0 != (~value~2.base + ~value~2.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~2.base, ~value~2.offset; {660590#true} is VALID [2018-11-19 18:52:20,390 INFO L273 TraceCheckUtils]: 535: Hoare triple {660590#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {660590#true} is VALID [2018-11-19 18:52:20,390 INFO L273 TraceCheckUtils]: 536: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,390 INFO L268 TraceCheckUtils]: 537: Hoare quadruple {660590#true} {660590#true} #2683#return; {660590#true} is VALID [2018-11-19 18:52:20,390 INFO L273 TraceCheckUtils]: 538: Hoare triple {660590#true} ~tmp~59.base, ~tmp~59.offset := #t~ret960.base, #t~ret960.offset;havoc #t~ret960.base, #t~ret960.offset;#res.base, #res.offset := ~tmp~59.base, ~tmp~59.offset; {660590#true} is VALID [2018-11-19 18:52:20,391 INFO L273 TraceCheckUtils]: 539: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,391 INFO L268 TraceCheckUtils]: 540: Hoare quadruple {660590#true} {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} #2717#return; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,391 INFO L273 TraceCheckUtils]: 541: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} call write~$Pointer$(#t~ret591.base, #t~ret591.offset, ~pcu.base, 95 + ~pcu.offset, 8);havoc #t~ret591.base, #t~ret591.offset;call #t~mem592.base, #t~mem592.offset := read~$Pointer$(~pcu.base, 95 + ~pcu.offset, 8); {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,392 INFO L273 TraceCheckUtils]: 542: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} assume 0 == (#t~mem592.base + #t~mem592.offset) % 18446744073709551616;havoc #t~mem592.base, #t~mem592.offset;havoc #t~nondet593;call #t~mem594.base, #t~mem594.offset := read~$Pointer$(~pcu.base, 8 + ~pcu.offset, 8);havoc #t~mem594.base, #t~mem594.offset;~error~18 := -12; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,392 INFO L273 TraceCheckUtils]: 543: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} call #t~mem611.base, #t~mem611.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem612 := read~int(~pcu.base, 119 + ~pcu.offset, 4);call #t~mem613.base, #t~mem613.offset := read~$Pointer$(~pcu.base, 103 + ~pcu.offset, 8);call #t~mem614 := read~int(~pcu.base, 111 + ~pcu.offset, 8);call usb_free_coherent(#t~mem611.base, #t~mem611.offset, #t~mem612, #t~mem613.base, #t~mem613.offset, #t~mem614);havoc #t~mem612;havoc #t~mem611.base, #t~mem611.offset;havoc #t~mem614;havoc #t~mem613.base, #t~mem613.offset; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,392 INFO L273 TraceCheckUtils]: 544: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} call #t~mem615.base, #t~mem615.offset := read~$Pointer$(~pcu.base, 175 + ~pcu.offset, 8);call kfree(#t~mem615.base, #t~mem615.offset);havoc #t~mem615.base, #t~mem615.offset; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,393 INFO L273 TraceCheckUtils]: 545: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} call #t~mem616.base, #t~mem616.offset := read~$Pointer$(~pcu.base, 139 + ~pcu.offset, 8); {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,393 INFO L256 TraceCheckUtils]: 546: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} call ldv_usb_free_urb_13(#t~mem616.base, #t~mem616.offset); {660590#true} is VALID [2018-11-19 18:52:20,393 INFO L273 TraceCheckUtils]: 547: Hoare triple {660590#true} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset; {660590#true} is VALID [2018-11-19 18:52:20,393 INFO L256 TraceCheckUtils]: 548: Hoare triple {660590#true} call ldv_free_urb(~urb.base, ~urb.offset); {660590#true} is VALID [2018-11-19 18:52:20,393 INFO L273 TraceCheckUtils]: 549: Hoare triple {660590#true} ~urb.base, ~urb.offset := #in~urb.base, #in~urb.offset; {660590#true} is VALID [2018-11-19 18:52:20,393 INFO L273 TraceCheckUtils]: 550: Hoare triple {660590#true} assume !((~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616 == (~urb.base + ~urb.offset) % 18446744073709551616 && 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {660590#true} is VALID [2018-11-19 18:52:20,393 INFO L273 TraceCheckUtils]: 551: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,393 INFO L268 TraceCheckUtils]: 552: Hoare quadruple {660590#true} {660590#true} #2695#return; {660590#true} is VALID [2018-11-19 18:52:20,393 INFO L273 TraceCheckUtils]: 553: Hoare triple {660590#true} assume true; {660590#true} is VALID [2018-11-19 18:52:20,394 INFO L268 TraceCheckUtils]: 554: Hoare quadruple {660590#true} {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} #2723#return; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,394 INFO L273 TraceCheckUtils]: 555: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} havoc #t~mem616.base, #t~mem616.offset; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,394 INFO L273 TraceCheckUtils]: 556: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} call #t~mem617.base, #t~mem617.offset := read~$Pointer$(~pcu.base, ~pcu.offset, 8);call #t~mem618 := read~int(~pcu.base, 163 + ~pcu.offset, 4);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(~pcu.base, 147 + ~pcu.offset, 8);call #t~mem620 := read~int(~pcu.base, 155 + ~pcu.offset, 8);call usb_free_coherent(#t~mem617.base, #t~mem617.offset, #t~mem618, #t~mem619.base, #t~mem619.offset, #t~mem620);havoc #t~mem617.base, #t~mem617.offset;havoc #t~mem618;havoc #t~mem620;havoc #t~mem619.base, #t~mem619.offset;#res := ~error~18; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,395 INFO L273 TraceCheckUtils]: 557: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} assume true; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,396 INFO L268 TraceCheckUtils]: 558: Hoare quadruple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} {660593#(and (= |old(~usb_urb~0.base)| ~usb_urb~0.base) (= |old(~usb_urb~0.offset)| ~usb_urb~0.offset))} #3109#return; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,396 INFO L273 TraceCheckUtils]: 559: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} assume -2147483648 <= #t~ret838 && #t~ret838 <= 2147483647;~error~25 := #t~ret838;havoc #t~ret838; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,396 INFO L273 TraceCheckUtils]: 560: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} assume 0 != ~error~25; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,397 INFO L273 TraceCheckUtils]: 561: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} call #t~mem845.base, #t~mem845.offset := read~$Pointer$(~pcu~10.base, 123 + ~pcu~10.offset, 8);call usb_driver_release_interface(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, #t~mem845.base, #t~mem845.offset);havoc #t~mem845.base, #t~mem845.offset; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,397 INFO L273 TraceCheckUtils]: 562: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} call kfree(~pcu~10.base, ~pcu~10.offset);#res := ~error~25;call ULTIMATE.dealloc(~#__key~2.base, ~#__key~2.offset);havoc ~#__key~2.base, ~#__key~2.offset; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,397 INFO L273 TraceCheckUtils]: 563: Hoare triple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} assume true; {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} is VALID [2018-11-19 18:52:20,398 INFO L268 TraceCheckUtils]: 564: Hoare quadruple {662062#(not (= (mod (+ |old(~usb_urb~0.offset)| |old(~usb_urb~0.base)|) 18446744073709551616) 0))} {660592#(and (= 0 ~usb_urb~0.offset) (= 0 ~usb_urb~0.base))} #3015#return; {660591#false} is VALID [2018-11-19 18:52:20,398 INFO L273 TraceCheckUtils]: 565: Hoare triple {660591#false} assume -2147483648 <= #t~ret938 && #t~ret938 <= 2147483647;~ldv_retval_3~0 := #t~ret938;havoc #t~ret938; {660591#false} is VALID [2018-11-19 18:52:20,399 INFO L273 TraceCheckUtils]: 566: Hoare triple {660591#false} assume !(0 == ~ldv_retval_3~0); {660591#false} is VALID [2018-11-19 18:52:20,399 INFO L273 TraceCheckUtils]: 567: Hoare triple {660591#false} assume -2147483648 <= #t~nondet908 && #t~nondet908 <= 2147483647;~tmp___32~0 := #t~nondet908;havoc #t~nondet908;#t~switch909 := 0 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:20,399 INFO L273 TraceCheckUtils]: 568: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 1 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:20,399 INFO L273 TraceCheckUtils]: 569: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 2 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:20,399 INFO L273 TraceCheckUtils]: 570: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 3 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:20,399 INFO L273 TraceCheckUtils]: 571: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 4 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:20,399 INFO L273 TraceCheckUtils]: 572: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 5 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:20,400 INFO L273 TraceCheckUtils]: 573: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 6 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:20,400 INFO L273 TraceCheckUtils]: 574: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 7 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:20,400 INFO L273 TraceCheckUtils]: 575: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 8 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:20,400 INFO L273 TraceCheckUtils]: 576: Hoare triple {660591#false} assume !#t~switch909;#t~switch909 := #t~switch909 || 9 == ~tmp___32~0; {660591#false} is VALID [2018-11-19 18:52:20,400 INFO L273 TraceCheckUtils]: 577: Hoare triple {660591#false} assume #t~switch909; {660591#false} is VALID [2018-11-19 18:52:20,400 INFO L273 TraceCheckUtils]: 578: Hoare triple {660591#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet946 && #t~nondet946 <= 2147483647;~tmp___42~0 := #t~nondet946;havoc #t~nondet946;#t~switch947 := 0 == ~tmp___42~0; {660591#false} is VALID [2018-11-19 18:52:20,400 INFO L273 TraceCheckUtils]: 579: Hoare triple {660591#false} assume #t~switch947; {660591#false} is VALID [2018-11-19 18:52:20,400 INFO L273 TraceCheckUtils]: 580: Hoare triple {660591#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {660591#false} is VALID [2018-11-19 18:52:20,401 INFO L256 TraceCheckUtils]: 581: Hoare triple {660591#false} call ims_pcu_driver_exit(); {660591#false} is VALID [2018-11-19 18:52:20,401 INFO L256 TraceCheckUtils]: 582: Hoare triple {660591#false} call ldv_usb_deregister_25(~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset); {660591#false} is VALID [2018-11-19 18:52:20,401 INFO L273 TraceCheckUtils]: 583: Hoare triple {660591#false} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_1~0 := 0; {660591#false} is VALID [2018-11-19 18:52:20,401 INFO L273 TraceCheckUtils]: 584: Hoare triple {660591#false} assume true; {660591#false} is VALID [2018-11-19 18:52:20,401 INFO L268 TraceCheckUtils]: 585: Hoare quadruple {660591#false} {660591#false} #2597#return; {660591#false} is VALID [2018-11-19 18:52:20,401 INFO L273 TraceCheckUtils]: 586: Hoare triple {660591#false} assume true; {660591#false} is VALID [2018-11-19 18:52:20,401 INFO L268 TraceCheckUtils]: 587: Hoare quadruple {660591#false} {660591#false} #3033#return; {660591#false} is VALID [2018-11-19 18:52:20,401 INFO L273 TraceCheckUtils]: 588: Hoare triple {660591#false} ~ldv_state_variable_0~0 := 2; {660591#false} is VALID [2018-11-19 18:52:20,401 INFO L256 TraceCheckUtils]: 589: Hoare triple {660591#false} call ldv_check_final_state(); {660591#false} is VALID [2018-11-19 18:52:20,401 INFO L273 TraceCheckUtils]: 590: Hoare triple {660591#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {660591#false} is VALID [2018-11-19 18:52:20,402 INFO L256 TraceCheckUtils]: 591: Hoare triple {660591#false} call ldv_error(); {660591#false} is VALID [2018-11-19 18:52:20,402 INFO L273 TraceCheckUtils]: 592: Hoare triple {660591#false} assume !false; {660591#false} is VALID [2018-11-19 18:52:20,736 INFO L134 CoverageAnalysis]: Checked inductivity of 2762 backedges. 22 proven. 9 refuted. 0 times theorem prover too weak. 2731 trivial. 0 not checked. [2018-11-19 18:52:20,767 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-19 18:52:20,767 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 15 [2018-11-19 18:52:20,769 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 593