./Ultimate.py --spec ../../../trunk/examples/svcomp/properties/unreach-call.prp --file ../../../trunk/examples/svcomp/pthread-wmm/rfi000_tso.opt_true-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 96530338 Calling Ultimate with: java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../../../trunk/examples/svcomp/pthread-wmm/rfi000_tso.opt_true-unreach-call.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 790725247cef75c6754a6505b2fc4c22454b4126 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-9653033 [2018-11-26 13:11:47,921 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-26 13:11:47,923 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-26 13:11:47,935 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-26 13:11:47,935 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-26 13:11:47,937 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-26 13:11:47,938 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-26 13:11:47,939 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-26 13:11:47,941 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-26 13:11:47,942 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-26 13:11:47,943 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-26 13:11:47,943 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-26 13:11:47,945 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-26 13:11:47,945 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-26 13:11:47,947 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-26 13:11:47,948 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-26 13:11:47,949 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-26 13:11:47,951 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-26 13:11:47,953 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-26 13:11:47,954 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-26 13:11:47,955 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-26 13:11:47,957 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-26 13:11:47,959 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-26 13:11:47,959 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-26 13:11:47,959 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-26 13:11:47,961 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-26 13:11:47,962 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-26 13:11:47,963 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-26 13:11:47,963 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-26 13:11:47,964 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-26 13:11:47,965 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-26 13:11:47,965 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-26 13:11:47,965 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-26 13:11:47,966 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-26 13:11:47,966 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-26 13:11:47,967 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-26 13:11:47,967 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-26 13:11:47,981 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-26 13:11:47,982 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-26 13:11:47,982 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-26 13:11:47,983 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-26 13:11:47,983 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-26 13:11:47,984 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-26 13:11:47,984 INFO L133 SettingsManager]: * Use SBE=true [2018-11-26 13:11:47,985 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-26 13:11:47,985 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-26 13:11:47,985 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-26 13:11:47,985 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-26 13:11:47,985 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-26 13:11:47,986 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-26 13:11:47,986 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-26 13:11:47,986 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-26 13:11:47,986 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-26 13:11:47,986 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-26 13:11:47,987 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-26 13:11:47,987 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-26 13:11:47,987 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-26 13:11:47,987 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-26 13:11:47,987 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-26 13:11:47,988 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-26 13:11:47,988 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-26 13:11:47,988 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-26 13:11:47,988 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-26 13:11:47,988 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-26 13:11:47,988 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-26 13:11:47,989 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-26 13:11:47,989 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-26 13:11:47,989 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 790725247cef75c6754a6505b2fc4c22454b4126 [2018-11-26 13:11:48,036 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-26 13:11:48,048 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-26 13:11:48,052 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-26 13:11:48,054 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-26 13:11:48,054 INFO L276 PluginConnector]: CDTParser initialized [2018-11-26 13:11:48,055 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/rfi000_tso.opt_true-unreach-call.i [2018-11-26 13:11:48,110 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3dbb32e6f/38c30a3d55704c08b6c28842b921bc63/FLAG9538719e7 [2018-11-26 13:11:48,562 INFO L307 CDTParser]: Found 1 translation units. [2018-11-26 13:11:48,563 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/rfi000_tso.opt_true-unreach-call.i [2018-11-26 13:11:48,578 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3dbb32e6f/38c30a3d55704c08b6c28842b921bc63/FLAG9538719e7 [2018-11-26 13:11:49,078 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3dbb32e6f/38c30a3d55704c08b6c28842b921bc63 [2018-11-26 13:11:49,082 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-26 13:11:49,083 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-26 13:11:49,084 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-26 13:11:49,084 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-26 13:11:49,088 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-26 13:11:49,089 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 01:11:49" (1/1) ... [2018-11-26 13:11:49,091 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7606c5bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 01:11:49, skipping insertion in model container [2018-11-26 13:11:49,092 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 01:11:49" (1/1) ... [2018-11-26 13:11:49,100 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-26 13:11:49,149 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-26 13:11:49,521 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-26 13:11:49,532 INFO L191 MainTranslator]: Completed pre-run [2018-11-26 13:11:49,654 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-26 13:11:49,717 INFO L195 MainTranslator]: Completed translation [2018-11-26 13:11:49,718 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 01:11:49 WrapperNode [2018-11-26 13:11:49,718 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-26 13:11:49,719 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-26 13:11:49,719 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-26 13:11:49,719 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-26 13:11:49,726 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 01:11:49" (1/1) ... [2018-11-26 13:11:49,748 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 01:11:49" (1/1) ... [2018-11-26 13:11:49,780 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-26 13:11:49,781 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-26 13:11:49,781 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-26 13:11:49,781 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-26 13:11:49,790 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 01:11:49" (1/1) ... [2018-11-26 13:11:49,790 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 01:11:49" (1/1) ... [2018-11-26 13:11:49,795 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 01:11:49" (1/1) ... [2018-11-26 13:11:49,795 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 01:11:49" (1/1) ... [2018-11-26 13:11:49,808 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 01:11:49" (1/1) ... [2018-11-26 13:11:49,813 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 01:11:49" (1/1) ... [2018-11-26 13:11:49,816 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 01:11:49" (1/1) ... [2018-11-26 13:11:49,821 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-26 13:11:49,821 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-26 13:11:49,822 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-26 13:11:49,822 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-26 13:11:49,823 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 01:11:49" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-26 13:11:49,887 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-26 13:11:49,887 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-26 13:11:49,888 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-26 13:11:49,888 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-26 13:11:49,888 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-26 13:11:49,888 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-26 13:11:49,888 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-26 13:11:49,888 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-26 13:11:49,889 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-26 13:11:49,889 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-26 13:11:49,889 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-26 13:11:49,890 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-26 13:11:50,739 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-26 13:11:50,739 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-26 13:11:50,740 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 01:11:50 BoogieIcfgContainer [2018-11-26 13:11:50,740 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-26 13:11:50,741 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-26 13:11:50,741 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-26 13:11:50,744 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-26 13:11:50,744 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 26.11 01:11:49" (1/3) ... [2018-11-26 13:11:50,744 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@f0cffe2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.11 01:11:50, skipping insertion in model container [2018-11-26 13:11:50,745 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 01:11:49" (2/3) ... [2018-11-26 13:11:50,745 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@f0cffe2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.11 01:11:50, skipping insertion in model container [2018-11-26 13:11:50,745 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 01:11:50" (3/3) ... [2018-11-26 13:11:50,747 INFO L112 eAbstractionObserver]: Analyzing ICFG rfi000_tso.opt_true-unreach-call.i [2018-11-26 13:11:50,805 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,806 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,806 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,806 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,807 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,807 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,807 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,808 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,808 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,808 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,808 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,809 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,809 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,809 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,809 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,810 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,810 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,810 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,810 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,811 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,811 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,811 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,811 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,812 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,812 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,812 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,812 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,813 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,813 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,813 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,813 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,814 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,814 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,814 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,816 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,816 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,816 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,817 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,817 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,817 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,817 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,817 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,818 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,818 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,818 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,818 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,818 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,819 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,819 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,819 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,819 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,820 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,820 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,820 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,820 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,821 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,821 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,821 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,821 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,821 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,822 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,822 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,822 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,822 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,822 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,823 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,823 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,823 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,823 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,824 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,824 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,824 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,824 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,824 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,825 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,825 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,825 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,825 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,826 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,826 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,826 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,826 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,827 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,827 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,827 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,827 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,827 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,828 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,828 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,828 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,828 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,828 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,828 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,829 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,829 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,829 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,829 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,829 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,830 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,830 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,830 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,830 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,830 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,831 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,831 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,831 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,831 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,831 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,832 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,832 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,832 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,832 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,832 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,833 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,833 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,833 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,834 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,835 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,835 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,835 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,835 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,835 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,836 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,836 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,836 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,836 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,836 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,837 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,837 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,837 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,837 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet33.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,837 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet34.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,838 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,838 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet34.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,838 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet33.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,838 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet33.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,838 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet34.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,838 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet33.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,839 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet34.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,839 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,839 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,839 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,839 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,840 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,840 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,840 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,840 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,840 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,841 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,841 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,841 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,841 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,841 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,842 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,842 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,842 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,842 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,843 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,843 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,843 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,843 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,843 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,844 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,844 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,844 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,844 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,844 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,845 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,845 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,845 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,845 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,846 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,846 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,846 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,846 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,846 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,846 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,847 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,847 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,847 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,847 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,848 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,848 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,848 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,848 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,848 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,849 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,849 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,849 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,849 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,850 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,850 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,850 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,850 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,850 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,851 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,851 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,851 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,851 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,851 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,852 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,852 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,852 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,852 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,852 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,853 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,853 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,853 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,853 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,854 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,854 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,854 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,854 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,854 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,855 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,855 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,855 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,855 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,855 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,855 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,856 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,856 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,856 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,856 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,856 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,857 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,857 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,857 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,857 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,857 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,858 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,858 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,858 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,858 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,859 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,859 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,859 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,859 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,859 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,860 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,860 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,860 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,860 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,860 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,861 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,861 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,861 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,861 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,861 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,862 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,862 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet62.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,862 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet62.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,862 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,862 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,863 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet62.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,863 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet62.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-26 13:11:50,882 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-26 13:11:50,882 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-26 13:11:50,892 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-26 13:11:50,912 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-26 13:11:50,941 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-26 13:11:50,942 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-26 13:11:50,942 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-26 13:11:50,942 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-26 13:11:50,942 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-26 13:11:50,943 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-26 13:11:50,943 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-26 13:11:50,943 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-26 13:11:50,943 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-26 13:11:50,959 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 226places, 306 transitions [2018-11-26 13:12:03,320 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 125048 states. [2018-11-26 13:12:03,322 INFO L276 IsEmpty]: Start isEmpty. Operand 125048 states. [2018-11-26 13:12:03,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-26 13:12:03,331 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:12:03,332 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:12:03,334 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:12:03,339 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:12:03,339 INFO L82 PathProgramCache]: Analyzing trace with hash 1224915915, now seen corresponding path program 1 times [2018-11-26 13:12:03,341 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:12:03,341 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:12:03,400 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:03,400 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:12:03,400 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:03,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:12:03,591 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:12:03,593 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:12:03,593 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-26 13:12:03,597 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-26 13:12:03,610 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-26 13:12:03,610 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-26 13:12:03,612 INFO L87 Difference]: Start difference. First operand 125048 states. Second operand 4 states. [2018-11-26 13:12:06,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:12:06,005 INFO L93 Difference]: Finished difference Result 240604 states and 990158 transitions. [2018-11-26 13:12:06,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-26 13:12:06,007 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2018-11-26 13:12:06,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:12:07,004 INFO L225 Difference]: With dead ends: 240604 [2018-11-26 13:12:07,004 INFO L226 Difference]: Without dead ends: 212996 [2018-11-26 13:12:07,006 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-26 13:12:10,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212996 states. [2018-11-26 13:12:15,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212996 to 112198. [2018-11-26 13:12:15,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112198 states. [2018-11-26 13:12:16,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112198 states to 112198 states and 465587 transitions. [2018-11-26 13:12:16,267 INFO L78 Accepts]: Start accepts. Automaton has 112198 states and 465587 transitions. Word has length 37 [2018-11-26 13:12:16,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:12:16,267 INFO L480 AbstractCegarLoop]: Abstraction has 112198 states and 465587 transitions. [2018-11-26 13:12:16,268 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-26 13:12:16,268 INFO L276 IsEmpty]: Start isEmpty. Operand 112198 states and 465587 transitions. [2018-11-26 13:12:16,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-26 13:12:16,273 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:12:16,273 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:12:16,274 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:12:16,274 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:12:16,274 INFO L82 PathProgramCache]: Analyzing trace with hash -694802140, now seen corresponding path program 1 times [2018-11-26 13:12:16,274 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:12:16,275 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:12:16,280 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:16,281 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:12:16,281 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:16,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:12:16,360 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:12:16,361 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:12:16,361 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-26 13:12:16,363 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-26 13:12:16,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-26 13:12:16,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-26 13:12:16,363 INFO L87 Difference]: Start difference. First operand 112198 states and 465587 transitions. Second operand 5 states. [2018-11-26 13:12:20,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:12:20,113 INFO L93 Difference]: Finished difference Result 337662 states and 1310633 transitions. [2018-11-26 13:12:20,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-26 13:12:20,114 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2018-11-26 13:12:20,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:12:21,245 INFO L225 Difference]: With dead ends: 337662 [2018-11-26 13:12:21,245 INFO L226 Difference]: Without dead ends: 337502 [2018-11-26 13:12:21,246 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-26 13:12:24,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 337502 states. [2018-11-26 13:12:31,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 337502 to 182336. [2018-11-26 13:12:31,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182336 states. [2018-11-26 13:12:33,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182336 states to 182336 states and 707538 transitions. [2018-11-26 13:12:33,264 INFO L78 Accepts]: Start accepts. Automaton has 182336 states and 707538 transitions. Word has length 44 [2018-11-26 13:12:33,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:12:33,265 INFO L480 AbstractCegarLoop]: Abstraction has 182336 states and 707538 transitions. [2018-11-26 13:12:33,265 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-26 13:12:33,265 INFO L276 IsEmpty]: Start isEmpty. Operand 182336 states and 707538 transitions. [2018-11-26 13:12:33,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-26 13:12:33,269 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:12:33,269 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:12:33,269 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:12:33,270 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:12:33,270 INFO L82 PathProgramCache]: Analyzing trace with hash -7464308, now seen corresponding path program 1 times [2018-11-26 13:12:33,270 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:12:33,270 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:12:33,273 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:33,274 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:12:33,274 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:33,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:12:33,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:12:33,344 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:12:33,345 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-26 13:12:33,345 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-26 13:12:33,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-26 13:12:33,345 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-26 13:12:33,346 INFO L87 Difference]: Start difference. First operand 182336 states and 707538 transitions. Second operand 4 states. [2018-11-26 13:12:33,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:12:33,525 INFO L93 Difference]: Finished difference Result 39892 states and 138215 transitions. [2018-11-26 13:12:33,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-26 13:12:33,525 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 45 [2018-11-26 13:12:33,525 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:12:33,620 INFO L225 Difference]: With dead ends: 39892 [2018-11-26 13:12:33,620 INFO L226 Difference]: Without dead ends: 37019 [2018-11-26 13:12:33,621 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-26 13:12:33,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37019 states. [2018-11-26 13:12:34,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37019 to 37019. [2018-11-26 13:12:34,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37019 states. [2018-11-26 13:12:34,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37019 states to 37019 states and 128876 transitions. [2018-11-26 13:12:34,206 INFO L78 Accepts]: Start accepts. Automaton has 37019 states and 128876 transitions. Word has length 45 [2018-11-26 13:12:34,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:12:34,206 INFO L480 AbstractCegarLoop]: Abstraction has 37019 states and 128876 transitions. [2018-11-26 13:12:34,206 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-26 13:12:34,206 INFO L276 IsEmpty]: Start isEmpty. Operand 37019 states and 128876 transitions. [2018-11-26 13:12:34,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-26 13:12:34,211 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:12:34,211 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:12:34,211 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:12:34,212 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:12:34,212 INFO L82 PathProgramCache]: Analyzing trace with hash 1439202624, now seen corresponding path program 1 times [2018-11-26 13:12:34,212 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:12:34,212 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:12:34,215 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:34,215 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:12:34,215 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:34,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:12:34,303 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:12:34,303 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:12:34,303 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-26 13:12:34,303 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-26 13:12:34,304 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-26 13:12:34,304 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-26 13:12:34,304 INFO L87 Difference]: Start difference. First operand 37019 states and 128876 transitions. Second operand 4 states. [2018-11-26 13:12:34,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:12:34,903 INFO L93 Difference]: Finished difference Result 49059 states and 166861 transitions. [2018-11-26 13:12:34,903 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-26 13:12:34,903 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 58 [2018-11-26 13:12:34,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:12:35,005 INFO L225 Difference]: With dead ends: 49059 [2018-11-26 13:12:35,005 INFO L226 Difference]: Without dead ends: 49059 [2018-11-26 13:12:35,006 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-26 13:12:35,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49059 states. [2018-11-26 13:12:35,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49059 to 42063. [2018-11-26 13:12:35,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42063 states. [2018-11-26 13:12:35,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42063 states to 42063 states and 144442 transitions. [2018-11-26 13:12:35,745 INFO L78 Accepts]: Start accepts. Automaton has 42063 states and 144442 transitions. Word has length 58 [2018-11-26 13:12:35,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:12:35,745 INFO L480 AbstractCegarLoop]: Abstraction has 42063 states and 144442 transitions. [2018-11-26 13:12:35,745 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-26 13:12:35,745 INFO L276 IsEmpty]: Start isEmpty. Operand 42063 states and 144442 transitions. [2018-11-26 13:12:35,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-26 13:12:35,751 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:12:35,751 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:12:35,752 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:12:35,752 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:12:35,752 INFO L82 PathProgramCache]: Analyzing trace with hash -340567146, now seen corresponding path program 1 times [2018-11-26 13:12:35,752 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:12:35,752 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:12:35,754 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:35,754 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:12:35,754 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:35,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:12:35,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:12:35,834 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:12:35,834 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-26 13:12:35,834 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-26 13:12:35,834 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-26 13:12:35,835 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-26 13:12:35,835 INFO L87 Difference]: Start difference. First operand 42063 states and 144442 transitions. Second operand 4 states. [2018-11-26 13:12:37,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:12:37,047 INFO L93 Difference]: Finished difference Result 49638 states and 166843 transitions. [2018-11-26 13:12:37,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-26 13:12:37,048 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 58 [2018-11-26 13:12:37,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:12:37,145 INFO L225 Difference]: With dead ends: 49638 [2018-11-26 13:12:37,145 INFO L226 Difference]: Without dead ends: 49638 [2018-11-26 13:12:37,145 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-26 13:12:37,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49638 states. [2018-11-26 13:12:37,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49638 to 46731. [2018-11-26 13:12:37,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46731 states. [2018-11-26 13:12:37,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46731 states to 46731 states and 158580 transitions. [2018-11-26 13:12:37,912 INFO L78 Accepts]: Start accepts. Automaton has 46731 states and 158580 transitions. Word has length 58 [2018-11-26 13:12:37,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:12:37,912 INFO L480 AbstractCegarLoop]: Abstraction has 46731 states and 158580 transitions. [2018-11-26 13:12:37,912 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-26 13:12:37,912 INFO L276 IsEmpty]: Start isEmpty. Operand 46731 states and 158580 transitions. [2018-11-26 13:12:37,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-26 13:12:37,919 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:12:37,920 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:12:37,920 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:12:37,920 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:12:37,920 INFO L82 PathProgramCache]: Analyzing trace with hash 1012742551, now seen corresponding path program 1 times [2018-11-26 13:12:37,920 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:12:37,920 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:12:37,922 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:37,922 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:12:37,923 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:37,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:12:38,033 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:12:38,034 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:12:38,034 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-26 13:12:38,034 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-26 13:12:38,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-26 13:12:38,035 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-26 13:12:38,035 INFO L87 Difference]: Start difference. First operand 46731 states and 158580 transitions. Second operand 6 states. [2018-11-26 13:12:40,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:12:40,035 INFO L93 Difference]: Finished difference Result 69263 states and 233515 transitions. [2018-11-26 13:12:40,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-26 13:12:40,036 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2018-11-26 13:12:40,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:12:40,154 INFO L225 Difference]: With dead ends: 69263 [2018-11-26 13:12:40,155 INFO L226 Difference]: Without dead ends: 69231 [2018-11-26 13:12:40,155 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2018-11-26 13:12:40,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69231 states. [2018-11-26 13:12:40,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69231 to 55787. [2018-11-26 13:12:40,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55787 states. [2018-11-26 13:12:41,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55787 states to 55787 states and 187260 transitions. [2018-11-26 13:12:41,007 INFO L78 Accepts]: Start accepts. Automaton has 55787 states and 187260 transitions. Word has length 58 [2018-11-26 13:12:41,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:12:41,007 INFO L480 AbstractCegarLoop]: Abstraction has 55787 states and 187260 transitions. [2018-11-26 13:12:41,007 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-26 13:12:41,007 INFO L276 IsEmpty]: Start isEmpty. Operand 55787 states and 187260 transitions. [2018-11-26 13:12:41,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-26 13:12:41,027 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:12:41,027 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:12:41,027 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:12:41,027 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:12:41,028 INFO L82 PathProgramCache]: Analyzing trace with hash 1986386371, now seen corresponding path program 1 times [2018-11-26 13:12:41,028 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:12:41,028 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:12:41,031 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:41,031 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:12:41,031 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:41,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:12:41,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:12:41,109 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:12:41,109 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-26 13:12:41,109 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-26 13:12:41,109 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-26 13:12:41,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-26 13:12:41,110 INFO L87 Difference]: Start difference. First operand 55787 states and 187260 transitions. Second operand 4 states. [2018-11-26 13:12:42,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:12:42,311 INFO L93 Difference]: Finished difference Result 88791 states and 294033 transitions. [2018-11-26 13:12:42,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-26 13:12:42,311 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 72 [2018-11-26 13:12:42,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:12:42,481 INFO L225 Difference]: With dead ends: 88791 [2018-11-26 13:12:42,481 INFO L226 Difference]: Without dead ends: 88595 [2018-11-26 13:12:42,481 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-26 13:12:42,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88595 states. [2018-11-26 13:12:43,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88595 to 75939. [2018-11-26 13:12:43,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75939 states. [2018-11-26 13:12:43,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75939 states to 75939 states and 253670 transitions. [2018-11-26 13:12:43,758 INFO L78 Accepts]: Start accepts. Automaton has 75939 states and 253670 transitions. Word has length 72 [2018-11-26 13:12:43,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:12:43,758 INFO L480 AbstractCegarLoop]: Abstraction has 75939 states and 253670 transitions. [2018-11-26 13:12:43,758 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-26 13:12:43,758 INFO L276 IsEmpty]: Start isEmpty. Operand 75939 states and 253670 transitions. [2018-11-26 13:12:43,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-26 13:12:43,783 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:12:43,783 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:12:43,783 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:12:43,784 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:12:43,784 INFO L82 PathProgramCache]: Analyzing trace with hash -955271228, now seen corresponding path program 1 times [2018-11-26 13:12:43,784 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:12:43,784 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:12:43,785 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:43,786 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:12:43,786 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:43,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:12:43,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:12:43,947 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:12:43,947 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-26 13:12:43,948 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-26 13:12:43,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-26 13:12:43,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-26 13:12:43,948 INFO L87 Difference]: Start difference. First operand 75939 states and 253670 transitions. Second operand 8 states. [2018-11-26 13:12:47,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:12:47,426 INFO L93 Difference]: Finished difference Result 111793 states and 364107 transitions. [2018-11-26 13:12:47,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-26 13:12:47,426 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 72 [2018-11-26 13:12:47,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:12:47,647 INFO L225 Difference]: With dead ends: 111793 [2018-11-26 13:12:47,647 INFO L226 Difference]: Without dead ends: 111529 [2018-11-26 13:12:47,647 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2018-11-26 13:12:47,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111529 states. [2018-11-26 13:12:48,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111529 to 90424. [2018-11-26 13:12:48,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90424 states. [2018-11-26 13:12:49,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90424 states to 90424 states and 298936 transitions. [2018-11-26 13:12:49,178 INFO L78 Accepts]: Start accepts. Automaton has 90424 states and 298936 transitions. Word has length 72 [2018-11-26 13:12:49,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:12:49,179 INFO L480 AbstractCegarLoop]: Abstraction has 90424 states and 298936 transitions. [2018-11-26 13:12:49,179 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-26 13:12:49,179 INFO L276 IsEmpty]: Start isEmpty. Operand 90424 states and 298936 transitions. [2018-11-26 13:12:49,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-26 13:12:49,209 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:12:49,209 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:12:49,210 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:12:49,210 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:12:49,210 INFO L82 PathProgramCache]: Analyzing trace with hash -1248674235, now seen corresponding path program 1 times [2018-11-26 13:12:49,210 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:12:49,210 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:12:49,212 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:49,212 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:12:49,212 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:49,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:12:49,319 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:12:49,319 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:12:49,319 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-26 13:12:49,319 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-26 13:12:49,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-26 13:12:49,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-26 13:12:49,320 INFO L87 Difference]: Start difference. First operand 90424 states and 298936 transitions. Second operand 7 states. [2018-11-26 13:12:51,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:12:51,282 INFO L93 Difference]: Finished difference Result 114912 states and 379658 transitions. [2018-11-26 13:12:51,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-26 13:12:51,283 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 72 [2018-11-26 13:12:51,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:12:51,584 INFO L225 Difference]: With dead ends: 114912 [2018-11-26 13:12:51,585 INFO L226 Difference]: Without dead ends: 114848 [2018-11-26 13:12:51,585 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=83, Invalid=259, Unknown=0, NotChecked=0, Total=342 [2018-11-26 13:12:51,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114848 states. [2018-11-26 13:12:53,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114848 to 99644. [2018-11-26 13:12:53,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99644 states. [2018-11-26 13:12:53,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99644 states to 99644 states and 327295 transitions. [2018-11-26 13:12:53,693 INFO L78 Accepts]: Start accepts. Automaton has 99644 states and 327295 transitions. Word has length 72 [2018-11-26 13:12:53,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:12:53,694 INFO L480 AbstractCegarLoop]: Abstraction has 99644 states and 327295 transitions. [2018-11-26 13:12:53,694 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-26 13:12:53,694 INFO L276 IsEmpty]: Start isEmpty. Operand 99644 states and 327295 transitions. [2018-11-26 13:12:53,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-11-26 13:12:53,728 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:12:53,728 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:12:53,728 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:12:53,728 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:12:53,728 INFO L82 PathProgramCache]: Analyzing trace with hash 21000313, now seen corresponding path program 1 times [2018-11-26 13:12:53,729 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:12:53,729 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:12:53,730 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:53,730 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:12:53,730 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:53,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:12:53,763 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:12:53,763 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:12:53,764 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-26 13:12:53,764 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-26 13:12:53,764 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-26 13:12:53,764 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-26 13:12:53,765 INFO L87 Difference]: Start difference. First operand 99644 states and 327295 transitions. Second operand 3 states. [2018-11-26 13:12:54,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:12:54,463 INFO L93 Difference]: Finished difference Result 149994 states and 480376 transitions. [2018-11-26 13:12:54,463 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-26 13:12:54,463 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 74 [2018-11-26 13:12:54,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:12:54,729 INFO L225 Difference]: With dead ends: 149994 [2018-11-26 13:12:54,729 INFO L226 Difference]: Without dead ends: 149994 [2018-11-26 13:12:54,729 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-26 13:12:55,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149994 states. [2018-11-26 13:12:56,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149994 to 127827. [2018-11-26 13:12:56,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127827 states. [2018-11-26 13:12:56,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127827 states to 127827 states and 411652 transitions. [2018-11-26 13:12:56,711 INFO L78 Accepts]: Start accepts. Automaton has 127827 states and 411652 transitions. Word has length 74 [2018-11-26 13:12:56,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:12:56,711 INFO L480 AbstractCegarLoop]: Abstraction has 127827 states and 411652 transitions. [2018-11-26 13:12:56,711 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-26 13:12:56,711 INFO L276 IsEmpty]: Start isEmpty. Operand 127827 states and 411652 transitions. [2018-11-26 13:12:56,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-11-26 13:12:56,757 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:12:56,757 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:12:56,757 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:12:56,757 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:12:56,757 INFO L82 PathProgramCache]: Analyzing trace with hash 744217605, now seen corresponding path program 1 times [2018-11-26 13:12:56,757 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:12:56,757 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:12:56,758 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:56,758 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:12:56,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:12:56,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:12:56,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:12:56,844 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:12:56,844 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-26 13:12:56,844 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-26 13:12:56,845 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-26 13:12:56,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-26 13:12:56,845 INFO L87 Difference]: Start difference. First operand 127827 states and 411652 transitions. Second operand 8 states. [2018-11-26 13:12:59,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:12:59,662 INFO L93 Difference]: Finished difference Result 145051 states and 462606 transitions. [2018-11-26 13:12:59,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-26 13:12:59,663 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 78 [2018-11-26 13:12:59,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:12:59,955 INFO L225 Difference]: With dead ends: 145051 [2018-11-26 13:12:59,955 INFO L226 Difference]: Without dead ends: 144987 [2018-11-26 13:12:59,956 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=165, Invalid=591, Unknown=0, NotChecked=0, Total=756 [2018-11-26 13:13:00,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144987 states. [2018-11-26 13:13:01,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144987 to 128275. [2018-11-26 13:13:01,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128275 states. [2018-11-26 13:13:02,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128275 states to 128275 states and 413192 transitions. [2018-11-26 13:13:02,144 INFO L78 Accepts]: Start accepts. Automaton has 128275 states and 413192 transitions. Word has length 78 [2018-11-26 13:13:02,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:02,145 INFO L480 AbstractCegarLoop]: Abstraction has 128275 states and 413192 transitions. [2018-11-26 13:13:02,145 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-26 13:13:02,145 INFO L276 IsEmpty]: Start isEmpty. Operand 128275 states and 413192 transitions. [2018-11-26 13:13:02,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-11-26 13:13:02,204 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:02,205 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:02,205 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:02,205 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:02,205 INFO L82 PathProgramCache]: Analyzing trace with hash 1691318381, now seen corresponding path program 1 times [2018-11-26 13:13:02,205 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:02,205 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:02,207 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:02,207 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:02,207 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:02,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:02,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:02,293 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:02,293 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-26 13:13:02,294 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-26 13:13:02,294 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-26 13:13:02,294 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-26 13:13:02,294 INFO L87 Difference]: Start difference. First operand 128275 states and 413192 transitions. Second operand 6 states. [2018-11-26 13:13:03,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:03,556 INFO L93 Difference]: Finished difference Result 160065 states and 514282 transitions. [2018-11-26 13:13:03,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-26 13:13:03,556 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 81 [2018-11-26 13:13:03,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:03,849 INFO L225 Difference]: With dead ends: 160065 [2018-11-26 13:13:03,849 INFO L226 Difference]: Without dead ends: 160065 [2018-11-26 13:13:03,850 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-26 13:13:04,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160065 states. [2018-11-26 13:13:06,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160065 to 130671. [2018-11-26 13:13:06,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130671 states. [2018-11-26 13:13:06,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130671 states to 130671 states and 420722 transitions. [2018-11-26 13:13:06,409 INFO L78 Accepts]: Start accepts. Automaton has 130671 states and 420722 transitions. Word has length 81 [2018-11-26 13:13:06,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:06,410 INFO L480 AbstractCegarLoop]: Abstraction has 130671 states and 420722 transitions. [2018-11-26 13:13:06,410 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-26 13:13:06,410 INFO L276 IsEmpty]: Start isEmpty. Operand 130671 states and 420722 transitions. [2018-11-26 13:13:06,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-11-26 13:13:06,460 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:06,460 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:06,460 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:06,460 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:06,460 INFO L82 PathProgramCache]: Analyzing trace with hash -878168018, now seen corresponding path program 1 times [2018-11-26 13:13:06,461 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:06,461 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:06,462 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:06,462 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:06,462 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:06,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:06,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:06,521 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:06,521 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-26 13:13:06,521 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-26 13:13:06,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-26 13:13:06,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-26 13:13:06,522 INFO L87 Difference]: Start difference. First operand 130671 states and 420722 transitions. Second operand 3 states. [2018-11-26 13:13:07,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:07,037 INFO L93 Difference]: Finished difference Result 126035 states and 401713 transitions. [2018-11-26 13:13:07,038 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-26 13:13:07,038 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 81 [2018-11-26 13:13:07,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:07,253 INFO L225 Difference]: With dead ends: 126035 [2018-11-26 13:13:07,254 INFO L226 Difference]: Without dead ends: 125771 [2018-11-26 13:13:07,254 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-26 13:13:07,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125771 states. [2018-11-26 13:13:09,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125771 to 125563. [2018-11-26 13:13:09,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125563 states. [2018-11-26 13:13:09,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125563 states to 125563 states and 400455 transitions. [2018-11-26 13:13:09,711 INFO L78 Accepts]: Start accepts. Automaton has 125563 states and 400455 transitions. Word has length 81 [2018-11-26 13:13:09,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:09,711 INFO L480 AbstractCegarLoop]: Abstraction has 125563 states and 400455 transitions. [2018-11-26 13:13:09,711 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-26 13:13:09,711 INFO L276 IsEmpty]: Start isEmpty. Operand 125563 states and 400455 transitions. [2018-11-26 13:13:09,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-11-26 13:13:09,760 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:09,760 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:09,761 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:09,761 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:09,761 INFO L82 PathProgramCache]: Analyzing trace with hash 1825660350, now seen corresponding path program 1 times [2018-11-26 13:13:09,761 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:09,761 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:09,762 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:09,762 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:09,762 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:09,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:09,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:09,855 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:09,855 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-26 13:13:09,855 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-26 13:13:09,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-26 13:13:09,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-26 13:13:09,856 INFO L87 Difference]: Start difference. First operand 125563 states and 400455 transitions. Second operand 6 states. [2018-11-26 13:13:11,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:11,068 INFO L93 Difference]: Finished difference Result 126351 states and 402250 transitions. [2018-11-26 13:13:11,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-26 13:13:11,069 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 81 [2018-11-26 13:13:11,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:11,315 INFO L225 Difference]: With dead ends: 126351 [2018-11-26 13:13:11,315 INFO L226 Difference]: Without dead ends: 126351 [2018-11-26 13:13:11,315 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-26 13:13:11,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126351 states. [2018-11-26 13:13:12,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126351 to 124144. [2018-11-26 13:13:12,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124144 states. [2018-11-26 13:13:13,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124144 states to 124144 states and 396466 transitions. [2018-11-26 13:13:13,108 INFO L78 Accepts]: Start accepts. Automaton has 124144 states and 396466 transitions. Word has length 81 [2018-11-26 13:13:13,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:13,109 INFO L480 AbstractCegarLoop]: Abstraction has 124144 states and 396466 transitions. [2018-11-26 13:13:13,109 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-26 13:13:13,109 INFO L276 IsEmpty]: Start isEmpty. Operand 124144 states and 396466 transitions. [2018-11-26 13:13:13,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-11-26 13:13:13,156 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:13,156 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:13,157 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:13,157 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:13,157 INFO L82 PathProgramCache]: Analyzing trace with hash -109999937, now seen corresponding path program 1 times [2018-11-26 13:13:13,157 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:13,157 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:13,158 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:13,158 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:13,158 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:13,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:13,277 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:13,277 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:13,277 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-26 13:13:13,277 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-26 13:13:13,278 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-26 13:13:13,278 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-26 13:13:13,278 INFO L87 Difference]: Start difference. First operand 124144 states and 396466 transitions. Second operand 7 states. [2018-11-26 13:13:15,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:15,021 INFO L93 Difference]: Finished difference Result 131826 states and 419584 transitions. [2018-11-26 13:13:15,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-26 13:13:15,022 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 81 [2018-11-26 13:13:15,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:15,280 INFO L225 Difference]: With dead ends: 131826 [2018-11-26 13:13:15,280 INFO L226 Difference]: Without dead ends: 131826 [2018-11-26 13:13:15,280 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-11-26 13:13:15,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131826 states. [2018-11-26 13:13:16,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131826 to 126150. [2018-11-26 13:13:16,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126150 states. [2018-11-26 13:13:17,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126150 states to 126150 states and 402000 transitions. [2018-11-26 13:13:17,103 INFO L78 Accepts]: Start accepts. Automaton has 126150 states and 402000 transitions. Word has length 81 [2018-11-26 13:13:17,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:17,103 INFO L480 AbstractCegarLoop]: Abstraction has 126150 states and 402000 transitions. [2018-11-26 13:13:17,103 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-26 13:13:17,103 INFO L276 IsEmpty]: Start isEmpty. Operand 126150 states and 402000 transitions. [2018-11-26 13:13:17,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-11-26 13:13:17,151 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:17,151 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:17,151 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:17,152 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:17,152 INFO L82 PathProgramCache]: Analyzing trace with hash 219765824, now seen corresponding path program 1 times [2018-11-26 13:13:17,152 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:17,152 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:17,153 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:17,153 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:17,153 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:17,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:17,217 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:17,218 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:17,218 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-26 13:13:17,218 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-26 13:13:17,218 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-26 13:13:17,218 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-26 13:13:17,219 INFO L87 Difference]: Start difference. First operand 126150 states and 402000 transitions. Second operand 5 states. [2018-11-26 13:13:17,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:17,322 INFO L93 Difference]: Finished difference Result 15022 states and 38122 transitions. [2018-11-26 13:13:17,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-26 13:13:17,323 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 81 [2018-11-26 13:13:17,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:17,340 INFO L225 Difference]: With dead ends: 15022 [2018-11-26 13:13:17,340 INFO L226 Difference]: Without dead ends: 11832 [2018-11-26 13:13:17,341 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-26 13:13:17,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11832 states. [2018-11-26 13:13:17,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11832 to 9190. [2018-11-26 13:13:17,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9190 states. [2018-11-26 13:13:17,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9190 states to 9190 states and 23229 transitions. [2018-11-26 13:13:17,471 INFO L78 Accepts]: Start accepts. Automaton has 9190 states and 23229 transitions. Word has length 81 [2018-11-26 13:13:17,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:17,471 INFO L480 AbstractCegarLoop]: Abstraction has 9190 states and 23229 transitions. [2018-11-26 13:13:17,471 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-26 13:13:17,471 INFO L276 IsEmpty]: Start isEmpty. Operand 9190 states and 23229 transitions. [2018-11-26 13:13:17,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-26 13:13:17,480 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:17,480 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:17,480 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:17,480 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:17,481 INFO L82 PathProgramCache]: Analyzing trace with hash 1241095565, now seen corresponding path program 1 times [2018-11-26 13:13:17,481 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:17,481 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:17,482 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:17,482 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:17,482 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:17,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:17,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:17,615 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:17,616 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-26 13:13:17,616 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-26 13:13:17,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-26 13:13:17,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-11-26 13:13:17,617 INFO L87 Difference]: Start difference. First operand 9190 states and 23229 transitions. Second operand 7 states. [2018-11-26 13:13:18,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:18,208 INFO L93 Difference]: Finished difference Result 10010 states and 25092 transitions. [2018-11-26 13:13:18,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-26 13:13:18,209 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 125 [2018-11-26 13:13:18,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:18,223 INFO L225 Difference]: With dead ends: 10010 [2018-11-26 13:13:18,224 INFO L226 Difference]: Without dead ends: 10010 [2018-11-26 13:13:18,224 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-11-26 13:13:18,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10010 states. [2018-11-26 13:13:18,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10010 to 9262. [2018-11-26 13:13:18,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9262 states. [2018-11-26 13:13:18,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9262 states to 9262 states and 23391 transitions. [2018-11-26 13:13:18,369 INFO L78 Accepts]: Start accepts. Automaton has 9262 states and 23391 transitions. Word has length 125 [2018-11-26 13:13:18,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:18,370 INFO L480 AbstractCegarLoop]: Abstraction has 9262 states and 23391 transitions. [2018-11-26 13:13:18,370 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-26 13:13:18,370 INFO L276 IsEmpty]: Start isEmpty. Operand 9262 states and 23391 transitions. [2018-11-26 13:13:18,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-26 13:13:18,383 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:18,383 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:18,383 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:18,384 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:18,384 INFO L82 PathProgramCache]: Analyzing trace with hash -1446211312, now seen corresponding path program 1 times [2018-11-26 13:13:18,384 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:18,384 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:18,386 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:18,386 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:18,386 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:18,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:18,479 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:18,480 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:18,480 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-26 13:13:18,480 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-26 13:13:18,480 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-26 13:13:18,481 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-26 13:13:18,481 INFO L87 Difference]: Start difference. First operand 9262 states and 23391 transitions. Second operand 5 states. [2018-11-26 13:13:18,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:18,900 INFO L93 Difference]: Finished difference Result 9908 states and 24738 transitions. [2018-11-26 13:13:18,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-26 13:13:18,901 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 125 [2018-11-26 13:13:18,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:18,915 INFO L225 Difference]: With dead ends: 9908 [2018-11-26 13:13:18,916 INFO L226 Difference]: Without dead ends: 9908 [2018-11-26 13:13:18,916 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-26 13:13:18,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9908 states. [2018-11-26 13:13:18,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9908 to 9531. [2018-11-26 13:13:18,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9531 states. [2018-11-26 13:13:19,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9531 states to 9531 states and 23965 transitions. [2018-11-26 13:13:19,009 INFO L78 Accepts]: Start accepts. Automaton has 9531 states and 23965 transitions. Word has length 125 [2018-11-26 13:13:19,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:19,010 INFO L480 AbstractCegarLoop]: Abstraction has 9531 states and 23965 transitions. [2018-11-26 13:13:19,010 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-26 13:13:19,010 INFO L276 IsEmpty]: Start isEmpty. Operand 9531 states and 23965 transitions. [2018-11-26 13:13:19,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-26 13:13:19,019 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:19,019 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:19,019 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:19,019 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:19,019 INFO L82 PathProgramCache]: Analyzing trace with hash -40867375, now seen corresponding path program 1 times [2018-11-26 13:13:19,020 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:19,020 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:19,021 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:19,021 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:19,021 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:19,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:19,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:19,116 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:19,116 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-26 13:13:19,116 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-26 13:13:19,117 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-26 13:13:19,117 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-26 13:13:19,117 INFO L87 Difference]: Start difference. First operand 9531 states and 23965 transitions. Second operand 4 states. [2018-11-26 13:13:19,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:19,333 INFO L93 Difference]: Finished difference Result 10128 states and 25362 transitions. [2018-11-26 13:13:19,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-26 13:13:19,333 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 125 [2018-11-26 13:13:19,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:19,348 INFO L225 Difference]: With dead ends: 10128 [2018-11-26 13:13:19,348 INFO L226 Difference]: Without dead ends: 10100 [2018-11-26 13:13:19,348 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-26 13:13:19,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10100 states. [2018-11-26 13:13:19,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10100 to 9754. [2018-11-26 13:13:19,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9754 states. [2018-11-26 13:13:19,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9754 states to 9754 states and 24467 transitions. [2018-11-26 13:13:19,483 INFO L78 Accepts]: Start accepts. Automaton has 9754 states and 24467 transitions. Word has length 125 [2018-11-26 13:13:19,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:19,483 INFO L480 AbstractCegarLoop]: Abstraction has 9754 states and 24467 transitions. [2018-11-26 13:13:19,483 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-26 13:13:19,483 INFO L276 IsEmpty]: Start isEmpty. Operand 9754 states and 24467 transitions. [2018-11-26 13:13:19,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-26 13:13:19,491 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:19,492 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:19,492 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:19,492 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:19,492 INFO L82 PathProgramCache]: Analyzing trace with hash -1224214672, now seen corresponding path program 1 times [2018-11-26 13:13:19,492 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:19,492 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:19,493 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:19,493 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:19,493 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:19,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:19,638 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:19,639 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:19,639 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-26 13:13:19,639 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-26 13:13:19,639 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-26 13:13:19,639 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-26 13:13:19,639 INFO L87 Difference]: Start difference. First operand 9754 states and 24467 transitions. Second operand 8 states. [2018-11-26 13:13:22,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:22,248 INFO L93 Difference]: Finished difference Result 26186 states and 62182 transitions. [2018-11-26 13:13:22,248 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-26 13:13:22,249 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 125 [2018-11-26 13:13:22,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:22,278 INFO L225 Difference]: With dead ends: 26186 [2018-11-26 13:13:22,278 INFO L226 Difference]: Without dead ends: 25944 [2018-11-26 13:13:22,278 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=133, Invalid=287, Unknown=0, NotChecked=0, Total=420 [2018-11-26 13:13:22,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25944 states. [2018-11-26 13:13:22,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25944 to 17342. [2018-11-26 13:13:22,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17342 states. [2018-11-26 13:13:22,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17342 states to 17342 states and 43112 transitions. [2018-11-26 13:13:22,522 INFO L78 Accepts]: Start accepts. Automaton has 17342 states and 43112 transitions. Word has length 125 [2018-11-26 13:13:22,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:22,522 INFO L480 AbstractCegarLoop]: Abstraction has 17342 states and 43112 transitions. [2018-11-26 13:13:22,522 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-26 13:13:22,522 INFO L276 IsEmpty]: Start isEmpty. Operand 17342 states and 43112 transitions. [2018-11-26 13:13:22,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-26 13:13:22,537 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:22,537 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:22,537 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:22,538 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:22,538 INFO L82 PathProgramCache]: Analyzing trace with hash 1331794229, now seen corresponding path program 1 times [2018-11-26 13:13:22,538 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:22,538 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:22,539 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:22,539 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:22,539 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:22,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:22,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:22,622 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:22,622 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-26 13:13:22,623 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-26 13:13:22,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-26 13:13:22,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-26 13:13:22,623 INFO L87 Difference]: Start difference. First operand 17342 states and 43112 transitions. Second operand 6 states. [2018-11-26 13:13:23,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:23,576 INFO L93 Difference]: Finished difference Result 38796 states and 95861 transitions. [2018-11-26 13:13:23,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-26 13:13:23,576 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 125 [2018-11-26 13:13:23,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:23,625 INFO L225 Difference]: With dead ends: 38796 [2018-11-26 13:13:23,625 INFO L226 Difference]: Without dead ends: 38796 [2018-11-26 13:13:23,626 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2018-11-26 13:13:23,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38796 states. [2018-11-26 13:13:23,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38796 to 19128. [2018-11-26 13:13:23,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19128 states. [2018-11-26 13:13:23,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19128 states to 19128 states and 47668 transitions. [2018-11-26 13:13:23,940 INFO L78 Accepts]: Start accepts. Automaton has 19128 states and 47668 transitions. Word has length 125 [2018-11-26 13:13:23,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:23,940 INFO L480 AbstractCegarLoop]: Abstraction has 19128 states and 47668 transitions. [2018-11-26 13:13:23,940 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-26 13:13:23,940 INFO L276 IsEmpty]: Start isEmpty. Operand 19128 states and 47668 transitions. [2018-11-26 13:13:23,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-26 13:13:23,959 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:23,959 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:23,959 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:23,959 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:23,959 INFO L82 PathProgramCache]: Analyzing trace with hash 283304405, now seen corresponding path program 1 times [2018-11-26 13:13:23,959 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:23,959 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:23,961 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:23,961 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:23,961 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:23,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:24,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:24,127 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:24,127 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-26 13:13:24,128 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-26 13:13:24,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-26 13:13:24,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-26 13:13:24,128 INFO L87 Difference]: Start difference. First operand 19128 states and 47668 transitions. Second operand 6 states. [2018-11-26 13:13:24,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:24,634 INFO L93 Difference]: Finished difference Result 20465 states and 50483 transitions. [2018-11-26 13:13:24,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-26 13:13:24,634 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 125 [2018-11-26 13:13:24,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:24,657 INFO L225 Difference]: With dead ends: 20465 [2018-11-26 13:13:24,657 INFO L226 Difference]: Without dead ends: 20465 [2018-11-26 13:13:24,657 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-11-26 13:13:24,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20465 states. [2018-11-26 13:13:24,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20465 to 19186. [2018-11-26 13:13:24,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19186 states. [2018-11-26 13:13:24,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19186 states to 19186 states and 47784 transitions. [2018-11-26 13:13:24,848 INFO L78 Accepts]: Start accepts. Automaton has 19186 states and 47784 transitions. Word has length 125 [2018-11-26 13:13:24,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:24,849 INFO L480 AbstractCegarLoop]: Abstraction has 19186 states and 47784 transitions. [2018-11-26 13:13:24,849 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-26 13:13:24,849 INFO L276 IsEmpty]: Start isEmpty. Operand 19186 states and 47784 transitions. [2018-11-26 13:13:24,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-26 13:13:24,865 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:24,865 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:24,865 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:24,865 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:24,865 INFO L82 PathProgramCache]: Analyzing trace with hash -855839804, now seen corresponding path program 1 times [2018-11-26 13:13:24,866 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:24,866 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:24,867 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:24,867 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:24,867 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:24,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:25,015 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:25,015 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:25,015 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-26 13:13:25,015 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-26 13:13:25,016 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-26 13:13:25,016 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-26 13:13:25,016 INFO L87 Difference]: Start difference. First operand 19186 states and 47784 transitions. Second operand 8 states. [2018-11-26 13:13:25,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:25,579 INFO L93 Difference]: Finished difference Result 28711 states and 70319 transitions. [2018-11-26 13:13:25,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-26 13:13:25,579 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 125 [2018-11-26 13:13:25,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:25,613 INFO L225 Difference]: With dead ends: 28711 [2018-11-26 13:13:25,613 INFO L226 Difference]: Without dead ends: 28632 [2018-11-26 13:13:25,614 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2018-11-26 13:13:25,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28632 states. [2018-11-26 13:13:25,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28632 to 23771. [2018-11-26 13:13:25,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23771 states. [2018-11-26 13:13:25,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23771 states to 23771 states and 59039 transitions. [2018-11-26 13:13:25,918 INFO L78 Accepts]: Start accepts. Automaton has 23771 states and 59039 transitions. Word has length 125 [2018-11-26 13:13:25,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:25,918 INFO L480 AbstractCegarLoop]: Abstraction has 23771 states and 59039 transitions. [2018-11-26 13:13:25,918 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-26 13:13:25,918 INFO L276 IsEmpty]: Start isEmpty. Operand 23771 states and 59039 transitions. [2018-11-26 13:13:25,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-26 13:13:25,941 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:25,941 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:25,941 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:25,941 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:25,941 INFO L82 PathProgramCache]: Analyzing trace with hash -1719044832, now seen corresponding path program 2 times [2018-11-26 13:13:25,941 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:25,942 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:25,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:25,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:25,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:25,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:26,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:26,097 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:26,098 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-26 13:13:26,098 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-26 13:13:26,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-26 13:13:26,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-11-26 13:13:26,099 INFO L87 Difference]: Start difference. First operand 23771 states and 59039 transitions. Second operand 9 states. [2018-11-26 13:13:27,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:27,090 INFO L93 Difference]: Finished difference Result 25846 states and 63640 transitions. [2018-11-26 13:13:27,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-26 13:13:27,091 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 125 [2018-11-26 13:13:27,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:27,123 INFO L225 Difference]: With dead ends: 25846 [2018-11-26 13:13:27,123 INFO L226 Difference]: Without dead ends: 25846 [2018-11-26 13:13:27,124 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=107, Invalid=235, Unknown=0, NotChecked=0, Total=342 [2018-11-26 13:13:27,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25846 states. [2018-11-26 13:13:27,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25846 to 24433. [2018-11-26 13:13:27,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24433 states. [2018-11-26 13:13:27,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24433 states to 24433 states and 60587 transitions. [2018-11-26 13:13:27,420 INFO L78 Accepts]: Start accepts. Automaton has 24433 states and 60587 transitions. Word has length 125 [2018-11-26 13:13:27,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:27,420 INFO L480 AbstractCegarLoop]: Abstraction has 24433 states and 60587 transitions. [2018-11-26 13:13:27,420 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-26 13:13:27,420 INFO L276 IsEmpty]: Start isEmpty. Operand 24433 states and 60587 transitions. [2018-11-26 13:13:27,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-26 13:13:27,445 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:27,445 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:27,445 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:27,445 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:27,445 INFO L82 PathProgramCache]: Analyzing trace with hash -2048810593, now seen corresponding path program 1 times [2018-11-26 13:13:27,445 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:27,446 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:27,447 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:27,447 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-26 13:13:27,447 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:27,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:27,631 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:27,631 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:27,631 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-26 13:13:27,631 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-26 13:13:27,632 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-26 13:13:27,632 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-11-26 13:13:27,632 INFO L87 Difference]: Start difference. First operand 24433 states and 60587 transitions. Second operand 9 states. [2018-11-26 13:13:28,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:28,860 INFO L93 Difference]: Finished difference Result 29203 states and 71067 transitions. [2018-11-26 13:13:28,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-26 13:13:28,861 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 125 [2018-11-26 13:13:28,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:28,898 INFO L225 Difference]: With dead ends: 29203 [2018-11-26 13:13:28,898 INFO L226 Difference]: Without dead ends: 29118 [2018-11-26 13:13:28,898 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=85, Invalid=221, Unknown=0, NotChecked=0, Total=306 [2018-11-26 13:13:28,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29118 states. [2018-11-26 13:13:29,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29118 to 26341. [2018-11-26 13:13:29,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26341 states. [2018-11-26 13:13:29,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26341 states to 26341 states and 64947 transitions. [2018-11-26 13:13:29,233 INFO L78 Accepts]: Start accepts. Automaton has 26341 states and 64947 transitions. Word has length 125 [2018-11-26 13:13:29,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:29,233 INFO L480 AbstractCegarLoop]: Abstraction has 26341 states and 64947 transitions. [2018-11-26 13:13:29,233 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-26 13:13:29,233 INFO L276 IsEmpty]: Start isEmpty. Operand 26341 states and 64947 transitions. [2018-11-26 13:13:29,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-26 13:13:29,262 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:29,262 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:29,263 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:29,263 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:29,263 INFO L82 PathProgramCache]: Analyzing trace with hash -604502304, now seen corresponding path program 1 times [2018-11-26 13:13:29,263 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:29,263 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:29,264 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:29,264 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:29,264 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:29,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:29,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:29,393 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:29,394 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-26 13:13:29,394 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-26 13:13:29,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-26 13:13:29,394 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-26 13:13:29,395 INFO L87 Difference]: Start difference. First operand 26341 states and 64947 transitions. Second operand 6 states. [2018-11-26 13:13:29,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:29,756 INFO L93 Difference]: Finished difference Result 13137 states and 31368 transitions. [2018-11-26 13:13:29,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-26 13:13:29,756 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 125 [2018-11-26 13:13:29,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:29,771 INFO L225 Difference]: With dead ends: 13137 [2018-11-26 13:13:29,771 INFO L226 Difference]: Without dead ends: 13137 [2018-11-26 13:13:29,771 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-26 13:13:29,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13137 states. [2018-11-26 13:13:29,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13137 to 9814. [2018-11-26 13:13:29,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9814 states. [2018-11-26 13:13:29,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9814 states to 9814 states and 23462 transitions. [2018-11-26 13:13:29,887 INFO L78 Accepts]: Start accepts. Automaton has 9814 states and 23462 transitions. Word has length 125 [2018-11-26 13:13:29,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:29,888 INFO L480 AbstractCegarLoop]: Abstraction has 9814 states and 23462 transitions. [2018-11-26 13:13:29,888 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-26 13:13:29,888 INFO L276 IsEmpty]: Start isEmpty. Operand 9814 states and 23462 transitions. [2018-11-26 13:13:29,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-26 13:13:29,897 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:29,897 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:29,898 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:29,898 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:29,898 INFO L82 PathProgramCache]: Analyzing trace with hash 1950787140, now seen corresponding path program 1 times [2018-11-26 13:13:29,898 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:29,898 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:29,900 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:29,900 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:29,900 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:29,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:29,955 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:29,955 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:29,955 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-26 13:13:29,955 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-26 13:13:29,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-26 13:13:29,955 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-26 13:13:29,956 INFO L87 Difference]: Start difference. First operand 9814 states and 23462 transitions. Second operand 4 states. [2018-11-26 13:13:30,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:30,046 INFO L93 Difference]: Finished difference Result 9654 states and 22982 transitions. [2018-11-26 13:13:30,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-26 13:13:30,047 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 127 [2018-11-26 13:13:30,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:30,058 INFO L225 Difference]: With dead ends: 9654 [2018-11-26 13:13:30,058 INFO L226 Difference]: Without dead ends: 9654 [2018-11-26 13:13:30,059 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-26 13:13:30,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9654 states. [2018-11-26 13:13:30,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9654 to 8946. [2018-11-26 13:13:30,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8946 states. [2018-11-26 13:13:30,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8946 states to 8946 states and 21317 transitions. [2018-11-26 13:13:30,156 INFO L78 Accepts]: Start accepts. Automaton has 8946 states and 21317 transitions. Word has length 127 [2018-11-26 13:13:30,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:30,156 INFO L480 AbstractCegarLoop]: Abstraction has 8946 states and 21317 transitions. [2018-11-26 13:13:30,156 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-26 13:13:30,156 INFO L276 IsEmpty]: Start isEmpty. Operand 8946 states and 21317 transitions. [2018-11-26 13:13:30,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-26 13:13:30,164 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:30,165 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:30,165 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:30,165 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:30,165 INFO L82 PathProgramCache]: Analyzing trace with hash 902297316, now seen corresponding path program 1 times [2018-11-26 13:13:30,165 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:30,165 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:30,166 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:30,166 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:30,166 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:30,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:30,265 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:30,266 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:30,266 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-26 13:13:30,266 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-26 13:13:30,266 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-26 13:13:30,267 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-26 13:13:30,267 INFO L87 Difference]: Start difference. First operand 8946 states and 21317 transitions. Second operand 5 states. [2018-11-26 13:13:30,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:30,525 INFO L93 Difference]: Finished difference Result 9394 states and 22421 transitions. [2018-11-26 13:13:30,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-26 13:13:30,526 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 127 [2018-11-26 13:13:30,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:30,537 INFO L225 Difference]: With dead ends: 9394 [2018-11-26 13:13:30,537 INFO L226 Difference]: Without dead ends: 9362 [2018-11-26 13:13:30,537 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-26 13:13:30,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9362 states. [2018-11-26 13:13:30,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9362 to 8747. [2018-11-26 13:13:30,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8747 states. [2018-11-26 13:13:30,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8747 states to 8747 states and 20821 transitions. [2018-11-26 13:13:30,626 INFO L78 Accepts]: Start accepts. Automaton has 8747 states and 20821 transitions. Word has length 127 [2018-11-26 13:13:30,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:30,627 INFO L480 AbstractCegarLoop]: Abstraction has 8747 states and 20821 transitions. [2018-11-26 13:13:30,627 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-26 13:13:30,627 INFO L276 IsEmpty]: Start isEmpty. Operand 8747 states and 20821 transitions. [2018-11-26 13:13:30,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-26 13:13:30,635 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:30,635 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:30,635 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:30,635 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:30,636 INFO L82 PathProgramCache]: Analyzing trace with hash 2147061797, now seen corresponding path program 1 times [2018-11-26 13:13:30,636 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:30,636 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:30,637 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:30,637 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:30,637 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:30,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:30,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:30,738 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:30,738 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-26 13:13:30,739 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-26 13:13:30,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-26 13:13:30,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-26 13:13:30,739 INFO L87 Difference]: Start difference. First operand 8747 states and 20821 transitions. Second operand 6 states. [2018-11-26 13:13:31,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:31,555 INFO L93 Difference]: Finished difference Result 11466 states and 26592 transitions. [2018-11-26 13:13:31,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-26 13:13:31,556 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 127 [2018-11-26 13:13:31,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:31,569 INFO L225 Difference]: With dead ends: 11466 [2018-11-26 13:13:31,569 INFO L226 Difference]: Without dead ends: 11281 [2018-11-26 13:13:31,569 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-11-26 13:13:31,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11281 states. [2018-11-26 13:13:31,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11281 to 9855. [2018-11-26 13:13:31,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9855 states. [2018-11-26 13:13:31,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9855 states to 9855 states and 23410 transitions. [2018-11-26 13:13:31,678 INFO L78 Accepts]: Start accepts. Automaton has 9855 states and 23410 transitions. Word has length 127 [2018-11-26 13:13:31,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:31,678 INFO L480 AbstractCegarLoop]: Abstraction has 9855 states and 23410 transitions. [2018-11-26 13:13:31,678 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-26 13:13:31,678 INFO L276 IsEmpty]: Start isEmpty. Operand 9855 states and 23410 transitions. [2018-11-26 13:13:31,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-26 13:13:31,688 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:31,688 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:31,688 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:31,688 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:31,689 INFO L82 PathProgramCache]: Analyzing trace with hash 1663386470, now seen corresponding path program 1 times [2018-11-26 13:13:31,689 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:31,689 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:31,690 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:31,690 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:31,690 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:31,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:31,799 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:31,799 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:31,799 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-26 13:13:31,799 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-26 13:13:31,800 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-26 13:13:31,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-26 13:13:31,800 INFO L87 Difference]: Start difference. First operand 9855 states and 23410 transitions. Second operand 7 states. [2018-11-26 13:13:32,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:32,604 INFO L93 Difference]: Finished difference Result 12966 states and 30242 transitions. [2018-11-26 13:13:32,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-26 13:13:32,605 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 127 [2018-11-26 13:13:32,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:32,619 INFO L225 Difference]: With dead ends: 12966 [2018-11-26 13:13:32,620 INFO L226 Difference]: Without dead ends: 12966 [2018-11-26 13:13:32,620 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 5 SyntacticMatches, 5 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=88, Unknown=0, NotChecked=0, Total=132 [2018-11-26 13:13:32,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12966 states. [2018-11-26 13:13:32,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12966 to 10398. [2018-11-26 13:13:32,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10398 states. [2018-11-26 13:13:32,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10398 states to 10398 states and 24567 transitions. [2018-11-26 13:13:32,737 INFO L78 Accepts]: Start accepts. Automaton has 10398 states and 24567 transitions. Word has length 127 [2018-11-26 13:13:32,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:32,737 INFO L480 AbstractCegarLoop]: Abstraction has 10398 states and 24567 transitions. [2018-11-26 13:13:32,737 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-26 13:13:32,737 INFO L276 IsEmpty]: Start isEmpty. Operand 10398 states and 24567 transitions. [2018-11-26 13:13:32,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-26 13:13:32,746 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:32,746 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:32,746 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:32,747 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:32,747 INFO L82 PathProgramCache]: Analyzing trace with hash 1410400133, now seen corresponding path program 2 times [2018-11-26 13:13:32,747 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:32,747 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:32,748 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:32,748 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:32,748 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:32,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:32,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:32,867 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:32,868 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-26 13:13:32,868 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-26 13:13:32,868 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-26 13:13:32,868 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-26 13:13:32,869 INFO L87 Difference]: Start difference. First operand 10398 states and 24567 transitions. Second operand 8 states. [2018-11-26 13:13:33,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:33,878 INFO L93 Difference]: Finished difference Result 14094 states and 32941 transitions. [2018-11-26 13:13:33,879 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-26 13:13:33,879 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 127 [2018-11-26 13:13:33,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:33,896 INFO L225 Difference]: With dead ends: 14094 [2018-11-26 13:13:33,896 INFO L226 Difference]: Without dead ends: 14094 [2018-11-26 13:13:33,896 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 4 SyntacticMatches, 4 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=125, Unknown=0, NotChecked=0, Total=182 [2018-11-26 13:13:33,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14094 states. [2018-11-26 13:13:34,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14094 to 9865. [2018-11-26 13:13:34,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9865 states. [2018-11-26 13:13:34,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9865 states to 9865 states and 23304 transitions. [2018-11-26 13:13:34,016 INFO L78 Accepts]: Start accepts. Automaton has 9865 states and 23304 transitions. Word has length 127 [2018-11-26 13:13:34,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:34,016 INFO L480 AbstractCegarLoop]: Abstraction has 9865 states and 23304 transitions. [2018-11-26 13:13:34,016 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-26 13:13:34,016 INFO L276 IsEmpty]: Start isEmpty. Operand 9865 states and 23304 transitions. [2018-11-26 13:13:34,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-11-26 13:13:34,026 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:34,026 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:34,026 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:34,026 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:34,027 INFO L82 PathProgramCache]: Analyzing trace with hash -1553370620, now seen corresponding path program 1 times [2018-11-26 13:13:34,027 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:34,027 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:34,028 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:34,028 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-26 13:13:34,028 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:34,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:34,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:34,163 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:34,163 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-26 13:13:34,163 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-26 13:13:34,163 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-26 13:13:34,163 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-26 13:13:34,163 INFO L87 Difference]: Start difference. First operand 9865 states and 23304 transitions. Second operand 7 states. [2018-11-26 13:13:34,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:34,717 INFO L93 Difference]: Finished difference Result 10400 states and 24462 transitions. [2018-11-26 13:13:34,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-26 13:13:34,717 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 129 [2018-11-26 13:13:34,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:34,729 INFO L225 Difference]: With dead ends: 10400 [2018-11-26 13:13:34,729 INFO L226 Difference]: Without dead ends: 10380 [2018-11-26 13:13:34,730 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2018-11-26 13:13:34,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10380 states. [2018-11-26 13:13:34,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10380 to 9872. [2018-11-26 13:13:34,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9872 states. [2018-11-26 13:13:34,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9872 states to 9872 states and 23319 transitions. [2018-11-26 13:13:34,834 INFO L78 Accepts]: Start accepts. Automaton has 9872 states and 23319 transitions. Word has length 129 [2018-11-26 13:13:34,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:34,834 INFO L480 AbstractCegarLoop]: Abstraction has 9872 states and 23319 transitions. [2018-11-26 13:13:34,834 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-26 13:13:34,834 INFO L276 IsEmpty]: Start isEmpty. Operand 9872 states and 23319 transitions. [2018-11-26 13:13:34,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-11-26 13:13:34,843 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:34,843 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:34,843 INFO L423 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:34,843 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:34,844 INFO L82 PathProgramCache]: Analyzing trace with hash -116747194, now seen corresponding path program 1 times [2018-11-26 13:13:34,844 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:34,844 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:34,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:34,845 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:34,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:34,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:34,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:34,924 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:34,925 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-26 13:13:34,925 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-26 13:13:34,925 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-26 13:13:34,925 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-26 13:13:34,926 INFO L87 Difference]: Start difference. First operand 9872 states and 23319 transitions. Second operand 5 states. [2018-11-26 13:13:34,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:34,987 INFO L93 Difference]: Finished difference Result 12460 states and 29137 transitions. [2018-11-26 13:13:34,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-26 13:13:34,988 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 129 [2018-11-26 13:13:34,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:35,007 INFO L225 Difference]: With dead ends: 12460 [2018-11-26 13:13:35,007 INFO L226 Difference]: Without dead ends: 12460 [2018-11-26 13:13:35,008 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-26 13:13:35,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12460 states. [2018-11-26 13:13:35,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12460 to 8986. [2018-11-26 13:13:35,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8986 states. [2018-11-26 13:13:35,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8986 states to 8986 states and 20770 transitions. [2018-11-26 13:13:35,113 INFO L78 Accepts]: Start accepts. Automaton has 8986 states and 20770 transitions. Word has length 129 [2018-11-26 13:13:35,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:35,113 INFO L480 AbstractCegarLoop]: Abstraction has 8986 states and 20770 transitions. [2018-11-26 13:13:35,114 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-26 13:13:35,114 INFO L276 IsEmpty]: Start isEmpty. Operand 8986 states and 20770 transitions. [2018-11-26 13:13:35,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-11-26 13:13:35,122 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:35,122 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:35,123 INFO L423 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:35,123 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:35,123 INFO L82 PathProgramCache]: Analyzing trace with hash 3372679, now seen corresponding path program 1 times [2018-11-26 13:13:35,123 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:35,123 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:35,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:35,125 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:35,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:35,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:35,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:35,351 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:35,351 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-26 13:13:35,351 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-26 13:13:35,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-26 13:13:35,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2018-11-26 13:13:35,352 INFO L87 Difference]: Start difference. First operand 8986 states and 20770 transitions. Second operand 12 states. [2018-11-26 13:13:37,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:37,097 INFO L93 Difference]: Finished difference Result 23347 states and 53585 transitions. [2018-11-26 13:13:37,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-11-26 13:13:37,098 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 129 [2018-11-26 13:13:37,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:37,112 INFO L225 Difference]: With dead ends: 23347 [2018-11-26 13:13:37,113 INFO L226 Difference]: Without dead ends: 12906 [2018-11-26 13:13:37,113 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 242 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=196, Invalid=994, Unknown=0, NotChecked=0, Total=1190 [2018-11-26 13:13:37,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12906 states. [2018-11-26 13:13:37,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12906 to 9380. [2018-11-26 13:13:37,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9380 states. [2018-11-26 13:13:37,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9380 states to 9380 states and 21444 transitions. [2018-11-26 13:13:37,223 INFO L78 Accepts]: Start accepts. Automaton has 9380 states and 21444 transitions. Word has length 129 [2018-11-26 13:13:37,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:37,223 INFO L480 AbstractCegarLoop]: Abstraction has 9380 states and 21444 transitions. [2018-11-26 13:13:37,223 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-26 13:13:37,223 INFO L276 IsEmpty]: Start isEmpty. Operand 9380 states and 21444 transitions. [2018-11-26 13:13:37,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-11-26 13:13:37,234 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:37,234 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:37,234 INFO L423 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:37,234 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:37,234 INFO L82 PathProgramCache]: Analyzing trace with hash 88629944, now seen corresponding path program 1 times [2018-11-26 13:13:37,235 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:37,235 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:37,236 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:37,236 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:37,236 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:37,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:37,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:37,415 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:37,415 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-11-26 13:13:37,415 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-26 13:13:37,415 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-26 13:13:37,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=156, Unknown=0, NotChecked=0, Total=182 [2018-11-26 13:13:37,416 INFO L87 Difference]: Start difference. First operand 9380 states and 21444 transitions. Second operand 14 states. [2018-11-26 13:13:38,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:38,130 INFO L93 Difference]: Finished difference Result 14533 states and 33921 transitions. [2018-11-26 13:13:38,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-26 13:13:38,131 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 131 [2018-11-26 13:13:38,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:38,144 INFO L225 Difference]: With dead ends: 14533 [2018-11-26 13:13:38,144 INFO L226 Difference]: Without dead ends: 12693 [2018-11-26 13:13:38,145 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=82, Invalid=518, Unknown=0, NotChecked=0, Total=600 [2018-11-26 13:13:38,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12693 states. [2018-11-26 13:13:38,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12693 to 10451. [2018-11-26 13:13:38,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10451 states. [2018-11-26 13:13:38,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10451 states to 10451 states and 23762 transitions. [2018-11-26 13:13:38,265 INFO L78 Accepts]: Start accepts. Automaton has 10451 states and 23762 transitions. Word has length 131 [2018-11-26 13:13:38,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:38,265 INFO L480 AbstractCegarLoop]: Abstraction has 10451 states and 23762 transitions. [2018-11-26 13:13:38,265 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-26 13:13:38,265 INFO L276 IsEmpty]: Start isEmpty. Operand 10451 states and 23762 transitions. [2018-11-26 13:13:38,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-11-26 13:13:38,275 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:38,275 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:38,276 INFO L423 AbstractCegarLoop]: === Iteration 36 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:38,276 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:38,276 INFO L82 PathProgramCache]: Analyzing trace with hash -1862607011, now seen corresponding path program 1 times [2018-11-26 13:13:38,276 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:38,276 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:38,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:38,277 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:38,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:38,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-26 13:13:38,369 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-26 13:13:38,369 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-26 13:13:38,370 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-26 13:13:38,370 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-26 13:13:38,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-26 13:13:38,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-26 13:13:38,370 INFO L87 Difference]: Start difference. First operand 10451 states and 23762 transitions. Second operand 8 states. [2018-11-26 13:13:38,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-26 13:13:38,748 INFO L93 Difference]: Finished difference Result 10910 states and 24696 transitions. [2018-11-26 13:13:38,748 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-26 13:13:38,748 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 131 [2018-11-26 13:13:38,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-26 13:13:38,759 INFO L225 Difference]: With dead ends: 10910 [2018-11-26 13:13:38,759 INFO L226 Difference]: Without dead ends: 10910 [2018-11-26 13:13:38,759 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2018-11-26 13:13:38,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10910 states. [2018-11-26 13:13:38,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10910 to 10581. [2018-11-26 13:13:38,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10581 states. [2018-11-26 13:13:38,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10581 states to 10581 states and 24008 transitions. [2018-11-26 13:13:38,870 INFO L78 Accepts]: Start accepts. Automaton has 10581 states and 24008 transitions. Word has length 131 [2018-11-26 13:13:38,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-26 13:13:38,870 INFO L480 AbstractCegarLoop]: Abstraction has 10581 states and 24008 transitions. [2018-11-26 13:13:38,870 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-26 13:13:38,870 INFO L276 IsEmpty]: Start isEmpty. Operand 10581 states and 24008 transitions. [2018-11-26 13:13:38,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-11-26 13:13:38,880 INFO L394 BasicCegarLoop]: Found error trace [2018-11-26 13:13:38,880 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-26 13:13:38,880 INFO L423 AbstractCegarLoop]: === Iteration 37 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-26 13:13:38,880 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-26 13:13:38,880 INFO L82 PathProgramCache]: Analyzing trace with hash -374762910, now seen corresponding path program 2 times [2018-11-26 13:13:38,880 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-26 13:13:38,880 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-26 13:13:38,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:38,882 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-26 13:13:38,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-26 13:13:38,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-26 13:13:38,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-26 13:13:38,970 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-11-26 13:13:39,117 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-26 13:13:39,119 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 26.11 01:13:39 BasicIcfg [2018-11-26 13:13:39,120 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-26 13:13:39,120 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-26 13:13:39,121 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-26 13:13:39,121 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-26 13:13:39,121 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 01:11:50" (3/4) ... [2018-11-26 13:13:39,124 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-26 13:13:39,299 INFO L145 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2018-11-26 13:13:39,300 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-26 13:13:39,302 INFO L168 Benchmark]: Toolchain (without parser) took 110218.32 ms. Allocated memory was 1.0 GB in the beginning and 6.6 GB in the end (delta: 5.6 GB). Free memory was 942.4 MB in the beginning and 3.4 GB in the end (delta: -2.5 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2018-11-26 13:13:39,303 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-26 13:13:39,304 INFO L168 Benchmark]: CACSL2BoogieTranslator took 634.21 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 115.3 MB). Free memory was 942.4 MB in the beginning and 1.1 GB in the end (delta: -139.0 MB). Peak memory consumption was 39.1 MB. Max. memory is 11.5 GB. [2018-11-26 13:13:39,304 INFO L168 Benchmark]: Boogie Procedure Inliner took 62.12 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-26 13:13:39,304 INFO L168 Benchmark]: Boogie Preprocessor took 40.16 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2018-11-26 13:13:39,304 INFO L168 Benchmark]: RCFGBuilder took 918.52 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 65.7 MB). Peak memory consumption was 65.7 MB. Max. memory is 11.5 GB. [2018-11-26 13:13:39,305 INFO L168 Benchmark]: TraceAbstraction took 108379.39 ms. Allocated memory was 1.1 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 1.0 GB in the beginning and 3.5 GB in the end (delta: -2.5 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. [2018-11-26 13:13:39,305 INFO L168 Benchmark]: Witness Printer took 179.26 ms. Allocated memory is still 6.6 GB. Free memory was 3.5 GB in the beginning and 3.4 GB in the end (delta: 49.6 MB). Peak memory consumption was 49.6 MB. Max. memory is 11.5 GB. [2018-11-26 13:13:39,307 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 634.21 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 115.3 MB). Free memory was 942.4 MB in the beginning and 1.1 GB in the end (delta: -139.0 MB). Peak memory consumption was 39.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 62.12 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 40.16 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * RCFGBuilder took 918.52 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 65.7 MB). Peak memory consumption was 65.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 108379.39 ms. Allocated memory was 1.1 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 1.0 GB in the beginning and 3.5 GB in the end (delta: -2.5 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. * Witness Printer took 179.26 ms. Allocated memory is still 6.6 GB. Free memory was 3.5 GB in the beginning and 3.4 GB in the end (delta: 49.6 MB). Peak memory consumption was 49.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L675] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L676] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L677] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L679] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L681] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L682] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L683] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L684] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L685] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L686] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L687] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L688] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L689] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L690] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L691] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L692] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L693] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L694] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L695] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L696] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L697] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] -1 pthread_t t1601; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L790] FCALL, FORK -1 pthread_create(&t1601, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L701] 0 y = 2 [L704] 0 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L707] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L791] -1 pthread_t t1602; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L792] FCALL, FORK -1 pthread_create(&t1602, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L707] EXPR 0 y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L721] 1 x = 2 [L724] 1 y$w_buff1 = y$w_buff0 [L725] 1 y$w_buff0 = 1 [L726] 1 y$w_buff1_used = y$w_buff0_used [L727] 1 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L729] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L730] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L731] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L732] 1 y$r_buff0_thd2 = (_Bool)1 [L735] 1 weak$$choice0 = __VERIFIER_nondet_pointer() [L736] 1 weak$$choice2 = __VERIFIER_nondet_pointer() [L737] 1 y$flush_delayed = weak$$choice2 [L738] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L739] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L739] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L739] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L739] 1 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L740] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L740] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L741] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L741] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L742] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L742] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L707] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L743] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L743] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L744] EXPR 1 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L744] 1 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L745] EXPR 1 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L745] 1 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L746] 1 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L747] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L747] 1 y = y$flush_delayed ? y$mem_tmp : y [L748] 1 y$flush_delayed = (_Bool)0 [L751] 1 weak$$choice0 = __VERIFIER_nondet_pointer() [L752] 1 weak$$choice2 = __VERIFIER_nondet_pointer() [L753] 1 y$flush_delayed = weak$$choice2 [L754] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L755] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L755] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L755] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L755] 1 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L756] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L756] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L757] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L757] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L758] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L758] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L759] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L759] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L760] EXPR 1 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L760] 1 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L761] EXPR 1 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L761] 1 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L762] 1 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L763] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L763] 1 y = y$flush_delayed ? y$mem_tmp : y [L764] 1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L767] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L767] 1 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L768] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=2] [L768] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L707] 0 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L769] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L769] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L770] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L708] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L770] 1 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L771] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L771] 1 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L774] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L708] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L709] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L709] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L710] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1=0, y$w_buff1=0, y$w_buff1_used=0] [L710] 0 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L711] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1=0, y$w_buff1=0, y$w_buff1_used=0] [L711] 0 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L714] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L794] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L799] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L800] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L800] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L801] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L802] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L805] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L806] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L807] -1 y$flush_delayed = weak$$choice2 [L808] -1 y$mem_tmp = y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L809] EXPR -1 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L809] -1 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L810] EXPR -1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L810] -1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L811] EXPR -1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L811] -1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L812] EXPR -1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L812] -1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L813] EXPR -1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L813] -1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L814] EXPR -1 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L814] -1 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L815] EXPR -1 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L815] -1 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L816] -1 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L817] EXPR -1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L817] -1 y = y$flush_delayed ? y$mem_tmp : y [L818] -1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 348 locations, 3 error locations. UNSAFE Result, 108.1s OverallTime, 37 OverallIterations, 1 TraceHistogramMax, 45.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 20300 SDtfs, 21449 SDslu, 59688 SDs, 0 SdLazy, 24466 SolverSat, 1217 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 20.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 482 GetRequests, 116 SyntacticMatches, 41 SemanticMatches, 325 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 792 ImplicationChecksByTransitivity, 4.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=182336occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 45.2s AutomataMinimizationTime, 36 MinimizatonAttempts, 470301 StatesRemovedByMinimization, 35 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 3.2s InterpolantComputationTime, 3738 NumberOfCodeBlocks, 3738 NumberOfCodeBlocksAsserted, 37 NumberOfCheckSat, 3571 ConstructedInterpolants, 0 QuantifiedInterpolants, 1056698 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 36 InterpolantComputations, 36 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...