./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 678e0110 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2b1be4311b85b6fe57410228c7ae2544fffadecc ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-678e011 [2019-11-19 21:25:48,028 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-19 21:25:48,031 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-19 21:25:48,050 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-19 21:25:48,051 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-19 21:25:48,053 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-19 21:25:48,055 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-19 21:25:48,070 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-19 21:25:48,074 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-19 21:25:48,076 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-19 21:25:48,078 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-19 21:25:48,079 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-19 21:25:48,079 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-19 21:25:48,081 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-19 21:25:48,082 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-19 21:25:48,083 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-19 21:25:48,084 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-19 21:25:48,085 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-19 21:25:48,087 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-19 21:25:48,089 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-19 21:25:48,091 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-19 21:25:48,092 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-19 21:25:48,093 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-19 21:25:48,094 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-19 21:25:48,099 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-19 21:25:48,099 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-19 21:25:48,099 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-19 21:25:48,100 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-19 21:25:48,101 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-19 21:25:48,102 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-19 21:25:48,103 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-19 21:25:48,104 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-19 21:25:48,104 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-19 21:25:48,105 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-19 21:25:48,107 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-19 21:25:48,107 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-19 21:25:48,108 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-19 21:25:48,108 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-19 21:25:48,109 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-19 21:25:48,110 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-19 21:25:48,110 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-19 21:25:48,111 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-19 21:25:48,130 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-19 21:25:48,131 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-19 21:25:48,132 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-19 21:25:48,133 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-19 21:25:48,133 INFO L138 SettingsManager]: * Use SBE=true [2019-11-19 21:25:48,134 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-19 21:25:48,134 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-19 21:25:48,134 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-19 21:25:48,134 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-19 21:25:48,135 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-19 21:25:48,136 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-19 21:25:48,137 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-19 21:25:48,137 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-19 21:25:48,137 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-19 21:25:48,138 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-19 21:25:48,138 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-19 21:25:48,138 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-19 21:25:48,139 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-19 21:25:48,139 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-19 21:25:48,139 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-19 21:25:48,140 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-19 21:25:48,140 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-19 21:25:48,140 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-19 21:25:48,141 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-19 21:25:48,141 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-19 21:25:48,141 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-19 21:25:48,141 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-19 21:25:48,142 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-19 21:25:48,142 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2b1be4311b85b6fe57410228c7ae2544fffadecc [2019-11-19 21:25:48,455 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-19 21:25:48,470 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-19 21:25:48,474 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-19 21:25:48,476 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-19 21:25:48,476 INFO L275 PluginConnector]: CDTParser initialized [2019-11-19 21:25:48,478 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2019-11-19 21:25:48,549 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f8a8ce4c9/d7baa7cb9ebc42bca7baa5008563233d/FLAG8ef1bab35 [2019-11-19 21:25:49,201 INFO L306 CDTParser]: Found 1 translation units. [2019-11-19 21:25:49,202 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2019-11-19 21:25:49,219 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f8a8ce4c9/d7baa7cb9ebc42bca7baa5008563233d/FLAG8ef1bab35 [2019-11-19 21:25:49,446 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f8a8ce4c9/d7baa7cb9ebc42bca7baa5008563233d [2019-11-19 21:25:49,450 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-19 21:25:49,451 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-19 21:25:49,453 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-19 21:25:49,453 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-19 21:25:49,457 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-19 21:25:49,458 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 09:25:49" (1/1) ... [2019-11-19 21:25:49,461 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@217a9395 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 09:25:49, skipping insertion in model container [2019-11-19 21:25:49,461 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 09:25:49" (1/1) ... [2019-11-19 21:25:49,469 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-19 21:25:49,522 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-19 21:25:49,933 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-19 21:25:49,944 INFO L188 MainTranslator]: Completed pre-run [2019-11-19 21:25:50,034 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-19 21:25:50,070 INFO L192 MainTranslator]: Completed translation [2019-11-19 21:25:50,071 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 09:25:50 WrapperNode [2019-11-19 21:25:50,071 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-19 21:25:50,072 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-19 21:25:50,072 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-19 21:25:50,072 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-19 21:25:50,081 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 09:25:50" (1/1) ... [2019-11-19 21:25:50,095 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 09:25:50" (1/1) ... [2019-11-19 21:25:50,152 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-19 21:25:50,153 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-19 21:25:50,153 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-19 21:25:50,153 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-19 21:25:50,165 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 09:25:50" (1/1) ... [2019-11-19 21:25:50,165 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 09:25:50" (1/1) ... [2019-11-19 21:25:50,172 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 09:25:50" (1/1) ... [2019-11-19 21:25:50,173 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 09:25:50" (1/1) ... [2019-11-19 21:25:50,194 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 09:25:50" (1/1) ... [2019-11-19 21:25:50,208 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 09:25:50" (1/1) ... [2019-11-19 21:25:50,214 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 09:25:50" (1/1) ... [2019-11-19 21:25:50,224 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-19 21:25:50,225 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-19 21:25:50,225 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-19 21:25:50,225 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-19 21:25:50,226 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 09:25:50" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-19 21:25:50,286 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-19 21:25:50,287 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-19 21:25:51,472 INFO L280 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-19 21:25:51,472 INFO L285 CfgBuilder]: Removed 119 assume(true) statements. [2019-11-19 21:25:51,474 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 09:25:51 BoogieIcfgContainer [2019-11-19 21:25:51,474 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-19 21:25:51,476 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-19 21:25:51,476 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-19 21:25:51,480 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-19 21:25:51,480 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 19.11 09:25:49" (1/3) ... [2019-11-19 21:25:51,481 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4b73c67b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 19.11 09:25:51, skipping insertion in model container [2019-11-19 21:25:51,482 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 09:25:50" (2/3) ... [2019-11-19 21:25:51,482 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4b73c67b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 19.11 09:25:51, skipping insertion in model container [2019-11-19 21:25:51,483 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 09:25:51" (3/3) ... [2019-11-19 21:25:51,485 INFO L109 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2019-11-19 21:25:51,498 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-19 21:25:51,509 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2019-11-19 21:25:51,524 INFO L249 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2019-11-19 21:25:51,570 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-19 21:25:51,571 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-19 21:25:51,571 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-19 21:25:51,571 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-19 21:25:51,572 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-19 21:25:51,572 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-19 21:25:51,572 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-19 21:25:51,572 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-19 21:25:51,623 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states. [2019-11-19 21:25:51,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-11-19 21:25:51,634 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:51,636 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:51,637 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:51,646 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:51,647 INFO L82 PathProgramCache]: Analyzing trace with hash 211735483, now seen corresponding path program 1 times [2019-11-19 21:25:51,658 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:51,659 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [836652515] [2019-11-19 21:25:51,659 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:51,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:51,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:51,961 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [836652515] [2019-11-19 21:25:51,962 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:51,963 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-19 21:25:51,965 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1163409340] [2019-11-19 21:25:51,971 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-19 21:25:51,971 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:51,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-19 21:25:51,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:51,990 INFO L87 Difference]: Start difference. First operand 291 states. Second operand 3 states. [2019-11-19 21:25:52,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:52,118 INFO L93 Difference]: Finished difference Result 568 states and 884 transitions. [2019-11-19 21:25:52,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-19 21:25:52,123 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 31 [2019-11-19 21:25:52,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:52,155 INFO L225 Difference]: With dead ends: 568 [2019-11-19 21:25:52,155 INFO L226 Difference]: Without dead ends: 287 [2019-11-19 21:25:52,160 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:52,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 287 states. [2019-11-19 21:25:52,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 287 to 287. [2019-11-19 21:25:52,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 287 states. [2019-11-19 21:25:52,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287 states to 287 states and 409 transitions. [2019-11-19 21:25:52,226 INFO L78 Accepts]: Start accepts. Automaton has 287 states and 409 transitions. Word has length 31 [2019-11-19 21:25:52,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:52,226 INFO L462 AbstractCegarLoop]: Abstraction has 287 states and 409 transitions. [2019-11-19 21:25:52,227 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-19 21:25:52,227 INFO L276 IsEmpty]: Start isEmpty. Operand 287 states and 409 transitions. [2019-11-19 21:25:52,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-11-19 21:25:52,229 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:52,229 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:52,230 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:52,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:52,231 INFO L82 PathProgramCache]: Analyzing trace with hash -1187444686, now seen corresponding path program 1 times [2019-11-19 21:25:52,231 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:52,231 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [414213818] [2019-11-19 21:25:52,232 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:52,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:52,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:52,466 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [414213818] [2019-11-19 21:25:52,466 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:52,466 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-19 21:25:52,467 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1480817017] [2019-11-19 21:25:52,469 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-19 21:25:52,469 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:52,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-19 21:25:52,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:52,470 INFO L87 Difference]: Start difference. First operand 287 states and 409 transitions. Second operand 3 states. [2019-11-19 21:25:52,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:52,543 INFO L93 Difference]: Finished difference Result 593 states and 853 transitions. [2019-11-19 21:25:52,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-19 21:25:52,545 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 42 [2019-11-19 21:25:52,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:52,548 INFO L225 Difference]: With dead ends: 593 [2019-11-19 21:25:52,549 INFO L226 Difference]: Without dead ends: 321 [2019-11-19 21:25:52,551 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:52,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 321 states. [2019-11-19 21:25:52,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 321 to 263. [2019-11-19 21:25:52,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 263 states. [2019-11-19 21:25:52,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263 states to 263 states and 373 transitions. [2019-11-19 21:25:52,575 INFO L78 Accepts]: Start accepts. Automaton has 263 states and 373 transitions. Word has length 42 [2019-11-19 21:25:52,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:52,576 INFO L462 AbstractCegarLoop]: Abstraction has 263 states and 373 transitions. [2019-11-19 21:25:52,576 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-19 21:25:52,576 INFO L276 IsEmpty]: Start isEmpty. Operand 263 states and 373 transitions. [2019-11-19 21:25:52,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-19 21:25:52,578 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:52,579 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:52,579 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:52,580 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:52,580 INFO L82 PathProgramCache]: Analyzing trace with hash -365626229, now seen corresponding path program 1 times [2019-11-19 21:25:52,580 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:52,581 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1740931531] [2019-11-19 21:25:52,581 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:52,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:52,750 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:52,751 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1740931531] [2019-11-19 21:25:52,752 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:52,752 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-19 21:25:52,754 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [841502471] [2019-11-19 21:25:52,755 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-19 21:25:52,755 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:52,756 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-19 21:25:52,757 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:52,758 INFO L87 Difference]: Start difference. First operand 263 states and 373 transitions. Second operand 3 states. [2019-11-19 21:25:52,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:52,805 INFO L93 Difference]: Finished difference Result 736 states and 1054 transitions. [2019-11-19 21:25:52,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-19 21:25:52,806 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-19 21:25:52,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:52,810 INFO L225 Difference]: With dead ends: 736 [2019-11-19 21:25:52,810 INFO L226 Difference]: Without dead ends: 488 [2019-11-19 21:25:52,812 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:52,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 488 states. [2019-11-19 21:25:52,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 488 to 296. [2019-11-19 21:25:52,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 296 states. [2019-11-19 21:25:52,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 296 states to 296 states and 421 transitions. [2019-11-19 21:25:52,847 INFO L78 Accepts]: Start accepts. Automaton has 296 states and 421 transitions. Word has length 49 [2019-11-19 21:25:52,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:52,848 INFO L462 AbstractCegarLoop]: Abstraction has 296 states and 421 transitions. [2019-11-19 21:25:52,848 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-19 21:25:52,848 INFO L276 IsEmpty]: Start isEmpty. Operand 296 states and 421 transitions. [2019-11-19 21:25:52,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-11-19 21:25:52,853 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:52,854 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:52,854 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:52,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:52,855 INFO L82 PathProgramCache]: Analyzing trace with hash 744745200, now seen corresponding path program 1 times [2019-11-19 21:25:52,856 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:52,856 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [622608507] [2019-11-19 21:25:52,856 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:52,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:52,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:52,979 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [622608507] [2019-11-19 21:25:52,979 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:52,980 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-19 21:25:52,980 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2042886305] [2019-11-19 21:25:52,981 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-19 21:25:52,981 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:52,981 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-19 21:25:52,982 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-19 21:25:52,982 INFO L87 Difference]: Start difference. First operand 296 states and 421 transitions. Second operand 5 states. [2019-11-19 21:25:53,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:53,269 INFO L93 Difference]: Finished difference Result 932 states and 1340 transitions. [2019-11-19 21:25:53,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-19 21:25:53,270 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2019-11-19 21:25:53,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:53,274 INFO L225 Difference]: With dead ends: 932 [2019-11-19 21:25:53,275 INFO L226 Difference]: Without dead ends: 651 [2019-11-19 21:25:53,276 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-19 21:25:53,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 651 states. [2019-11-19 21:25:53,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 651 to 382. [2019-11-19 21:25:53,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 382 states. [2019-11-19 21:25:53,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 544 transitions. [2019-11-19 21:25:53,300 INFO L78 Accepts]: Start accepts. Automaton has 382 states and 544 transitions. Word has length 50 [2019-11-19 21:25:53,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:53,300 INFO L462 AbstractCegarLoop]: Abstraction has 382 states and 544 transitions. [2019-11-19 21:25:53,301 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-19 21:25:53,301 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 544 transitions. [2019-11-19 21:25:53,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-19 21:25:53,303 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:53,303 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:53,304 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:53,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:53,305 INFO L82 PathProgramCache]: Analyzing trace with hash 1614483527, now seen corresponding path program 1 times [2019-11-19 21:25:53,305 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:53,305 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [270545982] [2019-11-19 21:25:53,306 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:53,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:53,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:53,411 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [270545982] [2019-11-19 21:25:53,412 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:53,412 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-19 21:25:53,413 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1131884120] [2019-11-19 21:25:53,413 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-19 21:25:53,414 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:53,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-19 21:25:53,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-19 21:25:53,415 INFO L87 Difference]: Start difference. First operand 382 states and 544 transitions. Second operand 5 states. [2019-11-19 21:25:53,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:53,686 INFO L93 Difference]: Finished difference Result 932 states and 1336 transitions. [2019-11-19 21:25:53,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-19 21:25:53,687 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-11-19 21:25:53,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:53,692 INFO L225 Difference]: With dead ends: 932 [2019-11-19 21:25:53,693 INFO L226 Difference]: Without dead ends: 651 [2019-11-19 21:25:53,694 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-19 21:25:53,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 651 states. [2019-11-19 21:25:53,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 651 to 382. [2019-11-19 21:25:53,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 382 states. [2019-11-19 21:25:53,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 542 transitions. [2019-11-19 21:25:53,723 INFO L78 Accepts]: Start accepts. Automaton has 382 states and 542 transitions. Word has length 51 [2019-11-19 21:25:53,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:53,723 INFO L462 AbstractCegarLoop]: Abstraction has 382 states and 542 transitions. [2019-11-19 21:25:53,724 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-19 21:25:53,724 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 542 transitions. [2019-11-19 21:25:53,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-19 21:25:53,728 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:53,728 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:53,729 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:53,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:53,729 INFO L82 PathProgramCache]: Analyzing trace with hash 251892323, now seen corresponding path program 1 times [2019-11-19 21:25:53,729 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:53,730 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1333248082] [2019-11-19 21:25:53,730 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:53,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:53,954 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:53,955 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1333248082] [2019-11-19 21:25:53,955 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:53,955 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-19 21:25:53,956 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1359518084] [2019-11-19 21:25:53,956 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-19 21:25:53,957 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:53,957 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-19 21:25:53,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-19 21:25:53,958 INFO L87 Difference]: Start difference. First operand 382 states and 542 transitions. Second operand 5 states. [2019-11-19 21:25:54,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:54,058 INFO L93 Difference]: Finished difference Result 760 states and 1089 transitions. [2019-11-19 21:25:54,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-19 21:25:54,059 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-11-19 21:25:54,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:54,062 INFO L225 Difference]: With dead ends: 760 [2019-11-19 21:25:54,062 INFO L226 Difference]: Without dead ends: 479 [2019-11-19 21:25:54,063 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-19 21:25:54,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 479 states. [2019-11-19 21:25:54,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 479 to 377. [2019-11-19 21:25:54,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 377 states. [2019-11-19 21:25:54,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 377 states and 534 transitions. [2019-11-19 21:25:54,085 INFO L78 Accepts]: Start accepts. Automaton has 377 states and 534 transitions. Word has length 52 [2019-11-19 21:25:54,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:54,085 INFO L462 AbstractCegarLoop]: Abstraction has 377 states and 534 transitions. [2019-11-19 21:25:54,085 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-19 21:25:54,086 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 534 transitions. [2019-11-19 21:25:54,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-11-19 21:25:54,086 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:54,087 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:54,087 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:54,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:54,088 INFO L82 PathProgramCache]: Analyzing trace with hash -1519937093, now seen corresponding path program 1 times [2019-11-19 21:25:54,088 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:54,088 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [561077991] [2019-11-19 21:25:54,089 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:54,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:54,314 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:54,316 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [561077991] [2019-11-19 21:25:54,316 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:54,316 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-19 21:25:54,316 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [348829019] [2019-11-19 21:25:54,317 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-19 21:25:54,317 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:54,317 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-19 21:25:54,318 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-19 21:25:54,318 INFO L87 Difference]: Start difference. First operand 377 states and 534 transitions. Second operand 5 states. [2019-11-19 21:25:54,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:54,527 INFO L93 Difference]: Finished difference Result 791 states and 1138 transitions. [2019-11-19 21:25:54,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-19 21:25:54,528 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2019-11-19 21:25:54,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:54,531 INFO L225 Difference]: With dead ends: 791 [2019-11-19 21:25:54,531 INFO L226 Difference]: Without dead ends: 515 [2019-11-19 21:25:54,532 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-19 21:25:54,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 515 states. [2019-11-19 21:25:54,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 515 to 347. [2019-11-19 21:25:54,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 347 states. [2019-11-19 21:25:54,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 347 states to 347 states and 488 transitions. [2019-11-19 21:25:54,554 INFO L78 Accepts]: Start accepts. Automaton has 347 states and 488 transitions. Word has length 56 [2019-11-19 21:25:54,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:54,554 INFO L462 AbstractCegarLoop]: Abstraction has 347 states and 488 transitions. [2019-11-19 21:25:54,555 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-19 21:25:54,555 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 488 transitions. [2019-11-19 21:25:54,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-11-19 21:25:54,555 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:54,556 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:54,556 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:54,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:54,556 INFO L82 PathProgramCache]: Analyzing trace with hash 1786376721, now seen corresponding path program 1 times [2019-11-19 21:25:54,557 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:54,557 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [792851292] [2019-11-19 21:25:54,557 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:54,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:54,705 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:54,706 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [792851292] [2019-11-19 21:25:54,706 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:54,706 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-19 21:25:54,706 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1342179990] [2019-11-19 21:25:54,707 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-19 21:25:54,707 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:54,707 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-19 21:25:54,707 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-19 21:25:54,708 INFO L87 Difference]: Start difference. First operand 347 states and 488 transitions. Second operand 5 states. [2019-11-19 21:25:54,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:54,852 INFO L93 Difference]: Finished difference Result 884 states and 1260 transitions. [2019-11-19 21:25:54,853 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-19 21:25:54,853 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 61 [2019-11-19 21:25:54,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:54,856 INFO L225 Difference]: With dead ends: 884 [2019-11-19 21:25:54,857 INFO L226 Difference]: Without dead ends: 638 [2019-11-19 21:25:54,858 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-19 21:25:54,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 638 states. [2019-11-19 21:25:54,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 638 to 317. [2019-11-19 21:25:54,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2019-11-19 21:25:54,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 442 transitions. [2019-11-19 21:25:54,880 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 442 transitions. Word has length 61 [2019-11-19 21:25:54,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:54,881 INFO L462 AbstractCegarLoop]: Abstraction has 317 states and 442 transitions. [2019-11-19 21:25:54,881 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-19 21:25:54,881 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 442 transitions. [2019-11-19 21:25:54,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-19 21:25:54,882 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:54,883 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:54,883 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:54,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:54,884 INFO L82 PathProgramCache]: Analyzing trace with hash -1245848025, now seen corresponding path program 1 times [2019-11-19 21:25:54,884 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:54,885 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2117266914] [2019-11-19 21:25:54,885 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:54,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:55,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:55,074 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2117266914] [2019-11-19 21:25:55,075 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:55,075 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-19 21:25:55,075 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1571784925] [2019-11-19 21:25:55,076 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-19 21:25:55,076 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:55,076 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-19 21:25:55,077 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-19 21:25:55,077 INFO L87 Difference]: Start difference. First operand 317 states and 442 transitions. Second operand 6 states. [2019-11-19 21:25:55,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:55,327 INFO L93 Difference]: Finished difference Result 1081 states and 1520 transitions. [2019-11-19 21:25:55,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-19 21:25:55,327 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-11-19 21:25:55,328 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:55,333 INFO L225 Difference]: With dead ends: 1081 [2019-11-19 21:25:55,333 INFO L226 Difference]: Without dead ends: 865 [2019-11-19 21:25:55,334 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-19 21:25:55,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2019-11-19 21:25:55,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 356. [2019-11-19 21:25:55,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 356 states. [2019-11-19 21:25:55,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 356 states to 356 states and 496 transitions. [2019-11-19 21:25:55,367 INFO L78 Accepts]: Start accepts. Automaton has 356 states and 496 transitions. Word has length 66 [2019-11-19 21:25:55,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:55,367 INFO L462 AbstractCegarLoop]: Abstraction has 356 states and 496 transitions. [2019-11-19 21:25:55,368 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-19 21:25:55,368 INFO L276 IsEmpty]: Start isEmpty. Operand 356 states and 496 transitions. [2019-11-19 21:25:55,368 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-11-19 21:25:55,369 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:55,369 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:55,369 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:55,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:55,370 INFO L82 PathProgramCache]: Analyzing trace with hash 1591247394, now seen corresponding path program 1 times [2019-11-19 21:25:55,370 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:55,371 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2094142989] [2019-11-19 21:25:55,371 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:55,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:55,443 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:55,443 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2094142989] [2019-11-19 21:25:55,444 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:55,444 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-19 21:25:55,444 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [401987470] [2019-11-19 21:25:55,445 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-19 21:25:55,445 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:55,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-19 21:25:55,446 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:55,447 INFO L87 Difference]: Start difference. First operand 356 states and 496 transitions. Second operand 3 states. [2019-11-19 21:25:55,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:55,517 INFO L93 Difference]: Finished difference Result 650 states and 915 transitions. [2019-11-19 21:25:55,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-19 21:25:55,518 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-11-19 21:25:55,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:55,521 INFO L225 Difference]: With dead ends: 650 [2019-11-19 21:25:55,522 INFO L226 Difference]: Without dead ends: 434 [2019-11-19 21:25:55,523 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:55,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434 states. [2019-11-19 21:25:55,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434 to 352. [2019-11-19 21:25:55,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 352 states. [2019-11-19 21:25:55,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 352 states to 352 states and 489 transitions. [2019-11-19 21:25:55,556 INFO L78 Accepts]: Start accepts. Automaton has 352 states and 489 transitions. Word has length 67 [2019-11-19 21:25:55,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:55,557 INFO L462 AbstractCegarLoop]: Abstraction has 352 states and 489 transitions. [2019-11-19 21:25:55,557 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-19 21:25:55,557 INFO L276 IsEmpty]: Start isEmpty. Operand 352 states and 489 transitions. [2019-11-19 21:25:55,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-19 21:25:55,558 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:55,558 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:55,559 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:55,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:55,559 INFO L82 PathProgramCache]: Analyzing trace with hash 480130565, now seen corresponding path program 1 times [2019-11-19 21:25:55,560 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:55,560 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1983438603] [2019-11-19 21:25:55,560 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:55,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:55,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:55,630 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1983438603] [2019-11-19 21:25:55,631 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:55,631 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-19 21:25:55,631 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1883312549] [2019-11-19 21:25:55,632 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-19 21:25:55,632 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:55,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-19 21:25:55,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-19 21:25:55,633 INFO L87 Difference]: Start difference. First operand 352 states and 489 transitions. Second operand 4 states. [2019-11-19 21:25:55,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:55,781 INFO L93 Difference]: Finished difference Result 937 states and 1304 transitions. [2019-11-19 21:25:55,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-19 21:25:55,781 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 70 [2019-11-19 21:25:55,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:55,785 INFO L225 Difference]: With dead ends: 937 [2019-11-19 21:25:55,786 INFO L226 Difference]: Without dead ends: 715 [2019-11-19 21:25:55,787 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-19 21:25:55,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2019-11-19 21:25:55,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 518. [2019-11-19 21:25:55,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 518 states. [2019-11-19 21:25:55,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 518 states to 518 states and 716 transitions. [2019-11-19 21:25:55,827 INFO L78 Accepts]: Start accepts. Automaton has 518 states and 716 transitions. Word has length 70 [2019-11-19 21:25:55,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:55,828 INFO L462 AbstractCegarLoop]: Abstraction has 518 states and 716 transitions. [2019-11-19 21:25:55,828 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-19 21:25:55,828 INFO L276 IsEmpty]: Start isEmpty. Operand 518 states and 716 transitions. [2019-11-19 21:25:55,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-19 21:25:55,829 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:55,829 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:55,830 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:55,830 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:55,830 INFO L82 PathProgramCache]: Analyzing trace with hash -1523824051, now seen corresponding path program 1 times [2019-11-19 21:25:55,831 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:55,831 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1402953354] [2019-11-19 21:25:55,831 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:55,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:55,881 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:55,881 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1402953354] [2019-11-19 21:25:55,882 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:55,882 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-19 21:25:55,882 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1896949937] [2019-11-19 21:25:55,883 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-19 21:25:55,883 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:55,884 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-19 21:25:55,884 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:55,884 INFO L87 Difference]: Start difference. First operand 518 states and 716 transitions. Second operand 3 states. [2019-11-19 21:25:55,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:55,972 INFO L93 Difference]: Finished difference Result 1223 states and 1682 transitions. [2019-11-19 21:25:55,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-19 21:25:55,973 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 70 [2019-11-19 21:25:55,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:55,978 INFO L225 Difference]: With dead ends: 1223 [2019-11-19 21:25:55,978 INFO L226 Difference]: Without dead ends: 852 [2019-11-19 21:25:55,980 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:55,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 852 states. [2019-11-19 21:25:56,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 852 to 579. [2019-11-19 21:25:56,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 579 states. [2019-11-19 21:25:56,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 579 states to 579 states and 793 transitions. [2019-11-19 21:25:56,040 INFO L78 Accepts]: Start accepts. Automaton has 579 states and 793 transitions. Word has length 70 [2019-11-19 21:25:56,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:56,041 INFO L462 AbstractCegarLoop]: Abstraction has 579 states and 793 transitions. [2019-11-19 21:25:56,041 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-19 21:25:56,041 INFO L276 IsEmpty]: Start isEmpty. Operand 579 states and 793 transitions. [2019-11-19 21:25:56,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-19 21:25:56,043 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:56,043 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:56,043 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:56,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:56,045 INFO L82 PathProgramCache]: Analyzing trace with hash -1383275441, now seen corresponding path program 1 times [2019-11-19 21:25:56,045 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:56,045 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1931359854] [2019-11-19 21:25:56,046 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:56,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:56,111 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:56,112 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1931359854] [2019-11-19 21:25:56,112 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:56,113 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-19 21:25:56,113 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [175774311] [2019-11-19 21:25:56,114 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-19 21:25:56,114 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:56,115 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-19 21:25:56,115 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:56,115 INFO L87 Difference]: Start difference. First operand 579 states and 793 transitions. Second operand 3 states. [2019-11-19 21:25:56,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:56,169 INFO L93 Difference]: Finished difference Result 984 states and 1357 transitions. [2019-11-19 21:25:56,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-19 21:25:56,170 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 70 [2019-11-19 21:25:56,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:56,173 INFO L225 Difference]: With dead ends: 984 [2019-11-19 21:25:56,173 INFO L226 Difference]: Without dead ends: 544 [2019-11-19 21:25:56,175 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:56,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 544 states. [2019-11-19 21:25:56,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 544 to 544. [2019-11-19 21:25:56,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 544 states. [2019-11-19 21:25:56,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 544 states to 544 states and 744 transitions. [2019-11-19 21:25:56,245 INFO L78 Accepts]: Start accepts. Automaton has 544 states and 744 transitions. Word has length 70 [2019-11-19 21:25:56,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:56,246 INFO L462 AbstractCegarLoop]: Abstraction has 544 states and 744 transitions. [2019-11-19 21:25:56,246 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-19 21:25:56,246 INFO L276 IsEmpty]: Start isEmpty. Operand 544 states and 744 transitions. [2019-11-19 21:25:56,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-11-19 21:25:56,247 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:56,247 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:56,248 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:56,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:56,248 INFO L82 PathProgramCache]: Analyzing trace with hash -1837662732, now seen corresponding path program 1 times [2019-11-19 21:25:56,249 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:56,256 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [168414096] [2019-11-19 21:25:56,257 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:56,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:56,432 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:56,433 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [168414096] [2019-11-19 21:25:56,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:56,434 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-19 21:25:56,435 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [216340516] [2019-11-19 21:25:56,435 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-19 21:25:56,436 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:56,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-19 21:25:56,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-19 21:25:56,436 INFO L87 Difference]: Start difference. First operand 544 states and 744 transitions. Second operand 6 states. [2019-11-19 21:25:56,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:56,751 INFO L93 Difference]: Finished difference Result 1710 states and 2373 transitions. [2019-11-19 21:25:56,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-19 21:25:56,752 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 71 [2019-11-19 21:25:56,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:56,759 INFO L225 Difference]: With dead ends: 1710 [2019-11-19 21:25:56,759 INFO L226 Difference]: Without dead ends: 1386 [2019-11-19 21:25:56,761 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-19 21:25:56,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1386 states. [2019-11-19 21:25:56,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1386 to 548. [2019-11-19 21:25:56,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 548 states. [2019-11-19 21:25:56,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 548 states to 548 states and 749 transitions. [2019-11-19 21:25:56,809 INFO L78 Accepts]: Start accepts. Automaton has 548 states and 749 transitions. Word has length 71 [2019-11-19 21:25:56,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:56,810 INFO L462 AbstractCegarLoop]: Abstraction has 548 states and 749 transitions. [2019-11-19 21:25:56,810 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-19 21:25:56,810 INFO L276 IsEmpty]: Start isEmpty. Operand 548 states and 749 transitions. [2019-11-19 21:25:56,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-11-19 21:25:56,811 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:56,811 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:56,812 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:56,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:56,812 INFO L82 PathProgramCache]: Analyzing trace with hash 276642491, now seen corresponding path program 1 times [2019-11-19 21:25:56,813 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:56,813 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1768316156] [2019-11-19 21:25:56,813 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:56,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:56,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:56,912 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1768316156] [2019-11-19 21:25:56,913 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:56,913 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-19 21:25:56,914 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018141871] [2019-11-19 21:25:56,914 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-19 21:25:56,915 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:56,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-19 21:25:56,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-19 21:25:56,916 INFO L87 Difference]: Start difference. First operand 548 states and 749 transitions. Second operand 5 states. [2019-11-19 21:25:57,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:57,111 INFO L93 Difference]: Finished difference Result 858 states and 1189 transitions. [2019-11-19 21:25:57,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-19 21:25:57,112 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 71 [2019-11-19 21:25:57,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:57,118 INFO L225 Difference]: With dead ends: 858 [2019-11-19 21:25:57,118 INFO L226 Difference]: Without dead ends: 856 [2019-11-19 21:25:57,122 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-19 21:25:57,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 856 states. [2019-11-19 21:25:57,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 856 to 550. [2019-11-19 21:25:57,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 550 states. [2019-11-19 21:25:57,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 550 states to 550 states and 751 transitions. [2019-11-19 21:25:57,186 INFO L78 Accepts]: Start accepts. Automaton has 550 states and 751 transitions. Word has length 71 [2019-11-19 21:25:57,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:57,187 INFO L462 AbstractCegarLoop]: Abstraction has 550 states and 751 transitions. [2019-11-19 21:25:57,187 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-19 21:25:57,187 INFO L276 IsEmpty]: Start isEmpty. Operand 550 states and 751 transitions. [2019-11-19 21:25:57,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-11-19 21:25:57,189 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:57,189 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:57,190 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:57,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:57,191 INFO L82 PathProgramCache]: Analyzing trace with hash -66828782, now seen corresponding path program 1 times [2019-11-19 21:25:57,191 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:57,191 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005268461] [2019-11-19 21:25:57,192 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:57,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:57,325 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:57,325 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1005268461] [2019-11-19 21:25:57,328 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:57,329 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-19 21:25:57,329 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1941869666] [2019-11-19 21:25:57,329 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-19 21:25:57,330 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:57,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-19 21:25:57,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-19 21:25:57,330 INFO L87 Difference]: Start difference. First operand 550 states and 751 transitions. Second operand 6 states. [2019-11-19 21:25:57,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:57,927 INFO L93 Difference]: Finished difference Result 1977 states and 2718 transitions. [2019-11-19 21:25:57,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-19 21:25:57,928 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 71 [2019-11-19 21:25:57,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:57,937 INFO L225 Difference]: With dead ends: 1977 [2019-11-19 21:25:57,938 INFO L226 Difference]: Without dead ends: 1612 [2019-11-19 21:25:57,940 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-11-19 21:25:57,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1612 states. [2019-11-19 21:25:58,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1612 to 596. [2019-11-19 21:25:58,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 596 states. [2019-11-19 21:25:58,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 596 states to 596 states and 809 transitions. [2019-11-19 21:25:58,004 INFO L78 Accepts]: Start accepts. Automaton has 596 states and 809 transitions. Word has length 71 [2019-11-19 21:25:58,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:58,005 INFO L462 AbstractCegarLoop]: Abstraction has 596 states and 809 transitions. [2019-11-19 21:25:58,005 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-19 21:25:58,005 INFO L276 IsEmpty]: Start isEmpty. Operand 596 states and 809 transitions. [2019-11-19 21:25:58,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-11-19 21:25:58,006 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:58,006 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:58,007 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:58,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:58,007 INFO L82 PathProgramCache]: Analyzing trace with hash -624478278, now seen corresponding path program 1 times [2019-11-19 21:25:58,007 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:58,008 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1994000876] [2019-11-19 21:25:58,008 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:58,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:58,123 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:58,123 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1994000876] [2019-11-19 21:25:58,124 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:58,124 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-19 21:25:58,124 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [258817849] [2019-11-19 21:25:58,125 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-19 21:25:58,125 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:58,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-19 21:25:58,125 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-19 21:25:58,126 INFO L87 Difference]: Start difference. First operand 596 states and 809 transitions. Second operand 6 states. [2019-11-19 21:25:58,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:58,649 INFO L93 Difference]: Finished difference Result 2304 states and 3151 transitions. [2019-11-19 21:25:58,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-19 21:25:58,649 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2019-11-19 21:25:58,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:58,659 INFO L225 Difference]: With dead ends: 2304 [2019-11-19 21:25:58,659 INFO L226 Difference]: Without dead ends: 1931 [2019-11-19 21:25:58,661 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-11-19 21:25:58,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1931 states. [2019-11-19 21:25:58,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1931 to 674. [2019-11-19 21:25:58,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 674 states. [2019-11-19 21:25:58,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 674 states to 674 states and 911 transitions. [2019-11-19 21:25:58,731 INFO L78 Accepts]: Start accepts. Automaton has 674 states and 911 transitions. Word has length 72 [2019-11-19 21:25:58,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:58,731 INFO L462 AbstractCegarLoop]: Abstraction has 674 states and 911 transitions. [2019-11-19 21:25:58,731 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-19 21:25:58,731 INFO L276 IsEmpty]: Start isEmpty. Operand 674 states and 911 transitions. [2019-11-19 21:25:58,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-11-19 21:25:58,736 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:58,736 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:58,736 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:58,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:58,737 INFO L82 PathProgramCache]: Analyzing trace with hash -2046951303, now seen corresponding path program 1 times [2019-11-19 21:25:58,737 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:58,737 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1702122098] [2019-11-19 21:25:58,738 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:58,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:58,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:58,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1702122098] [2019-11-19 21:25:58,838 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:58,838 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-19 21:25:58,838 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [318363000] [2019-11-19 21:25:58,839 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-19 21:25:58,841 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:58,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-19 21:25:58,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-19 21:25:58,842 INFO L87 Difference]: Start difference. First operand 674 states and 911 transitions. Second operand 6 states. [2019-11-19 21:25:59,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:59,036 INFO L93 Difference]: Finished difference Result 1500 states and 2090 transitions. [2019-11-19 21:25:59,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-19 21:25:59,037 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2019-11-19 21:25:59,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:59,043 INFO L225 Difference]: With dead ends: 1500 [2019-11-19 21:25:59,043 INFO L226 Difference]: Without dead ends: 1110 [2019-11-19 21:25:59,044 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2019-11-19 21:25:59,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1110 states. [2019-11-19 21:25:59,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1110 to 680. [2019-11-19 21:25:59,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 680 states. [2019-11-19 21:25:59,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 680 states to 680 states and 917 transitions. [2019-11-19 21:25:59,106 INFO L78 Accepts]: Start accepts. Automaton has 680 states and 917 transitions. Word has length 72 [2019-11-19 21:25:59,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:59,107 INFO L462 AbstractCegarLoop]: Abstraction has 680 states and 917 transitions. [2019-11-19 21:25:59,107 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-19 21:25:59,107 INFO L276 IsEmpty]: Start isEmpty. Operand 680 states and 917 transitions. [2019-11-19 21:25:59,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-11-19 21:25:59,108 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:59,109 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:59,109 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:59,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:59,109 INFO L82 PathProgramCache]: Analyzing trace with hash 778464989, now seen corresponding path program 1 times [2019-11-19 21:25:59,111 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:59,112 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198586355] [2019-11-19 21:25:59,112 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:59,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:59,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:59,164 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1198586355] [2019-11-19 21:25:59,164 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:59,164 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-19 21:25:59,164 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [588427925] [2019-11-19 21:25:59,166 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-19 21:25:59,166 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:59,166 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-19 21:25:59,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:59,167 INFO L87 Difference]: Start difference. First operand 680 states and 917 transitions. Second operand 3 states. [2019-11-19 21:25:59,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:59,279 INFO L93 Difference]: Finished difference Result 1334 states and 1821 transitions. [2019-11-19 21:25:59,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-19 21:25:59,279 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-11-19 21:25:59,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:59,284 INFO L225 Difference]: With dead ends: 1334 [2019-11-19 21:25:59,284 INFO L226 Difference]: Without dead ends: 875 [2019-11-19 21:25:59,285 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:59,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2019-11-19 21:25:59,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 659. [2019-11-19 21:25:59,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 659 states. [2019-11-19 21:25:59,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 659 states to 659 states and 880 transitions. [2019-11-19 21:25:59,349 INFO L78 Accepts]: Start accepts. Automaton has 659 states and 880 transitions. Word has length 72 [2019-11-19 21:25:59,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:59,350 INFO L462 AbstractCegarLoop]: Abstraction has 659 states and 880 transitions. [2019-11-19 21:25:59,350 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-19 21:25:59,350 INFO L276 IsEmpty]: Start isEmpty. Operand 659 states and 880 transitions. [2019-11-19 21:25:59,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-11-19 21:25:59,351 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:59,352 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:59,352 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:59,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:59,352 INFO L82 PathProgramCache]: Analyzing trace with hash 449594347, now seen corresponding path program 1 times [2019-11-19 21:25:59,353 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:59,353 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1823250345] [2019-11-19 21:25:59,353 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:59,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:59,415 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:59,415 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1823250345] [2019-11-19 21:25:59,416 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:59,416 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-19 21:25:59,416 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1238699617] [2019-11-19 21:25:59,417 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-19 21:25:59,417 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:59,417 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-19 21:25:59,418 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-19 21:25:59,418 INFO L87 Difference]: Start difference. First operand 659 states and 880 transitions. Second operand 4 states. [2019-11-19 21:25:59,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:59,652 INFO L93 Difference]: Finished difference Result 1702 states and 2282 transitions. [2019-11-19 21:25:59,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-19 21:25:59,653 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 73 [2019-11-19 21:25:59,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:59,660 INFO L225 Difference]: With dead ends: 1702 [2019-11-19 21:25:59,660 INFO L226 Difference]: Without dead ends: 1296 [2019-11-19 21:25:59,662 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-19 21:25:59,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1296 states. [2019-11-19 21:25:59,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1296 to 893. [2019-11-19 21:25:59,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 893 states. [2019-11-19 21:25:59,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 893 states to 893 states and 1191 transitions. [2019-11-19 21:25:59,755 INFO L78 Accepts]: Start accepts. Automaton has 893 states and 1191 transitions. Word has length 73 [2019-11-19 21:25:59,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:25:59,755 INFO L462 AbstractCegarLoop]: Abstraction has 893 states and 1191 transitions. [2019-11-19 21:25:59,755 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-19 21:25:59,756 INFO L276 IsEmpty]: Start isEmpty. Operand 893 states and 1191 transitions. [2019-11-19 21:25:59,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-11-19 21:25:59,757 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:25:59,757 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:25:59,758 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:25:59,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:25:59,758 INFO L82 PathProgramCache]: Analyzing trace with hash 1828954211, now seen corresponding path program 1 times [2019-11-19 21:25:59,759 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:25:59,759 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2066256910] [2019-11-19 21:25:59,759 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:25:59,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:25:59,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:25:59,827 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2066256910] [2019-11-19 21:25:59,828 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:25:59,828 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-19 21:25:59,828 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [152240101] [2019-11-19 21:25:59,828 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-19 21:25:59,829 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:25:59,830 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-19 21:25:59,830 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:59,830 INFO L87 Difference]: Start difference. First operand 893 states and 1191 transitions. Second operand 3 states. [2019-11-19 21:25:59,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:25:59,981 INFO L93 Difference]: Finished difference Result 1870 states and 2511 transitions. [2019-11-19 21:25:59,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-19 21:25:59,982 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 73 [2019-11-19 21:25:59,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:25:59,988 INFO L225 Difference]: With dead ends: 1870 [2019-11-19 21:25:59,988 INFO L226 Difference]: Without dead ends: 1281 [2019-11-19 21:25:59,991 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:25:59,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1281 states. [2019-11-19 21:26:00,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1281 to 849. [2019-11-19 21:26:00,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 849 states. [2019-11-19 21:26:00,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 849 states to 849 states and 1127 transitions. [2019-11-19 21:26:00,099 INFO L78 Accepts]: Start accepts. Automaton has 849 states and 1127 transitions. Word has length 73 [2019-11-19 21:26:00,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:00,099 INFO L462 AbstractCegarLoop]: Abstraction has 849 states and 1127 transitions. [2019-11-19 21:26:00,099 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-19 21:26:00,100 INFO L276 IsEmpty]: Start isEmpty. Operand 849 states and 1127 transitions. [2019-11-19 21:26:00,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-11-19 21:26:00,101 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:00,101 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:00,101 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:00,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:00,102 INFO L82 PathProgramCache]: Analyzing trace with hash 1948644571, now seen corresponding path program 1 times [2019-11-19 21:26:00,103 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:00,103 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [829331455] [2019-11-19 21:26:00,103 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:00,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:00,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:26:00,174 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [829331455] [2019-11-19 21:26:00,175 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:26:00,175 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-19 21:26:00,175 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [582173144] [2019-11-19 21:26:00,176 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-19 21:26:00,176 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:26:00,176 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-19 21:26:00,176 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-19 21:26:00,177 INFO L87 Difference]: Start difference. First operand 849 states and 1127 transitions. Second operand 4 states. [2019-11-19 21:26:00,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:26:00,393 INFO L93 Difference]: Finished difference Result 1986 states and 2630 transitions. [2019-11-19 21:26:00,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-19 21:26:00,393 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 73 [2019-11-19 21:26:00,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:26:00,400 INFO L225 Difference]: With dead ends: 1986 [2019-11-19 21:26:00,400 INFO L226 Difference]: Without dead ends: 1426 [2019-11-19 21:26:00,402 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-19 21:26:00,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1426 states. [2019-11-19 21:26:00,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1426 to 1131. [2019-11-19 21:26:00,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1131 states. [2019-11-19 21:26:00,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1131 states to 1131 states and 1491 transitions. [2019-11-19 21:26:00,506 INFO L78 Accepts]: Start accepts. Automaton has 1131 states and 1491 transitions. Word has length 73 [2019-11-19 21:26:00,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:00,507 INFO L462 AbstractCegarLoop]: Abstraction has 1131 states and 1491 transitions. [2019-11-19 21:26:00,507 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-19 21:26:00,507 INFO L276 IsEmpty]: Start isEmpty. Operand 1131 states and 1491 transitions. [2019-11-19 21:26:00,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-11-19 21:26:00,509 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:00,509 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:00,509 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:00,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:00,510 INFO L82 PathProgramCache]: Analyzing trace with hash 1795806066, now seen corresponding path program 1 times [2019-11-19 21:26:00,510 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:00,510 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913068721] [2019-11-19 21:26:00,511 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:00,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:00,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:26:00,541 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913068721] [2019-11-19 21:26:00,541 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:26:00,542 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-19 21:26:00,542 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2057585835] [2019-11-19 21:26:00,542 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-19 21:26:00,542 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:26:00,543 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-19 21:26:00,543 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:26:00,543 INFO L87 Difference]: Start difference. First operand 1131 states and 1491 transitions. Second operand 3 states. [2019-11-19 21:26:00,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:26:00,817 INFO L93 Difference]: Finished difference Result 2794 states and 3673 transitions. [2019-11-19 21:26:00,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-19 21:26:00,818 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 74 [2019-11-19 21:26:00,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:26:00,826 INFO L225 Difference]: With dead ends: 2794 [2019-11-19 21:26:00,827 INFO L226 Difference]: Without dead ends: 1896 [2019-11-19 21:26:00,829 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-19 21:26:00,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1896 states. [2019-11-19 21:26:00,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1896 to 1133. [2019-11-19 21:26:00,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1133 states. [2019-11-19 21:26:00,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1133 states to 1133 states and 1493 transitions. [2019-11-19 21:26:00,943 INFO L78 Accepts]: Start accepts. Automaton has 1133 states and 1493 transitions. Word has length 74 [2019-11-19 21:26:00,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:00,944 INFO L462 AbstractCegarLoop]: Abstraction has 1133 states and 1493 transitions. [2019-11-19 21:26:00,944 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-19 21:26:00,944 INFO L276 IsEmpty]: Start isEmpty. Operand 1133 states and 1493 transitions. [2019-11-19 21:26:00,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-11-19 21:26:00,945 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:00,946 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:00,946 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:00,946 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:00,947 INFO L82 PathProgramCache]: Analyzing trace with hash 230569326, now seen corresponding path program 1 times [2019-11-19 21:26:00,947 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:00,947 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1195928065] [2019-11-19 21:26:00,947 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:00,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:01,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:26:01,013 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1195928065] [2019-11-19 21:26:01,013 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:26:01,014 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-19 21:26:01,014 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [300840450] [2019-11-19 21:26:01,014 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-19 21:26:01,014 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:26:01,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-19 21:26:01,015 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-19 21:26:01,015 INFO L87 Difference]: Start difference. First operand 1133 states and 1493 transitions. Second operand 4 states. [2019-11-19 21:26:01,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:26:01,242 INFO L93 Difference]: Finished difference Result 2365 states and 3103 transitions. [2019-11-19 21:26:01,242 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-19 21:26:01,242 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2019-11-19 21:26:01,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:26:01,250 INFO L225 Difference]: With dead ends: 2365 [2019-11-19 21:26:01,251 INFO L226 Difference]: Without dead ends: 1287 [2019-11-19 21:26:01,256 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-19 21:26:01,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1287 states. [2019-11-19 21:26:01,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1287 to 946. [2019-11-19 21:26:01,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 946 states. [2019-11-19 21:26:01,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 946 states to 946 states and 1237 transitions. [2019-11-19 21:26:01,410 INFO L78 Accepts]: Start accepts. Automaton has 946 states and 1237 transitions. Word has length 75 [2019-11-19 21:26:01,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:01,411 INFO L462 AbstractCegarLoop]: Abstraction has 946 states and 1237 transitions. [2019-11-19 21:26:01,411 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-19 21:26:01,411 INFO L276 IsEmpty]: Start isEmpty. Operand 946 states and 1237 transitions. [2019-11-19 21:26:01,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-11-19 21:26:01,413 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:01,413 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:01,414 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:01,414 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:01,414 INFO L82 PathProgramCache]: Analyzing trace with hash -818028433, now seen corresponding path program 1 times [2019-11-19 21:26:01,415 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:01,415 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1773500244] [2019-11-19 21:26:01,415 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:01,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:01,505 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:26:01,505 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1773500244] [2019-11-19 21:26:01,505 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:26:01,506 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-19 21:26:01,506 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1497783497] [2019-11-19 21:26:01,506 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-19 21:26:01,507 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:26:01,507 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-19 21:26:01,507 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-19 21:26:01,507 INFO L87 Difference]: Start difference. First operand 946 states and 1237 transitions. Second operand 4 states. [2019-11-19 21:26:01,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:26:01,696 INFO L93 Difference]: Finished difference Result 2178 states and 2855 transitions. [2019-11-19 21:26:01,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-19 21:26:01,697 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 76 [2019-11-19 21:26:01,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:26:01,703 INFO L225 Difference]: With dead ends: 2178 [2019-11-19 21:26:01,704 INFO L226 Difference]: Without dead ends: 1307 [2019-11-19 21:26:01,706 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-19 21:26:01,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1307 states. [2019-11-19 21:26:01,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1307 to 892. [2019-11-19 21:26:01,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 892 states. [2019-11-19 21:26:01,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 892 states to 892 states and 1159 transitions. [2019-11-19 21:26:01,843 INFO L78 Accepts]: Start accepts. Automaton has 892 states and 1159 transitions. Word has length 76 [2019-11-19 21:26:01,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:01,844 INFO L462 AbstractCegarLoop]: Abstraction has 892 states and 1159 transitions. [2019-11-19 21:26:01,844 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-19 21:26:01,844 INFO L276 IsEmpty]: Start isEmpty. Operand 892 states and 1159 transitions. [2019-11-19 21:26:01,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-11-19 21:26:01,847 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:01,848 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:01,848 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:01,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:01,849 INFO L82 PathProgramCache]: Analyzing trace with hash 1542213080, now seen corresponding path program 1 times [2019-11-19 21:26:01,849 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:01,849 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1350211031] [2019-11-19 21:26:01,849 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:01,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:02,180 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:26:02,181 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1350211031] [2019-11-19 21:26:02,181 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1548749746] [2019-11-19 21:26:02,182 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-19 21:26:02,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:02,367 INFO L255 TraceCheckSpWp]: Trace formula consists of 724 conjuncts, 9 conjunts are in the unsatisfiable core [2019-11-19 21:26:02,385 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-19 21:26:02,464 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-11-19 21:26:02,465 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-19 21:26:02,465 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-11-19 21:26:02,466 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [807972203] [2019-11-19 21:26:02,466 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-19 21:26:02,467 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:26:02,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-19 21:26:02,467 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-11-19 21:26:02,467 INFO L87 Difference]: Start difference. First operand 892 states and 1159 transitions. Second operand 6 states. [2019-11-19 21:26:02,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:26:02,892 INFO L93 Difference]: Finished difference Result 2720 states and 3672 transitions. [2019-11-19 21:26:02,893 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-19 21:26:02,893 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 120 [2019-11-19 21:26:02,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:26:02,924 INFO L225 Difference]: With dead ends: 2720 [2019-11-19 21:26:02,927 INFO L226 Difference]: Without dead ends: 1969 [2019-11-19 21:26:02,929 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 117 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=327, Unknown=0, NotChecked=0, Total=380 [2019-11-19 21:26:02,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1969 states. [2019-11-19 21:26:03,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1969 to 892. [2019-11-19 21:26:03,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 892 states. [2019-11-19 21:26:03,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 892 states to 892 states and 1156 transitions. [2019-11-19 21:26:03,057 INFO L78 Accepts]: Start accepts. Automaton has 892 states and 1156 transitions. Word has length 120 [2019-11-19 21:26:03,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:03,057 INFO L462 AbstractCegarLoop]: Abstraction has 892 states and 1156 transitions. [2019-11-19 21:26:03,057 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-19 21:26:03,057 INFO L276 IsEmpty]: Start isEmpty. Operand 892 states and 1156 transitions. [2019-11-19 21:26:03,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2019-11-19 21:26:03,060 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:03,060 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:03,265 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-19 21:26:03,265 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:03,266 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:03,266 INFO L82 PathProgramCache]: Analyzing trace with hash -1832197229, now seen corresponding path program 1 times [2019-11-19 21:26:03,267 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:03,267 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1632287379] [2019-11-19 21:26:03,267 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:03,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:03,649 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:26:03,650 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1632287379] [2019-11-19 21:26:03,650 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [110263142] [2019-11-19 21:26:03,650 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-19 21:26:03,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:03,817 INFO L255 TraceCheckSpWp]: Trace formula consists of 737 conjuncts, 8 conjunts are in the unsatisfiable core [2019-11-19 21:26:03,823 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-19 21:26:03,928 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-11-19 21:26:03,928 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-19 21:26:03,929 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-11-19 21:26:03,929 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1606352447] [2019-11-19 21:26:03,929 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-19 21:26:03,930 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:26:03,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-19 21:26:03,930 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-11-19 21:26:03,930 INFO L87 Difference]: Start difference. First operand 892 states and 1156 transitions. Second operand 6 states. [2019-11-19 21:26:04,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:26:04,303 INFO L93 Difference]: Finished difference Result 2447 states and 3267 transitions. [2019-11-19 21:26:04,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-19 21:26:04,304 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 124 [2019-11-19 21:26:04,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:26:04,308 INFO L225 Difference]: With dead ends: 2447 [2019-11-19 21:26:04,308 INFO L226 Difference]: Without dead ends: 1696 [2019-11-19 21:26:04,310 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 121 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=58, Invalid=362, Unknown=0, NotChecked=0, Total=420 [2019-11-19 21:26:04,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1696 states. [2019-11-19 21:26:04,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1696 to 892. [2019-11-19 21:26:04,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 892 states. [2019-11-19 21:26:04,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 892 states to 892 states and 1153 transitions. [2019-11-19 21:26:04,450 INFO L78 Accepts]: Start accepts. Automaton has 892 states and 1153 transitions. Word has length 124 [2019-11-19 21:26:04,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:04,450 INFO L462 AbstractCegarLoop]: Abstraction has 892 states and 1153 transitions. [2019-11-19 21:26:04,451 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-19 21:26:04,451 INFO L276 IsEmpty]: Start isEmpty. Operand 892 states and 1153 transitions. [2019-11-19 21:26:04,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2019-11-19 21:26:04,453 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:04,454 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:04,659 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-19 21:26:04,662 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:04,663 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:04,663 INFO L82 PathProgramCache]: Analyzing trace with hash 1668386931, now seen corresponding path program 1 times [2019-11-19 21:26:04,663 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:04,663 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1541718571] [2019-11-19 21:26:04,663 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:04,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:04,986 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:26:04,987 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1541718571] [2019-11-19 21:26:04,987 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [588274411] [2019-11-19 21:26:04,988 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-19 21:26:05,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:05,234 INFO L255 TraceCheckSpWp]: Trace formula consists of 749 conjuncts, 12 conjunts are in the unsatisfiable core [2019-11-19 21:26:05,245 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-19 21:26:05,395 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-11-19 21:26:05,396 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-19 21:26:05,396 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-11-19 21:26:05,396 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1882697316] [2019-11-19 21:26:05,397 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-19 21:26:05,398 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:26:05,398 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-19 21:26:05,398 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-11-19 21:26:05,399 INFO L87 Difference]: Start difference. First operand 892 states and 1153 transitions. Second operand 6 states. [2019-11-19 21:26:05,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:26:05,925 INFO L93 Difference]: Finished difference Result 2811 states and 3778 transitions. [2019-11-19 21:26:05,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-19 21:26:05,925 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 127 [2019-11-19 21:26:05,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:26:05,936 INFO L225 Difference]: With dead ends: 2811 [2019-11-19 21:26:05,936 INFO L226 Difference]: Without dead ends: 2047 [2019-11-19 21:26:05,938 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 127 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=79, Invalid=427, Unknown=0, NotChecked=0, Total=506 [2019-11-19 21:26:05,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2047 states. [2019-11-19 21:26:06,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2047 to 840. [2019-11-19 21:26:06,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 840 states. [2019-11-19 21:26:06,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 840 states to 840 states and 1075 transitions. [2019-11-19 21:26:06,037 INFO L78 Accepts]: Start accepts. Automaton has 840 states and 1075 transitions. Word has length 127 [2019-11-19 21:26:06,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:06,037 INFO L462 AbstractCegarLoop]: Abstraction has 840 states and 1075 transitions. [2019-11-19 21:26:06,037 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-19 21:26:06,037 INFO L276 IsEmpty]: Start isEmpty. Operand 840 states and 1075 transitions. [2019-11-19 21:26:06,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2019-11-19 21:26:06,039 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:06,040 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:06,244 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-19 21:26:06,245 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:06,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:06,246 INFO L82 PathProgramCache]: Analyzing trace with hash -1807241978, now seen corresponding path program 1 times [2019-11-19 21:26:06,246 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:06,247 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [203063001] [2019-11-19 21:26:06,247 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:06,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:06,469 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 21 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:26:06,469 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [203063001] [2019-11-19 21:26:06,472 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1457927364] [2019-11-19 21:26:06,472 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-19 21:26:06,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:06,641 INFO L255 TraceCheckSpWp]: Trace formula consists of 750 conjuncts, 8 conjunts are in the unsatisfiable core [2019-11-19 21:26:06,648 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-19 21:26:06,752 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-11-19 21:26:06,753 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-19 21:26:06,753 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2019-11-19 21:26:06,753 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [948958203] [2019-11-19 21:26:06,754 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-19 21:26:06,754 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:26:06,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-19 21:26:06,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2019-11-19 21:26:06,755 INFO L87 Difference]: Start difference. First operand 840 states and 1075 transitions. Second operand 6 states. [2019-11-19 21:26:07,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:26:07,125 INFO L93 Difference]: Finished difference Result 2163 states and 2880 transitions. [2019-11-19 21:26:07,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-19 21:26:07,126 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 128 [2019-11-19 21:26:07,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:26:07,129 INFO L225 Difference]: With dead ends: 2163 [2019-11-19 21:26:07,130 INFO L226 Difference]: Without dead ends: 1478 [2019-11-19 21:26:07,132 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 125 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=48, Invalid=294, Unknown=0, NotChecked=0, Total=342 [2019-11-19 21:26:07,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1478 states. [2019-11-19 21:26:07,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1478 to 840. [2019-11-19 21:26:07,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 840 states. [2019-11-19 21:26:07,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 840 states to 840 states and 1074 transitions. [2019-11-19 21:26:07,270 INFO L78 Accepts]: Start accepts. Automaton has 840 states and 1074 transitions. Word has length 128 [2019-11-19 21:26:07,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:07,271 INFO L462 AbstractCegarLoop]: Abstraction has 840 states and 1074 transitions. [2019-11-19 21:26:07,271 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-19 21:26:07,271 INFO L276 IsEmpty]: Start isEmpty. Operand 840 states and 1074 transitions. [2019-11-19 21:26:07,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2019-11-19 21:26:07,274 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:07,275 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:07,480 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-19 21:26:07,481 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:07,481 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:07,481 INFO L82 PathProgramCache]: Analyzing trace with hash 237584641, now seen corresponding path program 1 times [2019-11-19 21:26:07,482 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:07,482 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1498181524] [2019-11-19 21:26:07,482 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:07,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:07,763 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:26:07,763 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1498181524] [2019-11-19 21:26:07,763 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1533728329] [2019-11-19 21:26:07,764 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-19 21:26:07,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:07,957 INFO L255 TraceCheckSpWp]: Trace formula consists of 764 conjuncts, 45 conjunts are in the unsatisfiable core [2019-11-19 21:26:07,964 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-19 21:26:08,268 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 21 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:26:08,269 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-19 21:26:08,269 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 12] total 17 [2019-11-19 21:26:08,269 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1446711653] [2019-11-19 21:26:08,270 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-11-19 21:26:08,270 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:26:08,271 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-11-19 21:26:08,271 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=251, Unknown=0, NotChecked=0, Total=306 [2019-11-19 21:26:08,271 INFO L87 Difference]: Start difference. First operand 840 states and 1074 transitions. Second operand 18 states. [2019-11-19 21:26:11,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:26:11,976 INFO L93 Difference]: Finished difference Result 3439 states and 4527 transitions. [2019-11-19 21:26:11,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2019-11-19 21:26:11,976 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 132 [2019-11-19 21:26:11,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:26:11,982 INFO L225 Difference]: With dead ends: 3439 [2019-11-19 21:26:11,983 INFO L226 Difference]: Without dead ends: 2760 [2019-11-19 21:26:11,986 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 119 SyntacticMatches, 4 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1942 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1261, Invalid=4745, Unknown=0, NotChecked=0, Total=6006 [2019-11-19 21:26:11,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2760 states. [2019-11-19 21:26:12,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2760 to 1325. [2019-11-19 21:26:12,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1325 states. [2019-11-19 21:26:12,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1325 states to 1325 states and 1715 transitions. [2019-11-19 21:26:12,175 INFO L78 Accepts]: Start accepts. Automaton has 1325 states and 1715 transitions. Word has length 132 [2019-11-19 21:26:12,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:12,176 INFO L462 AbstractCegarLoop]: Abstraction has 1325 states and 1715 transitions. [2019-11-19 21:26:12,176 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-11-19 21:26:12,176 INFO L276 IsEmpty]: Start isEmpty. Operand 1325 states and 1715 transitions. [2019-11-19 21:26:12,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2019-11-19 21:26:12,179 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:12,180 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:12,384 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-19 21:26:12,384 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:12,384 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:12,385 INFO L82 PathProgramCache]: Analyzing trace with hash -700555044, now seen corresponding path program 1 times [2019-11-19 21:26:12,385 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:12,385 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1378482941] [2019-11-19 21:26:12,385 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:12,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:12,449 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2019-11-19 21:26:12,450 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1378482941] [2019-11-19 21:26:12,450 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:26:12,450 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-19 21:26:12,451 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [744320986] [2019-11-19 21:26:12,451 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-19 21:26:12,452 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:26:12,452 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-19 21:26:12,452 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-19 21:26:12,452 INFO L87 Difference]: Start difference. First operand 1325 states and 1715 transitions. Second operand 4 states. [2019-11-19 21:26:12,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:26:12,823 INFO L93 Difference]: Finished difference Result 3265 states and 4250 transitions. [2019-11-19 21:26:12,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-19 21:26:12,823 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 133 [2019-11-19 21:26:12,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:26:12,827 INFO L225 Difference]: With dead ends: 3265 [2019-11-19 21:26:12,828 INFO L226 Difference]: Without dead ends: 2068 [2019-11-19 21:26:12,830 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-19 21:26:12,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2068 states. [2019-11-19 21:26:13,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2068 to 1385. [2019-11-19 21:26:13,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1385 states. [2019-11-19 21:26:13,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1385 states to 1385 states and 1769 transitions. [2019-11-19 21:26:13,004 INFO L78 Accepts]: Start accepts. Automaton has 1385 states and 1769 transitions. Word has length 133 [2019-11-19 21:26:13,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:13,004 INFO L462 AbstractCegarLoop]: Abstraction has 1385 states and 1769 transitions. [2019-11-19 21:26:13,004 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-19 21:26:13,004 INFO L276 IsEmpty]: Start isEmpty. Operand 1385 states and 1769 transitions. [2019-11-19 21:26:13,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2019-11-19 21:26:13,007 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:13,007 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:13,007 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:13,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:13,008 INFO L82 PathProgramCache]: Analyzing trace with hash -709461544, now seen corresponding path program 1 times [2019-11-19 21:26:13,008 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:13,008 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [131858811] [2019-11-19 21:26:13,009 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:13,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:13,106 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2019-11-19 21:26:13,107 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [131858811] [2019-11-19 21:26:13,107 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:26:13,107 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-19 21:26:13,107 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1262706887] [2019-11-19 21:26:13,108 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-19 21:26:13,108 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:26:13,109 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-19 21:26:13,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-19 21:26:13,109 INFO L87 Difference]: Start difference. First operand 1385 states and 1769 transitions. Second operand 5 states. [2019-11-19 21:26:13,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:26:13,462 INFO L93 Difference]: Finished difference Result 2514 states and 3258 transitions. [2019-11-19 21:26:13,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-19 21:26:13,462 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 133 [2019-11-19 21:26:13,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:26:13,465 INFO L225 Difference]: With dead ends: 2514 [2019-11-19 21:26:13,466 INFO L226 Difference]: Without dead ends: 1257 [2019-11-19 21:26:13,468 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-19 21:26:13,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1257 states. [2019-11-19 21:26:13,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1257 to 1257. [2019-11-19 21:26:13,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1257 states. [2019-11-19 21:26:13,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1257 states to 1257 states and 1621 transitions. [2019-11-19 21:26:13,668 INFO L78 Accepts]: Start accepts. Automaton has 1257 states and 1621 transitions. Word has length 133 [2019-11-19 21:26:13,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:13,669 INFO L462 AbstractCegarLoop]: Abstraction has 1257 states and 1621 transitions. [2019-11-19 21:26:13,669 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-19 21:26:13,669 INFO L276 IsEmpty]: Start isEmpty. Operand 1257 states and 1621 transitions. [2019-11-19 21:26:13,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2019-11-19 21:26:13,673 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:13,673 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:13,673 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:13,674 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:13,674 INFO L82 PathProgramCache]: Analyzing trace with hash 77500617, now seen corresponding path program 1 times [2019-11-19 21:26:13,674 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:13,675 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1140015371] [2019-11-19 21:26:13,675 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:13,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:13,758 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2019-11-19 21:26:13,759 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1140015371] [2019-11-19 21:26:13,759 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:26:13,759 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-19 21:26:13,759 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [672608315] [2019-11-19 21:26:13,760 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-19 21:26:13,760 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:26:13,760 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-19 21:26:13,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-19 21:26:13,761 INFO L87 Difference]: Start difference. First operand 1257 states and 1621 transitions. Second operand 6 states. [2019-11-19 21:26:14,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:26:14,614 INFO L93 Difference]: Finished difference Result 6586 states and 8686 transitions. [2019-11-19 21:26:14,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-19 21:26:14,619 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 134 [2019-11-19 21:26:14,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:26:14,630 INFO L225 Difference]: With dead ends: 6586 [2019-11-19 21:26:14,631 INFO L226 Difference]: Without dead ends: 5510 [2019-11-19 21:26:14,634 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2019-11-19 21:26:14,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5510 states. [2019-11-19 21:26:14,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5510 to 1599. [2019-11-19 21:26:14,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1599 states. [2019-11-19 21:26:14,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1599 states to 1599 states and 2021 transitions. [2019-11-19 21:26:14,914 INFO L78 Accepts]: Start accepts. Automaton has 1599 states and 2021 transitions. Word has length 134 [2019-11-19 21:26:14,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:14,915 INFO L462 AbstractCegarLoop]: Abstraction has 1599 states and 2021 transitions. [2019-11-19 21:26:14,915 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-19 21:26:14,915 INFO L276 IsEmpty]: Start isEmpty. Operand 1599 states and 2021 transitions. [2019-11-19 21:26:14,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-11-19 21:26:14,918 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:14,919 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:14,919 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:14,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:14,920 INFO L82 PathProgramCache]: Analyzing trace with hash -825335127, now seen corresponding path program 1 times [2019-11-19 21:26:14,920 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:14,920 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1176113209] [2019-11-19 21:26:14,920 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:14,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:15,193 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:26:15,194 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1176113209] [2019-11-19 21:26:15,194 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [47011394] [2019-11-19 21:26:15,194 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-19 21:26:15,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:15,358 INFO L255 TraceCheckSpWp]: Trace formula consists of 776 conjuncts, 8 conjunts are in the unsatisfiable core [2019-11-19 21:26:15,363 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-19 21:26:15,448 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-11-19 21:26:15,449 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-19 21:26:15,449 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-11-19 21:26:15,449 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [266416521] [2019-11-19 21:26:15,450 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-19 21:26:15,450 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:26:15,450 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-19 21:26:15,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-11-19 21:26:15,451 INFO L87 Difference]: Start difference. First operand 1599 states and 2021 transitions. Second operand 6 states. [2019-11-19 21:26:16,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:26:16,017 INFO L93 Difference]: Finished difference Result 4910 states and 6326 transitions. [2019-11-19 21:26:16,018 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-19 21:26:16,018 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 135 [2019-11-19 21:26:16,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:26:16,024 INFO L225 Difference]: With dead ends: 4910 [2019-11-19 21:26:16,024 INFO L226 Difference]: Without dead ends: 3472 [2019-11-19 21:26:16,027 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 132 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=58, Invalid=362, Unknown=0, NotChecked=0, Total=420 [2019-11-19 21:26:16,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3472 states. [2019-11-19 21:26:16,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3472 to 1599. [2019-11-19 21:26:16,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1599 states. [2019-11-19 21:26:16,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1599 states to 1599 states and 2019 transitions. [2019-11-19 21:26:16,272 INFO L78 Accepts]: Start accepts. Automaton has 1599 states and 2019 transitions. Word has length 135 [2019-11-19 21:26:16,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:16,272 INFO L462 AbstractCegarLoop]: Abstraction has 1599 states and 2019 transitions. [2019-11-19 21:26:16,272 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-19 21:26:16,272 INFO L276 IsEmpty]: Start isEmpty. Operand 1599 states and 2019 transitions. [2019-11-19 21:26:16,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-11-19 21:26:16,275 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:16,275 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:16,479 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-19 21:26:16,484 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:16,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:16,485 INFO L82 PathProgramCache]: Analyzing trace with hash -1957396857, now seen corresponding path program 1 times [2019-11-19 21:26:16,486 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:16,486 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [305799766] [2019-11-19 21:26:16,486 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:16,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:16,690 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 28 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:26:16,690 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [305799766] [2019-11-19 21:26:16,690 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1465902514] [2019-11-19 21:26:16,691 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-19 21:26:16,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:16,901 INFO L255 TraceCheckSpWp]: Trace formula consists of 766 conjuncts, 46 conjunts are in the unsatisfiable core [2019-11-19 21:26:16,905 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-19 21:26:17,288 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 28 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-19 21:26:17,289 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-19 21:26:17,289 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 20 [2019-11-19 21:26:17,290 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1122282653] [2019-11-19 21:26:17,290 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-11-19 21:26:17,291 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:26:17,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-11-19 21:26:17,293 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=352, Unknown=0, NotChecked=0, Total=420 [2019-11-19 21:26:17,293 INFO L87 Difference]: Start difference. First operand 1599 states and 2019 transitions. Second operand 21 states. [2019-11-19 21:26:20,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:26:20,121 INFO L93 Difference]: Finished difference Result 4391 states and 5566 transitions. [2019-11-19 21:26:20,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-11-19 21:26:20,121 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 135 [2019-11-19 21:26:20,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:26:20,126 INFO L225 Difference]: With dead ends: 4391 [2019-11-19 21:26:20,126 INFO L226 Difference]: Without dead ends: 2973 [2019-11-19 21:26:20,131 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 185 GetRequests, 121 SyntacticMatches, 4 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 997 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=649, Invalid=3133, Unknown=0, NotChecked=0, Total=3782 [2019-11-19 21:26:20,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2973 states. [2019-11-19 21:26:20,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2973 to 1819. [2019-11-19 21:26:20,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1819 states. [2019-11-19 21:26:20,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1819 states to 1819 states and 2290 transitions. [2019-11-19 21:26:20,434 INFO L78 Accepts]: Start accepts. Automaton has 1819 states and 2290 transitions. Word has length 135 [2019-11-19 21:26:20,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:20,434 INFO L462 AbstractCegarLoop]: Abstraction has 1819 states and 2290 transitions. [2019-11-19 21:26:20,434 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-11-19 21:26:20,434 INFO L276 IsEmpty]: Start isEmpty. Operand 1819 states and 2290 transitions. [2019-11-19 21:26:20,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-11-19 21:26:20,437 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:20,437 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:20,641 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-19 21:26:20,642 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:20,642 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:20,642 INFO L82 PathProgramCache]: Analyzing trace with hash 470861765, now seen corresponding path program 1 times [2019-11-19 21:26:20,642 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:20,642 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2137406810] [2019-11-19 21:26:20,642 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:20,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-19 21:26:20,699 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2019-11-19 21:26:20,700 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2137406810] [2019-11-19 21:26:20,700 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-19 21:26:20,700 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-19 21:26:20,700 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [376807015] [2019-11-19 21:26:20,701 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-19 21:26:20,701 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-19 21:26:20,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-19 21:26:20,702 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-19 21:26:20,702 INFO L87 Difference]: Start difference. First operand 1819 states and 2290 transitions. Second operand 4 states. [2019-11-19 21:26:21,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-19 21:26:21,106 INFO L93 Difference]: Finished difference Result 3316 states and 4201 transitions. [2019-11-19 21:26:21,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-19 21:26:21,107 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 135 [2019-11-19 21:26:21,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-19 21:26:21,109 INFO L225 Difference]: With dead ends: 3316 [2019-11-19 21:26:21,109 INFO L226 Difference]: Without dead ends: 1623 [2019-11-19 21:26:21,112 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-19 21:26:21,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1623 states. [2019-11-19 21:26:21,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1623 to 1623. [2019-11-19 21:26:21,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1623 states. [2019-11-19 21:26:21,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1623 states to 1623 states and 2029 transitions. [2019-11-19 21:26:21,306 INFO L78 Accepts]: Start accepts. Automaton has 1623 states and 2029 transitions. Word has length 135 [2019-11-19 21:26:21,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-19 21:26:21,306 INFO L462 AbstractCegarLoop]: Abstraction has 1623 states and 2029 transitions. [2019-11-19 21:26:21,306 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-19 21:26:21,307 INFO L276 IsEmpty]: Start isEmpty. Operand 1623 states and 2029 transitions. [2019-11-19 21:26:21,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2019-11-19 21:26:21,309 INFO L402 BasicCegarLoop]: Found error trace [2019-11-19 21:26:21,309 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-19 21:26:21,309 INFO L410 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-19 21:26:21,310 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-19 21:26:21,310 INFO L82 PathProgramCache]: Analyzing trace with hash -1467051729, now seen corresponding path program 1 times [2019-11-19 21:26:21,310 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-19 21:26:21,310 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1925245986] [2019-11-19 21:26:21,310 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-19 21:26:21,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-19 21:26:21,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-19 21:26:21,548 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-19 21:26:21,549 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-19 21:26:21,783 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 19.11 09:26:21 BoogieIcfgContainer [2019-11-19 21:26:21,784 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-19 21:26:21,784 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-19 21:26:21,784 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-19 21:26:21,787 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-19 21:26:21,787 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 09:25:51" (3/4) ... [2019-11-19 21:26:21,790 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-19 21:26:21,994 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-11-19 21:26:21,995 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-19 21:26:21,997 INFO L168 Benchmark]: Toolchain (without parser) took 32545.02 ms. Allocated memory was 1.0 GB in the beginning and 1.9 GB in the end (delta: 853.0 MB). Free memory was 955.0 MB in the beginning and 1.3 GB in the end (delta: -349.1 MB). Peak memory consumption was 503.9 MB. Max. memory is 11.5 GB. [2019-11-19 21:26:21,997 INFO L168 Benchmark]: CDTParser took 0.31 ms. Allocated memory is still 1.0 GB. Free memory is still 981.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-19 21:26:21,998 INFO L168 Benchmark]: CACSL2BoogieTranslator took 618.95 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 131.6 MB). Free memory was 955.0 MB in the beginning and 1.1 GB in the end (delta: -159.4 MB). Peak memory consumption was 20.4 MB. Max. memory is 11.5 GB. [2019-11-19 21:26:21,998 INFO L168 Benchmark]: Boogie Procedure Inliner took 80.79 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.7 MB). Peak memory consumption was 1.7 MB. Max. memory is 11.5 GB. [2019-11-19 21:26:21,999 INFO L168 Benchmark]: Boogie Preprocessor took 71.11 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2019-11-19 21:26:21,999 INFO L168 Benchmark]: RCFGBuilder took 1250.11 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 85.6 MB). Peak memory consumption was 85.6 MB. Max. memory is 11.5 GB. [2019-11-19 21:26:21,999 INFO L168 Benchmark]: TraceAbstraction took 30308.17 ms. Allocated memory was 1.2 GB in the beginning and 1.9 GB in the end (delta: 721.4 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -324.6 MB). Peak memory consumption was 396.9 MB. Max. memory is 11.5 GB. [2019-11-19 21:26:22,000 INFO L168 Benchmark]: Witness Printer took 210.42 ms. Allocated memory is still 1.9 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 40.8 MB). Peak memory consumption was 40.8 MB. Max. memory is 11.5 GB. [2019-11-19 21:26:22,002 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.31 ms. Allocated memory is still 1.0 GB. Free memory is still 981.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 618.95 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 131.6 MB). Free memory was 955.0 MB in the beginning and 1.1 GB in the end (delta: -159.4 MB). Peak memory consumption was 20.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 80.79 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.7 MB). Peak memory consumption was 1.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 71.11 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1250.11 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 85.6 MB). Peak memory consumption was 85.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 30308.17 ms. Allocated memory was 1.2 GB in the beginning and 1.9 GB in the end (delta: 721.4 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -324.6 MB). Peak memory consumption was 396.9 MB. Max. memory is 11.5 GB. * Witness Printer took 210.42 ms. Allocated memory is still 1.9 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 40.8 MB). Peak memory consumption was 40.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 654]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L69] msg_t nomsg = (msg_t )-1; [L70] port_t cs1 ; [L71] int8_t cs1_old ; [L72] int8_t cs1_new ; [L73] port_t cs2 ; [L74] int8_t cs2_old ; [L75] int8_t cs2_new ; [L76] port_t s1s2 ; [L77] int8_t s1s2_old ; [L78] int8_t s1s2_new ; [L79] port_t s1s1 ; [L80] int8_t s1s1_old ; [L81] int8_t s1s1_new ; [L82] port_t s2s1 ; [L83] int8_t s2s1_old ; [L84] int8_t s2s1_new ; [L85] port_t s2s2 ; [L86] int8_t s2s2_old ; [L87] int8_t s2s2_new ; [L88] port_t s1p ; [L89] int8_t s1p_old ; [L90] int8_t s1p_new ; [L91] port_t s2p ; [L92] int8_t s2p_old ; [L93] int8_t s2p_new ; [L96] _Bool side1Failed ; [L97] _Bool side2Failed ; [L98] msg_t side1_written ; [L99] msg_t side2_written ; [L102] static _Bool side1Failed_History_0 ; [L103] static _Bool side1Failed_History_1 ; [L104] static _Bool side1Failed_History_2 ; [L105] static _Bool side2Failed_History_0 ; [L106] static _Bool side2Failed_History_1 ; [L107] static _Bool side2Failed_History_2 ; [L108] static int8_t active_side_History_0 ; [L109] static int8_t active_side_History_1 ; [L110] static int8_t active_side_History_2 ; [L111] static msg_t manual_selection_History_0 ; [L112] static msg_t manual_selection_History_1 ; [L113] static msg_t manual_selection_History_2 ; [L455] void (*nodes[4])(void) = { & Console_task_each_pals_period, & Side1_activestandby_task_each_pals_period, & Side2_activestandby_task_each_pals_period, & Pendulum_prism_task_each_pals_period}; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L577] int c1 ; [L578] int i2 ; [L581] c1 = 0 [L582] side1Failed = __VERIFIER_nondet_bool() [L583] side2Failed = __VERIFIER_nondet_bool() [L584] side1_written = __VERIFIER_nondet_char() [L585] side2_written = __VERIFIER_nondet_char() [L586] side1Failed_History_0 = __VERIFIER_nondet_bool() [L587] side1Failed_History_1 = __VERIFIER_nondet_bool() [L588] side1Failed_History_2 = __VERIFIER_nondet_bool() [L589] side2Failed_History_0 = __VERIFIER_nondet_bool() [L590] side2Failed_History_1 = __VERIFIER_nondet_bool() [L591] side2Failed_History_2 = __VERIFIER_nondet_bool() [L592] active_side_History_0 = __VERIFIER_nondet_char() [L593] active_side_History_1 = __VERIFIER_nondet_char() [L594] active_side_History_2 = __VERIFIER_nondet_char() [L595] manual_selection_History_0 = __VERIFIER_nondet_char() [L596] manual_selection_History_1 = __VERIFIER_nondet_char() [L597] manual_selection_History_2 = __VERIFIER_nondet_char() [L239] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L242] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L245] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L248] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L251] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L254] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L257] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L260] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L263] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L269] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L272] COND FALSE !((int )manual_selection_History_2 != 0) [L275] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L598] i2 = init() [L600] cs1_old = nomsg [L601] cs1_new = nomsg [L602] cs2_old = nomsg [L603] cs2_new = nomsg [L604] s1s2_old = nomsg [L605] s1s2_new = nomsg [L606] s1s1_old = nomsg [L607] s1s1_new = nomsg [L608] s2s1_old = nomsg [L609] s2s1_new = nomsg [L610] s2s2_old = nomsg [L611] s2s2_new = nomsg [L612] s1p_old = nomsg [L613] s1p_new = nomsg [L614] s2p_old = nomsg [L615] s2p_new = nomsg [L616] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L617] COND TRUE i2 < 10 [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L321] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L321] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L322] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L322] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L323] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND FALSE !(\read(side2Failed)) [L383] side1 = s1s2_old [L384] s1s2_old = nomsg [L385] side2 = s2s2_old [L386] s2s2_old = nomsg [L387] manual_selection = cs2_old [L388] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L389] COND TRUE (int )side1 == (int )side2 [L390] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L414] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L414] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L415] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L415] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L416] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; [L190] COND TRUE (int )index == 0 [L191] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L436] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND FALSE !((int )side1 == 0) [L449] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L623] cs1_old = cs1_new [L624] cs1_new = nomsg [L625] cs2_old = cs2_new [L626] cs2_new = nomsg [L627] s1s2_old = s1s2_new [L628] s1s2_new = nomsg [L629] s1s1_old = s1s1_new [L630] s1s1_new = nomsg [L631] s2s1_old = s2s1_new [L632] s2s1_new = nomsg [L633] s2s2_old = s2s2_new [L634] s2s2_new = nomsg [L635] s1p_old = s1p_new [L636] s1p_new = nomsg [L637] s2p_old = s2p_new [L638] s2p_new = nomsg [L458] int tmp ; [L459] msg_t tmp___0 ; [L460] _Bool tmp___1 ; [L461] _Bool tmp___2 ; [L462] _Bool tmp___3 ; [L463] _Bool tmp___4 ; [L464] int8_t tmp___5 ; [L465] _Bool tmp___6 ; [L466] _Bool tmp___7 ; [L467] _Bool tmp___8 ; [L468] int8_t tmp___9 ; [L469] _Bool tmp___10 ; [L470] _Bool tmp___11 ; [L471] _Bool tmp___12 ; [L472] msg_t tmp___13 ; [L473] _Bool tmp___14 ; [L474] _Bool tmp___15 ; [L475] _Bool tmp___16 ; [L476] _Bool tmp___17 ; [L477] int8_t tmp___18 ; [L478] int8_t tmp___19 ; [L479] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L482] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L485] COND TRUE ! side2Failed [L486] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L491] tmp___0 = read_manual_selection_history((unsigned char)1) [L492] COND TRUE ! tmp___0 [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L493] tmp___1 = read_side1_failed_history((unsigned char)1) [L494] COND TRUE ! tmp___1 [L130] COND TRUE (int )index == 0 [L131] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L495] tmp___2 = read_side1_failed_history((unsigned char)0) [L496] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L521] tmp___7 = read_side1_failed_history((unsigned char)1) [L522] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] tmp___11 = read_side1_failed_history((unsigned char)1) [L538] COND TRUE ! tmp___11 [L160] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L539] tmp___12 = read_side2_failed_history((unsigned char)1) [L540] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L193] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L196] COND TRUE (int )index == 2 [L197] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L553] tmp___20 = read_active_side_history((unsigned char)2) [L554] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L572] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L639] c1 = check() [L652] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L641] i2 ++ VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L617] COND TRUE i2 < 10 [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-128, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-128, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND FALSE !(\read(side1Failed)) [L326] side1 = s1s1_old [L327] s1s1_old = nomsg [L328] side2 = s2s1_old [L329] s2s1_old = nomsg [L330] manual_selection = cs1_old [L331] cs1_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L332] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L335] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L336] COND TRUE (int )side2 != (int )nomsg [L337] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L356] EXPR next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L356] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L357] EXPR next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L357] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L358] EXPR next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L358] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L359] side1_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND TRUE \read(side2Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L377] EXPR nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L377] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L378] EXPR nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L378] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L379] EXPR nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L379] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L380] side2_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; [L190] COND TRUE (int )index == 0 [L191] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L436] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND FALSE !((int )side1 == 0) [L449] active_side = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L623] cs1_old = cs1_new [L624] cs1_new = nomsg [L625] cs2_old = cs2_new [L626] cs2_new = nomsg [L627] s1s2_old = s1s2_new [L628] s1s2_new = nomsg [L629] s1s1_old = s1s1_new [L630] s1s1_new = nomsg [L631] s2s1_old = s2s1_new [L632] s2s1_new = nomsg [L633] s2s2_old = s2s2_new [L634] s2s2_new = nomsg [L635] s1p_old = s1p_new [L636] s1p_new = nomsg [L637] s2p_old = s2p_new [L638] s2p_new = nomsg [L458] int tmp ; [L459] msg_t tmp___0 ; [L460] _Bool tmp___1 ; [L461] _Bool tmp___2 ; [L462] _Bool tmp___3 ; [L463] _Bool tmp___4 ; [L464] int8_t tmp___5 ; [L465] _Bool tmp___6 ; [L466] _Bool tmp___7 ; [L467] _Bool tmp___8 ; [L468] int8_t tmp___9 ; [L469] _Bool tmp___10 ; [L470] _Bool tmp___11 ; [L471] _Bool tmp___12 ; [L472] msg_t tmp___13 ; [L473] _Bool tmp___14 ; [L474] _Bool tmp___15 ; [L475] _Bool tmp___16 ; [L476] _Bool tmp___17 ; [L477] int8_t tmp___18 ; [L478] int8_t tmp___19 ; [L479] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L482] COND TRUE ! side1Failed [L483] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L491] tmp___0 = read_manual_selection_history((unsigned char)1) [L492] COND FALSE !(! tmp___0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L521] tmp___7 = read_side1_failed_history((unsigned char)1) [L522] COND TRUE \read(tmp___7) [L160] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L523] tmp___8 = read_side2_failed_history((unsigned char)1) [L524] COND TRUE ! tmp___8 [L190] COND TRUE (int )index == 0 [L191] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L525] tmp___5 = read_active_side_history((unsigned char)0) [L526] COND TRUE ! ((int )tmp___5 == 2) [L527] return (0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L639] c1 = check() [L652] COND TRUE ! arg VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L654] __VERIFIER_error() VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 291 locations, 23 error locations. Result: UNSAFE, OverallTime: 30.2s, OverallIterations: 37, TraceHistogramMax: 2, AutomataDifference: 16.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 15713 SDtfs, 28413 SDslu, 34026 SDs, 0 SdLazy, 5191 SolverSat, 400 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1324 GetRequests, 950 SyntacticMatches, 19 SemanticMatches, 355 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3349 ImplicationChecksByTransitivity, 6.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=1819occurred in iteration=35, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.6s AutomataMinimizationTime, 36 MinimizatonAttempts, 21934 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.4s SsaConstructionTime, 1.9s SatisfiabilityAnalysisTime, 4.6s InterpolantComputationTime, 4081 NumberOfCodeBlocks, 4081 NumberOfCodeBlocksAsserted, 44 NumberOfCheckSat, 3902 ConstructedInterpolants, 0 QuantifiedInterpolants, 1566655 SizeOfPredicates, 38 NumberOfNonLiveVariables, 5266 ConjunctsInSsa, 136 ConjunctsInUnsatCore, 43 InterpolantComputations, 34 PerfectInterpolantSequences, 582/673 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...