./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded-reduced/pals_floodmax.3.2.ufo.UNBOUNDED.pals.c.v+lhb-reducer.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_4f463e3d-0425-43c9-9672-9248240c0e2f/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_4f463e3d-0425-43c9-9672-9248240c0e2f/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_4f463e3d-0425-43c9-9672-9248240c0e2f/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_4f463e3d-0425-43c9-9672-9248240c0e2f/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded-reduced/pals_floodmax.3.2.ufo.UNBOUNDED.pals.c.v+lhb-reducer.c -s /tmp/vcloud-vcloud-master/worker/working_dir_4f463e3d-0425-43c9-9672-9248240c0e2f/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_4f463e3d-0425-43c9-9672-9248240c0e2f/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash fb3a4b195c75cf03f04a5fbe6f3aca380cce8e4d ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-10-22 08:57:32,408 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-22 08:57:32,409 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-22 08:57:32,418 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-22 08:57:32,419 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-22 08:57:32,419 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-22 08:57:32,421 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-22 08:57:32,422 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-22 08:57:32,424 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-22 08:57:32,425 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-22 08:57:32,425 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-22 08:57:32,426 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-22 08:57:32,427 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-22 08:57:32,427 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-22 08:57:32,428 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-22 08:57:32,429 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-22 08:57:32,430 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-22 08:57:32,431 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-22 08:57:32,432 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-22 08:57:32,434 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-22 08:57:32,435 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-22 08:57:32,436 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-22 08:57:32,437 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-22 08:57:32,438 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-22 08:57:32,440 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-10-22 08:57:32,440 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-10-22 08:57:32,440 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-10-22 08:57:32,441 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-10-22 08:57:32,442 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-10-22 08:57:32,443 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-10-22 08:57:32,443 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-10-22 08:57:32,443 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-10-22 08:57:32,444 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-10-22 08:57:32,445 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-10-22 08:57:32,446 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-10-22 08:57:32,446 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-10-22 08:57:32,446 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-10-22 08:57:32,447 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-10-22 08:57:32,447 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-22 08:57:32,448 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-22 08:57:32,448 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-22 08:57:32,449 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_4f463e3d-0425-43c9-9672-9248240c0e2f/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-22 08:57:32,460 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-22 08:57:32,460 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-22 08:57:32,461 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-22 08:57:32,461 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-22 08:57:32,462 INFO L138 SettingsManager]: * Use SBE=true [2019-10-22 08:57:32,462 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-22 08:57:32,462 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-22 08:57:32,462 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-22 08:57:32,462 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-22 08:57:32,462 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-22 08:57:32,463 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-22 08:57:32,468 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-22 08:57:32,468 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-22 08:57:32,468 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-22 08:57:32,468 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-22 08:57:32,468 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-22 08:57:32,469 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-22 08:57:32,469 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-22 08:57:32,469 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-22 08:57:32,469 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-22 08:57:32,469 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-22 08:57:32,469 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-22 08:57:32,470 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-22 08:57:32,470 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-22 08:57:32,470 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-22 08:57:32,470 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-22 08:57:32,470 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-22 08:57:32,471 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-22 08:57:32,471 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_4f463e3d-0425-43c9-9672-9248240c0e2f/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> fb3a4b195c75cf03f04a5fbe6f3aca380cce8e4d [2019-10-22 08:57:32,498 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-22 08:57:32,509 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-22 08:57:32,514 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-22 08:57:32,516 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-22 08:57:32,516 INFO L275 PluginConnector]: CDTParser initialized [2019-10-22 08:57:32,517 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_4f463e3d-0425-43c9-9672-9248240c0e2f/bin/uautomizer/../../sv-benchmarks/c/seq-mthreaded-reduced/pals_floodmax.3.2.ufo.UNBOUNDED.pals.c.v+lhb-reducer.c [2019-10-22 08:57:32,570 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_4f463e3d-0425-43c9-9672-9248240c0e2f/bin/uautomizer/data/8f7e8f72d/69b6964f59d949bb8145ff3c076438c7/FLAGd19839e8f [2019-10-22 08:57:33,049 INFO L306 CDTParser]: Found 1 translation units. [2019-10-22 08:57:33,050 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_4f463e3d-0425-43c9-9672-9248240c0e2f/sv-benchmarks/c/seq-mthreaded-reduced/pals_floodmax.3.2.ufo.UNBOUNDED.pals.c.v+lhb-reducer.c [2019-10-22 08:57:33,071 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_4f463e3d-0425-43c9-9672-9248240c0e2f/bin/uautomizer/data/8f7e8f72d/69b6964f59d949bb8145ff3c076438c7/FLAGd19839e8f [2019-10-22 08:57:33,338 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_4f463e3d-0425-43c9-9672-9248240c0e2f/bin/uautomizer/data/8f7e8f72d/69b6964f59d949bb8145ff3c076438c7 [2019-10-22 08:57:33,342 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-22 08:57:33,343 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-10-22 08:57:33,344 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-22 08:57:33,344 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-22 08:57:33,346 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-22 08:57:33,348 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.10 08:57:33" (1/1) ... [2019-10-22 08:57:33,355 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6812189a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 08:57:33, skipping insertion in model container [2019-10-22 08:57:33,355 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.10 08:57:33" (1/1) ... [2019-10-22 08:57:33,363 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-22 08:57:33,424 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-22 08:57:33,804 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-22 08:57:33,817 INFO L188 MainTranslator]: Completed pre-run [2019-10-22 08:57:33,968 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-22 08:57:33,985 INFO L192 MainTranslator]: Completed translation [2019-10-22 08:57:33,986 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 08:57:33 WrapperNode [2019-10-22 08:57:33,986 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-22 08:57:33,987 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-10-22 08:57:33,987 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-10-22 08:57:33,987 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-10-22 08:57:33,995 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 08:57:33" (1/1) ... [2019-10-22 08:57:34,007 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 08:57:33" (1/1) ... [2019-10-22 08:57:34,052 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-10-22 08:57:34,052 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-22 08:57:34,053 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-22 08:57:34,053 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-22 08:57:34,062 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 08:57:33" (1/1) ... [2019-10-22 08:57:34,062 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 08:57:33" (1/1) ... [2019-10-22 08:57:34,066 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 08:57:33" (1/1) ... [2019-10-22 08:57:34,066 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 08:57:33" (1/1) ... [2019-10-22 08:57:34,075 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 08:57:33" (1/1) ... [2019-10-22 08:57:34,083 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 08:57:33" (1/1) ... [2019-10-22 08:57:34,093 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 08:57:33" (1/1) ... [2019-10-22 08:57:34,097 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-22 08:57:34,098 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-22 08:57:34,098 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-22 08:57:34,098 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-22 08:57:34,099 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 08:57:33" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4f463e3d-0425-43c9-9672-9248240c0e2f/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-22 08:57:34,157 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-22 08:57:34,157 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-22 08:57:35,079 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-22 08:57:35,080 INFO L284 CfgBuilder]: Removed 4 assume(true) statements. [2019-10-22 08:57:35,081 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.10 08:57:35 BoogieIcfgContainer [2019-10-22 08:57:35,081 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-22 08:57:35,082 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-22 08:57:35,083 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-22 08:57:35,086 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-22 08:57:35,086 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 22.10 08:57:33" (1/3) ... [2019-10-22 08:57:35,087 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@473fde8d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.10 08:57:35, skipping insertion in model container [2019-10-22 08:57:35,087 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 08:57:33" (2/3) ... [2019-10-22 08:57:35,087 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@473fde8d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.10 08:57:35, skipping insertion in model container [2019-10-22 08:57:35,088 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.10 08:57:35" (3/3) ... [2019-10-22 08:57:35,090 INFO L109 eAbstractionObserver]: Analyzing ICFG pals_floodmax.3.2.ufo.UNBOUNDED.pals.c.v+lhb-reducer.c [2019-10-22 08:57:35,100 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-22 08:57:35,108 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-10-22 08:57:35,120 INFO L249 AbstractCegarLoop]: Starting to check reachability of 2 error locations. [2019-10-22 08:57:35,146 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-22 08:57:35,146 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-22 08:57:35,147 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-22 08:57:35,147 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-22 08:57:35,147 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-22 08:57:35,147 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-22 08:57:35,147 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-22 08:57:35,147 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-22 08:57:35,168 INFO L276 IsEmpty]: Start isEmpty. Operand 245 states. [2019-10-22 08:57:35,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-10-22 08:57:35,179 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:35,179 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:35,181 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:35,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:35,187 INFO L82 PathProgramCache]: Analyzing trace with hash -1484652330, now seen corresponding path program 1 times [2019-10-22 08:57:35,197 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:35,197 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [606699584] [2019-10-22 08:57:35,197 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:35,198 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:35,198 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:35,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:35,739 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:35,739 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [606699584] [2019-10-22 08:57:35,740 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:35,740 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-22 08:57:35,741 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2089897219] [2019-10-22 08:57:35,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-22 08:57:35,746 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:35,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-22 08:57:35,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-22 08:57:35,762 INFO L87 Difference]: Start difference. First operand 245 states. Second operand 4 states. [2019-10-22 08:57:35,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:35,982 INFO L93 Difference]: Finished difference Result 709 states and 1262 transitions. [2019-10-22 08:57:35,983 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-22 08:57:35,984 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 92 [2019-10-22 08:57:35,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:36,007 INFO L225 Difference]: With dead ends: 709 [2019-10-22 08:57:36,009 INFO L226 Difference]: Without dead ends: 467 [2019-10-22 08:57:36,013 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-10-22 08:57:36,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 467 states. [2019-10-22 08:57:36,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 467 to 446. [2019-10-22 08:57:36,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 446 states. [2019-10-22 08:57:36,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 446 states to 446 states and 650 transitions. [2019-10-22 08:57:36,100 INFO L78 Accepts]: Start accepts. Automaton has 446 states and 650 transitions. Word has length 92 [2019-10-22 08:57:36,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:36,101 INFO L462 AbstractCegarLoop]: Abstraction has 446 states and 650 transitions. [2019-10-22 08:57:36,101 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-22 08:57:36,101 INFO L276 IsEmpty]: Start isEmpty. Operand 446 states and 650 transitions. [2019-10-22 08:57:36,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-10-22 08:57:36,104 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:36,104 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:36,105 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:36,105 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:36,105 INFO L82 PathProgramCache]: Analyzing trace with hash 1677829578, now seen corresponding path program 1 times [2019-10-22 08:57:36,105 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:36,105 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [611994393] [2019-10-22 08:57:36,106 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:36,106 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:36,106 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:36,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:36,177 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:36,177 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [611994393] [2019-10-22 08:57:36,178 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:36,178 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-22 08:57:36,178 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2054044691] [2019-10-22 08:57:36,180 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-22 08:57:36,180 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:36,180 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-22 08:57:36,181 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-22 08:57:36,181 INFO L87 Difference]: Start difference. First operand 446 states and 650 transitions. Second operand 3 states. [2019-10-22 08:57:36,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:36,250 INFO L93 Difference]: Finished difference Result 1300 states and 1888 transitions. [2019-10-22 08:57:36,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-22 08:57:36,251 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 93 [2019-10-22 08:57:36,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:36,255 INFO L225 Difference]: With dead ends: 1300 [2019-10-22 08:57:36,255 INFO L226 Difference]: Without dead ends: 882 [2019-10-22 08:57:36,258 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-22 08:57:36,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 882 states. [2019-10-22 08:57:36,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 882 to 448. [2019-10-22 08:57:36,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 448 states. [2019-10-22 08:57:36,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 448 states to 448 states and 652 transitions. [2019-10-22 08:57:36,298 INFO L78 Accepts]: Start accepts. Automaton has 448 states and 652 transitions. Word has length 93 [2019-10-22 08:57:36,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:36,299 INFO L462 AbstractCegarLoop]: Abstraction has 448 states and 652 transitions. [2019-10-22 08:57:36,299 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-22 08:57:36,299 INFO L276 IsEmpty]: Start isEmpty. Operand 448 states and 652 transitions. [2019-10-22 08:57:36,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-10-22 08:57:36,302 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:36,302 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:36,303 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:36,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:36,303 INFO L82 PathProgramCache]: Analyzing trace with hash 888900743, now seen corresponding path program 1 times [2019-10-22 08:57:36,303 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:36,303 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184886696] [2019-10-22 08:57:36,304 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:36,304 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:36,304 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:36,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:36,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:36,453 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [184886696] [2019-10-22 08:57:36,453 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:36,454 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-22 08:57:36,454 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [111402543] [2019-10-22 08:57:36,454 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-22 08:57:36,455 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:36,455 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-22 08:57:36,455 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-22 08:57:36,455 INFO L87 Difference]: Start difference. First operand 448 states and 652 transitions. Second operand 3 states. [2019-10-22 08:57:36,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:36,528 INFO L93 Difference]: Finished difference Result 1137 states and 1669 transitions. [2019-10-22 08:57:36,529 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-22 08:57:36,529 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 94 [2019-10-22 08:57:36,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:36,532 INFO L225 Difference]: With dead ends: 1137 [2019-10-22 08:57:36,532 INFO L226 Difference]: Without dead ends: 865 [2019-10-22 08:57:36,533 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-22 08:57:36,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2019-10-22 08:57:36,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 846. [2019-10-22 08:57:36,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 846 states. [2019-10-22 08:57:36,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 846 states to 846 states and 1226 transitions. [2019-10-22 08:57:36,572 INFO L78 Accepts]: Start accepts. Automaton has 846 states and 1226 transitions. Word has length 94 [2019-10-22 08:57:36,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:36,572 INFO L462 AbstractCegarLoop]: Abstraction has 846 states and 1226 transitions. [2019-10-22 08:57:36,572 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-22 08:57:36,572 INFO L276 IsEmpty]: Start isEmpty. Operand 846 states and 1226 transitions. [2019-10-22 08:57:36,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-10-22 08:57:36,575 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:36,575 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:36,576 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:36,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:36,576 INFO L82 PathProgramCache]: Analyzing trace with hash -590471708, now seen corresponding path program 1 times [2019-10-22 08:57:36,576 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:36,576 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1412453558] [2019-10-22 08:57:36,577 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:36,577 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:36,577 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:36,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:36,756 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:36,757 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1412453558] [2019-10-22 08:57:36,757 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:36,757 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-22 08:57:36,757 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1809421171] [2019-10-22 08:57:36,757 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-22 08:57:36,758 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:36,758 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-22 08:57:36,758 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-22 08:57:36,758 INFO L87 Difference]: Start difference. First operand 846 states and 1226 transitions. Second operand 4 states. [2019-10-22 08:57:36,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:36,815 INFO L93 Difference]: Finished difference Result 1330 states and 1941 transitions. [2019-10-22 08:57:36,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-22 08:57:36,816 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 94 [2019-10-22 08:57:36,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:36,819 INFO L225 Difference]: With dead ends: 1330 [2019-10-22 08:57:36,819 INFO L226 Difference]: Without dead ends: 650 [2019-10-22 08:57:36,820 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-10-22 08:57:36,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 650 states. [2019-10-22 08:57:36,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 650 to 650. [2019-10-22 08:57:36,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 650 states. [2019-10-22 08:57:36,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 650 states to 650 states and 936 transitions. [2019-10-22 08:57:36,852 INFO L78 Accepts]: Start accepts. Automaton has 650 states and 936 transitions. Word has length 94 [2019-10-22 08:57:36,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:36,853 INFO L462 AbstractCegarLoop]: Abstraction has 650 states and 936 transitions. [2019-10-22 08:57:36,853 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-22 08:57:36,853 INFO L276 IsEmpty]: Start isEmpty. Operand 650 states and 936 transitions. [2019-10-22 08:57:36,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-10-22 08:57:36,854 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:36,854 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:36,855 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:36,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:36,855 INFO L82 PathProgramCache]: Analyzing trace with hash -302740898, now seen corresponding path program 1 times [2019-10-22 08:57:36,855 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:36,855 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1338444606] [2019-10-22 08:57:36,856 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:36,856 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:36,856 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:36,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:37,007 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:37,007 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1338444606] [2019-10-22 08:57:37,008 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:37,008 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-22 08:57:37,008 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [333928962] [2019-10-22 08:57:37,009 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-22 08:57:37,009 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:37,010 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-22 08:57:37,010 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-22 08:57:37,010 INFO L87 Difference]: Start difference. First operand 650 states and 936 transitions. Second operand 4 states. [2019-10-22 08:57:37,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:37,114 INFO L93 Difference]: Finished difference Result 1603 states and 2304 transitions. [2019-10-22 08:57:37,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-22 08:57:37,115 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-10-22 08:57:37,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:37,120 INFO L225 Difference]: With dead ends: 1603 [2019-10-22 08:57:37,120 INFO L226 Difference]: Without dead ends: 972 [2019-10-22 08:57:37,121 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-10-22 08:57:37,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 972 states. [2019-10-22 08:57:37,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 972 to 958. [2019-10-22 08:57:37,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 958 states. [2019-10-22 08:57:37,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 958 states to 958 states and 1367 transitions. [2019-10-22 08:57:37,168 INFO L78 Accepts]: Start accepts. Automaton has 958 states and 1367 transitions. Word has length 96 [2019-10-22 08:57:37,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:37,168 INFO L462 AbstractCegarLoop]: Abstraction has 958 states and 1367 transitions. [2019-10-22 08:57:37,168 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-22 08:57:37,168 INFO L276 IsEmpty]: Start isEmpty. Operand 958 states and 1367 transitions. [2019-10-22 08:57:37,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2019-10-22 08:57:37,170 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:37,170 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:37,170 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:37,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:37,171 INFO L82 PathProgramCache]: Analyzing trace with hash 1934612225, now seen corresponding path program 1 times [2019-10-22 08:57:37,171 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:37,172 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1248162576] [2019-10-22 08:57:37,172 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:37,172 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:37,172 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:37,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:37,240 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:37,241 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1248162576] [2019-10-22 08:57:37,241 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:37,241 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-22 08:57:37,241 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [582349885] [2019-10-22 08:57:37,242 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-22 08:57:37,242 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:37,242 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-22 08:57:37,242 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-22 08:57:37,242 INFO L87 Difference]: Start difference. First operand 958 states and 1367 transitions. Second operand 3 states. [2019-10-22 08:57:37,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:37,334 INFO L93 Difference]: Finished difference Result 2372 states and 3444 transitions. [2019-10-22 08:57:37,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-22 08:57:37,335 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2019-10-22 08:57:37,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:37,340 INFO L225 Difference]: With dead ends: 2372 [2019-10-22 08:57:37,340 INFO L226 Difference]: Without dead ends: 1738 [2019-10-22 08:57:37,341 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-22 08:57:37,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1738 states. [2019-10-22 08:57:37,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1738 to 1726. [2019-10-22 08:57:37,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1726 states. [2019-10-22 08:57:37,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1726 states to 1726 states and 2465 transitions. [2019-10-22 08:57:37,410 INFO L78 Accepts]: Start accepts. Automaton has 1726 states and 2465 transitions. Word has length 98 [2019-10-22 08:57:37,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:37,411 INFO L462 AbstractCegarLoop]: Abstraction has 1726 states and 2465 transitions. [2019-10-22 08:57:37,411 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-22 08:57:37,411 INFO L276 IsEmpty]: Start isEmpty. Operand 1726 states and 2465 transitions. [2019-10-22 08:57:37,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2019-10-22 08:57:37,413 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:37,413 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:37,413 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:37,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:37,413 INFO L82 PathProgramCache]: Analyzing trace with hash 1891861790, now seen corresponding path program 1 times [2019-10-22 08:57:37,414 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:37,414 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1140451560] [2019-10-22 08:57:37,414 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:37,414 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:37,414 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:37,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:37,493 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:37,493 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1140451560] [2019-10-22 08:57:37,494 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:37,494 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-22 08:57:37,494 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [164040372] [2019-10-22 08:57:37,494 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-22 08:57:37,495 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:37,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-22 08:57:37,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-22 08:57:37,495 INFO L87 Difference]: Start difference. First operand 1726 states and 2465 transitions. Second operand 4 states. [2019-10-22 08:57:37,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:37,572 INFO L93 Difference]: Finished difference Result 2601 states and 3737 transitions. [2019-10-22 08:57:37,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-22 08:57:37,572 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 98 [2019-10-22 08:57:37,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:37,577 INFO L225 Difference]: With dead ends: 2601 [2019-10-22 08:57:37,577 INFO L226 Difference]: Without dead ends: 1416 [2019-10-22 08:57:37,579 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-10-22 08:57:37,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1416 states. [2019-10-22 08:57:37,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1416 to 1416. [2019-10-22 08:57:37,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1416 states. [2019-10-22 08:57:37,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1416 states to 1416 states and 2012 transitions. [2019-10-22 08:57:37,639 INFO L78 Accepts]: Start accepts. Automaton has 1416 states and 2012 transitions. Word has length 98 [2019-10-22 08:57:37,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:37,639 INFO L462 AbstractCegarLoop]: Abstraction has 1416 states and 2012 transitions. [2019-10-22 08:57:37,639 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-22 08:57:37,639 INFO L276 IsEmpty]: Start isEmpty. Operand 1416 states and 2012 transitions. [2019-10-22 08:57:37,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2019-10-22 08:57:37,641 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:37,641 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:37,641 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:37,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:37,641 INFO L82 PathProgramCache]: Analyzing trace with hash -397488696, now seen corresponding path program 1 times [2019-10-22 08:57:37,641 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:37,642 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1270248684] [2019-10-22 08:57:37,642 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:37,642 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:37,645 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:37,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:37,688 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:37,689 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1270248684] [2019-10-22 08:57:37,689 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:37,689 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-22 08:57:37,689 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1125115938] [2019-10-22 08:57:37,689 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-22 08:57:37,690 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:37,690 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-22 08:57:37,690 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-22 08:57:37,690 INFO L87 Difference]: Start difference. First operand 1416 states and 2012 transitions. Second operand 3 states. [2019-10-22 08:57:37,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:37,979 INFO L93 Difference]: Finished difference Result 3485 states and 5081 transitions. [2019-10-22 08:57:37,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-22 08:57:37,980 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 100 [2019-10-22 08:57:37,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:37,989 INFO L225 Difference]: With dead ends: 3485 [2019-10-22 08:57:37,989 INFO L226 Difference]: Without dead ends: 2579 [2019-10-22 08:57:37,991 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-22 08:57:37,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2579 states. [2019-10-22 08:57:38,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2579 to 2511. [2019-10-22 08:57:38,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2511 states. [2019-10-22 08:57:38,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2511 states to 2511 states and 3606 transitions. [2019-10-22 08:57:38,149 INFO L78 Accepts]: Start accepts. Automaton has 2511 states and 3606 transitions. Word has length 100 [2019-10-22 08:57:38,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:38,150 INFO L462 AbstractCegarLoop]: Abstraction has 2511 states and 3606 transitions. [2019-10-22 08:57:38,150 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-22 08:57:38,150 INFO L276 IsEmpty]: Start isEmpty. Operand 2511 states and 3606 transitions. [2019-10-22 08:57:38,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2019-10-22 08:57:38,152 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:38,152 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:38,152 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:38,153 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:38,153 INFO L82 PathProgramCache]: Analyzing trace with hash 814612451, now seen corresponding path program 1 times [2019-10-22 08:57:38,153 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:38,153 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1979922984] [2019-10-22 08:57:38,153 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:38,153 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:38,153 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:38,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:38,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:38,261 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1979922984] [2019-10-22 08:57:38,261 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:38,262 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-22 08:57:38,262 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1965452037] [2019-10-22 08:57:38,262 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-22 08:57:38,262 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:38,262 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-22 08:57:38,263 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-22 08:57:38,263 INFO L87 Difference]: Start difference. First operand 2511 states and 3606 transitions. Second operand 4 states. [2019-10-22 08:57:38,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:38,482 INFO L93 Difference]: Finished difference Result 7284 states and 10445 transitions. [2019-10-22 08:57:38,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-22 08:57:38,482 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 100 [2019-10-22 08:57:38,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:38,496 INFO L225 Difference]: With dead ends: 7284 [2019-10-22 08:57:38,496 INFO L226 Difference]: Without dead ends: 4812 [2019-10-22 08:57:38,500 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-10-22 08:57:38,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4812 states. [2019-10-22 08:57:38,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4812 to 4744. [2019-10-22 08:57:38,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4744 states. [2019-10-22 08:57:38,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4744 states to 4744 states and 6749 transitions. [2019-10-22 08:57:38,721 INFO L78 Accepts]: Start accepts. Automaton has 4744 states and 6749 transitions. Word has length 100 [2019-10-22 08:57:38,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:38,721 INFO L462 AbstractCegarLoop]: Abstraction has 4744 states and 6749 transitions. [2019-10-22 08:57:38,721 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-22 08:57:38,722 INFO L276 IsEmpty]: Start isEmpty. Operand 4744 states and 6749 transitions. [2019-10-22 08:57:38,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2019-10-22 08:57:38,725 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:38,725 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:38,725 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:38,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:38,726 INFO L82 PathProgramCache]: Analyzing trace with hash -1949770599, now seen corresponding path program 1 times [2019-10-22 08:57:38,726 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:38,726 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1307083866] [2019-10-22 08:57:38,726 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:38,727 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:38,727 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:38,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:38,754 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:38,754 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1307083866] [2019-10-22 08:57:38,754 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:38,754 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-22 08:57:38,755 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1721866767] [2019-10-22 08:57:38,755 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-22 08:57:38,755 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:38,755 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-22 08:57:38,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-22 08:57:38,755 INFO L87 Difference]: Start difference. First operand 4744 states and 6749 transitions. Second operand 3 states. [2019-10-22 08:57:39,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:39,201 INFO L93 Difference]: Finished difference Result 14042 states and 20000 transitions. [2019-10-22 08:57:39,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-22 08:57:39,202 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 101 [2019-10-22 08:57:39,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:39,228 INFO L225 Difference]: With dead ends: 14042 [2019-10-22 08:57:39,228 INFO L226 Difference]: Without dead ends: 9402 [2019-10-22 08:57:39,233 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-22 08:57:39,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9402 states. [2019-10-22 08:57:39,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9402 to 4750. [2019-10-22 08:57:39,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4750 states. [2019-10-22 08:57:39,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4750 states to 4750 states and 6755 transitions. [2019-10-22 08:57:39,511 INFO L78 Accepts]: Start accepts. Automaton has 4750 states and 6755 transitions. Word has length 101 [2019-10-22 08:57:39,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:39,511 INFO L462 AbstractCegarLoop]: Abstraction has 4750 states and 6755 transitions. [2019-10-22 08:57:39,511 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-22 08:57:39,511 INFO L276 IsEmpty]: Start isEmpty. Operand 4750 states and 6755 transitions. [2019-10-22 08:57:39,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2019-10-22 08:57:39,515 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:39,515 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:39,515 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:39,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:39,516 INFO L82 PathProgramCache]: Analyzing trace with hash 1867198180, now seen corresponding path program 1 times [2019-10-22 08:57:39,516 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:39,516 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [965111010] [2019-10-22 08:57:39,516 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:39,516 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:39,516 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:39,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:39,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:39,593 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [965111010] [2019-10-22 08:57:39,594 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:39,594 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-22 08:57:39,594 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [617610511] [2019-10-22 08:57:39,594 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-22 08:57:39,594 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:39,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-22 08:57:39,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-22 08:57:39,595 INFO L87 Difference]: Start difference. First operand 4750 states and 6755 transitions. Second operand 4 states. [2019-10-22 08:57:39,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:39,812 INFO L93 Difference]: Finished difference Result 9394 states and 13373 transitions. [2019-10-22 08:57:39,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-22 08:57:39,812 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 102 [2019-10-22 08:57:39,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:39,825 INFO L225 Difference]: With dead ends: 9394 [2019-10-22 08:57:39,826 INFO L226 Difference]: Without dead ends: 4750 [2019-10-22 08:57:39,830 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-10-22 08:57:39,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4750 states. [2019-10-22 08:57:40,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4750 to 4747. [2019-10-22 08:57:40,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4747 states. [2019-10-22 08:57:40,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4747 states to 4747 states and 6748 transitions. [2019-10-22 08:57:40,050 INFO L78 Accepts]: Start accepts. Automaton has 4747 states and 6748 transitions. Word has length 102 [2019-10-22 08:57:40,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:40,050 INFO L462 AbstractCegarLoop]: Abstraction has 4747 states and 6748 transitions. [2019-10-22 08:57:40,050 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-22 08:57:40,050 INFO L276 IsEmpty]: Start isEmpty. Operand 4747 states and 6748 transitions. [2019-10-22 08:57:40,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2019-10-22 08:57:40,054 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:40,054 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:40,055 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:40,055 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:40,055 INFO L82 PathProgramCache]: Analyzing trace with hash 1526998869, now seen corresponding path program 1 times [2019-10-22 08:57:40,055 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:40,055 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [128933651] [2019-10-22 08:57:40,055 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:40,055 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:40,055 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:40,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:40,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:40,129 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [128933651] [2019-10-22 08:57:40,130 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:40,130 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-22 08:57:40,130 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1818871561] [2019-10-22 08:57:40,130 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-22 08:57:40,130 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:40,131 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-22 08:57:40,131 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-22 08:57:40,131 INFO L87 Difference]: Start difference. First operand 4747 states and 6748 transitions. Second operand 4 states. [2019-10-22 08:57:40,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:40,375 INFO L93 Difference]: Finished difference Result 9455 states and 13441 transitions. [2019-10-22 08:57:40,376 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-22 08:57:40,376 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 102 [2019-10-22 08:57:40,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:40,394 INFO L225 Difference]: With dead ends: 9455 [2019-10-22 08:57:40,394 INFO L226 Difference]: Without dead ends: 4741 [2019-10-22 08:57:40,399 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-10-22 08:57:40,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4741 states. [2019-10-22 08:57:40,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4741 to 4741. [2019-10-22 08:57:40,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4741 states. [2019-10-22 08:57:40,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4741 states to 4741 states and 6736 transitions. [2019-10-22 08:57:40,615 INFO L78 Accepts]: Start accepts. Automaton has 4741 states and 6736 transitions. Word has length 102 [2019-10-22 08:57:40,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:40,616 INFO L462 AbstractCegarLoop]: Abstraction has 4741 states and 6736 transitions. [2019-10-22 08:57:40,616 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-22 08:57:40,616 INFO L276 IsEmpty]: Start isEmpty. Operand 4741 states and 6736 transitions. [2019-10-22 08:57:40,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2019-10-22 08:57:40,620 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:40,620 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:40,620 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:40,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:40,620 INFO L82 PathProgramCache]: Analyzing trace with hash -339506056, now seen corresponding path program 1 times [2019-10-22 08:57:40,620 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:40,621 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134212386] [2019-10-22 08:57:40,621 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:40,621 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:40,621 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:40,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:40,673 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:40,673 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [134212386] [2019-10-22 08:57:40,673 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:40,673 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-22 08:57:40,673 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1068058374] [2019-10-22 08:57:40,674 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-22 08:57:40,674 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:40,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-22 08:57:40,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-22 08:57:40,674 INFO L87 Difference]: Start difference. First operand 4741 states and 6736 transitions. Second operand 3 states. [2019-10-22 08:57:40,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:40,955 INFO L93 Difference]: Finished difference Result 10883 states and 15556 transitions. [2019-10-22 08:57:40,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-22 08:57:40,956 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 102 [2019-10-22 08:57:40,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:40,968 INFO L225 Difference]: With dead ends: 10883 [2019-10-22 08:57:40,969 INFO L226 Difference]: Without dead ends: 7067 [2019-10-22 08:57:40,974 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-22 08:57:40,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7067 states. [2019-10-22 08:57:41,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7067 to 6999. [2019-10-22 08:57:41,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6999 states. [2019-10-22 08:57:41,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6999 states to 6999 states and 9774 transitions. [2019-10-22 08:57:41,338 INFO L78 Accepts]: Start accepts. Automaton has 6999 states and 9774 transitions. Word has length 102 [2019-10-22 08:57:41,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:41,338 INFO L462 AbstractCegarLoop]: Abstraction has 6999 states and 9774 transitions. [2019-10-22 08:57:41,338 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-22 08:57:41,338 INFO L276 IsEmpty]: Start isEmpty. Operand 6999 states and 9774 transitions. [2019-10-22 08:57:41,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2019-10-22 08:57:41,345 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:41,345 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:41,345 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:41,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:41,346 INFO L82 PathProgramCache]: Analyzing trace with hash 1912112318, now seen corresponding path program 1 times [2019-10-22 08:57:41,346 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:41,346 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [856215299] [2019-10-22 08:57:41,346 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:41,347 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:41,347 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:41,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:41,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:41,643 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [856215299] [2019-10-22 08:57:41,643 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:41,644 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-10-22 08:57:41,644 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [228473954] [2019-10-22 08:57:41,644 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-10-22 08:57:41,644 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:41,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-10-22 08:57:41,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-10-22 08:57:41,645 INFO L87 Difference]: Start difference. First operand 6999 states and 9774 transitions. Second operand 12 states. [2019-10-22 08:57:43,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:43,584 INFO L93 Difference]: Finished difference Result 22476 states and 33479 transitions. [2019-10-22 08:57:43,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-10-22 08:57:43,585 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 104 [2019-10-22 08:57:43,586 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:43,621 INFO L225 Difference]: With dead ends: 22476 [2019-10-22 08:57:43,621 INFO L226 Difference]: Without dead ends: 18968 [2019-10-22 08:57:43,628 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=83, Invalid=223, Unknown=0, NotChecked=0, Total=306 [2019-10-22 08:57:43,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18968 states. [2019-10-22 08:57:44,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18968 to 15714. [2019-10-22 08:57:44,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15714 states. [2019-10-22 08:57:44,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15714 states to 15714 states and 22659 transitions. [2019-10-22 08:57:44,473 INFO L78 Accepts]: Start accepts. Automaton has 15714 states and 22659 transitions. Word has length 104 [2019-10-22 08:57:44,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:44,473 INFO L462 AbstractCegarLoop]: Abstraction has 15714 states and 22659 transitions. [2019-10-22 08:57:44,473 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-10-22 08:57:44,473 INFO L276 IsEmpty]: Start isEmpty. Operand 15714 states and 22659 transitions. [2019-10-22 08:57:44,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2019-10-22 08:57:44,483 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:44,484 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:44,484 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:44,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:44,484 INFO L82 PathProgramCache]: Analyzing trace with hash -53396381, now seen corresponding path program 1 times [2019-10-22 08:57:44,485 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:44,485 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1649423062] [2019-10-22 08:57:44,485 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:44,485 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:44,485 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:44,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:44,651 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:44,652 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1649423062] [2019-10-22 08:57:44,652 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:44,652 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-10-22 08:57:44,652 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625094117] [2019-10-22 08:57:44,653 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-10-22 08:57:44,653 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:44,653 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-10-22 08:57:44,653 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-10-22 08:57:44,653 INFO L87 Difference]: Start difference. First operand 15714 states and 22659 transitions. Second operand 8 states. [2019-10-22 08:57:45,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:45,563 INFO L93 Difference]: Finished difference Result 25833 states and 38643 transitions. [2019-10-22 08:57:45,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-22 08:57:45,564 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 104 [2019-10-22 08:57:45,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:45,594 INFO L225 Difference]: With dead ends: 25833 [2019-10-22 08:57:45,594 INFO L226 Difference]: Without dead ends: 15852 [2019-10-22 08:57:45,608 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-10-22 08:57:45,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15852 states. [2019-10-22 08:57:46,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15852 to 8331. [2019-10-22 08:57:46,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8331 states. [2019-10-22 08:57:46,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8331 states to 8331 states and 11312 transitions. [2019-10-22 08:57:46,140 INFO L78 Accepts]: Start accepts. Automaton has 8331 states and 11312 transitions. Word has length 104 [2019-10-22 08:57:46,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:46,140 INFO L462 AbstractCegarLoop]: Abstraction has 8331 states and 11312 transitions. [2019-10-22 08:57:46,140 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-10-22 08:57:46,140 INFO L276 IsEmpty]: Start isEmpty. Operand 8331 states and 11312 transitions. [2019-10-22 08:57:46,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2019-10-22 08:57:46,148 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:46,148 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:46,148 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:46,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:46,149 INFO L82 PathProgramCache]: Analyzing trace with hash -2138796541, now seen corresponding path program 1 times [2019-10-22 08:57:46,149 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:46,149 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2053181206] [2019-10-22 08:57:46,149 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:46,149 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:46,149 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:46,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:46,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:46,238 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2053181206] [2019-10-22 08:57:46,238 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:46,238 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-22 08:57:46,238 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410870765] [2019-10-22 08:57:46,239 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-22 08:57:46,239 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:46,239 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-22 08:57:46,239 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-22 08:57:46,239 INFO L87 Difference]: Start difference. First operand 8331 states and 11312 transitions. Second operand 4 states. [2019-10-22 08:57:46,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:46,699 INFO L93 Difference]: Finished difference Result 12929 states and 17640 transitions. [2019-10-22 08:57:46,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-22 08:57:46,699 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 104 [2019-10-22 08:57:46,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:46,710 INFO L225 Difference]: With dead ends: 12929 [2019-10-22 08:57:46,711 INFO L226 Difference]: Without dead ends: 7679 [2019-10-22 08:57:46,716 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-10-22 08:57:46,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7679 states. [2019-10-22 08:57:47,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7679 to 7588. [2019-10-22 08:57:47,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7588 states. [2019-10-22 08:57:47,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7588 states to 7588 states and 10239 transitions. [2019-10-22 08:57:47,152 INFO L78 Accepts]: Start accepts. Automaton has 7588 states and 10239 transitions. Word has length 104 [2019-10-22 08:57:47,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:47,152 INFO L462 AbstractCegarLoop]: Abstraction has 7588 states and 10239 transitions. [2019-10-22 08:57:47,152 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-22 08:57:47,153 INFO L276 IsEmpty]: Start isEmpty. Operand 7588 states and 10239 transitions. [2019-10-22 08:57:47,160 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2019-10-22 08:57:47,161 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:47,161 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:47,161 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:47,161 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:47,161 INFO L82 PathProgramCache]: Analyzing trace with hash -589430877, now seen corresponding path program 1 times [2019-10-22 08:57:47,161 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:47,162 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [863521612] [2019-10-22 08:57:47,162 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:47,162 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:47,162 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:47,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:47,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:47,286 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [863521612] [2019-10-22 08:57:47,286 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:47,287 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-22 08:57:47,287 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1845513221] [2019-10-22 08:57:47,287 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-22 08:57:47,287 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:47,287 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-22 08:57:47,287 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-22 08:57:47,288 INFO L87 Difference]: Start difference. First operand 7588 states and 10239 transitions. Second operand 4 states. [2019-10-22 08:57:47,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:47,715 INFO L93 Difference]: Finished difference Result 15473 states and 20868 transitions. [2019-10-22 08:57:47,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-22 08:57:47,715 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 106 [2019-10-22 08:57:47,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:47,727 INFO L225 Difference]: With dead ends: 15473 [2019-10-22 08:57:47,727 INFO L226 Difference]: Without dead ends: 8034 [2019-10-22 08:57:47,735 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-10-22 08:57:47,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8034 states. [2019-10-22 08:57:48,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8034 to 7774. [2019-10-22 08:57:48,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7774 states. [2019-10-22 08:57:48,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7774 states to 7774 states and 10446 transitions. [2019-10-22 08:57:48,288 INFO L78 Accepts]: Start accepts. Automaton has 7774 states and 10446 transitions. Word has length 106 [2019-10-22 08:57:48,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:48,288 INFO L462 AbstractCegarLoop]: Abstraction has 7774 states and 10446 transitions. [2019-10-22 08:57:48,288 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-22 08:57:48,288 INFO L276 IsEmpty]: Start isEmpty. Operand 7774 states and 10446 transitions. [2019-10-22 08:57:48,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2019-10-22 08:57:48,296 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:48,296 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:48,296 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:48,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:48,296 INFO L82 PathProgramCache]: Analyzing trace with hash 18775605, now seen corresponding path program 1 times [2019-10-22 08:57:48,297 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:48,297 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [743692312] [2019-10-22 08:57:48,297 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:48,297 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:48,297 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:48,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:48,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:48,411 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [743692312] [2019-10-22 08:57:48,411 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:48,411 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-22 08:57:48,411 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1347938352] [2019-10-22 08:57:48,411 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-22 08:57:48,411 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:48,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-22 08:57:48,412 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-22 08:57:48,412 INFO L87 Difference]: Start difference. First operand 7774 states and 10446 transitions. Second operand 3 states. [2019-10-22 08:57:49,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:49,002 INFO L93 Difference]: Finished difference Result 20596 states and 27834 transitions. [2019-10-22 08:57:49,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-22 08:57:49,003 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 107 [2019-10-22 08:57:49,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:49,017 INFO L225 Difference]: With dead ends: 20596 [2019-10-22 08:57:49,018 INFO L226 Difference]: Without dead ends: 15350 [2019-10-22 08:57:49,026 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-22 08:57:49,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15350 states. [2019-10-22 08:57:49,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15350 to 7784. [2019-10-22 08:57:49,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7784 states. [2019-10-22 08:57:49,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7784 states to 7784 states and 10456 transitions. [2019-10-22 08:57:49,399 INFO L78 Accepts]: Start accepts. Automaton has 7784 states and 10456 transitions. Word has length 107 [2019-10-22 08:57:49,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:49,399 INFO L462 AbstractCegarLoop]: Abstraction has 7784 states and 10456 transitions. [2019-10-22 08:57:49,399 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-22 08:57:49,399 INFO L276 IsEmpty]: Start isEmpty. Operand 7784 states and 10456 transitions. [2019-10-22 08:57:49,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2019-10-22 08:57:49,405 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:49,405 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:49,406 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:49,406 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:49,406 INFO L82 PathProgramCache]: Analyzing trace with hash 1454455021, now seen corresponding path program 1 times [2019-10-22 08:57:49,406 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:49,406 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [754240226] [2019-10-22 08:57:49,406 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:49,407 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:49,407 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:49,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:49,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:49,492 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [754240226] [2019-10-22 08:57:49,493 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:49,493 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-22 08:57:49,493 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1705690480] [2019-10-22 08:57:49,493 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-22 08:57:49,493 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:49,493 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-22 08:57:49,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-22 08:57:49,494 INFO L87 Difference]: Start difference. First operand 7784 states and 10456 transitions. Second operand 4 states. [2019-10-22 08:57:50,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:50,159 INFO L93 Difference]: Finished difference Result 15927 states and 21367 transitions. [2019-10-22 08:57:50,160 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-22 08:57:50,160 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 108 [2019-10-22 08:57:50,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:50,168 INFO L225 Difference]: With dead ends: 15927 [2019-10-22 08:57:50,168 INFO L226 Difference]: Without dead ends: 8552 [2019-10-22 08:57:50,174 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-10-22 08:57:50,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8552 states. [2019-10-22 08:57:50,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8552 to 8150. [2019-10-22 08:57:50,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8150 states. [2019-10-22 08:57:50,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8150 states to 8150 states and 10869 transitions. [2019-10-22 08:57:50,735 INFO L78 Accepts]: Start accepts. Automaton has 8150 states and 10869 transitions. Word has length 108 [2019-10-22 08:57:50,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:50,736 INFO L462 AbstractCegarLoop]: Abstraction has 8150 states and 10869 transitions. [2019-10-22 08:57:50,736 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-22 08:57:50,736 INFO L276 IsEmpty]: Start isEmpty. Operand 8150 states and 10869 transitions. [2019-10-22 08:57:50,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2019-10-22 08:57:50,742 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:50,742 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:50,742 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:50,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:50,742 INFO L82 PathProgramCache]: Analyzing trace with hash -273511900, now seen corresponding path program 1 times [2019-10-22 08:57:50,743 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:50,743 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1136668335] [2019-10-22 08:57:50,743 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:50,743 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:50,743 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:50,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:50,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:50,820 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1136668335] [2019-10-22 08:57:50,821 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:50,821 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-22 08:57:50,821 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [364127324] [2019-10-22 08:57:50,821 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-22 08:57:50,822 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:50,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-22 08:57:50,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-22 08:57:50,822 INFO L87 Difference]: Start difference. First operand 8150 states and 10869 transitions. Second operand 4 states. [2019-10-22 08:57:51,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:51,231 INFO L93 Difference]: Finished difference Result 11102 states and 14882 transitions. [2019-10-22 08:57:51,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-22 08:57:51,232 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 108 [2019-10-22 08:57:51,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:51,236 INFO L225 Difference]: With dead ends: 11102 [2019-10-22 08:57:51,237 INFO L226 Difference]: Without dead ends: 7080 [2019-10-22 08:57:51,241 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-10-22 08:57:51,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7080 states. [2019-10-22 08:57:51,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7080 to 7080. [2019-10-22 08:57:51,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7080 states. [2019-10-22 08:57:51,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7080 states to 7080 states and 9427 transitions. [2019-10-22 08:57:51,539 INFO L78 Accepts]: Start accepts. Automaton has 7080 states and 9427 transitions. Word has length 108 [2019-10-22 08:57:51,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:51,539 INFO L462 AbstractCegarLoop]: Abstraction has 7080 states and 9427 transitions. [2019-10-22 08:57:51,539 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-22 08:57:51,539 INFO L276 IsEmpty]: Start isEmpty. Operand 7080 states and 9427 transitions. [2019-10-22 08:57:51,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2019-10-22 08:57:51,545 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:51,546 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:51,546 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:51,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:51,546 INFO L82 PathProgramCache]: Analyzing trace with hash -2116780850, now seen corresponding path program 1 times [2019-10-22 08:57:51,547 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:51,547 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [100491989] [2019-10-22 08:57:51,547 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:51,547 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:51,547 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:51,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-22 08:57:51,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-22 08:57:51,641 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [100491989] [2019-10-22 08:57:51,641 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-22 08:57:51,641 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-22 08:57:51,641 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2117498294] [2019-10-22 08:57:51,642 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-10-22 08:57:51,642 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-22 08:57:51,642 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-10-22 08:57:51,642 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-10-22 08:57:51,643 INFO L87 Difference]: Start difference. First operand 7080 states and 9427 transitions. Second operand 5 states. [2019-10-22 08:57:52,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-22 08:57:52,275 INFO L93 Difference]: Finished difference Result 10847 states and 14942 transitions. [2019-10-22 08:57:52,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-10-22 08:57:52,275 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 110 [2019-10-22 08:57:52,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-22 08:57:52,278 INFO L225 Difference]: With dead ends: 10847 [2019-10-22 08:57:52,278 INFO L226 Difference]: Without dead ends: 5271 [2019-10-22 08:57:52,281 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-10-22 08:57:52,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5271 states. [2019-10-22 08:57:52,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5271 to 5246. [2019-10-22 08:57:52,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5246 states. [2019-10-22 08:57:52,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5246 states to 5246 states and 7170 transitions. [2019-10-22 08:57:52,671 INFO L78 Accepts]: Start accepts. Automaton has 5246 states and 7170 transitions. Word has length 110 [2019-10-22 08:57:52,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-22 08:57:52,671 INFO L462 AbstractCegarLoop]: Abstraction has 5246 states and 7170 transitions. [2019-10-22 08:57:52,671 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-10-22 08:57:52,671 INFO L276 IsEmpty]: Start isEmpty. Operand 5246 states and 7170 transitions. [2019-10-22 08:57:52,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2019-10-22 08:57:52,674 INFO L372 BasicCegarLoop]: Found error trace [2019-10-22 08:57:52,674 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-22 08:57:52,675 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-22 08:57:52,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-22 08:57:52,675 INFO L82 PathProgramCache]: Analyzing trace with hash 876136019, now seen corresponding path program 1 times [2019-10-22 08:57:52,675 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-22 08:57:52,675 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2029510931] [2019-10-22 08:57:52,675 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:52,675 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-22 08:57:52,675 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-22 08:57:52,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-10-22 08:57:52,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-10-22 08:57:52,843 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-10-22 08:57:52,843 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-10-22 08:57:53,017 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 22.10 08:57:53 BoogieIcfgContainer [2019-10-22 08:57:53,017 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-10-22 08:57:53,017 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-10-22 08:57:53,017 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-10-22 08:57:53,017 INFO L275 PluginConnector]: Witness Printer initialized [2019-10-22 08:57:53,018 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.10 08:57:35" (3/4) ... [2019-10-22 08:57:53,022 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-10-22 08:57:53,210 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_4f463e3d-0425-43c9-9672-9248240c0e2f/bin/uautomizer/witness.graphml [2019-10-22 08:57:53,212 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-10-22 08:57:53,214 INFO L168 Benchmark]: Toolchain (without parser) took 19870.81 ms. Allocated memory was 1.0 GB in the beginning and 2.6 GB in the end (delta: 1.6 GB). Free memory was 939.1 MB in the beginning and 2.1 GB in the end (delta: -1.1 GB). Peak memory consumption was 431.3 MB. Max. memory is 11.5 GB. [2019-10-22 08:57:53,215 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 967.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-10-22 08:57:53,215 INFO L168 Benchmark]: CACSL2BoogieTranslator took 642.82 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 123.2 MB). Free memory was 939.1 MB in the beginning and 1.1 GB in the end (delta: -159.8 MB). Peak memory consumption was 23.3 MB. Max. memory is 11.5 GB. [2019-10-22 08:57:53,215 INFO L168 Benchmark]: Boogie Procedure Inliner took 65.24 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-10-22 08:57:53,215 INFO L168 Benchmark]: Boogie Preprocessor took 44.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2019-10-22 08:57:53,215 INFO L168 Benchmark]: RCFGBuilder took 983.76 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 988.3 MB in the end (delta: 103.9 MB). Peak memory consumption was 103.9 MB. Max. memory is 11.5 GB. [2019-10-22 08:57:53,216 INFO L168 Benchmark]: TraceAbstraction took 17934.46 ms. Allocated memory was 1.2 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 988.3 MB in the beginning and 2.1 GB in the end (delta: -1.1 GB). Peak memory consumption was 310.9 MB. Max. memory is 11.5 GB. [2019-10-22 08:57:53,216 INFO L168 Benchmark]: Witness Printer took 195.46 ms. Allocated memory is still 2.6 GB. Free memory was 2.1 GB in the beginning and 2.1 GB in the end (delta: 46.3 MB). Peak memory consumption was 46.3 MB. Max. memory is 11.5 GB. [2019-10-22 08:57:53,217 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 967.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 642.82 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 123.2 MB). Free memory was 939.1 MB in the beginning and 1.1 GB in the end (delta: -159.8 MB). Peak memory consumption was 23.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 65.24 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 44.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * RCFGBuilder took 983.76 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 988.3 MB in the end (delta: 103.9 MB). Peak memory consumption was 103.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 17934.46 ms. Allocated memory was 1.2 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 988.3 MB in the beginning and 2.1 GB in the end (delta: -1.1 GB). Peak memory consumption was 310.9 MB. Max. memory is 11.5 GB. * Witness Printer took 195.46 ms. Allocated memory is still 2.6 GB. Free memory was 2.1 GB in the beginning and 2.1 GB in the end (delta: 46.3 MB). Peak memory consumption was 46.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 524]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L1] int __return_main; [L12] msg_t nomsg = (msg_t )-1; [L13] port_t p12 = 0; [L14] char p12_old = '\x0'; [L15] char p12_new = '\x0'; [L16] _Bool ep12 = 0; [L17] port_t p13 = 0; [L18] char p13_old = '\x0'; [L19] char p13_new = '\x0'; [L20] _Bool ep13 = 0; [L21] port_t p21 = 0; [L22] char p21_old = '\x0'; [L23] char p21_new = '\x0'; [L24] _Bool ep21 = 0; [L25] port_t p23 = 0; [L26] char p23_old = '\x0'; [L27] char p23_new = '\x0'; [L28] _Bool ep23 = 0; [L29] port_t p31 = 0; [L30] char p31_old = '\x0'; [L31] char p31_new = '\x0'; [L32] _Bool ep31 = 0; [L33] port_t p32 = 0; [L34] char p32_old = '\x0'; [L35] char p32_new = '\x0'; [L36] _Bool ep32 = 0; [L37] char id1 = '\x0'; [L38] unsigned char r1 = '\x0'; [L39] char st1 = '\x0'; [L40] char nl1 = '\x0'; [L41] char m1 = '\x0'; [L42] char max1 = '\x0'; [L43] _Bool mode1 = 0; [L44] char id2 = '\x0'; [L45] unsigned char r2 = '\x0'; [L46] char st2 = '\x0'; [L47] char nl2 = '\x0'; [L48] char m2 = '\x0'; [L49] char max2 = '\x0'; [L50] _Bool mode2 = 0; [L51] char id3 = '\x0'; [L52] unsigned char r3 = '\x0'; [L53] char st3 = '\x0'; [L54] char nl3 = '\x0'; [L55] char m3 = '\x0'; [L56] char max3 = '\x0'; [L57] _Bool mode3 = 0; [L61] void (*nodes[3])() = { &node1, &node2, &node3 }; [L65] int __return_1142; [L66] int __return_1270; [L67] int __return_1696; [L68] int __return_1389; [L69] int __return_1499; VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=0, ep21=0, ep23=0, ep31=0, ep32=0, id1=0, id2=0, id3=0, m1=0, m2=0, m3=0, max1=0, max2=0, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L72] int main__c1; [L73] int main__i2; [L74] main__c1 = 0 [L75] ep12 = __VERIFIER_nondet_bool() [L76] ep13 = __VERIFIER_nondet_bool() [L77] ep21 = __VERIFIER_nondet_bool() [L78] ep23 = __VERIFIER_nondet_bool() [L79] ep31 = __VERIFIER_nondet_bool() [L80] ep32 = __VERIFIER_nondet_bool() [L81] id1 = __VERIFIER_nondet_char() [L82] r1 = __VERIFIER_nondet_uchar() [L83] st1 = __VERIFIER_nondet_char() [L84] nl1 = __VERIFIER_nondet_char() [L85] m1 = __VERIFIER_nondet_char() [L86] max1 = __VERIFIER_nondet_char() [L87] mode1 = __VERIFIER_nondet_bool() [L88] id2 = __VERIFIER_nondet_char() [L89] r2 = __VERIFIER_nondet_uchar() [L90] st2 = __VERIFIER_nondet_char() [L91] nl2 = __VERIFIER_nondet_char() [L92] m2 = __VERIFIER_nondet_char() [L93] max2 = __VERIFIER_nondet_char() [L94] mode2 = __VERIFIER_nondet_bool() [L95] id3 = __VERIFIER_nondet_char() [L96] r3 = __VERIFIER_nondet_uchar() [L97] st3 = __VERIFIER_nondet_char() [L98] nl3 = __VERIFIER_nondet_char() [L99] m3 = __VERIFIER_nondet_char() [L100] max3 = __VERIFIER_nondet_char() [L101] mode3 = __VERIFIER_nondet_bool() [L103] _Bool init__r121; [L104] _Bool init__r131; [L105] _Bool init__r211; [L106] _Bool init__r231; [L107] _Bool init__r311; [L108] _Bool init__r321; [L109] _Bool init__r122; [L110] int init__tmp; [L111] _Bool init__r132; [L112] int init__tmp___0; [L113] _Bool init__r212; [L114] int init__tmp___1; [L115] _Bool init__r232; [L116] int init__tmp___2; [L117] _Bool init__r312; [L118] int init__tmp___3; [L119] _Bool init__r322; [L120] int init__tmp___4; [L121] int init__tmp___5; [L122] init__r121 = ep12 [L123] init__r131 = ep13 [L124] init__r211 = ep21 [L125] init__r231 = ep23 [L126] init__r311 = ep31 [L127] init__r321 = ep32 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L128] COND FALSE !(!(init__r121 == 0)) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L1830] COND TRUE !(init__r131 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L1832] COND TRUE !(ep32 == 0) [L1834] init__tmp = 1 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L132] init__r122 = (_Bool)init__tmp VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L133] COND TRUE !(init__r131 == 0) [L135] init__tmp___0 = 1 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L137] init__r132 = (_Bool)init__tmp___0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L138] COND TRUE !(init__r211 == 0) [L140] init__tmp___1 = 1 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L142] init__r212 = (_Bool)init__tmp___1 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L143] COND FALSE !(!(init__r231 == 0)) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L1761] COND TRUE !(init__r211 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L1763] COND TRUE !(ep13 == 0) [L1765] init__tmp___2 = 1 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L147] init__r232 = (_Bool)init__tmp___2 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L148] COND FALSE !(!(init__r311 == 0)) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L1738] COND TRUE !(init__r321 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L1740] COND TRUE !(ep21 == 0) [L1742] init__tmp___3 = 1 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L152] init__r312 = (_Bool)init__tmp___3 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L153] COND TRUE !(init__r321 == 0) [L155] init__tmp___4 = 1 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L157] init__r322 = (_Bool)init__tmp___4 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L158] COND TRUE ((int)id1) != ((int)id2) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L160] COND TRUE ((int)id1) != ((int)id3) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L162] COND TRUE ((int)id2) != ((int)id3) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L164] COND TRUE ((int)id1) >= 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L166] COND TRUE ((int)id2) >= 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L168] COND TRUE ((int)id3) >= 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L170] COND TRUE ((int)r1) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L172] COND TRUE ((int)r2) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L174] COND TRUE ((int)r3) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L176] COND TRUE !(init__r122 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L178] COND TRUE !(init__r132 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L180] COND TRUE !(init__r212 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L182] COND TRUE !(init__r232 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L184] COND TRUE !(init__r312 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L186] COND TRUE !(init__r322 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L188] COND TRUE ((int)max1) == ((int)id1) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L190] COND TRUE ((int)max2) == ((int)id2) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L192] COND TRUE ((int)max3) == ((int)id3) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L194] COND TRUE ((int)st1) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L196] COND TRUE ((int)st2) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L198] COND TRUE ((int)st3) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L200] COND TRUE ((int)nl1) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L202] COND TRUE ((int)nl2) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L204] COND TRUE ((int)nl3) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L206] COND TRUE ((int)mode1) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L208] COND TRUE ((int)mode2) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L210] COND TRUE ((int)mode3) == 0 [L212] init__tmp___5 = 1 [L213] __return_1142 = init__tmp___5 [L214] main__i2 = __return_1142 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L215] COND TRUE main__i2 != 0 [L217] p12_old = nomsg [L218] p12_new = nomsg [L219] p13_old = nomsg [L220] p13_new = nomsg [L221] p21_old = nomsg [L222] p21_new = nomsg [L223] p23_old = nomsg [L224] p23_new = nomsg [L225] p31_old = nomsg [L226] p31_new = nomsg [L227] p32_old = nomsg [L228] p32_new = nomsg [L229] main__i2 = 0 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L231] COND FALSE !(!(mode1 == 0)) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L237] COND TRUE ((int)r1) < 2 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L239] COND FALSE !(!(ep12 == 0)) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L250] COND TRUE !(ep13 == 0) [L252] int node1____CPAchecker_TMP_1; VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L253] COND TRUE max1 != nomsg VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L255] COND TRUE p13_new == nomsg [L257] node1____CPAchecker_TMP_1 = max1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L259] p13_new = node1____CPAchecker_TMP_1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L261] mode1 = 1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L263] COND FALSE !(!(mode2 == 0)) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L269] COND TRUE ((int)r2) < 2 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L271] COND TRUE !(ep21 == 0) [L273] int node2____CPAchecker_TMP_0; VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L274] COND TRUE max2 != nomsg VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L276] COND TRUE p21_new == nomsg [L278] node2____CPAchecker_TMP_0 = max2 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L280] p21_new = node2____CPAchecker_TMP_0 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L282] COND FALSE !(!(ep23 == 0)) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L293] mode2 = 1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L295] COND FALSE !(!(mode3 == 0)) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L301] COND TRUE ((int)r3) < 2 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L303] COND FALSE !(!(ep31 == 0)) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L314] COND TRUE !(ep32 == 0) [L316] int node3____CPAchecker_TMP_1; VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L317] COND TRUE max3 != nomsg VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L319] COND TRUE p32_new == nomsg [L321] node3____CPAchecker_TMP_1 = max3 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L323] p32_new = node3____CPAchecker_TMP_1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=3, p13_old=-1, p21=0, p21_new=1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=0, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L325] mode3 = 1 [L326] p12_old = p12_new [L327] p12_new = nomsg [L328] p13_old = p13_new [L329] p13_new = nomsg [L330] p21_old = p21_new [L331] p21_new = nomsg [L332] p23_old = p23_new [L333] p23_new = nomsg [L334] p31_old = p31_new [L335] p31_new = nomsg [L336] p32_old = p32_new [L337] p32_new = nomsg [L339] int check__tmp; VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L340] COND TRUE ((((int)st1) + ((int)st2)) + ((int)st3)) <= 1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L342] COND TRUE (((int)st1) + ((int)nl1)) <= 1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L344] COND TRUE (((int)st2) + ((int)nl2)) <= 1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L346] COND TRUE (((int)st3) + ((int)nl3)) <= 1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L348] COND FALSE !(((int)r1) >= 2) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L354] COND TRUE ((((int)st1) + ((int)st2)) + ((int)st3)) == 0 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L356] COND TRUE ((int)r1) < 2 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L358] COND FALSE !(((int)r1) >= 2) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L364] COND TRUE ((((int)nl1) + ((int)nl2)) + ((int)nl3)) == 0 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L366] COND TRUE ((int)r1) < 2 [L368] check__tmp = 1 [L369] __return_1270 = check__tmp [L370] main__c1 = __return_1270 [L372] _Bool __tmp_1; [L373] __tmp_1 = main__c1 [L374] _Bool assert__arg; [L375] assert__arg = __tmp_1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L376] COND FALSE !(assert__arg == 0) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L383] COND TRUE !(mode1 == 0) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L385] COND FALSE !(r1 == 255) [L391] r1 = r1 + 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=0, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=1, r2=0, r3=0, st1=0, st2=0, st3=0] [L392] COND TRUE !(ep21 == 0) [L394] m1 = p21_old [L395] p21_old = nomsg VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=1, r2=0, r3=0, st1=0, st2=0, st3=0] [L396] COND FALSE !(((int)m1) > ((int)max1)) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=1, r2=0, r3=0, st1=0, st2=0, st3=0] [L400] COND FALSE !(!(ep31 == 0)) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=1, r2=0, r3=0, st1=0, st2=0, st3=0] [L408] COND TRUE ((int)r1) == 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=1, r2=0, r3=0, st1=0, st2=0, st3=0] [L410] COND TRUE ((int)max1) == ((int)id1) [L412] st1 = 1 [L413] mode1 = 0 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=1, r2=0, r3=0, st1=1, st2=0, st3=0] [L415] COND TRUE !(mode2 == 0) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=1, r2=0, r3=0, st1=1, st2=0, st3=0] [L417] COND FALSE !(r2 == 255) [L423] r2 = r2 + 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=1, r2=1, r3=0, st1=1, st2=0, st3=0] [L424] COND FALSE !(!(ep12 == 0)) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=0, r1=1, r2=1, r3=0, st1=1, st2=0, st3=0] [L432] COND TRUE !(ep32 == 0) [L434] m2 = p32_old [L435] p32_old = nomsg VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=0, st1=1, st2=0, st3=0] [L436] COND FALSE !(((int)m2) > ((int)max2)) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=0, st1=1, st2=0, st3=0] [L440] COND FALSE !(((int)r2) == 2) [L446] mode2 = 0 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=0, st1=1, st2=0, st3=0] [L448] COND TRUE !(mode3 == 0) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=0, st1=1, st2=0, st3=0] [L450] COND FALSE !(r3 == 255) [L456] r3 = r3 + 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=0, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=3, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L457] COND TRUE !(ep13 == 0) [L459] m3 = p13_old [L460] p13_old = nomsg VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=3, max1=3, max2=1, max3=0, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L461] COND TRUE ((int)m3) > ((int)max3) [L463] max3 = m3 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=3, max1=3, max2=1, max3=3, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L465] COND FALSE !(!(ep23 == 0)) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=3, max1=3, max2=1, max3=3, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L473] COND FALSE !(((int)r3) == 2) [L479] mode3 = 0 [L480] p12_old = p12_new [L481] p12_new = nomsg [L482] p13_old = p13_new [L483] p13_new = nomsg [L484] p21_old = p21_new [L485] p21_new = nomsg [L486] p23_old = p23_new [L487] p23_new = nomsg [L488] p31_old = p31_new [L489] p31_new = nomsg [L490] p32_old = p32_new [L491] p32_new = nomsg [L493] int check__tmp; VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=3, max1=3, max2=1, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L494] COND TRUE ((((int)st1) + ((int)st2)) + ((int)st3)) <= 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=3, max1=3, max2=1, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L496] COND TRUE (((int)st1) + ((int)nl1)) <= 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=3, max1=3, max2=1, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L498] COND TRUE (((int)st2) + ((int)nl2)) <= 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=3, max1=3, max2=1, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L500] COND TRUE (((int)st3) + ((int)nl3)) <= 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=3, max1=3, max2=1, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L502] COND FALSE !(((int)r1) >= 2) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=3, max1=3, max2=1, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L508] COND FALSE !(((((int)st1) + ((int)st2)) + ((int)st3)) == 0) [L514] check__tmp = 0 [L515] __return_1696 = check__tmp [L516] main__c1 = __return_1696 [L518] _Bool __tmp_2; [L519] __tmp_2 = main__c1 [L520] _Bool assert__arg; [L521] assert__arg = __tmp_2 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=3, max1=3, max2=1, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L522] COND TRUE assert__arg == 0 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=3, max1=3, max2=1, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L524] __VERIFIER_error() VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_1696=0, __return_main=0, ep12=0, ep13=1, ep21=1, ep23=0, ep31=0, ep32=1, id1=3, id2=1, id3=0, m1=1, m2=0, m3=3, max1=3, max2=1, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 245 locations, 2 error locations. Result: UNSAFE, OverallTime: 17.8s, OverallIterations: 22, TraceHistogramMax: 1, AutomataDifference: 8.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 10051 SDtfs, 11321 SDslu, 10018 SDs, 0 SdLazy, 1380 SolverSat, 259 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 111 GetRequests, 40 SyntacticMatches, 3 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=15714occurred in iteration=14, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 5.7s AutomataMinimizationTime, 21 MinimizatonAttempts, 24478 StatesRemovedByMinimization, 17 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.7s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 2233 NumberOfCodeBlocks, 2233 NumberOfCodeBlocksAsserted, 22 NumberOfCheckSat, 2102 ConstructedInterpolants, 0 QuantifiedInterpolants, 792771 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 21 InterpolantComputations, 21 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...