./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/memsafety-ext2/optional_data_creation_test04-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/memsafety-ext2/optional_data_creation_test04-1.i -s /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 76d1c5e435c1ee1c0852e4a01b3ec32d520e70a3 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(valid-free) --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 21:53:40,474 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 21:53:40,476 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 21:53:40,486 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 21:53:40,486 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 21:53:40,487 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 21:53:40,489 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 21:53:40,490 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 21:53:40,500 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 21:53:40,502 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 21:53:40,503 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 21:53:40,506 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 21:53:40,506 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 21:53:40,508 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 21:53:40,509 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 21:53:40,510 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 21:53:40,511 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 21:53:40,513 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 21:53:40,516 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 21:53:40,519 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 21:53:40,521 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 21:53:40,522 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 21:53:40,522 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 21:53:40,523 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 21:53:40,525 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 21:53:40,525 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 21:53:40,525 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 21:53:40,526 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 21:53:40,526 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 21:53:40,527 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 21:53:40,527 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 21:53:40,528 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 21:53:40,528 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 21:53:40,529 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 21:53:40,530 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 21:53:40,530 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 21:53:40,530 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 21:53:40,530 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 21:53:40,531 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 21:53:40,531 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 21:53:40,532 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 21:53:40,532 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2019-11-15 21:53:40,544 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 21:53:40,545 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 21:53:40,546 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 21:53:40,546 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 21:53:40,546 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 21:53:40,546 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 21:53:40,547 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 21:53:40,547 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2019-11-15 21:53:40,547 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 21:53:40,547 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 21:53:40,547 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 21:53:40,548 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2019-11-15 21:53:40,548 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2019-11-15 21:53:40,548 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2019-11-15 21:53:40,548 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 21:53:40,548 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 21:53:40,549 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 21:53:40,549 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 21:53:40,549 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 21:53:40,549 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 21:53:40,549 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 21:53:40,550 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 21:53:40,550 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 21:53:40,550 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 21:53:40,550 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 21:53:40,551 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 21:53:40,551 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 76d1c5e435c1ee1c0852e4a01b3ec32d520e70a3 [2019-11-15 21:53:40,584 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 21:53:40,594 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 21:53:40,598 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 21:53:40,599 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 21:53:40,600 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 21:53:40,600 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/../../sv-benchmarks/c/memsafety-ext2/optional_data_creation_test04-1.i [2019-11-15 21:53:40,653 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/data/35c42e750/0e0dffa34cca4bf8a0051a22e50bce06/FLAGe19254c16 [2019-11-15 21:53:41,116 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 21:53:41,117 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/sv-benchmarks/c/memsafety-ext2/optional_data_creation_test04-1.i [2019-11-15 21:53:41,128 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/data/35c42e750/0e0dffa34cca4bf8a0051a22e50bce06/FLAGe19254c16 [2019-11-15 21:53:41,140 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/data/35c42e750/0e0dffa34cca4bf8a0051a22e50bce06 [2019-11-15 21:53:41,142 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 21:53:41,143 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-11-15 21:53:41,144 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 21:53:41,144 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 21:53:41,148 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 21:53:41,149 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 09:53:41" (1/1) ... [2019-11-15 21:53:41,151 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7ac7b88 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:53:41, skipping insertion in model container [2019-11-15 21:53:41,152 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 09:53:41" (1/1) ... [2019-11-15 21:53:41,159 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 21:53:41,201 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 21:53:41,560 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 21:53:41,573 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 21:53:41,632 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 21:53:41,690 INFO L192 MainTranslator]: Completed translation [2019-11-15 21:53:41,690 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:53:41 WrapperNode [2019-11-15 21:53:41,691 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 21:53:41,691 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 21:53:41,692 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 21:53:41,692 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 21:53:41,705 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:53:41" (1/1) ... [2019-11-15 21:53:41,705 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:53:41" (1/1) ... [2019-11-15 21:53:41,718 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:53:41" (1/1) ... [2019-11-15 21:53:41,719 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:53:41" (1/1) ... [2019-11-15 21:53:41,743 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:53:41" (1/1) ... [2019-11-15 21:53:41,748 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:53:41" (1/1) ... [2019-11-15 21:53:41,752 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:53:41" (1/1) ... [2019-11-15 21:53:41,758 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 21:53:41,759 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 21:53:41,759 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 21:53:41,759 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 21:53:41,760 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:53:41" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 21:53:41,833 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-11-15 21:53:41,833 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 21:53:41,833 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2019-11-15 21:53:41,833 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2019-11-15 21:53:41,834 INFO L138 BoogieDeclarations]: Found implementation of procedure create_data [2019-11-15 21:53:41,834 INFO L138 BoogieDeclarations]: Found implementation of procedure freeData [2019-11-15 21:53:41,835 INFO L138 BoogieDeclarations]: Found implementation of procedure append [2019-11-15 21:53:41,835 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-11-15 21:53:41,836 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-11-15 21:53:41,836 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2019-11-15 21:53:41,836 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2019-11-15 21:53:41,837 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2019-11-15 21:53:41,837 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2019-11-15 21:53:41,838 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2019-11-15 21:53:41,838 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2019-11-15 21:53:41,838 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2019-11-15 21:53:41,838 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2019-11-15 21:53:41,839 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2019-11-15 21:53:41,841 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2019-11-15 21:53:41,841 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2019-11-15 21:53:41,841 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2019-11-15 21:53:41,841 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2019-11-15 21:53:41,842 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2019-11-15 21:53:41,842 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2019-11-15 21:53:41,843 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2019-11-15 21:53:41,843 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2019-11-15 21:53:41,843 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2019-11-15 21:53:41,844 INFO L130 BoogieDeclarations]: Found specification of procedure select [2019-11-15 21:53:41,845 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2019-11-15 21:53:41,845 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2019-11-15 21:53:41,845 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2019-11-15 21:53:41,846 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2019-11-15 21:53:41,846 INFO L130 BoogieDeclarations]: Found specification of procedure random [2019-11-15 21:53:41,846 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2019-11-15 21:53:41,846 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2019-11-15 21:53:41,846 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2019-11-15 21:53:41,847 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2019-11-15 21:53:41,847 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2019-11-15 21:53:41,847 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2019-11-15 21:53:41,847 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2019-11-15 21:53:41,847 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2019-11-15 21:53:41,847 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2019-11-15 21:53:41,848 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2019-11-15 21:53:41,848 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2019-11-15 21:53:41,848 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2019-11-15 21:53:41,848 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2019-11-15 21:53:41,848 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2019-11-15 21:53:41,848 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2019-11-15 21:53:41,849 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2019-11-15 21:53:41,849 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2019-11-15 21:53:41,849 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2019-11-15 21:53:41,849 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2019-11-15 21:53:41,849 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2019-11-15 21:53:41,849 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2019-11-15 21:53:41,850 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2019-11-15 21:53:41,850 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2019-11-15 21:53:41,850 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2019-11-15 21:53:41,850 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2019-11-15 21:53:41,850 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2019-11-15 21:53:41,850 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2019-11-15 21:53:41,852 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2019-11-15 21:53:41,852 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2019-11-15 21:53:41,852 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2019-11-15 21:53:41,853 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2019-11-15 21:53:41,853 INFO L130 BoogieDeclarations]: Found specification of procedure free [2019-11-15 21:53:41,853 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2019-11-15 21:53:41,853 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2019-11-15 21:53:41,853 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2019-11-15 21:53:41,853 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2019-11-15 21:53:41,854 INFO L130 BoogieDeclarations]: Found specification of procedure aligned_alloc [2019-11-15 21:53:41,855 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2019-11-15 21:53:41,855 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2019-11-15 21:53:41,855 INFO L130 BoogieDeclarations]: Found specification of procedure at_quick_exit [2019-11-15 21:53:41,855 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2019-11-15 21:53:41,856 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2019-11-15 21:53:41,857 INFO L130 BoogieDeclarations]: Found specification of procedure quick_exit [2019-11-15 21:53:41,858 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2019-11-15 21:53:41,859 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2019-11-15 21:53:41,859 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2019-11-15 21:53:41,860 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2019-11-15 21:53:41,860 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2019-11-15 21:53:41,861 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2019-11-15 21:53:41,861 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2019-11-15 21:53:41,861 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2019-11-15 21:53:41,862 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2019-11-15 21:53:41,862 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2019-11-15 21:53:41,862 INFO L130 BoogieDeclarations]: Found specification of procedure system [2019-11-15 21:53:41,862 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2019-11-15 21:53:41,862 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2019-11-15 21:53:41,863 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2019-11-15 21:53:41,863 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2019-11-15 21:53:41,863 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2019-11-15 21:53:41,863 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2019-11-15 21:53:41,863 INFO L130 BoogieDeclarations]: Found specification of procedure div [2019-11-15 21:53:41,863 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2019-11-15 21:53:41,864 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2019-11-15 21:53:41,864 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2019-11-15 21:53:41,864 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2019-11-15 21:53:41,864 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2019-11-15 21:53:41,864 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2019-11-15 21:53:41,864 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2019-11-15 21:53:41,865 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2019-11-15 21:53:41,865 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2019-11-15 21:53:41,865 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2019-11-15 21:53:41,865 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2019-11-15 21:53:41,865 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2019-11-15 21:53:41,866 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2019-11-15 21:53:41,866 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2019-11-15 21:53:41,866 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2019-11-15 21:53:41,866 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2019-11-15 21:53:41,866 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2019-11-15 21:53:41,867 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2019-11-15 21:53:41,867 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2019-11-15 21:53:41,867 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2019-11-15 21:53:41,867 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-11-15 21:53:41,867 INFO L130 BoogieDeclarations]: Found specification of procedure create_data [2019-11-15 21:53:41,867 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2019-11-15 21:53:41,868 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2019-11-15 21:53:41,868 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2019-11-15 21:53:41,869 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 21:53:41,869 INFO L130 BoogieDeclarations]: Found specification of procedure freeData [2019-11-15 21:53:41,869 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 21:53:41,869 INFO L130 BoogieDeclarations]: Found specification of procedure append [2019-11-15 21:53:41,869 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-11-15 21:53:41,869 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 21:53:41,870 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2019-11-15 21:53:41,870 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-11-15 21:53:41,870 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 21:53:41,870 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-11-15 21:53:42,647 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 21:53:42,647 INFO L284 CfgBuilder]: Removed 3 assume(true) statements. [2019-11-15 21:53:42,648 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:53:42 BoogieIcfgContainer [2019-11-15 21:53:42,648 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 21:53:42,649 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 21:53:42,649 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 21:53:42,652 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 21:53:42,653 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 09:53:41" (1/3) ... [2019-11-15 21:53:42,653 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6a106d9d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 09:53:42, skipping insertion in model container [2019-11-15 21:53:42,656 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:53:41" (2/3) ... [2019-11-15 21:53:42,657 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6a106d9d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 09:53:42, skipping insertion in model container [2019-11-15 21:53:42,657 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:53:42" (3/3) ... [2019-11-15 21:53:42,659 INFO L109 eAbstractionObserver]: Analyzing ICFG optional_data_creation_test04-1.i [2019-11-15 21:53:42,669 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 21:53:42,678 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 46 error locations. [2019-11-15 21:53:42,688 INFO L249 AbstractCegarLoop]: Starting to check reachability of 46 error locations. [2019-11-15 21:53:42,708 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 21:53:42,710 INFO L374 AbstractCegarLoop]: Hoare is false [2019-11-15 21:53:42,710 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 21:53:42,710 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 21:53:42,710 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 21:53:42,711 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 21:53:42,711 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 21:53:42,711 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 21:53:42,733 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states. [2019-11-15 21:53:42,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2019-11-15 21:53:42,742 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:42,743 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:42,744 INFO L410 AbstractCegarLoop]: === Iteration 1 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:42,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:42,750 INFO L82 PathProgramCache]: Analyzing trace with hash -16887216, now seen corresponding path program 1 times [2019-11-15 21:53:42,758 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:42,758 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [189974249] [2019-11-15 21:53:42,758 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:42,759 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:42,759 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:42,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:42,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:42,911 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:42,911 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [189974249] [2019-11-15 21:53:42,912 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:42,912 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:53:42,913 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [178753836] [2019-11-15 21:53:42,917 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:53:42,917 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:42,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:53:42,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:53:42,936 INFO L87 Difference]: Start difference. First operand 114 states. Second operand 3 states. [2019-11-15 21:53:43,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:43,206 INFO L93 Difference]: Finished difference Result 124 states and 130 transitions. [2019-11-15 21:53:43,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:53:43,208 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2019-11-15 21:53:43,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:43,220 INFO L225 Difference]: With dead ends: 124 [2019-11-15 21:53:43,221 INFO L226 Difference]: Without dead ends: 121 [2019-11-15 21:53:43,223 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:53:43,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2019-11-15 21:53:43,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 111. [2019-11-15 21:53:43,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2019-11-15 21:53:43,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 117 transitions. [2019-11-15 21:53:43,282 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 117 transitions. Word has length 8 [2019-11-15 21:53:43,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:43,283 INFO L462 AbstractCegarLoop]: Abstraction has 111 states and 117 transitions. [2019-11-15 21:53:43,283 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:53:43,283 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 117 transitions. [2019-11-15 21:53:43,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-11-15 21:53:43,284 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:43,285 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:43,285 INFO L410 AbstractCegarLoop]: === Iteration 2 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:43,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:43,286 INFO L82 PathProgramCache]: Analyzing trace with hash -523436808, now seen corresponding path program 1 times [2019-11-15 21:53:43,286 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:43,286 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2083214900] [2019-11-15 21:53:43,286 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:43,287 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:43,287 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:43,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:43,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:43,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:43,428 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2083214900] [2019-11-15 21:53:43,428 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:43,428 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:53:43,429 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1696708684] [2019-11-15 21:53:43,430 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:53:43,430 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:43,430 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:53:43,431 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:53:43,431 INFO L87 Difference]: Start difference. First operand 111 states and 117 transitions. Second operand 6 states. [2019-11-15 21:53:44,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:44,052 INFO L93 Difference]: Finished difference Result 171 states and 184 transitions. [2019-11-15 21:53:44,052 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:53:44,052 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 9 [2019-11-15 21:53:44,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:44,056 INFO L225 Difference]: With dead ends: 171 [2019-11-15 21:53:44,056 INFO L226 Difference]: Without dead ends: 171 [2019-11-15 21:53:44,056 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:53:44,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2019-11-15 21:53:44,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 141. [2019-11-15 21:53:44,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2019-11-15 21:53:44,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 171 transitions. [2019-11-15 21:53:44,075 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 171 transitions. Word has length 9 [2019-11-15 21:53:44,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:44,076 INFO L462 AbstractCegarLoop]: Abstraction has 141 states and 171 transitions. [2019-11-15 21:53:44,076 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:53:44,076 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 171 transitions. [2019-11-15 21:53:44,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-11-15 21:53:44,077 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:44,077 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:44,079 INFO L410 AbstractCegarLoop]: === Iteration 3 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:44,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:44,079 INFO L82 PathProgramCache]: Analyzing trace with hash -523436807, now seen corresponding path program 1 times [2019-11-15 21:53:44,079 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:44,080 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [95360212] [2019-11-15 21:53:44,080 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:44,080 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:44,080 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:44,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:44,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:44,192 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:44,193 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [95360212] [2019-11-15 21:53:44,193 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:44,193 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:53:44,194 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1646582502] [2019-11-15 21:53:44,194 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:53:44,194 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:44,194 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:53:44,195 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:53:44,195 INFO L87 Difference]: Start difference. First operand 141 states and 171 transitions. Second operand 6 states. [2019-11-15 21:53:44,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:44,661 INFO L93 Difference]: Finished difference Result 155 states and 189 transitions. [2019-11-15 21:53:44,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:53:44,664 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 9 [2019-11-15 21:53:44,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:44,666 INFO L225 Difference]: With dead ends: 155 [2019-11-15 21:53:44,666 INFO L226 Difference]: Without dead ends: 155 [2019-11-15 21:53:44,666 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:53:44,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2019-11-15 21:53:44,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 144. [2019-11-15 21:53:44,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2019-11-15 21:53:44,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 176 transitions. [2019-11-15 21:53:44,699 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 176 transitions. Word has length 9 [2019-11-15 21:53:44,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:44,699 INFO L462 AbstractCegarLoop]: Abstraction has 144 states and 176 transitions. [2019-11-15 21:53:44,700 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:53:44,700 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 176 transitions. [2019-11-15 21:53:44,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2019-11-15 21:53:44,700 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:44,700 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:44,701 INFO L410 AbstractCegarLoop]: === Iteration 4 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:44,702 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:44,702 INFO L82 PathProgramCache]: Analyzing trace with hash 953328253, now seen corresponding path program 1 times [2019-11-15 21:53:44,702 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:44,702 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [875548632] [2019-11-15 21:53:44,702 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:44,703 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:44,703 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:44,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:44,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:44,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:44,771 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [875548632] [2019-11-15 21:53:44,771 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:44,771 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:53:44,771 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [793076879] [2019-11-15 21:53:44,772 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:53:44,772 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:44,772 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:53:44,773 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:53:44,773 INFO L87 Difference]: Start difference. First operand 144 states and 176 transitions. Second operand 4 states. [2019-11-15 21:53:44,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:44,988 INFO L93 Difference]: Finished difference Result 150 states and 178 transitions. [2019-11-15 21:53:44,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:53:44,990 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2019-11-15 21:53:44,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:44,991 INFO L225 Difference]: With dead ends: 150 [2019-11-15 21:53:44,991 INFO L226 Difference]: Without dead ends: 150 [2019-11-15 21:53:44,992 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:53:44,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2019-11-15 21:53:45,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 143. [2019-11-15 21:53:45,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2019-11-15 21:53:45,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 172 transitions. [2019-11-15 21:53:45,005 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 172 transitions. Word has length 10 [2019-11-15 21:53:45,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:45,006 INFO L462 AbstractCegarLoop]: Abstraction has 143 states and 172 transitions. [2019-11-15 21:53:45,006 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:53:45,006 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 172 transitions. [2019-11-15 21:53:45,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2019-11-15 21:53:45,006 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:45,006 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:45,007 INFO L410 AbstractCegarLoop]: === Iteration 5 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:45,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:45,007 INFO L82 PathProgramCache]: Analyzing trace with hash 953328254, now seen corresponding path program 1 times [2019-11-15 21:53:45,007 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:45,007 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1760780060] [2019-11-15 21:53:45,008 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:45,008 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:45,008 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:45,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:45,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:45,096 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:45,096 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1760780060] [2019-11-15 21:53:45,096 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:45,097 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:53:45,097 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [478465007] [2019-11-15 21:53:45,097 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:53:45,097 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:45,097 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:53:45,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:53:45,098 INFO L87 Difference]: Start difference. First operand 143 states and 172 transitions. Second operand 4 states. [2019-11-15 21:53:45,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:45,315 INFO L93 Difference]: Finished difference Result 148 states and 176 transitions. [2019-11-15 21:53:45,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:53:45,316 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2019-11-15 21:53:45,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:45,317 INFO L225 Difference]: With dead ends: 148 [2019-11-15 21:53:45,317 INFO L226 Difference]: Without dead ends: 148 [2019-11-15 21:53:45,318 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:53:45,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2019-11-15 21:53:45,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 142. [2019-11-15 21:53:45,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2019-11-15 21:53:45,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 170 transitions. [2019-11-15 21:53:45,332 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 170 transitions. Word has length 10 [2019-11-15 21:53:45,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:45,332 INFO L462 AbstractCegarLoop]: Abstraction has 142 states and 170 transitions. [2019-11-15 21:53:45,332 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:53:45,333 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 170 transitions. [2019-11-15 21:53:45,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-11-15 21:53:45,333 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:45,333 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:45,334 INFO L410 AbstractCegarLoop]: === Iteration 6 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:45,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:45,334 INFO L82 PathProgramCache]: Analyzing trace with hash 765213460, now seen corresponding path program 1 times [2019-11-15 21:53:45,335 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:45,335 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1810948366] [2019-11-15 21:53:45,335 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:45,335 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:45,335 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:45,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:45,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:45,403 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:45,403 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1810948366] [2019-11-15 21:53:45,403 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:45,404 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:53:45,404 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1619203272] [2019-11-15 21:53:45,404 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:53:45,404 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:45,404 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:53:45,405 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:53:45,405 INFO L87 Difference]: Start difference. First operand 142 states and 170 transitions. Second operand 4 states. [2019-11-15 21:53:45,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:45,610 INFO L93 Difference]: Finished difference Result 144 states and 172 transitions. [2019-11-15 21:53:45,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:53:45,610 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-11-15 21:53:45,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:45,612 INFO L225 Difference]: With dead ends: 144 [2019-11-15 21:53:45,612 INFO L226 Difference]: Without dead ends: 144 [2019-11-15 21:53:45,612 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:53:45,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2019-11-15 21:53:45,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 138. [2019-11-15 21:53:45,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2019-11-15 21:53:45,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 166 transitions. [2019-11-15 21:53:45,621 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 166 transitions. Word has length 16 [2019-11-15 21:53:45,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:45,622 INFO L462 AbstractCegarLoop]: Abstraction has 138 states and 166 transitions. [2019-11-15 21:53:45,622 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:53:45,622 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 166 transitions. [2019-11-15 21:53:45,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-11-15 21:53:45,622 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:45,623 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:45,623 INFO L410 AbstractCegarLoop]: === Iteration 7 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:45,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:45,623 INFO L82 PathProgramCache]: Analyzing trace with hash 765213461, now seen corresponding path program 1 times [2019-11-15 21:53:45,624 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:45,624 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644500171] [2019-11-15 21:53:45,624 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:45,624 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:45,624 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:45,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:45,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:45,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:45,697 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [644500171] [2019-11-15 21:53:45,697 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:45,697 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:53:45,697 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2030382737] [2019-11-15 21:53:45,698 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:53:45,698 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:45,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:53:45,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:53:45,698 INFO L87 Difference]: Start difference. First operand 138 states and 166 transitions. Second operand 4 states. [2019-11-15 21:53:45,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:45,883 INFO L93 Difference]: Finished difference Result 148 states and 177 transitions. [2019-11-15 21:53:45,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:53:45,883 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-11-15 21:53:45,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:45,885 INFO L225 Difference]: With dead ends: 148 [2019-11-15 21:53:45,885 INFO L226 Difference]: Without dead ends: 148 [2019-11-15 21:53:45,885 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:53:45,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2019-11-15 21:53:45,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 139. [2019-11-15 21:53:45,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2019-11-15 21:53:45,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 167 transitions. [2019-11-15 21:53:45,894 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 167 transitions. Word has length 16 [2019-11-15 21:53:45,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:45,894 INFO L462 AbstractCegarLoop]: Abstraction has 139 states and 167 transitions. [2019-11-15 21:53:45,894 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:53:45,894 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 167 transitions. [2019-11-15 21:53:45,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-11-15 21:53:45,895 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:45,895 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:45,895 INFO L410 AbstractCegarLoop]: === Iteration 8 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:45,895 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:45,896 INFO L82 PathProgramCache]: Analyzing trace with hash 765212597, now seen corresponding path program 1 times [2019-11-15 21:53:45,896 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:45,896 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1427885774] [2019-11-15 21:53:45,896 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:45,896 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:45,896 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:45,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:45,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:45,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:45,968 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1427885774] [2019-11-15 21:53:45,969 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:45,969 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:53:45,969 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [561448820] [2019-11-15 21:53:45,969 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:53:45,969 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:45,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:53:45,970 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:53:45,970 INFO L87 Difference]: Start difference. First operand 139 states and 167 transitions. Second operand 5 states. [2019-11-15 21:53:46,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:46,179 INFO L93 Difference]: Finished difference Result 142 states and 170 transitions. [2019-11-15 21:53:46,180 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:53:46,180 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-11-15 21:53:46,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:46,181 INFO L225 Difference]: With dead ends: 142 [2019-11-15 21:53:46,181 INFO L226 Difference]: Without dead ends: 142 [2019-11-15 21:53:46,182 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:53:46,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2019-11-15 21:53:46,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 134. [2019-11-15 21:53:46,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2019-11-15 21:53:46,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 162 transitions. [2019-11-15 21:53:46,195 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 162 transitions. Word has length 16 [2019-11-15 21:53:46,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:46,195 INFO L462 AbstractCegarLoop]: Abstraction has 134 states and 162 transitions. [2019-11-15 21:53:46,195 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:53:46,196 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 162 transitions. [2019-11-15 21:53:46,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-11-15 21:53:46,196 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:46,196 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:46,197 INFO L410 AbstractCegarLoop]: === Iteration 9 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:46,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:46,197 INFO L82 PathProgramCache]: Analyzing trace with hash -2048203474, now seen corresponding path program 1 times [2019-11-15 21:53:46,197 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:46,198 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [619830812] [2019-11-15 21:53:46,198 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:46,198 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:46,198 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:46,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:46,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:46,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:46,265 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:46,265 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [619830812] [2019-11-15 21:53:46,265 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:46,265 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:53:46,266 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1368915783] [2019-11-15 21:53:46,266 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:53:46,266 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:46,266 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:53:46,267 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:53:46,267 INFO L87 Difference]: Start difference. First operand 134 states and 162 transitions. Second operand 6 states. [2019-11-15 21:53:46,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:46,528 INFO L93 Difference]: Finished difference Result 143 states and 168 transitions. [2019-11-15 21:53:46,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:53:46,528 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2019-11-15 21:53:46,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:46,529 INFO L225 Difference]: With dead ends: 143 [2019-11-15 21:53:46,530 INFO L226 Difference]: Without dead ends: 143 [2019-11-15 21:53:46,530 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:53:46,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2019-11-15 21:53:46,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 136. [2019-11-15 21:53:46,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2019-11-15 21:53:46,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 162 transitions. [2019-11-15 21:53:46,536 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 162 transitions. Word has length 17 [2019-11-15 21:53:46,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:46,537 INFO L462 AbstractCegarLoop]: Abstraction has 136 states and 162 transitions. [2019-11-15 21:53:46,537 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:53:46,537 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 162 transitions. [2019-11-15 21:53:46,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-11-15 21:53:46,538 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:46,538 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:46,538 INFO L410 AbstractCegarLoop]: === Iteration 10 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:46,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:46,539 INFO L82 PathProgramCache]: Analyzing trace with hash -1228513905, now seen corresponding path program 1 times [2019-11-15 21:53:46,539 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:46,539 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1752651803] [2019-11-15 21:53:46,539 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:46,539 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:46,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:46,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:46,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:46,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:46,688 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:46,688 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1752651803] [2019-11-15 21:53:46,688 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:46,689 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:53:46,689 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1324323744] [2019-11-15 21:53:46,689 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-15 21:53:46,689 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:46,690 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-15 21:53:46,690 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:53:46,690 INFO L87 Difference]: Start difference. First operand 136 states and 162 transitions. Second operand 9 states. [2019-11-15 21:53:47,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:47,107 INFO L93 Difference]: Finished difference Result 142 states and 166 transitions. [2019-11-15 21:53:47,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:53:47,107 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 19 [2019-11-15 21:53:47,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:47,109 INFO L225 Difference]: With dead ends: 142 [2019-11-15 21:53:47,109 INFO L226 Difference]: Without dead ends: 142 [2019-11-15 21:53:47,109 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2019-11-15 21:53:47,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2019-11-15 21:53:47,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 136. [2019-11-15 21:53:47,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2019-11-15 21:53:47,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 160 transitions. [2019-11-15 21:53:47,115 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 160 transitions. Word has length 19 [2019-11-15 21:53:47,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:47,115 INFO L462 AbstractCegarLoop]: Abstraction has 136 states and 160 transitions. [2019-11-15 21:53:47,116 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-15 21:53:47,116 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 160 transitions. [2019-11-15 21:53:47,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-11-15 21:53:47,116 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:47,117 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:47,117 INFO L410 AbstractCegarLoop]: === Iteration 11 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:47,117 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:47,117 INFO L82 PathProgramCache]: Analyzing trace with hash 41200477, now seen corresponding path program 1 times [2019-11-15 21:53:47,117 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:47,118 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616101247] [2019-11-15 21:53:47,118 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:47,118 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:47,118 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:47,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:47,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:47,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:47,171 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616101247] [2019-11-15 21:53:47,171 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:47,172 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:53:47,172 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1928953446] [2019-11-15 21:53:47,172 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:53:47,172 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:47,172 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:53:47,173 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:53:47,173 INFO L87 Difference]: Start difference. First operand 136 states and 160 transitions. Second operand 6 states. [2019-11-15 21:53:47,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:47,538 INFO L93 Difference]: Finished difference Result 157 states and 184 transitions. [2019-11-15 21:53:47,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:53:47,538 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 21 [2019-11-15 21:53:47,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:47,540 INFO L225 Difference]: With dead ends: 157 [2019-11-15 21:53:47,540 INFO L226 Difference]: Without dead ends: 157 [2019-11-15 21:53:47,541 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:53:47,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2019-11-15 21:53:47,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 140. [2019-11-15 21:53:47,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2019-11-15 21:53:47,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 166 transitions. [2019-11-15 21:53:47,550 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 166 transitions. Word has length 21 [2019-11-15 21:53:47,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:47,551 INFO L462 AbstractCegarLoop]: Abstraction has 140 states and 166 transitions. [2019-11-15 21:53:47,551 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:53:47,551 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 166 transitions. [2019-11-15 21:53:47,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-11-15 21:53:47,554 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:47,555 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:47,555 INFO L410 AbstractCegarLoop]: === Iteration 12 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:47,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:47,556 INFO L82 PathProgramCache]: Analyzing trace with hash 41200478, now seen corresponding path program 1 times [2019-11-15 21:53:47,556 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:47,556 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [117713274] [2019-11-15 21:53:47,556 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:47,556 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:47,557 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:47,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:47,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:47,714 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:47,715 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [117713274] [2019-11-15 21:53:47,715 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:47,715 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:53:47,715 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1490306686] [2019-11-15 21:53:47,715 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:53:47,715 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:47,716 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:53:47,716 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:53:47,716 INFO L87 Difference]: Start difference. First operand 140 states and 166 transitions. Second operand 7 states. [2019-11-15 21:53:48,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:48,180 INFO L93 Difference]: Finished difference Result 152 states and 177 transitions. [2019-11-15 21:53:48,180 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:53:48,180 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 21 [2019-11-15 21:53:48,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:48,182 INFO L225 Difference]: With dead ends: 152 [2019-11-15 21:53:48,182 INFO L226 Difference]: Without dead ends: 152 [2019-11-15 21:53:48,182 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2019-11-15 21:53:48,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2019-11-15 21:53:48,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 140. [2019-11-15 21:53:48,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2019-11-15 21:53:48,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 164 transitions. [2019-11-15 21:53:48,188 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 164 transitions. Word has length 21 [2019-11-15 21:53:48,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:48,189 INFO L462 AbstractCegarLoop]: Abstraction has 140 states and 164 transitions. [2019-11-15 21:53:48,189 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:53:48,189 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 164 transitions. [2019-11-15 21:53:48,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-11-15 21:53:48,190 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:48,190 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:48,190 INFO L410 AbstractCegarLoop]: === Iteration 13 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:48,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:48,190 INFO L82 PathProgramCache]: Analyzing trace with hash 102968293, now seen corresponding path program 1 times [2019-11-15 21:53:48,191 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:48,191 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [650242774] [2019-11-15 21:53:48,191 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:48,191 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:48,191 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:48,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:48,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:48,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:48,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:48,306 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [650242774] [2019-11-15 21:53:48,306 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:48,306 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:53:48,306 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1905450304] [2019-11-15 21:53:48,306 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:53:48,307 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:48,307 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:53:48,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:53:48,307 INFO L87 Difference]: Start difference. First operand 140 states and 164 transitions. Second operand 7 states. [2019-11-15 21:53:48,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:48,649 INFO L93 Difference]: Finished difference Result 153 states and 178 transitions. [2019-11-15 21:53:48,650 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:53:48,650 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2019-11-15 21:53:48,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:48,651 INFO L225 Difference]: With dead ends: 153 [2019-11-15 21:53:48,651 INFO L226 Difference]: Without dead ends: 153 [2019-11-15 21:53:48,652 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:53:48,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2019-11-15 21:53:48,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 146. [2019-11-15 21:53:48,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2019-11-15 21:53:48,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 172 transitions. [2019-11-15 21:53:48,662 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 172 transitions. Word has length 22 [2019-11-15 21:53:48,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:48,663 INFO L462 AbstractCegarLoop]: Abstraction has 146 states and 172 transitions. [2019-11-15 21:53:48,663 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:53:48,663 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 172 transitions. [2019-11-15 21:53:48,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-11-15 21:53:48,664 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:48,665 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:48,665 INFO L410 AbstractCegarLoop]: === Iteration 14 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:48,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:48,665 INFO L82 PathProgramCache]: Analyzing trace with hash 102968294, now seen corresponding path program 1 times [2019-11-15 21:53:48,666 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:48,666 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [874468323] [2019-11-15 21:53:48,666 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:48,666 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:48,666 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:48,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:48,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:48,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:48,812 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:48,813 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [874468323] [2019-11-15 21:53:48,813 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:48,813 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:53:48,813 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1436797462] [2019-11-15 21:53:48,814 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:53:48,814 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:48,814 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:53:48,814 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:53:48,814 INFO L87 Difference]: Start difference. First operand 146 states and 172 transitions. Second operand 7 states. [2019-11-15 21:53:49,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:49,275 INFO L93 Difference]: Finished difference Result 158 states and 185 transitions. [2019-11-15 21:53:49,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:53:49,275 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2019-11-15 21:53:49,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:49,277 INFO L225 Difference]: With dead ends: 158 [2019-11-15 21:53:49,277 INFO L226 Difference]: Without dead ends: 158 [2019-11-15 21:53:49,277 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:53:49,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2019-11-15 21:53:49,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 146. [2019-11-15 21:53:49,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2019-11-15 21:53:49,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 171 transitions. [2019-11-15 21:53:49,283 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 171 transitions. Word has length 22 [2019-11-15 21:53:49,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:49,283 INFO L462 AbstractCegarLoop]: Abstraction has 146 states and 171 transitions. [2019-11-15 21:53:49,283 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:53:49,283 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 171 transitions. [2019-11-15 21:53:49,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-11-15 21:53:49,284 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:49,284 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:49,284 INFO L410 AbstractCegarLoop]: === Iteration 15 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:49,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:49,285 INFO L82 PathProgramCache]: Analyzing trace with hash 1095902609, now seen corresponding path program 1 times [2019-11-15 21:53:49,285 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:49,285 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [538440722] [2019-11-15 21:53:49,285 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:49,285 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:49,285 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:49,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:49,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:49,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:49,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:49,467 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:49,468 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [538440722] [2019-11-15 21:53:49,468 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:49,468 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:53:49,468 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [587402454] [2019-11-15 21:53:49,468 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-15 21:53:49,469 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:49,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-15 21:53:49,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:53:49,469 INFO L87 Difference]: Start difference. First operand 146 states and 171 transitions. Second operand 9 states. [2019-11-15 21:53:49,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:49,911 INFO L93 Difference]: Finished difference Result 147 states and 168 transitions. [2019-11-15 21:53:49,911 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:53:49,911 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 24 [2019-11-15 21:53:49,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:49,913 INFO L225 Difference]: With dead ends: 147 [2019-11-15 21:53:49,913 INFO L226 Difference]: Without dead ends: 147 [2019-11-15 21:53:49,913 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2019-11-15 21:53:49,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2019-11-15 21:53:49,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 141. [2019-11-15 21:53:49,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2019-11-15 21:53:49,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 162 transitions. [2019-11-15 21:53:49,919 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 162 transitions. Word has length 24 [2019-11-15 21:53:49,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:49,919 INFO L462 AbstractCegarLoop]: Abstraction has 141 states and 162 transitions. [2019-11-15 21:53:49,920 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-15 21:53:49,920 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 162 transitions. [2019-11-15 21:53:49,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-11-15 21:53:49,920 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:49,920 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:49,921 INFO L410 AbstractCegarLoop]: === Iteration 16 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:49,921 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:49,921 INFO L82 PathProgramCache]: Analyzing trace with hash 168285766, now seen corresponding path program 1 times [2019-11-15 21:53:49,921 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:49,921 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1460220812] [2019-11-15 21:53:49,922 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:49,922 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:49,922 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:49,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:49,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:49,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:50,051 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:50,051 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1460220812] [2019-11-15 21:53:50,051 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:50,052 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:53:50,052 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1945766504] [2019-11-15 21:53:50,052 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:53:50,052 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:50,052 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:53:50,053 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:53:50,053 INFO L87 Difference]: Start difference. First operand 141 states and 162 transitions. Second operand 7 states. [2019-11-15 21:53:50,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:50,482 INFO L93 Difference]: Finished difference Result 150 states and 171 transitions. [2019-11-15 21:53:50,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:53:50,482 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 24 [2019-11-15 21:53:50,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:50,484 INFO L225 Difference]: With dead ends: 150 [2019-11-15 21:53:50,484 INFO L226 Difference]: Without dead ends: 150 [2019-11-15 21:53:50,484 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:53:50,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2019-11-15 21:53:50,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 143. [2019-11-15 21:53:50,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2019-11-15 21:53:50,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 165 transitions. [2019-11-15 21:53:50,493 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 165 transitions. Word has length 24 [2019-11-15 21:53:50,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:50,493 INFO L462 AbstractCegarLoop]: Abstraction has 143 states and 165 transitions. [2019-11-15 21:53:50,493 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:53:50,494 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 165 transitions. [2019-11-15 21:53:50,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-11-15 21:53:50,495 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:50,496 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:50,496 INFO L410 AbstractCegarLoop]: === Iteration 17 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:50,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:50,497 INFO L82 PathProgramCache]: Analyzing trace with hash 168285767, now seen corresponding path program 1 times [2019-11-15 21:53:50,497 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:50,497 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1002057604] [2019-11-15 21:53:50,497 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:50,497 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:50,498 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:50,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:50,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:50,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:50,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:50,796 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1002057604] [2019-11-15 21:53:50,796 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:50,796 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-15 21:53:50,797 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [248187633] [2019-11-15 21:53:50,797 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-15 21:53:50,797 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:50,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-15 21:53:50,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-11-15 21:53:50,798 INFO L87 Difference]: Start difference. First operand 143 states and 165 transitions. Second operand 12 states. [2019-11-15 21:53:51,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:51,592 INFO L93 Difference]: Finished difference Result 149 states and 170 transitions. [2019-11-15 21:53:51,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-15 21:53:51,598 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 24 [2019-11-15 21:53:51,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:51,599 INFO L225 Difference]: With dead ends: 149 [2019-11-15 21:53:51,599 INFO L226 Difference]: Without dead ends: 149 [2019-11-15 21:53:51,600 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=79, Invalid=301, Unknown=0, NotChecked=0, Total=380 [2019-11-15 21:53:51,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2019-11-15 21:53:51,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 143. [2019-11-15 21:53:51,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2019-11-15 21:53:51,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 164 transitions. [2019-11-15 21:53:51,605 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 164 transitions. Word has length 24 [2019-11-15 21:53:51,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:51,605 INFO L462 AbstractCegarLoop]: Abstraction has 143 states and 164 transitions. [2019-11-15 21:53:51,605 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-15 21:53:51,605 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 164 transitions. [2019-11-15 21:53:51,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-11-15 21:53:51,607 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:51,607 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:51,607 INFO L410 AbstractCegarLoop]: === Iteration 18 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:51,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:51,608 INFO L82 PathProgramCache]: Analyzing trace with hash 895542511, now seen corresponding path program 1 times [2019-11-15 21:53:51,608 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:51,608 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1128057638] [2019-11-15 21:53:51,608 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:51,608 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:51,609 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:51,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:51,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:51,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:51,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:51,776 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:51,776 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1128057638] [2019-11-15 21:53:51,777 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1076958040] [2019-11-15 21:53:51,777 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-15 21:53:51,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:51,913 INFO L256 TraceCheckSpWp]: Trace formula consists of 165 conjuncts, 24 conjunts are in the unsatisfiable core [2019-11-15 21:53:51,921 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-11-15 21:53:52,147 INFO L189 IndexEqualityManager]: detected not equals via solver [2019-11-15 21:53:52,164 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2019-11-15 21:53:52,165 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:53:52,180 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:52,181 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2019-11-15 21:53:52,182 INFO L221 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:19 [2019-11-15 21:53:52,217 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:52,217 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-15 21:53:52,218 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 16 [2019-11-15 21:53:52,218 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [789512888] [2019-11-15 21:53:52,218 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-11-15 21:53:52,218 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:52,219 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-11-15 21:53:52,219 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=230, Unknown=0, NotChecked=0, Total=272 [2019-11-15 21:53:52,219 INFO L87 Difference]: Start difference. First operand 143 states and 164 transitions. Second operand 17 states. [2019-11-15 21:53:52,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:52,899 INFO L93 Difference]: Finished difference Result 146 states and 166 transitions. [2019-11-15 21:53:52,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 21:53:52,900 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 26 [2019-11-15 21:53:52,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:52,901 INFO L225 Difference]: With dead ends: 146 [2019-11-15 21:53:52,901 INFO L226 Difference]: Without dead ends: 146 [2019-11-15 21:53:52,902 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=80, Invalid=382, Unknown=0, NotChecked=0, Total=462 [2019-11-15 21:53:52,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2019-11-15 21:53:52,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 107. [2019-11-15 21:53:52,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2019-11-15 21:53:52,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 113 transitions. [2019-11-15 21:53:52,907 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 113 transitions. Word has length 26 [2019-11-15 21:53:52,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:52,907 INFO L462 AbstractCegarLoop]: Abstraction has 107 states and 113 transitions. [2019-11-15 21:53:52,907 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-11-15 21:53:52,907 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 113 transitions. [2019-11-15 21:53:52,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-11-15 21:53:52,908 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:52,908 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:53,117 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-15 21:53:53,118 INFO L410 AbstractCegarLoop]: === Iteration 19 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:53,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:53,118 INFO L82 PathProgramCache]: Analyzing trace with hash 1988250585, now seen corresponding path program 1 times [2019-11-15 21:53:53,118 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:53,118 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [388455145] [2019-11-15 21:53:53,118 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:53,119 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:53,119 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:53,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:53,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:53,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:53,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:53,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:53,229 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [388455145] [2019-11-15 21:53:53,229 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:53,229 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:53:53,229 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [657852323] [2019-11-15 21:53:53,232 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 21:53:53,232 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:53,233 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 21:53:53,233 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:53:53,233 INFO L87 Difference]: Start difference. First operand 107 states and 113 transitions. Second operand 8 states. [2019-11-15 21:53:53,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:53,735 INFO L93 Difference]: Finished difference Result 144 states and 153 transitions. [2019-11-15 21:53:53,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:53:53,736 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 27 [2019-11-15 21:53:53,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:53,737 INFO L225 Difference]: With dead ends: 144 [2019-11-15 21:53:53,737 INFO L226 Difference]: Without dead ends: 144 [2019-11-15 21:53:53,737 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2019-11-15 21:53:53,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2019-11-15 21:53:53,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 109. [2019-11-15 21:53:53,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2019-11-15 21:53:53,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 115 transitions. [2019-11-15 21:53:53,743 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 115 transitions. Word has length 27 [2019-11-15 21:53:53,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:53,743 INFO L462 AbstractCegarLoop]: Abstraction has 109 states and 115 transitions. [2019-11-15 21:53:53,743 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 21:53:53,743 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 115 transitions. [2019-11-15 21:53:53,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-11-15 21:53:53,745 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:53,745 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:53,746 INFO L410 AbstractCegarLoop]: === Iteration 20 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:53,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:53,746 INFO L82 PathProgramCache]: Analyzing trace with hash 1988251549, now seen corresponding path program 1 times [2019-11-15 21:53:53,746 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:53,746 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1244765233] [2019-11-15 21:53:53,746 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:53,747 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:53,747 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:53,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:53,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:53,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:53,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:53,864 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:53,865 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1244765233] [2019-11-15 21:53:53,865 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:53,865 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:53:53,865 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [421368126] [2019-11-15 21:53:53,867 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-15 21:53:53,867 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:53,868 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-15 21:53:53,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:53:53,870 INFO L87 Difference]: Start difference. First operand 109 states and 115 transitions. Second operand 9 states. [2019-11-15 21:53:54,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:54,428 INFO L93 Difference]: Finished difference Result 139 states and 148 transitions. [2019-11-15 21:53:54,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 21:53:54,428 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 27 [2019-11-15 21:53:54,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:54,430 INFO L225 Difference]: With dead ends: 139 [2019-11-15 21:53:54,430 INFO L226 Difference]: Without dead ends: 139 [2019-11-15 21:53:54,430 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=121, Unknown=0, NotChecked=0, Total=156 [2019-11-15 21:53:54,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2019-11-15 21:53:54,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 111. [2019-11-15 21:53:54,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2019-11-15 21:53:54,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 118 transitions. [2019-11-15 21:53:54,437 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 118 transitions. Word has length 27 [2019-11-15 21:53:54,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:54,439 INFO L462 AbstractCegarLoop]: Abstraction has 111 states and 118 transitions. [2019-11-15 21:53:54,439 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-15 21:53:54,440 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 118 transitions. [2019-11-15 21:53:54,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-11-15 21:53:54,444 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:54,444 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:54,445 INFO L410 AbstractCegarLoop]: === Iteration 21 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:54,445 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:54,445 INFO L82 PathProgramCache]: Analyzing trace with hash 1988251550, now seen corresponding path program 1 times [2019-11-15 21:53:54,445 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:54,446 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1480927616] [2019-11-15 21:53:54,446 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:54,446 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:54,446 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:54,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:54,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:54,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:54,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:54,614 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:54,615 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1480927616] [2019-11-15 21:53:54,616 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:54,616 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:53:54,617 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2110835387] [2019-11-15 21:53:54,617 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-15 21:53:54,617 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:54,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-15 21:53:54,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:53:54,619 INFO L87 Difference]: Start difference. First operand 111 states and 118 transitions. Second operand 9 states. [2019-11-15 21:53:55,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:55,212 INFO L93 Difference]: Finished difference Result 153 states and 165 transitions. [2019-11-15 21:53:55,213 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 21:53:55,213 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 27 [2019-11-15 21:53:55,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:55,214 INFO L225 Difference]: With dead ends: 153 [2019-11-15 21:53:55,214 INFO L226 Difference]: Without dead ends: 153 [2019-11-15 21:53:55,215 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=120, Unknown=0, NotChecked=0, Total=156 [2019-11-15 21:53:55,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2019-11-15 21:53:55,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 124. [2019-11-15 21:53:55,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2019-11-15 21:53:55,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2019-11-15 21:53:55,219 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 27 [2019-11-15 21:53:55,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:55,219 INFO L462 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2019-11-15 21:53:55,219 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-15 21:53:55,219 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2019-11-15 21:53:55,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-11-15 21:53:55,220 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:55,220 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:55,220 INFO L410 AbstractCegarLoop]: === Iteration 22 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:55,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:55,220 INFO L82 PathProgramCache]: Analyzing trace with hash -1821505919, now seen corresponding path program 1 times [2019-11-15 21:53:55,220 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:55,221 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [504824051] [2019-11-15 21:53:55,221 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:55,221 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:55,221 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:55,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:55,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:55,337 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:55,338 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [504824051] [2019-11-15 21:53:55,338 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1678132925] [2019-11-15 21:53:55,338 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-15 21:53:55,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:55,454 INFO L256 TraceCheckSpWp]: Trace formula consists of 171 conjuncts, 13 conjunts are in the unsatisfiable core [2019-11-15 21:53:55,456 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-11-15 21:53:55,468 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2019-11-15 21:53:55,468 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:53:55,470 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:55,471 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:53:55,471 INFO L221 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2019-11-15 21:53:55,488 INFO L341 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:55,489 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 39 [2019-11-15 21:53:55,489 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:53:55,507 INFO L567 ElimStorePlain]: treesize reduction 14, result has 51.7 percent of original size [2019-11-15 21:53:55,507 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:53:55,507 INFO L221 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2019-11-15 21:53:55,534 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2019-11-15 21:53:55,535 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:53:55,543 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:55,543 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:53:55,544 INFO L221 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:28, output treesize:27 [2019-11-15 21:53:55,600 INFO L341 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:55,601 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 63 treesize of output 87 [2019-11-15 21:53:55,602 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 3 terms [2019-11-15 21:53:55,602 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-11-15 21:53:55,604 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-11-15 21:53:55,605 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 3 xjuncts. [2019-11-15 21:53:55,634 INFO L567 ElimStorePlain]: treesize reduction 78, result has 26.4 percent of original size [2019-11-15 21:53:55,634 INFO L496 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:53:55,634 INFO L221 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:68, output treesize:27 [2019-11-15 21:53:55,645 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 13 [2019-11-15 21:53:55,646 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:53:55,652 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:55,652 INFO L496 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2019-11-15 21:53:55,653 INFO L221 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:36, output treesize:15 [2019-11-15 21:53:55,677 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-11-15 21:53:55,678 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-15 21:53:55,678 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6] total 12 [2019-11-15 21:53:55,678 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [628774573] [2019-11-15 21:53:55,681 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-15 21:53:55,681 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:55,682 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-15 21:53:55,682 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2019-11-15 21:53:55,682 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 13 states. [2019-11-15 21:53:56,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:56,194 INFO L93 Difference]: Finished difference Result 129 states and 137 transitions. [2019-11-15 21:53:56,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:53:56,196 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 27 [2019-11-15 21:53:56,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:56,197 INFO L225 Difference]: With dead ends: 129 [2019-11-15 21:53:56,197 INFO L226 Difference]: Without dead ends: 129 [2019-11-15 21:53:56,197 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 21:53:56,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2019-11-15 21:53:56,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 123. [2019-11-15 21:53:56,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2019-11-15 21:53:56,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2019-11-15 21:53:56,202 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 27 [2019-11-15 21:53:56,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:56,202 INFO L462 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2019-11-15 21:53:56,203 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-15 21:53:56,203 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2019-11-15 21:53:56,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-11-15 21:53:56,203 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:56,203 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:56,407 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-15 21:53:56,407 INFO L410 AbstractCegarLoop]: === Iteration 23 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:56,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:56,408 INFO L82 PathProgramCache]: Analyzing trace with hash -1821505918, now seen corresponding path program 1 times [2019-11-15 21:53:56,408 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:56,408 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [642281894] [2019-11-15 21:53:56,408 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:56,408 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:56,408 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:56,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:56,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:56,578 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:56,578 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [642281894] [2019-11-15 21:53:56,579 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2136048704] [2019-11-15 21:53:56,579 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-15 21:53:56,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:56,723 INFO L256 TraceCheckSpWp]: Trace formula consists of 171 conjuncts, 23 conjunts are in the unsatisfiable core [2019-11-15 21:53:56,725 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-11-15 21:53:56,735 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2019-11-15 21:53:56,735 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:53:56,739 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:56,739 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:53:56,740 INFO L221 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2019-11-15 21:53:56,745 INFO L392 ElimStorePlain]: Different costs {0=[|v_#length_52|], 1=[|v_#valid_73|]} [2019-11-15 21:53:56,749 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2019-11-15 21:53:56,749 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:53:56,756 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:56,761 INFO L341 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:56,762 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 15 [2019-11-15 21:53:56,762 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2019-11-15 21:53:56,767 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:56,767 INFO L496 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:53:56,767 INFO L221 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:13 [2019-11-15 21:53:56,775 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2019-11-15 21:53:56,775 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:53:56,787 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:56,790 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2019-11-15 21:53:56,790 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2019-11-15 21:53:56,799 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:56,800 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:53:56,800 INFO L221 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:31 [2019-11-15 21:53:56,850 INFO L341 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:56,851 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 104 treesize of output 110 [2019-11-15 21:53:56,852 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 3 terms [2019-11-15 21:53:56,852 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-11-15 21:53:56,853 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-11-15 21:53:56,854 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 3 xjuncts. [2019-11-15 21:53:56,885 INFO L567 ElimStorePlain]: treesize reduction 160, result has 32.2 percent of original size [2019-11-15 21:53:56,890 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 34 [2019-11-15 21:53:56,890 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2019-11-15 21:53:56,899 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:56,900 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:53:56,900 INFO L221 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:116, output treesize:34 [2019-11-15 21:53:56,930 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 13 [2019-11-15 21:53:56,931 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:53:56,938 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:56,941 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2019-11-15 21:53:56,941 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2019-11-15 21:53:56,956 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:53:56,956 INFO L496 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:53:56,957 INFO L221 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:52, output treesize:12 [2019-11-15 21:53:56,973 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:56,974 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-15 21:53:56,974 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 12 [2019-11-15 21:53:56,974 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1318431445] [2019-11-15 21:53:56,974 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-15 21:53:56,974 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:56,974 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-15 21:53:56,975 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2019-11-15 21:53:56,975 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 13 states. [2019-11-15 21:53:57,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:57,608 INFO L93 Difference]: Finished difference Result 136 states and 144 transitions. [2019-11-15 21:53:57,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 21:53:57,608 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 27 [2019-11-15 21:53:57,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:57,609 INFO L225 Difference]: With dead ends: 136 [2019-11-15 21:53:57,609 INFO L226 Difference]: Without dead ends: 136 [2019-11-15 21:53:57,609 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=90, Invalid=290, Unknown=0, NotChecked=0, Total=380 [2019-11-15 21:53:57,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2019-11-15 21:53:57,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 129. [2019-11-15 21:53:57,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2019-11-15 21:53:57,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2019-11-15 21:53:57,613 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 27 [2019-11-15 21:53:57,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:57,613 INFO L462 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2019-11-15 21:53:57,613 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-15 21:53:57,613 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2019-11-15 21:53:57,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-11-15 21:53:57,614 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:57,614 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:57,814 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-15 21:53:57,815 INFO L410 AbstractCegarLoop]: === Iteration 24 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:57,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:57,815 INFO L82 PathProgramCache]: Analyzing trace with hash 107997591, now seen corresponding path program 1 times [2019-11-15 21:53:57,815 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:57,815 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [317973360] [2019-11-15 21:53:57,815 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:57,815 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:57,816 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:57,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:57,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:57,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:57,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:57,909 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:57,909 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [317973360] [2019-11-15 21:53:57,909 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:57,909 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:53:57,910 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1902881082] [2019-11-15 21:53:57,911 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:53:57,912 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:57,912 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:53:57,912 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:53:57,912 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 7 states. [2019-11-15 21:53:58,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:58,160 INFO L93 Difference]: Finished difference Result 140 states and 148 transitions. [2019-11-15 21:53:58,160 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:53:58,160 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 30 [2019-11-15 21:53:58,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:58,161 INFO L225 Difference]: With dead ends: 140 [2019-11-15 21:53:58,161 INFO L226 Difference]: Without dead ends: 140 [2019-11-15 21:53:58,161 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:53:58,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2019-11-15 21:53:58,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 128. [2019-11-15 21:53:58,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2019-11-15 21:53:58,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 136 transitions. [2019-11-15 21:53:58,165 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 136 transitions. Word has length 30 [2019-11-15 21:53:58,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:58,165 INFO L462 AbstractCegarLoop]: Abstraction has 128 states and 136 transitions. [2019-11-15 21:53:58,165 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:53:58,165 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 136 transitions. [2019-11-15 21:53:58,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-11-15 21:53:58,165 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:58,166 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:58,166 INFO L410 AbstractCegarLoop]: === Iteration 25 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:58,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:58,166 INFO L82 PathProgramCache]: Analyzing trace with hash 107997592, now seen corresponding path program 1 times [2019-11-15 21:53:58,166 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:58,167 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1823318899] [2019-11-15 21:53:58,167 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:58,167 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:58,167 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:58,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:58,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:58,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:58,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:58,333 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:58,333 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1823318899] [2019-11-15 21:53:58,334 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:58,334 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-15 21:53:58,334 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [588803490] [2019-11-15 21:53:58,334 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-15 21:53:58,335 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:58,335 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-15 21:53:58,335 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:53:58,335 INFO L87 Difference]: Start difference. First operand 128 states and 136 transitions. Second operand 10 states. [2019-11-15 21:53:58,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:58,901 INFO L93 Difference]: Finished difference Result 155 states and 167 transitions. [2019-11-15 21:53:58,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 21:53:58,902 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 30 [2019-11-15 21:53:58,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:58,903 INFO L225 Difference]: With dead ends: 155 [2019-11-15 21:53:58,903 INFO L226 Difference]: Without dead ends: 155 [2019-11-15 21:53:58,904 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2019-11-15 21:53:58,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2019-11-15 21:53:58,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 131. [2019-11-15 21:53:58,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2019-11-15 21:53:58,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 139 transitions. [2019-11-15 21:53:58,908 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 139 transitions. Word has length 30 [2019-11-15 21:53:58,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:58,908 INFO L462 AbstractCegarLoop]: Abstraction has 131 states and 139 transitions. [2019-11-15 21:53:58,908 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-15 21:53:58,908 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 139 transitions. [2019-11-15 21:53:58,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-11-15 21:53:58,909 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:58,909 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:58,914 INFO L410 AbstractCegarLoop]: === Iteration 26 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:58,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:58,916 INFO L82 PathProgramCache]: Analyzing trace with hash -1644457898, now seen corresponding path program 1 times [2019-11-15 21:53:58,916 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:58,916 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1076905469] [2019-11-15 21:53:58,917 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:58,917 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:58,917 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:58,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:58,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:59,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:59,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:59,135 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:53:59,135 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1076905469] [2019-11-15 21:53:59,136 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:53:59,136 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-15 21:53:59,136 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [871024851] [2019-11-15 21:53:59,136 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-11-15 21:53:59,137 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:53:59,137 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-11-15 21:53:59,137 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2019-11-15 21:53:59,138 INFO L87 Difference]: Start difference. First operand 131 states and 139 transitions. Second operand 11 states. [2019-11-15 21:53:59,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:53:59,646 INFO L93 Difference]: Finished difference Result 167 states and 181 transitions. [2019-11-15 21:53:59,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-15 21:53:59,647 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2019-11-15 21:53:59,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:53:59,648 INFO L225 Difference]: With dead ends: 167 [2019-11-15 21:53:59,648 INFO L226 Difference]: Without dead ends: 167 [2019-11-15 21:53:59,649 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2019-11-15 21:53:59,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2019-11-15 21:53:59,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 139. [2019-11-15 21:53:59,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2019-11-15 21:53:59,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 148 transitions. [2019-11-15 21:53:59,654 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 148 transitions. Word has length 32 [2019-11-15 21:53:59,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:53:59,655 INFO L462 AbstractCegarLoop]: Abstraction has 139 states and 148 transitions. [2019-11-15 21:53:59,655 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-11-15 21:53:59,655 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 148 transitions. [2019-11-15 21:53:59,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-11-15 21:53:59,656 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:53:59,656 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:53:59,656 INFO L410 AbstractCegarLoop]: === Iteration 27 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:53:59,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:53:59,657 INFO L82 PathProgramCache]: Analyzing trace with hash 316594936, now seen corresponding path program 1 times [2019-11-15 21:53:59,657 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:53:59,657 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [570347823] [2019-11-15 21:53:59,657 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:59,657 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:53:59,657 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:53:59,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:59,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:53:59,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:00,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:00,084 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:54:00,084 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [570347823] [2019-11-15 21:54:00,084 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:54:00,085 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-11-15 21:54:00,085 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [994879482] [2019-11-15 21:54:00,085 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-11-15 21:54:00,085 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:54:00,086 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-11-15 21:54:00,086 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=208, Unknown=0, NotChecked=0, Total=240 [2019-11-15 21:54:00,086 INFO L87 Difference]: Start difference. First operand 139 states and 148 transitions. Second operand 16 states. [2019-11-15 21:54:01,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:54:01,102 INFO L93 Difference]: Finished difference Result 164 states and 176 transitions. [2019-11-15 21:54:01,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-11-15 21:54:01,103 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 34 [2019-11-15 21:54:01,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:54:01,105 INFO L225 Difference]: With dead ends: 164 [2019-11-15 21:54:01,105 INFO L226 Difference]: Without dead ends: 164 [2019-11-15 21:54:01,105 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 112 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=108, Invalid=704, Unknown=0, NotChecked=0, Total=812 [2019-11-15 21:54:01,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2019-11-15 21:54:01,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 144. [2019-11-15 21:54:01,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2019-11-15 21:54:01,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 153 transitions. [2019-11-15 21:54:01,111 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 153 transitions. Word has length 34 [2019-11-15 21:54:01,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:54:01,111 INFO L462 AbstractCegarLoop]: Abstraction has 144 states and 153 transitions. [2019-11-15 21:54:01,112 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-11-15 21:54:01,112 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 153 transitions. [2019-11-15 21:54:01,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-11-15 21:54:01,112 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:54:01,113 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:54:01,113 INFO L410 AbstractCegarLoop]: === Iteration 28 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:54:01,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:54:01,113 INFO L82 PathProgramCache]: Analyzing trace with hash 219641510, now seen corresponding path program 2 times [2019-11-15 21:54:01,114 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:54:01,114 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1748214184] [2019-11-15 21:54:01,114 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:01,114 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:01,114 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:54:01,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:01,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:01,340 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:54:01,341 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1748214184] [2019-11-15 21:54:01,341 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [932347216] [2019-11-15 21:54:01,341 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-15 21:54:01,462 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-11-15 21:54:01,462 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-11-15 21:54:01,464 INFO L256 TraceCheckSpWp]: Trace formula consists of 192 conjuncts, 29 conjunts are in the unsatisfiable core [2019-11-15 21:54:01,466 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-11-15 21:54:01,473 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2019-11-15 21:54:01,473 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,478 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:01,478 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,479 INFO L221 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2019-11-15 21:54:01,486 INFO L392 ElimStorePlain]: Different costs {0=[|v_#length_53|], 1=[|v_#valid_75|]} [2019-11-15 21:54:01,493 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2019-11-15 21:54:01,493 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,514 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:01,522 INFO L341 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:01,523 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 15 [2019-11-15 21:54:01,523 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,537 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:01,537 INFO L496 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,537 INFO L221 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:13 [2019-11-15 21:54:01,547 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2019-11-15 21:54:01,548 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,562 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:01,567 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2019-11-15 21:54:01,568 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,577 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:01,577 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,577 INFO L221 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:31 [2019-11-15 21:54:01,625 INFO L341 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:01,625 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 104 treesize of output 110 [2019-11-15 21:54:01,626 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 3 terms [2019-11-15 21:54:01,627 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-11-15 21:54:01,627 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-11-15 21:54:01,628 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 3 xjuncts. [2019-11-15 21:54:01,659 INFO L567 ElimStorePlain]: treesize reduction 160, result has 32.2 percent of original size [2019-11-15 21:54:01,663 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 34 [2019-11-15 21:54:01,663 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,670 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:01,670 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,670 INFO L221 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:116, output treesize:34 [2019-11-15 21:54:01,744 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 13 [2019-11-15 21:54:01,745 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,759 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:01,776 INFO L341 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:01,777 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 63 treesize of output 87 [2019-11-15 21:54:01,777 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-11-15 21:54:01,778 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,793 INFO L567 ElimStorePlain]: treesize reduction 44, result has 43.6 percent of original size [2019-11-15 21:54:01,793 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,793 INFO L221 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:116, output treesize:34 [2019-11-15 21:54:01,823 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 13 [2019-11-15 21:54:01,824 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,837 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:01,840 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2019-11-15 21:54:01,840 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,846 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:01,846 INFO L496 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:54:01,846 INFO L221 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:52, output treesize:12 [2019-11-15 21:54:01,867 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:54:01,867 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-15 21:54:01,867 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 16 [2019-11-15 21:54:01,867 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1059322473] [2019-11-15 21:54:01,868 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-11-15 21:54:01,868 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:54:01,868 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-11-15 21:54:01,868 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2019-11-15 21:54:01,869 INFO L87 Difference]: Start difference. First operand 144 states and 153 transitions. Second operand 17 states. [2019-11-15 21:54:02,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:54:02,562 INFO L93 Difference]: Finished difference Result 157 states and 166 transitions. [2019-11-15 21:54:02,562 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-15 21:54:02,562 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 33 [2019-11-15 21:54:02,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:54:02,564 INFO L225 Difference]: With dead ends: 157 [2019-11-15 21:54:02,564 INFO L226 Difference]: Without dead ends: 157 [2019-11-15 21:54:02,564 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 30 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=139, Invalid=511, Unknown=0, NotChecked=0, Total=650 [2019-11-15 21:54:02,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2019-11-15 21:54:02,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 150. [2019-11-15 21:54:02,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2019-11-15 21:54:02,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 159 transitions. [2019-11-15 21:54:02,569 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 159 transitions. Word has length 33 [2019-11-15 21:54:02,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:54:02,570 INFO L462 AbstractCegarLoop]: Abstraction has 150 states and 159 transitions. [2019-11-15 21:54:02,570 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-11-15 21:54:02,570 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 159 transitions. [2019-11-15 21:54:02,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-15 21:54:02,570 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:54:02,571 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:54:02,775 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-15 21:54:02,776 INFO L410 AbstractCegarLoop]: === Iteration 29 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:54:02,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:54:02,776 INFO L82 PathProgramCache]: Analyzing trace with hash -1648210464, now seen corresponding path program 1 times [2019-11-15 21:54:02,776 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:54:02,777 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2133958896] [2019-11-15 21:54:02,777 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:02,777 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:02,777 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:54:02,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:02,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:02,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:02,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:02,935 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:54:02,936 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2133958896] [2019-11-15 21:54:02,936 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:54:02,936 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-15 21:54:02,936 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [202991990] [2019-11-15 21:54:02,937 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-15 21:54:02,937 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:54:02,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-15 21:54:02,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:54:02,937 INFO L87 Difference]: Start difference. First operand 150 states and 159 transitions. Second operand 10 states. [2019-11-15 21:54:03,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:54:03,525 INFO L93 Difference]: Finished difference Result 174 states and 184 transitions. [2019-11-15 21:54:03,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 21:54:03,525 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 35 [2019-11-15 21:54:03,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:54:03,527 INFO L225 Difference]: With dead ends: 174 [2019-11-15 21:54:03,527 INFO L226 Difference]: Without dead ends: 174 [2019-11-15 21:54:03,527 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2019-11-15 21:54:03,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2019-11-15 21:54:03,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 153. [2019-11-15 21:54:03,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2019-11-15 21:54:03,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 162 transitions. [2019-11-15 21:54:03,531 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 162 transitions. Word has length 35 [2019-11-15 21:54:03,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:54:03,532 INFO L462 AbstractCegarLoop]: Abstraction has 153 states and 162 transitions. [2019-11-15 21:54:03,532 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-15 21:54:03,532 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 162 transitions. [2019-11-15 21:54:03,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-11-15 21:54:03,532 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:54:03,532 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:54:03,533 INFO L410 AbstractCegarLoop]: === Iteration 30 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:54:03,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:54:03,533 INFO L82 PathProgramCache]: Analyzing trace with hash -2124166873, now seen corresponding path program 1 times [2019-11-15 21:54:03,533 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:54:03,533 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [498599101] [2019-11-15 21:54:03,533 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:03,533 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:03,534 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:54:03,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:03,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:03,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:03,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:03,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:03,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:54:03,643 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [498599101] [2019-11-15 21:54:03,643 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:54:03,643 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:54:03,643 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [615624783] [2019-11-15 21:54:03,644 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-15 21:54:03,644 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:54:03,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-15 21:54:03,644 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:54:03,644 INFO L87 Difference]: Start difference. First operand 153 states and 162 transitions. Second operand 9 states. [2019-11-15 21:54:04,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:54:04,001 INFO L93 Difference]: Finished difference Result 173 states and 183 transitions. [2019-11-15 21:54:04,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 21:54:04,001 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 38 [2019-11-15 21:54:04,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:54:04,002 INFO L225 Difference]: With dead ends: 173 [2019-11-15 21:54:04,002 INFO L226 Difference]: Without dead ends: 173 [2019-11-15 21:54:04,003 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2019-11-15 21:54:04,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2019-11-15 21:54:04,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 159. [2019-11-15 21:54:04,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2019-11-15 21:54:04,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 171 transitions. [2019-11-15 21:54:04,008 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 171 transitions. Word has length 38 [2019-11-15 21:54:04,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:54:04,009 INFO L462 AbstractCegarLoop]: Abstraction has 159 states and 171 transitions. [2019-11-15 21:54:04,009 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-15 21:54:04,009 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 171 transitions. [2019-11-15 21:54:04,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-11-15 21:54:04,010 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:54:04,010 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:54:04,010 INFO L410 AbstractCegarLoop]: === Iteration 31 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:54:04,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:54:04,011 INFO L82 PathProgramCache]: Analyzing trace with hash -1424663467, now seen corresponding path program 1 times [2019-11-15 21:54:04,011 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:54:04,011 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1446668671] [2019-11-15 21:54:04,011 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:04,011 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:04,011 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:54:04,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:04,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:04,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:04,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:04,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:04,116 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:54:04,117 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1446668671] [2019-11-15 21:54:04,117 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:54:04,117 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:54:04,117 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [883451615] [2019-11-15 21:54:04,118 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-15 21:54:04,119 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:54:04,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-15 21:54:04,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:54:04,119 INFO L87 Difference]: Start difference. First operand 159 states and 171 transitions. Second operand 9 states. [2019-11-15 21:54:04,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:54:04,558 INFO L93 Difference]: Finished difference Result 176 states and 189 transitions. [2019-11-15 21:54:04,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 21:54:04,558 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 39 [2019-11-15 21:54:04,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:54:04,560 INFO L225 Difference]: With dead ends: 176 [2019-11-15 21:54:04,560 INFO L226 Difference]: Without dead ends: 176 [2019-11-15 21:54:04,560 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2019-11-15 21:54:04,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2019-11-15 21:54:04,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 160. [2019-11-15 21:54:04,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2019-11-15 21:54:04,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 172 transitions. [2019-11-15 21:54:04,564 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 172 transitions. Word has length 39 [2019-11-15 21:54:04,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:54:04,565 INFO L462 AbstractCegarLoop]: Abstraction has 160 states and 172 transitions. [2019-11-15 21:54:04,565 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-15 21:54:04,565 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 172 transitions. [2019-11-15 21:54:04,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-11-15 21:54:04,565 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:54:04,567 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:54:04,567 INFO L410 AbstractCegarLoop]: === Iteration 32 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:54:04,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:54:04,568 INFO L82 PathProgramCache]: Analyzing trace with hash 911596352, now seen corresponding path program 1 times [2019-11-15 21:54:04,568 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:54:04,568 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [450155994] [2019-11-15 21:54:04,568 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:04,568 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:04,569 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:54:04,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:04,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:04,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:04,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:04,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:54:04,969 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [450155994] [2019-11-15 21:54:04,969 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:54:04,969 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-11-15 21:54:04,969 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1389217709] [2019-11-15 21:54:04,970 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-11-15 21:54:04,970 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:54:04,970 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-11-15 21:54:04,970 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=239, Unknown=0, NotChecked=0, Total=272 [2019-11-15 21:54:04,970 INFO L87 Difference]: Start difference. First operand 160 states and 172 transitions. Second operand 17 states. [2019-11-15 21:54:06,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:54:06,078 INFO L93 Difference]: Finished difference Result 195 states and 210 transitions. [2019-11-15 21:54:06,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 21:54:06,078 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 39 [2019-11-15 21:54:06,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:54:06,079 INFO L225 Difference]: With dead ends: 195 [2019-11-15 21:54:06,080 INFO L226 Difference]: Without dead ends: 195 [2019-11-15 21:54:06,080 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=113, Invalid=817, Unknown=0, NotChecked=0, Total=930 [2019-11-15 21:54:06,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2019-11-15 21:54:06,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 167. [2019-11-15 21:54:06,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2019-11-15 21:54:06,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 182 transitions. [2019-11-15 21:54:06,085 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 182 transitions. Word has length 39 [2019-11-15 21:54:06,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:54:06,085 INFO L462 AbstractCegarLoop]: Abstraction has 167 states and 182 transitions. [2019-11-15 21:54:06,085 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-11-15 21:54:06,085 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 182 transitions. [2019-11-15 21:54:06,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-11-15 21:54:06,086 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:54:06,086 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:54:06,086 INFO L410 AbstractCegarLoop]: === Iteration 33 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:54:06,086 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:54:06,086 INFO L82 PathProgramCache]: Analyzing trace with hash 911596353, now seen corresponding path program 1 times [2019-11-15 21:54:06,087 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:54:06,087 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [707214046] [2019-11-15 21:54:06,087 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:06,087 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:06,087 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:54:06,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:06,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:06,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:06,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:06,538 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:54:06,538 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [707214046] [2019-11-15 21:54:06,539 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:54:06,539 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-11-15 21:54:06,539 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [305495500] [2019-11-15 21:54:06,539 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-11-15 21:54:06,539 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:54:06,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-11-15 21:54:06,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=238, Unknown=0, NotChecked=0, Total=272 [2019-11-15 21:54:06,540 INFO L87 Difference]: Start difference. First operand 167 states and 182 transitions. Second operand 17 states. [2019-11-15 21:54:07,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:54:07,867 INFO L93 Difference]: Finished difference Result 212 states and 230 transitions. [2019-11-15 21:54:07,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 21:54:07,869 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 39 [2019-11-15 21:54:07,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:54:07,870 INFO L225 Difference]: With dead ends: 212 [2019-11-15 21:54:07,870 INFO L226 Difference]: Without dead ends: 212 [2019-11-15 21:54:07,870 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=106, Invalid=764, Unknown=0, NotChecked=0, Total=870 [2019-11-15 21:54:07,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2019-11-15 21:54:07,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 189. [2019-11-15 21:54:07,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2019-11-15 21:54:07,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 212 transitions. [2019-11-15 21:54:07,875 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 212 transitions. Word has length 39 [2019-11-15 21:54:07,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:54:07,876 INFO L462 AbstractCegarLoop]: Abstraction has 189 states and 212 transitions. [2019-11-15 21:54:07,876 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-11-15 21:54:07,876 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 212 transitions. [2019-11-15 21:54:07,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-11-15 21:54:07,876 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:54:07,877 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:54:07,877 INFO L410 AbstractCegarLoop]: === Iteration 34 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:54:07,877 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:54:07,877 INFO L82 PathProgramCache]: Analyzing trace with hash -1214894359, now seen corresponding path program 1 times [2019-11-15 21:54:07,877 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:54:07,877 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1618102217] [2019-11-15 21:54:07,877 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:07,878 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:07,878 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:54:07,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:07,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:07,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:07,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:07,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:07,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:54:07,987 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1618102217] [2019-11-15 21:54:07,987 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:54:07,987 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:54:07,987 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2129980538] [2019-11-15 21:54:07,987 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 21:54:07,987 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:54:07,988 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 21:54:07,988 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:54:07,988 INFO L87 Difference]: Start difference. First operand 189 states and 212 transitions. Second operand 8 states. [2019-11-15 21:54:08,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:54:08,298 INFO L93 Difference]: Finished difference Result 198 states and 219 transitions. [2019-11-15 21:54:08,298 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:54:08,298 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 40 [2019-11-15 21:54:08,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:54:08,300 INFO L225 Difference]: With dead ends: 198 [2019-11-15 21:54:08,300 INFO L226 Difference]: Without dead ends: 198 [2019-11-15 21:54:08,300 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2019-11-15 21:54:08,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2019-11-15 21:54:08,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 194. [2019-11-15 21:54:08,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2019-11-15 21:54:08,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 219 transitions. [2019-11-15 21:54:08,305 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 219 transitions. Word has length 40 [2019-11-15 21:54:08,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:54:08,305 INFO L462 AbstractCegarLoop]: Abstraction has 194 states and 219 transitions. [2019-11-15 21:54:08,305 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 21:54:08,305 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 219 transitions. [2019-11-15 21:54:08,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-11-15 21:54:08,306 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:54:08,306 INFO L380 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:54:08,306 INFO L410 AbstractCegarLoop]: === Iteration 35 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:54:08,306 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:54:08,307 INFO L82 PathProgramCache]: Analyzing trace with hash 239942602, now seen corresponding path program 3 times [2019-11-15 21:54:08,307 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:54:08,307 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1205083752] [2019-11-15 21:54:08,308 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:08,308 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:08,308 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:54:08,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:08,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:08,557 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:54:08,558 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1205083752] [2019-11-15 21:54:08,558 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [938262218] [2019-11-15 21:54:08,558 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-15 21:54:08,753 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2019-11-15 21:54:08,753 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-11-15 21:54:08,755 INFO L256 TraceCheckSpWp]: Trace formula consists of 213 conjuncts, 54 conjunts are in the unsatisfiable core [2019-11-15 21:54:08,757 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-11-15 21:54:08,821 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2019-11-15 21:54:08,821 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:08,824 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:08,825 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:54:08,825 INFO L221 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2019-11-15 21:54:08,848 INFO L392 ElimStorePlain]: Different costs {0=[|v_#length_54|], 1=[|v_#valid_77|]} [2019-11-15 21:54:08,850 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2019-11-15 21:54:08,850 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:08,858 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:08,864 INFO L341 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:08,864 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 15 [2019-11-15 21:54:08,865 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:08,873 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:08,873 INFO L496 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:54:08,873 INFO L221 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:23, output treesize:16 [2019-11-15 21:54:08,901 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2019-11-15 21:54:08,901 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:08,910 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:08,916 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2019-11-15 21:54:08,916 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:08,924 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:08,925 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:54:08,925 INFO L221 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:39, output treesize:34 [2019-11-15 21:54:09,058 INFO L341 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:09,059 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 104 treesize of output 110 [2019-11-15 21:54:09,060 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 3 terms [2019-11-15 21:54:09,060 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-11-15 21:54:09,061 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-11-15 21:54:09,062 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 3 xjuncts. [2019-11-15 21:54:09,098 INFO L567 ElimStorePlain]: treesize reduction 160, result has 33.1 percent of original size [2019-11-15 21:54:09,101 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 34 [2019-11-15 21:54:09,102 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:09,111 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:09,112 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:54:09,112 INFO L221 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:119, output treesize:37 [2019-11-15 21:54:09,229 INFO L341 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:09,229 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 104 treesize of output 110 [2019-11-15 21:54:09,230 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 3 terms [2019-11-15 21:54:09,231 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-11-15 21:54:09,232 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-11-15 21:54:09,232 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 3 xjuncts. [2019-11-15 21:54:09,279 INFO L567 ElimStorePlain]: treesize reduction 160, result has 33.1 percent of original size [2019-11-15 21:54:09,282 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 34 [2019-11-15 21:54:09,282 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:09,290 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:09,290 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:54:09,291 INFO L221 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:119, output treesize:37 [2019-11-15 21:54:09,392 INFO L341 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:09,393 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 104 treesize of output 110 [2019-11-15 21:54:09,394 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 3 terms [2019-11-15 21:54:09,394 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-11-15 21:54:09,395 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-11-15 21:54:09,395 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 3 xjuncts. [2019-11-15 21:54:09,453 INFO L567 ElimStorePlain]: treesize reduction 160, result has 37.3 percent of original size [2019-11-15 21:54:09,456 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 37 [2019-11-15 21:54:09,457 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:09,468 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:09,469 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:54:09,469 INFO L221 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:135, output treesize:42 [2019-11-15 21:54:09,546 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2019-11-15 21:54:09,547 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:09,555 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:09,558 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2019-11-15 21:54:09,558 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2019-11-15 21:54:09,571 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-11-15 21:54:09,571 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-11-15 21:54:09,571 INFO L221 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:47, output treesize:17 [2019-11-15 21:54:09,602 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:54:09,602 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-15 21:54:09,602 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 16] total 29 [2019-11-15 21:54:09,602 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [905764346] [2019-11-15 21:54:09,603 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2019-11-15 21:54:09,603 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:54:09,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2019-11-15 21:54:09,604 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=751, Unknown=0, NotChecked=0, Total=870 [2019-11-15 21:54:09,604 INFO L87 Difference]: Start difference. First operand 194 states and 219 transitions. Second operand 30 states. [2019-11-15 21:54:10,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:54:10,776 INFO L93 Difference]: Finished difference Result 207 states and 233 transitions. [2019-11-15 21:54:10,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-11-15 21:54:10,777 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 39 [2019-11-15 21:54:10,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:54:10,778 INFO L225 Difference]: With dead ends: 207 [2019-11-15 21:54:10,778 INFO L226 Difference]: Without dead ends: 207 [2019-11-15 21:54:10,779 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 402 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=313, Invalid=1493, Unknown=0, NotChecked=0, Total=1806 [2019-11-15 21:54:10,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2019-11-15 21:54:10,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 200. [2019-11-15 21:54:10,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2019-11-15 21:54:10,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 225 transitions. [2019-11-15 21:54:10,784 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 225 transitions. Word has length 39 [2019-11-15 21:54:10,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:54:10,784 INFO L462 AbstractCegarLoop]: Abstraction has 200 states and 225 transitions. [2019-11-15 21:54:10,784 INFO L463 AbstractCegarLoop]: Interpolant automaton has 30 states. [2019-11-15 21:54:10,784 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 225 transitions. [2019-11-15 21:54:10,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-11-15 21:54:10,785 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:54:10,785 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:54:10,989 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-15 21:54:10,989 INFO L410 AbstractCegarLoop]: === Iteration 36 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:54:10,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:54:10,990 INFO L82 PathProgramCache]: Analyzing trace with hash 992980696, now seen corresponding path program 1 times [2019-11-15 21:54:10,990 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:54:10,990 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1792227923] [2019-11-15 21:54:10,990 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:10,990 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:10,991 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:54:10,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:11,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:11,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:11,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:11,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:11,132 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:54:11,133 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1792227923] [2019-11-15 21:54:11,133 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:54:11,133 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-15 21:54:11,133 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [62884714] [2019-11-15 21:54:11,133 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-11-15 21:54:11,134 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:54:11,135 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-11-15 21:54:11,135 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2019-11-15 21:54:11,135 INFO L87 Difference]: Start difference. First operand 200 states and 225 transitions. Second operand 11 states. [2019-11-15 21:54:11,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:54:11,717 INFO L93 Difference]: Finished difference Result 208 states and 232 transitions. [2019-11-15 21:54:11,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 21:54:11,718 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 41 [2019-11-15 21:54:11,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:54:11,719 INFO L225 Difference]: With dead ends: 208 [2019-11-15 21:54:11,720 INFO L226 Difference]: Without dead ends: 208 [2019-11-15 21:54:11,720 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=244, Unknown=0, NotChecked=0, Total=306 [2019-11-15 21:54:11,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2019-11-15 21:54:11,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 199. [2019-11-15 21:54:11,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2019-11-15 21:54:11,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 224 transitions. [2019-11-15 21:54:11,726 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 224 transitions. Word has length 41 [2019-11-15 21:54:11,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:54:11,727 INFO L462 AbstractCegarLoop]: Abstraction has 199 states and 224 transitions. [2019-11-15 21:54:11,727 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-11-15 21:54:11,727 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 224 transitions. [2019-11-15 21:54:11,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-11-15 21:54:11,728 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:54:11,728 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:54:11,728 INFO L410 AbstractCegarLoop]: === Iteration 37 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:54:11,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:54:11,729 INFO L82 PathProgramCache]: Analyzing trace with hash 288702969, now seen corresponding path program 1 times [2019-11-15 21:54:11,729 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:54:11,729 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [812109099] [2019-11-15 21:54:11,729 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:11,729 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:11,730 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:54:11,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:11,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:11,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:12,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:12,084 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:54:12,084 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [812109099] [2019-11-15 21:54:12,085 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:54:12,085 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-11-15 21:54:12,085 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [390790405] [2019-11-15 21:54:12,085 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-11-15 21:54:12,086 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:54:12,086 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-11-15 21:54:12,086 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=239, Unknown=0, NotChecked=0, Total=272 [2019-11-15 21:54:12,086 INFO L87 Difference]: Start difference. First operand 199 states and 224 transitions. Second operand 17 states. [2019-11-15 21:54:13,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:54:13,302 INFO L93 Difference]: Finished difference Result 236 states and 257 transitions. [2019-11-15 21:54:13,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-11-15 21:54:13,302 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 42 [2019-11-15 21:54:13,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:54:13,303 INFO L225 Difference]: With dead ends: 236 [2019-11-15 21:54:13,303 INFO L226 Difference]: Without dead ends: 236 [2019-11-15 21:54:13,304 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 133 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=118, Invalid=874, Unknown=0, NotChecked=0, Total=992 [2019-11-15 21:54:13,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236 states. [2019-11-15 21:54:13,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236 to 212. [2019-11-15 21:54:13,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2019-11-15 21:54:13,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 242 transitions. [2019-11-15 21:54:13,309 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 242 transitions. Word has length 42 [2019-11-15 21:54:13,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:54:13,310 INFO L462 AbstractCegarLoop]: Abstraction has 212 states and 242 transitions. [2019-11-15 21:54:13,310 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-11-15 21:54:13,310 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 242 transitions. [2019-11-15 21:54:13,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-11-15 21:54:13,311 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:54:13,311 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:54:13,311 INFO L410 AbstractCegarLoop]: === Iteration 38 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:54:13,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:54:13,311 INFO L82 PathProgramCache]: Analyzing trace with hash 288691984, now seen corresponding path program 1 times [2019-11-15 21:54:13,312 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:54:13,312 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1956955984] [2019-11-15 21:54:13,312 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:13,312 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:13,312 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:54:13,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:13,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:13,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:13,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:54:13,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:54:13,383 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1956955984] [2019-11-15 21:54:13,383 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:54:13,383 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:54:13,384 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1159747824] [2019-11-15 21:54:13,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:54:13,384 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:54:13,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:54:13,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:54:13,384 INFO L87 Difference]: Start difference. First operand 212 states and 242 transitions. Second operand 7 states. [2019-11-15 21:54:13,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:54:13,679 INFO L93 Difference]: Finished difference Result 219 states and 245 transitions. [2019-11-15 21:54:13,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:54:13,680 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 42 [2019-11-15 21:54:13,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:54:13,681 INFO L225 Difference]: With dead ends: 219 [2019-11-15 21:54:13,681 INFO L226 Difference]: Without dead ends: 219 [2019-11-15 21:54:13,681 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2019-11-15 21:54:13,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2019-11-15 21:54:13,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 211. [2019-11-15 21:54:13,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211 states. [2019-11-15 21:54:13,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 239 transitions. [2019-11-15 21:54:13,686 INFO L78 Accepts]: Start accepts. Automaton has 211 states and 239 transitions. Word has length 42 [2019-11-15 21:54:13,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:54:13,686 INFO L462 AbstractCegarLoop]: Abstraction has 211 states and 239 transitions. [2019-11-15 21:54:13,686 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:54:13,686 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 239 transitions. [2019-11-15 21:54:13,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-11-15 21:54:13,687 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:54:13,687 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:54:13,687 INFO L410 AbstractCegarLoop]: === Iteration 39 === [create_dataErr9REQUIRES_VIOLATION, create_dataErr4REQUIRES_VIOLATION, create_dataErr3REQUIRES_VIOLATION, create_dataErr5REQUIRES_VIOLATION, create_dataErr0REQUIRES_VIOLATION, create_dataErr1REQUIRES_VIOLATION, create_dataErr6REQUIRES_VIOLATION, create_dataErr8REQUIRES_VIOLATION, create_dataErr7REQUIRES_VIOLATION, create_dataErr2REQUIRES_VIOLATION, freeDataErr4ASSERT_VIOLATIONMEMORY_FREE, freeDataErr1REQUIRES_VIOLATION, freeDataErr5ASSERT_VIOLATIONMEMORY_FREE, freeDataErr2REQUIRES_VIOLATION, freeDataErr3REQUIRES_VIOLATION, freeDataErr6ASSERT_VIOLATIONMEMORY_FREE, freeDataErr0REQUIRES_VIOLATION, freeDataErr7ASSERT_VIOLATIONMEMORY_FREE, freeDataErr9ASSERT_VIOLATIONMEMORY_FREE, freeDataErr8ASSERT_VIOLATIONMEMORY_FREE, mainErr3REQUIRES_VIOLATION, mainErr4REQUIRES_VIOLATION, mainErr12ASSERT_VIOLATIONMEMORY_FREE, mainErr15REQUIRES_VIOLATION, mainErr5REQUIRES_VIOLATION, mainErr16REQUIRES_VIOLATION, mainErr11REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr13ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9REQUIRES_VIOLATION, mainErr10REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr6REQUIRES_VIOLATION, mainErr7REQUIRES_VIOLATION, mainErr17ENSURES_VIOLATIONMEMORY_LEAK, mainErr8REQUIRES_VIOLATION, appendErr0REQUIRES_VIOLATION, appendErr5REQUIRES_VIOLATION, appendErr4REQUIRES_VIOLATION, appendErr3REQUIRES_VIOLATION, appendErr2REQUIRES_VIOLATION, appendErr7REQUIRES_VIOLATION, appendErr1REQUIRES_VIOLATION, appendErr6REQUIRES_VIOLATION]=== [2019-11-15 21:54:13,688 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:54:13,688 INFO L82 PathProgramCache]: Analyzing trace with hash 359516961, now seen corresponding path program 1 times [2019-11-15 21:54:13,688 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:54:13,688 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [602788149] [2019-11-15 21:54:13,688 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:13,688 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:54:13,688 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:54:13,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 21:54:13,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 21:54:13,744 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 21:54:13,745 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 21:54:13,780 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 09:54:13 BoogieIcfgContainer [2019-11-15 21:54:13,780 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 21:54:13,780 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 21:54:13,781 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 21:54:13,781 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 21:54:13,781 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:53:42" (3/4) ... [2019-11-15 21:54:13,784 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 21:54:13,830 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_134136c6-b774-428d-a6ea-2683841341cd/bin/uautomizer/witness.graphml [2019-11-15 21:54:13,830 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 21:54:13,832 INFO L168 Benchmark]: Toolchain (without parser) took 32688.81 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 353.4 MB). Free memory was 940.7 MB in the beginning and 995.7 MB in the end (delta: -55.0 MB). Peak memory consumption was 298.3 MB. Max. memory is 11.5 GB. [2019-11-15 21:54:13,832 INFO L168 Benchmark]: CDTParser took 0.25 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 21:54:13,832 INFO L168 Benchmark]: CACSL2BoogieTranslator took 547.12 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.0 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -182.8 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-11-15 21:54:13,833 INFO L168 Benchmark]: Boogie Preprocessor took 67.03 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-11-15 21:54:13,833 INFO L168 Benchmark]: RCFGBuilder took 889.78 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 60.0 MB). Peak memory consumption was 60.0 MB. Max. memory is 11.5 GB. [2019-11-15 21:54:13,834 INFO L168 Benchmark]: TraceAbstraction took 31130.86 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 212.3 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.4 MB). Peak memory consumption was 261.7 MB. Max. memory is 11.5 GB. [2019-11-15 21:54:13,834 INFO L168 Benchmark]: Witness Printer took 50.03 ms. Allocated memory is still 1.4 GB. Free memory was 1.0 GB in the beginning and 995.7 MB in the end (delta: 13.0 MB). Peak memory consumption was 13.0 MB. Max. memory is 11.5 GB. [2019-11-15 21:54:13,836 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 547.12 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.0 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -182.8 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 67.03 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 889.78 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 60.0 MB). Peak memory consumption was 60.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 31130.86 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 212.3 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.4 MB). Peak memory consumption was 261.7 MB. Max. memory is 11.5 GB. * Witness Printer took 50.03 ms. Allocated memory is still 1.4 GB. Free memory was 1.0 GB in the beginning and 995.7 MB in the end (delta: 13.0 MB). Peak memory consumption was 13.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 560]: free of unallocated memory possible free of unallocated memory possible We found a FailurePath: [L571] struct node_t *list = ((void *)0); [L572] int dataNotFinished = 0; VAL [dataNotFinished=0, list={-1:0}] [L574] CALL append(&list) VAL [pointerToList={-1:0}] [L565] struct node_t *node = malloc(sizeof *node); VAL [malloc(sizeof *node)={2:0}, node={2:0}, pointerToList={-1:0}, pointerToList={-1:0}] [L566] EXPR \read(**pointerToList) VAL [\read(**pointerToList)={0:0}, malloc(sizeof *node)={2:0}, node={2:0}, pointerToList={-1:0}, pointerToList={-1:0}] [L566] node->next = *pointerToList VAL [\read(**pointerToList)={0:0}, malloc(sizeof *node)={2:0}, node={2:0}, pointerToList={-1:0}, pointerToList={-1:0}] [L567] CALL, EXPR create_data() [L539] COND FALSE !(__VERIFIER_nondet_int()) [L542] Data data = malloc(sizeof *data); [L543] COND FALSE !(__VERIFIER_nondet_int()) [L550] data->array = ((void *)0) VAL [data={3:0}, malloc(sizeof *data)={3:0}] [L552] data->number = __VERIFIER_nondet_int() VAL [__VERIFIER_nondet_int()=0, data={3:0}, malloc(sizeof *data)={3:0}] [L553] return data; VAL [\result={3:0}, data={3:0}, malloc(sizeof *data)={3:0}] [L567] RET, EXPR create_data() VAL [create_data()={3:0}, malloc(sizeof *node)={2:0}, node={2:0}, pointerToList={-1:0}, pointerToList={-1:0}] [L567] node->data = create_data() VAL [create_data()={3:0}, malloc(sizeof *node)={2:0}, node={2:0}, pointerToList={-1:0}, pointerToList={-1:0}] [L568] *pointerToList = node VAL [malloc(sizeof *node)={2:0}, node={2:0}, pointerToList={-1:0}, pointerToList={-1:0}] [L574] RET append(&list) VAL [dataNotFinished=0, list={-1:0}] [L575] COND FALSE !(__VERIFIER_nondet_int()) [L576] \read(*list) VAL [\read(*list)={2:0}, dataNotFinished=0, list={-1:0}] [L576] COND TRUE \read(*list) [L577] EXPR \read(*list) VAL [\read(*list)={2:0}, dataNotFinished=0, list={-1:0}] [L577] EXPR list->next VAL [\read(*list)={2:0}, dataNotFinished=0, list={-1:0}, list->next={0:0}] [L577] struct node_t *next = list->next; [L578] EXPR \read(*list) VAL [\read(*list)={2:0}, dataNotFinished=0, list={-1:0}, next={0:0}] [L578] EXPR list->data VAL [\read(*list)={2:0}, dataNotFinished=0, list={-1:0}, list->data={3:0}, next={0:0}] [L578] CALL freeData(list->data) VAL [data={3:0}] [L556] COND FALSE !(data == ((void *)0)) VAL [data={3:0}, data={3:0}] [L559] EXPR data->array VAL [data={3:0}, data={3:0}, data->array={0:0}] [L559] COND TRUE data->array == ((void *)0) [L560] EXPR data->array VAL [data={3:0}, data={3:0}, data->array={0:0}] [L560] free(data->array) VAL [data={3:0}, data={3:0}, data->array={0:0}] [L560] free(data->array) VAL [data={3:0}, data={3:0}, data->array={0:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 8 procedures, 120 locations, 46 error locations. Result: UNSAFE, OverallTime: 31.0s, OverallIterations: 39, TraceHistogramMax: 4, AutomataDifference: 20.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2930 SDtfs, 3485 SDslu, 7559 SDs, 0 SdLazy, 16843 SolverSat, 679 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 13.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 748 GetRequests, 271 SyntacticMatches, 4 SemanticMatches, 473 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1289 ImplicationChecksByTransitivity, 9.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=212occurred in iteration=37, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 38 MinimizatonAttempts, 556 StatesRemovedByMinimization, 38 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 7.4s InterpolantComputationTime, 1197 NumberOfCodeBlocks, 1197 NumberOfCodeBlocksAsserted, 48 NumberOfCheckSat, 1111 ConstructedInterpolants, 3 QuantifiedInterpolants, 361432 SizeOfPredicates, 56 NumberOfNonLiveVariables, 912 ConjunctsInSsa, 143 ConjunctsInUnsatCore, 43 InterpolantComputations, 33 PerfectInterpolantSequences, 5/110 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...