./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix041_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_1b4066e5-4265-4751-a879-b4146e8bd964/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_1b4066e5-4265-4751-a879-b4146e8bd964/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_1b4066e5-4265-4751-a879-b4146e8bd964/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_1b4066e5-4265-4751-a879-b4146e8bd964/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix041_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_1b4066e5-4265-4751-a879-b4146e8bd964/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_1b4066e5-4265-4751-a879-b4146e8bd964/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0c76bdefb7d69bad3fea845fa012b0f8a1a35469 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 21:38:12,497 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 21:38:12,499 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 21:38:12,510 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 21:38:12,511 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 21:38:12,512 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 21:38:12,513 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 21:38:12,515 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 21:38:12,518 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 21:38:12,519 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 21:38:12,520 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 21:38:12,521 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 21:38:12,521 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 21:38:12,522 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 21:38:12,523 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 21:38:12,524 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 21:38:12,525 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 21:38:12,526 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 21:38:12,531 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 21:38:12,537 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 21:38:12,538 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 21:38:12,540 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 21:38:12,541 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 21:38:12,542 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 21:38:12,544 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 21:38:12,545 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 21:38:12,545 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 21:38:12,546 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 21:38:12,546 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 21:38:12,547 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 21:38:12,548 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 21:38:12,548 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 21:38:12,549 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 21:38:12,550 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 21:38:12,551 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 21:38:12,551 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 21:38:12,552 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 21:38:12,552 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 21:38:12,552 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 21:38:12,553 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 21:38:12,554 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 21:38:12,555 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_1b4066e5-4265-4751-a879-b4146e8bd964/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 21:38:12,569 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 21:38:12,569 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 21:38:12,571 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 21:38:12,571 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 21:38:12,571 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 21:38:12,571 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 21:38:12,572 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 21:38:12,572 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 21:38:12,572 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 21:38:12,572 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 21:38:12,573 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 21:38:12,573 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 21:38:12,573 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 21:38:12,573 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 21:38:12,574 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 21:38:12,574 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 21:38:12,574 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 21:38:12,574 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 21:38:12,575 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 21:38:12,575 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 21:38:12,575 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 21:38:12,575 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 21:38:12,576 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 21:38:12,576 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 21:38:12,576 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 21:38:12,576 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 21:38:12,577 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 21:38:12,577 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 21:38:12,577 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_1b4066e5-4265-4751-a879-b4146e8bd964/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0c76bdefb7d69bad3fea845fa012b0f8a1a35469 [2019-11-15 21:38:12,610 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 21:38:12,622 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 21:38:12,629 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 21:38:12,632 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 21:38:12,632 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 21:38:12,634 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_1b4066e5-4265-4751-a879-b4146e8bd964/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix041_power.opt.i [2019-11-15 21:38:12,714 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1b4066e5-4265-4751-a879-b4146e8bd964/bin/uautomizer/data/9ae04a655/84a67ce22057461fb0ad33bc6c334884/FLAGdfd3898cb [2019-11-15 21:38:13,262 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 21:38:13,263 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_1b4066e5-4265-4751-a879-b4146e8bd964/sv-benchmarks/c/pthread-wmm/mix041_power.opt.i [2019-11-15 21:38:13,280 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1b4066e5-4265-4751-a879-b4146e8bd964/bin/uautomizer/data/9ae04a655/84a67ce22057461fb0ad33bc6c334884/FLAGdfd3898cb [2019-11-15 21:38:13,498 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_1b4066e5-4265-4751-a879-b4146e8bd964/bin/uautomizer/data/9ae04a655/84a67ce22057461fb0ad33bc6c334884 [2019-11-15 21:38:13,502 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 21:38:13,504 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 21:38:13,505 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 21:38:13,505 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 21:38:13,509 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 21:38:13,510 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 09:38:13" (1/1) ... [2019-11-15 21:38:13,513 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@30031fa2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:38:13, skipping insertion in model container [2019-11-15 21:38:13,514 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 09:38:13" (1/1) ... [2019-11-15 21:38:13,522 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 21:38:13,577 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 21:38:14,107 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 21:38:14,122 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 21:38:14,188 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 21:38:14,265 INFO L192 MainTranslator]: Completed translation [2019-11-15 21:38:14,266 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:38:14 WrapperNode [2019-11-15 21:38:14,266 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 21:38:14,267 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 21:38:14,267 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 21:38:14,268 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 21:38:14,277 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:38:14" (1/1) ... [2019-11-15 21:38:14,296 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:38:14" (1/1) ... [2019-11-15 21:38:14,332 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 21:38:14,333 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 21:38:14,333 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 21:38:14,333 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 21:38:14,343 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:38:14" (1/1) ... [2019-11-15 21:38:14,344 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:38:14" (1/1) ... [2019-11-15 21:38:14,349 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:38:14" (1/1) ... [2019-11-15 21:38:14,349 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:38:14" (1/1) ... [2019-11-15 21:38:14,359 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:38:14" (1/1) ... [2019-11-15 21:38:14,363 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:38:14" (1/1) ... [2019-11-15 21:38:14,367 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:38:14" (1/1) ... [2019-11-15 21:38:14,373 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 21:38:14,373 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 21:38:14,373 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 21:38:14,374 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 21:38:14,375 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:38:14" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_1b4066e5-4265-4751-a879-b4146e8bd964/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 21:38:14,454 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 21:38:14,455 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 21:38:14,455 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 21:38:14,455 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 21:38:14,457 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 21:38:14,457 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 21:38:14,457 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 21:38:14,457 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 21:38:14,458 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 21:38:14,458 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 21:38:14,460 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 21:38:14,462 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 21:38:15,176 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 21:38:15,176 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 21:38:15,177 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:38:15 BoogieIcfgContainer [2019-11-15 21:38:15,177 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 21:38:15,178 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 21:38:15,178 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 21:38:15,181 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 21:38:15,181 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 09:38:13" (1/3) ... [2019-11-15 21:38:15,182 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f6b302d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 09:38:15, skipping insertion in model container [2019-11-15 21:38:15,182 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:38:14" (2/3) ... [2019-11-15 21:38:15,183 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f6b302d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 09:38:15, skipping insertion in model container [2019-11-15 21:38:15,183 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:38:15" (3/3) ... [2019-11-15 21:38:15,187 INFO L109 eAbstractionObserver]: Analyzing ICFG mix041_power.opt.i [2019-11-15 21:38:15,222 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,223 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,223 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,223 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,223 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,223 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,223 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,223 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,224 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,224 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,224 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,224 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,224 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,225 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,225 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,225 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,225 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,225 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,226 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,226 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,226 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,226 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,226 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,227 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,227 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,227 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,227 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,228 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,228 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,228 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,229 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,229 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,229 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,229 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,230 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,230 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,230 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,230 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,231 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,231 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,231 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,231 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,231 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,232 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,232 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,232 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,233 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,233 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,233 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,233 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,233 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,234 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,234 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,234 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,234 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,234 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,235 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,235 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,235 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,235 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,236 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,236 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,236 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,236 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:38:15,246 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 21:38:15,246 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 21:38:15,254 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 21:38:15,269 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 21:38:15,284 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 21:38:15,284 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 21:38:15,284 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 21:38:15,284 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 21:38:15,284 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 21:38:15,284 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 21:38:15,284 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 21:38:15,285 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 21:38:15,298 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 141 places, 179 transitions [2019-11-15 21:38:16,956 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22495 states. [2019-11-15 21:38:16,959 INFO L276 IsEmpty]: Start isEmpty. Operand 22495 states. [2019-11-15 21:38:16,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-11-15 21:38:16,977 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:16,978 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:16,983 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:16,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:16,991 INFO L82 PathProgramCache]: Analyzing trace with hash -406661720, now seen corresponding path program 1 times [2019-11-15 21:38:17,001 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:17,001 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1460934011] [2019-11-15 21:38:17,002 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:17,002 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:17,002 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:17,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:17,347 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:17,348 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1460934011] [2019-11-15 21:38:17,349 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:17,349 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:38:17,349 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [298575338] [2019-11-15 21:38:17,353 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:38:17,354 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:17,367 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:38:17,368 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:38:17,370 INFO L87 Difference]: Start difference. First operand 22495 states. Second operand 4 states. [2019-11-15 21:38:18,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:18,005 INFO L93 Difference]: Finished difference Result 23447 states and 91748 transitions. [2019-11-15 21:38:18,005 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:38:18,007 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2019-11-15 21:38:18,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:18,270 INFO L225 Difference]: With dead ends: 23447 [2019-11-15 21:38:18,271 INFO L226 Difference]: Without dead ends: 21271 [2019-11-15 21:38:18,273 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:38:18,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21271 states. [2019-11-15 21:38:19,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21271 to 21271. [2019-11-15 21:38:19,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21271 states. [2019-11-15 21:38:19,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21271 states to 21271 states and 83772 transitions. [2019-11-15 21:38:19,524 INFO L78 Accepts]: Start accepts. Automaton has 21271 states and 83772 transitions. Word has length 38 [2019-11-15 21:38:19,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:19,525 INFO L462 AbstractCegarLoop]: Abstraction has 21271 states and 83772 transitions. [2019-11-15 21:38:19,525 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:38:19,526 INFO L276 IsEmpty]: Start isEmpty. Operand 21271 states and 83772 transitions. [2019-11-15 21:38:19,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-15 21:38:19,536 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:19,536 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:19,536 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:19,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:19,537 INFO L82 PathProgramCache]: Analyzing trace with hash -1298258461, now seen corresponding path program 1 times [2019-11-15 21:38:19,537 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:19,538 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1460556094] [2019-11-15 21:38:19,538 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:19,538 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:19,538 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:19,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:19,672 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:19,673 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1460556094] [2019-11-15 21:38:19,673 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:19,673 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:38:19,673 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [416904395] [2019-11-15 21:38:19,675 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:38:19,675 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:19,675 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:38:19,675 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:38:19,676 INFO L87 Difference]: Start difference. First operand 21271 states and 83772 transitions. Second operand 5 states. [2019-11-15 21:38:20,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:20,480 INFO L93 Difference]: Finished difference Result 34705 states and 129064 transitions. [2019-11-15 21:38:20,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:38:20,481 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-11-15 21:38:20,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:20,662 INFO L225 Difference]: With dead ends: 34705 [2019-11-15 21:38:20,662 INFO L226 Difference]: Without dead ends: 34561 [2019-11-15 21:38:20,663 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:38:20,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34561 states. [2019-11-15 21:38:22,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34561 to 33061. [2019-11-15 21:38:22,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33061 states. [2019-11-15 21:38:22,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33061 states to 33061 states and 123952 transitions. [2019-11-15 21:38:22,214 INFO L78 Accepts]: Start accepts. Automaton has 33061 states and 123952 transitions. Word has length 45 [2019-11-15 21:38:22,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:22,216 INFO L462 AbstractCegarLoop]: Abstraction has 33061 states and 123952 transitions. [2019-11-15 21:38:22,216 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:38:22,217 INFO L276 IsEmpty]: Start isEmpty. Operand 33061 states and 123952 transitions. [2019-11-15 21:38:22,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-11-15 21:38:22,222 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:22,223 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:22,223 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:22,224 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:22,224 INFO L82 PathProgramCache]: Analyzing trace with hash 56811971, now seen corresponding path program 1 times [2019-11-15 21:38:22,224 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:22,225 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1258340507] [2019-11-15 21:38:22,225 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:22,225 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:22,225 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:22,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:22,361 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:22,361 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1258340507] [2019-11-15 21:38:22,362 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:22,362 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:38:22,362 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [348162566] [2019-11-15 21:38:22,362 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:38:22,363 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:22,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:38:22,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:38:22,363 INFO L87 Difference]: Start difference. First operand 33061 states and 123952 transitions. Second operand 5 states. [2019-11-15 21:38:23,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:23,421 INFO L93 Difference]: Finished difference Result 40213 states and 148621 transitions. [2019-11-15 21:38:23,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:38:23,421 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2019-11-15 21:38:23,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:23,564 INFO L225 Difference]: With dead ends: 40213 [2019-11-15 21:38:23,565 INFO L226 Difference]: Without dead ends: 40053 [2019-11-15 21:38:23,565 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:38:23,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40053 states. [2019-11-15 21:38:24,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40053 to 34634. [2019-11-15 21:38:24,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34634 states. [2019-11-15 21:38:24,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34634 states to 34634 states and 129248 transitions. [2019-11-15 21:38:24,513 INFO L78 Accepts]: Start accepts. Automaton has 34634 states and 129248 transitions. Word has length 46 [2019-11-15 21:38:24,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:24,513 INFO L462 AbstractCegarLoop]: Abstraction has 34634 states and 129248 transitions. [2019-11-15 21:38:24,513 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:38:24,514 INFO L276 IsEmpty]: Start isEmpty. Operand 34634 states and 129248 transitions. [2019-11-15 21:38:24,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-15 21:38:24,525 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:24,525 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:24,525 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:24,526 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:24,526 INFO L82 PathProgramCache]: Analyzing trace with hash 1370736382, now seen corresponding path program 1 times [2019-11-15 21:38:24,526 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:24,526 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [838012665] [2019-11-15 21:38:24,527 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:24,527 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:24,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:24,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:25,069 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:25,069 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [838012665] [2019-11-15 21:38:25,070 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:25,070 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:38:25,070 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2095394075] [2019-11-15 21:38:25,070 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:38:25,071 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:25,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:38:25,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:38:25,071 INFO L87 Difference]: Start difference. First operand 34634 states and 129248 transitions. Second operand 6 states. [2019-11-15 21:38:26,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:26,053 INFO L93 Difference]: Finished difference Result 45662 states and 166142 transitions. [2019-11-15 21:38:26,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 21:38:26,053 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-11-15 21:38:26,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:26,180 INFO L225 Difference]: With dead ends: 45662 [2019-11-15 21:38:26,180 INFO L226 Difference]: Without dead ends: 45518 [2019-11-15 21:38:26,183 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 21:38:26,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45518 states. [2019-11-15 21:38:26,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45518 to 33597. [2019-11-15 21:38:26,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33597 states. [2019-11-15 21:38:27,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33597 states to 33597 states and 125403 transitions. [2019-11-15 21:38:27,046 INFO L78 Accepts]: Start accepts. Automaton has 33597 states and 125403 transitions. Word has length 53 [2019-11-15 21:38:27,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:27,046 INFO L462 AbstractCegarLoop]: Abstraction has 33597 states and 125403 transitions. [2019-11-15 21:38:27,046 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:38:27,046 INFO L276 IsEmpty]: Start isEmpty. Operand 33597 states and 125403 transitions. [2019-11-15 21:38:27,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-15 21:38:27,082 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:27,082 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:27,082 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:27,083 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:27,084 INFO L82 PathProgramCache]: Analyzing trace with hash 743761970, now seen corresponding path program 1 times [2019-11-15 21:38:27,084 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:27,085 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159592712] [2019-11-15 21:38:27,086 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:27,086 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:27,086 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:27,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:27,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:27,231 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159592712] [2019-11-15 21:38:27,231 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:27,232 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:38:27,232 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1406478019] [2019-11-15 21:38:27,232 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:38:27,232 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:27,233 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:38:27,233 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:38:27,233 INFO L87 Difference]: Start difference. First operand 33597 states and 125403 transitions. Second operand 6 states. [2019-11-15 21:38:28,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:28,257 INFO L93 Difference]: Finished difference Result 46069 states and 167836 transitions. [2019-11-15 21:38:28,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 21:38:28,258 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-11-15 21:38:28,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:28,343 INFO L225 Difference]: With dead ends: 46069 [2019-11-15 21:38:28,343 INFO L226 Difference]: Without dead ends: 45829 [2019-11-15 21:38:28,343 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 21:38:28,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45829 states. [2019-11-15 21:38:28,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45829 to 39958. [2019-11-15 21:38:28,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39958 states. [2019-11-15 21:38:29,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39958 states to 39958 states and 147327 transitions. [2019-11-15 21:38:29,073 INFO L78 Accepts]: Start accepts. Automaton has 39958 states and 147327 transitions. Word has length 60 [2019-11-15 21:38:29,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:29,074 INFO L462 AbstractCegarLoop]: Abstraction has 39958 states and 147327 transitions. [2019-11-15 21:38:29,074 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:38:29,074 INFO L276 IsEmpty]: Start isEmpty. Operand 39958 states and 147327 transitions. [2019-11-15 21:38:29,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-11-15 21:38:29,107 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:29,107 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:29,107 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:29,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:29,108 INFO L82 PathProgramCache]: Analyzing trace with hash -1264518078, now seen corresponding path program 1 times [2019-11-15 21:38:29,108 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:29,108 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2050774982] [2019-11-15 21:38:29,108 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:29,108 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:29,108 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:29,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:29,146 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:29,146 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2050774982] [2019-11-15 21:38:29,146 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:29,146 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:38:29,147 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [744446103] [2019-11-15 21:38:29,149 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:38:29,149 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:29,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:38:29,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:38:29,150 INFO L87 Difference]: Start difference. First operand 39958 states and 147327 transitions. Second operand 3 states. [2019-11-15 21:38:29,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:29,415 INFO L93 Difference]: Finished difference Result 50256 states and 182162 transitions. [2019-11-15 21:38:29,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:38:29,415 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 62 [2019-11-15 21:38:29,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:29,510 INFO L225 Difference]: With dead ends: 50256 [2019-11-15 21:38:29,510 INFO L226 Difference]: Without dead ends: 50256 [2019-11-15 21:38:29,510 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:38:29,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50256 states. [2019-11-15 21:38:30,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50256 to 43888. [2019-11-15 21:38:30,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43888 states. [2019-11-15 21:38:30,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43888 states to 43888 states and 160765 transitions. [2019-11-15 21:38:30,664 INFO L78 Accepts]: Start accepts. Automaton has 43888 states and 160765 transitions. Word has length 62 [2019-11-15 21:38:30,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:30,664 INFO L462 AbstractCegarLoop]: Abstraction has 43888 states and 160765 transitions. [2019-11-15 21:38:30,664 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:38:30,664 INFO L276 IsEmpty]: Start isEmpty. Operand 43888 states and 160765 transitions. [2019-11-15 21:38:30,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 21:38:30,696 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:30,696 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:30,697 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:30,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:30,697 INFO L82 PathProgramCache]: Analyzing trace with hash -1180013829, now seen corresponding path program 1 times [2019-11-15 21:38:30,697 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:30,697 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [268962680] [2019-11-15 21:38:30,697 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:30,697 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:30,697 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:30,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:30,778 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:30,778 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [268962680] [2019-11-15 21:38:30,779 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:30,779 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:38:30,779 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [569853559] [2019-11-15 21:38:30,779 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:38:30,780 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:30,780 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:38:30,780 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:38:30,780 INFO L87 Difference]: Start difference. First operand 43888 states and 160765 transitions. Second operand 7 states. [2019-11-15 21:38:31,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:31,588 INFO L93 Difference]: Finished difference Result 55884 states and 200499 transitions. [2019-11-15 21:38:31,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 21:38:31,589 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-11-15 21:38:31,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:31,702 INFO L225 Difference]: With dead ends: 55884 [2019-11-15 21:38:31,702 INFO L226 Difference]: Without dead ends: 55644 [2019-11-15 21:38:31,702 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-15 21:38:31,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55644 states. [2019-11-15 21:38:32,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55644 to 45114. [2019-11-15 21:38:32,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45114 states. [2019-11-15 21:38:33,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45114 states to 45114 states and 164932 transitions. [2019-11-15 21:38:33,321 INFO L78 Accepts]: Start accepts. Automaton has 45114 states and 164932 transitions. Word has length 66 [2019-11-15 21:38:33,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:33,321 INFO L462 AbstractCegarLoop]: Abstraction has 45114 states and 164932 transitions. [2019-11-15 21:38:33,321 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:38:33,321 INFO L276 IsEmpty]: Start isEmpty. Operand 45114 states and 164932 transitions. [2019-11-15 21:38:33,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-11-15 21:38:33,357 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:33,358 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:33,358 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:33,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:33,358 INFO L82 PathProgramCache]: Analyzing trace with hash 709003821, now seen corresponding path program 1 times [2019-11-15 21:38:33,359 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:33,359 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1789404329] [2019-11-15 21:38:33,359 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:33,359 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:33,359 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:33,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:33,443 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:33,444 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1789404329] [2019-11-15 21:38:33,444 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:33,444 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:38:33,444 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1185580850] [2019-11-15 21:38:33,445 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:38:33,445 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:33,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:38:33,445 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:38:33,446 INFO L87 Difference]: Start difference. First operand 45114 states and 164932 transitions. Second operand 7 states. [2019-11-15 21:38:34,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:34,578 INFO L93 Difference]: Finished difference Result 55098 states and 197676 transitions. [2019-11-15 21:38:34,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 21:38:34,579 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-11-15 21:38:34,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:34,704 INFO L225 Difference]: With dead ends: 55098 [2019-11-15 21:38:34,704 INFO L226 Difference]: Without dead ends: 54898 [2019-11-15 21:38:34,705 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-15 21:38:34,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54898 states. [2019-11-15 21:38:35,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54898 to 45992. [2019-11-15 21:38:35,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45992 states. [2019-11-15 21:38:35,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45992 states to 45992 states and 167803 transitions. [2019-11-15 21:38:35,681 INFO L78 Accepts]: Start accepts. Automaton has 45992 states and 167803 transitions. Word has length 67 [2019-11-15 21:38:35,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:35,681 INFO L462 AbstractCegarLoop]: Abstraction has 45992 states and 167803 transitions. [2019-11-15 21:38:35,682 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:38:35,682 INFO L276 IsEmpty]: Start isEmpty. Operand 45992 states and 167803 transitions. [2019-11-15 21:38:35,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 21:38:35,717 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:35,718 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:35,718 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:35,718 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:35,718 INFO L82 PathProgramCache]: Analyzing trace with hash 686474922, now seen corresponding path program 1 times [2019-11-15 21:38:35,718 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:35,719 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [452989346] [2019-11-15 21:38:35,719 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:35,719 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:35,719 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:35,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:35,812 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:35,812 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [452989346] [2019-11-15 21:38:35,813 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:35,813 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:38:35,814 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [831038724] [2019-11-15 21:38:35,814 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:38:35,814 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:35,814 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:38:35,815 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:38:35,815 INFO L87 Difference]: Start difference. First operand 45992 states and 167803 transitions. Second operand 3 states. [2019-11-15 21:38:36,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:36,346 INFO L93 Difference]: Finished difference Result 61486 states and 224137 transitions. [2019-11-15 21:38:36,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:38:36,347 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-11-15 21:38:36,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:36,540 INFO L225 Difference]: With dead ends: 61486 [2019-11-15 21:38:36,540 INFO L226 Difference]: Without dead ends: 61486 [2019-11-15 21:38:36,540 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:38:37,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61486 states. [2019-11-15 21:38:38,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61486 to 53433. [2019-11-15 21:38:38,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53433 states. [2019-11-15 21:38:38,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53433 states to 53433 states and 195616 transitions. [2019-11-15 21:38:38,429 INFO L78 Accepts]: Start accepts. Automaton has 53433 states and 195616 transitions. Word has length 69 [2019-11-15 21:38:38,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:38,429 INFO L462 AbstractCegarLoop]: Abstraction has 53433 states and 195616 transitions. [2019-11-15 21:38:38,429 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:38:38,430 INFO L276 IsEmpty]: Start isEmpty. Operand 53433 states and 195616 transitions. [2019-11-15 21:38:38,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 21:38:38,480 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:38,480 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:38,481 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:38,481 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:38,481 INFO L82 PathProgramCache]: Analyzing trace with hash -2083836118, now seen corresponding path program 1 times [2019-11-15 21:38:38,481 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:38,482 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2121036680] [2019-11-15 21:38:38,482 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:38,482 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:38,482 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:38,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:38,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:38,635 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2121036680] [2019-11-15 21:38:38,636 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:38,636 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:38:38,636 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1072338960] [2019-11-15 21:38:38,637 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:38:38,637 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:38,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:38:38,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:38:38,638 INFO L87 Difference]: Start difference. First operand 53433 states and 195616 transitions. Second operand 6 states. [2019-11-15 21:38:39,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:39,533 INFO L93 Difference]: Finished difference Result 65982 states and 238830 transitions. [2019-11-15 21:38:39,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:38:39,534 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 69 [2019-11-15 21:38:39,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:39,685 INFO L225 Difference]: With dead ends: 65982 [2019-11-15 21:38:39,685 INFO L226 Difference]: Without dead ends: 65338 [2019-11-15 21:38:39,685 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:38:40,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65338 states. [2019-11-15 21:38:40,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65338 to 56042. [2019-11-15 21:38:40,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56042 states. [2019-11-15 21:38:40,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56042 states to 56042 states and 204333 transitions. [2019-11-15 21:38:40,958 INFO L78 Accepts]: Start accepts. Automaton has 56042 states and 204333 transitions. Word has length 69 [2019-11-15 21:38:40,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:40,958 INFO L462 AbstractCegarLoop]: Abstraction has 56042 states and 204333 transitions. [2019-11-15 21:38:40,958 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:38:40,958 INFO L276 IsEmpty]: Start isEmpty. Operand 56042 states and 204333 transitions. [2019-11-15 21:38:41,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 21:38:41,017 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:41,017 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:41,017 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:41,017 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:41,017 INFO L82 PathProgramCache]: Analyzing trace with hash -1122222101, now seen corresponding path program 1 times [2019-11-15 21:38:41,017 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:41,018 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1049109599] [2019-11-15 21:38:41,018 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:41,018 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:41,018 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:41,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:41,170 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:41,171 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1049109599] [2019-11-15 21:38:41,171 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:41,171 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:38:41,171 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [897774307] [2019-11-15 21:38:41,171 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:38:41,171 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:41,172 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:38:41,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:38:41,172 INFO L87 Difference]: Start difference. First operand 56042 states and 204333 transitions. Second operand 7 states. [2019-11-15 21:38:42,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:42,924 INFO L93 Difference]: Finished difference Result 83030 states and 292761 transitions. [2019-11-15 21:38:42,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 21:38:42,925 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 69 [2019-11-15 21:38:42,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:43,108 INFO L225 Difference]: With dead ends: 83030 [2019-11-15 21:38:43,109 INFO L226 Difference]: Without dead ends: 83030 [2019-11-15 21:38:43,109 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:38:43,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83030 states. [2019-11-15 21:38:44,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83030 to 76079. [2019-11-15 21:38:44,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76079 states. [2019-11-15 21:38:44,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76079 states to 76079 states and 270628 transitions. [2019-11-15 21:38:44,661 INFO L78 Accepts]: Start accepts. Automaton has 76079 states and 270628 transitions. Word has length 69 [2019-11-15 21:38:44,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:44,662 INFO L462 AbstractCegarLoop]: Abstraction has 76079 states and 270628 transitions. [2019-11-15 21:38:44,662 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:38:44,662 INFO L276 IsEmpty]: Start isEmpty. Operand 76079 states and 270628 transitions. [2019-11-15 21:38:44,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 21:38:44,727 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:44,728 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:44,728 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:44,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:44,728 INFO L82 PathProgramCache]: Analyzing trace with hash 122542380, now seen corresponding path program 1 times [2019-11-15 21:38:44,728 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:44,728 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1539342605] [2019-11-15 21:38:44,729 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:44,729 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:44,729 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:44,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:44,824 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:44,825 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1539342605] [2019-11-15 21:38:44,825 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:44,825 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:38:44,826 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [448325230] [2019-11-15 21:38:44,826 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:38:44,826 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:44,827 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:38:44,827 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:38:44,827 INFO L87 Difference]: Start difference. First operand 76079 states and 270628 transitions. Second operand 4 states. [2019-11-15 21:38:44,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:44,938 INFO L93 Difference]: Finished difference Result 17224 states and 54506 transitions. [2019-11-15 21:38:44,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:38:44,939 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 69 [2019-11-15 21:38:44,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:44,969 INFO L225 Difference]: With dead ends: 17224 [2019-11-15 21:38:44,969 INFO L226 Difference]: Without dead ends: 16746 [2019-11-15 21:38:44,970 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:38:45,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16746 states. [2019-11-15 21:38:45,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16746 to 16734. [2019-11-15 21:38:45,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16734 states. [2019-11-15 21:38:45,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16734 states to 16734 states and 53001 transitions. [2019-11-15 21:38:45,218 INFO L78 Accepts]: Start accepts. Automaton has 16734 states and 53001 transitions. Word has length 69 [2019-11-15 21:38:45,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:45,218 INFO L462 AbstractCegarLoop]: Abstraction has 16734 states and 53001 transitions. [2019-11-15 21:38:45,218 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:38:45,219 INFO L276 IsEmpty]: Start isEmpty. Operand 16734 states and 53001 transitions. [2019-11-15 21:38:45,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 21:38:45,231 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:45,231 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:45,231 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:45,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:45,231 INFO L82 PathProgramCache]: Analyzing trace with hash -789423278, now seen corresponding path program 1 times [2019-11-15 21:38:45,232 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:45,232 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [696236797] [2019-11-15 21:38:45,232 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:45,232 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:45,233 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:45,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:45,331 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:45,331 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [696236797] [2019-11-15 21:38:45,331 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:45,331 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:38:45,332 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1255874473] [2019-11-15 21:38:45,332 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:38:45,332 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:45,333 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:38:45,333 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:38:45,333 INFO L87 Difference]: Start difference. First operand 16734 states and 53001 transitions. Second operand 4 states. [2019-11-15 21:38:45,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:45,614 INFO L93 Difference]: Finished difference Result 22098 states and 69082 transitions. [2019-11-15 21:38:45,614 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:38:45,614 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-11-15 21:38:45,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:45,650 INFO L225 Difference]: With dead ends: 22098 [2019-11-15 21:38:45,650 INFO L226 Difference]: Without dead ends: 22098 [2019-11-15 21:38:45,650 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:38:45,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22098 states. [2019-11-15 21:38:45,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22098 to 17610. [2019-11-15 21:38:45,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17610 states. [2019-11-15 21:38:45,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17610 states to 17610 states and 55560 transitions. [2019-11-15 21:38:45,944 INFO L78 Accepts]: Start accepts. Automaton has 17610 states and 55560 transitions. Word has length 79 [2019-11-15 21:38:45,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:45,944 INFO L462 AbstractCegarLoop]: Abstraction has 17610 states and 55560 transitions. [2019-11-15 21:38:45,944 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:38:45,944 INFO L276 IsEmpty]: Start isEmpty. Operand 17610 states and 55560 transitions. [2019-11-15 21:38:45,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 21:38:45,958 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:45,958 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:45,959 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:45,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:45,959 INFO L82 PathProgramCache]: Analyzing trace with hash -1044159823, now seen corresponding path program 1 times [2019-11-15 21:38:45,959 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:45,959 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [424725560] [2019-11-15 21:38:45,959 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:45,960 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:45,960 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:45,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:46,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:46,081 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [424725560] [2019-11-15 21:38:46,082 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:46,082 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:38:46,082 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1136780958] [2019-11-15 21:38:46,083 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 21:38:46,083 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:46,083 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 21:38:46,083 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:38:46,083 INFO L87 Difference]: Start difference. First operand 17610 states and 55560 transitions. Second operand 8 states. [2019-11-15 21:38:47,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:47,133 INFO L93 Difference]: Finished difference Result 19704 states and 61636 transitions. [2019-11-15 21:38:47,133 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-11-15 21:38:47,133 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 79 [2019-11-15 21:38:47,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:47,164 INFO L225 Difference]: With dead ends: 19704 [2019-11-15 21:38:47,164 INFO L226 Difference]: Without dead ends: 19656 [2019-11-15 21:38:47,165 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=165, Invalid=591, Unknown=0, NotChecked=0, Total=756 [2019-11-15 21:38:47,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19656 states. [2019-11-15 21:38:47,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19656 to 15528. [2019-11-15 21:38:47,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15528 states. [2019-11-15 21:38:47,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15528 states to 15528 states and 49294 transitions. [2019-11-15 21:38:47,655 INFO L78 Accepts]: Start accepts. Automaton has 15528 states and 49294 transitions. Word has length 79 [2019-11-15 21:38:47,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:47,655 INFO L462 AbstractCegarLoop]: Abstraction has 15528 states and 49294 transitions. [2019-11-15 21:38:47,655 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 21:38:47,655 INFO L276 IsEmpty]: Start isEmpty. Operand 15528 states and 49294 transitions. [2019-11-15 21:38:47,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 21:38:47,668 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:47,669 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:47,672 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:47,673 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:47,673 INFO L82 PathProgramCache]: Analyzing trace with hash 705159786, now seen corresponding path program 1 times [2019-11-15 21:38:47,673 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:47,673 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1346386362] [2019-11-15 21:38:47,674 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:47,674 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:47,674 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:47,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:47,732 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:47,733 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1346386362] [2019-11-15 21:38:47,733 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:47,733 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:38:47,733 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1686243657] [2019-11-15 21:38:47,734 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:38:47,734 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:47,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:38:47,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:38:47,735 INFO L87 Difference]: Start difference. First operand 15528 states and 49294 transitions. Second operand 3 states. [2019-11-15 21:38:48,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:48,091 INFO L93 Difference]: Finished difference Result 16792 states and 53007 transitions. [2019-11-15 21:38:48,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:38:48,092 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2019-11-15 21:38:48,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:48,129 INFO L225 Difference]: With dead ends: 16792 [2019-11-15 21:38:48,129 INFO L226 Difference]: Without dead ends: 16792 [2019-11-15 21:38:48,132 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:38:48,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16792 states. [2019-11-15 21:38:48,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16792 to 16144. [2019-11-15 21:38:48,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16144 states. [2019-11-15 21:38:48,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16144 states to 16144 states and 51108 transitions. [2019-11-15 21:38:48,476 INFO L78 Accepts]: Start accepts. Automaton has 16144 states and 51108 transitions. Word has length 80 [2019-11-15 21:38:48,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:48,476 INFO L462 AbstractCegarLoop]: Abstraction has 16144 states and 51108 transitions. [2019-11-15 21:38:48,476 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:38:48,476 INFO L276 IsEmpty]: Start isEmpty. Operand 16144 states and 51108 transitions. [2019-11-15 21:38:48,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:38:48,490 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:48,490 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:48,491 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:48,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:48,491 INFO L82 PathProgramCache]: Analyzing trace with hash -2052355460, now seen corresponding path program 1 times [2019-11-15 21:38:48,491 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:48,491 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134861428] [2019-11-15 21:38:48,492 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:48,492 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:48,492 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:48,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:48,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:48,605 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [134861428] [2019-11-15 21:38:48,610 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:48,611 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:38:48,611 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [98502673] [2019-11-15 21:38:48,611 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:38:48,612 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:48,612 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:38:48,612 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:38:48,616 INFO L87 Difference]: Start difference. First operand 16144 states and 51108 transitions. Second operand 4 states. [2019-11-15 21:38:48,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:48,995 INFO L93 Difference]: Finished difference Result 19272 states and 60154 transitions. [2019-11-15 21:38:48,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:38:48,995 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 81 [2019-11-15 21:38:48,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:49,025 INFO L225 Difference]: With dead ends: 19272 [2019-11-15 21:38:49,025 INFO L226 Difference]: Without dead ends: 19272 [2019-11-15 21:38:49,025 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:38:49,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19272 states. [2019-11-15 21:38:49,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19272 to 18249. [2019-11-15 21:38:49,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18249 states. [2019-11-15 21:38:49,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18249 states to 18249 states and 57270 transitions. [2019-11-15 21:38:49,309 INFO L78 Accepts]: Start accepts. Automaton has 18249 states and 57270 transitions. Word has length 81 [2019-11-15 21:38:49,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:49,309 INFO L462 AbstractCegarLoop]: Abstraction has 18249 states and 57270 transitions. [2019-11-15 21:38:49,310 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:38:49,310 INFO L276 IsEmpty]: Start isEmpty. Operand 18249 states and 57270 transitions. [2019-11-15 21:38:49,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:38:49,329 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:49,329 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:49,329 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:49,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:49,330 INFO L82 PathProgramCache]: Analyzing trace with hash 306951549, now seen corresponding path program 1 times [2019-11-15 21:38:49,330 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:49,330 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020270587] [2019-11-15 21:38:49,330 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:49,330 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:49,330 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:49,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:49,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:49,391 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2020270587] [2019-11-15 21:38:49,391 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:49,391 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:38:49,392 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [583830964] [2019-11-15 21:38:49,392 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:38:49,392 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:49,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:38:49,392 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:38:49,393 INFO L87 Difference]: Start difference. First operand 18249 states and 57270 transitions. Second operand 3 states. [2019-11-15 21:38:49,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:49,665 INFO L93 Difference]: Finished difference Result 19580 states and 61169 transitions. [2019-11-15 21:38:49,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:38:49,665 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 81 [2019-11-15 21:38:49,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:49,695 INFO L225 Difference]: With dead ends: 19580 [2019-11-15 21:38:49,695 INFO L226 Difference]: Without dead ends: 19580 [2019-11-15 21:38:49,696 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:38:49,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19580 states. [2019-11-15 21:38:49,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19580 to 18921. [2019-11-15 21:38:49,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18921 states. [2019-11-15 21:38:49,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18921 states to 18921 states and 59234 transitions. [2019-11-15 21:38:49,983 INFO L78 Accepts]: Start accepts. Automaton has 18921 states and 59234 transitions. Word has length 81 [2019-11-15 21:38:49,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:49,983 INFO L462 AbstractCegarLoop]: Abstraction has 18921 states and 59234 transitions. [2019-11-15 21:38:49,983 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:38:49,983 INFO L276 IsEmpty]: Start isEmpty. Operand 18921 states and 59234 transitions. [2019-11-15 21:38:50,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 21:38:50,001 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:50,002 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:50,002 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:50,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:50,002 INFO L82 PathProgramCache]: Analyzing trace with hash 494100654, now seen corresponding path program 1 times [2019-11-15 21:38:50,002 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:50,002 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1882817250] [2019-11-15 21:38:50,002 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:50,002 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:50,003 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:50,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:50,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:50,070 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1882817250] [2019-11-15 21:38:50,070 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:50,070 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:38:50,071 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [222681967] [2019-11-15 21:38:50,071 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:38:50,071 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:50,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:38:50,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:38:50,072 INFO L87 Difference]: Start difference. First operand 18921 states and 59234 transitions. Second operand 4 states. [2019-11-15 21:38:50,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:50,494 INFO L93 Difference]: Finished difference Result 31886 states and 99190 transitions. [2019-11-15 21:38:50,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:38:50,495 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 82 [2019-11-15 21:38:50,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:50,545 INFO L225 Difference]: With dead ends: 31886 [2019-11-15 21:38:50,545 INFO L226 Difference]: Without dead ends: 31886 [2019-11-15 21:38:50,545 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:38:50,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31886 states. [2019-11-15 21:38:50,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31886 to 17558. [2019-11-15 21:38:50,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17558 states. [2019-11-15 21:38:50,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17558 states to 17558 states and 54308 transitions. [2019-11-15 21:38:50,880 INFO L78 Accepts]: Start accepts. Automaton has 17558 states and 54308 transitions. Word has length 82 [2019-11-15 21:38:50,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:50,881 INFO L462 AbstractCegarLoop]: Abstraction has 17558 states and 54308 transitions. [2019-11-15 21:38:50,881 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:38:50,881 INFO L276 IsEmpty]: Start isEmpty. Operand 17558 states and 54308 transitions. [2019-11-15 21:38:50,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 21:38:50,896 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:50,896 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:50,897 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:50,897 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:50,897 INFO L82 PathProgramCache]: Analyzing trace with hash 823866415, now seen corresponding path program 1 times [2019-11-15 21:38:50,897 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:50,898 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [960746276] [2019-11-15 21:38:50,898 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:50,898 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:50,898 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:50,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:51,012 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:51,012 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [960746276] [2019-11-15 21:38:51,013 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:51,013 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:38:51,013 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [165757920] [2019-11-15 21:38:51,013 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:38:51,013 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:51,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:38:51,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:38:51,014 INFO L87 Difference]: Start difference. First operand 17558 states and 54308 transitions. Second operand 6 states. [2019-11-15 21:38:51,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:51,713 INFO L93 Difference]: Finished difference Result 25982 states and 78626 transitions. [2019-11-15 21:38:51,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 21:38:51,713 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-11-15 21:38:51,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:51,753 INFO L225 Difference]: With dead ends: 25982 [2019-11-15 21:38:51,753 INFO L226 Difference]: Without dead ends: 25676 [2019-11-15 21:38:51,754 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:38:51,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25676 states. [2019-11-15 21:38:52,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25676 to 20546. [2019-11-15 21:38:52,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20546 states. [2019-11-15 21:38:52,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20546 states to 20546 states and 63287 transitions. [2019-11-15 21:38:52,090 INFO L78 Accepts]: Start accepts. Automaton has 20546 states and 63287 transitions. Word has length 82 [2019-11-15 21:38:52,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:52,091 INFO L462 AbstractCegarLoop]: Abstraction has 20546 states and 63287 transitions. [2019-11-15 21:38:52,091 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:38:52,091 INFO L276 IsEmpty]: Start isEmpty. Operand 20546 states and 63287 transitions. [2019-11-15 21:38:52,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 21:38:52,108 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:52,109 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:52,109 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:52,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:52,109 INFO L82 PathProgramCache]: Analyzing trace with hash 1785480432, now seen corresponding path program 1 times [2019-11-15 21:38:52,109 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:52,109 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [318484604] [2019-11-15 21:38:52,110 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:52,110 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:52,110 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:52,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:52,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:52,204 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [318484604] [2019-11-15 21:38:52,204 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:52,204 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:38:52,205 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1358376175] [2019-11-15 21:38:52,205 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:38:52,205 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:52,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:38:52,206 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:38:52,206 INFO L87 Difference]: Start difference. First operand 20546 states and 63287 transitions. Second operand 7 states. [2019-11-15 21:38:53,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:53,110 INFO L93 Difference]: Finished difference Result 38183 states and 115440 transitions. [2019-11-15 21:38:53,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-15 21:38:53,111 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 82 [2019-11-15 21:38:53,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:53,169 INFO L225 Difference]: With dead ends: 38183 [2019-11-15 21:38:53,170 INFO L226 Difference]: Without dead ends: 38111 [2019-11-15 21:38:53,170 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=87, Invalid=185, Unknown=0, NotChecked=0, Total=272 [2019-11-15 21:38:53,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38111 states. [2019-11-15 21:38:53,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38111 to 23772. [2019-11-15 21:38:53,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23772 states. [2019-11-15 21:38:53,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23772 states to 23772 states and 73008 transitions. [2019-11-15 21:38:53,592 INFO L78 Accepts]: Start accepts. Automaton has 23772 states and 73008 transitions. Word has length 82 [2019-11-15 21:38:53,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:53,592 INFO L462 AbstractCegarLoop]: Abstraction has 23772 states and 73008 transitions. [2019-11-15 21:38:53,592 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:38:53,592 INFO L276 IsEmpty]: Start isEmpty. Operand 23772 states and 73008 transitions. [2019-11-15 21:38:53,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 21:38:53,612 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:53,612 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:53,612 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:53,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:53,613 INFO L82 PathProgramCache]: Analyzing trace with hash -1264722383, now seen corresponding path program 1 times [2019-11-15 21:38:53,613 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:53,613 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [957990241] [2019-11-15 21:38:53,613 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:53,613 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:53,613 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:53,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:53,701 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:53,701 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [957990241] [2019-11-15 21:38:53,701 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:53,701 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:38:53,702 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [261059595] [2019-11-15 21:38:53,702 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:38:53,702 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:53,702 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:38:53,703 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:38:53,703 INFO L87 Difference]: Start difference. First operand 23772 states and 73008 transitions. Second operand 6 states. [2019-11-15 21:38:54,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:54,318 INFO L93 Difference]: Finished difference Result 36182 states and 111020 transitions. [2019-11-15 21:38:54,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:38:54,318 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-11-15 21:38:54,319 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:54,406 INFO L225 Difference]: With dead ends: 36182 [2019-11-15 21:38:54,406 INFO L226 Difference]: Without dead ends: 36182 [2019-11-15 21:38:54,407 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:38:54,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36182 states. [2019-11-15 21:38:54,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36182 to 23483. [2019-11-15 21:38:54,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23483 states. [2019-11-15 21:38:54,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23483 states to 23483 states and 71652 transitions. [2019-11-15 21:38:54,885 INFO L78 Accepts]: Start accepts. Automaton has 23483 states and 71652 transitions. Word has length 82 [2019-11-15 21:38:54,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:54,885 INFO L462 AbstractCegarLoop]: Abstraction has 23483 states and 71652 transitions. [2019-11-15 21:38:54,885 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:38:54,885 INFO L276 IsEmpty]: Start isEmpty. Operand 23483 states and 71652 transitions. [2019-11-15 21:38:54,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 21:38:54,904 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:54,905 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:54,905 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:54,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:54,905 INFO L82 PathProgramCache]: Analyzing trace with hash -784005967, now seen corresponding path program 1 times [2019-11-15 21:38:54,906 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:54,906 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665412861] [2019-11-15 21:38:54,906 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:54,906 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:54,906 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:54,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:54,994 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:54,995 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1665412861] [2019-11-15 21:38:54,995 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:54,995 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:38:54,996 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [453569587] [2019-11-15 21:38:54,996 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:38:54,996 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:54,996 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:38:54,997 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:38:54,997 INFO L87 Difference]: Start difference. First operand 23483 states and 71652 transitions. Second operand 7 states. [2019-11-15 21:38:55,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:55,867 INFO L93 Difference]: Finished difference Result 29663 states and 88861 transitions. [2019-11-15 21:38:55,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 21:38:55,868 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 82 [2019-11-15 21:38:55,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:55,936 INFO L225 Difference]: With dead ends: 29663 [2019-11-15 21:38:55,936 INFO L226 Difference]: Without dead ends: 29663 [2019-11-15 21:38:55,938 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:38:56,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29663 states. [2019-11-15 21:38:56,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29663 to 25526. [2019-11-15 21:38:56,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25526 states. [2019-11-15 21:38:56,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25526 states to 25526 states and 77703 transitions. [2019-11-15 21:38:56,655 INFO L78 Accepts]: Start accepts. Automaton has 25526 states and 77703 transitions. Word has length 82 [2019-11-15 21:38:56,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:56,656 INFO L462 AbstractCegarLoop]: Abstraction has 25526 states and 77703 transitions. [2019-11-15 21:38:56,656 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:38:56,656 INFO L276 IsEmpty]: Start isEmpty. Operand 25526 states and 77703 transitions. [2019-11-15 21:38:56,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 21:38:56,677 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:56,677 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:56,678 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:56,678 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:56,678 INFO L82 PathProgramCache]: Analyzing trace with hash 460758514, now seen corresponding path program 1 times [2019-11-15 21:38:56,678 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:56,678 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1593273169] [2019-11-15 21:38:56,678 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:56,678 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:56,678 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:56,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:56,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:56,797 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1593273169] [2019-11-15 21:38:56,798 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:56,798 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:38:56,798 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1169214029] [2019-11-15 21:38:56,798 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:38:56,799 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:56,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:38:56,799 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:38:56,799 INFO L87 Difference]: Start difference. First operand 25526 states and 77703 transitions. Second operand 6 states. [2019-11-15 21:38:57,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:57,129 INFO L93 Difference]: Finished difference Result 25908 states and 78691 transitions. [2019-11-15 21:38:57,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:38:57,130 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-11-15 21:38:57,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:57,179 INFO L225 Difference]: With dead ends: 25908 [2019-11-15 21:38:57,179 INFO L226 Difference]: Without dead ends: 25908 [2019-11-15 21:38:57,179 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:38:57,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25908 states. [2019-11-15 21:38:57,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25908 to 25743. [2019-11-15 21:38:57,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25743 states. [2019-11-15 21:38:57,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25743 states to 25743 states and 78263 transitions. [2019-11-15 21:38:57,599 INFO L78 Accepts]: Start accepts. Automaton has 25743 states and 78263 transitions. Word has length 82 [2019-11-15 21:38:57,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:57,600 INFO L462 AbstractCegarLoop]: Abstraction has 25743 states and 78263 transitions. [2019-11-15 21:38:57,600 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:38:57,600 INFO L276 IsEmpty]: Start isEmpty. Operand 25743 states and 78263 transitions. [2019-11-15 21:38:57,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 21:38:57,624 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:57,625 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:57,625 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:57,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:57,626 INFO L82 PathProgramCache]: Analyzing trace with hash -98817168, now seen corresponding path program 1 times [2019-11-15 21:38:57,626 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:57,627 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [969951758] [2019-11-15 21:38:57,627 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:57,627 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:57,627 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:57,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:57,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:57,776 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [969951758] [2019-11-15 21:38:57,776 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:57,776 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:38:57,776 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [586326737] [2019-11-15 21:38:57,777 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:38:57,777 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:57,778 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:38:57,778 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:38:57,778 INFO L87 Difference]: Start difference. First operand 25743 states and 78263 transitions. Second operand 6 states. [2019-11-15 21:38:58,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:58,597 INFO L93 Difference]: Finished difference Result 38640 states and 116558 transitions. [2019-11-15 21:38:58,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:38:58,597 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-11-15 21:38:58,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:58,674 INFO L225 Difference]: With dead ends: 38640 [2019-11-15 21:38:58,674 INFO L226 Difference]: Without dead ends: 38640 [2019-11-15 21:38:58,676 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:38:58,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38640 states. [2019-11-15 21:38:59,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38640 to 27789. [2019-11-15 21:38:59,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27789 states. [2019-11-15 21:38:59,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27789 states to 27789 states and 84319 transitions. [2019-11-15 21:38:59,270 INFO L78 Accepts]: Start accepts. Automaton has 27789 states and 84319 transitions. Word has length 82 [2019-11-15 21:38:59,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:38:59,270 INFO L462 AbstractCegarLoop]: Abstraction has 27789 states and 84319 transitions. [2019-11-15 21:38:59,270 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:38:59,270 INFO L276 IsEmpty]: Start isEmpty. Operand 27789 states and 84319 transitions. [2019-11-15 21:38:59,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 21:38:59,293 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:38:59,293 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:38:59,294 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:38:59,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:38:59,294 INFO L82 PathProgramCache]: Analyzing trace with hash 1145947313, now seen corresponding path program 1 times [2019-11-15 21:38:59,294 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:38:59,294 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [524513055] [2019-11-15 21:38:59,294 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:59,294 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:38:59,295 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:38:59,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:38:59,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:38:59,426 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [524513055] [2019-11-15 21:38:59,426 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:38:59,427 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:38:59,427 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1325975972] [2019-11-15 21:38:59,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:38:59,427 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:38:59,428 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:38:59,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:38:59,428 INFO L87 Difference]: Start difference. First operand 27789 states and 84319 transitions. Second operand 5 states. [2019-11-15 21:38:59,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:38:59,797 INFO L93 Difference]: Finished difference Result 27720 states and 84081 transitions. [2019-11-15 21:38:59,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:38:59,797 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2019-11-15 21:38:59,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:38:59,857 INFO L225 Difference]: With dead ends: 27720 [2019-11-15 21:38:59,857 INFO L226 Difference]: Without dead ends: 27720 [2019-11-15 21:38:59,857 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:38:59,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27720 states. [2019-11-15 21:39:00,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27720 to 27681. [2019-11-15 21:39:00,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27681 states. [2019-11-15 21:39:00,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27681 states to 27681 states and 83977 transitions. [2019-11-15 21:39:00,328 INFO L78 Accepts]: Start accepts. Automaton has 27681 states and 83977 transitions. Word has length 82 [2019-11-15 21:39:00,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:39:00,328 INFO L462 AbstractCegarLoop]: Abstraction has 27681 states and 83977 transitions. [2019-11-15 21:39:00,328 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:39:00,328 INFO L276 IsEmpty]: Start isEmpty. Operand 27681 states and 83977 transitions. [2019-11-15 21:39:00,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 21:39:00,355 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:39:00,355 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:39:00,355 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:39:00,355 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:39:00,355 INFO L82 PathProgramCache]: Analyzing trace with hash 2107561330, now seen corresponding path program 1 times [2019-11-15 21:39:00,355 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:39:00,355 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [649657075] [2019-11-15 21:39:00,356 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:00,356 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:00,356 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:39:00,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:39:00,432 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:39:00,432 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [649657075] [2019-11-15 21:39:00,432 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:39:00,433 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:39:00,433 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1727513949] [2019-11-15 21:39:00,433 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:39:00,433 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:39:00,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:39:00,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:39:00,434 INFO L87 Difference]: Start difference. First operand 27681 states and 83977 transitions. Second operand 5 states. [2019-11-15 21:39:00,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:39:00,485 INFO L93 Difference]: Finished difference Result 3651 states and 8917 transitions. [2019-11-15 21:39:00,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:39:00,486 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2019-11-15 21:39:00,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:39:00,490 INFO L225 Difference]: With dead ends: 3651 [2019-11-15 21:39:00,490 INFO L226 Difference]: Without dead ends: 3075 [2019-11-15 21:39:00,491 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:39:00,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3075 states. [2019-11-15 21:39:00,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3075 to 2687. [2019-11-15 21:39:00,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2687 states. [2019-11-15 21:39:00,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2687 states to 2687 states and 6553 transitions. [2019-11-15 21:39:00,534 INFO L78 Accepts]: Start accepts. Automaton has 2687 states and 6553 transitions. Word has length 82 [2019-11-15 21:39:00,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:39:00,534 INFO L462 AbstractCegarLoop]: Abstraction has 2687 states and 6553 transitions. [2019-11-15 21:39:00,534 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:39:00,534 INFO L276 IsEmpty]: Start isEmpty. Operand 2687 states and 6553 transitions. [2019-11-15 21:39:00,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 21:39:00,538 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:39:00,538 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:39:00,539 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:39:00,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:39:00,539 INFO L82 PathProgramCache]: Analyzing trace with hash -1234975873, now seen corresponding path program 1 times [2019-11-15 21:39:00,539 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:39:00,540 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [276414864] [2019-11-15 21:39:00,540 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:00,540 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:00,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:39:00,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:39:00,702 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:39:00,703 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [276414864] [2019-11-15 21:39:00,703 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:39:00,703 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:39:00,703 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [659618697] [2019-11-15 21:39:00,704 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:39:00,704 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:39:00,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:39:00,705 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:39:00,705 INFO L87 Difference]: Start difference. First operand 2687 states and 6553 transitions. Second operand 7 states. [2019-11-15 21:39:01,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:39:01,018 INFO L93 Difference]: Finished difference Result 3064 states and 7403 transitions. [2019-11-15 21:39:01,018 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:39:01,019 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-11-15 21:39:01,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:39:01,021 INFO L225 Difference]: With dead ends: 3064 [2019-11-15 21:39:01,021 INFO L226 Difference]: Without dead ends: 3046 [2019-11-15 21:39:01,022 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:39:01,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3046 states. [2019-11-15 21:39:01,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3046 to 2593. [2019-11-15 21:39:01,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2593 states. [2019-11-15 21:39:01,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2593 states to 2593 states and 6285 transitions. [2019-11-15 21:39:01,051 INFO L78 Accepts]: Start accepts. Automaton has 2593 states and 6285 transitions. Word has length 94 [2019-11-15 21:39:01,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:39:01,051 INFO L462 AbstractCegarLoop]: Abstraction has 2593 states and 6285 transitions. [2019-11-15 21:39:01,051 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:39:01,051 INFO L276 IsEmpty]: Start isEmpty. Operand 2593 states and 6285 transitions. [2019-11-15 21:39:01,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 21:39:01,054 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:39:01,054 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:39:01,054 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:39:01,054 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:39:01,054 INFO L82 PathProgramCache]: Analyzing trace with hash 1906838837, now seen corresponding path program 1 times [2019-11-15 21:39:01,055 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:39:01,055 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1360522539] [2019-11-15 21:39:01,055 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:01,055 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:01,055 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:39:01,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:39:01,190 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:39:01,190 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1360522539] [2019-11-15 21:39:01,191 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:39:01,191 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:39:01,191 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [477532208] [2019-11-15 21:39:01,192 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:39:01,192 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:39:01,192 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:39:01,192 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:39:01,192 INFO L87 Difference]: Start difference. First operand 2593 states and 6285 transitions. Second operand 6 states. [2019-11-15 21:39:01,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:39:01,423 INFO L93 Difference]: Finished difference Result 2900 states and 6853 transitions. [2019-11-15 21:39:01,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:39:01,423 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 21:39:01,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:39:01,427 INFO L225 Difference]: With dead ends: 2900 [2019-11-15 21:39:01,428 INFO L226 Difference]: Without dead ends: 2840 [2019-11-15 21:39:01,428 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:39:01,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2840 states. [2019-11-15 21:39:01,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2840 to 2595. [2019-11-15 21:39:01,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2595 states. [2019-11-15 21:39:01,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2595 states to 2595 states and 6252 transitions. [2019-11-15 21:39:01,478 INFO L78 Accepts]: Start accepts. Automaton has 2595 states and 6252 transitions. Word has length 94 [2019-11-15 21:39:01,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:39:01,478 INFO L462 AbstractCegarLoop]: Abstraction has 2595 states and 6252 transitions. [2019-11-15 21:39:01,478 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:39:01,478 INFO L276 IsEmpty]: Start isEmpty. Operand 2595 states and 6252 transitions. [2019-11-15 21:39:01,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 21:39:01,481 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:39:01,482 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:39:01,482 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:39:01,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:39:01,484 INFO L82 PathProgramCache]: Analyzing trace with hash -1263385262, now seen corresponding path program 1 times [2019-11-15 21:39:01,484 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:39:01,485 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [718854942] [2019-11-15 21:39:01,485 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:01,485 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:01,485 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:39:01,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:39:01,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:39:01,595 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [718854942] [2019-11-15 21:39:01,595 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:39:01,595 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:39:01,595 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2079208695] [2019-11-15 21:39:01,596 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:39:01,596 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:39:01,596 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:39:01,597 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:39:01,597 INFO L87 Difference]: Start difference. First operand 2595 states and 6252 transitions. Second operand 6 states. [2019-11-15 21:39:01,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:39:01,953 INFO L93 Difference]: Finished difference Result 4538 states and 11114 transitions. [2019-11-15 21:39:01,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:39:01,953 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 21:39:01,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:39:01,960 INFO L225 Difference]: With dead ends: 4538 [2019-11-15 21:39:01,960 INFO L226 Difference]: Without dead ends: 4538 [2019-11-15 21:39:01,962 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:39:01,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4538 states. [2019-11-15 21:39:02,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4538 to 2613. [2019-11-15 21:39:02,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2613 states. [2019-11-15 21:39:02,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2613 states to 2613 states and 6291 transitions. [2019-11-15 21:39:02,018 INFO L78 Accepts]: Start accepts. Automaton has 2613 states and 6291 transitions. Word has length 94 [2019-11-15 21:39:02,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:39:02,018 INFO L462 AbstractCegarLoop]: Abstraction has 2613 states and 6291 transitions. [2019-11-15 21:39:02,019 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:39:02,019 INFO L276 IsEmpty]: Start isEmpty. Operand 2613 states and 6291 transitions. [2019-11-15 21:39:02,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 21:39:02,022 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:39:02,023 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:39:02,023 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:39:02,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:39:02,023 INFO L82 PathProgramCache]: Analyzing trace with hash 468560367, now seen corresponding path program 1 times [2019-11-15 21:39:02,024 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:39:02,024 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [842418135] [2019-11-15 21:39:02,024 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:02,024 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:02,025 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:39:02,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:39:02,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:39:02,149 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [842418135] [2019-11-15 21:39:02,149 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:39:02,149 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:39:02,149 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1570372719] [2019-11-15 21:39:02,150 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:39:02,150 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:39:02,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:39:02,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:39:02,151 INFO L87 Difference]: Start difference. First operand 2613 states and 6291 transitions. Second operand 7 states. [2019-11-15 21:39:02,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:39:02,695 INFO L93 Difference]: Finished difference Result 3617 states and 8583 transitions. [2019-11-15 21:39:02,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 21:39:02,695 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-11-15 21:39:02,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:39:02,700 INFO L225 Difference]: With dead ends: 3617 [2019-11-15 21:39:02,700 INFO L226 Difference]: Without dead ends: 3581 [2019-11-15 21:39:02,702 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2019-11-15 21:39:02,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3581 states. [2019-11-15 21:39:02,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3581 to 2909. [2019-11-15 21:39:02,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2909 states. [2019-11-15 21:39:02,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2909 states to 2909 states and 6942 transitions. [2019-11-15 21:39:02,749 INFO L78 Accepts]: Start accepts. Automaton has 2909 states and 6942 transitions. Word has length 94 [2019-11-15 21:39:02,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:39:02,750 INFO L462 AbstractCegarLoop]: Abstraction has 2909 states and 6942 transitions. [2019-11-15 21:39:02,750 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:39:02,750 INFO L276 IsEmpty]: Start isEmpty. Operand 2909 states and 6942 transitions. [2019-11-15 21:39:02,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 21:39:02,753 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:39:02,754 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:39:02,755 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:39:02,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:39:02,755 INFO L82 PathProgramCache]: Analyzing trace with hash 1430174384, now seen corresponding path program 1 times [2019-11-15 21:39:02,755 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:39:02,756 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1457505519] [2019-11-15 21:39:02,756 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:02,756 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:02,756 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:39:02,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:39:02,873 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:39:02,873 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1457505519] [2019-11-15 21:39:02,874 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:39:02,874 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:39:02,874 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [922137218] [2019-11-15 21:39:02,874 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 21:39:02,875 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:39:02,875 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 21:39:02,875 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:39:02,875 INFO L87 Difference]: Start difference. First operand 2909 states and 6942 transitions. Second operand 8 states. [2019-11-15 21:39:03,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:39:03,441 INFO L93 Difference]: Finished difference Result 7659 states and 19133 transitions. [2019-11-15 21:39:03,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-11-15 21:39:03,441 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 94 [2019-11-15 21:39:03,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:39:03,451 INFO L225 Difference]: With dead ends: 7659 [2019-11-15 21:39:03,451 INFO L226 Difference]: Without dead ends: 7659 [2019-11-15 21:39:03,451 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=80, Invalid=192, Unknown=0, NotChecked=0, Total=272 [2019-11-15 21:39:03,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7659 states. [2019-11-15 21:39:03,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7659 to 2514. [2019-11-15 21:39:03,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2514 states. [2019-11-15 21:39:03,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2514 states to 2514 states and 5938 transitions. [2019-11-15 21:39:03,527 INFO L78 Accepts]: Start accepts. Automaton has 2514 states and 5938 transitions. Word has length 94 [2019-11-15 21:39:03,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:39:03,528 INFO L462 AbstractCegarLoop]: Abstraction has 2514 states and 5938 transitions. [2019-11-15 21:39:03,528 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 21:39:03,528 INFO L276 IsEmpty]: Start isEmpty. Operand 2514 states and 5938 transitions. [2019-11-15 21:39:03,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 21:39:03,531 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:39:03,531 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:39:03,532 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:39:03,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:39:03,533 INFO L82 PathProgramCache]: Analyzing trace with hash 1910890800, now seen corresponding path program 1 times [2019-11-15 21:39:03,533 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:39:03,535 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356557471] [2019-11-15 21:39:03,535 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:03,536 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:03,536 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:39:03,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:39:03,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:39:03,662 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [356557471] [2019-11-15 21:39:03,662 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:39:03,662 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:39:03,663 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1402330790] [2019-11-15 21:39:03,663 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:39:03,663 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:39:03,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:39:03,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:39:03,664 INFO L87 Difference]: Start difference. First operand 2514 states and 5938 transitions. Second operand 6 states. [2019-11-15 21:39:03,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:39:03,892 INFO L93 Difference]: Finished difference Result 2379 states and 5497 transitions. [2019-11-15 21:39:03,893 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:39:03,893 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 21:39:03,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:39:03,896 INFO L225 Difference]: With dead ends: 2379 [2019-11-15 21:39:03,896 INFO L226 Difference]: Without dead ends: 2379 [2019-11-15 21:39:03,896 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:39:03,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2379 states. [2019-11-15 21:39:03,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2379 to 1773. [2019-11-15 21:39:03,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1773 states. [2019-11-15 21:39:03,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1773 states to 1773 states and 4189 transitions. [2019-11-15 21:39:03,924 INFO L78 Accepts]: Start accepts. Automaton has 1773 states and 4189 transitions. Word has length 94 [2019-11-15 21:39:03,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:39:03,925 INFO L462 AbstractCegarLoop]: Abstraction has 1773 states and 4189 transitions. [2019-11-15 21:39:03,925 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:39:03,925 INFO L276 IsEmpty]: Start isEmpty. Operand 1773 states and 4189 transitions. [2019-11-15 21:39:03,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 21:39:03,927 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:39:03,927 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:39:03,927 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:39:03,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:39:03,928 INFO L82 PathProgramCache]: Analyzing trace with hash 141964428, now seen corresponding path program 1 times [2019-11-15 21:39:03,928 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:39:03,928 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1810893884] [2019-11-15 21:39:03,928 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:03,929 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:03,929 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:39:03,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:39:04,028 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:39:04,029 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1810893884] [2019-11-15 21:39:04,029 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:39:04,029 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:39:04,029 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [914503842] [2019-11-15 21:39:04,030 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:39:04,031 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:39:04,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:39:04,032 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:39:04,032 INFO L87 Difference]: Start difference. First operand 1773 states and 4189 transitions. Second operand 7 states. [2019-11-15 21:39:04,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:39:04,521 INFO L93 Difference]: Finished difference Result 2667 states and 6170 transitions. [2019-11-15 21:39:04,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-15 21:39:04,522 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2019-11-15 21:39:04,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:39:04,525 INFO L225 Difference]: With dead ends: 2667 [2019-11-15 21:39:04,525 INFO L226 Difference]: Without dead ends: 2649 [2019-11-15 21:39:04,526 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2019-11-15 21:39:04,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2649 states. [2019-11-15 21:39:04,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2649 to 2108. [2019-11-15 21:39:04,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2108 states. [2019-11-15 21:39:04,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2108 states to 2108 states and 4959 transitions. [2019-11-15 21:39:04,558 INFO L78 Accepts]: Start accepts. Automaton has 2108 states and 4959 transitions. Word has length 96 [2019-11-15 21:39:04,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:39:04,559 INFO L462 AbstractCegarLoop]: Abstraction has 2108 states and 4959 transitions. [2019-11-15 21:39:04,559 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:39:04,559 INFO L276 IsEmpty]: Start isEmpty. Operand 2108 states and 4959 transitions. [2019-11-15 21:39:04,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 21:39:04,561 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:39:04,562 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:39:04,562 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:39:04,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:39:04,562 INFO L82 PathProgramCache]: Analyzing trace with hash 1386728909, now seen corresponding path program 1 times [2019-11-15 21:39:04,563 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:39:04,563 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [980596973] [2019-11-15 21:39:04,563 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:04,563 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:04,563 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:39:04,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:39:04,682 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:39:04,682 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [980596973] [2019-11-15 21:39:04,682 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:39:04,683 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:39:04,683 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [622098787] [2019-11-15 21:39:04,683 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:39:04,683 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:39:04,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:39:04,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:39:04,684 INFO L87 Difference]: Start difference. First operand 2108 states and 4959 transitions. Second operand 6 states. [2019-11-15 21:39:04,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:39:04,826 INFO L93 Difference]: Finished difference Result 1881 states and 4385 transitions. [2019-11-15 21:39:04,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 21:39:04,827 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-15 21:39:04,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:39:04,828 INFO L225 Difference]: With dead ends: 1881 [2019-11-15 21:39:04,828 INFO L226 Difference]: Without dead ends: 1881 [2019-11-15 21:39:04,829 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:39:04,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1881 states. [2019-11-15 21:39:04,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1881 to 1809. [2019-11-15 21:39:04,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1809 states. [2019-11-15 21:39:04,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1809 states to 1809 states and 4249 transitions. [2019-11-15 21:39:04,845 INFO L78 Accepts]: Start accepts. Automaton has 1809 states and 4249 transitions. Word has length 96 [2019-11-15 21:39:04,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:39:04,845 INFO L462 AbstractCegarLoop]: Abstraction has 1809 states and 4249 transitions. [2019-11-15 21:39:04,845 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:39:04,845 INFO L276 IsEmpty]: Start isEmpty. Operand 1809 states and 4249 transitions. [2019-11-15 21:39:04,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 21:39:04,847 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:39:04,847 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:39:04,847 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:39:04,847 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:39:04,847 INFO L82 PathProgramCache]: Analyzing trace with hash -1793695859, now seen corresponding path program 1 times [2019-11-15 21:39:04,847 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:39:04,847 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1304215030] [2019-11-15 21:39:04,847 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:04,847 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:04,848 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:39:04,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:39:04,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:39:04,929 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1304215030] [2019-11-15 21:39:04,929 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:39:04,929 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:39:04,930 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1172513168] [2019-11-15 21:39:04,930 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:39:04,930 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:39:04,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:39:04,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:39:04,931 INFO L87 Difference]: Start difference. First operand 1809 states and 4249 transitions. Second operand 5 states. [2019-11-15 21:39:05,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:39:05,129 INFO L93 Difference]: Finished difference Result 2061 states and 4828 transitions. [2019-11-15 21:39:05,129 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:39:05,129 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2019-11-15 21:39:05,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:39:05,131 INFO L225 Difference]: With dead ends: 2061 [2019-11-15 21:39:05,131 INFO L226 Difference]: Without dead ends: 2043 [2019-11-15 21:39:05,131 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:39:05,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2043 states. [2019-11-15 21:39:05,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2043 to 1836. [2019-11-15 21:39:05,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1836 states. [2019-11-15 21:39:05,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1836 states to 1836 states and 4303 transitions. [2019-11-15 21:39:05,151 INFO L78 Accepts]: Start accepts. Automaton has 1836 states and 4303 transitions. Word has length 96 [2019-11-15 21:39:05,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:39:05,151 INFO L462 AbstractCegarLoop]: Abstraction has 1836 states and 4303 transitions. [2019-11-15 21:39:05,151 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:39:05,151 INFO L276 IsEmpty]: Start isEmpty. Operand 1836 states and 4303 transitions. [2019-11-15 21:39:05,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 21:39:05,153 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:39:05,153 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:39:05,153 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:39:05,153 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:39:05,153 INFO L82 PathProgramCache]: Analyzing trace with hash -548931378, now seen corresponding path program 1 times [2019-11-15 21:39:05,153 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:39:05,153 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1303724553] [2019-11-15 21:39:05,153 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:05,154 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:05,154 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:39:05,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:39:05,275 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:39:05,275 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1303724553] [2019-11-15 21:39:05,276 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:39:05,276 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:39:05,276 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1704274277] [2019-11-15 21:39:05,276 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 21:39:05,277 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:39:05,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 21:39:05,277 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:39:05,277 INFO L87 Difference]: Start difference. First operand 1836 states and 4303 transitions. Second operand 8 states. [2019-11-15 21:39:05,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:39:05,428 INFO L93 Difference]: Finished difference Result 3027 states and 7191 transitions. [2019-11-15 21:39:05,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 21:39:05,429 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 96 [2019-11-15 21:39:05,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:39:05,430 INFO L225 Difference]: With dead ends: 3027 [2019-11-15 21:39:05,430 INFO L226 Difference]: Without dead ends: 1262 [2019-11-15 21:39:05,430 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-11-15 21:39:05,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1262 states. [2019-11-15 21:39:05,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1262 to 1210. [2019-11-15 21:39:05,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1210 states. [2019-11-15 21:39:05,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1210 states to 1210 states and 2897 transitions. [2019-11-15 21:39:05,441 INFO L78 Accepts]: Start accepts. Automaton has 1210 states and 2897 transitions. Word has length 96 [2019-11-15 21:39:05,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:39:05,442 INFO L462 AbstractCegarLoop]: Abstraction has 1210 states and 2897 transitions. [2019-11-15 21:39:05,442 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 21:39:05,442 INFO L276 IsEmpty]: Start isEmpty. Operand 1210 states and 2897 transitions. [2019-11-15 21:39:05,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 21:39:05,444 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:39:05,444 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:39:05,444 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:39:05,445 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:39:05,445 INFO L82 PathProgramCache]: Analyzing trace with hash 1069439884, now seen corresponding path program 2 times [2019-11-15 21:39:05,445 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:39:05,445 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1934363942] [2019-11-15 21:39:05,445 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:05,446 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:39:05,446 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:39:05,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 21:39:05,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 21:39:05,531 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 21:39:05,531 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 21:39:05,685 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 21:39:05,688 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 09:39:05 BasicIcfg [2019-11-15 21:39:05,689 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 21:39:05,690 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 21:39:05,690 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 21:39:05,690 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 21:39:05,691 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:38:15" (3/4) ... [2019-11-15 21:39:05,693 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 21:39:05,860 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_1b4066e5-4265-4751-a879-b4146e8bd964/bin/uautomizer/witness.graphml [2019-11-15 21:39:05,860 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 21:39:05,862 INFO L168 Benchmark]: Toolchain (without parser) took 52358.84 ms. Allocated memory was 1.0 GB in the beginning and 4.4 GB in the end (delta: 3.3 GB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -124.6 MB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. [2019-11-15 21:39:05,863 INFO L168 Benchmark]: CDTParser took 0.39 ms. Allocated memory is still 1.0 GB. Free memory is still 962.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 21:39:05,863 INFO L168 Benchmark]: CACSL2BoogieTranslator took 761.85 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 136.8 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -162.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-11-15 21:39:05,864 INFO L168 Benchmark]: Boogie Procedure Inliner took 65.52 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-11-15 21:39:05,864 INFO L168 Benchmark]: Boogie Preprocessor took 40.11 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 21:39:05,864 INFO L168 Benchmark]: RCFGBuilder took 804.19 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.5 MB). Peak memory consumption was 49.5 MB. Max. memory is 11.5 GB. [2019-11-15 21:39:05,865 INFO L168 Benchmark]: TraceAbstraction took 50511.06 ms. Allocated memory was 1.2 GB in the beginning and 4.4 GB in the end (delta: 3.2 GB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -98.6 MB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2019-11-15 21:39:05,865 INFO L168 Benchmark]: Witness Printer took 170.97 ms. Allocated memory is still 4.4 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 81.6 MB). Peak memory consumption was 81.6 MB. Max. memory is 11.5 GB. [2019-11-15 21:39:05,867 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.39 ms. Allocated memory is still 1.0 GB. Free memory is still 962.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 761.85 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 136.8 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -162.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 65.52 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 40.11 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 804.19 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.5 MB). Peak memory consumption was 49.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 50511.06 ms. Allocated memory was 1.2 GB in the beginning and 4.4 GB in the end (delta: 3.2 GB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -98.6 MB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. * Witness Printer took 170.97 ms. Allocated memory is still 4.4 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 81.6 MB). Peak memory consumption was 81.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L698] 0 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L699] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L700] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L702] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L703] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L704] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L705] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L706] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L707] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L708] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L709] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L710] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L711] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L712] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L713] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L714] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L715] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L716] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L718] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L720] 0 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L721] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L722] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L788] 0 pthread_t t1091; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L789] FCALL, FORK 0 pthread_create(&t1091, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L790] 0 pthread_t t1092; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L791] FCALL, FORK 0 pthread_create(&t1092, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L746] 2 x$w_buff1 = x$w_buff0 [L747] 2 x$w_buff0 = 2 [L748] 2 x$w_buff1_used = x$w_buff0_used [L749] 2 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L751] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L752] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L753] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L754] 2 x$r_buff0_thd2 = (_Bool)1 [L757] 2 y = 1 [L760] 2 __unbuffered_p1_EAX = y [L763] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L726] 1 z = 1 [L729] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L732] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=1, z=1] [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=1, z=1] [L732] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L733] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L733] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L734] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L766] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L734] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L766] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L767] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L767] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L768] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L768] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L769] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L769] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L770] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L770] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L773] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L735] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L735] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L736] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L736] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L739] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L793] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L798] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L798] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L799] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L799] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L800] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L800] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L801] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L801] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L804] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L805] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L806] 0 x$flush_delayed = weak$$choice2 [L807] 0 x$mem_tmp = x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L808] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L808] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L809] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L809] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L810] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L810] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L811] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L811] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L812] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L812] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L813] EXPR 0 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L813] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L814] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L814] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L815] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L816] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L816] 0 x = x$flush_delayed ? x$mem_tmp : x [L817] 0 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 177 locations, 3 error locations. Result: UNSAFE, OverallTime: 50.4s, OverallIterations: 37, TraceHistogramMax: 1, AutomataDifference: 23.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 10309 SDtfs, 10576 SDslu, 22972 SDs, 0 SdLazy, 10280 SolverSat, 664 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 386 GetRequests, 101 SyntacticMatches, 18 SemanticMatches, 267 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 480 ImplicationChecksByTransitivity, 3.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=76079occurred in iteration=11, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 19.9s AutomataMinimizationTime, 36 MinimizatonAttempts, 157767 StatesRemovedByMinimization, 35 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 2.9s InterpolantComputationTime, 2895 NumberOfCodeBlocks, 2895 NumberOfCodeBlocksAsserted, 37 NumberOfCheckSat, 2763 ConstructedInterpolants, 0 QuantifiedInterpolants, 525597 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 36 InterpolantComputations, 36 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...