./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix041_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_d776a037-b266-438e-ab56-9f1624a10adf/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_d776a037-b266-438e-ab56-9f1624a10adf/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_d776a037-b266-438e-ab56-9f1624a10adf/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_d776a037-b266-438e-ab56-9f1624a10adf/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix041_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_d776a037-b266-438e-ab56-9f1624a10adf/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_d776a037-b266-438e-ab56-9f1624a10adf/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c90aabdcb449858b39f307716d76c9a742b2770a .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 22:30:31,639 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 22:30:31,641 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 22:30:31,658 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 22:30:31,659 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 22:30:31,660 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 22:30:31,663 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 22:30:31,674 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 22:30:31,679 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 22:30:31,683 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 22:30:31,685 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 22:30:31,687 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 22:30:31,687 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 22:30:31,690 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 22:30:31,692 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 22:30:31,693 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 22:30:31,694 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 22:30:31,696 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 22:30:31,699 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 22:30:31,704 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 22:30:31,708 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 22:30:31,711 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 22:30:31,714 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 22:30:31,715 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 22:30:31,719 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 22:30:31,720 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 22:30:31,720 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 22:30:31,722 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 22:30:31,724 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 22:30:31,725 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 22:30:31,726 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 22:30:31,727 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 22:30:31,727 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 22:30:31,728 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 22:30:31,730 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 22:30:31,730 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 22:30:31,732 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 22:30:31,732 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 22:30:31,732 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 22:30:31,733 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 22:30:31,734 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 22:30:31,735 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_d776a037-b266-438e-ab56-9f1624a10adf/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 22:30:31,766 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 22:30:31,779 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 22:30:31,780 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 22:30:31,781 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 22:30:31,781 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 22:30:31,782 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 22:30:31,782 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 22:30:31,782 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 22:30:31,782 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 22:30:31,783 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 22:30:31,783 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 22:30:31,783 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 22:30:31,783 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 22:30:31,784 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 22:30:31,784 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 22:30:31,784 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 22:30:31,784 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 22:30:31,785 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 22:30:31,785 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 22:30:31,785 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 22:30:31,786 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 22:30:31,786 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 22:30:31,786 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 22:30:31,787 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 22:30:31,787 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 22:30:31,787 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 22:30:31,787 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 22:30:31,788 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 22:30:31,788 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_d776a037-b266-438e-ab56-9f1624a10adf/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c90aabdcb449858b39f307716d76c9a742b2770a [2019-11-15 22:30:31,824 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 22:30:31,836 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 22:30:31,840 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 22:30:31,842 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 22:30:31,842 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 22:30:31,843 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_d776a037-b266-438e-ab56-9f1624a10adf/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix041_pso.opt.i [2019-11-15 22:30:31,907 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_d776a037-b266-438e-ab56-9f1624a10adf/bin/uautomizer/data/c6fa3afd0/aa3515e17af246f9af04b1350531c03b/FLAGaf29feed3 [2019-11-15 22:30:32,495 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 22:30:32,496 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_d776a037-b266-438e-ab56-9f1624a10adf/sv-benchmarks/c/pthread-wmm/mix041_pso.opt.i [2019-11-15 22:30:32,521 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_d776a037-b266-438e-ab56-9f1624a10adf/bin/uautomizer/data/c6fa3afd0/aa3515e17af246f9af04b1350531c03b/FLAGaf29feed3 [2019-11-15 22:30:32,799 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_d776a037-b266-438e-ab56-9f1624a10adf/bin/uautomizer/data/c6fa3afd0/aa3515e17af246f9af04b1350531c03b [2019-11-15 22:30:32,801 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 22:30:32,803 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 22:30:32,804 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 22:30:32,804 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 22:30:32,808 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 22:30:32,809 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 10:30:32" (1/1) ... [2019-11-15 22:30:32,812 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5f0c4c28 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:30:32, skipping insertion in model container [2019-11-15 22:30:32,812 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 10:30:32" (1/1) ... [2019-11-15 22:30:32,821 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 22:30:32,884 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 22:30:33,452 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 22:30:33,478 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 22:30:33,556 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 22:30:33,644 INFO L192 MainTranslator]: Completed translation [2019-11-15 22:30:33,645 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:30:33 WrapperNode [2019-11-15 22:30:33,645 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 22:30:33,646 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 22:30:33,647 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 22:30:33,647 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 22:30:33,657 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:30:33" (1/1) ... [2019-11-15 22:30:33,679 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:30:33" (1/1) ... [2019-11-15 22:30:33,727 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 22:30:33,728 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 22:30:33,728 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 22:30:33,728 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 22:30:33,738 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:30:33" (1/1) ... [2019-11-15 22:30:33,738 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:30:33" (1/1) ... [2019-11-15 22:30:33,743 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:30:33" (1/1) ... [2019-11-15 22:30:33,743 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:30:33" (1/1) ... [2019-11-15 22:30:33,754 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:30:33" (1/1) ... [2019-11-15 22:30:33,759 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:30:33" (1/1) ... [2019-11-15 22:30:33,763 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:30:33" (1/1) ... [2019-11-15 22:30:33,769 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 22:30:33,769 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 22:30:33,770 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 22:30:33,770 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 22:30:33,771 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:30:33" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_d776a037-b266-438e-ab56-9f1624a10adf/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 22:30:33,862 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 22:30:33,863 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 22:30:33,863 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 22:30:33,863 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 22:30:33,863 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 22:30:33,864 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 22:30:33,864 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 22:30:33,864 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 22:30:33,864 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 22:30:33,865 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 22:30:33,865 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 22:30:33,867 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 22:30:34,765 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 22:30:34,766 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 22:30:34,767 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 10:30:34 BoogieIcfgContainer [2019-11-15 22:30:34,767 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 22:30:34,768 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 22:30:34,769 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 22:30:34,772 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 22:30:34,773 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 10:30:32" (1/3) ... [2019-11-15 22:30:34,773 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5217aeb5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 10:30:34, skipping insertion in model container [2019-11-15 22:30:34,774 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:30:33" (2/3) ... [2019-11-15 22:30:34,774 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5217aeb5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 10:30:34, skipping insertion in model container [2019-11-15 22:30:34,775 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 10:30:34" (3/3) ... [2019-11-15 22:30:34,777 INFO L109 eAbstractionObserver]: Analyzing ICFG mix041_pso.opt.i [2019-11-15 22:30:34,821 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,821 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,822 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,822 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,822 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,823 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,823 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,823 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,823 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,824 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,824 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,824 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,825 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,825 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,825 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,825 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,826 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,826 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,826 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,827 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,827 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,827 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,828 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,828 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,828 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,828 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,829 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,829 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,829 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,830 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,830 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,831 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,831 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,831 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,831 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,832 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,832 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,832 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,833 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,833 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,833 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,834 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,834 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,834 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,835 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,835 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,835 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,836 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,836 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,836 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,836 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,837 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,837 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,837 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,838 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,838 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,838 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,839 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,839 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,839 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,840 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,840 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,840 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,840 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:30:34,847 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 22:30:34,847 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 22:30:34,857 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 22:30:34,870 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 22:30:34,892 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 22:30:34,892 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 22:30:34,893 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 22:30:34,893 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 22:30:34,893 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 22:30:34,893 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 22:30:34,893 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 22:30:34,893 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 22:30:34,908 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 141 places, 179 transitions [2019-11-15 22:30:36,939 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22495 states. [2019-11-15 22:30:36,942 INFO L276 IsEmpty]: Start isEmpty. Operand 22495 states. [2019-11-15 22:30:36,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-11-15 22:30:36,960 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:30:36,961 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:30:36,964 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:30:36,970 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:30:36,970 INFO L82 PathProgramCache]: Analyzing trace with hash -406661720, now seen corresponding path program 1 times [2019-11-15 22:30:36,980 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:30:36,981 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [354294846] [2019-11-15 22:30:36,982 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:36,982 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:36,982 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:30:37,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:30:37,321 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:30:37,322 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [354294846] [2019-11-15 22:30:37,323 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:30:37,323 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:30:37,324 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1580615387] [2019-11-15 22:30:37,329 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:30:37,329 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:30:37,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:30:37,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:30:37,346 INFO L87 Difference]: Start difference. First operand 22495 states. Second operand 4 states. [2019-11-15 22:30:38,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:30:38,182 INFO L93 Difference]: Finished difference Result 23447 states and 91748 transitions. [2019-11-15 22:30:38,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 22:30:38,185 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2019-11-15 22:30:38,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:30:38,481 INFO L225 Difference]: With dead ends: 23447 [2019-11-15 22:30:38,482 INFO L226 Difference]: Without dead ends: 21271 [2019-11-15 22:30:38,484 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:30:38,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21271 states. [2019-11-15 22:30:39,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21271 to 21271. [2019-11-15 22:30:39,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21271 states. [2019-11-15 22:30:40,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21271 states to 21271 states and 83772 transitions. [2019-11-15 22:30:40,016 INFO L78 Accepts]: Start accepts. Automaton has 21271 states and 83772 transitions. Word has length 38 [2019-11-15 22:30:40,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:30:40,017 INFO L462 AbstractCegarLoop]: Abstraction has 21271 states and 83772 transitions. [2019-11-15 22:30:40,017 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:30:40,018 INFO L276 IsEmpty]: Start isEmpty. Operand 21271 states and 83772 transitions. [2019-11-15 22:30:40,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-15 22:30:40,026 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:30:40,026 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:30:40,027 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:30:40,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:30:40,028 INFO L82 PathProgramCache]: Analyzing trace with hash 1166545859, now seen corresponding path program 1 times [2019-11-15 22:30:40,028 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:30:40,028 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [506849354] [2019-11-15 22:30:40,028 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:40,028 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:40,029 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:30:40,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:30:40,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:30:40,231 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [506849354] [2019-11-15 22:30:40,231 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:30:40,232 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:30:40,232 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [673869001] [2019-11-15 22:30:40,234 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:30:40,235 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:30:40,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:30:40,236 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:30:40,236 INFO L87 Difference]: Start difference. First operand 21271 states and 83772 transitions. Second operand 5 states. [2019-11-15 22:30:41,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:30:41,662 INFO L93 Difference]: Finished difference Result 34705 states and 129064 transitions. [2019-11-15 22:30:41,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 22:30:41,663 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-11-15 22:30:41,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:30:41,839 INFO L225 Difference]: With dead ends: 34705 [2019-11-15 22:30:41,840 INFO L226 Difference]: Without dead ends: 34561 [2019-11-15 22:30:41,841 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:30:42,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34561 states. [2019-11-15 22:30:43,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34561 to 33061. [2019-11-15 22:30:43,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33061 states. [2019-11-15 22:30:43,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33061 states to 33061 states and 123952 transitions. [2019-11-15 22:30:43,362 INFO L78 Accepts]: Start accepts. Automaton has 33061 states and 123952 transitions. Word has length 45 [2019-11-15 22:30:43,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:30:43,363 INFO L462 AbstractCegarLoop]: Abstraction has 33061 states and 123952 transitions. [2019-11-15 22:30:43,363 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:30:43,364 INFO L276 IsEmpty]: Start isEmpty. Operand 33061 states and 123952 transitions. [2019-11-15 22:30:43,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-11-15 22:30:43,372 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:30:43,373 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:30:43,373 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:30:43,373 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:30:43,373 INFO L82 PathProgramCache]: Analyzing trace with hash 56811971, now seen corresponding path program 1 times [2019-11-15 22:30:43,374 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:30:43,374 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [447899830] [2019-11-15 22:30:43,374 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:43,375 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:43,375 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:30:43,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:30:43,469 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:30:43,471 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [447899830] [2019-11-15 22:30:43,471 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:30:43,472 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:30:43,472 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [523056540] [2019-11-15 22:30:43,473 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:30:43,474 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:30:43,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:30:43,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:30:43,475 INFO L87 Difference]: Start difference. First operand 33061 states and 123952 transitions. Second operand 5 states. [2019-11-15 22:30:44,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:30:44,492 INFO L93 Difference]: Finished difference Result 40213 states and 148621 transitions. [2019-11-15 22:30:44,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 22:30:44,493 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2019-11-15 22:30:44,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:30:44,693 INFO L225 Difference]: With dead ends: 40213 [2019-11-15 22:30:44,693 INFO L226 Difference]: Without dead ends: 40053 [2019-11-15 22:30:44,694 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:30:44,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40053 states. [2019-11-15 22:30:45,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40053 to 34634. [2019-11-15 22:30:45,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34634 states. [2019-11-15 22:30:45,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34634 states to 34634 states and 129248 transitions. [2019-11-15 22:30:45,849 INFO L78 Accepts]: Start accepts. Automaton has 34634 states and 129248 transitions. Word has length 46 [2019-11-15 22:30:45,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:30:45,849 INFO L462 AbstractCegarLoop]: Abstraction has 34634 states and 129248 transitions. [2019-11-15 22:30:45,850 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:30:45,850 INFO L276 IsEmpty]: Start isEmpty. Operand 34634 states and 129248 transitions. [2019-11-15 22:30:45,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-15 22:30:45,865 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:30:45,865 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:30:45,866 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:30:45,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:30:45,866 INFO L82 PathProgramCache]: Analyzing trace with hash 37868766, now seen corresponding path program 1 times [2019-11-15 22:30:45,867 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:30:45,867 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1009486994] [2019-11-15 22:30:45,867 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:45,867 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:45,868 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:30:45,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:30:45,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:30:45,998 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1009486994] [2019-11-15 22:30:45,998 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:30:45,998 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:30:45,998 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1783479342] [2019-11-15 22:30:45,999 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:30:45,999 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:30:46,000 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:30:46,000 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:30:46,000 INFO L87 Difference]: Start difference. First operand 34634 states and 129248 transitions. Second operand 6 states. [2019-11-15 22:30:47,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:30:47,752 INFO L93 Difference]: Finished difference Result 45662 states and 166142 transitions. [2019-11-15 22:30:47,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 22:30:47,752 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-11-15 22:30:47,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:30:47,916 INFO L225 Difference]: With dead ends: 45662 [2019-11-15 22:30:47,916 INFO L226 Difference]: Without dead ends: 45518 [2019-11-15 22:30:47,917 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 22:30:48,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45518 states. [2019-11-15 22:30:48,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45518 to 33597. [2019-11-15 22:30:48,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33597 states. [2019-11-15 22:30:48,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33597 states to 33597 states and 125403 transitions. [2019-11-15 22:30:48,897 INFO L78 Accepts]: Start accepts. Automaton has 33597 states and 125403 transitions. Word has length 53 [2019-11-15 22:30:48,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:30:48,898 INFO L462 AbstractCegarLoop]: Abstraction has 33597 states and 125403 transitions. [2019-11-15 22:30:48,898 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:30:48,898 INFO L276 IsEmpty]: Start isEmpty. Operand 33597 states and 125403 transitions. [2019-11-15 22:30:48,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-15 22:30:48,926 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:30:48,926 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:30:48,926 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:30:48,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:30:48,926 INFO L82 PathProgramCache]: Analyzing trace with hash 743761970, now seen corresponding path program 1 times [2019-11-15 22:30:48,927 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:30:48,927 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [782855442] [2019-11-15 22:30:48,927 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:48,927 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:48,927 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:30:48,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:30:49,043 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:30:49,044 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [782855442] [2019-11-15 22:30:49,044 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:30:49,044 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:30:49,044 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [211173494] [2019-11-15 22:30:49,045 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:30:49,045 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:30:49,045 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:30:49,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:30:49,046 INFO L87 Difference]: Start difference. First operand 33597 states and 125403 transitions. Second operand 6 states. [2019-11-15 22:30:50,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:30:50,252 INFO L93 Difference]: Finished difference Result 46069 states and 167836 transitions. [2019-11-15 22:30:50,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 22:30:50,253 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-11-15 22:30:50,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:30:50,358 INFO L225 Difference]: With dead ends: 46069 [2019-11-15 22:30:50,359 INFO L226 Difference]: Without dead ends: 45829 [2019-11-15 22:30:50,359 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 22:30:50,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45829 states. [2019-11-15 22:30:51,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45829 to 39958. [2019-11-15 22:30:51,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39958 states. [2019-11-15 22:30:51,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39958 states to 39958 states and 147327 transitions. [2019-11-15 22:30:51,239 INFO L78 Accepts]: Start accepts. Automaton has 39958 states and 147327 transitions. Word has length 60 [2019-11-15 22:30:51,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:30:51,239 INFO L462 AbstractCegarLoop]: Abstraction has 39958 states and 147327 transitions. [2019-11-15 22:30:51,240 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:30:51,240 INFO L276 IsEmpty]: Start isEmpty. Operand 39958 states and 147327 transitions. [2019-11-15 22:30:51,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-11-15 22:30:51,270 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:30:51,270 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:30:51,270 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:30:51,271 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:30:51,271 INFO L82 PathProgramCache]: Analyzing trace with hash -1264518078, now seen corresponding path program 1 times [2019-11-15 22:30:51,271 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:30:51,271 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1472764618] [2019-11-15 22:30:51,272 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:51,272 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:51,272 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:30:51,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:30:51,369 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:30:51,370 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1472764618] [2019-11-15 22:30:51,371 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:30:51,372 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 22:30:51,372 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1300753292] [2019-11-15 22:30:51,373 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 22:30:51,374 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:30:51,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 22:30:51,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:30:51,375 INFO L87 Difference]: Start difference. First operand 39958 states and 147327 transitions. Second operand 3 states. [2019-11-15 22:30:51,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:30:51,658 INFO L93 Difference]: Finished difference Result 50256 states and 182162 transitions. [2019-11-15 22:30:51,659 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 22:30:51,659 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 62 [2019-11-15 22:30:51,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:30:51,845 INFO L225 Difference]: With dead ends: 50256 [2019-11-15 22:30:51,845 INFO L226 Difference]: Without dead ends: 50256 [2019-11-15 22:30:51,846 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:30:52,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50256 states. [2019-11-15 22:30:53,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50256 to 43888. [2019-11-15 22:30:53,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43888 states. [2019-11-15 22:30:53,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43888 states to 43888 states and 160765 transitions. [2019-11-15 22:30:53,529 INFO L78 Accepts]: Start accepts. Automaton has 43888 states and 160765 transitions. Word has length 62 [2019-11-15 22:30:53,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:30:53,529 INFO L462 AbstractCegarLoop]: Abstraction has 43888 states and 160765 transitions. [2019-11-15 22:30:53,529 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 22:30:53,530 INFO L276 IsEmpty]: Start isEmpty. Operand 43888 states and 160765 transitions. [2019-11-15 22:30:53,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 22:30:53,565 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:30:53,565 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:30:53,565 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:30:53,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:30:53,566 INFO L82 PathProgramCache]: Analyzing trace with hash -1180013829, now seen corresponding path program 1 times [2019-11-15 22:30:53,566 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:30:53,566 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2047500249] [2019-11-15 22:30:53,566 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:53,567 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:53,567 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:30:53,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:30:53,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:30:53,662 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2047500249] [2019-11-15 22:30:53,662 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:30:53,663 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 22:30:53,663 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1614519921] [2019-11-15 22:30:53,663 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 22:30:53,664 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:30:53,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 22:30:53,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:30:53,664 INFO L87 Difference]: Start difference. First operand 43888 states and 160765 transitions. Second operand 7 states. [2019-11-15 22:30:54,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:30:54,807 INFO L93 Difference]: Finished difference Result 55884 states and 200499 transitions. [2019-11-15 22:30:54,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 22:30:54,808 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-11-15 22:30:54,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:30:54,931 INFO L225 Difference]: With dead ends: 55884 [2019-11-15 22:30:54,931 INFO L226 Difference]: Without dead ends: 55644 [2019-11-15 22:30:54,932 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-15 22:30:55,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55644 states. [2019-11-15 22:30:55,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55644 to 45114. [2019-11-15 22:30:55,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45114 states. [2019-11-15 22:30:55,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45114 states to 45114 states and 164932 transitions. [2019-11-15 22:30:55,894 INFO L78 Accepts]: Start accepts. Automaton has 45114 states and 164932 transitions. Word has length 66 [2019-11-15 22:30:55,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:30:55,895 INFO L462 AbstractCegarLoop]: Abstraction has 45114 states and 164932 transitions. [2019-11-15 22:30:55,895 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 22:30:55,895 INFO L276 IsEmpty]: Start isEmpty. Operand 45114 states and 164932 transitions. [2019-11-15 22:30:55,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-11-15 22:30:55,932 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:30:55,932 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:30:55,933 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:30:55,933 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:30:55,933 INFO L82 PathProgramCache]: Analyzing trace with hash -1900883955, now seen corresponding path program 1 times [2019-11-15 22:30:55,933 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:30:55,934 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100000660] [2019-11-15 22:30:55,934 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:55,934 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:55,934 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:30:55,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:30:56,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:30:56,050 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1100000660] [2019-11-15 22:30:56,051 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:30:56,051 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 22:30:56,051 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1703858661] [2019-11-15 22:30:56,052 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 22:30:56,052 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:30:56,052 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 22:30:56,053 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:30:56,053 INFO L87 Difference]: Start difference. First operand 45114 states and 164932 transitions. Second operand 7 states. [2019-11-15 22:30:57,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:30:57,826 INFO L93 Difference]: Finished difference Result 55098 states and 197676 transitions. [2019-11-15 22:30:57,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 22:30:57,826 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-11-15 22:30:57,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:30:57,963 INFO L225 Difference]: With dead ends: 55098 [2019-11-15 22:30:57,963 INFO L226 Difference]: Without dead ends: 54898 [2019-11-15 22:30:57,963 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-15 22:30:58,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54898 states. [2019-11-15 22:30:58,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54898 to 45992. [2019-11-15 22:30:58,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45992 states. [2019-11-15 22:30:59,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45992 states to 45992 states and 167803 transitions. [2019-11-15 22:30:59,055 INFO L78 Accepts]: Start accepts. Automaton has 45992 states and 167803 transitions. Word has length 67 [2019-11-15 22:30:59,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:30:59,056 INFO L462 AbstractCegarLoop]: Abstraction has 45992 states and 167803 transitions. [2019-11-15 22:30:59,056 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 22:30:59,056 INFO L276 IsEmpty]: Start isEmpty. Operand 45992 states and 167803 transitions. [2019-11-15 22:30:59,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 22:30:59,089 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:30:59,089 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:30:59,089 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:30:59,089 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:30:59,090 INFO L82 PathProgramCache]: Analyzing trace with hash 686474922, now seen corresponding path program 1 times [2019-11-15 22:30:59,090 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:30:59,090 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1886483710] [2019-11-15 22:30:59,090 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:59,090 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:30:59,090 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:30:59,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:30:59,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:30:59,148 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1886483710] [2019-11-15 22:30:59,149 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:30:59,149 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 22:30:59,149 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2135455653] [2019-11-15 22:30:59,150 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 22:30:59,150 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:30:59,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 22:30:59,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:30:59,151 INFO L87 Difference]: Start difference. First operand 45992 states and 167803 transitions. Second operand 3 states. [2019-11-15 22:30:59,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:30:59,563 INFO L93 Difference]: Finished difference Result 61486 states and 224137 transitions. [2019-11-15 22:30:59,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 22:30:59,564 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-11-15 22:30:59,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:30:59,698 INFO L225 Difference]: With dead ends: 61486 [2019-11-15 22:30:59,698 INFO L226 Difference]: Without dead ends: 61486 [2019-11-15 22:30:59,699 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:30:59,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61486 states. [2019-11-15 22:31:00,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61486 to 53433. [2019-11-15 22:31:00,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53433 states. [2019-11-15 22:31:00,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53433 states to 53433 states and 195616 transitions. [2019-11-15 22:31:00,821 INFO L78 Accepts]: Start accepts. Automaton has 53433 states and 195616 transitions. Word has length 69 [2019-11-15 22:31:00,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:00,821 INFO L462 AbstractCegarLoop]: Abstraction has 53433 states and 195616 transitions. [2019-11-15 22:31:00,821 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 22:31:00,821 INFO L276 IsEmpty]: Start isEmpty. Operand 53433 states and 195616 transitions. [2019-11-15 22:31:00,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 22:31:00,869 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:00,870 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:00,870 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:00,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:00,870 INFO L82 PathProgramCache]: Analyzing trace with hash -2083836118, now seen corresponding path program 1 times [2019-11-15 22:31:00,871 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:00,871 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612213937] [2019-11-15 22:31:00,871 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:00,871 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:00,871 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:00,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:01,012 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:01,014 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1612213937] [2019-11-15 22:31:01,014 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:01,014 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:31:01,015 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [778074016] [2019-11-15 22:31:01,015 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:31:01,015 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:01,015 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:31:01,016 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:31:01,016 INFO L87 Difference]: Start difference. First operand 53433 states and 195616 transitions. Second operand 6 states. [2019-11-15 22:31:02,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:02,362 INFO L93 Difference]: Finished difference Result 65982 states and 238830 transitions. [2019-11-15 22:31:02,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 22:31:02,362 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 69 [2019-11-15 22:31:02,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:02,502 INFO L225 Difference]: With dead ends: 65982 [2019-11-15 22:31:02,502 INFO L226 Difference]: Without dead ends: 65338 [2019-11-15 22:31:02,502 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:31:02,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65338 states. [2019-11-15 22:31:03,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65338 to 56042. [2019-11-15 22:31:03,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56042 states. [2019-11-15 22:31:03,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56042 states to 56042 states and 204333 transitions. [2019-11-15 22:31:03,669 INFO L78 Accepts]: Start accepts. Automaton has 56042 states and 204333 transitions. Word has length 69 [2019-11-15 22:31:03,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:03,669 INFO L462 AbstractCegarLoop]: Abstraction has 56042 states and 204333 transitions. [2019-11-15 22:31:03,669 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:31:03,669 INFO L276 IsEmpty]: Start isEmpty. Operand 56042 states and 204333 transitions. [2019-11-15 22:31:03,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 22:31:03,728 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:03,728 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:03,729 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:03,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:03,729 INFO L82 PathProgramCache]: Analyzing trace with hash -1122222101, now seen corresponding path program 1 times [2019-11-15 22:31:03,729 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:03,730 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [944889437] [2019-11-15 22:31:03,730 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:03,730 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:03,730 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:03,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:03,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:03,849 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [944889437] [2019-11-15 22:31:03,849 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:03,849 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 22:31:03,850 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78497588] [2019-11-15 22:31:03,850 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 22:31:03,850 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:03,851 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 22:31:03,851 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:31:03,851 INFO L87 Difference]: Start difference. First operand 56042 states and 204333 transitions. Second operand 7 states. [2019-11-15 22:31:05,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:05,189 INFO L93 Difference]: Finished difference Result 83030 states and 292761 transitions. [2019-11-15 22:31:05,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 22:31:05,189 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 69 [2019-11-15 22:31:05,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:05,364 INFO L225 Difference]: With dead ends: 83030 [2019-11-15 22:31:05,365 INFO L226 Difference]: Without dead ends: 83030 [2019-11-15 22:31:05,365 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 22:31:05,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83030 states. [2019-11-15 22:31:07,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83030 to 76079. [2019-11-15 22:31:07,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76079 states. [2019-11-15 22:31:07,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76079 states to 76079 states and 270628 transitions. [2019-11-15 22:31:07,533 INFO L78 Accepts]: Start accepts. Automaton has 76079 states and 270628 transitions. Word has length 69 [2019-11-15 22:31:07,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:07,533 INFO L462 AbstractCegarLoop]: Abstraction has 76079 states and 270628 transitions. [2019-11-15 22:31:07,533 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 22:31:07,533 INFO L276 IsEmpty]: Start isEmpty. Operand 76079 states and 270628 transitions. [2019-11-15 22:31:07,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 22:31:07,598 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:07,598 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:07,598 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:07,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:07,599 INFO L82 PathProgramCache]: Analyzing trace with hash 122542380, now seen corresponding path program 1 times [2019-11-15 22:31:07,599 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:07,599 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [669428771] [2019-11-15 22:31:07,599 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:07,599 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:07,600 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:07,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:07,693 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:07,693 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [669428771] [2019-11-15 22:31:07,694 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:07,694 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:31:07,694 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [259534196] [2019-11-15 22:31:07,694 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:31:07,695 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:07,695 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:31:07,695 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:31:07,695 INFO L87 Difference]: Start difference. First operand 76079 states and 270628 transitions. Second operand 4 states. [2019-11-15 22:31:07,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:07,799 INFO L93 Difference]: Finished difference Result 17224 states and 54506 transitions. [2019-11-15 22:31:07,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:31:07,800 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 69 [2019-11-15 22:31:07,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:07,835 INFO L225 Difference]: With dead ends: 17224 [2019-11-15 22:31:07,835 INFO L226 Difference]: Without dead ends: 16746 [2019-11-15 22:31:07,835 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:31:07,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16746 states. [2019-11-15 22:31:08,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16746 to 16734. [2019-11-15 22:31:08,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16734 states. [2019-11-15 22:31:08,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16734 states to 16734 states and 53001 transitions. [2019-11-15 22:31:08,126 INFO L78 Accepts]: Start accepts. Automaton has 16734 states and 53001 transitions. Word has length 69 [2019-11-15 22:31:08,126 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:08,126 INFO L462 AbstractCegarLoop]: Abstraction has 16734 states and 53001 transitions. [2019-11-15 22:31:08,126 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:31:08,126 INFO L276 IsEmpty]: Start isEmpty. Operand 16734 states and 53001 transitions. [2019-11-15 22:31:08,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 22:31:08,138 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:08,139 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:08,139 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:08,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:08,139 INFO L82 PathProgramCache]: Analyzing trace with hash -35710542, now seen corresponding path program 1 times [2019-11-15 22:31:08,139 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:08,139 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [379300292] [2019-11-15 22:31:08,139 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:08,139 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:08,139 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:08,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:08,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:08,201 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [379300292] [2019-11-15 22:31:08,201 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:08,201 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:31:08,201 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1442943536] [2019-11-15 22:31:08,202 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:31:08,202 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:08,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:31:08,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:31:08,202 INFO L87 Difference]: Start difference. First operand 16734 states and 53001 transitions. Second operand 4 states. [2019-11-15 22:31:08,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:08,462 INFO L93 Difference]: Finished difference Result 22098 states and 69082 transitions. [2019-11-15 22:31:08,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:31:08,462 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-11-15 22:31:08,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:08,495 INFO L225 Difference]: With dead ends: 22098 [2019-11-15 22:31:08,495 INFO L226 Difference]: Without dead ends: 22098 [2019-11-15 22:31:08,495 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:31:08,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22098 states. [2019-11-15 22:31:08,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22098 to 17610. [2019-11-15 22:31:08,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17610 states. [2019-11-15 22:31:08,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17610 states to 17610 states and 55560 transitions. [2019-11-15 22:31:08,790 INFO L78 Accepts]: Start accepts. Automaton has 17610 states and 55560 transitions. Word has length 79 [2019-11-15 22:31:08,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:08,790 INFO L462 AbstractCegarLoop]: Abstraction has 17610 states and 55560 transitions. [2019-11-15 22:31:08,791 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:31:08,791 INFO L276 IsEmpty]: Start isEmpty. Operand 17610 states and 55560 transitions. [2019-11-15 22:31:08,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 22:31:08,805 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:08,805 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:08,805 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:08,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:08,806 INFO L82 PathProgramCache]: Analyzing trace with hash -290447087, now seen corresponding path program 1 times [2019-11-15 22:31:08,806 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:08,806 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1283299188] [2019-11-15 22:31:08,807 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:08,807 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:08,807 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:08,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:08,935 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:08,935 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1283299188] [2019-11-15 22:31:08,936 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:08,936 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 22:31:08,936 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1468227927] [2019-11-15 22:31:08,937 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 22:31:08,937 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:08,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 22:31:08,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:31:08,938 INFO L87 Difference]: Start difference. First operand 17610 states and 55560 transitions. Second operand 8 states. [2019-11-15 22:31:09,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:09,959 INFO L93 Difference]: Finished difference Result 19704 states and 61636 transitions. [2019-11-15 22:31:09,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-11-15 22:31:09,960 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 79 [2019-11-15 22:31:09,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:09,989 INFO L225 Difference]: With dead ends: 19704 [2019-11-15 22:31:09,989 INFO L226 Difference]: Without dead ends: 19656 [2019-11-15 22:31:09,990 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=165, Invalid=591, Unknown=0, NotChecked=0, Total=756 [2019-11-15 22:31:10,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19656 states. [2019-11-15 22:31:10,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19656 to 15528. [2019-11-15 22:31:10,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15528 states. [2019-11-15 22:31:10,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15528 states to 15528 states and 49294 transitions. [2019-11-15 22:31:10,238 INFO L78 Accepts]: Start accepts. Automaton has 15528 states and 49294 transitions. Word has length 79 [2019-11-15 22:31:10,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:10,238 INFO L462 AbstractCegarLoop]: Abstraction has 15528 states and 49294 transitions. [2019-11-15 22:31:10,238 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 22:31:10,239 INFO L276 IsEmpty]: Start isEmpty. Operand 15528 states and 49294 transitions. [2019-11-15 22:31:10,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 22:31:10,251 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:10,252 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:10,252 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:10,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:10,253 INFO L82 PathProgramCache]: Analyzing trace with hash 705159786, now seen corresponding path program 1 times [2019-11-15 22:31:10,253 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:10,253 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393634103] [2019-11-15 22:31:10,253 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:10,253 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:10,254 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:10,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:10,296 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:10,296 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393634103] [2019-11-15 22:31:10,296 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:10,296 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 22:31:10,296 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2074632211] [2019-11-15 22:31:10,297 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 22:31:10,297 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:10,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 22:31:10,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:31:10,297 INFO L87 Difference]: Start difference. First operand 15528 states and 49294 transitions. Second operand 3 states. [2019-11-15 22:31:10,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:10,554 INFO L93 Difference]: Finished difference Result 16792 states and 53007 transitions. [2019-11-15 22:31:10,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 22:31:10,554 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2019-11-15 22:31:10,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:10,587 INFO L225 Difference]: With dead ends: 16792 [2019-11-15 22:31:10,587 INFO L226 Difference]: Without dead ends: 16792 [2019-11-15 22:31:10,588 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:31:10,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16792 states. [2019-11-15 22:31:10,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16792 to 16144. [2019-11-15 22:31:10,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16144 states. [2019-11-15 22:31:10,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16144 states to 16144 states and 51108 transitions. [2019-11-15 22:31:10,830 INFO L78 Accepts]: Start accepts. Automaton has 16144 states and 51108 transitions. Word has length 80 [2019-11-15 22:31:10,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:10,831 INFO L462 AbstractCegarLoop]: Abstraction has 16144 states and 51108 transitions. [2019-11-15 22:31:10,831 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 22:31:10,831 INFO L276 IsEmpty]: Start isEmpty. Operand 16144 states and 51108 transitions. [2019-11-15 22:31:10,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 22:31:10,843 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:10,843 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:10,844 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:10,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:10,844 INFO L82 PathProgramCache]: Analyzing trace with hash -2052355460, now seen corresponding path program 1 times [2019-11-15 22:31:10,844 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:10,844 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [306161716] [2019-11-15 22:31:10,844 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:10,844 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:10,845 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:10,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:10,909 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:10,910 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [306161716] [2019-11-15 22:31:10,910 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:10,910 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:31:10,910 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1367592868] [2019-11-15 22:31:10,911 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:31:10,911 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:10,911 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:31:10,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:31:10,911 INFO L87 Difference]: Start difference. First operand 16144 states and 51108 transitions. Second operand 4 states. [2019-11-15 22:31:11,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:11,226 INFO L93 Difference]: Finished difference Result 19272 states and 60154 transitions. [2019-11-15 22:31:11,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 22:31:11,227 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 81 [2019-11-15 22:31:11,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:11,254 INFO L225 Difference]: With dead ends: 19272 [2019-11-15 22:31:11,255 INFO L226 Difference]: Without dead ends: 19272 [2019-11-15 22:31:11,255 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:31:11,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19272 states. [2019-11-15 22:31:11,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19272 to 18249. [2019-11-15 22:31:11,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18249 states. [2019-11-15 22:31:11,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18249 states to 18249 states and 57270 transitions. [2019-11-15 22:31:11,522 INFO L78 Accepts]: Start accepts. Automaton has 18249 states and 57270 transitions. Word has length 81 [2019-11-15 22:31:11,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:11,522 INFO L462 AbstractCegarLoop]: Abstraction has 18249 states and 57270 transitions. [2019-11-15 22:31:11,522 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:31:11,523 INFO L276 IsEmpty]: Start isEmpty. Operand 18249 states and 57270 transitions. [2019-11-15 22:31:11,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 22:31:11,539 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:11,539 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:11,539 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:11,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:11,539 INFO L82 PathProgramCache]: Analyzing trace with hash 306951549, now seen corresponding path program 1 times [2019-11-15 22:31:11,539 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:11,539 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [11045788] [2019-11-15 22:31:11,540 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:11,540 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:11,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:11,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:11,580 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:11,581 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [11045788] [2019-11-15 22:31:11,581 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:11,581 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 22:31:11,582 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [836407747] [2019-11-15 22:31:11,582 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 22:31:11,582 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:11,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 22:31:11,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:31:11,583 INFO L87 Difference]: Start difference. First operand 18249 states and 57270 transitions. Second operand 3 states. [2019-11-15 22:31:11,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:11,888 INFO L93 Difference]: Finished difference Result 19580 states and 61169 transitions. [2019-11-15 22:31:11,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 22:31:11,888 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 81 [2019-11-15 22:31:11,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:11,927 INFO L225 Difference]: With dead ends: 19580 [2019-11-15 22:31:11,927 INFO L226 Difference]: Without dead ends: 19580 [2019-11-15 22:31:11,928 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:31:11,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19580 states. [2019-11-15 22:31:12,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19580 to 18921. [2019-11-15 22:31:12,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18921 states. [2019-11-15 22:31:12,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18921 states to 18921 states and 59234 transitions. [2019-11-15 22:31:12,302 INFO L78 Accepts]: Start accepts. Automaton has 18921 states and 59234 transitions. Word has length 81 [2019-11-15 22:31:12,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:12,302 INFO L462 AbstractCegarLoop]: Abstraction has 18921 states and 59234 transitions. [2019-11-15 22:31:12,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 22:31:12,303 INFO L276 IsEmpty]: Start isEmpty. Operand 18921 states and 59234 transitions. [2019-11-15 22:31:12,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 22:31:12,335 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:12,335 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:12,335 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:12,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:12,336 INFO L82 PathProgramCache]: Analyzing trace with hash 261195342, now seen corresponding path program 1 times [2019-11-15 22:31:12,336 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:12,337 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1613836418] [2019-11-15 22:31:12,337 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:12,337 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:12,337 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:12,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:12,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:12,456 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1613836418] [2019-11-15 22:31:12,456 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:12,456 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:31:12,457 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [602839982] [2019-11-15 22:31:12,457 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:31:12,457 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:12,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:31:12,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:31:12,458 INFO L87 Difference]: Start difference. First operand 18921 states and 59234 transitions. Second operand 4 states. [2019-11-15 22:31:12,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:12,997 INFO L93 Difference]: Finished difference Result 31886 states and 99190 transitions. [2019-11-15 22:31:12,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:31:12,998 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 82 [2019-11-15 22:31:12,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:13,072 INFO L225 Difference]: With dead ends: 31886 [2019-11-15 22:31:13,072 INFO L226 Difference]: Without dead ends: 31886 [2019-11-15 22:31:13,072 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:31:13,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31886 states. [2019-11-15 22:31:13,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31886 to 17558. [2019-11-15 22:31:13,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17558 states. [2019-11-15 22:31:13,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17558 states to 17558 states and 54308 transitions. [2019-11-15 22:31:13,503 INFO L78 Accepts]: Start accepts. Automaton has 17558 states and 54308 transitions. Word has length 82 [2019-11-15 22:31:13,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:13,504 INFO L462 AbstractCegarLoop]: Abstraction has 17558 states and 54308 transitions. [2019-11-15 22:31:13,504 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:31:13,504 INFO L276 IsEmpty]: Start isEmpty. Operand 17558 states and 54308 transitions. [2019-11-15 22:31:13,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 22:31:13,523 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:13,523 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:13,523 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:13,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:13,524 INFO L82 PathProgramCache]: Analyzing trace with hash 590961103, now seen corresponding path program 1 times [2019-11-15 22:31:13,524 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:13,524 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1452036148] [2019-11-15 22:31:13,524 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:13,524 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:13,524 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:13,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:13,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:13,640 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1452036148] [2019-11-15 22:31:13,641 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:13,641 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:31:13,641 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [924603708] [2019-11-15 22:31:13,642 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:31:13,642 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:13,642 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:31:13,642 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:31:13,642 INFO L87 Difference]: Start difference. First operand 17558 states and 54308 transitions. Second operand 6 states. [2019-11-15 22:31:14,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:14,592 INFO L93 Difference]: Finished difference Result 25982 states and 78626 transitions. [2019-11-15 22:31:14,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 22:31:14,592 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-11-15 22:31:14,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:14,630 INFO L225 Difference]: With dead ends: 25982 [2019-11-15 22:31:14,630 INFO L226 Difference]: Without dead ends: 25676 [2019-11-15 22:31:14,631 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2019-11-15 22:31:14,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25676 states. [2019-11-15 22:31:14,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25676 to 20546. [2019-11-15 22:31:14,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20546 states. [2019-11-15 22:31:14,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20546 states to 20546 states and 63287 transitions. [2019-11-15 22:31:14,952 INFO L78 Accepts]: Start accepts. Automaton has 20546 states and 63287 transitions. Word has length 82 [2019-11-15 22:31:14,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:14,952 INFO L462 AbstractCegarLoop]: Abstraction has 20546 states and 63287 transitions. [2019-11-15 22:31:14,952 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:31:14,952 INFO L276 IsEmpty]: Start isEmpty. Operand 20546 states and 63287 transitions. [2019-11-15 22:31:14,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 22:31:14,970 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:14,970 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:14,971 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:14,971 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:14,971 INFO L82 PathProgramCache]: Analyzing trace with hash 1552575120, now seen corresponding path program 1 times [2019-11-15 22:31:14,971 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:14,971 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [825984781] [2019-11-15 22:31:14,971 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:14,971 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:14,972 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:14,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:15,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:15,075 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [825984781] [2019-11-15 22:31:15,075 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:15,075 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 22:31:15,075 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1934893175] [2019-11-15 22:31:15,076 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 22:31:15,076 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:15,076 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 22:31:15,076 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:31:15,077 INFO L87 Difference]: Start difference. First operand 20546 states and 63287 transitions. Second operand 7 states. [2019-11-15 22:31:16,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:16,315 INFO L93 Difference]: Finished difference Result 38183 states and 115440 transitions. [2019-11-15 22:31:16,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-15 22:31:16,316 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 82 [2019-11-15 22:31:16,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:16,374 INFO L225 Difference]: With dead ends: 38183 [2019-11-15 22:31:16,374 INFO L226 Difference]: Without dead ends: 38111 [2019-11-15 22:31:16,375 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=87, Invalid=185, Unknown=0, NotChecked=0, Total=272 [2019-11-15 22:31:16,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38111 states. [2019-11-15 22:31:16,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38111 to 23772. [2019-11-15 22:31:16,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23772 states. [2019-11-15 22:31:16,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23772 states to 23772 states and 73008 transitions. [2019-11-15 22:31:16,811 INFO L78 Accepts]: Start accepts. Automaton has 23772 states and 73008 transitions. Word has length 82 [2019-11-15 22:31:16,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:16,812 INFO L462 AbstractCegarLoop]: Abstraction has 23772 states and 73008 transitions. [2019-11-15 22:31:16,812 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 22:31:16,812 INFO L276 IsEmpty]: Start isEmpty. Operand 23772 states and 73008 transitions. [2019-11-15 22:31:16,832 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 22:31:16,832 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:16,832 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:16,833 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:16,833 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:16,833 INFO L82 PathProgramCache]: Analyzing trace with hash -1497627695, now seen corresponding path program 1 times [2019-11-15 22:31:16,833 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:16,833 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1986390892] [2019-11-15 22:31:16,833 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:16,833 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:16,833 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:16,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:16,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:16,924 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1986390892] [2019-11-15 22:31:16,924 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:16,925 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:31:16,925 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [404448735] [2019-11-15 22:31:16,926 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:31:16,926 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:16,926 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:31:16,929 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:31:16,929 INFO L87 Difference]: Start difference. First operand 23772 states and 73008 transitions. Second operand 6 states. [2019-11-15 22:31:17,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:17,403 INFO L93 Difference]: Finished difference Result 36182 states and 111020 transitions. [2019-11-15 22:31:17,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 22:31:17,404 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-11-15 22:31:17,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:17,460 INFO L225 Difference]: With dead ends: 36182 [2019-11-15 22:31:17,460 INFO L226 Difference]: Without dead ends: 36182 [2019-11-15 22:31:17,461 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:31:17,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36182 states. [2019-11-15 22:31:17,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36182 to 23483. [2019-11-15 22:31:17,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23483 states. [2019-11-15 22:31:17,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23483 states to 23483 states and 71652 transitions. [2019-11-15 22:31:17,872 INFO L78 Accepts]: Start accepts. Automaton has 23483 states and 71652 transitions. Word has length 82 [2019-11-15 22:31:17,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:17,872 INFO L462 AbstractCegarLoop]: Abstraction has 23483 states and 71652 transitions. [2019-11-15 22:31:17,872 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:31:17,873 INFO L276 IsEmpty]: Start isEmpty. Operand 23483 states and 71652 transitions. [2019-11-15 22:31:17,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 22:31:17,894 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:17,894 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:17,894 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:17,894 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:17,895 INFO L82 PathProgramCache]: Analyzing trace with hash -1016911279, now seen corresponding path program 1 times [2019-11-15 22:31:17,895 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:17,895 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1822865185] [2019-11-15 22:31:17,895 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:17,895 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:17,896 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:17,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:17,999 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:17,999 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1822865185] [2019-11-15 22:31:18,000 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:18,000 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 22:31:18,000 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1426441729] [2019-11-15 22:31:18,000 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 22:31:18,001 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:18,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 22:31:18,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:31:18,001 INFO L87 Difference]: Start difference. First operand 23483 states and 71652 transitions. Second operand 7 states. [2019-11-15 22:31:18,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:18,755 INFO L93 Difference]: Finished difference Result 29663 states and 88861 transitions. [2019-11-15 22:31:18,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 22:31:18,756 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 82 [2019-11-15 22:31:18,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:18,801 INFO L225 Difference]: With dead ends: 29663 [2019-11-15 22:31:18,801 INFO L226 Difference]: Without dead ends: 29663 [2019-11-15 22:31:18,801 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-11-15 22:31:18,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29663 states. [2019-11-15 22:31:19,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29663 to 25526. [2019-11-15 22:31:19,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25526 states. [2019-11-15 22:31:19,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25526 states to 25526 states and 77703 transitions. [2019-11-15 22:31:19,206 INFO L78 Accepts]: Start accepts. Automaton has 25526 states and 77703 transitions. Word has length 82 [2019-11-15 22:31:19,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:19,206 INFO L462 AbstractCegarLoop]: Abstraction has 25526 states and 77703 transitions. [2019-11-15 22:31:19,207 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 22:31:19,207 INFO L276 IsEmpty]: Start isEmpty. Operand 25526 states and 77703 transitions. [2019-11-15 22:31:19,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 22:31:19,229 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:19,229 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:19,230 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:19,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:19,230 INFO L82 PathProgramCache]: Analyzing trace with hash 227853202, now seen corresponding path program 1 times [2019-11-15 22:31:19,230 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:19,230 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563835893] [2019-11-15 22:31:19,230 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:19,230 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:19,230 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:19,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:19,351 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:19,351 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [563835893] [2019-11-15 22:31:19,351 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:19,351 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:31:19,351 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [883004538] [2019-11-15 22:31:19,352 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:31:19,352 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:19,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:31:19,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:31:19,352 INFO L87 Difference]: Start difference. First operand 25526 states and 77703 transitions. Second operand 6 states. [2019-11-15 22:31:19,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:19,558 INFO L93 Difference]: Finished difference Result 25908 states and 78691 transitions. [2019-11-15 22:31:19,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 22:31:19,558 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-11-15 22:31:19,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:19,598 INFO L225 Difference]: With dead ends: 25908 [2019-11-15 22:31:19,598 INFO L226 Difference]: Without dead ends: 25908 [2019-11-15 22:31:19,599 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:31:19,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25908 states. [2019-11-15 22:31:19,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25908 to 25743. [2019-11-15 22:31:19,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25743 states. [2019-11-15 22:31:19,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25743 states to 25743 states and 78263 transitions. [2019-11-15 22:31:19,960 INFO L78 Accepts]: Start accepts. Automaton has 25743 states and 78263 transitions. Word has length 82 [2019-11-15 22:31:19,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:19,961 INFO L462 AbstractCegarLoop]: Abstraction has 25743 states and 78263 transitions. [2019-11-15 22:31:19,961 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:31:19,961 INFO L276 IsEmpty]: Start isEmpty. Operand 25743 states and 78263 transitions. [2019-11-15 22:31:19,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 22:31:19,983 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:19,983 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:19,983 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:19,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:19,984 INFO L82 PathProgramCache]: Analyzing trace with hash -331722480, now seen corresponding path program 1 times [2019-11-15 22:31:19,984 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:19,984 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1385607957] [2019-11-15 22:31:19,984 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:19,984 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:19,985 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:19,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:20,117 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:20,117 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1385607957] [2019-11-15 22:31:20,117 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:20,117 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:31:20,117 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1451901487] [2019-11-15 22:31:20,118 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:31:20,118 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:20,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:31:20,118 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:31:20,119 INFO L87 Difference]: Start difference. First operand 25743 states and 78263 transitions. Second operand 6 states. [2019-11-15 22:31:20,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:20,967 INFO L93 Difference]: Finished difference Result 38640 states and 116558 transitions. [2019-11-15 22:31:20,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 22:31:20,967 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-11-15 22:31:20,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:21,049 INFO L225 Difference]: With dead ends: 38640 [2019-11-15 22:31:21,050 INFO L226 Difference]: Without dead ends: 38640 [2019-11-15 22:31:21,052 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-11-15 22:31:21,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38640 states. [2019-11-15 22:31:21,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38640 to 27789. [2019-11-15 22:31:21,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27789 states. [2019-11-15 22:31:21,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27789 states to 27789 states and 84319 transitions. [2019-11-15 22:31:21,680 INFO L78 Accepts]: Start accepts. Automaton has 27789 states and 84319 transitions. Word has length 82 [2019-11-15 22:31:21,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:21,681 INFO L462 AbstractCegarLoop]: Abstraction has 27789 states and 84319 transitions. [2019-11-15 22:31:21,681 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:31:21,681 INFO L276 IsEmpty]: Start isEmpty. Operand 27789 states and 84319 transitions. [2019-11-15 22:31:21,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 22:31:21,713 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:21,713 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:21,714 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:21,714 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:21,714 INFO L82 PathProgramCache]: Analyzing trace with hash 913042001, now seen corresponding path program 1 times [2019-11-15 22:31:21,714 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:21,714 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [213787077] [2019-11-15 22:31:21,715 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:21,715 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:21,715 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:21,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:21,824 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:21,825 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [213787077] [2019-11-15 22:31:21,825 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:21,825 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:31:21,825 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [764911499] [2019-11-15 22:31:21,826 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:31:21,826 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:21,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:31:21,826 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:31:21,827 INFO L87 Difference]: Start difference. First operand 27789 states and 84319 transitions. Second operand 5 states. [2019-11-15 22:31:22,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:22,222 INFO L93 Difference]: Finished difference Result 27720 states and 84081 transitions. [2019-11-15 22:31:22,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:31:22,222 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2019-11-15 22:31:22,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:22,263 INFO L225 Difference]: With dead ends: 27720 [2019-11-15 22:31:22,263 INFO L226 Difference]: Without dead ends: 27720 [2019-11-15 22:31:22,263 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:31:22,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27720 states. [2019-11-15 22:31:22,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27720 to 27681. [2019-11-15 22:31:22,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27681 states. [2019-11-15 22:31:22,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27681 states to 27681 states and 83977 transitions. [2019-11-15 22:31:22,646 INFO L78 Accepts]: Start accepts. Automaton has 27681 states and 83977 transitions. Word has length 82 [2019-11-15 22:31:22,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:22,647 INFO L462 AbstractCegarLoop]: Abstraction has 27681 states and 83977 transitions. [2019-11-15 22:31:22,650 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:31:22,650 INFO L276 IsEmpty]: Start isEmpty. Operand 27681 states and 83977 transitions. [2019-11-15 22:31:22,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 22:31:22,675 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:22,675 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:22,675 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:22,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:22,676 INFO L82 PathProgramCache]: Analyzing trace with hash 1874656018, now seen corresponding path program 1 times [2019-11-15 22:31:22,676 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:22,676 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1374689516] [2019-11-15 22:31:22,676 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:22,677 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:22,677 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:22,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:22,724 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:22,724 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1374689516] [2019-11-15 22:31:22,725 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:22,725 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 22:31:22,725 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1797710988] [2019-11-15 22:31:22,725 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 22:31:22,726 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:22,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 22:31:22,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:31:22,726 INFO L87 Difference]: Start difference. First operand 27681 states and 83977 transitions. Second operand 3 states. [2019-11-15 22:31:22,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:22,870 INFO L93 Difference]: Finished difference Result 21186 states and 63939 transitions. [2019-11-15 22:31:22,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 22:31:22,870 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 82 [2019-11-15 22:31:22,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:22,898 INFO L225 Difference]: With dead ends: 21186 [2019-11-15 22:31:22,898 INFO L226 Difference]: Without dead ends: 21108 [2019-11-15 22:31:22,898 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:31:22,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21108 states. [2019-11-15 22:31:23,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21108 to 19332. [2019-11-15 22:31:23,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19332 states. [2019-11-15 22:31:23,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19332 states to 19332 states and 58609 transitions. [2019-11-15 22:31:23,170 INFO L78 Accepts]: Start accepts. Automaton has 19332 states and 58609 transitions. Word has length 82 [2019-11-15 22:31:23,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:23,170 INFO L462 AbstractCegarLoop]: Abstraction has 19332 states and 58609 transitions. [2019-11-15 22:31:23,170 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 22:31:23,170 INFO L276 IsEmpty]: Start isEmpty. Operand 19332 states and 58609 transitions. [2019-11-15 22:31:23,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 22:31:23,187 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:23,187 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:23,187 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:23,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:23,187 INFO L82 PathProgramCache]: Analyzing trace with hash -1662581195, now seen corresponding path program 1 times [2019-11-15 22:31:23,188 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:23,188 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854462774] [2019-11-15 22:31:23,188 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:23,188 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:23,188 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:23,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:23,257 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:23,257 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [854462774] [2019-11-15 22:31:23,257 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:23,257 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:31:23,258 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [565640753] [2019-11-15 22:31:23,258 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:31:23,258 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:23,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:31:23,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:31:23,259 INFO L87 Difference]: Start difference. First operand 19332 states and 58609 transitions. Second operand 5 states. [2019-11-15 22:31:23,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:23,308 INFO L93 Difference]: Finished difference Result 2733 states and 6659 transitions. [2019-11-15 22:31:23,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 22:31:23,309 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 83 [2019-11-15 22:31:23,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:23,312 INFO L225 Difference]: With dead ends: 2733 [2019-11-15 22:31:23,312 INFO L226 Difference]: Without dead ends: 2373 [2019-11-15 22:31:23,312 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:31:23,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2373 states. [2019-11-15 22:31:23,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2373 to 2233. [2019-11-15 22:31:23,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2233 states. [2019-11-15 22:31:23,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2233 states to 2233 states and 5405 transitions. [2019-11-15 22:31:23,343 INFO L78 Accepts]: Start accepts. Automaton has 2233 states and 5405 transitions. Word has length 83 [2019-11-15 22:31:23,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:23,344 INFO L462 AbstractCegarLoop]: Abstraction has 2233 states and 5405 transitions. [2019-11-15 22:31:23,344 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:31:23,344 INFO L276 IsEmpty]: Start isEmpty. Operand 2233 states and 5405 transitions. [2019-11-15 22:31:23,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 22:31:23,347 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:23,347 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:23,347 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:23,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:23,348 INFO L82 PathProgramCache]: Analyzing trace with hash 440204745, now seen corresponding path program 1 times [2019-11-15 22:31:23,348 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:23,348 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1415109002] [2019-11-15 22:31:23,348 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:23,348 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:23,349 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:23,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:23,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:23,515 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1415109002] [2019-11-15 22:31:23,515 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:23,515 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 22:31:23,516 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1982230150] [2019-11-15 22:31:23,516 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 22:31:23,516 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:23,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 22:31:23,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:31:23,517 INFO L87 Difference]: Start difference. First operand 2233 states and 5405 transitions. Second operand 7 states. [2019-11-15 22:31:23,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:23,748 INFO L93 Difference]: Finished difference Result 2402 states and 5706 transitions. [2019-11-15 22:31:23,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 22:31:23,749 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2019-11-15 22:31:23,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:23,751 INFO L225 Difference]: With dead ends: 2402 [2019-11-15 22:31:23,751 INFO L226 Difference]: Without dead ends: 2402 [2019-11-15 22:31:23,751 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2019-11-15 22:31:23,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2402 states. [2019-11-15 22:31:23,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2402 to 2240. [2019-11-15 22:31:23,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2240 states. [2019-11-15 22:31:23,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2240 states to 2240 states and 5373 transitions. [2019-11-15 22:31:23,772 INFO L78 Accepts]: Start accepts. Automaton has 2240 states and 5373 transitions. Word has length 96 [2019-11-15 22:31:23,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:23,773 INFO L462 AbstractCegarLoop]: Abstraction has 2240 states and 5373 transitions. [2019-11-15 22:31:23,773 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 22:31:23,773 INFO L276 IsEmpty]: Start isEmpty. Operand 2240 states and 5373 transitions. [2019-11-15 22:31:23,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 22:31:23,775 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:23,775 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:23,775 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:23,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:23,775 INFO L82 PathProgramCache]: Analyzing trace with hash 1903161099, now seen corresponding path program 1 times [2019-11-15 22:31:23,775 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:23,775 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1704235269] [2019-11-15 22:31:23,775 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:23,775 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:23,776 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:23,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:23,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:23,906 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1704235269] [2019-11-15 22:31:23,906 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:23,906 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:31:23,906 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [477062020] [2019-11-15 22:31:23,907 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:31:23,907 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:23,907 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:31:23,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:31:23,907 INFO L87 Difference]: Start difference. First operand 2240 states and 5373 transitions. Second operand 6 states. [2019-11-15 22:31:23,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:23,995 INFO L93 Difference]: Finished difference Result 2413 states and 5641 transitions. [2019-11-15 22:31:23,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 22:31:23,996 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-15 22:31:23,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:23,999 INFO L225 Difference]: With dead ends: 2413 [2019-11-15 22:31:23,999 INFO L226 Difference]: Without dead ends: 2362 [2019-11-15 22:31:24,000 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:31:24,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2362 states. [2019-11-15 22:31:24,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2362 to 2237. [2019-11-15 22:31:24,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2237 states. [2019-11-15 22:31:24,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2237 states to 2237 states and 5288 transitions. [2019-11-15 22:31:24,030 INFO L78 Accepts]: Start accepts. Automaton has 2237 states and 5288 transitions. Word has length 96 [2019-11-15 22:31:24,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:24,030 INFO L462 AbstractCegarLoop]: Abstraction has 2237 states and 5288 transitions. [2019-11-15 22:31:24,030 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:31:24,031 INFO L276 IsEmpty]: Start isEmpty. Operand 2237 states and 5288 transitions. [2019-11-15 22:31:24,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 22:31:24,033 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:24,033 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:24,034 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:24,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:24,034 INFO L82 PathProgramCache]: Analyzing trace with hash 202420620, now seen corresponding path program 1 times [2019-11-15 22:31:24,034 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:24,035 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1383779038] [2019-11-15 22:31:24,035 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:24,035 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:24,035 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:24,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:24,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:24,154 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1383779038] [2019-11-15 22:31:24,154 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:24,154 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:31:24,154 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1701551886] [2019-11-15 22:31:24,155 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:31:24,155 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:24,155 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:31:24,155 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:31:24,155 INFO L87 Difference]: Start difference. First operand 2237 states and 5288 transitions. Second operand 6 states. [2019-11-15 22:31:24,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:24,378 INFO L93 Difference]: Finished difference Result 2394 states and 5565 transitions. [2019-11-15 22:31:24,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 22:31:24,378 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-15 22:31:24,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:24,381 INFO L225 Difference]: With dead ends: 2394 [2019-11-15 22:31:24,381 INFO L226 Difference]: Without dead ends: 2394 [2019-11-15 22:31:24,381 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 22:31:24,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2394 states. [2019-11-15 22:31:24,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2394 to 2223. [2019-11-15 22:31:24,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2223 states. [2019-11-15 22:31:24,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2223 states to 2223 states and 5232 transitions. [2019-11-15 22:31:24,414 INFO L78 Accepts]: Start accepts. Automaton has 2223 states and 5232 transitions. Word has length 96 [2019-11-15 22:31:24,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:24,414 INFO L462 AbstractCegarLoop]: Abstraction has 2223 states and 5232 transitions. [2019-11-15 22:31:24,414 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:31:24,415 INFO L276 IsEmpty]: Start isEmpty. Operand 2223 states and 5232 transitions. [2019-11-15 22:31:24,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 22:31:24,417 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:24,417 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:24,418 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:24,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:24,418 INFO L82 PathProgramCache]: Analyzing trace with hash -1733239667, now seen corresponding path program 1 times [2019-11-15 22:31:24,418 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:24,419 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1717490537] [2019-11-15 22:31:24,419 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:24,419 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:24,419 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:24,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:24,479 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:24,480 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1717490537] [2019-11-15 22:31:24,480 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:24,480 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:31:24,480 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [24454004] [2019-11-15 22:31:24,481 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:31:24,481 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:24,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:31:24,481 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:31:24,482 INFO L87 Difference]: Start difference. First operand 2223 states and 5232 transitions. Second operand 4 states. [2019-11-15 22:31:24,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:24,580 INFO L93 Difference]: Finished difference Result 2223 states and 5196 transitions. [2019-11-15 22:31:24,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:31:24,580 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-11-15 22:31:24,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:24,583 INFO L225 Difference]: With dead ends: 2223 [2019-11-15 22:31:24,583 INFO L226 Difference]: Without dead ends: 2223 [2019-11-15 22:31:24,584 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:31:24,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2223 states. [2019-11-15 22:31:24,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2223 to 2082. [2019-11-15 22:31:24,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2082 states. [2019-11-15 22:31:24,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2082 states to 2082 states and 4895 transitions. [2019-11-15 22:31:24,613 INFO L78 Accepts]: Start accepts. Automaton has 2082 states and 4895 transitions. Word has length 96 [2019-11-15 22:31:24,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:24,614 INFO L462 AbstractCegarLoop]: Abstraction has 2082 states and 4895 transitions. [2019-11-15 22:31:24,614 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:31:24,614 INFO L276 IsEmpty]: Start isEmpty. Operand 2082 states and 4895 transitions. [2019-11-15 22:31:24,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 22:31:24,617 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:24,617 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:24,617 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:24,618 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:24,618 INFO L82 PathProgramCache]: Analyzing trace with hash 1513237805, now seen corresponding path program 1 times [2019-11-15 22:31:24,618 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:24,620 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1163346920] [2019-11-15 22:31:24,620 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:24,620 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:24,621 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:24,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:24,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:24,717 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1163346920] [2019-11-15 22:31:24,717 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:24,718 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:31:24,718 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1360589248] [2019-11-15 22:31:24,718 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:31:24,718 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:24,719 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:31:24,719 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:31:24,719 INFO L87 Difference]: Start difference. First operand 2082 states and 4895 transitions. Second operand 5 states. [2019-11-15 22:31:24,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:24,945 INFO L93 Difference]: Finished difference Result 2334 states and 5474 transitions. [2019-11-15 22:31:24,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 22:31:24,946 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2019-11-15 22:31:24,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:24,949 INFO L225 Difference]: With dead ends: 2334 [2019-11-15 22:31:24,949 INFO L226 Difference]: Without dead ends: 2316 [2019-11-15 22:31:24,951 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:31:24,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2316 states. [2019-11-15 22:31:24,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2316 to 2109. [2019-11-15 22:31:24,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2109 states. [2019-11-15 22:31:24,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2109 states to 2109 states and 4949 transitions. [2019-11-15 22:31:24,984 INFO L78 Accepts]: Start accepts. Automaton has 2109 states and 4949 transitions. Word has length 96 [2019-11-15 22:31:24,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:24,984 INFO L462 AbstractCegarLoop]: Abstraction has 2109 states and 4949 transitions. [2019-11-15 22:31:24,984 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:31:24,985 INFO L276 IsEmpty]: Start isEmpty. Operand 2109 states and 4949 transitions. [2019-11-15 22:31:24,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 22:31:24,987 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:24,987 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:24,988 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:24,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:24,988 INFO L82 PathProgramCache]: Analyzing trace with hash -1536965010, now seen corresponding path program 1 times [2019-11-15 22:31:24,988 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:24,989 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1362819581] [2019-11-15 22:31:24,989 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:24,989 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:24,989 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:25,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:31:25,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:31:25,130 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1362819581] [2019-11-15 22:31:25,130 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:31:25,130 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 22:31:25,131 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1327560395] [2019-11-15 22:31:25,131 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 22:31:25,131 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:31:25,131 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 22:31:25,132 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:31:25,132 INFO L87 Difference]: Start difference. First operand 2109 states and 4949 transitions. Second operand 7 states. [2019-11-15 22:31:25,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:31:25,232 INFO L93 Difference]: Finished difference Result 3400 states and 8085 transitions. [2019-11-15 22:31:25,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 22:31:25,232 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2019-11-15 22:31:25,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:31:25,234 INFO L225 Difference]: With dead ends: 3400 [2019-11-15 22:31:25,234 INFO L226 Difference]: Without dead ends: 1372 [2019-11-15 22:31:25,234 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-11-15 22:31:25,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1372 states. [2019-11-15 22:31:25,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1372 to 1372. [2019-11-15 22:31:25,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1372 states. [2019-11-15 22:31:25,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1372 states to 1372 states and 3268 transitions. [2019-11-15 22:31:25,254 INFO L78 Accepts]: Start accepts. Automaton has 1372 states and 3268 transitions. Word has length 96 [2019-11-15 22:31:25,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:31:25,254 INFO L462 AbstractCegarLoop]: Abstraction has 1372 states and 3268 transitions. [2019-11-15 22:31:25,254 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 22:31:25,254 INFO L276 IsEmpty]: Start isEmpty. Operand 1372 states and 3268 transitions. [2019-11-15 22:31:25,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 22:31:25,256 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:31:25,256 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:31:25,257 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:31:25,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:31:25,257 INFO L82 PathProgramCache]: Analyzing trace with hash 1069439884, now seen corresponding path program 2 times [2019-11-15 22:31:25,258 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:31:25,258 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2079088001] [2019-11-15 22:31:25,258 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:25,258 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:31:25,258 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:31:25,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 22:31:25,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 22:31:25,369 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 22:31:25,370 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 22:31:25,556 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 22:31:25,561 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 10:31:25 BasicIcfg [2019-11-15 22:31:25,562 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 22:31:25,562 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 22:31:25,562 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 22:31:25,562 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 22:31:25,563 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 10:30:34" (3/4) ... [2019-11-15 22:31:25,565 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 22:31:25,713 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_d776a037-b266-438e-ab56-9f1624a10adf/bin/uautomizer/witness.graphml [2019-11-15 22:31:25,713 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 22:31:25,716 INFO L168 Benchmark]: Toolchain (without parser) took 52911.96 ms. Allocated memory was 1.0 GB in the beginning and 4.7 GB in the end (delta: 3.6 GB). Free memory was 940.8 MB in the beginning and 2.8 GB in the end (delta: -1.8 GB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. [2019-11-15 22:31:25,717 INFO L168 Benchmark]: CDTParser took 0.31 ms. Allocated memory is still 1.0 GB. Free memory is still 962.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 22:31:25,717 INFO L168 Benchmark]: CACSL2BoogieTranslator took 842.14 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 165.2 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -181.8 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-11-15 22:31:25,718 INFO L168 Benchmark]: Boogie Procedure Inliner took 81.52 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 22:31:25,718 INFO L168 Benchmark]: Boogie Preprocessor took 41.17 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 22:31:25,721 INFO L168 Benchmark]: RCFGBuilder took 997.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 53.5 MB). Peak memory consumption was 53.5 MB. Max. memory is 11.5 GB. [2019-11-15 22:31:25,721 INFO L168 Benchmark]: TraceAbstraction took 50793.25 ms. Allocated memory was 1.2 GB in the beginning and 4.7 GB in the end (delta: 3.5 GB). Free memory was 1.1 GB in the beginning and 2.8 GB in the end (delta: -1.7 GB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. [2019-11-15 22:31:25,721 INFO L168 Benchmark]: Witness Printer took 151.13 ms. Allocated memory is still 4.7 GB. Free memory was 2.8 GB in the beginning and 2.8 GB in the end (delta: 22.0 MB). Peak memory consumption was 22.0 MB. Max. memory is 11.5 GB. [2019-11-15 22:31:25,724 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.31 ms. Allocated memory is still 1.0 GB. Free memory is still 962.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 842.14 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 165.2 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -181.8 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 81.52 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 41.17 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 997.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 53.5 MB). Peak memory consumption was 53.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 50793.25 ms. Allocated memory was 1.2 GB in the beginning and 4.7 GB in the end (delta: 3.5 GB). Free memory was 1.1 GB in the beginning and 2.8 GB in the end (delta: -1.7 GB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. * Witness Printer took 151.13 ms. Allocated memory is still 4.7 GB. Free memory was 2.8 GB in the beginning and 2.8 GB in the end (delta: 22.0 MB). Peak memory consumption was 22.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L698] 0 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L699] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L700] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L702] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L703] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L704] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L705] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L706] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L707] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L708] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L709] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L710] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L711] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L712] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L713] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L714] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L715] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L716] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L718] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L720] 0 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L721] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L722] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L788] 0 pthread_t t1095; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L789] FCALL, FORK 0 pthread_create(&t1095, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L790] 0 pthread_t t1096; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L791] FCALL, FORK 0 pthread_create(&t1096, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L746] 2 x$w_buff1 = x$w_buff0 [L747] 2 x$w_buff0 = 2 [L748] 2 x$w_buff1_used = x$w_buff0_used [L749] 2 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L751] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L752] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L753] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L754] 2 x$r_buff0_thd2 = (_Bool)1 [L757] 2 y = 1 [L760] 2 __unbuffered_p1_EAX = y [L763] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L726] 1 z = 1 [L729] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L732] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=1, z=1] [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=1, z=1] [L732] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L733] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L733] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L734] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L766] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L734] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L766] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L767] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L767] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L768] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L768] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L769] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L769] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L770] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L770] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L773] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L735] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L735] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L736] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L736] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L739] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L793] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L798] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L798] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L799] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L799] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L800] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L800] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L801] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L801] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L804] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L805] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L806] 0 x$flush_delayed = weak$$choice2 [L807] 0 x$mem_tmp = x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L808] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L808] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L809] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L809] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L810] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L810] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L811] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L811] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L812] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L812] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L813] EXPR 0 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L813] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L814] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L814] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L815] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L816] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L816] 0 x = x$flush_delayed ? x$mem_tmp : x [L817] 0 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 177 locations, 3 error locations. Result: UNSAFE, OverallTime: 50.6s, OverallIterations: 34, TraceHistogramMax: 1, AutomataDifference: 23.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9300 SDtfs, 9343 SDslu, 19179 SDs, 0 SdLazy, 8921 SolverSat, 607 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 335 GetRequests, 89 SyntacticMatches, 20 SemanticMatches, 226 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 424 ImplicationChecksByTransitivity, 2.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=76079occurred in iteration=11, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 19.7s AutomataMinimizationTime, 33 MinimizatonAttempts, 150183 StatesRemovedByMinimization, 31 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.6s InterpolantComputationTime, 2606 NumberOfCodeBlocks, 2606 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 2477 ConstructedInterpolants, 0 QuantifiedInterpolants, 443821 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...