./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix041_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_c905dfa0-3eb3-415b-9499-3f6439dcfd0c/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_c905dfa0-3eb3-415b-9499-3f6439dcfd0c/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_c905dfa0-3eb3-415b-9499-3f6439dcfd0c/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_c905dfa0-3eb3-415b-9499-3f6439dcfd0c/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix041_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_c905dfa0-3eb3-415b-9499-3f6439dcfd0c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_c905dfa0-3eb3-415b-9499-3f6439dcfd0c/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ef37f6e42a6b5b21facb2aecbfff2cdd2e29a7ec ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 20:28:12,881 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 20:28:12,883 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 20:28:12,892 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 20:28:12,893 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 20:28:12,894 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 20:28:12,895 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 20:28:12,896 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 20:28:12,898 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 20:28:12,899 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 20:28:12,900 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 20:28:12,901 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 20:28:12,901 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 20:28:12,902 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 20:28:12,902 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 20:28:12,903 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 20:28:12,904 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 20:28:12,905 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 20:28:12,906 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 20:28:12,908 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 20:28:12,909 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 20:28:12,910 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 20:28:12,911 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 20:28:12,911 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 20:28:12,913 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 20:28:12,914 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 20:28:12,914 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 20:28:12,914 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 20:28:12,915 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 20:28:12,916 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 20:28:12,916 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 20:28:12,916 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 20:28:12,917 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 20:28:12,917 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 20:28:12,918 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 20:28:12,918 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 20:28:12,919 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 20:28:12,919 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 20:28:12,919 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 20:28:12,920 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 20:28:12,920 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 20:28:12,921 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_c905dfa0-3eb3-415b-9499-3f6439dcfd0c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 20:28:12,932 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 20:28:12,933 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 20:28:12,934 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 20:28:12,934 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 20:28:12,934 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 20:28:12,934 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 20:28:12,935 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 20:28:12,935 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 20:28:12,935 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 20:28:12,935 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 20:28:12,935 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 20:28:12,936 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 20:28:12,936 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 20:28:12,936 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 20:28:12,936 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 20:28:12,936 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 20:28:12,937 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 20:28:12,937 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 20:28:12,937 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 20:28:12,937 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 20:28:12,937 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 20:28:12,938 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:28:12,938 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 20:28:12,938 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 20:28:12,938 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 20:28:12,938 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 20:28:12,939 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 20:28:12,939 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 20:28:12,939 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_c905dfa0-3eb3-415b-9499-3f6439dcfd0c/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ef37f6e42a6b5b21facb2aecbfff2cdd2e29a7ec [2019-11-15 20:28:12,963 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 20:28:12,972 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 20:28:12,975 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 20:28:12,976 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 20:28:12,977 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 20:28:12,977 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_c905dfa0-3eb3-415b-9499-3f6439dcfd0c/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix041_rmo.opt.i [2019-11-15 20:28:13,025 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c905dfa0-3eb3-415b-9499-3f6439dcfd0c/bin/uautomizer/data/c9ff9fd15/d46dce63605747518adc7da6c250b580/FLAG9e78d9799 [2019-11-15 20:28:13,484 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 20:28:13,485 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_c905dfa0-3eb3-415b-9499-3f6439dcfd0c/sv-benchmarks/c/pthread-wmm/mix041_rmo.opt.i [2019-11-15 20:28:13,503 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c905dfa0-3eb3-415b-9499-3f6439dcfd0c/bin/uautomizer/data/c9ff9fd15/d46dce63605747518adc7da6c250b580/FLAG9e78d9799 [2019-11-15 20:28:13,520 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_c905dfa0-3eb3-415b-9499-3f6439dcfd0c/bin/uautomizer/data/c9ff9fd15/d46dce63605747518adc7da6c250b580 [2019-11-15 20:28:13,523 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 20:28:13,524 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 20:28:13,525 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 20:28:13,525 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 20:28:13,528 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 20:28:13,529 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:28:13" (1/1) ... [2019-11-15 20:28:13,531 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@28445939 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:28:13, skipping insertion in model container [2019-11-15 20:28:13,531 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:28:13" (1/1) ... [2019-11-15 20:28:13,538 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 20:28:13,596 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 20:28:14,004 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:28:14,015 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 20:28:14,068 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:28:14,138 INFO L192 MainTranslator]: Completed translation [2019-11-15 20:28:14,138 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:28:14 WrapperNode [2019-11-15 20:28:14,139 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 20:28:14,139 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 20:28:14,140 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 20:28:14,140 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 20:28:14,148 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:28:14" (1/1) ... [2019-11-15 20:28:14,164 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:28:14" (1/1) ... [2019-11-15 20:28:14,200 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 20:28:14,201 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 20:28:14,201 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 20:28:14,201 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 20:28:14,210 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:28:14" (1/1) ... [2019-11-15 20:28:14,211 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:28:14" (1/1) ... [2019-11-15 20:28:14,214 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:28:14" (1/1) ... [2019-11-15 20:28:14,214 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:28:14" (1/1) ... [2019-11-15 20:28:14,223 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:28:14" (1/1) ... [2019-11-15 20:28:14,227 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:28:14" (1/1) ... [2019-11-15 20:28:14,230 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:28:14" (1/1) ... [2019-11-15 20:28:14,234 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 20:28:14,235 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 20:28:14,235 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 20:28:14,235 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 20:28:14,236 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:28:14" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_c905dfa0-3eb3-415b-9499-3f6439dcfd0c/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:28:14,301 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 20:28:14,301 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 20:28:14,302 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 20:28:14,302 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 20:28:14,302 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 20:28:14,302 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 20:28:14,303 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 20:28:14,303 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 20:28:14,303 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 20:28:14,303 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 20:28:14,304 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 20:28:14,305 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 20:28:14,956 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 20:28:14,957 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 20:28:14,958 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:28:14 BoogieIcfgContainer [2019-11-15 20:28:14,958 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 20:28:14,959 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 20:28:14,959 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 20:28:14,962 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 20:28:14,962 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 08:28:13" (1/3) ... [2019-11-15 20:28:14,962 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1e6ce64b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:28:14, skipping insertion in model container [2019-11-15 20:28:14,963 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:28:14" (2/3) ... [2019-11-15 20:28:14,963 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1e6ce64b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:28:14, skipping insertion in model container [2019-11-15 20:28:14,963 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:28:14" (3/3) ... [2019-11-15 20:28:14,964 INFO L109 eAbstractionObserver]: Analyzing ICFG mix041_rmo.opt.i [2019-11-15 20:28:15,018 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,018 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,018 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,018 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,019 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,019 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,019 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,019 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,019 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,020 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,020 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,020 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,020 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,020 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,020 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,021 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,021 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,021 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,021 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,021 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,021 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,022 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,022 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,022 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,022 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,022 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,023 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,023 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,023 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,023 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,024 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,024 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,024 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,024 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,025 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,025 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,025 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,025 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,026 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,027 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,027 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,027 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,027 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,028 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,028 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,028 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,029 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,029 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,029 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,030 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,030 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,030 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,030 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,030 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,031 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,031 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,031 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,031 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,032 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,032 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,032 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,033 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,033 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,033 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:28:15,039 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 20:28:15,040 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 20:28:15,046 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 20:28:15,054 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 20:28:15,072 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 20:28:15,072 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 20:28:15,072 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 20:28:15,073 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 20:28:15,073 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 20:28:15,073 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 20:28:15,073 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 20:28:15,074 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 20:28:15,093 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 141 places, 179 transitions [2019-11-15 20:28:16,282 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22495 states. [2019-11-15 20:28:16,284 INFO L276 IsEmpty]: Start isEmpty. Operand 22495 states. [2019-11-15 20:28:16,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-11-15 20:28:16,292 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:16,293 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:16,294 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:16,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:16,298 INFO L82 PathProgramCache]: Analyzing trace with hash -406661720, now seen corresponding path program 1 times [2019-11-15 20:28:16,303 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:16,304 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1367112724] [2019-11-15 20:28:16,304 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:16,304 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:16,304 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:16,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:16,574 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:16,574 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1367112724] [2019-11-15 20:28:16,575 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:16,575 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:28:16,576 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [660844888] [2019-11-15 20:28:16,580 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:28:16,580 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:16,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:28:16,593 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:28:16,595 INFO L87 Difference]: Start difference. First operand 22495 states. Second operand 4 states. [2019-11-15 20:28:17,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:17,086 INFO L93 Difference]: Finished difference Result 23447 states and 91748 transitions. [2019-11-15 20:28:17,086 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 20:28:17,088 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2019-11-15 20:28:17,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:17,334 INFO L225 Difference]: With dead ends: 23447 [2019-11-15 20:28:17,334 INFO L226 Difference]: Without dead ends: 21271 [2019-11-15 20:28:17,336 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:28:17,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21271 states. [2019-11-15 20:28:18,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21271 to 21271. [2019-11-15 20:28:18,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21271 states. [2019-11-15 20:28:18,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21271 states to 21271 states and 83772 transitions. [2019-11-15 20:28:18,572 INFO L78 Accepts]: Start accepts. Automaton has 21271 states and 83772 transitions. Word has length 38 [2019-11-15 20:28:18,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:18,573 INFO L462 AbstractCegarLoop]: Abstraction has 21271 states and 83772 transitions. [2019-11-15 20:28:18,573 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:28:18,573 INFO L276 IsEmpty]: Start isEmpty. Operand 21271 states and 83772 transitions. [2019-11-15 20:28:18,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-15 20:28:18,584 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:18,584 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:18,585 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:18,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:18,585 INFO L82 PathProgramCache]: Analyzing trace with hash 1166545859, now seen corresponding path program 1 times [2019-11-15 20:28:18,586 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:18,586 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [620818044] [2019-11-15 20:28:18,586 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:18,586 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:18,587 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:18,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:18,745 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:18,745 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [620818044] [2019-11-15 20:28:18,745 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:18,746 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:28:18,746 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1785253299] [2019-11-15 20:28:18,747 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:28:18,747 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:18,748 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:28:18,748 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:28:18,748 INFO L87 Difference]: Start difference. First operand 21271 states and 83772 transitions. Second operand 5 states. [2019-11-15 20:28:19,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:19,805 INFO L93 Difference]: Finished difference Result 34705 states and 129064 transitions. [2019-11-15 20:28:19,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:28:19,805 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-11-15 20:28:19,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:19,938 INFO L225 Difference]: With dead ends: 34705 [2019-11-15 20:28:19,938 INFO L226 Difference]: Without dead ends: 34561 [2019-11-15 20:28:19,939 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:28:20,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34561 states. [2019-11-15 20:28:20,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34561 to 33061. [2019-11-15 20:28:20,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33061 states. [2019-11-15 20:28:20,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33061 states to 33061 states and 123952 transitions. [2019-11-15 20:28:20,960 INFO L78 Accepts]: Start accepts. Automaton has 33061 states and 123952 transitions. Word has length 45 [2019-11-15 20:28:20,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:20,962 INFO L462 AbstractCegarLoop]: Abstraction has 33061 states and 123952 transitions. [2019-11-15 20:28:20,962 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:28:20,962 INFO L276 IsEmpty]: Start isEmpty. Operand 33061 states and 123952 transitions. [2019-11-15 20:28:20,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-11-15 20:28:20,966 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:20,966 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:20,967 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:20,967 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:20,967 INFO L82 PathProgramCache]: Analyzing trace with hash 56811971, now seen corresponding path program 1 times [2019-11-15 20:28:20,967 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:20,968 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [844297522] [2019-11-15 20:28:20,968 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:20,968 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:20,968 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:21,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:21,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:21,071 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [844297522] [2019-11-15 20:28:21,071 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:21,071 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:28:21,072 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [627904978] [2019-11-15 20:28:21,072 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:28:21,072 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:21,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:28:21,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:28:21,073 INFO L87 Difference]: Start difference. First operand 33061 states and 123952 transitions. Second operand 5 states. [2019-11-15 20:28:21,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:21,984 INFO L93 Difference]: Finished difference Result 40213 states and 148621 transitions. [2019-11-15 20:28:21,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:28:21,985 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2019-11-15 20:28:21,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:22,231 INFO L225 Difference]: With dead ends: 40213 [2019-11-15 20:28:22,232 INFO L226 Difference]: Without dead ends: 40053 [2019-11-15 20:28:22,232 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:28:22,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40053 states. [2019-11-15 20:28:23,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40053 to 34634. [2019-11-15 20:28:23,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34634 states. [2019-11-15 20:28:23,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34634 states to 34634 states and 129248 transitions. [2019-11-15 20:28:23,109 INFO L78 Accepts]: Start accepts. Automaton has 34634 states and 129248 transitions. Word has length 46 [2019-11-15 20:28:23,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:23,109 INFO L462 AbstractCegarLoop]: Abstraction has 34634 states and 129248 transitions. [2019-11-15 20:28:23,109 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:28:23,109 INFO L276 IsEmpty]: Start isEmpty. Operand 34634 states and 129248 transitions. [2019-11-15 20:28:23,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-15 20:28:23,120 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:23,120 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:23,120 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:23,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:23,121 INFO L82 PathProgramCache]: Analyzing trace with hash 37868766, now seen corresponding path program 1 times [2019-11-15 20:28:23,121 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:23,121 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2103813823] [2019-11-15 20:28:23,121 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:23,121 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:23,121 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:23,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:23,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:23,626 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2103813823] [2019-11-15 20:28:23,626 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:23,626 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:28:23,627 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [213677684] [2019-11-15 20:28:23,627 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:28:23,627 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:23,627 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:28:23,628 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:28:23,628 INFO L87 Difference]: Start difference. First operand 34634 states and 129248 transitions. Second operand 6 states. [2019-11-15 20:28:24,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:24,475 INFO L93 Difference]: Finished difference Result 45662 states and 166142 transitions. [2019-11-15 20:28:24,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 20:28:24,475 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-11-15 20:28:24,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:24,555 INFO L225 Difference]: With dead ends: 45662 [2019-11-15 20:28:24,555 INFO L226 Difference]: Without dead ends: 45518 [2019-11-15 20:28:24,556 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 20:28:24,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45518 states. [2019-11-15 20:28:25,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45518 to 33597. [2019-11-15 20:28:25,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33597 states. [2019-11-15 20:28:25,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33597 states to 33597 states and 125403 transitions. [2019-11-15 20:28:25,350 INFO L78 Accepts]: Start accepts. Automaton has 33597 states and 125403 transitions. Word has length 53 [2019-11-15 20:28:25,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:25,350 INFO L462 AbstractCegarLoop]: Abstraction has 33597 states and 125403 transitions. [2019-11-15 20:28:25,351 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:28:25,351 INFO L276 IsEmpty]: Start isEmpty. Operand 33597 states and 125403 transitions. [2019-11-15 20:28:25,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-15 20:28:25,382 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:25,382 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:25,383 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:25,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:25,383 INFO L82 PathProgramCache]: Analyzing trace with hash 743761970, now seen corresponding path program 1 times [2019-11-15 20:28:25,383 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:25,383 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1492731671] [2019-11-15 20:28:25,384 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:25,384 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:25,384 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:25,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:25,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:25,474 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1492731671] [2019-11-15 20:28:25,474 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:25,474 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:28:25,474 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [650867294] [2019-11-15 20:28:25,474 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:28:25,475 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:25,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:28:25,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:28:25,475 INFO L87 Difference]: Start difference. First operand 33597 states and 125403 transitions. Second operand 6 states. [2019-11-15 20:28:26,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:26,096 INFO L93 Difference]: Finished difference Result 46069 states and 167836 transitions. [2019-11-15 20:28:26,096 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 20:28:26,096 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-11-15 20:28:26,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:26,570 INFO L225 Difference]: With dead ends: 46069 [2019-11-15 20:28:26,570 INFO L226 Difference]: Without dead ends: 45829 [2019-11-15 20:28:26,570 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 20:28:26,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45829 states. [2019-11-15 20:28:27,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45829 to 39958. [2019-11-15 20:28:27,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39958 states. [2019-11-15 20:28:27,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39958 states to 39958 states and 147327 transitions. [2019-11-15 20:28:27,211 INFO L78 Accepts]: Start accepts. Automaton has 39958 states and 147327 transitions. Word has length 60 [2019-11-15 20:28:27,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:27,212 INFO L462 AbstractCegarLoop]: Abstraction has 39958 states and 147327 transitions. [2019-11-15 20:28:27,212 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:28:27,212 INFO L276 IsEmpty]: Start isEmpty. Operand 39958 states and 147327 transitions. [2019-11-15 20:28:27,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-11-15 20:28:27,245 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:27,245 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:27,245 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:27,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:27,246 INFO L82 PathProgramCache]: Analyzing trace with hash -1264518078, now seen corresponding path program 1 times [2019-11-15 20:28:27,246 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:27,246 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [633578345] [2019-11-15 20:28:27,246 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:27,246 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:27,247 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:27,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:27,295 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:27,296 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [633578345] [2019-11-15 20:28:27,296 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:27,296 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:28:27,296 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [765759941] [2019-11-15 20:28:27,297 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:28:27,297 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:27,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:28:27,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:28:27,298 INFO L87 Difference]: Start difference. First operand 39958 states and 147327 transitions. Second operand 3 states. [2019-11-15 20:28:27,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:27,508 INFO L93 Difference]: Finished difference Result 50256 states and 182162 transitions. [2019-11-15 20:28:27,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:28:27,509 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 62 [2019-11-15 20:28:27,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:27,601 INFO L225 Difference]: With dead ends: 50256 [2019-11-15 20:28:27,602 INFO L226 Difference]: Without dead ends: 50256 [2019-11-15 20:28:27,602 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:28:27,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50256 states. [2019-11-15 20:28:28,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50256 to 43888. [2019-11-15 20:28:28,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43888 states. [2019-11-15 20:28:28,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43888 states to 43888 states and 160765 transitions. [2019-11-15 20:28:28,695 INFO L78 Accepts]: Start accepts. Automaton has 43888 states and 160765 transitions. Word has length 62 [2019-11-15 20:28:28,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:28,695 INFO L462 AbstractCegarLoop]: Abstraction has 43888 states and 160765 transitions. [2019-11-15 20:28:28,695 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:28:28,696 INFO L276 IsEmpty]: Start isEmpty. Operand 43888 states and 160765 transitions. [2019-11-15 20:28:28,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 20:28:28,724 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:28,725 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:28,725 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:28,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:28,725 INFO L82 PathProgramCache]: Analyzing trace with hash -1180013829, now seen corresponding path program 1 times [2019-11-15 20:28:28,725 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:28,725 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [505298329] [2019-11-15 20:28:28,725 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:28,725 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:28,725 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:28,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:28,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:28,820 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [505298329] [2019-11-15 20:28:28,821 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:28,821 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:28:28,821 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1523503135] [2019-11-15 20:28:28,821 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:28:28,822 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:28,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:28:28,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:28:28,822 INFO L87 Difference]: Start difference. First operand 43888 states and 160765 transitions. Second operand 7 states. [2019-11-15 20:28:29,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:29,787 INFO L93 Difference]: Finished difference Result 55884 states and 200499 transitions. [2019-11-15 20:28:29,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 20:28:29,787 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-11-15 20:28:29,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:29,889 INFO L225 Difference]: With dead ends: 55884 [2019-11-15 20:28:29,889 INFO L226 Difference]: Without dead ends: 55644 [2019-11-15 20:28:29,889 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-15 20:28:30,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55644 states. [2019-11-15 20:28:30,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55644 to 45114. [2019-11-15 20:28:30,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45114 states. [2019-11-15 20:28:30,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45114 states to 45114 states and 164932 transitions. [2019-11-15 20:28:30,687 INFO L78 Accepts]: Start accepts. Automaton has 45114 states and 164932 transitions. Word has length 66 [2019-11-15 20:28:30,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:30,687 INFO L462 AbstractCegarLoop]: Abstraction has 45114 states and 164932 transitions. [2019-11-15 20:28:30,688 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:28:30,688 INFO L276 IsEmpty]: Start isEmpty. Operand 45114 states and 164932 transitions. [2019-11-15 20:28:30,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-11-15 20:28:30,722 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:30,722 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:30,722 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:30,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:30,723 INFO L82 PathProgramCache]: Analyzing trace with hash -1900883955, now seen corresponding path program 1 times [2019-11-15 20:28:30,723 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:30,723 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [795746463] [2019-11-15 20:28:30,723 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:30,723 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:30,724 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:30,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:30,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:30,827 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [795746463] [2019-11-15 20:28:30,827 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:30,828 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:28:30,828 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [529398592] [2019-11-15 20:28:30,828 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:28:30,828 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:30,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:28:30,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:28:30,829 INFO L87 Difference]: Start difference. First operand 45114 states and 164932 transitions. Second operand 7 states. [2019-11-15 20:28:32,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:32,193 INFO L93 Difference]: Finished difference Result 55098 states and 197676 transitions. [2019-11-15 20:28:32,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 20:28:32,194 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-11-15 20:28:32,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:32,297 INFO L225 Difference]: With dead ends: 55098 [2019-11-15 20:28:32,297 INFO L226 Difference]: Without dead ends: 54898 [2019-11-15 20:28:32,297 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-15 20:28:32,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54898 states. [2019-11-15 20:28:32,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54898 to 45992. [2019-11-15 20:28:32,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45992 states. [2019-11-15 20:28:33,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45992 states to 45992 states and 167803 transitions. [2019-11-15 20:28:33,064 INFO L78 Accepts]: Start accepts. Automaton has 45992 states and 167803 transitions. Word has length 67 [2019-11-15 20:28:33,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:33,064 INFO L462 AbstractCegarLoop]: Abstraction has 45992 states and 167803 transitions. [2019-11-15 20:28:33,064 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:28:33,064 INFO L276 IsEmpty]: Start isEmpty. Operand 45992 states and 167803 transitions. [2019-11-15 20:28:33,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 20:28:33,091 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:33,091 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:33,091 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:33,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:33,091 INFO L82 PathProgramCache]: Analyzing trace with hash 686474922, now seen corresponding path program 1 times [2019-11-15 20:28:33,091 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:33,091 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005415080] [2019-11-15 20:28:33,092 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:33,092 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:33,092 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:33,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:33,134 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:33,134 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1005415080] [2019-11-15 20:28:33,134 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:33,134 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:28:33,135 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1173424729] [2019-11-15 20:28:33,135 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:28:33,135 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:33,135 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:28:33,135 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:28:33,136 INFO L87 Difference]: Start difference. First operand 45992 states and 167803 transitions. Second operand 3 states. [2019-11-15 20:28:33,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:33,539 INFO L93 Difference]: Finished difference Result 61486 states and 224137 transitions. [2019-11-15 20:28:33,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:28:33,539 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-11-15 20:28:33,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:33,653 INFO L225 Difference]: With dead ends: 61486 [2019-11-15 20:28:33,653 INFO L226 Difference]: Without dead ends: 61486 [2019-11-15 20:28:33,654 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:28:33,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61486 states. [2019-11-15 20:28:34,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61486 to 53433. [2019-11-15 20:28:34,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53433 states. [2019-11-15 20:28:34,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53433 states to 53433 states and 195616 transitions. [2019-11-15 20:28:34,980 INFO L78 Accepts]: Start accepts. Automaton has 53433 states and 195616 transitions. Word has length 69 [2019-11-15 20:28:34,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:34,980 INFO L462 AbstractCegarLoop]: Abstraction has 53433 states and 195616 transitions. [2019-11-15 20:28:34,980 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:28:34,980 INFO L276 IsEmpty]: Start isEmpty. Operand 53433 states and 195616 transitions. [2019-11-15 20:28:35,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 20:28:35,019 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:35,019 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:35,019 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:35,020 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:35,020 INFO L82 PathProgramCache]: Analyzing trace with hash -2083836118, now seen corresponding path program 1 times [2019-11-15 20:28:35,020 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:35,020 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1536295072] [2019-11-15 20:28:35,020 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:35,021 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:35,021 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:35,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:35,132 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:35,133 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1536295072] [2019-11-15 20:28:35,133 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:35,133 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:28:35,133 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [933754154] [2019-11-15 20:28:35,134 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:28:35,134 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:35,134 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:28:35,134 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:28:35,134 INFO L87 Difference]: Start difference. First operand 53433 states and 195616 transitions. Second operand 6 states. [2019-11-15 20:28:35,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:35,728 INFO L93 Difference]: Finished difference Result 65982 states and 238830 transitions. [2019-11-15 20:28:35,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:28:35,729 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 69 [2019-11-15 20:28:35,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:35,847 INFO L225 Difference]: With dead ends: 65982 [2019-11-15 20:28:35,847 INFO L226 Difference]: Without dead ends: 65338 [2019-11-15 20:28:35,848 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:28:36,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65338 states. [2019-11-15 20:28:36,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65338 to 56042. [2019-11-15 20:28:36,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56042 states. [2019-11-15 20:28:36,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56042 states to 56042 states and 204333 transitions. [2019-11-15 20:28:36,802 INFO L78 Accepts]: Start accepts. Automaton has 56042 states and 204333 transitions. Word has length 69 [2019-11-15 20:28:36,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:36,802 INFO L462 AbstractCegarLoop]: Abstraction has 56042 states and 204333 transitions. [2019-11-15 20:28:36,802 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:28:36,802 INFO L276 IsEmpty]: Start isEmpty. Operand 56042 states and 204333 transitions. [2019-11-15 20:28:36,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 20:28:36,849 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:36,849 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:36,850 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:36,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:36,850 INFO L82 PathProgramCache]: Analyzing trace with hash -1122222101, now seen corresponding path program 1 times [2019-11-15 20:28:36,850 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:36,851 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1915488946] [2019-11-15 20:28:36,851 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:36,851 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:36,851 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:36,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:36,948 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:36,948 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1915488946] [2019-11-15 20:28:36,948 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:36,949 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:28:36,949 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1236754490] [2019-11-15 20:28:36,949 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:28:36,949 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:36,949 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:28:36,950 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:28:36,950 INFO L87 Difference]: Start difference. First operand 56042 states and 204333 transitions. Second operand 7 states. [2019-11-15 20:28:38,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:38,041 INFO L93 Difference]: Finished difference Result 83030 states and 292761 transitions. [2019-11-15 20:28:38,041 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 20:28:38,041 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 69 [2019-11-15 20:28:38,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:38,228 INFO L225 Difference]: With dead ends: 83030 [2019-11-15 20:28:38,228 INFO L226 Difference]: Without dead ends: 83030 [2019-11-15 20:28:38,228 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:28:38,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83030 states. [2019-11-15 20:28:39,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83030 to 76079. [2019-11-15 20:28:39,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76079 states. [2019-11-15 20:28:39,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76079 states to 76079 states and 270628 transitions. [2019-11-15 20:28:39,986 INFO L78 Accepts]: Start accepts. Automaton has 76079 states and 270628 transitions. Word has length 69 [2019-11-15 20:28:39,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:39,987 INFO L462 AbstractCegarLoop]: Abstraction has 76079 states and 270628 transitions. [2019-11-15 20:28:39,987 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:28:39,987 INFO L276 IsEmpty]: Start isEmpty. Operand 76079 states and 270628 transitions. [2019-11-15 20:28:40,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 20:28:40,036 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:40,037 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:40,037 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:40,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:40,037 INFO L82 PathProgramCache]: Analyzing trace with hash 122542380, now seen corresponding path program 1 times [2019-11-15 20:28:40,037 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:40,038 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1960772716] [2019-11-15 20:28:40,038 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:40,038 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:40,038 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:40,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:40,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:40,094 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1960772716] [2019-11-15 20:28:40,094 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:40,094 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:28:40,094 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1529924530] [2019-11-15 20:28:40,095 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:28:40,095 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:40,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:28:40,095 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:28:40,095 INFO L87 Difference]: Start difference. First operand 76079 states and 270628 transitions. Second operand 3 states. [2019-11-15 20:28:40,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:40,347 INFO L93 Difference]: Finished difference Result 54415 states and 197409 transitions. [2019-11-15 20:28:40,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:28:40,348 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-11-15 20:28:40,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:40,448 INFO L225 Difference]: With dead ends: 54415 [2019-11-15 20:28:40,448 INFO L226 Difference]: Without dead ends: 54253 [2019-11-15 20:28:40,448 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:28:40,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54253 states. [2019-11-15 20:28:41,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54253 to 54213. [2019-11-15 20:28:41,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54213 states. [2019-11-15 20:28:41,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54213 states to 54213 states and 196824 transitions. [2019-11-15 20:28:41,347 INFO L78 Accepts]: Start accepts. Automaton has 54213 states and 196824 transitions. Word has length 69 [2019-11-15 20:28:41,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:41,348 INFO L462 AbstractCegarLoop]: Abstraction has 54213 states and 196824 transitions. [2019-11-15 20:28:41,348 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:28:41,348 INFO L276 IsEmpty]: Start isEmpty. Operand 54213 states and 196824 transitions. [2019-11-15 20:28:41,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 20:28:41,380 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:41,380 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:41,380 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:41,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:41,380 INFO L82 PathProgramCache]: Analyzing trace with hash 1415482492, now seen corresponding path program 1 times [2019-11-15 20:28:41,381 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:41,381 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184924702] [2019-11-15 20:28:41,381 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:41,381 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:41,381 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:41,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:41,464 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:41,465 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [184924702] [2019-11-15 20:28:41,465 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:41,465 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:28:41,465 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [583809399] [2019-11-15 20:28:41,465 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:28:41,465 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:41,465 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:28:41,466 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:28:41,466 INFO L87 Difference]: Start difference. First operand 54213 states and 196824 transitions. Second operand 5 states. [2019-11-15 20:28:42,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:42,106 INFO L93 Difference]: Finished difference Result 84428 states and 303656 transitions. [2019-11-15 20:28:42,106 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:28:42,106 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2019-11-15 20:28:42,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:42,262 INFO L225 Difference]: With dead ends: 84428 [2019-11-15 20:28:42,262 INFO L226 Difference]: Without dead ends: 84232 [2019-11-15 20:28:42,262 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:28:42,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84232 states. [2019-11-15 20:28:43,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84232 to 76147. [2019-11-15 20:28:43,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76147 states. [2019-11-15 20:28:43,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76147 states to 76147 states and 275544 transitions. [2019-11-15 20:28:44,000 INFO L78 Accepts]: Start accepts. Automaton has 76147 states and 275544 transitions. Word has length 70 [2019-11-15 20:28:44,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:44,000 INFO L462 AbstractCegarLoop]: Abstraction has 76147 states and 275544 transitions. [2019-11-15 20:28:44,000 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:28:44,000 INFO L276 IsEmpty]: Start isEmpty. Operand 76147 states and 275544 transitions. [2019-11-15 20:28:44,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 20:28:44,048 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:44,048 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:44,048 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:44,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:44,049 INFO L82 PathProgramCache]: Analyzing trace with hash -1634720323, now seen corresponding path program 1 times [2019-11-15 20:28:44,049 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:44,049 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [92848681] [2019-11-15 20:28:44,049 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:44,049 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:44,050 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:44,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:44,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:44,113 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [92848681] [2019-11-15 20:28:44,113 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:44,113 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:28:44,113 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [548829663] [2019-11-15 20:28:44,114 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:28:44,114 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:44,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:28:44,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:28:44,114 INFO L87 Difference]: Start difference. First operand 76147 states and 275544 transitions. Second operand 4 states. [2019-11-15 20:28:44,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:44,216 INFO L93 Difference]: Finished difference Result 19615 states and 62265 transitions. [2019-11-15 20:28:44,216 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:28:44,216 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 70 [2019-11-15 20:28:44,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:44,251 INFO L225 Difference]: With dead ends: 19615 [2019-11-15 20:28:44,251 INFO L226 Difference]: Without dead ends: 19137 [2019-11-15 20:28:44,252 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:28:44,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19137 states. [2019-11-15 20:28:44,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19137 to 19125. [2019-11-15 20:28:44,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19125 states. [2019-11-15 20:28:44,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19125 states to 19125 states and 60760 transitions. [2019-11-15 20:28:44,561 INFO L78 Accepts]: Start accepts. Automaton has 19125 states and 60760 transitions. Word has length 70 [2019-11-15 20:28:44,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:44,562 INFO L462 AbstractCegarLoop]: Abstraction has 19125 states and 60760 transitions. [2019-11-15 20:28:44,562 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:28:44,562 INFO L276 IsEmpty]: Start isEmpty. Operand 19125 states and 60760 transitions. [2019-11-15 20:28:44,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 20:28:44,580 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:44,580 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:44,580 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:44,580 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:44,581 INFO L82 PathProgramCache]: Analyzing trace with hash -880182413, now seen corresponding path program 1 times [2019-11-15 20:28:44,581 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:44,581 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1347911858] [2019-11-15 20:28:44,581 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:44,581 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:44,581 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:44,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:44,666 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:44,667 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1347911858] [2019-11-15 20:28:44,667 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:44,667 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:28:44,667 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1384971221] [2019-11-15 20:28:44,667 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:28:44,667 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:44,668 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:28:44,668 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:28:44,668 INFO L87 Difference]: Start difference. First operand 19125 states and 60760 transitions. Second operand 4 states. [2019-11-15 20:28:44,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:44,915 INFO L93 Difference]: Finished difference Result 24075 states and 75428 transitions. [2019-11-15 20:28:44,915 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:28:44,915 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-11-15 20:28:44,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:44,946 INFO L225 Difference]: With dead ends: 24075 [2019-11-15 20:28:44,946 INFO L226 Difference]: Without dead ends: 24075 [2019-11-15 20:28:44,947 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:28:44,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24075 states. [2019-11-15 20:28:45,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24075 to 19965. [2019-11-15 20:28:45,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19965 states. [2019-11-15 20:28:45,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19965 states to 19965 states and 63127 transitions. [2019-11-15 20:28:45,199 INFO L78 Accepts]: Start accepts. Automaton has 19965 states and 63127 transitions. Word has length 79 [2019-11-15 20:28:45,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:45,199 INFO L462 AbstractCegarLoop]: Abstraction has 19965 states and 63127 transitions. [2019-11-15 20:28:45,199 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:28:45,199 INFO L276 IsEmpty]: Start isEmpty. Operand 19965 states and 63127 transitions. [2019-11-15 20:28:45,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 20:28:45,212 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:45,212 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:45,212 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:45,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:45,213 INFO L82 PathProgramCache]: Analyzing trace with hash -1134918958, now seen corresponding path program 1 times [2019-11-15 20:28:45,213 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:45,213 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [757100191] [2019-11-15 20:28:45,213 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:45,213 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:45,213 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:45,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:45,297 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:45,297 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [757100191] [2019-11-15 20:28:45,297 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:45,297 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:28:45,297 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [722675376] [2019-11-15 20:28:45,298 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:28:45,298 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:45,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:28:45,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:28:45,298 INFO L87 Difference]: Start difference. First operand 19965 states and 63127 transitions. Second operand 8 states. [2019-11-15 20:28:46,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:46,086 INFO L93 Difference]: Finished difference Result 22071 states and 69319 transitions. [2019-11-15 20:28:46,086 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-11-15 20:28:46,086 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 79 [2019-11-15 20:28:46,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:46,115 INFO L225 Difference]: With dead ends: 22071 [2019-11-15 20:28:46,115 INFO L226 Difference]: Without dead ends: 22023 [2019-11-15 20:28:46,115 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=102, Invalid=404, Unknown=0, NotChecked=0, Total=506 [2019-11-15 20:28:46,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22023 states. [2019-11-15 20:28:46,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22023 to 19437. [2019-11-15 20:28:46,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19437 states. [2019-11-15 20:28:46,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19437 states to 19437 states and 61629 transitions. [2019-11-15 20:28:46,354 INFO L78 Accepts]: Start accepts. Automaton has 19437 states and 61629 transitions. Word has length 79 [2019-11-15 20:28:46,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:46,355 INFO L462 AbstractCegarLoop]: Abstraction has 19437 states and 61629 transitions. [2019-11-15 20:28:46,355 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:28:46,355 INFO L276 IsEmpty]: Start isEmpty. Operand 19437 states and 61629 transitions. [2019-11-15 20:28:46,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 20:28:46,371 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:46,372 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:46,372 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:46,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:46,372 INFO L82 PathProgramCache]: Analyzing trace with hash 2041767061, now seen corresponding path program 1 times [2019-11-15 20:28:46,373 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:46,373 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1631618622] [2019-11-15 20:28:46,373 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:46,373 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:46,373 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:46,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:46,472 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:46,472 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1631618622] [2019-11-15 20:28:46,472 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:46,472 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:28:46,473 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [68425586] [2019-11-15 20:28:46,473 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:28:46,473 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:46,473 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:28:46,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:28:46,474 INFO L87 Difference]: Start difference. First operand 19437 states and 61629 transitions. Second operand 8 states. [2019-11-15 20:28:48,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:48,240 INFO L93 Difference]: Finished difference Result 50431 states and 153647 transitions. [2019-11-15 20:28:48,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-11-15 20:28:48,240 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 82 [2019-11-15 20:28:48,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:48,319 INFO L225 Difference]: With dead ends: 50431 [2019-11-15 20:28:48,319 INFO L226 Difference]: Without dead ends: 49732 [2019-11-15 20:28:48,319 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=153, Invalid=497, Unknown=0, NotChecked=0, Total=650 [2019-11-15 20:28:48,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49732 states. [2019-11-15 20:28:48,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49732 to 29965. [2019-11-15 20:28:48,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29965 states. [2019-11-15 20:28:48,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29965 states to 29965 states and 93559 transitions. [2019-11-15 20:28:48,840 INFO L78 Accepts]: Start accepts. Automaton has 29965 states and 93559 transitions. Word has length 82 [2019-11-15 20:28:48,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:48,840 INFO L462 AbstractCegarLoop]: Abstraction has 29965 states and 93559 transitions. [2019-11-15 20:28:48,840 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:28:48,840 INFO L276 IsEmpty]: Start isEmpty. Operand 29965 states and 93559 transitions. [2019-11-15 20:28:48,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 20:28:48,867 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:48,867 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:48,867 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:48,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:48,867 INFO L82 PathProgramCache]: Analyzing trace with hash -1291586218, now seen corresponding path program 1 times [2019-11-15 20:28:48,867 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:48,868 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1033966399] [2019-11-15 20:28:48,868 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:48,868 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:48,868 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:48,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:48,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:48,958 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1033966399] [2019-11-15 20:28:48,958 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:48,959 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:28:48,959 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1258308667] [2019-11-15 20:28:48,959 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:28:48,959 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:48,960 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:28:48,960 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:28:48,960 INFO L87 Difference]: Start difference. First operand 29965 states and 93559 transitions. Second operand 6 states. [2019-11-15 20:28:49,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:49,595 INFO L93 Difference]: Finished difference Result 31403 states and 97496 transitions. [2019-11-15 20:28:49,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:28:49,596 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-11-15 20:28:49,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:49,668 INFO L225 Difference]: With dead ends: 31403 [2019-11-15 20:28:49,668 INFO L226 Difference]: Without dead ends: 31403 [2019-11-15 20:28:49,669 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:28:49,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31403 states. [2019-11-15 20:28:50,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31403 to 29634. [2019-11-15 20:28:50,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29634 states. [2019-11-15 20:28:50,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29634 states to 29634 states and 92402 transitions. [2019-11-15 20:28:50,315 INFO L78 Accepts]: Start accepts. Automaton has 29634 states and 92402 transitions. Word has length 82 [2019-11-15 20:28:50,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:50,315 INFO L462 AbstractCegarLoop]: Abstraction has 29634 states and 92402 transitions. [2019-11-15 20:28:50,315 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:28:50,315 INFO L276 IsEmpty]: Start isEmpty. Operand 29634 states and 92402 transitions. [2019-11-15 20:28:50,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 20:28:50,347 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:50,347 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:50,347 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:50,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:50,347 INFO L82 PathProgramCache]: Analyzing trace with hash 1067720791, now seen corresponding path program 1 times [2019-11-15 20:28:50,347 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:50,348 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1678799011] [2019-11-15 20:28:50,348 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:50,348 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:50,348 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:50,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:50,725 WARN L191 SmtUtils]: Spent 292.00 ms on a formula simplification. DAG size of input: 14 DAG size of output: 9 [2019-11-15 20:28:50,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:50,735 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1678799011] [2019-11-15 20:28:50,735 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:50,735 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:28:50,735 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1887516124] [2019-11-15 20:28:50,736 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:28:50,736 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:50,736 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:28:50,736 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:28:50,736 INFO L87 Difference]: Start difference. First operand 29634 states and 92402 transitions. Second operand 7 states. [2019-11-15 20:28:51,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:51,224 INFO L93 Difference]: Finished difference Result 31148 states and 96558 transitions. [2019-11-15 20:28:51,225 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 20:28:51,225 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 82 [2019-11-15 20:28:51,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:51,271 INFO L225 Difference]: With dead ends: 31148 [2019-11-15 20:28:51,271 INFO L226 Difference]: Without dead ends: 31148 [2019-11-15 20:28:51,271 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:28:51,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31148 states. [2019-11-15 20:28:51,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31148 to 29966. [2019-11-15 20:28:51,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29966 states. [2019-11-15 20:28:51,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29966 states to 29966 states and 93233 transitions. [2019-11-15 20:28:51,632 INFO L78 Accepts]: Start accepts. Automaton has 29966 states and 93233 transitions. Word has length 82 [2019-11-15 20:28:51,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:51,633 INFO L462 AbstractCegarLoop]: Abstraction has 29966 states and 93233 transitions. [2019-11-15 20:28:51,633 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:28:51,633 INFO L276 IsEmpty]: Start isEmpty. Operand 29966 states and 93233 transitions. [2019-11-15 20:28:51,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 20:28:51,660 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:51,660 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:51,660 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:51,661 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:51,661 INFO L82 PathProgramCache]: Analyzing trace with hash 1397486552, now seen corresponding path program 1 times [2019-11-15 20:28:51,661 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:51,661 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1707049876] [2019-11-15 20:28:51,661 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:51,662 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:51,662 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:51,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:51,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:51,701 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1707049876] [2019-11-15 20:28:51,701 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:51,701 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:28:51,701 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1019824072] [2019-11-15 20:28:51,702 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:28:51,702 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:51,702 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:28:51,702 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:28:51,702 INFO L87 Difference]: Start difference. First operand 29966 states and 93233 transitions. Second operand 3 states. [2019-11-15 20:28:51,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:51,790 INFO L93 Difference]: Finished difference Result 21487 states and 66270 transitions. [2019-11-15 20:28:51,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:28:51,791 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 82 [2019-11-15 20:28:51,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:51,820 INFO L225 Difference]: With dead ends: 21487 [2019-11-15 20:28:51,820 INFO L226 Difference]: Without dead ends: 21487 [2019-11-15 20:28:51,821 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:28:51,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21487 states. [2019-11-15 20:28:52,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21487 to 21164. [2019-11-15 20:28:52,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21164 states. [2019-11-15 20:28:52,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21164 states to 21164 states and 65321 transitions. [2019-11-15 20:28:52,074 INFO L78 Accepts]: Start accepts. Automaton has 21164 states and 65321 transitions. Word has length 82 [2019-11-15 20:28:52,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:52,075 INFO L462 AbstractCegarLoop]: Abstraction has 21164 states and 65321 transitions. [2019-11-15 20:28:52,075 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:28:52,075 INFO L276 IsEmpty]: Start isEmpty. Operand 21164 states and 65321 transitions. [2019-11-15 20:28:52,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:28:52,091 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:52,091 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:52,091 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:52,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:52,092 INFO L82 PathProgramCache]: Analyzing trace with hash -747582475, now seen corresponding path program 1 times [2019-11-15 20:28:52,092 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:52,092 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1197402424] [2019-11-15 20:28:52,092 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:52,092 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:52,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:52,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:52,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:52,202 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1197402424] [2019-11-15 20:28:52,202 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:52,202 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:28:52,203 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2013515385] [2019-11-15 20:28:52,203 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:28:52,203 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:52,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:28:52,204 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:28:52,204 INFO L87 Difference]: Start difference. First operand 21164 states and 65321 transitions. Second operand 6 states. [2019-11-15 20:28:52,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:52,602 INFO L93 Difference]: Finished difference Result 21680 states and 66675 transitions. [2019-11-15 20:28:52,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:28:52,603 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 83 [2019-11-15 20:28:52,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:52,642 INFO L225 Difference]: With dead ends: 21680 [2019-11-15 20:28:52,642 INFO L226 Difference]: Without dead ends: 21680 [2019-11-15 20:28:52,642 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:28:52,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21680 states. [2019-11-15 20:28:52,956 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21680 to 20940. [2019-11-15 20:28:52,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20940 states. [2019-11-15 20:28:53,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20940 states to 20940 states and 64680 transitions. [2019-11-15 20:28:53,004 INFO L78 Accepts]: Start accepts. Automaton has 20940 states and 64680 transitions. Word has length 83 [2019-11-15 20:28:53,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:53,004 INFO L462 AbstractCegarLoop]: Abstraction has 20940 states and 64680 transitions. [2019-11-15 20:28:53,004 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:28:53,004 INFO L276 IsEmpty]: Start isEmpty. Operand 20940 states and 64680 transitions. [2019-11-15 20:28:53,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:28:53,028 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:53,028 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:53,028 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:53,028 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:53,028 INFO L82 PathProgramCache]: Analyzing trace with hash -417816714, now seen corresponding path program 1 times [2019-11-15 20:28:53,029 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:53,031 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1904216883] [2019-11-15 20:28:53,031 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:53,031 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:53,031 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:53,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:53,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:53,106 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1904216883] [2019-11-15 20:28:53,106 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:53,106 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:28:53,106 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [338224297] [2019-11-15 20:28:53,107 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:28:53,107 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:53,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:28:53,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:28:53,107 INFO L87 Difference]: Start difference. First operand 20940 states and 64680 transitions. Second operand 5 states. [2019-11-15 20:28:53,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:53,155 INFO L93 Difference]: Finished difference Result 3087 states and 7649 transitions. [2019-11-15 20:28:53,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:28:53,155 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 83 [2019-11-15 20:28:53,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:53,159 INFO L225 Difference]: With dead ends: 3087 [2019-11-15 20:28:53,159 INFO L226 Difference]: Without dead ends: 2723 [2019-11-15 20:28:53,159 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:28:53,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2723 states. [2019-11-15 20:28:53,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2723 to 2586. [2019-11-15 20:28:53,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2586 states. [2019-11-15 20:28:53,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2586 states to 2586 states and 6370 transitions. [2019-11-15 20:28:53,193 INFO L78 Accepts]: Start accepts. Automaton has 2586 states and 6370 transitions. Word has length 83 [2019-11-15 20:28:53,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:53,194 INFO L462 AbstractCegarLoop]: Abstraction has 2586 states and 6370 transitions. [2019-11-15 20:28:53,194 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:28:53,194 INFO L276 IsEmpty]: Start isEmpty. Operand 2586 states and 6370 transitions. [2019-11-15 20:28:53,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:28:53,197 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:53,197 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:53,197 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:53,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:53,198 INFO L82 PathProgramCache]: Analyzing trace with hash -631939479, now seen corresponding path program 1 times [2019-11-15 20:28:53,198 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:53,198 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1959086006] [2019-11-15 20:28:53,198 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:53,198 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:53,199 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:53,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:53,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:53,261 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1959086006] [2019-11-15 20:28:53,262 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:53,262 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:28:53,262 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [281901033] [2019-11-15 20:28:53,264 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:28:53,264 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:53,264 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:28:53,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:28:53,265 INFO L87 Difference]: Start difference. First operand 2586 states and 6370 transitions. Second operand 4 states. [2019-11-15 20:28:53,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:53,390 INFO L93 Difference]: Finished difference Result 2952 states and 7207 transitions. [2019-11-15 20:28:53,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 20:28:53,390 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-11-15 20:28:53,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:53,394 INFO L225 Difference]: With dead ends: 2952 [2019-11-15 20:28:53,394 INFO L226 Difference]: Without dead ends: 2952 [2019-11-15 20:28:53,394 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:28:53,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2952 states. [2019-11-15 20:28:53,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2952 to 2676. [2019-11-15 20:28:53,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2676 states. [2019-11-15 20:28:53,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2676 states to 2676 states and 6574 transitions. [2019-11-15 20:28:53,430 INFO L78 Accepts]: Start accepts. Automaton has 2676 states and 6574 transitions. Word has length 96 [2019-11-15 20:28:53,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:53,431 INFO L462 AbstractCegarLoop]: Abstraction has 2676 states and 6574 transitions. [2019-11-15 20:28:53,431 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:28:53,431 INFO L276 IsEmpty]: Start isEmpty. Operand 2676 states and 6574 transitions. [2019-11-15 20:28:53,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:28:53,434 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:53,434 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:53,435 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:53,435 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:53,436 INFO L82 PathProgramCache]: Analyzing trace with hash -1080636118, now seen corresponding path program 1 times [2019-11-15 20:28:53,436 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:53,436 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [94589573] [2019-11-15 20:28:53,436 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:53,436 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:53,437 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:53,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:53,545 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:53,546 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [94589573] [2019-11-15 20:28:53,546 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:53,546 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:28:53,546 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [634861392] [2019-11-15 20:28:53,547 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:28:53,547 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:53,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:28:53,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:28:53,548 INFO L87 Difference]: Start difference. First operand 2676 states and 6574 transitions. Second operand 6 states. [2019-11-15 20:28:53,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:53,659 INFO L93 Difference]: Finished difference Result 2923 states and 7049 transitions. [2019-11-15 20:28:53,659 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:28:53,659 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-15 20:28:53,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:53,663 INFO L225 Difference]: With dead ends: 2923 [2019-11-15 20:28:53,663 INFO L226 Difference]: Without dead ends: 2895 [2019-11-15 20:28:53,665 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:28:53,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2895 states. [2019-11-15 20:28:53,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2895 to 2745. [2019-11-15 20:28:53,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2745 states. [2019-11-15 20:28:53,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2745 states to 2745 states and 6681 transitions. [2019-11-15 20:28:53,702 INFO L78 Accepts]: Start accepts. Automaton has 2745 states and 6681 transitions. Word has length 96 [2019-11-15 20:28:53,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:53,703 INFO L462 AbstractCegarLoop]: Abstraction has 2745 states and 6681 transitions. [2019-11-15 20:28:53,703 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:28:53,703 INFO L276 IsEmpty]: Start isEmpty. Operand 2745 states and 6681 transitions. [2019-11-15 20:28:53,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:28:53,706 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:53,706 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:53,706 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:53,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:53,707 INFO L82 PathProgramCache]: Analyzing trace with hash 1513590699, now seen corresponding path program 1 times [2019-11-15 20:28:53,707 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:53,707 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1626817121] [2019-11-15 20:28:53,707 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:53,708 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:53,708 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:53,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:53,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:53,818 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1626817121] [2019-11-15 20:28:53,818 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:53,818 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:28:53,819 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1570056895] [2019-11-15 20:28:53,819 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:28:53,819 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:53,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:28:53,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:28:53,820 INFO L87 Difference]: Start difference. First operand 2745 states and 6681 transitions. Second operand 6 states. [2019-11-15 20:28:54,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:54,016 INFO L93 Difference]: Finished difference Result 3061 states and 7301 transitions. [2019-11-15 20:28:54,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 20:28:54,016 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-15 20:28:54,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:54,019 INFO L225 Difference]: With dead ends: 3061 [2019-11-15 20:28:54,019 INFO L226 Difference]: Without dead ends: 3061 [2019-11-15 20:28:54,019 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 20:28:54,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3061 states. [2019-11-15 20:28:54,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3061 to 2827. [2019-11-15 20:28:54,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2827 states. [2019-11-15 20:28:54,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2827 states to 2827 states and 6836 transitions. [2019-11-15 20:28:54,045 INFO L78 Accepts]: Start accepts. Automaton has 2827 states and 6836 transitions. Word has length 96 [2019-11-15 20:28:54,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:54,045 INFO L462 AbstractCegarLoop]: Abstraction has 2827 states and 6836 transitions. [2019-11-15 20:28:54,045 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:28:54,045 INFO L276 IsEmpty]: Start isEmpty. Operand 2827 states and 6836 transitions. [2019-11-15 20:28:54,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:28:54,047 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:54,047 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:54,047 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:54,047 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:54,048 INFO L82 PathProgramCache]: Analyzing trace with hash -422069588, now seen corresponding path program 1 times [2019-11-15 20:28:54,048 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:54,048 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1194043807] [2019-11-15 20:28:54,048 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:54,048 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:54,049 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:54,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:54,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:54,165 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1194043807] [2019-11-15 20:28:54,166 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:54,166 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:28:54,166 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1198733663] [2019-11-15 20:28:54,166 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:28:54,167 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:54,167 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:28:54,167 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:28:54,167 INFO L87 Difference]: Start difference. First operand 2827 states and 6836 transitions. Second operand 7 states. [2019-11-15 20:28:54,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:54,504 INFO L93 Difference]: Finished difference Result 3242 states and 7686 transitions. [2019-11-15 20:28:54,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:28:54,505 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2019-11-15 20:28:54,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:54,507 INFO L225 Difference]: With dead ends: 3242 [2019-11-15 20:28:54,508 INFO L226 Difference]: Without dead ends: 3242 [2019-11-15 20:28:54,508 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2019-11-15 20:28:54,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3242 states. [2019-11-15 20:28:54,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3242 to 2987. [2019-11-15 20:28:54,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2987 states. [2019-11-15 20:28:54,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2987 states to 2987 states and 7163 transitions. [2019-11-15 20:28:54,535 INFO L78 Accepts]: Start accepts. Automaton has 2987 states and 7163 transitions. Word has length 96 [2019-11-15 20:28:54,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:54,535 INFO L462 AbstractCegarLoop]: Abstraction has 2987 states and 7163 transitions. [2019-11-15 20:28:54,535 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:28:54,535 INFO L276 IsEmpty]: Start isEmpty. Operand 2987 states and 7163 transitions. [2019-11-15 20:28:54,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:28:54,537 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:54,538 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:54,538 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:54,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:54,538 INFO L82 PathProgramCache]: Analyzing trace with hash -2102407668, now seen corresponding path program 1 times [2019-11-15 20:28:54,538 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:54,538 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [116254833] [2019-11-15 20:28:54,538 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:54,538 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:54,538 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:54,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:54,595 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:54,595 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [116254833] [2019-11-15 20:28:54,596 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:54,596 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:28:54,596 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1538760024] [2019-11-15 20:28:54,596 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:28:54,597 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:54,597 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:28:54,597 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:28:54,597 INFO L87 Difference]: Start difference. First operand 2987 states and 7163 transitions. Second operand 4 states. [2019-11-15 20:28:54,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:54,807 INFO L93 Difference]: Finished difference Result 3302 states and 7880 transitions. [2019-11-15 20:28:54,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:28:54,807 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-11-15 20:28:54,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:54,811 INFO L225 Difference]: With dead ends: 3302 [2019-11-15 20:28:54,811 INFO L226 Difference]: Without dead ends: 3266 [2019-11-15 20:28:54,812 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:28:54,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3266 states. [2019-11-15 20:28:54,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3266 to 2987. [2019-11-15 20:28:54,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2987 states. [2019-11-15 20:28:54,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2987 states to 2987 states and 7145 transitions. [2019-11-15 20:28:54,852 INFO L78 Accepts]: Start accepts. Automaton has 2987 states and 7145 transitions. Word has length 96 [2019-11-15 20:28:54,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:54,852 INFO L462 AbstractCegarLoop]: Abstraction has 2987 states and 7145 transitions. [2019-11-15 20:28:54,852 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:28:54,852 INFO L276 IsEmpty]: Start isEmpty. Operand 2987 states and 7145 transitions. [2019-11-15 20:28:54,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:28:54,855 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:54,856 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:54,856 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:54,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:54,856 INFO L82 PathProgramCache]: Analyzing trace with hash 1909409164, now seen corresponding path program 1 times [2019-11-15 20:28:54,857 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:54,857 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [32400302] [2019-11-15 20:28:54,857 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:54,857 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:54,857 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:54,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:54,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:54,931 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [32400302] [2019-11-15 20:28:54,931 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:54,931 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:28:54,931 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [658127354] [2019-11-15 20:28:54,931 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:28:54,932 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:54,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:28:54,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:28:54,932 INFO L87 Difference]: Start difference. First operand 2987 states and 7145 transitions. Second operand 5 states. [2019-11-15 20:28:55,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:55,127 INFO L93 Difference]: Finished difference Result 2663 states and 6218 transitions. [2019-11-15 20:28:55,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:28:55,127 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2019-11-15 20:28:55,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:55,130 INFO L225 Difference]: With dead ends: 2663 [2019-11-15 20:28:55,131 INFO L226 Difference]: Without dead ends: 2645 [2019-11-15 20:28:55,131 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:28:55,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2645 states. [2019-11-15 20:28:55,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2645 to 2161. [2019-11-15 20:28:55,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2161 states. [2019-11-15 20:28:55,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2161 states to 2161 states and 5097 transitions. [2019-11-15 20:28:55,161 INFO L78 Accepts]: Start accepts. Automaton has 2161 states and 5097 transitions. Word has length 96 [2019-11-15 20:28:55,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:55,162 INFO L462 AbstractCegarLoop]: Abstraction has 2161 states and 5097 transitions. [2019-11-15 20:28:55,162 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:28:55,162 INFO L276 IsEmpty]: Start isEmpty. Operand 2161 states and 5097 transitions. [2019-11-15 20:28:55,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:28:55,164 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:55,165 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:55,165 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:55,165 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:55,165 INFO L82 PathProgramCache]: Analyzing trace with hash -1140793651, now seen corresponding path program 1 times [2019-11-15 20:28:55,166 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:55,166 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [935595491] [2019-11-15 20:28:55,166 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:55,166 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:55,166 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:55,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:55,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:55,259 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [935595491] [2019-11-15 20:28:55,259 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:55,260 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:28:55,260 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [717088737] [2019-11-15 20:28:55,260 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:28:55,260 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:55,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:28:55,261 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:28:55,261 INFO L87 Difference]: Start difference. First operand 2161 states and 5097 transitions. Second operand 4 states. [2019-11-15 20:28:55,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:55,282 INFO L93 Difference]: Finished difference Result 2018 states and 4743 transitions. [2019-11-15 20:28:55,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 20:28:55,283 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-11-15 20:28:55,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:55,286 INFO L225 Difference]: With dead ends: 2018 [2019-11-15 20:28:55,286 INFO L226 Difference]: Without dead ends: 2018 [2019-11-15 20:28:55,287 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:28:55,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2018 states. [2019-11-15 20:28:55,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2018 to 1996. [2019-11-15 20:28:55,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1996 states. [2019-11-15 20:28:55,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1996 states to 1996 states and 4698 transitions. [2019-11-15 20:28:55,311 INFO L78 Accepts]: Start accepts. Automaton has 1996 states and 4698 transitions. Word has length 96 [2019-11-15 20:28:55,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:55,311 INFO L462 AbstractCegarLoop]: Abstraction has 1996 states and 4698 transitions. [2019-11-15 20:28:55,311 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:28:55,311 INFO L276 IsEmpty]: Start isEmpty. Operand 1996 states and 4698 transitions. [2019-11-15 20:28:55,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:28:55,312 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:55,312 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:55,313 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:55,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:55,313 INFO L82 PathProgramCache]: Analyzing trace with hash -1361875699, now seen corresponding path program 1 times [2019-11-15 20:28:55,313 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:55,313 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1617756498] [2019-11-15 20:28:55,313 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:55,313 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:55,313 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:55,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:55,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:55,422 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1617756498] [2019-11-15 20:28:55,422 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:55,423 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:28:55,423 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [12551075] [2019-11-15 20:28:55,423 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:28:55,423 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:55,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:28:55,424 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:28:55,424 INFO L87 Difference]: Start difference. First operand 1996 states and 4698 transitions. Second operand 6 states. [2019-11-15 20:28:55,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:55,598 INFO L93 Difference]: Finished difference Result 2180 states and 5063 transitions. [2019-11-15 20:28:55,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 20:28:55,598 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-15 20:28:55,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:55,600 INFO L225 Difference]: With dead ends: 2180 [2019-11-15 20:28:55,600 INFO L226 Difference]: Without dead ends: 2180 [2019-11-15 20:28:55,600 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2019-11-15 20:28:55,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2180 states. [2019-11-15 20:28:55,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2180 to 2019. [2019-11-15 20:28:55,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2019 states. [2019-11-15 20:28:55,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2019 states to 2019 states and 4745 transitions. [2019-11-15 20:28:55,618 INFO L78 Accepts]: Start accepts. Automaton has 2019 states and 4745 transitions. Word has length 96 [2019-11-15 20:28:55,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:55,618 INFO L462 AbstractCegarLoop]: Abstraction has 2019 states and 4745 transitions. [2019-11-15 20:28:55,618 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:28:55,618 INFO L276 IsEmpty]: Start isEmpty. Operand 2019 states and 4745 transitions. [2019-11-15 20:28:55,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:28:55,619 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:55,619 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:55,619 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:55,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:55,620 INFO L82 PathProgramCache]: Analyzing trace with hash -1032109938, now seen corresponding path program 1 times [2019-11-15 20:28:55,620 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:55,620 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1804065749] [2019-11-15 20:28:55,620 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:55,620 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:55,620 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:55,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:28:55,718 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:28:55,718 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1804065749] [2019-11-15 20:28:55,719 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:28:55,720 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:28:55,720 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [539996220] [2019-11-15 20:28:55,720 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:28:55,720 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:28:55,721 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:28:55,721 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:28:55,721 INFO L87 Difference]: Start difference. First operand 2019 states and 4745 transitions. Second operand 7 states. [2019-11-15 20:28:55,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:28:55,816 INFO L93 Difference]: Finished difference Result 3310 states and 7881 transitions. [2019-11-15 20:28:55,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:28:55,817 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2019-11-15 20:28:55,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:28:55,818 INFO L225 Difference]: With dead ends: 3310 [2019-11-15 20:28:55,818 INFO L226 Difference]: Without dead ends: 1372 [2019-11-15 20:28:55,819 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-11-15 20:28:55,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1372 states. [2019-11-15 20:28:55,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1372 to 1372. [2019-11-15 20:28:55,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1372 states. [2019-11-15 20:28:55,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1372 states to 1372 states and 3268 transitions. [2019-11-15 20:28:55,835 INFO L78 Accepts]: Start accepts. Automaton has 1372 states and 3268 transitions. Word has length 96 [2019-11-15 20:28:55,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:28:55,835 INFO L462 AbstractCegarLoop]: Abstraction has 1372 states and 3268 transitions. [2019-11-15 20:28:55,836 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:28:55,836 INFO L276 IsEmpty]: Start isEmpty. Operand 1372 states and 3268 transitions. [2019-11-15 20:28:55,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:28:55,837 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:28:55,837 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:28:55,838 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:28:55,838 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:28:55,838 INFO L82 PathProgramCache]: Analyzing trace with hash 1574294956, now seen corresponding path program 2 times [2019-11-15 20:28:55,840 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:28:55,843 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1853743612] [2019-11-15 20:28:55,843 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:55,843 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:28:55,843 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:28:55,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:28:55,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:28:55,960 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 20:28:55,960 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 20:28:56,128 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 20:28:56,129 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 08:28:56 BasicIcfg [2019-11-15 20:28:56,129 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 20:28:56,130 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 20:28:56,130 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 20:28:56,130 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 20:28:56,131 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:28:14" (3/4) ... [2019-11-15 20:28:56,132 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 20:28:56,240 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_c905dfa0-3eb3-415b-9499-3f6439dcfd0c/bin/uautomizer/witness.graphml [2019-11-15 20:28:56,240 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 20:28:56,242 INFO L168 Benchmark]: Toolchain (without parser) took 42717.99 ms. Allocated memory was 1.0 GB in the beginning and 4.4 GB in the end (delta: 3.4 GB). Free memory was 940.7 MB in the beginning and 1.9 GB in the end (delta: -993.8 MB). Peak memory consumption was 2.4 GB. Max. memory is 11.5 GB. [2019-11-15 20:28:56,242 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:28:56,242 INFO L168 Benchmark]: CACSL2BoogieTranslator took 614.30 ms. Allocated memory is still 1.0 GB. Free memory was 940.7 MB in the beginning and 973.4 MB in the end (delta: -32.7 MB). Peak memory consumption was 17.7 MB. Max. memory is 11.5 GB. [2019-11-15 20:28:56,243 INFO L168 Benchmark]: Boogie Procedure Inliner took 61.02 ms. Allocated memory is still 1.0 GB. Free memory was 973.4 MB in the beginning and 968.1 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-11-15 20:28:56,243 INFO L168 Benchmark]: Boogie Preprocessor took 33.89 ms. Allocated memory is still 1.0 GB. Free memory is still 968.1 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:28:56,243 INFO L168 Benchmark]: RCFGBuilder took 723.42 ms. Allocated memory is still 1.0 GB. Free memory was 968.1 MB in the beginning and 916.8 MB in the end (delta: 51.3 MB). Peak memory consumption was 51.3 MB. Max. memory is 11.5 GB. [2019-11-15 20:28:56,244 INFO L168 Benchmark]: TraceAbstraction took 41170.63 ms. Allocated memory was 1.0 GB in the beginning and 4.4 GB in the end (delta: 3.4 GB). Free memory was 916.8 MB in the beginning and 2.0 GB in the end (delta: -1.1 GB). Peak memory consumption was 2.3 GB. Max. memory is 11.5 GB. [2019-11-15 20:28:56,244 INFO L168 Benchmark]: Witness Printer took 110.67 ms. Allocated memory is still 4.4 GB. Free memory was 2.0 GB in the beginning and 1.9 GB in the end (delta: 85.6 MB). Peak memory consumption was 85.6 MB. Max. memory is 11.5 GB. [2019-11-15 20:28:56,246 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 614.30 ms. Allocated memory is still 1.0 GB. Free memory was 940.7 MB in the beginning and 973.4 MB in the end (delta: -32.7 MB). Peak memory consumption was 17.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 61.02 ms. Allocated memory is still 1.0 GB. Free memory was 973.4 MB in the beginning and 968.1 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 33.89 ms. Allocated memory is still 1.0 GB. Free memory is still 968.1 MB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 723.42 ms. Allocated memory is still 1.0 GB. Free memory was 968.1 MB in the beginning and 916.8 MB in the end (delta: 51.3 MB). Peak memory consumption was 51.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 41170.63 ms. Allocated memory was 1.0 GB in the beginning and 4.4 GB in the end (delta: 3.4 GB). Free memory was 916.8 MB in the beginning and 2.0 GB in the end (delta: -1.1 GB). Peak memory consumption was 2.3 GB. Max. memory is 11.5 GB. * Witness Printer took 110.67 ms. Allocated memory is still 4.4 GB. Free memory was 2.0 GB in the beginning and 1.9 GB in the end (delta: 85.6 MB). Peak memory consumption was 85.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L698] 0 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L699] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L700] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L702] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L703] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L704] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L705] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L706] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L707] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L708] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L709] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L710] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L711] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L712] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L713] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L714] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L715] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L716] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L718] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L720] 0 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L721] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L722] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L788] 0 pthread_t t1099; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L789] FCALL, FORK 0 pthread_create(&t1099, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L790] 0 pthread_t t1100; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L791] FCALL, FORK 0 pthread_create(&t1100, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L746] 2 x$w_buff1 = x$w_buff0 [L747] 2 x$w_buff0 = 2 [L748] 2 x$w_buff1_used = x$w_buff0_used [L749] 2 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L751] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L752] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L753] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L754] 2 x$r_buff0_thd2 = (_Bool)1 [L757] 2 y = 1 [L760] 2 __unbuffered_p1_EAX = y [L763] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L726] 1 z = 1 [L729] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L732] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=1, z=1] [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=1, z=1] [L732] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L733] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L733] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L766] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L734] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L734] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L766] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L767] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L767] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L768] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L768] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L769] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L769] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L770] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L770] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L773] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L735] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L735] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L736] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L736] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L739] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L793] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L798] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L798] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L799] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L799] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L800] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L800] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L801] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L801] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L804] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L805] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L806] 0 x$flush_delayed = weak$$choice2 [L807] 0 x$mem_tmp = x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L808] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L808] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L809] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L809] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L810] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L810] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L811] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L811] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L812] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L812] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L813] EXPR 0 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L813] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L814] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L814] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L815] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L816] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L816] 0 x = x$flush_delayed ? x$mem_tmp : x [L817] 0 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 177 locations, 3 error locations. Result: UNSAFE, OverallTime: 41.0s, OverallIterations: 32, TraceHistogramMax: 1, AutomataDifference: 18.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8185 SDtfs, 8346 SDslu, 18519 SDs, 0 SdLazy, 8698 SolverSat, 571 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 329 GetRequests, 84 SyntacticMatches, 22 SemanticMatches, 223 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 471 ImplicationChecksByTransitivity, 2.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=76147occurred in iteration=13, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 17.1s AutomataMinimizationTime, 31 MinimizatonAttempts, 115427 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.4s InterpolantComputationTime, 2465 NumberOfCodeBlocks, 2465 NumberOfCodeBlocksAsserted, 32 NumberOfCheckSat, 2338 ConstructedInterpolants, 0 QuantifiedInterpolants, 436842 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 31 InterpolantComputations, 31 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...