./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix041_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_f15f361e-4939-4c63-a917-20ee2759dc52/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_f15f361e-4939-4c63-a917-20ee2759dc52/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_f15f361e-4939-4c63-a917-20ee2759dc52/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_f15f361e-4939-4c63-a917-20ee2759dc52/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix041_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_f15f361e-4939-4c63-a917-20ee2759dc52/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_f15f361e-4939-4c63-a917-20ee2759dc52/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7c6033aa6346c59a83961473df6de1c0dd1f6556 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 23:56:04,551 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 23:56:04,553 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 23:56:04,563 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 23:56:04,563 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 23:56:04,564 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 23:56:04,565 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 23:56:04,567 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 23:56:04,569 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 23:56:04,570 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 23:56:04,571 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 23:56:04,572 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 23:56:04,573 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 23:56:04,574 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 23:56:04,574 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 23:56:04,575 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 23:56:04,576 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 23:56:04,577 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 23:56:04,578 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 23:56:04,580 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 23:56:04,582 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 23:56:04,583 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 23:56:04,584 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 23:56:04,584 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 23:56:04,587 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 23:56:04,587 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 23:56:04,587 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 23:56:04,588 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 23:56:04,588 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 23:56:04,589 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 23:56:04,589 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 23:56:04,590 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 23:56:04,591 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 23:56:04,591 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 23:56:04,592 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 23:56:04,593 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 23:56:04,593 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 23:56:04,593 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 23:56:04,593 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 23:56:04,594 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 23:56:04,595 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 23:56:04,596 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_f15f361e-4939-4c63-a917-20ee2759dc52/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 23:56:04,608 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 23:56:04,608 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 23:56:04,611 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 23:56:04,611 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 23:56:04,612 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 23:56:04,612 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 23:56:04,612 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 23:56:04,612 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 23:56:04,612 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 23:56:04,613 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 23:56:04,614 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 23:56:04,614 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 23:56:04,614 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 23:56:04,614 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 23:56:04,614 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 23:56:04,615 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 23:56:04,615 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 23:56:04,615 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 23:56:04,615 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 23:56:04,615 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 23:56:04,616 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 23:56:04,616 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 23:56:04,616 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 23:56:04,617 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 23:56:04,617 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 23:56:04,617 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 23:56:04,617 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 23:56:04,618 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 23:56:04,618 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_f15f361e-4939-4c63-a917-20ee2759dc52/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7c6033aa6346c59a83961473df6de1c0dd1f6556 [2019-11-15 23:56:04,680 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 23:56:04,689 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 23:56:04,692 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 23:56:04,693 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 23:56:04,694 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 23:56:04,694 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_f15f361e-4939-4c63-a917-20ee2759dc52/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix041_tso.oepc.i [2019-11-15 23:56:04,754 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f15f361e-4939-4c63-a917-20ee2759dc52/bin/uautomizer/data/8122eaeb6/2f52a57968c344f08e1dc2d33da238f7/FLAG0ac4390b1 [2019-11-15 23:56:05,219 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 23:56:05,220 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_f15f361e-4939-4c63-a917-20ee2759dc52/sv-benchmarks/c/pthread-wmm/mix041_tso.oepc.i [2019-11-15 23:56:05,238 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f15f361e-4939-4c63-a917-20ee2759dc52/bin/uautomizer/data/8122eaeb6/2f52a57968c344f08e1dc2d33da238f7/FLAG0ac4390b1 [2019-11-15 23:56:05,537 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_f15f361e-4939-4c63-a917-20ee2759dc52/bin/uautomizer/data/8122eaeb6/2f52a57968c344f08e1dc2d33da238f7 [2019-11-15 23:56:05,540 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 23:56:05,540 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 23:56:05,541 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 23:56:05,542 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 23:56:05,545 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 23:56:05,546 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 11:56:05" (1/1) ... [2019-11-15 23:56:05,548 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@61d986c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:56:05, skipping insertion in model container [2019-11-15 23:56:05,548 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 11:56:05" (1/1) ... [2019-11-15 23:56:05,555 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 23:56:05,619 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 23:56:06,056 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 23:56:06,069 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 23:56:06,143 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 23:56:06,208 INFO L192 MainTranslator]: Completed translation [2019-11-15 23:56:06,208 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:56:06 WrapperNode [2019-11-15 23:56:06,208 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 23:56:06,209 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 23:56:06,209 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 23:56:06,209 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 23:56:06,217 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:56:06" (1/1) ... [2019-11-15 23:56:06,234 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:56:06" (1/1) ... [2019-11-15 23:56:06,266 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 23:56:06,266 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 23:56:06,266 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 23:56:06,266 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 23:56:06,274 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:56:06" (1/1) ... [2019-11-15 23:56:06,274 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:56:06" (1/1) ... [2019-11-15 23:56:06,279 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:56:06" (1/1) ... [2019-11-15 23:56:06,279 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:56:06" (1/1) ... [2019-11-15 23:56:06,289 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:56:06" (1/1) ... [2019-11-15 23:56:06,292 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:56:06" (1/1) ... [2019-11-15 23:56:06,296 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:56:06" (1/1) ... [2019-11-15 23:56:06,301 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 23:56:06,301 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 23:56:06,301 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 23:56:06,301 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 23:56:06,303 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:56:06" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_f15f361e-4939-4c63-a917-20ee2759dc52/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 23:56:06,380 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 23:56:06,380 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 23:56:06,380 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 23:56:06,380 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 23:56:06,382 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 23:56:06,382 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 23:56:06,382 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 23:56:06,382 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 23:56:06,382 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 23:56:06,383 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 23:56:06,385 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 23:56:06,387 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 23:56:06,998 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 23:56:06,998 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 23:56:06,999 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 11:56:06 BoogieIcfgContainer [2019-11-15 23:56:07,000 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 23:56:07,000 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 23:56:07,001 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 23:56:07,003 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 23:56:07,004 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 11:56:05" (1/3) ... [2019-11-15 23:56:07,004 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6300470a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 11:56:07, skipping insertion in model container [2019-11-15 23:56:07,004 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:56:06" (2/3) ... [2019-11-15 23:56:07,005 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6300470a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 11:56:07, skipping insertion in model container [2019-11-15 23:56:07,005 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 11:56:06" (3/3) ... [2019-11-15 23:56:07,011 INFO L109 eAbstractionObserver]: Analyzing ICFG mix041_tso.oepc.i [2019-11-15 23:56:07,067 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,067 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,068 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,068 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,068 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,068 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,068 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,069 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,069 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,069 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,069 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,069 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,070 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,070 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,070 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,070 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,070 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,070 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,071 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,071 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,071 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,071 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,071 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,071 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,072 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,072 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,072 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,072 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,073 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,073 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,074 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,074 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,074 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,074 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,074 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,074 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,075 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,075 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,076 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,077 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,077 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,077 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,078 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,078 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,078 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,078 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,079 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,079 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,080 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,080 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,080 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,080 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,080 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,080 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,081 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,082 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,082 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,082 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,082 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,082 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,082 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,083 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,083 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,083 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:56:07,089 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 23:56:07,090 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 23:56:07,100 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 23:56:07,110 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 23:56:07,130 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 23:56:07,130 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 23:56:07,130 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 23:56:07,131 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 23:56:07,131 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 23:56:07,131 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 23:56:07,131 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 23:56:07,131 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 23:56:07,142 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 141 places, 179 transitions [2019-11-15 23:56:08,685 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22495 states. [2019-11-15 23:56:08,687 INFO L276 IsEmpty]: Start isEmpty. Operand 22495 states. [2019-11-15 23:56:08,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-11-15 23:56:08,696 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:08,697 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:08,699 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:08,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:08,704 INFO L82 PathProgramCache]: Analyzing trace with hash -406661720, now seen corresponding path program 1 times [2019-11-15 23:56:08,711 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:08,712 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1239662990] [2019-11-15 23:56:08,712 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:08,712 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:08,713 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:08,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:09,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:09,030 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1239662990] [2019-11-15 23:56:09,031 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:09,032 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:56:09,032 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1268416693] [2019-11-15 23:56:09,036 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:56:09,037 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:09,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:56:09,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:56:09,053 INFO L87 Difference]: Start difference. First operand 22495 states. Second operand 4 states. [2019-11-15 23:56:09,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:09,657 INFO L93 Difference]: Finished difference Result 23447 states and 91748 transitions. [2019-11-15 23:56:09,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:56:09,659 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2019-11-15 23:56:09,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:09,881 INFO L225 Difference]: With dead ends: 23447 [2019-11-15 23:56:09,881 INFO L226 Difference]: Without dead ends: 21271 [2019-11-15 23:56:09,883 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:56:10,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21271 states. [2019-11-15 23:56:11,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21271 to 21271. [2019-11-15 23:56:11,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21271 states. [2019-11-15 23:56:11,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21271 states to 21271 states and 83772 transitions. [2019-11-15 23:56:11,134 INFO L78 Accepts]: Start accepts. Automaton has 21271 states and 83772 transitions. Word has length 38 [2019-11-15 23:56:11,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:11,135 INFO L462 AbstractCegarLoop]: Abstraction has 21271 states and 83772 transitions. [2019-11-15 23:56:11,135 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:56:11,135 INFO L276 IsEmpty]: Start isEmpty. Operand 21271 states and 83772 transitions. [2019-11-15 23:56:11,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-15 23:56:11,145 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:11,145 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:11,145 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:11,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:11,146 INFO L82 PathProgramCache]: Analyzing trace with hash 1166545859, now seen corresponding path program 1 times [2019-11-15 23:56:11,146 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:11,146 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1262321670] [2019-11-15 23:56:11,146 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:11,147 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:11,147 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:11,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:11,258 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:11,258 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1262321670] [2019-11-15 23:56:11,259 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:11,259 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:56:11,259 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1521656402] [2019-11-15 23:56:11,260 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:56:11,260 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:11,261 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:56:11,261 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:56:11,261 INFO L87 Difference]: Start difference. First operand 21271 states and 83772 transitions. Second operand 5 states. [2019-11-15 23:56:12,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:12,201 INFO L93 Difference]: Finished difference Result 34705 states and 129064 transitions. [2019-11-15 23:56:12,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:56:12,201 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-11-15 23:56:12,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:12,347 INFO L225 Difference]: With dead ends: 34705 [2019-11-15 23:56:12,347 INFO L226 Difference]: Without dead ends: 34561 [2019-11-15 23:56:12,349 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:56:12,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34561 states. [2019-11-15 23:56:13,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34561 to 33061. [2019-11-15 23:56:13,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33061 states. [2019-11-15 23:56:13,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33061 states to 33061 states and 123952 transitions. [2019-11-15 23:56:13,627 INFO L78 Accepts]: Start accepts. Automaton has 33061 states and 123952 transitions. Word has length 45 [2019-11-15 23:56:13,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:13,628 INFO L462 AbstractCegarLoop]: Abstraction has 33061 states and 123952 transitions. [2019-11-15 23:56:13,628 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:56:13,629 INFO L276 IsEmpty]: Start isEmpty. Operand 33061 states and 123952 transitions. [2019-11-15 23:56:13,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-11-15 23:56:13,634 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:13,634 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:13,634 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:13,635 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:13,635 INFO L82 PathProgramCache]: Analyzing trace with hash 56811971, now seen corresponding path program 1 times [2019-11-15 23:56:13,635 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:13,636 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [874759988] [2019-11-15 23:56:13,636 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:13,636 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:13,636 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:13,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:13,753 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:13,754 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [874759988] [2019-11-15 23:56:13,754 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:13,754 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:56:13,754 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1546520690] [2019-11-15 23:56:13,755 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:56:13,755 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:13,755 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:56:13,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:56:13,755 INFO L87 Difference]: Start difference. First operand 33061 states and 123952 transitions. Second operand 5 states. [2019-11-15 23:56:14,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:14,350 INFO L93 Difference]: Finished difference Result 40213 states and 148621 transitions. [2019-11-15 23:56:14,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:56:14,350 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2019-11-15 23:56:14,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:15,033 INFO L225 Difference]: With dead ends: 40213 [2019-11-15 23:56:15,033 INFO L226 Difference]: Without dead ends: 40053 [2019-11-15 23:56:15,034 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:56:15,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40053 states. [2019-11-15 23:56:15,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40053 to 34634. [2019-11-15 23:56:15,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34634 states. [2019-11-15 23:56:15,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34634 states to 34634 states and 129248 transitions. [2019-11-15 23:56:15,964 INFO L78 Accepts]: Start accepts. Automaton has 34634 states and 129248 transitions. Word has length 46 [2019-11-15 23:56:15,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:15,964 INFO L462 AbstractCegarLoop]: Abstraction has 34634 states and 129248 transitions. [2019-11-15 23:56:15,964 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:56:15,964 INFO L276 IsEmpty]: Start isEmpty. Operand 34634 states and 129248 transitions. [2019-11-15 23:56:15,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-15 23:56:15,976 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:15,976 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:15,976 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:15,977 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:15,977 INFO L82 PathProgramCache]: Analyzing trace with hash 37868766, now seen corresponding path program 1 times [2019-11-15 23:56:15,977 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:15,977 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1951375659] [2019-11-15 23:56:15,978 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:15,978 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:15,978 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:15,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:16,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:16,058 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1951375659] [2019-11-15 23:56:16,058 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:16,059 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:56:16,059 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1948677691] [2019-11-15 23:56:16,059 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:56:16,059 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:16,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:56:16,060 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:56:16,060 INFO L87 Difference]: Start difference. First operand 34634 states and 129248 transitions. Second operand 6 states. [2019-11-15 23:56:17,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:17,433 INFO L93 Difference]: Finished difference Result 45662 states and 166142 transitions. [2019-11-15 23:56:17,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 23:56:17,433 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-11-15 23:56:17,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:17,591 INFO L225 Difference]: With dead ends: 45662 [2019-11-15 23:56:17,591 INFO L226 Difference]: Without dead ends: 45518 [2019-11-15 23:56:17,592 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 23:56:17,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45518 states. [2019-11-15 23:56:18,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45518 to 33597. [2019-11-15 23:56:18,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33597 states. [2019-11-15 23:56:18,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33597 states to 33597 states and 125403 transitions. [2019-11-15 23:56:18,394 INFO L78 Accepts]: Start accepts. Automaton has 33597 states and 125403 transitions. Word has length 53 [2019-11-15 23:56:18,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:18,394 INFO L462 AbstractCegarLoop]: Abstraction has 33597 states and 125403 transitions. [2019-11-15 23:56:18,394 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:56:18,394 INFO L276 IsEmpty]: Start isEmpty. Operand 33597 states and 125403 transitions. [2019-11-15 23:56:18,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-15 23:56:18,426 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:18,426 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:18,426 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:18,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:18,427 INFO L82 PathProgramCache]: Analyzing trace with hash 743761970, now seen corresponding path program 1 times [2019-11-15 23:56:18,427 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:18,427 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [238561619] [2019-11-15 23:56:18,427 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:18,427 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:18,428 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:18,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:18,505 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:18,506 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [238561619] [2019-11-15 23:56:18,507 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:18,507 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:56:18,507 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [587449153] [2019-11-15 23:56:18,508 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:56:18,508 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:18,508 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:56:18,509 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:56:18,509 INFO L87 Difference]: Start difference. First operand 33597 states and 125403 transitions. Second operand 6 states. [2019-11-15 23:56:19,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:19,079 INFO L93 Difference]: Finished difference Result 46069 states and 167836 transitions. [2019-11-15 23:56:19,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 23:56:19,080 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-11-15 23:56:19,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:19,185 INFO L225 Difference]: With dead ends: 46069 [2019-11-15 23:56:19,185 INFO L226 Difference]: Without dead ends: 45829 [2019-11-15 23:56:19,186 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 23:56:19,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45829 states. [2019-11-15 23:56:20,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45829 to 39958. [2019-11-15 23:56:20,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39958 states. [2019-11-15 23:56:20,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39958 states to 39958 states and 147327 transitions. [2019-11-15 23:56:20,434 INFO L78 Accepts]: Start accepts. Automaton has 39958 states and 147327 transitions. Word has length 60 [2019-11-15 23:56:20,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:20,435 INFO L462 AbstractCegarLoop]: Abstraction has 39958 states and 147327 transitions. [2019-11-15 23:56:20,435 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:56:20,435 INFO L276 IsEmpty]: Start isEmpty. Operand 39958 states and 147327 transitions. [2019-11-15 23:56:20,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-11-15 23:56:20,467 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:20,468 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:20,468 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:20,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:20,468 INFO L82 PathProgramCache]: Analyzing trace with hash -1264518078, now seen corresponding path program 1 times [2019-11-15 23:56:20,469 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:20,469 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [920234731] [2019-11-15 23:56:20,469 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:20,469 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:20,469 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:20,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:20,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:20,509 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [920234731] [2019-11-15 23:56:20,509 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:20,509 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:56:20,509 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [931966219] [2019-11-15 23:56:20,510 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:56:20,510 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:20,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:56:20,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:56:20,510 INFO L87 Difference]: Start difference. First operand 39958 states and 147327 transitions. Second operand 3 states. [2019-11-15 23:56:20,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:20,709 INFO L93 Difference]: Finished difference Result 50256 states and 182162 transitions. [2019-11-15 23:56:20,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:56:20,710 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 62 [2019-11-15 23:56:20,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:20,803 INFO L225 Difference]: With dead ends: 50256 [2019-11-15 23:56:20,803 INFO L226 Difference]: Without dead ends: 50256 [2019-11-15 23:56:20,804 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:56:20,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50256 states. [2019-11-15 23:56:21,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50256 to 43888. [2019-11-15 23:56:21,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43888 states. [2019-11-15 23:56:22,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43888 states to 43888 states and 160765 transitions. [2019-11-15 23:56:22,006 INFO L78 Accepts]: Start accepts. Automaton has 43888 states and 160765 transitions. Word has length 62 [2019-11-15 23:56:22,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:22,006 INFO L462 AbstractCegarLoop]: Abstraction has 43888 states and 160765 transitions. [2019-11-15 23:56:22,006 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:56:22,006 INFO L276 IsEmpty]: Start isEmpty. Operand 43888 states and 160765 transitions. [2019-11-15 23:56:22,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 23:56:22,037 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:22,037 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:22,037 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:22,038 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:22,038 INFO L82 PathProgramCache]: Analyzing trace with hash -1180013829, now seen corresponding path program 1 times [2019-11-15 23:56:22,038 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:22,038 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1249302492] [2019-11-15 23:56:22,038 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:22,038 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:22,038 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:22,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:22,125 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:22,125 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1249302492] [2019-11-15 23:56:22,125 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:22,125 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:56:22,125 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1508801530] [2019-11-15 23:56:22,126 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:56:22,126 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:22,126 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:56:22,126 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:56:22,127 INFO L87 Difference]: Start difference. First operand 43888 states and 160765 transitions. Second operand 7 states. [2019-11-15 23:56:23,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:23,039 INFO L93 Difference]: Finished difference Result 55884 states and 200499 transitions. [2019-11-15 23:56:23,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 23:56:23,039 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-11-15 23:56:23,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:23,149 INFO L225 Difference]: With dead ends: 55884 [2019-11-15 23:56:23,149 INFO L226 Difference]: Without dead ends: 55644 [2019-11-15 23:56:23,149 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-15 23:56:23,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55644 states. [2019-11-15 23:56:23,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55644 to 45114. [2019-11-15 23:56:23,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45114 states. [2019-11-15 23:56:23,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45114 states to 45114 states and 164932 transitions. [2019-11-15 23:56:23,951 INFO L78 Accepts]: Start accepts. Automaton has 45114 states and 164932 transitions. Word has length 66 [2019-11-15 23:56:23,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:23,951 INFO L462 AbstractCegarLoop]: Abstraction has 45114 states and 164932 transitions. [2019-11-15 23:56:23,951 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:56:23,951 INFO L276 IsEmpty]: Start isEmpty. Operand 45114 states and 164932 transitions. [2019-11-15 23:56:23,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-11-15 23:56:23,981 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:23,981 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:23,981 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:23,981 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:23,982 INFO L82 PathProgramCache]: Analyzing trace with hash -1900883955, now seen corresponding path program 1 times [2019-11-15 23:56:23,982 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:23,982 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616455997] [2019-11-15 23:56:23,982 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:23,982 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:23,982 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:23,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:24,059 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:24,060 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616455997] [2019-11-15 23:56:24,060 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:24,060 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:56:24,060 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [781685899] [2019-11-15 23:56:24,061 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:56:24,061 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:24,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:56:24,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:56:24,062 INFO L87 Difference]: Start difference. First operand 45114 states and 164932 transitions. Second operand 7 states. [2019-11-15 23:56:25,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:25,405 INFO L93 Difference]: Finished difference Result 55098 states and 197676 transitions. [2019-11-15 23:56:25,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 23:56:25,406 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-11-15 23:56:25,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:25,512 INFO L225 Difference]: With dead ends: 55098 [2019-11-15 23:56:25,512 INFO L226 Difference]: Without dead ends: 54898 [2019-11-15 23:56:25,512 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-15 23:56:25,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54898 states. [2019-11-15 23:56:26,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54898 to 45992. [2019-11-15 23:56:26,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45992 states. [2019-11-15 23:56:26,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45992 states to 45992 states and 167803 transitions. [2019-11-15 23:56:26,306 INFO L78 Accepts]: Start accepts. Automaton has 45992 states and 167803 transitions. Word has length 67 [2019-11-15 23:56:26,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:26,306 INFO L462 AbstractCegarLoop]: Abstraction has 45992 states and 167803 transitions. [2019-11-15 23:56:26,306 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:56:26,307 INFO L276 IsEmpty]: Start isEmpty. Operand 45992 states and 167803 transitions. [2019-11-15 23:56:26,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 23:56:26,336 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:26,336 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:26,336 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:26,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:26,337 INFO L82 PathProgramCache]: Analyzing trace with hash 686474922, now seen corresponding path program 1 times [2019-11-15 23:56:26,337 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:26,337 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2112775518] [2019-11-15 23:56:26,337 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:26,337 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:26,338 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:26,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:26,412 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:26,412 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2112775518] [2019-11-15 23:56:26,413 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:26,413 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:56:26,413 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [516040657] [2019-11-15 23:56:26,413 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:56:26,413 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:26,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:56:26,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:56:26,414 INFO L87 Difference]: Start difference. First operand 45992 states and 167803 transitions. Second operand 3 states. [2019-11-15 23:56:26,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:26,787 INFO L93 Difference]: Finished difference Result 61486 states and 224137 transitions. [2019-11-15 23:56:26,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:56:26,787 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-11-15 23:56:26,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:26,918 INFO L225 Difference]: With dead ends: 61486 [2019-11-15 23:56:26,918 INFO L226 Difference]: Without dead ends: 61486 [2019-11-15 23:56:26,919 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:56:27,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61486 states. [2019-11-15 23:56:28,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61486 to 53433. [2019-11-15 23:56:28,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53433 states. [2019-11-15 23:56:28,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53433 states to 53433 states and 195616 transitions. [2019-11-15 23:56:28,380 INFO L78 Accepts]: Start accepts. Automaton has 53433 states and 195616 transitions. Word has length 69 [2019-11-15 23:56:28,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:28,380 INFO L462 AbstractCegarLoop]: Abstraction has 53433 states and 195616 transitions. [2019-11-15 23:56:28,380 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:56:28,380 INFO L276 IsEmpty]: Start isEmpty. Operand 53433 states and 195616 transitions. [2019-11-15 23:56:28,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 23:56:28,425 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:28,425 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:28,426 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:28,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:28,426 INFO L82 PathProgramCache]: Analyzing trace with hash -2083836118, now seen corresponding path program 1 times [2019-11-15 23:56:28,426 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:28,427 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [395170396] [2019-11-15 23:56:28,427 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:28,427 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:28,427 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:28,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:28,543 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:28,543 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [395170396] [2019-11-15 23:56:28,543 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:28,544 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:56:28,544 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1352852002] [2019-11-15 23:56:28,544 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:56:28,544 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:28,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:56:28,544 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:56:28,544 INFO L87 Difference]: Start difference. First operand 53433 states and 195616 transitions. Second operand 6 states. [2019-11-15 23:56:29,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:29,186 INFO L93 Difference]: Finished difference Result 65982 states and 238830 transitions. [2019-11-15 23:56:29,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:56:29,186 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 69 [2019-11-15 23:56:29,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:29,317 INFO L225 Difference]: With dead ends: 65982 [2019-11-15 23:56:29,317 INFO L226 Difference]: Without dead ends: 65338 [2019-11-15 23:56:29,318 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:56:29,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65338 states. [2019-11-15 23:56:30,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65338 to 56042. [2019-11-15 23:56:30,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56042 states. [2019-11-15 23:56:30,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56042 states to 56042 states and 204333 transitions. [2019-11-15 23:56:30,352 INFO L78 Accepts]: Start accepts. Automaton has 56042 states and 204333 transitions. Word has length 69 [2019-11-15 23:56:30,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:30,352 INFO L462 AbstractCegarLoop]: Abstraction has 56042 states and 204333 transitions. [2019-11-15 23:56:30,352 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:56:30,352 INFO L276 IsEmpty]: Start isEmpty. Operand 56042 states and 204333 transitions. [2019-11-15 23:56:30,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 23:56:30,405 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:30,405 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:30,405 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:30,406 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:30,406 INFO L82 PathProgramCache]: Analyzing trace with hash -1122222101, now seen corresponding path program 1 times [2019-11-15 23:56:30,406 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:30,406 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [798937920] [2019-11-15 23:56:30,406 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:30,406 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:30,406 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:30,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:30,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:30,534 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [798937920] [2019-11-15 23:56:30,534 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:30,534 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:56:30,534 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1083836487] [2019-11-15 23:56:30,535 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:56:30,535 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:30,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:56:30,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:56:30,536 INFO L87 Difference]: Start difference. First operand 56042 states and 204333 transitions. Second operand 7 states. [2019-11-15 23:56:31,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:31,529 INFO L93 Difference]: Finished difference Result 83030 states and 292761 transitions. [2019-11-15 23:56:31,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 23:56:31,530 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 69 [2019-11-15 23:56:31,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:31,700 INFO L225 Difference]: With dead ends: 83030 [2019-11-15 23:56:31,700 INFO L226 Difference]: Without dead ends: 83030 [2019-11-15 23:56:31,701 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 23:56:31,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83030 states. [2019-11-15 23:56:33,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83030 to 76079. [2019-11-15 23:56:33,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76079 states. [2019-11-15 23:56:33,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76079 states to 76079 states and 270628 transitions. [2019-11-15 23:56:33,585 INFO L78 Accepts]: Start accepts. Automaton has 76079 states and 270628 transitions. Word has length 69 [2019-11-15 23:56:33,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:33,586 INFO L462 AbstractCegarLoop]: Abstraction has 76079 states and 270628 transitions. [2019-11-15 23:56:33,586 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:56:33,586 INFO L276 IsEmpty]: Start isEmpty. Operand 76079 states and 270628 transitions. [2019-11-15 23:56:33,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 23:56:33,639 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:33,639 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:33,639 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:33,639 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:33,639 INFO L82 PathProgramCache]: Analyzing trace with hash 122542380, now seen corresponding path program 1 times [2019-11-15 23:56:33,640 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:33,640 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1500107954] [2019-11-15 23:56:33,640 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:33,640 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:33,640 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:33,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:33,690 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:33,691 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1500107954] [2019-11-15 23:56:33,691 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:33,691 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:56:33,691 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1221709986] [2019-11-15 23:56:33,691 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:56:33,691 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:33,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:56:33,692 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:56:33,692 INFO L87 Difference]: Start difference. First operand 76079 states and 270628 transitions. Second operand 3 states. [2019-11-15 23:56:33,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:33,943 INFO L93 Difference]: Finished difference Result 54415 states and 197409 transitions. [2019-11-15 23:56:33,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:56:33,943 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-11-15 23:56:33,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:34,059 INFO L225 Difference]: With dead ends: 54415 [2019-11-15 23:56:34,060 INFO L226 Difference]: Without dead ends: 54253 [2019-11-15 23:56:34,060 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:56:34,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54253 states. [2019-11-15 23:56:34,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54253 to 54213. [2019-11-15 23:56:34,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54213 states. [2019-11-15 23:56:34,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54213 states to 54213 states and 196824 transitions. [2019-11-15 23:56:34,971 INFO L78 Accepts]: Start accepts. Automaton has 54213 states and 196824 transitions. Word has length 69 [2019-11-15 23:56:34,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:34,971 INFO L462 AbstractCegarLoop]: Abstraction has 54213 states and 196824 transitions. [2019-11-15 23:56:34,972 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:56:34,972 INFO L276 IsEmpty]: Start isEmpty. Operand 54213 states and 196824 transitions. [2019-11-15 23:56:35,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 23:56:35,006 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:35,006 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:35,007 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:35,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:35,007 INFO L82 PathProgramCache]: Analyzing trace with hash 1415482492, now seen corresponding path program 1 times [2019-11-15 23:56:35,007 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:35,007 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312221031] [2019-11-15 23:56:35,007 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:35,007 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:35,007 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:35,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:35,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:35,094 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [312221031] [2019-11-15 23:56:35,094 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:35,094 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:56:35,094 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [907558065] [2019-11-15 23:56:35,094 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:56:35,094 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:35,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:56:35,095 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:56:35,095 INFO L87 Difference]: Start difference. First operand 54213 states and 196824 transitions. Second operand 5 states. [2019-11-15 23:56:35,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:35,743 INFO L93 Difference]: Finished difference Result 84428 states and 303656 transitions. [2019-11-15 23:56:35,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:56:35,743 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2019-11-15 23:56:35,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:35,903 INFO L225 Difference]: With dead ends: 84428 [2019-11-15 23:56:35,903 INFO L226 Difference]: Without dead ends: 84232 [2019-11-15 23:56:35,903 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:56:36,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84232 states. [2019-11-15 23:56:37,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84232 to 76147. [2019-11-15 23:56:37,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76147 states. [2019-11-15 23:56:37,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76147 states to 76147 states and 275544 transitions. [2019-11-15 23:56:37,660 INFO L78 Accepts]: Start accepts. Automaton has 76147 states and 275544 transitions. Word has length 70 [2019-11-15 23:56:37,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:37,661 INFO L462 AbstractCegarLoop]: Abstraction has 76147 states and 275544 transitions. [2019-11-15 23:56:37,661 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:56:37,661 INFO L276 IsEmpty]: Start isEmpty. Operand 76147 states and 275544 transitions. [2019-11-15 23:56:37,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 23:56:37,709 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:37,709 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:37,709 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:37,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:37,709 INFO L82 PathProgramCache]: Analyzing trace with hash -1634720323, now seen corresponding path program 1 times [2019-11-15 23:56:37,710 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:37,710 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1000152157] [2019-11-15 23:56:37,710 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:37,710 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:37,710 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:37,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:37,829 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:37,829 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1000152157] [2019-11-15 23:56:37,829 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:37,829 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:56:37,829 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [602601231] [2019-11-15 23:56:37,830 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:56:37,830 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:37,830 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:56:37,830 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:56:37,830 INFO L87 Difference]: Start difference. First operand 76147 states and 275544 transitions. Second operand 5 states. [2019-11-15 23:56:37,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:37,967 INFO L93 Difference]: Finished difference Result 19615 states and 62265 transitions. [2019-11-15 23:56:37,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 23:56:37,968 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2019-11-15 23:56:37,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:38,003 INFO L225 Difference]: With dead ends: 19615 [2019-11-15 23:56:38,003 INFO L226 Difference]: Without dead ends: 19137 [2019-11-15 23:56:38,004 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 6 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:56:38,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19137 states. [2019-11-15 23:56:38,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19137 to 19125. [2019-11-15 23:56:38,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19125 states. [2019-11-15 23:56:38,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19125 states to 19125 states and 60760 transitions. [2019-11-15 23:56:38,315 INFO L78 Accepts]: Start accepts. Automaton has 19125 states and 60760 transitions. Word has length 70 [2019-11-15 23:56:38,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:38,315 INFO L462 AbstractCegarLoop]: Abstraction has 19125 states and 60760 transitions. [2019-11-15 23:56:38,315 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:56:38,316 INFO L276 IsEmpty]: Start isEmpty. Operand 19125 states and 60760 transitions. [2019-11-15 23:56:38,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 23:56:38,335 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:38,335 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:38,335 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:38,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:38,336 INFO L82 PathProgramCache]: Analyzing trace with hash -562875661, now seen corresponding path program 1 times [2019-11-15 23:56:38,336 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:38,336 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1117248247] [2019-11-15 23:56:38,336 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:38,336 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:38,337 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:38,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:38,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:38,436 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1117248247] [2019-11-15 23:56:38,436 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:38,436 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:56:38,437 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [690619499] [2019-11-15 23:56:38,438 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:56:38,438 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:38,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:56:38,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:56:38,438 INFO L87 Difference]: Start difference. First operand 19125 states and 60760 transitions. Second operand 4 states. [2019-11-15 23:56:38,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:38,641 INFO L93 Difference]: Finished difference Result 24075 states and 75428 transitions. [2019-11-15 23:56:38,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:56:38,642 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-11-15 23:56:38,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:38,673 INFO L225 Difference]: With dead ends: 24075 [2019-11-15 23:56:38,673 INFO L226 Difference]: Without dead ends: 24075 [2019-11-15 23:56:38,674 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:56:38,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24075 states. [2019-11-15 23:56:38,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24075 to 19965. [2019-11-15 23:56:38,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19965 states. [2019-11-15 23:56:38,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19965 states to 19965 states and 63127 transitions. [2019-11-15 23:56:38,943 INFO L78 Accepts]: Start accepts. Automaton has 19965 states and 63127 transitions. Word has length 79 [2019-11-15 23:56:38,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:38,943 INFO L462 AbstractCegarLoop]: Abstraction has 19965 states and 63127 transitions. [2019-11-15 23:56:38,943 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:56:38,943 INFO L276 IsEmpty]: Start isEmpty. Operand 19965 states and 63127 transitions. [2019-11-15 23:56:38,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 23:56:38,958 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:38,958 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:38,958 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:38,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:38,959 INFO L82 PathProgramCache]: Analyzing trace with hash -817612206, now seen corresponding path program 1 times [2019-11-15 23:56:38,959 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:38,959 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1271514263] [2019-11-15 23:56:38,959 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:38,959 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:38,960 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:38,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:39,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:39,056 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1271514263] [2019-11-15 23:56:39,056 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:39,056 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 23:56:39,056 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [402306654] [2019-11-15 23:56:39,057 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 23:56:39,057 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:39,057 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 23:56:39,057 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:56:39,058 INFO L87 Difference]: Start difference. First operand 19965 states and 63127 transitions. Second operand 8 states. [2019-11-15 23:56:39,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:39,992 INFO L93 Difference]: Finished difference Result 22071 states and 69319 transitions. [2019-11-15 23:56:39,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-11-15 23:56:39,992 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 79 [2019-11-15 23:56:39,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:40,036 INFO L225 Difference]: With dead ends: 22071 [2019-11-15 23:56:40,036 INFO L226 Difference]: Without dead ends: 22023 [2019-11-15 23:56:40,037 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=102, Invalid=404, Unknown=0, NotChecked=0, Total=506 [2019-11-15 23:56:40,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22023 states. [2019-11-15 23:56:40,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22023 to 19437. [2019-11-15 23:56:40,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19437 states. [2019-11-15 23:56:40,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19437 states to 19437 states and 61629 transitions. [2019-11-15 23:56:40,391 INFO L78 Accepts]: Start accepts. Automaton has 19437 states and 61629 transitions. Word has length 79 [2019-11-15 23:56:40,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:40,391 INFO L462 AbstractCegarLoop]: Abstraction has 19437 states and 61629 transitions. [2019-11-15 23:56:40,392 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 23:56:40,392 INFO L276 IsEmpty]: Start isEmpty. Operand 19437 states and 61629 transitions. [2019-11-15 23:56:40,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 23:56:40,415 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:40,415 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:40,415 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:40,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:40,416 INFO L82 PathProgramCache]: Analyzing trace with hash 2041767061, now seen corresponding path program 1 times [2019-11-15 23:56:40,416 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:40,416 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1286228049] [2019-11-15 23:56:40,416 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:40,416 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:40,417 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:40,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:40,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:40,537 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1286228049] [2019-11-15 23:56:40,537 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:40,538 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 23:56:40,538 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767379883] [2019-11-15 23:56:40,538 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 23:56:40,538 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:40,538 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 23:56:40,539 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:56:40,539 INFO L87 Difference]: Start difference. First operand 19437 states and 61629 transitions. Second operand 8 states. [2019-11-15 23:56:42,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:42,448 INFO L93 Difference]: Finished difference Result 50431 states and 153647 transitions. [2019-11-15 23:56:42,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-11-15 23:56:42,448 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 82 [2019-11-15 23:56:42,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:42,522 INFO L225 Difference]: With dead ends: 50431 [2019-11-15 23:56:42,522 INFO L226 Difference]: Without dead ends: 49732 [2019-11-15 23:56:42,522 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=153, Invalid=497, Unknown=0, NotChecked=0, Total=650 [2019-11-15 23:56:42,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49732 states. [2019-11-15 23:56:42,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49732 to 29965. [2019-11-15 23:56:42,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29965 states. [2019-11-15 23:56:43,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29965 states to 29965 states and 93559 transitions. [2019-11-15 23:56:43,024 INFO L78 Accepts]: Start accepts. Automaton has 29965 states and 93559 transitions. Word has length 82 [2019-11-15 23:56:43,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:43,024 INFO L462 AbstractCegarLoop]: Abstraction has 29965 states and 93559 transitions. [2019-11-15 23:56:43,024 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 23:56:43,025 INFO L276 IsEmpty]: Start isEmpty. Operand 29965 states and 93559 transitions. [2019-11-15 23:56:43,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 23:56:43,052 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:43,052 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:43,052 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:43,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:43,053 INFO L82 PathProgramCache]: Analyzing trace with hash -1291586218, now seen corresponding path program 1 times [2019-11-15 23:56:43,053 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:43,053 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87943990] [2019-11-15 23:56:43,053 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:43,053 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:43,054 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:43,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:43,167 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:43,167 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [87943990] [2019-11-15 23:56:43,168 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:43,168 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:56:43,168 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [480402688] [2019-11-15 23:56:43,168 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:56:43,168 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:43,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:56:43,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:56:43,169 INFO L87 Difference]: Start difference. First operand 29965 states and 93559 transitions. Second operand 6 states. [2019-11-15 23:56:43,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:43,692 INFO L93 Difference]: Finished difference Result 31403 states and 97496 transitions. [2019-11-15 23:56:43,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:56:43,693 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-11-15 23:56:43,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:43,737 INFO L225 Difference]: With dead ends: 31403 [2019-11-15 23:56:43,737 INFO L226 Difference]: Without dead ends: 31403 [2019-11-15 23:56:43,738 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:56:43,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31403 states. [2019-11-15 23:56:44,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31403 to 29634. [2019-11-15 23:56:44,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29634 states. [2019-11-15 23:56:44,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29634 states to 29634 states and 92402 transitions. [2019-11-15 23:56:44,142 INFO L78 Accepts]: Start accepts. Automaton has 29634 states and 92402 transitions. Word has length 82 [2019-11-15 23:56:44,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:44,142 INFO L462 AbstractCegarLoop]: Abstraction has 29634 states and 92402 transitions. [2019-11-15 23:56:44,142 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:56:44,143 INFO L276 IsEmpty]: Start isEmpty. Operand 29634 states and 92402 transitions. [2019-11-15 23:56:44,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 23:56:44,174 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:44,175 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:44,175 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:44,175 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:44,175 INFO L82 PathProgramCache]: Analyzing trace with hash 1067720791, now seen corresponding path program 1 times [2019-11-15 23:56:44,175 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:44,175 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [658958044] [2019-11-15 23:56:44,175 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:44,176 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:44,176 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:44,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:44,288 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:44,289 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [658958044] [2019-11-15 23:56:44,289 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:44,289 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:56:44,289 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [377616190] [2019-11-15 23:56:44,290 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:56:44,290 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:44,290 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:56:44,290 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:56:44,291 INFO L87 Difference]: Start difference. First operand 29634 states and 92402 transitions. Second operand 7 states. [2019-11-15 23:56:44,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:44,852 INFO L93 Difference]: Finished difference Result 31148 states and 96558 transitions. [2019-11-15 23:56:44,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 23:56:44,852 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 82 [2019-11-15 23:56:44,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:44,903 INFO L225 Difference]: With dead ends: 31148 [2019-11-15 23:56:44,903 INFO L226 Difference]: Without dead ends: 31148 [2019-11-15 23:56:44,903 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 23:56:44,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31148 states. [2019-11-15 23:56:45,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31148 to 29966. [2019-11-15 23:56:45,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29966 states. [2019-11-15 23:56:45,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29966 states to 29966 states and 93233 transitions. [2019-11-15 23:56:45,480 INFO L78 Accepts]: Start accepts. Automaton has 29966 states and 93233 transitions. Word has length 82 [2019-11-15 23:56:45,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:45,481 INFO L462 AbstractCegarLoop]: Abstraction has 29966 states and 93233 transitions. [2019-11-15 23:56:45,481 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:56:45,481 INFO L276 IsEmpty]: Start isEmpty. Operand 29966 states and 93233 transitions. [2019-11-15 23:56:45,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 23:56:45,509 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:45,509 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:45,509 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:45,509 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:45,510 INFO L82 PathProgramCache]: Analyzing trace with hash 1397486552, now seen corresponding path program 1 times [2019-11-15 23:56:45,510 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:45,510 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1449879049] [2019-11-15 23:56:45,510 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:45,510 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:45,510 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:45,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:45,558 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:45,558 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1449879049] [2019-11-15 23:56:45,558 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:45,558 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:56:45,558 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2014935171] [2019-11-15 23:56:45,559 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:56:45,559 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:45,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:56:45,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:56:45,560 INFO L87 Difference]: Start difference. First operand 29966 states and 93233 transitions. Second operand 3 states. [2019-11-15 23:56:45,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:45,651 INFO L93 Difference]: Finished difference Result 21487 states and 66270 transitions. [2019-11-15 23:56:45,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:56:45,651 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 82 [2019-11-15 23:56:45,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:45,690 INFO L225 Difference]: With dead ends: 21487 [2019-11-15 23:56:45,690 INFO L226 Difference]: Without dead ends: 21487 [2019-11-15 23:56:45,691 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:56:45,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21487 states. [2019-11-15 23:56:45,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21487 to 21164. [2019-11-15 23:56:45,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21164 states. [2019-11-15 23:56:45,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21164 states to 21164 states and 65321 transitions. [2019-11-15 23:56:45,941 INFO L78 Accepts]: Start accepts. Automaton has 21164 states and 65321 transitions. Word has length 82 [2019-11-15 23:56:45,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:45,941 INFO L462 AbstractCegarLoop]: Abstraction has 21164 states and 65321 transitions. [2019-11-15 23:56:45,941 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:56:45,941 INFO L276 IsEmpty]: Start isEmpty. Operand 21164 states and 65321 transitions. [2019-11-15 23:56:45,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 23:56:45,958 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:45,958 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:45,958 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:45,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:45,958 INFO L82 PathProgramCache]: Analyzing trace with hash 1672659829, now seen corresponding path program 1 times [2019-11-15 23:56:45,958 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:45,958 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1205077195] [2019-11-15 23:56:45,958 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:45,959 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:45,959 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:45,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:46,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:46,057 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1205077195] [2019-11-15 23:56:46,058 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:46,058 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:56:46,058 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1141980103] [2019-11-15 23:56:46,058 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:56:46,059 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:46,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:56:46,062 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:56:46,062 INFO L87 Difference]: Start difference. First operand 21164 states and 65321 transitions. Second operand 6 states. [2019-11-15 23:56:46,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:46,353 INFO L93 Difference]: Finished difference Result 21680 states and 66675 transitions. [2019-11-15 23:56:46,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:56:46,354 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 83 [2019-11-15 23:56:46,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:46,383 INFO L225 Difference]: With dead ends: 21680 [2019-11-15 23:56:46,383 INFO L226 Difference]: Without dead ends: 21680 [2019-11-15 23:56:46,383 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:56:46,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21680 states. [2019-11-15 23:56:46,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21680 to 20940. [2019-11-15 23:56:46,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20940 states. [2019-11-15 23:56:46,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20940 states to 20940 states and 64680 transitions. [2019-11-15 23:56:46,637 INFO L78 Accepts]: Start accepts. Automaton has 20940 states and 64680 transitions. Word has length 83 [2019-11-15 23:56:46,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:46,638 INFO L462 AbstractCegarLoop]: Abstraction has 20940 states and 64680 transitions. [2019-11-15 23:56:46,638 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:56:46,638 INFO L276 IsEmpty]: Start isEmpty. Operand 20940 states and 64680 transitions. [2019-11-15 23:56:46,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 23:56:46,654 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:46,654 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:46,655 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:46,655 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:46,655 INFO L82 PathProgramCache]: Analyzing trace with hash 2002425590, now seen corresponding path program 1 times [2019-11-15 23:56:46,655 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:46,656 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1740463468] [2019-11-15 23:56:46,656 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:46,656 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:46,656 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:46,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:46,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:46,720 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1740463468] [2019-11-15 23:56:46,720 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:46,720 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:56:46,720 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [999422724] [2019-11-15 23:56:46,720 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:56:46,721 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:46,721 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:56:46,721 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:56:46,721 INFO L87 Difference]: Start difference. First operand 20940 states and 64680 transitions. Second operand 5 states. [2019-11-15 23:56:46,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:46,758 INFO L93 Difference]: Finished difference Result 3087 states and 7649 transitions. [2019-11-15 23:56:46,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 23:56:46,758 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 83 [2019-11-15 23:56:46,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:46,762 INFO L225 Difference]: With dead ends: 3087 [2019-11-15 23:56:46,762 INFO L226 Difference]: Without dead ends: 2723 [2019-11-15 23:56:46,762 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:56:46,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2723 states. [2019-11-15 23:56:46,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2723 to 2586. [2019-11-15 23:56:46,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2586 states. [2019-11-15 23:56:46,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2586 states to 2586 states and 6370 transitions. [2019-11-15 23:56:46,796 INFO L78 Accepts]: Start accepts. Automaton has 2586 states and 6370 transitions. Word has length 83 [2019-11-15 23:56:46,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:46,796 INFO L462 AbstractCegarLoop]: Abstraction has 2586 states and 6370 transitions. [2019-11-15 23:56:46,796 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:56:46,796 INFO L276 IsEmpty]: Start isEmpty. Operand 2586 states and 6370 transitions. [2019-11-15 23:56:46,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 23:56:46,799 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:46,800 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:46,800 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:46,800 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:46,800 INFO L82 PathProgramCache]: Analyzing trace with hash 1747031785, now seen corresponding path program 1 times [2019-11-15 23:56:46,800 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:46,801 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1830998242] [2019-11-15 23:56:46,801 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:46,801 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:46,801 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:46,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:46,865 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:46,865 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1830998242] [2019-11-15 23:56:46,866 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:46,866 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:56:46,866 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [757949453] [2019-11-15 23:56:46,868 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:56:46,868 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:46,868 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:56:46,869 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:56:46,869 INFO L87 Difference]: Start difference. First operand 2586 states and 6370 transitions. Second operand 4 states. [2019-11-15 23:56:47,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:47,013 INFO L93 Difference]: Finished difference Result 2952 states and 7207 transitions. [2019-11-15 23:56:47,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:56:47,013 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-11-15 23:56:47,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:47,017 INFO L225 Difference]: With dead ends: 2952 [2019-11-15 23:56:47,017 INFO L226 Difference]: Without dead ends: 2952 [2019-11-15 23:56:47,017 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:56:47,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2952 states. [2019-11-15 23:56:47,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2952 to 2676. [2019-11-15 23:56:47,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2676 states. [2019-11-15 23:56:47,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2676 states to 2676 states and 6574 transitions. [2019-11-15 23:56:47,053 INFO L78 Accepts]: Start accepts. Automaton has 2676 states and 6574 transitions. Word has length 96 [2019-11-15 23:56:47,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:47,054 INFO L462 AbstractCegarLoop]: Abstraction has 2676 states and 6574 transitions. [2019-11-15 23:56:47,054 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:56:47,054 INFO L276 IsEmpty]: Start isEmpty. Operand 2676 states and 6574 transitions. [2019-11-15 23:56:47,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 23:56:47,057 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:47,057 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:47,058 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:47,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:47,058 INFO L82 PathProgramCache]: Analyzing trace with hash 1298335146, now seen corresponding path program 1 times [2019-11-15 23:56:47,059 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:47,059 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2090257985] [2019-11-15 23:56:47,059 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:47,059 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:47,059 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:47,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:47,177 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:47,178 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2090257985] [2019-11-15 23:56:47,178 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:47,178 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:56:47,178 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [837520943] [2019-11-15 23:56:47,179 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:56:47,179 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:47,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:56:47,180 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:56:47,180 INFO L87 Difference]: Start difference. First operand 2676 states and 6574 transitions. Second operand 6 states. [2019-11-15 23:56:47,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:47,360 INFO L93 Difference]: Finished difference Result 2923 states and 7049 transitions. [2019-11-15 23:56:47,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:56:47,360 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-15 23:56:47,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:47,363 INFO L225 Difference]: With dead ends: 2923 [2019-11-15 23:56:47,364 INFO L226 Difference]: Without dead ends: 2895 [2019-11-15 23:56:47,365 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:56:47,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2895 states. [2019-11-15 23:56:47,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2895 to 2745. [2019-11-15 23:56:47,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2745 states. [2019-11-15 23:56:47,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2745 states to 2745 states and 6681 transitions. [2019-11-15 23:56:47,400 INFO L78 Accepts]: Start accepts. Automaton has 2745 states and 6681 transitions. Word has length 96 [2019-11-15 23:56:47,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:47,400 INFO L462 AbstractCegarLoop]: Abstraction has 2745 states and 6681 transitions. [2019-11-15 23:56:47,400 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:56:47,400 INFO L276 IsEmpty]: Start isEmpty. Operand 2745 states and 6681 transitions. [2019-11-15 23:56:47,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 23:56:47,403 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:47,404 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:47,404 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:47,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:47,404 INFO L82 PathProgramCache]: Analyzing trace with hash -402405333, now seen corresponding path program 1 times [2019-11-15 23:56:47,405 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:47,405 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809644487] [2019-11-15 23:56:47,405 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:47,405 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:47,405 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:47,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:47,511 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:47,512 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809644487] [2019-11-15 23:56:47,512 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:47,512 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:56:47,512 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [954114997] [2019-11-15 23:56:47,513 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:56:47,513 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:47,513 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:56:47,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:56:47,514 INFO L87 Difference]: Start difference. First operand 2745 states and 6681 transitions. Second operand 6 states. [2019-11-15 23:56:47,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:47,664 INFO L93 Difference]: Finished difference Result 3061 states and 7301 transitions. [2019-11-15 23:56:47,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 23:56:47,664 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-15 23:56:47,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:47,667 INFO L225 Difference]: With dead ends: 3061 [2019-11-15 23:56:47,667 INFO L226 Difference]: Without dead ends: 3061 [2019-11-15 23:56:47,667 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 23:56:47,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3061 states. [2019-11-15 23:56:47,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3061 to 2827. [2019-11-15 23:56:47,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2827 states. [2019-11-15 23:56:47,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2827 states to 2827 states and 6836 transitions. [2019-11-15 23:56:47,692 INFO L78 Accepts]: Start accepts. Automaton has 2827 states and 6836 transitions. Word has length 96 [2019-11-15 23:56:47,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:47,692 INFO L462 AbstractCegarLoop]: Abstraction has 2827 states and 6836 transitions. [2019-11-15 23:56:47,692 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:56:47,693 INFO L276 IsEmpty]: Start isEmpty. Operand 2827 states and 6836 transitions. [2019-11-15 23:56:47,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 23:56:47,695 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:47,695 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:47,695 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:47,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:47,696 INFO L82 PathProgramCache]: Analyzing trace with hash 1956901676, now seen corresponding path program 1 times [2019-11-15 23:56:47,696 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:47,696 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1065006532] [2019-11-15 23:56:47,696 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:47,696 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:47,697 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:47,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:47,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:47,819 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1065006532] [2019-11-15 23:56:47,819 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:47,820 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:56:47,820 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1459898902] [2019-11-15 23:56:47,820 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:56:47,820 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:47,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:56:47,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:56:47,821 INFO L87 Difference]: Start difference. First operand 2827 states and 6836 transitions. Second operand 7 states. [2019-11-15 23:56:48,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:48,234 INFO L93 Difference]: Finished difference Result 3242 states and 7686 transitions. [2019-11-15 23:56:48,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:56:48,235 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2019-11-15 23:56:48,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:48,239 INFO L225 Difference]: With dead ends: 3242 [2019-11-15 23:56:48,239 INFO L226 Difference]: Without dead ends: 3242 [2019-11-15 23:56:48,239 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2019-11-15 23:56:48,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3242 states. [2019-11-15 23:56:48,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3242 to 2987. [2019-11-15 23:56:48,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2987 states. [2019-11-15 23:56:48,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2987 states to 2987 states and 7163 transitions. [2019-11-15 23:56:48,277 INFO L78 Accepts]: Start accepts. Automaton has 2987 states and 7163 transitions. Word has length 96 [2019-11-15 23:56:48,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:48,277 INFO L462 AbstractCegarLoop]: Abstraction has 2987 states and 7163 transitions. [2019-11-15 23:56:48,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:56:48,278 INFO L276 IsEmpty]: Start isEmpty. Operand 2987 states and 7163 transitions. [2019-11-15 23:56:48,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 23:56:48,281 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:48,281 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:48,282 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:48,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:48,282 INFO L82 PathProgramCache]: Analyzing trace with hash 276563596, now seen corresponding path program 1 times [2019-11-15 23:56:48,282 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:48,282 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [331879986] [2019-11-15 23:56:48,283 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:48,283 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:48,283 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:48,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:48,357 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:48,357 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [331879986] [2019-11-15 23:56:48,357 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:48,357 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:56:48,358 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [88878101] [2019-11-15 23:56:48,358 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:56:48,358 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:48,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:56:48,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:56:48,359 INFO L87 Difference]: Start difference. First operand 2987 states and 7163 transitions. Second operand 4 states. [2019-11-15 23:56:48,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:48,511 INFO L93 Difference]: Finished difference Result 3302 states and 7880 transitions. [2019-11-15 23:56:48,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:56:48,511 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-11-15 23:56:48,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:48,514 INFO L225 Difference]: With dead ends: 3302 [2019-11-15 23:56:48,514 INFO L226 Difference]: Without dead ends: 3266 [2019-11-15 23:56:48,515 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:56:48,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3266 states. [2019-11-15 23:56:48,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3266 to 2987. [2019-11-15 23:56:48,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2987 states. [2019-11-15 23:56:48,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2987 states to 2987 states and 7145 transitions. [2019-11-15 23:56:48,542 INFO L78 Accepts]: Start accepts. Automaton has 2987 states and 7145 transitions. Word has length 96 [2019-11-15 23:56:48,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:48,542 INFO L462 AbstractCegarLoop]: Abstraction has 2987 states and 7145 transitions. [2019-11-15 23:56:48,542 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:56:48,542 INFO L276 IsEmpty]: Start isEmpty. Operand 2987 states and 7145 transitions. [2019-11-15 23:56:48,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 23:56:48,546 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:48,546 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:48,546 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:48,548 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:48,548 INFO L82 PathProgramCache]: Analyzing trace with hash -6586868, now seen corresponding path program 1 times [2019-11-15 23:56:48,548 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:48,548 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1200974616] [2019-11-15 23:56:48,548 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:48,549 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:48,549 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:48,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:48,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:48,624 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1200974616] [2019-11-15 23:56:48,624 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:48,625 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:56:48,625 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1678922273] [2019-11-15 23:56:48,625 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:56:48,625 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:48,626 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:56:48,626 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:56:48,626 INFO L87 Difference]: Start difference. First operand 2987 states and 7145 transitions. Second operand 5 states. [2019-11-15 23:56:48,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:48,829 INFO L93 Difference]: Finished difference Result 2663 states and 6218 transitions. [2019-11-15 23:56:48,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:56:48,829 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2019-11-15 23:56:48,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:48,832 INFO L225 Difference]: With dead ends: 2663 [2019-11-15 23:56:48,833 INFO L226 Difference]: Without dead ends: 2645 [2019-11-15 23:56:48,833 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:56:48,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2645 states. [2019-11-15 23:56:48,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2645 to 2161. [2019-11-15 23:56:48,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2161 states. [2019-11-15 23:56:48,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2161 states to 2161 states and 5097 transitions. [2019-11-15 23:56:48,862 INFO L78 Accepts]: Start accepts. Automaton has 2161 states and 5097 transitions. Word has length 96 [2019-11-15 23:56:48,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:48,863 INFO L462 AbstractCegarLoop]: Abstraction has 2161 states and 5097 transitions. [2019-11-15 23:56:48,863 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:56:48,863 INFO L276 IsEmpty]: Start isEmpty. Operand 2161 states and 5097 transitions. [2019-11-15 23:56:48,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 23:56:48,865 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:48,866 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:48,866 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:48,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:48,866 INFO L82 PathProgramCache]: Analyzing trace with hash 1238177613, now seen corresponding path program 1 times [2019-11-15 23:56:48,867 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:48,867 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1851701006] [2019-11-15 23:56:48,867 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:48,867 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:48,867 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:48,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:48,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:48,954 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1851701006] [2019-11-15 23:56:48,954 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:48,954 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:56:48,954 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [961384862] [2019-11-15 23:56:48,955 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:56:48,955 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:48,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:56:48,955 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:56:48,955 INFO L87 Difference]: Start difference. First operand 2161 states and 5097 transitions. Second operand 4 states. [2019-11-15 23:56:48,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:48,979 INFO L93 Difference]: Finished difference Result 2018 states and 4743 transitions. [2019-11-15 23:56:48,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:56:48,980 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-11-15 23:56:48,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:48,982 INFO L225 Difference]: With dead ends: 2018 [2019-11-15 23:56:48,983 INFO L226 Difference]: Without dead ends: 2018 [2019-11-15 23:56:48,984 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:56:48,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2018 states. [2019-11-15 23:56:49,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2018 to 1996. [2019-11-15 23:56:49,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1996 states. [2019-11-15 23:56:49,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1996 states to 1996 states and 4698 transitions. [2019-11-15 23:56:49,008 INFO L78 Accepts]: Start accepts. Automaton has 1996 states and 4698 transitions. Word has length 96 [2019-11-15 23:56:49,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:49,009 INFO L462 AbstractCegarLoop]: Abstraction has 1996 states and 4698 transitions. [2019-11-15 23:56:49,009 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:56:49,009 INFO L276 IsEmpty]: Start isEmpty. Operand 1996 states and 4698 transitions. [2019-11-15 23:56:49,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 23:56:49,011 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:49,011 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:49,012 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:49,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:49,012 INFO L82 PathProgramCache]: Analyzing trace with hash 512240493, now seen corresponding path program 1 times [2019-11-15 23:56:49,012 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:49,012 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [246026640] [2019-11-15 23:56:49,012 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:49,013 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:49,013 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:49,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:49,149 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:49,149 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [246026640] [2019-11-15 23:56:49,149 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:49,149 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:56:49,150 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1759512274] [2019-11-15 23:56:49,150 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:56:49,150 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:49,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:56:49,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:56:49,151 INFO L87 Difference]: Start difference. First operand 1996 states and 4698 transitions. Second operand 6 states. [2019-11-15 23:56:49,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:49,378 INFO L93 Difference]: Finished difference Result 2180 states and 5063 transitions. [2019-11-15 23:56:49,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 23:56:49,378 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-15 23:56:49,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:49,381 INFO L225 Difference]: With dead ends: 2180 [2019-11-15 23:56:49,381 INFO L226 Difference]: Without dead ends: 2180 [2019-11-15 23:56:49,382 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2019-11-15 23:56:49,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2180 states. [2019-11-15 23:56:49,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2180 to 2019. [2019-11-15 23:56:49,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2019 states. [2019-11-15 23:56:49,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2019 states to 2019 states and 4745 transitions. [2019-11-15 23:56:49,407 INFO L78 Accepts]: Start accepts. Automaton has 2019 states and 4745 transitions. Word has length 96 [2019-11-15 23:56:49,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:49,408 INFO L462 AbstractCegarLoop]: Abstraction has 2019 states and 4745 transitions. [2019-11-15 23:56:49,408 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:56:49,408 INFO L276 IsEmpty]: Start isEmpty. Operand 2019 states and 4745 transitions. [2019-11-15 23:56:49,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 23:56:49,410 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:49,410 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:49,411 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:49,411 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:49,411 INFO L82 PathProgramCache]: Analyzing trace with hash 842006254, now seen corresponding path program 1 times [2019-11-15 23:56:49,411 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:49,411 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [984455569] [2019-11-15 23:56:49,411 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:49,412 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:49,412 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:49,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:56:49,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:56:49,560 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [984455569] [2019-11-15 23:56:49,561 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:56:49,561 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 23:56:49,561 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [102848721] [2019-11-15 23:56:49,562 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 23:56:49,562 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:56:49,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 23:56:49,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:56:49,562 INFO L87 Difference]: Start difference. First operand 2019 states and 4745 transitions. Second operand 8 states. [2019-11-15 23:56:49,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:56:49,719 INFO L93 Difference]: Finished difference Result 3390 states and 8045 transitions. [2019-11-15 23:56:49,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 23:56:49,720 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 96 [2019-11-15 23:56:49,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:56:49,722 INFO L225 Difference]: With dead ends: 3390 [2019-11-15 23:56:49,722 INFO L226 Difference]: Without dead ends: 1452 [2019-11-15 23:56:49,722 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-11-15 23:56:49,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1452 states. [2019-11-15 23:56:49,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1452 to 1372. [2019-11-15 23:56:49,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1372 states. [2019-11-15 23:56:49,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1372 states to 1372 states and 3268 transitions. [2019-11-15 23:56:49,739 INFO L78 Accepts]: Start accepts. Automaton has 1372 states and 3268 transitions. Word has length 96 [2019-11-15 23:56:49,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:56:49,739 INFO L462 AbstractCegarLoop]: Abstraction has 1372 states and 3268 transitions. [2019-11-15 23:56:49,739 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 23:56:49,740 INFO L276 IsEmpty]: Start isEmpty. Operand 1372 states and 3268 transitions. [2019-11-15 23:56:49,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 23:56:49,741 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:56:49,741 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:56:49,742 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:56:49,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:56:49,742 INFO L82 PathProgramCache]: Analyzing trace with hash 1069439884, now seen corresponding path program 2 times [2019-11-15 23:56:49,742 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:56:49,744 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [65802174] [2019-11-15 23:56:49,745 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:49,745 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:56:49,745 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:56:49,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 23:56:49,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 23:56:49,854 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 23:56:49,854 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 23:56:50,017 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 23:56:50,022 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 11:56:50 BasicIcfg [2019-11-15 23:56:50,022 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 23:56:50,023 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 23:56:50,023 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 23:56:50,023 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 23:56:50,024 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 11:56:06" (3/4) ... [2019-11-15 23:56:50,032 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 23:56:50,181 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_f15f361e-4939-4c63-a917-20ee2759dc52/bin/uautomizer/witness.graphml [2019-11-15 23:56:50,181 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 23:56:50,183 INFO L168 Benchmark]: Toolchain (without parser) took 44641.97 ms. Allocated memory was 1.0 GB in the beginning and 4.7 GB in the end (delta: 3.6 GB). Free memory was 944.7 MB in the beginning and 2.3 GB in the end (delta: -1.4 GB). Peak memory consumption was 2.3 GB. Max. memory is 11.5 GB. [2019-11-15 23:56:50,184 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 967.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 23:56:50,184 INFO L168 Benchmark]: CACSL2BoogieTranslator took 667.21 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 156.8 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -178.3 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-11-15 23:56:50,184 INFO L168 Benchmark]: Boogie Procedure Inliner took 56.83 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-11-15 23:56:50,185 INFO L168 Benchmark]: Boogie Preprocessor took 34.91 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 23:56:50,185 INFO L168 Benchmark]: RCFGBuilder took 698.51 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 49.4 MB). Peak memory consumption was 49.4 MB. Max. memory is 11.5 GB. [2019-11-15 23:56:50,185 INFO L168 Benchmark]: TraceAbstraction took 43022.15 ms. Allocated memory was 1.2 GB in the beginning and 4.7 GB in the end (delta: 3.5 GB). Free memory was 1.1 GB in the beginning and 2.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 2.2 GB. Max. memory is 11.5 GB. [2019-11-15 23:56:50,186 INFO L168 Benchmark]: Witness Printer took 158.35 ms. Allocated memory is still 4.7 GB. Free memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 21.4 MB). Peak memory consumption was 21.4 MB. Max. memory is 11.5 GB. [2019-11-15 23:56:50,188 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 967.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 667.21 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 156.8 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -178.3 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 56.83 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 34.91 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 698.51 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 49.4 MB). Peak memory consumption was 49.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 43022.15 ms. Allocated memory was 1.2 GB in the beginning and 4.7 GB in the end (delta: 3.5 GB). Free memory was 1.1 GB in the beginning and 2.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 2.2 GB. Max. memory is 11.5 GB. * Witness Printer took 158.35 ms. Allocated memory is still 4.7 GB. Free memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 21.4 MB). Peak memory consumption was 21.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L698] 0 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L699] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L700] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L702] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L703] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L704] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L705] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L706] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L707] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L708] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L709] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L710] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L711] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L712] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L713] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L714] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L715] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L716] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L718] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L720] 0 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L721] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L722] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L788] 0 pthread_t t1101; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L789] FCALL, FORK 0 pthread_create(&t1101, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L790] 0 pthread_t t1102; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L791] FCALL, FORK 0 pthread_create(&t1102, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L746] 2 x$w_buff1 = x$w_buff0 [L747] 2 x$w_buff0 = 2 [L748] 2 x$w_buff1_used = x$w_buff0_used [L749] 2 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L751] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L752] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L753] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L754] 2 x$r_buff0_thd2 = (_Bool)1 [L757] 2 y = 1 [L760] 2 __unbuffered_p1_EAX = y [L763] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L726] 1 z = 1 [L729] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L732] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=1, z=1] [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=1, z=1] [L732] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L733] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L733] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L734] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L766] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L734] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L766] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L767] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L767] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L768] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L768] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L769] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L769] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L770] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L770] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L773] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L735] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L735] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L736] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L736] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L739] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L793] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L797] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L798] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L798] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L799] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L799] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L800] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L800] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L801] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L801] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L804] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L805] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L806] 0 x$flush_delayed = weak$$choice2 [L807] 0 x$mem_tmp = x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L808] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L808] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L809] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L809] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L810] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L810] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L811] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L811] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L812] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L812] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L813] EXPR 0 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L813] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L814] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L814] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L815] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L816] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L816] 0 x = x$flush_delayed ? x$mem_tmp : x [L817] 0 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 177 locations, 3 error locations. Result: UNSAFE, OverallTime: 42.8s, OverallIterations: 32, TraceHistogramMax: 1, AutomataDifference: 18.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8183 SDtfs, 8474 SDslu, 18639 SDs, 0 SdLazy, 8610 SolverSat, 581 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 339 GetRequests, 84 SyntacticMatches, 28 SemanticMatches, 227 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 475 ImplicationChecksByTransitivity, 2.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=76147occurred in iteration=13, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 18.5s AutomataMinimizationTime, 31 MinimizatonAttempts, 115507 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.3s InterpolantComputationTime, 2465 NumberOfCodeBlocks, 2465 NumberOfCodeBlocksAsserted, 32 NumberOfCheckSat, 2338 ConstructedInterpolants, 0 QuantifiedInterpolants, 455115 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 31 InterpolantComputations, 31 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...