./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix054_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_5d0385d0-3e16-4649-ae43-b870ffe08182/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_5d0385d0-3e16-4649-ae43-b870ffe08182/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_5d0385d0-3e16-4649-ae43-b870ffe08182/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_5d0385d0-3e16-4649-ae43-b870ffe08182/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix054_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_5d0385d0-3e16-4649-ae43-b870ffe08182/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_5d0385d0-3e16-4649-ae43-b870ffe08182/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2cfae812637f994f4499329b4635c7ce29b263dc .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 20:43:36,985 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 20:43:36,987 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 20:43:37,003 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 20:43:37,003 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 20:43:37,005 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 20:43:37,006 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 20:43:37,017 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 20:43:37,020 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 20:43:37,022 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 20:43:37,022 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 20:43:37,023 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 20:43:37,023 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 20:43:37,024 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 20:43:37,025 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 20:43:37,028 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 20:43:37,028 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 20:43:37,029 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 20:43:37,030 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 20:43:37,031 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 20:43:37,033 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 20:43:37,034 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 20:43:37,035 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 20:43:37,036 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 20:43:37,038 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 20:43:37,038 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 20:43:37,038 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 20:43:37,039 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 20:43:37,040 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 20:43:37,041 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 20:43:37,041 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 20:43:37,041 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 20:43:37,042 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 20:43:37,043 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 20:43:37,044 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 20:43:37,044 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 20:43:37,044 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 20:43:37,045 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 20:43:37,045 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 20:43:37,046 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 20:43:37,046 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 20:43:37,047 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_5d0385d0-3e16-4649-ae43-b870ffe08182/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 20:43:37,059 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 20:43:37,060 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 20:43:37,061 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 20:43:37,061 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 20:43:37,061 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 20:43:37,061 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 20:43:37,061 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 20:43:37,062 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 20:43:37,062 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 20:43:37,062 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 20:43:37,062 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 20:43:37,062 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 20:43:37,062 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 20:43:37,063 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 20:43:37,063 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 20:43:37,063 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 20:43:37,063 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 20:43:37,063 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 20:43:37,063 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 20:43:37,064 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 20:43:37,064 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 20:43:37,064 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:43:37,064 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 20:43:37,064 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 20:43:37,065 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 20:43:37,065 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 20:43:37,065 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 20:43:37,065 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 20:43:37,065 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_5d0385d0-3e16-4649-ae43-b870ffe08182/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2cfae812637f994f4499329b4635c7ce29b263dc [2019-11-15 20:43:37,101 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 20:43:37,117 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 20:43:37,121 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 20:43:37,122 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 20:43:37,123 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 20:43:37,124 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_5d0385d0-3e16-4649-ae43-b870ffe08182/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix054_rmo.opt.i [2019-11-15 20:43:37,190 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_5d0385d0-3e16-4649-ae43-b870ffe08182/bin/uautomizer/data/fdc809fc5/659f6bc258664fe381210a1508b998a0/FLAG4c1169c1c [2019-11-15 20:43:37,627 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 20:43:37,627 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_5d0385d0-3e16-4649-ae43-b870ffe08182/sv-benchmarks/c/pthread-wmm/mix054_rmo.opt.i [2019-11-15 20:43:37,640 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_5d0385d0-3e16-4649-ae43-b870ffe08182/bin/uautomizer/data/fdc809fc5/659f6bc258664fe381210a1508b998a0/FLAG4c1169c1c [2019-11-15 20:43:37,938 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_5d0385d0-3e16-4649-ae43-b870ffe08182/bin/uautomizer/data/fdc809fc5/659f6bc258664fe381210a1508b998a0 [2019-11-15 20:43:37,941 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 20:43:37,942 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 20:43:37,943 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 20:43:37,943 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 20:43:37,947 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 20:43:37,948 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:43:37" (1/1) ... [2019-11-15 20:43:37,950 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@66f83642 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:43:37, skipping insertion in model container [2019-11-15 20:43:37,950 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:43:37" (1/1) ... [2019-11-15 20:43:37,956 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 20:43:38,019 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 20:43:38,506 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:43:38,518 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 20:43:38,593 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:43:38,671 INFO L192 MainTranslator]: Completed translation [2019-11-15 20:43:38,671 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:43:38 WrapperNode [2019-11-15 20:43:38,672 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 20:43:38,672 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 20:43:38,673 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 20:43:38,673 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 20:43:38,681 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:43:38" (1/1) ... [2019-11-15 20:43:38,701 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:43:38" (1/1) ... [2019-11-15 20:43:38,733 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 20:43:38,734 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 20:43:38,734 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 20:43:38,734 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 20:43:38,741 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:43:38" (1/1) ... [2019-11-15 20:43:38,742 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:43:38" (1/1) ... [2019-11-15 20:43:38,746 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:43:38" (1/1) ... [2019-11-15 20:43:38,746 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:43:38" (1/1) ... [2019-11-15 20:43:38,756 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:43:38" (1/1) ... [2019-11-15 20:43:38,760 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:43:38" (1/1) ... [2019-11-15 20:43:38,764 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:43:38" (1/1) ... [2019-11-15 20:43:38,768 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 20:43:38,769 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 20:43:38,769 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 20:43:38,769 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 20:43:38,770 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:43:38" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_5d0385d0-3e16-4649-ae43-b870ffe08182/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:43:38,831 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 20:43:38,832 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 20:43:38,832 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 20:43:38,832 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 20:43:38,832 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 20:43:38,832 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 20:43:38,833 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 20:43:38,833 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 20:43:38,833 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 20:43:38,833 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 20:43:38,833 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 20:43:38,835 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 20:43:39,451 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 20:43:39,454 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 20:43:39,455 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:43:39 BoogieIcfgContainer [2019-11-15 20:43:39,455 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 20:43:39,456 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 20:43:39,456 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 20:43:39,459 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 20:43:39,459 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 08:43:37" (1/3) ... [2019-11-15 20:43:39,460 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1a344c05 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:43:39, skipping insertion in model container [2019-11-15 20:43:39,460 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:43:38" (2/3) ... [2019-11-15 20:43:39,461 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1a344c05 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:43:39, skipping insertion in model container [2019-11-15 20:43:39,461 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:43:39" (3/3) ... [2019-11-15 20:43:39,464 INFO L109 eAbstractionObserver]: Analyzing ICFG mix054_rmo.opt.i [2019-11-15 20:43:39,498 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,498 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,498 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,498 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,499 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,499 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,499 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,499 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,499 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,500 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,500 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,500 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,500 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,500 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,500 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,501 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,501 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,501 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,501 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,501 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,501 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,502 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,502 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,502 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,502 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,502 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,503 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,503 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,503 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,503 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,504 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,504 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,504 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,504 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,504 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,504 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,505 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,505 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,505 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,505 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,506 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,506 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,506 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,506 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,506 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,506 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,507 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,507 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,507 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,507 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,507 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,507 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,508 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,508 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,508 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,508 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,508 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,509 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,509 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,509 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,509 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,509 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,510 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,510 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:43:39,515 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 20:43:39,515 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 20:43:39,523 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 20:43:39,533 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 20:43:39,551 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 20:43:39,551 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 20:43:39,551 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 20:43:39,551 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 20:43:39,551 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 20:43:39,552 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 20:43:39,552 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 20:43:39,552 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 20:43:39,568 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 139 places, 177 transitions [2019-11-15 20:43:41,481 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22493 states. [2019-11-15 20:43:41,484 INFO L276 IsEmpty]: Start isEmpty. Operand 22493 states. [2019-11-15 20:43:41,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-11-15 20:43:41,496 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:43:41,497 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:43:41,499 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:43:41,504 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:43:41,505 INFO L82 PathProgramCache]: Analyzing trace with hash -1169224313, now seen corresponding path program 1 times [2019-11-15 20:43:41,514 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:43:41,514 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [454572276] [2019-11-15 20:43:41,514 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:43:41,515 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:43:41,515 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:43:41,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:43:41,891 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:43:41,891 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [454572276] [2019-11-15 20:43:41,892 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:43:41,893 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:43:41,893 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1499522579] [2019-11-15 20:43:41,901 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:43:41,901 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:43:41,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:43:41,917 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:43:41,920 INFO L87 Difference]: Start difference. First operand 22493 states. Second operand 4 states. [2019-11-15 20:43:42,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:43:42,445 INFO L93 Difference]: Finished difference Result 23445 states and 91746 transitions. [2019-11-15 20:43:42,446 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 20:43:42,447 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2019-11-15 20:43:42,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:43:42,690 INFO L225 Difference]: With dead ends: 23445 [2019-11-15 20:43:42,690 INFO L226 Difference]: Without dead ends: 21269 [2019-11-15 20:43:42,692 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:43:42,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21269 states. [2019-11-15 20:43:43,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21269 to 21269. [2019-11-15 20:43:43,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21269 states. [2019-11-15 20:43:44,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21269 states to 21269 states and 83770 transitions. [2019-11-15 20:43:44,006 INFO L78 Accepts]: Start accepts. Automaton has 21269 states and 83770 transitions. Word has length 36 [2019-11-15 20:43:44,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:43:44,007 INFO L462 AbstractCegarLoop]: Abstraction has 21269 states and 83770 transitions. [2019-11-15 20:43:44,007 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:43:44,007 INFO L276 IsEmpty]: Start isEmpty. Operand 21269 states and 83770 transitions. [2019-11-15 20:43:44,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-11-15 20:43:44,015 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:43:44,016 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:43:44,016 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:43:44,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:43:44,017 INFO L82 PathProgramCache]: Analyzing trace with hash -388831628, now seen corresponding path program 1 times [2019-11-15 20:43:44,017 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:43:44,017 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [21903960] [2019-11-15 20:43:44,017 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:43:44,018 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:43:44,018 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:43:44,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:43:44,122 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:43:44,122 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [21903960] [2019-11-15 20:43:44,122 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:43:44,122 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:43:44,122 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1043867587] [2019-11-15 20:43:44,124 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:43:44,124 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:43:44,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:43:44,125 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:43:44,125 INFO L87 Difference]: Start difference. First operand 21269 states and 83770 transitions. Second operand 5 states. [2019-11-15 20:43:44,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:43:44,956 INFO L93 Difference]: Finished difference Result 34703 states and 129062 transitions. [2019-11-15 20:43:44,957 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:43:44,957 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2019-11-15 20:43:44,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:43:45,110 INFO L225 Difference]: With dead ends: 34703 [2019-11-15 20:43:45,111 INFO L226 Difference]: Without dead ends: 34559 [2019-11-15 20:43:45,111 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:43:45,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34559 states. [2019-11-15 20:43:46,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34559 to 33059. [2019-11-15 20:43:46,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33059 states. [2019-11-15 20:43:46,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33059 states to 33059 states and 123950 transitions. [2019-11-15 20:43:46,496 INFO L78 Accepts]: Start accepts. Automaton has 33059 states and 123950 transitions. Word has length 43 [2019-11-15 20:43:46,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:43:46,498 INFO L462 AbstractCegarLoop]: Abstraction has 33059 states and 123950 transitions. [2019-11-15 20:43:46,498 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:43:46,498 INFO L276 IsEmpty]: Start isEmpty. Operand 33059 states and 123950 transitions. [2019-11-15 20:43:46,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-15 20:43:46,504 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:43:46,504 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:43:46,505 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:43:46,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:43:46,505 INFO L82 PathProgramCache]: Analyzing trace with hash -2129278721, now seen corresponding path program 1 times [2019-11-15 20:43:46,506 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:43:46,506 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [874287560] [2019-11-15 20:43:46,506 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:43:46,507 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:43:46,507 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:43:46,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:43:46,613 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:43:46,613 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [874287560] [2019-11-15 20:43:46,613 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:43:46,613 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:43:46,614 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [720302340] [2019-11-15 20:43:46,614 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:43:46,614 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:43:46,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:43:46,615 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:43:46,615 INFO L87 Difference]: Start difference. First operand 33059 states and 123950 transitions. Second operand 5 states. [2019-11-15 20:43:47,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:43:47,171 INFO L93 Difference]: Finished difference Result 40211 states and 148619 transitions. [2019-11-15 20:43:47,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:43:47,650 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-11-15 20:43:47,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:43:47,795 INFO L225 Difference]: With dead ends: 40211 [2019-11-15 20:43:47,796 INFO L226 Difference]: Without dead ends: 40051 [2019-11-15 20:43:47,796 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:43:48,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40051 states. [2019-11-15 20:43:48,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40051 to 34632. [2019-11-15 20:43:48,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34632 states. [2019-11-15 20:43:48,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34632 states to 34632 states and 129246 transitions. [2019-11-15 20:43:48,860 INFO L78 Accepts]: Start accepts. Automaton has 34632 states and 129246 transitions. Word has length 44 [2019-11-15 20:43:48,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:43:48,861 INFO L462 AbstractCegarLoop]: Abstraction has 34632 states and 129246 transitions. [2019-11-15 20:43:48,861 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:43:48,861 INFO L276 IsEmpty]: Start isEmpty. Operand 34632 states and 129246 transitions. [2019-11-15 20:43:48,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-15 20:43:48,876 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:43:48,876 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:43:48,877 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:43:48,877 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:43:48,877 INFO L82 PathProgramCache]: Analyzing trace with hash -736140046, now seen corresponding path program 1 times [2019-11-15 20:43:48,877 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:43:48,878 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [390111467] [2019-11-15 20:43:48,878 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:43:48,878 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:43:48,878 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:43:48,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:43:48,969 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:43:48,970 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [390111467] [2019-11-15 20:43:48,970 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:43:48,970 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:43:48,970 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [917278524] [2019-11-15 20:43:48,971 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:43:48,971 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:43:48,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:43:48,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:43:48,971 INFO L87 Difference]: Start difference. First operand 34632 states and 129246 transitions. Second operand 6 states. [2019-11-15 20:43:49,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:43:49,987 INFO L93 Difference]: Finished difference Result 45660 states and 166140 transitions. [2019-11-15 20:43:49,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 20:43:49,987 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 51 [2019-11-15 20:43:49,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:43:50,718 INFO L225 Difference]: With dead ends: 45660 [2019-11-15 20:43:50,718 INFO L226 Difference]: Without dead ends: 45516 [2019-11-15 20:43:50,719 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 20:43:50,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45516 states. [2019-11-15 20:43:51,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45516 to 33595. [2019-11-15 20:43:51,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33595 states. [2019-11-15 20:43:51,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33595 states to 33595 states and 125401 transitions. [2019-11-15 20:43:51,563 INFO L78 Accepts]: Start accepts. Automaton has 33595 states and 125401 transitions. Word has length 51 [2019-11-15 20:43:51,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:43:51,564 INFO L462 AbstractCegarLoop]: Abstraction has 33595 states and 125401 transitions. [2019-11-15 20:43:51,564 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:43:51,564 INFO L276 IsEmpty]: Start isEmpty. Operand 33595 states and 125401 transitions. [2019-11-15 20:43:51,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-11-15 20:43:51,602 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:43:51,602 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:43:51,602 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:43:51,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:43:51,603 INFO L82 PathProgramCache]: Analyzing trace with hash 481645682, now seen corresponding path program 1 times [2019-11-15 20:43:51,603 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:43:51,603 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [10042536] [2019-11-15 20:43:51,603 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:43:51,604 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:43:51,604 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:43:51,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:43:51,688 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:43:51,688 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [10042536] [2019-11-15 20:43:51,688 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:43:51,689 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:43:51,689 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [936932562] [2019-11-15 20:43:51,689 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:43:51,689 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:43:51,689 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:43:51,690 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:43:51,690 INFO L87 Difference]: Start difference. First operand 33595 states and 125401 transitions. Second operand 6 states. [2019-11-15 20:43:52,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:43:52,314 INFO L93 Difference]: Finished difference Result 46067 states and 167834 transitions. [2019-11-15 20:43:52,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 20:43:52,315 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-11-15 20:43:52,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:43:53,213 INFO L225 Difference]: With dead ends: 46067 [2019-11-15 20:43:53,213 INFO L226 Difference]: Without dead ends: 45827 [2019-11-15 20:43:53,213 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 20:43:53,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45827 states. [2019-11-15 20:43:53,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45827 to 39956. [2019-11-15 20:43:53,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39956 states. [2019-11-15 20:43:54,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39956 states to 39956 states and 147325 transitions. [2019-11-15 20:43:54,003 INFO L78 Accepts]: Start accepts. Automaton has 39956 states and 147325 transitions. Word has length 58 [2019-11-15 20:43:54,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:43:54,003 INFO L462 AbstractCegarLoop]: Abstraction has 39956 states and 147325 transitions. [2019-11-15 20:43:54,004 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:43:54,004 INFO L276 IsEmpty]: Start isEmpty. Operand 39956 states and 147325 transitions. [2019-11-15 20:43:54,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-15 20:43:54,041 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:43:54,041 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:43:54,041 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:43:54,042 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:43:54,042 INFO L82 PathProgramCache]: Analyzing trace with hash 751812519, now seen corresponding path program 1 times [2019-11-15 20:43:54,042 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:43:54,042 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1434275494] [2019-11-15 20:43:54,042 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:43:54,043 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:43:54,043 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:43:54,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:43:54,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:43:54,091 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1434275494] [2019-11-15 20:43:54,092 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:43:54,092 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:43:54,092 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [669261190] [2019-11-15 20:43:54,092 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:43:54,092 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:43:54,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:43:54,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:43:54,093 INFO L87 Difference]: Start difference. First operand 39956 states and 147325 transitions. Second operand 3 states. [2019-11-15 20:43:54,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:43:54,338 INFO L93 Difference]: Finished difference Result 50254 states and 182160 transitions. [2019-11-15 20:43:54,339 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:43:54,339 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 60 [2019-11-15 20:43:54,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:43:54,447 INFO L225 Difference]: With dead ends: 50254 [2019-11-15 20:43:54,447 INFO L226 Difference]: Without dead ends: 50254 [2019-11-15 20:43:54,447 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:43:54,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50254 states. [2019-11-15 20:43:55,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50254 to 43886. [2019-11-15 20:43:55,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43886 states. [2019-11-15 20:43:59,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43886 states to 43886 states and 160763 transitions. [2019-11-15 20:43:59,111 INFO L78 Accepts]: Start accepts. Automaton has 43886 states and 160763 transitions. Word has length 60 [2019-11-15 20:43:59,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:43:59,112 INFO L462 AbstractCegarLoop]: Abstraction has 43886 states and 160763 transitions. [2019-11-15 20:43:59,112 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:43:59,112 INFO L276 IsEmpty]: Start isEmpty. Operand 43886 states and 160763 transitions. [2019-11-15 20:43:59,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-11-15 20:43:59,147 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:43:59,147 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:43:59,147 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:43:59,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:43:59,148 INFO L82 PathProgramCache]: Analyzing trace with hash -1820538073, now seen corresponding path program 1 times [2019-11-15 20:43:59,148 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:43:59,148 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [240918155] [2019-11-15 20:43:59,149 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:43:59,149 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:43:59,149 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:43:59,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:43:59,248 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:43:59,248 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [240918155] [2019-11-15 20:43:59,248 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:43:59,248 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:43:59,249 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [160373561] [2019-11-15 20:43:59,249 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:43:59,249 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:43:59,249 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:43:59,250 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:43:59,250 INFO L87 Difference]: Start difference. First operand 43886 states and 160763 transitions. Second operand 7 states. [2019-11-15 20:44:00,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:00,116 INFO L93 Difference]: Finished difference Result 55882 states and 200497 transitions. [2019-11-15 20:44:00,117 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 20:44:00,117 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-11-15 20:44:00,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:00,237 INFO L225 Difference]: With dead ends: 55882 [2019-11-15 20:44:00,237 INFO L226 Difference]: Without dead ends: 55642 [2019-11-15 20:44:00,237 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-15 20:44:00,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55642 states. [2019-11-15 20:44:01,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55642 to 45112. [2019-11-15 20:44:01,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45112 states. [2019-11-15 20:44:01,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45112 states to 45112 states and 164930 transitions. [2019-11-15 20:44:01,196 INFO L78 Accepts]: Start accepts. Automaton has 45112 states and 164930 transitions. Word has length 64 [2019-11-15 20:44:01,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:01,196 INFO L462 AbstractCegarLoop]: Abstraction has 45112 states and 164930 transitions. [2019-11-15 20:44:01,196 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:44:01,196 INFO L276 IsEmpty]: Start isEmpty. Operand 45112 states and 164930 transitions. [2019-11-15 20:44:01,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-15 20:44:01,232 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:01,232 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:01,232 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:01,233 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:01,233 INFO L82 PathProgramCache]: Analyzing trace with hash 278498085, now seen corresponding path program 1 times [2019-11-15 20:44:01,233 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:01,233 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [45692015] [2019-11-15 20:44:01,233 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:01,233 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:01,233 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:01,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:01,298 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:01,299 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [45692015] [2019-11-15 20:44:01,299 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:01,299 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:44:01,299 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1292276280] [2019-11-15 20:44:01,300 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:44:01,300 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:01,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:44:01,300 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:44:01,301 INFO L87 Difference]: Start difference. First operand 45112 states and 164930 transitions. Second operand 5 states. [2019-11-15 20:44:02,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:02,997 INFO L93 Difference]: Finished difference Result 114994 states and 419362 transitions. [2019-11-15 20:44:02,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 20:44:02,998 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-11-15 20:44:02,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:03,272 INFO L225 Difference]: With dead ends: 114994 [2019-11-15 20:44:03,272 INFO L226 Difference]: Without dead ends: 114254 [2019-11-15 20:44:03,272 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-15 20:44:03,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114254 states. [2019-11-15 20:44:04,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114254 to 64567. [2019-11-15 20:44:04,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64567 states. [2019-11-15 20:44:05,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64567 states to 64567 states and 236504 transitions. [2019-11-15 20:44:05,061 INFO L78 Accepts]: Start accepts. Automaton has 64567 states and 236504 transitions. Word has length 65 [2019-11-15 20:44:05,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:05,061 INFO L462 AbstractCegarLoop]: Abstraction has 64567 states and 236504 transitions. [2019-11-15 20:44:05,061 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:44:05,061 INFO L276 IsEmpty]: Start isEmpty. Operand 64567 states and 236504 transitions. [2019-11-15 20:44:05,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-15 20:44:05,119 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:05,119 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:05,119 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:05,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:05,120 INFO L82 PathProgramCache]: Analyzing trace with hash 1338404775, now seen corresponding path program 1 times [2019-11-15 20:44:05,120 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:05,120 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1337316157] [2019-11-15 20:44:05,120 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:05,120 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:05,120 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:05,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:05,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:05,221 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1337316157] [2019-11-15 20:44:05,221 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:05,221 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:44:05,221 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1729669463] [2019-11-15 20:44:05,222 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:44:05,222 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:05,222 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:44:05,223 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:44:05,223 INFO L87 Difference]: Start difference. First operand 64567 states and 236504 transitions. Second operand 7 states. [2019-11-15 20:44:06,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:06,622 INFO L93 Difference]: Finished difference Result 74791 states and 270015 transitions. [2019-11-15 20:44:06,623 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 20:44:06,623 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-11-15 20:44:06,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:06,795 INFO L225 Difference]: With dead ends: 74791 [2019-11-15 20:44:06,796 INFO L226 Difference]: Without dead ends: 74591 [2019-11-15 20:44:06,796 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-15 20:44:07,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74591 states. [2019-11-15 20:44:08,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74591 to 65445. [2019-11-15 20:44:08,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65445 states. [2019-11-15 20:44:08,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65445 states to 65445 states and 239375 transitions. [2019-11-15 20:44:08,791 INFO L78 Accepts]: Start accepts. Automaton has 65445 states and 239375 transitions. Word has length 65 [2019-11-15 20:44:08,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:08,791 INFO L462 AbstractCegarLoop]: Abstraction has 65445 states and 239375 transitions. [2019-11-15 20:44:08,791 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:44:08,791 INFO L276 IsEmpty]: Start isEmpty. Operand 65445 states and 239375 transitions. [2019-11-15 20:44:08,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-11-15 20:44:08,870 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:08,871 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:08,871 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:08,871 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:08,871 INFO L82 PathProgramCache]: Analyzing trace with hash 1556884819, now seen corresponding path program 1 times [2019-11-15 20:44:08,871 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:08,872 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2111913991] [2019-11-15 20:44:08,872 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:08,872 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:08,872 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:08,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:08,969 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:08,969 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2111913991] [2019-11-15 20:44:08,969 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:08,969 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:44:08,970 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [48935452] [2019-11-15 20:44:08,970 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:44:08,970 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:08,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:44:08,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:44:08,971 INFO L87 Difference]: Start difference. First operand 65445 states and 239375 transitions. Second operand 4 states. [2019-11-15 20:44:09,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:09,088 INFO L93 Difference]: Finished difference Result 21246 states and 67090 transitions. [2019-11-15 20:44:09,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:44:09,088 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-11-15 20:44:09,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:09,122 INFO L225 Difference]: With dead ends: 21246 [2019-11-15 20:44:09,122 INFO L226 Difference]: Without dead ends: 20547 [2019-11-15 20:44:09,123 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:44:09,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20547 states. [2019-11-15 20:44:09,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20547 to 20439. [2019-11-15 20:44:09,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20439 states. [2019-11-15 20:44:09,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20439 states to 20439 states and 64584 transitions. [2019-11-15 20:44:09,436 INFO L78 Accepts]: Start accepts. Automaton has 20439 states and 64584 transitions. Word has length 67 [2019-11-15 20:44:09,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:09,436 INFO L462 AbstractCegarLoop]: Abstraction has 20439 states and 64584 transitions. [2019-11-15 20:44:09,437 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:44:09,437 INFO L276 IsEmpty]: Start isEmpty. Operand 20439 states and 64584 transitions. [2019-11-15 20:44:09,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-11-15 20:44:09,457 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:09,457 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:09,457 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:09,457 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:09,457 INFO L82 PathProgramCache]: Analyzing trace with hash -1754303503, now seen corresponding path program 1 times [2019-11-15 20:44:09,457 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:09,458 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1401011593] [2019-11-15 20:44:09,458 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:09,458 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:09,458 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:09,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:09,575 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:09,576 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1401011593] [2019-11-15 20:44:09,576 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:09,576 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:44:09,576 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1421197823] [2019-11-15 20:44:09,577 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:44:09,577 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:09,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:44:09,578 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:44:09,578 INFO L87 Difference]: Start difference. First operand 20439 states and 64584 transitions. Second operand 8 states. [2019-11-15 20:44:10,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:10,694 INFO L93 Difference]: Finished difference Result 22581 states and 70785 transitions. [2019-11-15 20:44:10,694 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-11-15 20:44:10,694 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 77 [2019-11-15 20:44:10,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:10,733 INFO L225 Difference]: With dead ends: 22581 [2019-11-15 20:44:10,733 INFO L226 Difference]: Without dead ends: 22533 [2019-11-15 20:44:10,734 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=165, Invalid=591, Unknown=0, NotChecked=0, Total=756 [2019-11-15 20:44:10,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22533 states. [2019-11-15 20:44:11,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22533 to 17910. [2019-11-15 20:44:11,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17910 states. [2019-11-15 20:44:11,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17910 states to 17910 states and 56952 transitions. [2019-11-15 20:44:11,056 INFO L78 Accepts]: Start accepts. Automaton has 17910 states and 56952 transitions. Word has length 77 [2019-11-15 20:44:11,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:11,056 INFO L462 AbstractCegarLoop]: Abstraction has 17910 states and 56952 transitions. [2019-11-15 20:44:11,056 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:44:11,056 INFO L276 IsEmpty]: Start isEmpty. Operand 17910 states and 56952 transitions. [2019-11-15 20:44:11,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-15 20:44:11,074 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:11,075 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:11,075 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:11,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:11,075 INFO L82 PathProgramCache]: Analyzing trace with hash 1051778439, now seen corresponding path program 1 times [2019-11-15 20:44:11,075 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:11,075 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [619289400] [2019-11-15 20:44:11,075 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:11,076 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:11,076 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:11,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:11,133 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:11,133 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [619289400] [2019-11-15 20:44:11,134 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:11,134 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:11,134 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1060130258] [2019-11-15 20:44:11,135 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:11,135 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:11,135 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:11,135 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:11,136 INFO L87 Difference]: Start difference. First operand 17910 states and 56952 transitions. Second operand 3 states. [2019-11-15 20:44:11,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:11,421 INFO L93 Difference]: Finished difference Result 19343 states and 61175 transitions. [2019-11-15 20:44:11,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:11,421 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 78 [2019-11-15 20:44:11,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:11,464 INFO L225 Difference]: With dead ends: 19343 [2019-11-15 20:44:11,464 INFO L226 Difference]: Without dead ends: 19343 [2019-11-15 20:44:11,464 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:11,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19343 states. [2019-11-15 20:44:11,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19343 to 18604. [2019-11-15 20:44:11,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18604 states. [2019-11-15 20:44:11,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18604 states to 18604 states and 59000 transitions. [2019-11-15 20:44:11,787 INFO L78 Accepts]: Start accepts. Automaton has 18604 states and 59000 transitions. Word has length 78 [2019-11-15 20:44:11,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:11,788 INFO L462 AbstractCegarLoop]: Abstraction has 18604 states and 59000 transitions. [2019-11-15 20:44:11,788 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:11,788 INFO L276 IsEmpty]: Start isEmpty. Operand 18604 states and 59000 transitions. [2019-11-15 20:44:11,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 20:44:11,806 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:11,806 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:11,806 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:11,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:11,807 INFO L82 PathProgramCache]: Analyzing trace with hash 1904019491, now seen corresponding path program 1 times [2019-11-15 20:44:11,807 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:11,807 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1578648465] [2019-11-15 20:44:11,808 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:11,808 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:11,808 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:11,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:11,878 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:11,878 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1578648465] [2019-11-15 20:44:11,878 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:11,879 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:44:11,879 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1516157625] [2019-11-15 20:44:11,879 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:44:11,880 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:11,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:44:11,881 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:44:11,881 INFO L87 Difference]: Start difference. First operand 18604 states and 59000 transitions. Second operand 4 states. [2019-11-15 20:44:12,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:12,237 INFO L93 Difference]: Finished difference Result 22440 states and 70067 transitions. [2019-11-15 20:44:12,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 20:44:12,238 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-11-15 20:44:12,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:12,272 INFO L225 Difference]: With dead ends: 22440 [2019-11-15 20:44:12,273 INFO L226 Difference]: Without dead ends: 22332 [2019-11-15 20:44:12,273 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:44:12,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22332 states. [2019-11-15 20:44:12,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22332 to 21225. [2019-11-15 20:44:12,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21225 states. [2019-11-15 20:44:12,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21225 states to 21225 states and 66650 transitions. [2019-11-15 20:44:12,743 INFO L78 Accepts]: Start accepts. Automaton has 21225 states and 66650 transitions. Word has length 79 [2019-11-15 20:44:12,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:12,743 INFO L462 AbstractCegarLoop]: Abstraction has 21225 states and 66650 transitions. [2019-11-15 20:44:12,743 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:44:12,744 INFO L276 IsEmpty]: Start isEmpty. Operand 21225 states and 66650 transitions. [2019-11-15 20:44:12,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 20:44:12,767 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:12,768 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:12,768 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:12,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:12,768 INFO L82 PathProgramCache]: Analyzing trace with hash -31640796, now seen corresponding path program 1 times [2019-11-15 20:44:12,769 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:12,769 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1458366896] [2019-11-15 20:44:12,769 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:12,769 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:12,769 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:12,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:12,829 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:12,829 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1458366896] [2019-11-15 20:44:12,829 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:12,829 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:12,829 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [611442536] [2019-11-15 20:44:12,830 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:12,830 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:12,830 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:12,830 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:12,830 INFO L87 Difference]: Start difference. First operand 21225 states and 66650 transitions. Second operand 3 states. [2019-11-15 20:44:13,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:13,057 INFO L93 Difference]: Finished difference Result 22696 states and 70972 transitions. [2019-11-15 20:44:13,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:13,057 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-11-15 20:44:13,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:13,091 INFO L225 Difference]: With dead ends: 22696 [2019-11-15 20:44:13,091 INFO L226 Difference]: Without dead ends: 22696 [2019-11-15 20:44:13,092 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:13,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22696 states. [2019-11-15 20:44:13,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22696 to 21953. [2019-11-15 20:44:13,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21953 states. [2019-11-15 20:44:13,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21953 states to 21953 states and 68786 transitions. [2019-11-15 20:44:13,427 INFO L78 Accepts]: Start accepts. Automaton has 21953 states and 68786 transitions. Word has length 79 [2019-11-15 20:44:13,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:13,428 INFO L462 AbstractCegarLoop]: Abstraction has 21953 states and 68786 transitions. [2019-11-15 20:44:13,428 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:13,428 INFO L276 IsEmpty]: Start isEmpty. Operand 21953 states and 68786 transitions. [2019-11-15 20:44:13,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:44:13,449 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:13,449 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:13,449 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:13,449 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:13,449 INFO L82 PathProgramCache]: Analyzing trace with hash -211181876, now seen corresponding path program 1 times [2019-11-15 20:44:13,449 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:13,449 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1294709041] [2019-11-15 20:44:13,450 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:13,450 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:13,450 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:13,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:13,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:13,557 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1294709041] [2019-11-15 20:44:13,558 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:13,558 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:44:13,558 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1637478021] [2019-11-15 20:44:13,558 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:44:13,563 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:13,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:44:13,563 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:44:13,564 INFO L87 Difference]: Start difference. First operand 21953 states and 68786 transitions. Second operand 6 states. [2019-11-15 20:44:14,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:14,081 INFO L93 Difference]: Finished difference Result 23567 states and 73153 transitions. [2019-11-15 20:44:14,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:44:14,081 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-11-15 20:44:14,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:14,122 INFO L225 Difference]: With dead ends: 23567 [2019-11-15 20:44:14,123 INFO L226 Difference]: Without dead ends: 23567 [2019-11-15 20:44:14,125 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:44:14,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23567 states. [2019-11-15 20:44:14,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23567 to 22578. [2019-11-15 20:44:14,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22578 states. [2019-11-15 20:44:14,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22578 states to 22578 states and 70288 transitions. [2019-11-15 20:44:14,499 INFO L78 Accepts]: Start accepts. Automaton has 22578 states and 70288 transitions. Word has length 80 [2019-11-15 20:44:14,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:14,499 INFO L462 AbstractCegarLoop]: Abstraction has 22578 states and 70288 transitions. [2019-11-15 20:44:14,499 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:44:14,500 INFO L276 IsEmpty]: Start isEmpty. Operand 22578 states and 70288 transitions. [2019-11-15 20:44:14,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:44:14,522 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:14,522 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:14,522 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:14,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:14,523 INFO L82 PathProgramCache]: Analyzing trace with hash -2146842163, now seen corresponding path program 1 times [2019-11-15 20:44:14,523 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:14,523 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [345315835] [2019-11-15 20:44:14,523 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:14,524 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:14,524 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:14,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:14,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:14,645 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [345315835] [2019-11-15 20:44:14,646 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:14,649 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:44:14,649 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [680861873] [2019-11-15 20:44:14,650 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:44:14,650 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:14,650 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:44:14,650 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:44:14,651 INFO L87 Difference]: Start difference. First operand 22578 states and 70288 transitions. Second operand 7 states. [2019-11-15 20:44:15,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:15,209 INFO L93 Difference]: Finished difference Result 24538 states and 75698 transitions. [2019-11-15 20:44:15,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 20:44:15,210 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-11-15 20:44:15,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:15,247 INFO L225 Difference]: With dead ends: 24538 [2019-11-15 20:44:15,247 INFO L226 Difference]: Without dead ends: 24538 [2019-11-15 20:44:15,247 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:44:15,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24538 states. [2019-11-15 20:44:15,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24538 to 23533. [2019-11-15 20:44:15,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23533 states. [2019-11-15 20:44:15,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23533 states to 23533 states and 72789 transitions. [2019-11-15 20:44:15,606 INFO L78 Accepts]: Start accepts. Automaton has 23533 states and 72789 transitions. Word has length 80 [2019-11-15 20:44:15,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:15,606 INFO L462 AbstractCegarLoop]: Abstraction has 23533 states and 72789 transitions. [2019-11-15 20:44:15,606 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:44:15,606 INFO L276 IsEmpty]: Start isEmpty. Operand 23533 states and 72789 transitions. [2019-11-15 20:44:15,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:44:15,630 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:15,630 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:15,630 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:15,631 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:15,631 INFO L82 PathProgramCache]: Analyzing trace with hash -1817076402, now seen corresponding path program 1 times [2019-11-15 20:44:15,631 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:15,631 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [246503837] [2019-11-15 20:44:15,631 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:15,631 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:15,631 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:15,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:15,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:15,696 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [246503837] [2019-11-15 20:44:15,696 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:15,696 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:44:15,696 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1353109947] [2019-11-15 20:44:15,696 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:44:15,697 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:15,697 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:44:15,697 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:15,697 INFO L87 Difference]: Start difference. First operand 23533 states and 72789 transitions. Second operand 3 states. [2019-11-15 20:44:15,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:15,820 INFO L93 Difference]: Finished difference Result 21443 states and 65847 transitions. [2019-11-15 20:44:15,820 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:44:15,820 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2019-11-15 20:44:15,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:15,865 INFO L225 Difference]: With dead ends: 21443 [2019-11-15 20:44:15,866 INFO L226 Difference]: Without dead ends: 21443 [2019-11-15 20:44:15,867 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:44:15,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21443 states. [2019-11-15 20:44:16,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21443 to 20628. [2019-11-15 20:44:16,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20628 states. [2019-11-15 20:44:16,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20628 states to 20628 states and 63530 transitions. [2019-11-15 20:44:16,316 INFO L78 Accepts]: Start accepts. Automaton has 20628 states and 63530 transitions. Word has length 80 [2019-11-15 20:44:16,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:16,317 INFO L462 AbstractCegarLoop]: Abstraction has 20628 states and 63530 transitions. [2019-11-15 20:44:16,317 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:44:16,317 INFO L276 IsEmpty]: Start isEmpty. Operand 20628 states and 63530 transitions. [2019-11-15 20:44:16,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:44:16,345 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:16,346 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:16,346 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:16,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:16,346 INFO L82 PathProgramCache]: Analyzing trace with hash 1169856429, now seen corresponding path program 1 times [2019-11-15 20:44:16,347 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:16,347 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1413748345] [2019-11-15 20:44:16,347 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:16,347 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:16,347 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:16,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:16,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:16,492 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1413748345] [2019-11-15 20:44:16,492 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:16,493 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:44:16,493 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [339631032] [2019-11-15 20:44:16,493 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:44:16,493 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:16,494 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:44:16,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:44:16,494 INFO L87 Difference]: Start difference. First operand 20628 states and 63530 transitions. Second operand 7 states. [2019-11-15 20:44:17,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:17,314 INFO L93 Difference]: Finished difference Result 38101 states and 117006 transitions. [2019-11-15 20:44:17,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 20:44:17,315 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-11-15 20:44:17,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:17,379 INFO L225 Difference]: With dead ends: 38101 [2019-11-15 20:44:17,379 INFO L226 Difference]: Without dead ends: 38101 [2019-11-15 20:44:17,380 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:44:17,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38101 states. [2019-11-15 20:44:17,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38101 to 23012. [2019-11-15 20:44:17,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23012 states. [2019-11-15 20:44:17,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23012 states to 23012 states and 70578 transitions. [2019-11-15 20:44:17,861 INFO L78 Accepts]: Start accepts. Automaton has 23012 states and 70578 transitions. Word has length 80 [2019-11-15 20:44:17,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:17,861 INFO L462 AbstractCegarLoop]: Abstraction has 23012 states and 70578 transitions. [2019-11-15 20:44:17,861 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:44:17,861 INFO L276 IsEmpty]: Start isEmpty. Operand 23012 states and 70578 transitions. [2019-11-15 20:44:17,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:44:17,884 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:17,884 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:17,884 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:17,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:17,884 INFO L82 PathProgramCache]: Analyzing trace with hash -1399629970, now seen corresponding path program 1 times [2019-11-15 20:44:17,885 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:17,885 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [286699978] [2019-11-15 20:44:17,885 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:17,885 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:17,885 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:17,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:17,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:17,969 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [286699978] [2019-11-15 20:44:17,969 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:17,969 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:44:17,969 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1348410637] [2019-11-15 20:44:17,970 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:44:17,970 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:17,970 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:44:17,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:44:17,971 INFO L87 Difference]: Start difference. First operand 23012 states and 70578 transitions. Second operand 5 states. [2019-11-15 20:44:18,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:18,032 INFO L93 Difference]: Finished difference Result 3218 states and 7897 transitions. [2019-11-15 20:44:18,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:44:18,032 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 80 [2019-11-15 20:44:18,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:18,036 INFO L225 Difference]: With dead ends: 3218 [2019-11-15 20:44:18,036 INFO L226 Difference]: Without dead ends: 2759 [2019-11-15 20:44:18,037 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:44:18,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2759 states. [2019-11-15 20:44:18,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2759 to 2509. [2019-11-15 20:44:18,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2509 states. [2019-11-15 20:44:18,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2509 states to 2509 states and 6115 transitions. [2019-11-15 20:44:18,076 INFO L78 Accepts]: Start accepts. Automaton has 2509 states and 6115 transitions. Word has length 80 [2019-11-15 20:44:18,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:18,077 INFO L462 AbstractCegarLoop]: Abstraction has 2509 states and 6115 transitions. [2019-11-15 20:44:18,077 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:44:18,077 INFO L276 IsEmpty]: Start isEmpty. Operand 2509 states and 6115 transitions. [2019-11-15 20:44:18,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-15 20:44:18,080 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:18,081 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:18,081 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:18,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:18,081 INFO L82 PathProgramCache]: Analyzing trace with hash 1816197766, now seen corresponding path program 1 times [2019-11-15 20:44:18,082 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:18,082 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [366110929] [2019-11-15 20:44:18,082 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:18,082 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:18,082 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:18,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:18,268 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:18,269 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [366110929] [2019-11-15 20:44:18,269 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:18,269 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:44:18,269 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1294213652] [2019-11-15 20:44:18,270 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:44:18,270 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:18,271 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:44:18,271 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:44:18,271 INFO L87 Difference]: Start difference. First operand 2509 states and 6115 transitions. Second operand 7 states. [2019-11-15 20:44:18,596 WARN L191 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 30 [2019-11-15 20:44:19,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:19,221 INFO L93 Difference]: Finished difference Result 3102 states and 7383 transitions. [2019-11-15 20:44:19,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-15 20:44:19,222 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 92 [2019-11-15 20:44:19,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:19,225 INFO L225 Difference]: With dead ends: 3102 [2019-11-15 20:44:19,226 INFO L226 Difference]: Without dead ends: 3102 [2019-11-15 20:44:19,226 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=71, Invalid=139, Unknown=0, NotChecked=0, Total=210 [2019-11-15 20:44:19,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3102 states. [2019-11-15 20:44:19,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3102 to 2583. [2019-11-15 20:44:19,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2583 states. [2019-11-15 20:44:19,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2583 states to 2583 states and 6274 transitions. [2019-11-15 20:44:19,268 INFO L78 Accepts]: Start accepts. Automaton has 2583 states and 6274 transitions. Word has length 92 [2019-11-15 20:44:19,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:19,268 INFO L462 AbstractCegarLoop]: Abstraction has 2583 states and 6274 transitions. [2019-11-15 20:44:19,268 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:44:19,268 INFO L276 IsEmpty]: Start isEmpty. Operand 2583 states and 6274 transitions. [2019-11-15 20:44:19,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-15 20:44:19,271 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:19,271 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:19,272 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:19,272 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:19,272 INFO L82 PathProgramCache]: Analyzing trace with hash 214790116, now seen corresponding path program 1 times [2019-11-15 20:44:19,273 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:19,273 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [172170975] [2019-11-15 20:44:19,273 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:19,273 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:19,273 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:19,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:19,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:19,407 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [172170975] [2019-11-15 20:44:19,407 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:19,407 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:44:19,408 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [292553529] [2019-11-15 20:44:19,408 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:44:19,408 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:19,409 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:44:19,409 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:44:19,409 INFO L87 Difference]: Start difference. First operand 2583 states and 6274 transitions. Second operand 6 states. [2019-11-15 20:44:19,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:19,713 INFO L93 Difference]: Finished difference Result 2703 states and 6468 transitions. [2019-11-15 20:44:19,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:44:19,713 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2019-11-15 20:44:19,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:19,716 INFO L225 Difference]: With dead ends: 2703 [2019-11-15 20:44:19,716 INFO L226 Difference]: Without dead ends: 2649 [2019-11-15 20:44:19,717 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:44:19,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2649 states. [2019-11-15 20:44:19,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2649 to 2576. [2019-11-15 20:44:19,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2576 states. [2019-11-15 20:44:19,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2576 states to 2576 states and 6241 transitions. [2019-11-15 20:44:19,753 INFO L78 Accepts]: Start accepts. Automaton has 2576 states and 6241 transitions. Word has length 92 [2019-11-15 20:44:19,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:19,754 INFO L462 AbstractCegarLoop]: Abstraction has 2576 states and 6241 transitions. [2019-11-15 20:44:19,754 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:44:19,754 INFO L276 IsEmpty]: Start isEmpty. Operand 2576 states and 6241 transitions. [2019-11-15 20:44:19,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-15 20:44:19,757 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:19,757 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:19,757 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:19,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:19,758 INFO L82 PathProgramCache]: Analyzing trace with hash -205259165, now seen corresponding path program 1 times [2019-11-15 20:44:19,758 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:19,758 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [436821053] [2019-11-15 20:44:19,759 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:19,759 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:19,759 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:19,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:19,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:19,912 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [436821053] [2019-11-15 20:44:19,912 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:19,913 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-15 20:44:19,913 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [129101985] [2019-11-15 20:44:19,913 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-15 20:44:19,914 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:19,914 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-15 20:44:19,914 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2019-11-15 20:44:19,914 INFO L87 Difference]: Start difference. First operand 2576 states and 6241 transitions. Second operand 9 states. [2019-11-15 20:44:21,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:21,397 INFO L93 Difference]: Finished difference Result 9970 states and 24626 transitions. [2019-11-15 20:44:21,398 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-11-15 20:44:21,398 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 92 [2019-11-15 20:44:21,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:21,406 INFO L225 Difference]: With dead ends: 9970 [2019-11-15 20:44:21,406 INFO L226 Difference]: Without dead ends: 9934 [2019-11-15 20:44:21,407 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 143 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=157, Invalid=493, Unknown=0, NotChecked=0, Total=650 [2019-11-15 20:44:21,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9934 states. [2019-11-15 20:44:21,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9934 to 3134. [2019-11-15 20:44:21,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3134 states. [2019-11-15 20:44:21,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3134 states to 3134 states and 7518 transitions. [2019-11-15 20:44:21,472 INFO L78 Accepts]: Start accepts. Automaton has 3134 states and 7518 transitions. Word has length 92 [2019-11-15 20:44:21,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:21,472 INFO L462 AbstractCegarLoop]: Abstraction has 3134 states and 7518 transitions. [2019-11-15 20:44:21,472 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-15 20:44:21,472 INFO L276 IsEmpty]: Start isEmpty. Operand 3134 states and 7518 transitions. [2019-11-15 20:44:21,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-15 20:44:21,474 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:21,474 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:21,475 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:21,475 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:21,475 INFO L82 PathProgramCache]: Analyzing trace with hash 756354852, now seen corresponding path program 1 times [2019-11-15 20:44:21,475 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:21,475 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1536907809] [2019-11-15 20:44:21,475 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:21,475 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:21,475 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:21,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:21,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:21,595 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1536907809] [2019-11-15 20:44:21,596 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:21,596 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:44:21,596 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [835492004] [2019-11-15 20:44:21,596 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:44:21,597 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:21,597 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:44:21,597 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:44:21,597 INFO L87 Difference]: Start difference. First operand 3134 states and 7518 transitions. Second operand 6 states. [2019-11-15 20:44:21,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:21,740 INFO L93 Difference]: Finished difference Result 2868 states and 6845 transitions. [2019-11-15 20:44:21,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 20:44:21,740 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2019-11-15 20:44:21,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:21,742 INFO L225 Difference]: With dead ends: 2868 [2019-11-15 20:44:21,742 INFO L226 Difference]: Without dead ends: 2868 [2019-11-15 20:44:21,743 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=43, Unknown=0, NotChecked=0, Total=72 [2019-11-15 20:44:21,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2868 states. [2019-11-15 20:44:21,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2868 to 2576. [2019-11-15 20:44:21,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2576 states. [2019-11-15 20:44:21,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2576 states to 2576 states and 6194 transitions. [2019-11-15 20:44:21,770 INFO L78 Accepts]: Start accepts. Automaton has 2576 states and 6194 transitions. Word has length 92 [2019-11-15 20:44:21,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:21,770 INFO L462 AbstractCegarLoop]: Abstraction has 2576 states and 6194 transitions. [2019-11-15 20:44:21,770 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:44:21,770 INFO L276 IsEmpty]: Start isEmpty. Operand 2576 states and 6194 transitions. [2019-11-15 20:44:21,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-15 20:44:21,772 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:21,772 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:21,772 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:21,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:21,773 INFO L82 PathProgramCache]: Analyzing trace with hash -1806666815, now seen corresponding path program 1 times [2019-11-15 20:44:21,773 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:21,773 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1197388790] [2019-11-15 20:44:21,773 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:21,773 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:21,773 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:21,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:21,893 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:21,894 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1197388790] [2019-11-15 20:44:21,894 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:21,894 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:44:21,894 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1815851900] [2019-11-15 20:44:21,895 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:44:21,895 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:21,895 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:44:21,896 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:44:21,896 INFO L87 Difference]: Start difference. First operand 2576 states and 6194 transitions. Second operand 7 states. [2019-11-15 20:44:22,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:22,238 INFO L93 Difference]: Finished difference Result 3719 states and 8784 transitions. [2019-11-15 20:44:22,238 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 20:44:22,238 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 92 [2019-11-15 20:44:22,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:22,242 INFO L225 Difference]: With dead ends: 3719 [2019-11-15 20:44:22,242 INFO L226 Difference]: Without dead ends: 3701 [2019-11-15 20:44:22,242 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2019-11-15 20:44:22,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3701 states. [2019-11-15 20:44:22,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3701 to 3233. [2019-11-15 20:44:22,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3233 states. [2019-11-15 20:44:22,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3233 states to 3233 states and 7667 transitions. [2019-11-15 20:44:22,284 INFO L78 Accepts]: Start accepts. Automaton has 3233 states and 7667 transitions. Word has length 92 [2019-11-15 20:44:22,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:22,284 INFO L462 AbstractCegarLoop]: Abstraction has 3233 states and 7667 transitions. [2019-11-15 20:44:22,284 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:44:22,284 INFO L276 IsEmpty]: Start isEmpty. Operand 3233 states and 7667 transitions. [2019-11-15 20:44:22,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-15 20:44:22,287 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:22,287 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:22,287 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:22,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:22,288 INFO L82 PathProgramCache]: Analyzing trace with hash -845052798, now seen corresponding path program 1 times [2019-11-15 20:44:22,288 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:22,288 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1624904507] [2019-11-15 20:44:22,288 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:22,288 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:22,289 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:22,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:22,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:22,426 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1624904507] [2019-11-15 20:44:22,426 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:22,426 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:44:22,426 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1811293829] [2019-11-15 20:44:22,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:44:22,427 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:22,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:44:22,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:44:22,427 INFO L87 Difference]: Start difference. First operand 3233 states and 7667 transitions. Second operand 7 states. [2019-11-15 20:44:22,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:22,917 INFO L93 Difference]: Finished difference Result 4142 states and 9845 transitions. [2019-11-15 20:44:22,917 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 20:44:22,917 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 92 [2019-11-15 20:44:22,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:22,921 INFO L225 Difference]: With dead ends: 4142 [2019-11-15 20:44:22,921 INFO L226 Difference]: Without dead ends: 4142 [2019-11-15 20:44:22,922 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=110, Unknown=0, NotChecked=0, Total=156 [2019-11-15 20:44:22,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4142 states. [2019-11-15 20:44:22,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4142 to 3455. [2019-11-15 20:44:22,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3455 states. [2019-11-15 20:44:22,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3455 states to 3455 states and 8221 transitions. [2019-11-15 20:44:22,965 INFO L78 Accepts]: Start accepts. Automaton has 3455 states and 8221 transitions. Word has length 92 [2019-11-15 20:44:22,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:22,965 INFO L462 AbstractCegarLoop]: Abstraction has 3455 states and 8221 transitions. [2019-11-15 20:44:22,966 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:44:22,966 INFO L276 IsEmpty]: Start isEmpty. Operand 3455 states and 8221 transitions. [2019-11-15 20:44:22,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-15 20:44:22,969 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:22,969 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:22,969 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:22,969 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:22,969 INFO L82 PathProgramCache]: Analyzing trace with hash 399711683, now seen corresponding path program 1 times [2019-11-15 20:44:22,969 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:22,969 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [786310142] [2019-11-15 20:44:22,970 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:22,970 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:22,970 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:22,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:23,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:23,106 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [786310142] [2019-11-15 20:44:23,106 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:23,106 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:44:23,106 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1240750196] [2019-11-15 20:44:23,107 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:44:23,107 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:23,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:44:23,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:44:23,108 INFO L87 Difference]: Start difference. First operand 3455 states and 8221 transitions. Second operand 6 states. [2019-11-15 20:44:23,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:23,359 INFO L93 Difference]: Finished difference Result 3782 states and 8960 transitions. [2019-11-15 20:44:23,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:44:23,360 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2019-11-15 20:44:23,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:23,363 INFO L225 Difference]: With dead ends: 3782 [2019-11-15 20:44:23,363 INFO L226 Difference]: Without dead ends: 3782 [2019-11-15 20:44:23,364 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:44:23,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3782 states. [2019-11-15 20:44:23,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3782 to 3439. [2019-11-15 20:44:23,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3439 states. [2019-11-15 20:44:23,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3439 states to 3439 states and 8189 transitions. [2019-11-15 20:44:23,408 INFO L78 Accepts]: Start accepts. Automaton has 3439 states and 8189 transitions. Word has length 92 [2019-11-15 20:44:23,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:23,408 INFO L462 AbstractCegarLoop]: Abstraction has 3439 states and 8189 transitions. [2019-11-15 20:44:23,408 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:44:23,409 INFO L276 IsEmpty]: Start isEmpty. Operand 3439 states and 8189 transitions. [2019-11-15 20:44:23,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-15 20:44:23,413 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:23,413 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:23,413 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:23,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:23,413 INFO L82 PathProgramCache]: Analyzing trace with hash -968557181, now seen corresponding path program 1 times [2019-11-15 20:44:23,413 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:23,414 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1021509944] [2019-11-15 20:44:23,414 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:23,414 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:23,414 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:23,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:23,575 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:23,576 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1021509944] [2019-11-15 20:44:23,576 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:23,576 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:44:23,577 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [493676094] [2019-11-15 20:44:23,577 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:44:23,577 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:23,578 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:44:23,578 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:44:23,578 INFO L87 Difference]: Start difference. First operand 3439 states and 8189 transitions. Second operand 8 states. [2019-11-15 20:44:24,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:24,071 INFO L93 Difference]: Finished difference Result 4245 states and 10073 transitions. [2019-11-15 20:44:24,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 20:44:24,072 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 92 [2019-11-15 20:44:24,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:24,077 INFO L225 Difference]: With dead ends: 4245 [2019-11-15 20:44:24,077 INFO L226 Difference]: Without dead ends: 4227 [2019-11-15 20:44:24,078 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2019-11-15 20:44:24,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4227 states. [2019-11-15 20:44:24,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4227 to 2954. [2019-11-15 20:44:24,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2954 states. [2019-11-15 20:44:24,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2954 states to 2954 states and 7114 transitions. [2019-11-15 20:44:24,130 INFO L78 Accepts]: Start accepts. Automaton has 2954 states and 7114 transitions. Word has length 92 [2019-11-15 20:44:24,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:24,131 INFO L462 AbstractCegarLoop]: Abstraction has 2954 states and 7114 transitions. [2019-11-15 20:44:24,131 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:44:24,131 INFO L276 IsEmpty]: Start isEmpty. Operand 2954 states and 7114 transitions. [2019-11-15 20:44:24,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-15 20:44:24,134 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:24,135 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:24,135 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:24,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:24,136 INFO L82 PathProgramCache]: Analyzing trace with hash 1237821317, now seen corresponding path program 1 times [2019-11-15 20:44:24,136 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:24,137 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [194328041] [2019-11-15 20:44:24,137 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:24,137 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:24,138 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:24,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:24,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:24,279 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [194328041] [2019-11-15 20:44:24,279 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:24,279 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:44:24,280 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1443809444] [2019-11-15 20:44:24,280 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:44:24,280 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:24,281 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:44:24,281 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:44:24,281 INFO L87 Difference]: Start difference. First operand 2954 states and 7114 transitions. Second operand 8 states. [2019-11-15 20:44:24,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:24,644 INFO L93 Difference]: Finished difference Result 4919 states and 12101 transitions. [2019-11-15 20:44:24,645 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 20:44:24,645 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 92 [2019-11-15 20:44:24,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:24,649 INFO L225 Difference]: With dead ends: 4919 [2019-11-15 20:44:24,650 INFO L226 Difference]: Without dead ends: 4919 [2019-11-15 20:44:24,650 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 20:44:24,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4919 states. [2019-11-15 20:44:24,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4919 to 2905. [2019-11-15 20:44:24,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2905 states. [2019-11-15 20:44:24,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2905 states to 2905 states and 7027 transitions. [2019-11-15 20:44:24,703 INFO L78 Accepts]: Start accepts. Automaton has 2905 states and 7027 transitions. Word has length 92 [2019-11-15 20:44:24,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:24,704 INFO L462 AbstractCegarLoop]: Abstraction has 2905 states and 7027 transitions. [2019-11-15 20:44:24,704 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:44:24,704 INFO L276 IsEmpty]: Start isEmpty. Operand 2905 states and 7027 transitions. [2019-11-15 20:44:24,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-15 20:44:24,706 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:24,706 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:24,706 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:24,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:24,706 INFO L82 PathProgramCache]: Analyzing trace with hash 1718537733, now seen corresponding path program 1 times [2019-11-15 20:44:24,707 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:24,707 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1007638710] [2019-11-15 20:44:24,707 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:24,707 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:24,707 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:24,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:24,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:24,826 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1007638710] [2019-11-15 20:44:24,826 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:24,826 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:44:24,826 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [752925818] [2019-11-15 20:44:24,827 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:44:24,827 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:24,827 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:44:24,827 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:44:24,828 INFO L87 Difference]: Start difference. First operand 2905 states and 7027 transitions. Second operand 6 states. [2019-11-15 20:44:24,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:24,981 INFO L93 Difference]: Finished difference Result 2608 states and 6154 transitions. [2019-11-15 20:44:24,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:44:24,982 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2019-11-15 20:44:24,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:24,985 INFO L225 Difference]: With dead ends: 2608 [2019-11-15 20:44:24,985 INFO L226 Difference]: Without dead ends: 2608 [2019-11-15 20:44:24,987 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:44:24,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2608 states. [2019-11-15 20:44:25,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2608 to 2030. [2019-11-15 20:44:25,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2030 states. [2019-11-15 20:44:25,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2030 states to 2030 states and 4848 transitions. [2019-11-15 20:44:25,021 INFO L78 Accepts]: Start accepts. Automaton has 2030 states and 4848 transitions. Word has length 92 [2019-11-15 20:44:25,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:25,022 INFO L462 AbstractCegarLoop]: Abstraction has 2030 states and 4848 transitions. [2019-11-15 20:44:25,022 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:44:25,022 INFO L276 IsEmpty]: Start isEmpty. Operand 2030 states and 4848 transitions. [2019-11-15 20:44:25,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:44:25,024 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:25,025 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:25,025 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:25,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:25,025 INFO L82 PathProgramCache]: Analyzing trace with hash -212737835, now seen corresponding path program 1 times [2019-11-15 20:44:25,026 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:25,026 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [344837062] [2019-11-15 20:44:25,026 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:25,026 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:25,026 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:25,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:25,152 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:25,152 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [344837062] [2019-11-15 20:44:25,152 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:25,153 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:44:25,153 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [15872877] [2019-11-15 20:44:25,153 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:44:25,153 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:25,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:44:25,154 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:44:25,154 INFO L87 Difference]: Start difference. First operand 2030 states and 4848 transitions. Second operand 8 states. [2019-11-15 20:44:25,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:25,866 INFO L93 Difference]: Finished difference Result 3208 states and 7392 transitions. [2019-11-15 20:44:25,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-15 20:44:25,866 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 94 [2019-11-15 20:44:25,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:25,870 INFO L225 Difference]: With dead ends: 3208 [2019-11-15 20:44:25,870 INFO L226 Difference]: Without dead ends: 3190 [2019-11-15 20:44:25,870 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=179, Unknown=0, NotChecked=0, Total=240 [2019-11-15 20:44:25,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3190 states. [2019-11-15 20:44:25,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3190 to 2395. [2019-11-15 20:44:25,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2395 states. [2019-11-15 20:44:25,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2395 states to 2395 states and 5664 transitions. [2019-11-15 20:44:25,900 INFO L78 Accepts]: Start accepts. Automaton has 2395 states and 5664 transitions. Word has length 94 [2019-11-15 20:44:25,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:25,901 INFO L462 AbstractCegarLoop]: Abstraction has 2395 states and 5664 transitions. [2019-11-15 20:44:25,901 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:44:25,901 INFO L276 IsEmpty]: Start isEmpty. Operand 2395 states and 5664 transitions. [2019-11-15 20:44:25,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:44:25,903 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:25,903 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:25,903 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:25,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:25,903 INFO L82 PathProgramCache]: Analyzing trace with hash 1032026646, now seen corresponding path program 1 times [2019-11-15 20:44:25,904 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:25,904 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156277706] [2019-11-15 20:44:25,904 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:25,904 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:25,904 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:25,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:26,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:26,024 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156277706] [2019-11-15 20:44:26,025 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:26,025 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:44:26,025 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1266134919] [2019-11-15 20:44:26,026 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:44:26,026 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:26,026 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:44:26,026 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:44:26,026 INFO L87 Difference]: Start difference. First operand 2395 states and 5664 transitions. Second operand 7 states. [2019-11-15 20:44:26,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:26,467 INFO L93 Difference]: Finished difference Result 3206 states and 7416 transitions. [2019-11-15 20:44:26,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 20:44:26,467 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-11-15 20:44:26,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:26,471 INFO L225 Difference]: With dead ends: 3206 [2019-11-15 20:44:26,471 INFO L226 Difference]: Without dead ends: 3178 [2019-11-15 20:44:26,472 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2019-11-15 20:44:26,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3178 states. [2019-11-15 20:44:26,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3178 to 2491. [2019-11-15 20:44:26,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2491 states. [2019-11-15 20:44:26,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2491 states to 2491 states and 5853 transitions. [2019-11-15 20:44:26,511 INFO L78 Accepts]: Start accepts. Automaton has 2491 states and 5853 transitions. Word has length 94 [2019-11-15 20:44:26,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:26,511 INFO L462 AbstractCegarLoop]: Abstraction has 2491 states and 5853 transitions. [2019-11-15 20:44:26,512 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:44:26,512 INFO L276 IsEmpty]: Start isEmpty. Operand 2491 states and 5853 transitions. [2019-11-15 20:44:26,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:44:26,515 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:26,515 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:26,515 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:26,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:26,516 INFO L82 PathProgramCache]: Analyzing trace with hash -903633641, now seen corresponding path program 1 times [2019-11-15 20:44:26,516 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:26,516 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284154643] [2019-11-15 20:44:26,516 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:26,516 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:26,517 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:26,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:26,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:26,616 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [284154643] [2019-11-15 20:44:26,616 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:26,616 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:44:26,616 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1312883034] [2019-11-15 20:44:26,617 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:44:26,617 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:26,617 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:44:26,617 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:44:26,617 INFO L87 Difference]: Start difference. First operand 2491 states and 5853 transitions. Second operand 6 states. [2019-11-15 20:44:26,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:26,822 INFO L93 Difference]: Finished difference Result 2483 states and 5755 transitions. [2019-11-15 20:44:26,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 20:44:26,822 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 20:44:26,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:26,825 INFO L225 Difference]: With dead ends: 2483 [2019-11-15 20:44:26,825 INFO L226 Difference]: Without dead ends: 2483 [2019-11-15 20:44:26,825 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 20:44:26,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2483 states. [2019-11-15 20:44:26,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2483 to 2331. [2019-11-15 20:44:26,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2331 states. [2019-11-15 20:44:26,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2331 states to 2331 states and 5463 transitions. [2019-11-15 20:44:26,858 INFO L78 Accepts]: Start accepts. Automaton has 2331 states and 5463 transitions. Word has length 94 [2019-11-15 20:44:26,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:26,859 INFO L462 AbstractCegarLoop]: Abstraction has 2331 states and 5463 transitions. [2019-11-15 20:44:26,859 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:44:26,859 INFO L276 IsEmpty]: Start isEmpty. Operand 2331 states and 5463 transitions. [2019-11-15 20:44:26,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:44:26,862 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:26,862 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:26,862 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:26,862 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:26,863 INFO L82 PathProgramCache]: Analyzing trace with hash -1818632361, now seen corresponding path program 1 times [2019-11-15 20:44:26,863 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:26,863 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1182772769] [2019-11-15 20:44:26,863 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:26,863 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:26,863 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:26,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:26,950 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:26,951 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1182772769] [2019-11-15 20:44:26,951 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:26,951 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:44:26,951 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2055870149] [2019-11-15 20:44:26,952 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:44:26,953 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:26,953 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:44:26,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:44:26,954 INFO L87 Difference]: Start difference. First operand 2331 states and 5463 transitions. Second operand 5 states. [2019-11-15 20:44:27,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:27,142 INFO L93 Difference]: Finished difference Result 2583 states and 6042 transitions. [2019-11-15 20:44:27,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:44:27,143 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-11-15 20:44:27,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:27,146 INFO L225 Difference]: With dead ends: 2583 [2019-11-15 20:44:27,146 INFO L226 Difference]: Without dead ends: 2565 [2019-11-15 20:44:27,146 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:44:27,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2565 states. [2019-11-15 20:44:27,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2565 to 2173. [2019-11-15 20:44:27,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2173 states. [2019-11-15 20:44:27,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2173 states to 2173 states and 5093 transitions. [2019-11-15 20:44:27,179 INFO L78 Accepts]: Start accepts. Automaton has 2173 states and 5093 transitions. Word has length 94 [2019-11-15 20:44:27,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:27,179 INFO L462 AbstractCegarLoop]: Abstraction has 2173 states and 5093 transitions. [2019-11-15 20:44:27,179 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:44:27,180 INFO L276 IsEmpty]: Start isEmpty. Operand 2173 states and 5093 transitions. [2019-11-15 20:44:27,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:44:27,182 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:27,182 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:27,182 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:27,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:27,183 INFO L82 PathProgramCache]: Analyzing trace with hash -573867880, now seen corresponding path program 1 times [2019-11-15 20:44:27,183 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:27,183 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2005282556] [2019-11-15 20:44:27,183 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:27,184 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:27,184 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:27,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:44:27,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:44:27,435 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2005282556] [2019-11-15 20:44:27,435 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:44:27,435 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-15 20:44:27,435 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1137569052] [2019-11-15 20:44:27,436 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-15 20:44:27,436 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:44:27,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-15 20:44:27,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2019-11-15 20:44:27,437 INFO L87 Difference]: Start difference. First operand 2173 states and 5093 transitions. Second operand 12 states. [2019-11-15 20:44:27,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:44:27,663 INFO L93 Difference]: Finished difference Result 3325 states and 7917 transitions. [2019-11-15 20:44:27,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-15 20:44:27,664 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 94 [2019-11-15 20:44:27,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:44:27,667 INFO L225 Difference]: With dead ends: 3325 [2019-11-15 20:44:27,667 INFO L226 Difference]: Without dead ends: 2686 [2019-11-15 20:44:27,667 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2019-11-15 20:44:27,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2686 states. [2019-11-15 20:44:27,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2686 to 2578. [2019-11-15 20:44:27,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2578 states. [2019-11-15 20:44:27,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2578 states to 2578 states and 5977 transitions. [2019-11-15 20:44:27,692 INFO L78 Accepts]: Start accepts. Automaton has 2578 states and 5977 transitions. Word has length 94 [2019-11-15 20:44:27,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:44:27,692 INFO L462 AbstractCegarLoop]: Abstraction has 2578 states and 5977 transitions. [2019-11-15 20:44:27,692 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-15 20:44:27,692 INFO L276 IsEmpty]: Start isEmpty. Operand 2578 states and 5977 transitions. [2019-11-15 20:44:27,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:44:27,694 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:44:27,694 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:44:27,694 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:44:27,694 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:44:27,694 INFO L82 PathProgramCache]: Analyzing trace with hash -1087514946, now seen corresponding path program 2 times [2019-11-15 20:44:27,695 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:44:27,695 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1022295759] [2019-11-15 20:44:27,695 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:27,695 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:44:27,695 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:44:27,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:44:27,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:44:27,774 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 20:44:27,774 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 20:44:27,892 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 20:44:27,894 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 08:44:27 BasicIcfg [2019-11-15 20:44:27,894 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 20:44:27,895 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 20:44:27,895 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 20:44:27,895 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 20:44:27,895 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:43:39" (3/4) ... [2019-11-15 20:44:27,897 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 20:44:28,047 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_5d0385d0-3e16-4649-ae43-b870ffe08182/bin/uautomizer/witness.graphml [2019-11-15 20:44:28,047 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 20:44:28,049 INFO L168 Benchmark]: Toolchain (without parser) took 50106.61 ms. Allocated memory was 1.0 GB in the beginning and 4.9 GB in the end (delta: 3.8 GB). Free memory was 939.4 MB in the beginning and 2.9 GB in the end (delta: -1.9 GB). Peak memory consumption was 1.9 GB. Max. memory is 11.5 GB. [2019-11-15 20:44:28,049 INFO L168 Benchmark]: CDTParser took 0.36 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:44:28,050 INFO L168 Benchmark]: CACSL2BoogieTranslator took 728.86 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 148.4 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -169.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-11-15 20:44:28,052 INFO L168 Benchmark]: Boogie Procedure Inliner took 60.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. [2019-11-15 20:44:28,052 INFO L168 Benchmark]: Boogie Preprocessor took 35.05 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:44:28,052 INFO L168 Benchmark]: RCFGBuilder took 686.42 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 50.5 MB). Peak memory consumption was 50.5 MB. Max. memory is 11.5 GB. [2019-11-15 20:44:28,053 INFO L168 Benchmark]: TraceAbstraction took 48438.19 ms. Allocated memory was 1.2 GB in the beginning and 4.9 GB in the end (delta: 3.7 GB). Free memory was 1.1 GB in the beginning and 2.9 GB in the end (delta: -1.9 GB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. [2019-11-15 20:44:28,053 INFO L168 Benchmark]: Witness Printer took 152.80 ms. Allocated memory is still 4.9 GB. Free memory was 2.9 GB in the beginning and 2.9 GB in the end (delta: 17.6 MB). Peak memory consumption was 17.6 MB. Max. memory is 11.5 GB. [2019-11-15 20:44:28,055 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.36 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 728.86 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 148.4 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -169.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 60.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 35.05 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 686.42 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 50.5 MB). Peak memory consumption was 50.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 48438.19 ms. Allocated memory was 1.2 GB in the beginning and 4.9 GB in the end (delta: 3.7 GB). Free memory was 1.1 GB in the beginning and 2.9 GB in the end (delta: -1.9 GB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. * Witness Printer took 152.80 ms. Allocated memory is still 4.9 GB. Free memory was 2.9 GB in the beginning and 2.9 GB in the end (delta: 17.6 MB). Peak memory consumption was 17.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L697] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L698] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L700] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L701] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L702] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L703] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L704] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L705] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L706] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L707] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L708] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L709] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L710] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L711] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L712] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L713] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L714] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L716] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L717] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L718] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L778] 0 pthread_t t1451; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L779] FCALL, FORK 0 pthread_create(&t1451, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L780] 0 pthread_t t1452; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L781] FCALL, FORK 0 pthread_create(&t1452, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L742] 2 x$w_buff1 = x$w_buff0 [L743] 2 x$w_buff0 = 2 [L744] 2 x$w_buff1_used = x$w_buff0_used [L745] 2 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L747] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L748] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L749] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L750] 2 x$r_buff0_thd2 = (_Bool)1 [L753] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L756] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L722] 1 y = 1 [L725] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L756] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L757] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=1] [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=2, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=1] [L728] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L729] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L729] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L730] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L730] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L731] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L731] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L732] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L735] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L757] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L758] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L758] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L759] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L759] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L760] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L760] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L763] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L783] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L788] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L788] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L789] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L789] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L790] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L790] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L791] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L791] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 x$flush_delayed = weak$$choice2 [L797] 0 x$mem_tmp = x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L799] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L799] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L800] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L800] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L801] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L801] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L802] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 0 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L803] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L804] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L804] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L806] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L806] 0 x = x$flush_delayed ? x$mem_tmp : x [L807] 0 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 175 locations, 3 error locations. Result: UNSAFE, OverallTime: 48.3s, OverallIterations: 35, TraceHistogramMax: 1, AutomataDifference: 22.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8615 SDtfs, 9700 SDslu, 23061 SDs, 0 SdLazy, 10605 SolverSat, 580 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 426 GetRequests, 109 SyntacticMatches, 13 SemanticMatches, 304 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 690 ImplicationChecksByTransitivity, 3.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=65445occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 18.8s AutomataMinimizationTime, 34 MinimizatonAttempts, 141091 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 3.0s InterpolantComputationTime, 2750 NumberOfCodeBlocks, 2750 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 2622 ConstructedInterpolants, 0 QuantifiedInterpolants, 620858 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...