./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix054_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_4afd5811-e33f-4e7f-8647-cea88001bd59/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_4afd5811-e33f-4e7f-8647-cea88001bd59/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_4afd5811-e33f-4e7f-8647-cea88001bd59/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_4afd5811-e33f-4e7f-8647-cea88001bd59/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix054_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_4afd5811-e33f-4e7f-8647-cea88001bd59/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_4afd5811-e33f-4e7f-8647-cea88001bd59/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3a1e4f40f914c6e0d49b332e5985e3ce0c4f5b0e .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 20:50:30,551 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 20:50:30,553 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 20:50:30,567 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 20:50:30,568 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 20:50:30,569 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 20:50:30,571 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 20:50:30,580 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 20:50:30,584 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 20:50:30,587 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 20:50:30,588 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 20:50:30,590 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 20:50:30,590 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 20:50:30,592 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 20:50:30,592 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 20:50:30,593 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 20:50:30,594 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 20:50:30,595 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 20:50:30,597 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 20:50:30,601 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 20:50:30,604 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 20:50:30,605 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 20:50:30,608 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 20:50:30,609 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 20:50:30,613 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 20:50:30,613 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 20:50:30,613 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 20:50:30,615 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 20:50:30,615 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 20:50:30,616 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 20:50:30,616 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 20:50:30,617 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 20:50:30,617 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 20:50:30,618 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 20:50:30,619 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 20:50:30,620 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 20:50:30,620 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 20:50:30,621 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 20:50:30,621 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 20:50:30,622 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 20:50:30,622 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 20:50:30,624 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_4afd5811-e33f-4e7f-8647-cea88001bd59/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 20:50:30,647 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 20:50:30,648 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 20:50:30,649 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 20:50:30,649 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 20:50:30,649 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 20:50:30,650 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 20:50:30,650 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 20:50:30,650 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 20:50:30,650 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 20:50:30,650 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 20:50:30,651 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 20:50:30,651 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 20:50:30,651 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 20:50:30,651 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 20:50:30,651 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 20:50:30,652 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 20:50:30,652 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 20:50:30,652 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 20:50:30,652 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 20:50:30,655 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 20:50:30,655 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 20:50:30,656 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:50:30,656 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 20:50:30,656 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 20:50:30,656 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 20:50:30,657 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 20:50:30,657 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 20:50:30,657 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 20:50:30,657 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_4afd5811-e33f-4e7f-8647-cea88001bd59/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3a1e4f40f914c6e0d49b332e5985e3ce0c4f5b0e [2019-11-15 20:50:30,682 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 20:50:30,691 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 20:50:30,694 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 20:50:30,695 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 20:50:30,695 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 20:50:30,696 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_4afd5811-e33f-4e7f-8647-cea88001bd59/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix054_tso.oepc.i [2019-11-15 20:50:30,745 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4afd5811-e33f-4e7f-8647-cea88001bd59/bin/uautomizer/data/99cb8a1f5/61c7073b026f4fb481ca2d40caad1dc3/FLAG2624f7e5e [2019-11-15 20:50:31,231 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 20:50:31,232 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_4afd5811-e33f-4e7f-8647-cea88001bd59/sv-benchmarks/c/pthread-wmm/mix054_tso.oepc.i [2019-11-15 20:50:31,260 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4afd5811-e33f-4e7f-8647-cea88001bd59/bin/uautomizer/data/99cb8a1f5/61c7073b026f4fb481ca2d40caad1dc3/FLAG2624f7e5e [2019-11-15 20:50:31,538 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_4afd5811-e33f-4e7f-8647-cea88001bd59/bin/uautomizer/data/99cb8a1f5/61c7073b026f4fb481ca2d40caad1dc3 [2019-11-15 20:50:31,541 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 20:50:31,542 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 20:50:31,543 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 20:50:31,543 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 20:50:31,546 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 20:50:31,547 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:50:31" (1/1) ... [2019-11-15 20:50:31,549 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2ed23c07 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:50:31, skipping insertion in model container [2019-11-15 20:50:31,549 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:50:31" (1/1) ... [2019-11-15 20:50:31,557 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 20:50:31,623 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 20:50:32,035 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:50:32,046 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 20:50:32,121 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:50:32,188 INFO L192 MainTranslator]: Completed translation [2019-11-15 20:50:32,189 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:50:32 WrapperNode [2019-11-15 20:50:32,189 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 20:50:32,190 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 20:50:32,190 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 20:50:32,190 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 20:50:32,198 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:50:32" (1/1) ... [2019-11-15 20:50:32,224 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:50:32" (1/1) ... [2019-11-15 20:50:32,257 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 20:50:32,258 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 20:50:32,258 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 20:50:32,258 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 20:50:32,265 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:50:32" (1/1) ... [2019-11-15 20:50:32,265 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:50:32" (1/1) ... [2019-11-15 20:50:32,269 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:50:32" (1/1) ... [2019-11-15 20:50:32,270 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:50:32" (1/1) ... [2019-11-15 20:50:32,278 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:50:32" (1/1) ... [2019-11-15 20:50:32,282 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:50:32" (1/1) ... [2019-11-15 20:50:32,285 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:50:32" (1/1) ... [2019-11-15 20:50:32,290 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 20:50:32,290 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 20:50:32,290 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 20:50:32,290 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 20:50:32,291 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:50:32" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4afd5811-e33f-4e7f-8647-cea88001bd59/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:50:32,391 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 20:50:32,391 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 20:50:32,391 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 20:50:32,391 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 20:50:32,393 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 20:50:32,393 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 20:50:32,393 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 20:50:32,393 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 20:50:32,394 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 20:50:32,394 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 20:50:32,396 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 20:50:32,398 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 20:50:33,184 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 20:50:33,186 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 20:50:33,187 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:50:33 BoogieIcfgContainer [2019-11-15 20:50:33,187 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 20:50:33,188 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 20:50:33,188 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 20:50:33,190 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 20:50:33,191 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 08:50:31" (1/3) ... [2019-11-15 20:50:33,192 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7044491d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:50:33, skipping insertion in model container [2019-11-15 20:50:33,193 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:50:32" (2/3) ... [2019-11-15 20:50:33,194 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7044491d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:50:33, skipping insertion in model container [2019-11-15 20:50:33,194 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:50:33" (3/3) ... [2019-11-15 20:50:33,199 INFO L109 eAbstractionObserver]: Analyzing ICFG mix054_tso.oepc.i [2019-11-15 20:50:33,239 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,239 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,239 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,239 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,240 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,240 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,240 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,240 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,241 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,241 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,241 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,242 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,242 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,242 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,242 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,242 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,243 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,243 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,243 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,243 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,243 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,244 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,244 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,244 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,244 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,245 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,245 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,245 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,245 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,246 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,247 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,247 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,247 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,247 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,248 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,248 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,248 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,248 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,249 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,249 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,249 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,250 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,250 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,250 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,253 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,254 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,255 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,255 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,255 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,255 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,255 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,255 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,256 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,256 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,256 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,257 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,257 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,257 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,258 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,258 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,258 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,258 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,258 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,258 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:50:33,267 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 20:50:33,267 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 20:50:33,276 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 20:50:33,285 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 20:50:33,303 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 20:50:33,303 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 20:50:33,303 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 20:50:33,303 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 20:50:33,304 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 20:50:33,304 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 20:50:33,304 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 20:50:33,304 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 20:50:33,325 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 139 places, 177 transitions [2019-11-15 20:50:35,059 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22493 states. [2019-11-15 20:50:35,061 INFO L276 IsEmpty]: Start isEmpty. Operand 22493 states. [2019-11-15 20:50:35,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-11-15 20:50:35,074 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:50:35,075 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:50:35,078 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:50:35,083 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:50:35,084 INFO L82 PathProgramCache]: Analyzing trace with hash -1169224313, now seen corresponding path program 1 times [2019-11-15 20:50:35,092 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:50:35,092 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1035708245] [2019-11-15 20:50:35,092 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:35,092 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:35,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:50:35,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:50:35,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:50:35,396 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1035708245] [2019-11-15 20:50:35,397 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:50:35,397 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:50:35,398 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [649721926] [2019-11-15 20:50:35,402 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:50:35,402 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:50:35,415 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:50:35,416 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:50:35,417 INFO L87 Difference]: Start difference. First operand 22493 states. Second operand 4 states. [2019-11-15 20:50:35,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:50:35,983 INFO L93 Difference]: Finished difference Result 23445 states and 91746 transitions. [2019-11-15 20:50:35,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 20:50:35,985 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2019-11-15 20:50:35,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:50:36,201 INFO L225 Difference]: With dead ends: 23445 [2019-11-15 20:50:36,201 INFO L226 Difference]: Without dead ends: 21269 [2019-11-15 20:50:36,203 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:50:36,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21269 states. [2019-11-15 20:50:37,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21269 to 21269. [2019-11-15 20:50:37,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21269 states. [2019-11-15 20:50:37,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21269 states to 21269 states and 83770 transitions. [2019-11-15 20:50:37,367 INFO L78 Accepts]: Start accepts. Automaton has 21269 states and 83770 transitions. Word has length 36 [2019-11-15 20:50:37,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:50:37,368 INFO L462 AbstractCegarLoop]: Abstraction has 21269 states and 83770 transitions. [2019-11-15 20:50:37,369 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:50:37,369 INFO L276 IsEmpty]: Start isEmpty. Operand 21269 states and 83770 transitions. [2019-11-15 20:50:37,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-11-15 20:50:37,380 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:50:37,380 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:50:37,381 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:50:37,381 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:50:37,381 INFO L82 PathProgramCache]: Analyzing trace with hash -877225964, now seen corresponding path program 1 times [2019-11-15 20:50:37,382 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:50:37,382 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [667933067] [2019-11-15 20:50:37,382 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:37,382 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:37,382 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:50:37,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:50:37,485 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:50:37,485 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [667933067] [2019-11-15 20:50:37,485 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:50:37,486 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:50:37,486 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [393456856] [2019-11-15 20:50:37,487 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:50:37,487 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:50:37,488 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:50:37,488 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:50:37,488 INFO L87 Difference]: Start difference. First operand 21269 states and 83770 transitions. Second operand 5 states. [2019-11-15 20:50:38,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:50:38,433 INFO L93 Difference]: Finished difference Result 34703 states and 129062 transitions. [2019-11-15 20:50:38,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:50:38,433 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2019-11-15 20:50:38,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:50:38,580 INFO L225 Difference]: With dead ends: 34703 [2019-11-15 20:50:38,581 INFO L226 Difference]: Without dead ends: 34559 [2019-11-15 20:50:38,582 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:50:38,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34559 states. [2019-11-15 20:50:39,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34559 to 33059. [2019-11-15 20:50:39,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33059 states. [2019-11-15 20:50:39,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33059 states to 33059 states and 123950 transitions. [2019-11-15 20:50:39,841 INFO L78 Accepts]: Start accepts. Automaton has 33059 states and 123950 transitions. Word has length 43 [2019-11-15 20:50:39,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:50:39,842 INFO L462 AbstractCegarLoop]: Abstraction has 33059 states and 123950 transitions. [2019-11-15 20:50:39,842 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:50:39,842 INFO L276 IsEmpty]: Start isEmpty. Operand 33059 states and 123950 transitions. [2019-11-15 20:50:39,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-15 20:50:39,846 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:50:39,847 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:50:39,847 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:50:39,847 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:50:39,847 INFO L82 PathProgramCache]: Analyzing trace with hash -2129278721, now seen corresponding path program 1 times [2019-11-15 20:50:39,848 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:50:39,848 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1920752334] [2019-11-15 20:50:39,848 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:39,848 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:39,848 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:50:39,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:50:39,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:50:39,977 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1920752334] [2019-11-15 20:50:39,977 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:50:39,977 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:50:39,977 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [521889724] [2019-11-15 20:50:39,978 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:50:39,978 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:50:39,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:50:39,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:50:39,978 INFO L87 Difference]: Start difference. First operand 33059 states and 123950 transitions. Second operand 5 states. [2019-11-15 20:50:40,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:50:40,518 INFO L93 Difference]: Finished difference Result 40211 states and 148619 transitions. [2019-11-15 20:50:40,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:50:40,519 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-11-15 20:50:40,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:50:41,219 INFO L225 Difference]: With dead ends: 40211 [2019-11-15 20:50:41,220 INFO L226 Difference]: Without dead ends: 40051 [2019-11-15 20:50:41,221 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:50:41,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40051 states. [2019-11-15 20:50:42,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40051 to 34632. [2019-11-15 20:50:42,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34632 states. [2019-11-15 20:50:42,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34632 states to 34632 states and 129246 transitions. [2019-11-15 20:50:42,123 INFO L78 Accepts]: Start accepts. Automaton has 34632 states and 129246 transitions. Word has length 44 [2019-11-15 20:50:42,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:50:42,124 INFO L462 AbstractCegarLoop]: Abstraction has 34632 states and 129246 transitions. [2019-11-15 20:50:42,124 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:50:42,124 INFO L276 IsEmpty]: Start isEmpty. Operand 34632 states and 129246 transitions. [2019-11-15 20:50:42,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-15 20:50:42,138 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:50:42,139 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:50:42,139 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:50:42,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:50:42,139 INFO L82 PathProgramCache]: Analyzing trace with hash 765970666, now seen corresponding path program 1 times [2019-11-15 20:50:42,140 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:50:42,140 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [132635937] [2019-11-15 20:50:42,140 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:42,140 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:42,140 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:50:42,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:50:42,210 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:50:42,211 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [132635937] [2019-11-15 20:50:42,211 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:50:42,211 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:50:42,211 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [438776155] [2019-11-15 20:50:42,212 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:50:42,212 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:50:42,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:50:42,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:50:42,212 INFO L87 Difference]: Start difference. First operand 34632 states and 129246 transitions. Second operand 6 states. [2019-11-15 20:50:43,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:50:43,259 INFO L93 Difference]: Finished difference Result 45660 states and 166140 transitions. [2019-11-15 20:50:43,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 20:50:43,260 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 51 [2019-11-15 20:50:43,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:50:44,009 INFO L225 Difference]: With dead ends: 45660 [2019-11-15 20:50:44,009 INFO L226 Difference]: Without dead ends: 45516 [2019-11-15 20:50:44,009 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 20:50:44,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45516 states. [2019-11-15 20:50:44,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45516 to 33595. [2019-11-15 20:50:44,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33595 states. [2019-11-15 20:50:44,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33595 states to 33595 states and 125401 transitions. [2019-11-15 20:50:44,769 INFO L78 Accepts]: Start accepts. Automaton has 33595 states and 125401 transitions. Word has length 51 [2019-11-15 20:50:44,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:50:44,769 INFO L462 AbstractCegarLoop]: Abstraction has 33595 states and 125401 transitions. [2019-11-15 20:50:44,769 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:50:44,769 INFO L276 IsEmpty]: Start isEmpty. Operand 33595 states and 125401 transitions. [2019-11-15 20:50:44,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-11-15 20:50:44,803 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:50:44,803 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:50:44,803 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:50:44,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:50:44,803 INFO L82 PathProgramCache]: Analyzing trace with hash 481645682, now seen corresponding path program 1 times [2019-11-15 20:50:44,804 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:50:44,804 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [756692738] [2019-11-15 20:50:44,804 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:44,804 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:44,804 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:50:44,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:50:44,922 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:50:44,923 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [756692738] [2019-11-15 20:50:44,924 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:50:44,924 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:50:44,924 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [553186538] [2019-11-15 20:50:44,924 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:50:44,925 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:50:44,925 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:50:44,925 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:50:44,926 INFO L87 Difference]: Start difference. First operand 33595 states and 125401 transitions. Second operand 6 states. [2019-11-15 20:50:45,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:50:45,510 INFO L93 Difference]: Finished difference Result 46067 states and 167834 transitions. [2019-11-15 20:50:45,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 20:50:45,511 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-11-15 20:50:45,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:50:46,375 INFO L225 Difference]: With dead ends: 46067 [2019-11-15 20:50:46,375 INFO L226 Difference]: Without dead ends: 45827 [2019-11-15 20:50:46,376 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 20:50:46,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45827 states. [2019-11-15 20:50:46,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45827 to 39956. [2019-11-15 20:50:46,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39956 states. [2019-11-15 20:50:47,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39956 states to 39956 states and 147325 transitions. [2019-11-15 20:50:47,090 INFO L78 Accepts]: Start accepts. Automaton has 39956 states and 147325 transitions. Word has length 58 [2019-11-15 20:50:47,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:50:47,090 INFO L462 AbstractCegarLoop]: Abstraction has 39956 states and 147325 transitions. [2019-11-15 20:50:47,090 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:50:47,090 INFO L276 IsEmpty]: Start isEmpty. Operand 39956 states and 147325 transitions. [2019-11-15 20:50:47,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-15 20:50:47,123 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:50:47,123 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:50:47,123 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:50:47,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:50:47,124 INFO L82 PathProgramCache]: Analyzing trace with hash 751812519, now seen corresponding path program 1 times [2019-11-15 20:50:47,124 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:50:47,124 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1201518567] [2019-11-15 20:50:47,124 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:47,124 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:47,124 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:50:47,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:50:47,164 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:50:47,165 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1201518567] [2019-11-15 20:50:47,165 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:50:47,165 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:50:47,165 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [734678115] [2019-11-15 20:50:47,165 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:50:47,166 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:50:47,166 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:50:47,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:50:47,166 INFO L87 Difference]: Start difference. First operand 39956 states and 147325 transitions. Second operand 3 states. [2019-11-15 20:50:47,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:50:47,410 INFO L93 Difference]: Finished difference Result 50254 states and 182160 transitions. [2019-11-15 20:50:47,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:50:47,410 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 60 [2019-11-15 20:50:47,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:50:47,523 INFO L225 Difference]: With dead ends: 50254 [2019-11-15 20:50:47,523 INFO L226 Difference]: Without dead ends: 50254 [2019-11-15 20:50:47,524 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:50:47,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50254 states. [2019-11-15 20:50:48,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50254 to 43886. [2019-11-15 20:50:48,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43886 states. [2019-11-15 20:50:52,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43886 states to 43886 states and 160763 transitions. [2019-11-15 20:50:52,156 INFO L78 Accepts]: Start accepts. Automaton has 43886 states and 160763 transitions. Word has length 60 [2019-11-15 20:50:52,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:50:52,157 INFO L462 AbstractCegarLoop]: Abstraction has 43886 states and 160763 transitions. [2019-11-15 20:50:52,157 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:50:52,157 INFO L276 IsEmpty]: Start isEmpty. Operand 43886 states and 160763 transitions. [2019-11-15 20:50:52,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-11-15 20:50:52,190 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:50:52,190 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:50:52,190 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:50:52,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:50:52,190 INFO L82 PathProgramCache]: Analyzing trace with hash -1820538073, now seen corresponding path program 1 times [2019-11-15 20:50:52,190 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:50:52,191 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811794428] [2019-11-15 20:50:52,191 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:52,191 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:52,191 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:50:52,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:50:52,284 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:50:52,286 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811794428] [2019-11-15 20:50:52,286 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:50:52,287 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:50:52,287 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1675264772] [2019-11-15 20:50:52,287 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:50:52,288 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:50:52,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:50:52,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:50:52,288 INFO L87 Difference]: Start difference. First operand 43886 states and 160763 transitions. Second operand 7 states. [2019-11-15 20:50:53,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:50:53,157 INFO L93 Difference]: Finished difference Result 55882 states and 200497 transitions. [2019-11-15 20:50:53,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 20:50:53,158 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-11-15 20:50:53,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:50:53,274 INFO L225 Difference]: With dead ends: 55882 [2019-11-15 20:50:53,274 INFO L226 Difference]: Without dead ends: 55642 [2019-11-15 20:50:53,274 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-15 20:50:53,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55642 states. [2019-11-15 20:50:53,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55642 to 45112. [2019-11-15 20:50:53,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45112 states. [2019-11-15 20:50:54,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45112 states to 45112 states and 164930 transitions. [2019-11-15 20:50:54,092 INFO L78 Accepts]: Start accepts. Automaton has 45112 states and 164930 transitions. Word has length 64 [2019-11-15 20:50:54,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:50:54,092 INFO L462 AbstractCegarLoop]: Abstraction has 45112 states and 164930 transitions. [2019-11-15 20:50:54,092 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:50:54,092 INFO L276 IsEmpty]: Start isEmpty. Operand 45112 states and 164930 transitions. [2019-11-15 20:50:54,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-15 20:50:54,128 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:50:54,128 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:50:54,128 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:50:54,128 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:50:54,129 INFO L82 PathProgramCache]: Analyzing trace with hash 46636317, now seen corresponding path program 1 times [2019-11-15 20:50:54,129 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:50:54,129 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [708906787] [2019-11-15 20:50:54,129 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:54,129 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:54,130 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:50:54,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:50:54,198 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:50:54,198 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [708906787] [2019-11-15 20:50:54,198 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:50:54,198 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:50:54,199 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1619651497] [2019-11-15 20:50:54,199 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:50:54,199 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:50:54,199 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:50:54,200 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:50:54,200 INFO L87 Difference]: Start difference. First operand 45112 states and 164930 transitions. Second operand 5 states. [2019-11-15 20:50:55,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:50:55,783 INFO L93 Difference]: Finished difference Result 114994 states and 419362 transitions. [2019-11-15 20:50:55,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 20:50:55,784 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-11-15 20:50:55,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:50:56,044 INFO L225 Difference]: With dead ends: 114994 [2019-11-15 20:50:56,044 INFO L226 Difference]: Without dead ends: 114254 [2019-11-15 20:50:56,045 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-15 20:50:56,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114254 states. [2019-11-15 20:50:57,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114254 to 64567. [2019-11-15 20:50:57,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64567 states. [2019-11-15 20:50:57,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64567 states to 64567 states and 236504 transitions. [2019-11-15 20:50:57,470 INFO L78 Accepts]: Start accepts. Automaton has 64567 states and 236504 transitions. Word has length 65 [2019-11-15 20:50:57,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:50:57,470 INFO L462 AbstractCegarLoop]: Abstraction has 64567 states and 236504 transitions. [2019-11-15 20:50:57,470 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:50:57,470 INFO L276 IsEmpty]: Start isEmpty. Operand 64567 states and 236504 transitions. [2019-11-15 20:50:57,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-15 20:50:57,520 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:50:57,520 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:50:57,520 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:50:57,521 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:50:57,521 INFO L82 PathProgramCache]: Analyzing trace with hash 1106543007, now seen corresponding path program 1 times [2019-11-15 20:50:57,521 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:50:57,521 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224757026] [2019-11-15 20:50:57,522 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:57,522 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:50:57,522 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:50:57,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:50:57,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:50:57,622 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1224757026] [2019-11-15 20:50:57,623 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:50:57,623 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:50:57,623 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1752732248] [2019-11-15 20:50:57,623 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:50:57,623 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:50:57,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:50:57,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:50:57,624 INFO L87 Difference]: Start difference. First operand 64567 states and 236504 transitions. Second operand 7 states. [2019-11-15 20:50:58,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:50:58,714 INFO L93 Difference]: Finished difference Result 74791 states and 270015 transitions. [2019-11-15 20:50:58,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 20:50:58,717 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-11-15 20:50:58,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:50:58,873 INFO L225 Difference]: With dead ends: 74791 [2019-11-15 20:50:58,873 INFO L226 Difference]: Without dead ends: 74591 [2019-11-15 20:50:58,874 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-15 20:50:59,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74591 states. [2019-11-15 20:51:00,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74591 to 65445. [2019-11-15 20:51:00,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65445 states. [2019-11-15 20:51:00,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65445 states to 65445 states and 239375 transitions. [2019-11-15 20:51:00,530 INFO L78 Accepts]: Start accepts. Automaton has 65445 states and 239375 transitions. Word has length 65 [2019-11-15 20:51:00,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:00,531 INFO L462 AbstractCegarLoop]: Abstraction has 65445 states and 239375 transitions. [2019-11-15 20:51:00,531 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:51:00,531 INFO L276 IsEmpty]: Start isEmpty. Operand 65445 states and 239375 transitions. [2019-11-15 20:51:00,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-11-15 20:51:00,601 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:00,601 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:00,602 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:00,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:00,602 INFO L82 PathProgramCache]: Analyzing trace with hash 1556884819, now seen corresponding path program 1 times [2019-11-15 20:51:00,602 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:00,602 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [197639024] [2019-11-15 20:51:00,603 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:00,603 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:00,603 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:00,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:00,718 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:00,718 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [197639024] [2019-11-15 20:51:00,718 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:00,718 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:51:00,718 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1132156737] [2019-11-15 20:51:00,719 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:51:00,719 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:00,719 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:51:00,719 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:51:00,719 INFO L87 Difference]: Start difference. First operand 65445 states and 239375 transitions. Second operand 3 states. [2019-11-15 20:51:01,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:01,022 INFO L93 Difference]: Finished difference Result 63486 states and 230200 transitions. [2019-11-15 20:51:01,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:51:01,022 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-11-15 20:51:01,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:01,152 INFO L225 Difference]: With dead ends: 63486 [2019-11-15 20:51:01,153 INFO L226 Difference]: Without dead ends: 63324 [2019-11-15 20:51:01,153 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:51:01,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63324 states. [2019-11-15 20:51:02,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63324 to 63296. [2019-11-15 20:51:02,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63296 states. [2019-11-15 20:51:02,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63296 states to 63296 states and 229572 transitions. [2019-11-15 20:51:02,169 INFO L78 Accepts]: Start accepts. Automaton has 63296 states and 229572 transitions. Word has length 67 [2019-11-15 20:51:02,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:02,170 INFO L462 AbstractCegarLoop]: Abstraction has 63296 states and 229572 transitions. [2019-11-15 20:51:02,170 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:51:02,170 INFO L276 IsEmpty]: Start isEmpty. Operand 63296 states and 229572 transitions. [2019-11-15 20:51:02,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-11-15 20:51:02,216 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:02,216 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:02,217 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:02,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:02,217 INFO L82 PathProgramCache]: Analyzing trace with hash -1093489887, now seen corresponding path program 1 times [2019-11-15 20:51:02,217 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:02,217 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [339745860] [2019-11-15 20:51:02,217 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:02,217 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:02,217 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:02,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:02,307 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:02,307 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [339745860] [2019-11-15 20:51:02,307 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:02,307 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:51:02,308 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [523084753] [2019-11-15 20:51:02,308 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:51:02,308 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:02,308 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:51:02,308 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:51:02,308 INFO L87 Difference]: Start difference. First operand 63296 states and 229572 transitions. Second operand 4 states. [2019-11-15 20:51:02,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:02,371 INFO L93 Difference]: Finished difference Result 16800 states and 52939 transitions. [2019-11-15 20:51:02,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:51:02,372 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 68 [2019-11-15 20:51:02,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:02,394 INFO L225 Difference]: With dead ends: 16800 [2019-11-15 20:51:02,394 INFO L226 Difference]: Without dead ends: 16101 [2019-11-15 20:51:02,394 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:51:02,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16101 states. [2019-11-15 20:51:02,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16101 to 15993. [2019-11-15 20:51:02,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15993 states. [2019-11-15 20:51:02,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15993 states to 15993 states and 50433 transitions. [2019-11-15 20:51:02,950 INFO L78 Accepts]: Start accepts. Automaton has 15993 states and 50433 transitions. Word has length 68 [2019-11-15 20:51:02,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:02,951 INFO L462 AbstractCegarLoop]: Abstraction has 15993 states and 50433 transitions. [2019-11-15 20:51:02,951 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:51:02,951 INFO L276 IsEmpty]: Start isEmpty. Operand 15993 states and 50433 transitions. [2019-11-15 20:51:02,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-11-15 20:51:02,961 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:02,961 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:02,961 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:02,962 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:02,962 INFO L82 PathProgramCache]: Analyzing trace with hash 631160209, now seen corresponding path program 1 times [2019-11-15 20:51:02,962 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:02,962 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [534768202] [2019-11-15 20:51:02,962 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:02,962 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:02,963 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:02,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:03,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:03,107 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [534768202] [2019-11-15 20:51:03,107 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:03,108 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:51:03,108 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1853056005] [2019-11-15 20:51:03,108 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:51:03,108 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:03,109 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:51:03,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:51:03,109 INFO L87 Difference]: Start difference. First operand 15993 states and 50433 transitions. Second operand 8 states. [2019-11-15 20:51:04,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:04,055 INFO L93 Difference]: Finished difference Result 17886 states and 55946 transitions. [2019-11-15 20:51:04,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-11-15 20:51:04,056 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 77 [2019-11-15 20:51:04,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:04,080 INFO L225 Difference]: With dead ends: 17886 [2019-11-15 20:51:04,080 INFO L226 Difference]: Without dead ends: 17838 [2019-11-15 20:51:04,080 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 97 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=102, Invalid=404, Unknown=0, NotChecked=0, Total=506 [2019-11-15 20:51:04,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17838 states. [2019-11-15 20:51:04,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17838 to 16086. [2019-11-15 20:51:04,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16086 states. [2019-11-15 20:51:04,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16086 states to 16086 states and 50858 transitions. [2019-11-15 20:51:04,289 INFO L78 Accepts]: Start accepts. Automaton has 16086 states and 50858 transitions. Word has length 77 [2019-11-15 20:51:04,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:04,290 INFO L462 AbstractCegarLoop]: Abstraction has 16086 states and 50858 transitions. [2019-11-15 20:51:04,290 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:51:04,290 INFO L276 IsEmpty]: Start isEmpty. Operand 16086 states and 50858 transitions. [2019-11-15 20:51:04,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:51:04,303 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:04,303 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:04,303 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:04,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:04,303 INFO L82 PathProgramCache]: Analyzing trace with hash -1206129694, now seen corresponding path program 1 times [2019-11-15 20:51:04,304 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:04,304 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1350988979] [2019-11-15 20:51:04,304 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:04,304 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:04,304 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:04,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:04,404 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:04,404 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1350988979] [2019-11-15 20:51:04,404 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:04,405 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:51:04,405 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [327435410] [2019-11-15 20:51:04,405 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:51:04,405 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:04,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:51:04,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:51:04,406 INFO L87 Difference]: Start difference. First operand 16086 states and 50858 transitions. Second operand 6 states. [2019-11-15 20:51:04,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:04,847 INFO L93 Difference]: Finished difference Result 17857 states and 55811 transitions. [2019-11-15 20:51:04,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:51:04,848 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-11-15 20:51:04,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:04,871 INFO L225 Difference]: With dead ends: 17857 [2019-11-15 20:51:04,872 INFO L226 Difference]: Without dead ends: 17857 [2019-11-15 20:51:04,872 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:51:04,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17857 states. [2019-11-15 20:51:05,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17857 to 17110. [2019-11-15 20:51:05,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17110 states. [2019-11-15 20:51:05,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17110 states to 17110 states and 53654 transitions. [2019-11-15 20:51:05,086 INFO L78 Accepts]: Start accepts. Automaton has 17110 states and 53654 transitions. Word has length 80 [2019-11-15 20:51:05,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:05,086 INFO L462 AbstractCegarLoop]: Abstraction has 17110 states and 53654 transitions. [2019-11-15 20:51:05,087 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:51:05,087 INFO L276 IsEmpty]: Start isEmpty. Operand 17110 states and 53654 transitions. [2019-11-15 20:51:05,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:51:05,101 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:05,102 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:05,102 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:05,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:05,102 INFO L82 PathProgramCache]: Analyzing trace with hash 1153177315, now seen corresponding path program 1 times [2019-11-15 20:51:05,102 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:05,103 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [16421478] [2019-11-15 20:51:05,103 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:05,103 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:05,103 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:05,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:05,217 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:05,217 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [16421478] [2019-11-15 20:51:05,217 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:05,217 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:51:05,218 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2096233559] [2019-11-15 20:51:05,218 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:51:05,218 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:05,218 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:51:05,219 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:51:05,219 INFO L87 Difference]: Start difference. First operand 17110 states and 53654 transitions. Second operand 7 states. [2019-11-15 20:51:05,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:05,592 INFO L93 Difference]: Finished difference Result 18508 states and 57494 transitions. [2019-11-15 20:51:05,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 20:51:05,593 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-11-15 20:51:05,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:05,617 INFO L225 Difference]: With dead ends: 18508 [2019-11-15 20:51:05,617 INFO L226 Difference]: Without dead ends: 18508 [2019-11-15 20:51:05,617 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:51:05,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18508 states. [2019-11-15 20:51:05,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18508 to 17958. [2019-11-15 20:51:05,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17958 states. [2019-11-15 20:51:05,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17958 states to 17958 states and 55863 transitions. [2019-11-15 20:51:05,843 INFO L78 Accepts]: Start accepts. Automaton has 17958 states and 55863 transitions. Word has length 80 [2019-11-15 20:51:05,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:05,844 INFO L462 AbstractCegarLoop]: Abstraction has 17958 states and 55863 transitions. [2019-11-15 20:51:05,844 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:51:05,844 INFO L276 IsEmpty]: Start isEmpty. Operand 17958 states and 55863 transitions. [2019-11-15 20:51:05,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:51:05,859 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:05,859 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:05,859 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:05,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:05,859 INFO L82 PathProgramCache]: Analyzing trace with hash 1482943076, now seen corresponding path program 1 times [2019-11-15 20:51:05,860 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:05,860 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [363279856] [2019-11-15 20:51:05,860 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:05,860 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:05,860 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:05,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:05,909 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:05,909 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [363279856] [2019-11-15 20:51:05,910 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:05,910 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:51:05,910 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [306451348] [2019-11-15 20:51:05,910 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:51:05,911 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:05,911 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:51:05,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:51:05,911 INFO L87 Difference]: Start difference. First operand 17958 states and 55863 transitions. Second operand 3 states. [2019-11-15 20:51:05,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:05,990 INFO L93 Difference]: Finished difference Result 16132 states and 49717 transitions. [2019-11-15 20:51:05,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:51:05,991 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2019-11-15 20:51:05,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:06,012 INFO L225 Difference]: With dead ends: 16132 [2019-11-15 20:51:06,012 INFO L226 Difference]: Without dead ends: 16132 [2019-11-15 20:51:06,012 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:51:06,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16132 states. [2019-11-15 20:51:06,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16132 to 15826. [2019-11-15 20:51:06,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15826 states. [2019-11-15 20:51:06,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15826 states to 15826 states and 48824 transitions. [2019-11-15 20:51:06,210 INFO L78 Accepts]: Start accepts. Automaton has 15826 states and 48824 transitions. Word has length 80 [2019-11-15 20:51:06,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:06,210 INFO L462 AbstractCegarLoop]: Abstraction has 15826 states and 48824 transitions. [2019-11-15 20:51:06,210 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:51:06,210 INFO L276 IsEmpty]: Start isEmpty. Operand 15826 states and 48824 transitions. [2019-11-15 20:51:06,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 20:51:06,221 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:06,222 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:06,222 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:06,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:06,222 INFO L82 PathProgramCache]: Analyzing trace with hash 1930848041, now seen corresponding path program 1 times [2019-11-15 20:51:06,222 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:06,222 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [400731532] [2019-11-15 20:51:06,222 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:06,222 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:06,223 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:06,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:06,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:06,293 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [400731532] [2019-11-15 20:51:06,293 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:06,293 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:51:06,294 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1696525090] [2019-11-15 20:51:06,294 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:51:06,294 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:06,294 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:51:06,295 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:51:06,295 INFO L87 Difference]: Start difference. First operand 15826 states and 48824 transitions. Second operand 5 states. [2019-11-15 20:51:06,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:06,341 INFO L93 Difference]: Finished difference Result 2362 states and 5843 transitions. [2019-11-15 20:51:06,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:51:06,341 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 81 [2019-11-15 20:51:06,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:06,344 INFO L225 Difference]: With dead ends: 2362 [2019-11-15 20:51:06,344 INFO L226 Difference]: Without dead ends: 2101 [2019-11-15 20:51:06,345 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:51:06,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2101 states. [2019-11-15 20:51:06,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2101 to 1973. [2019-11-15 20:51:06,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1973 states. [2019-11-15 20:51:06,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1973 states to 1973 states and 4879 transitions. [2019-11-15 20:51:06,371 INFO L78 Accepts]: Start accepts. Automaton has 1973 states and 4879 transitions. Word has length 81 [2019-11-15 20:51:06,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:06,371 INFO L462 AbstractCegarLoop]: Abstraction has 1973 states and 4879 transitions. [2019-11-15 20:51:06,372 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:51:06,372 INFO L276 IsEmpty]: Start isEmpty. Operand 1973 states and 4879 transitions. [2019-11-15 20:51:06,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:06,374 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:06,374 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:06,374 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:06,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:06,375 INFO L82 PathProgramCache]: Analyzing trace with hash 1506844575, now seen corresponding path program 1 times [2019-11-15 20:51:06,375 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:06,375 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [96665712] [2019-11-15 20:51:06,375 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:06,375 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:06,376 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:06,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:06,536 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:06,536 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [96665712] [2019-11-15 20:51:06,536 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:06,536 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:51:06,537 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [344532627] [2019-11-15 20:51:06,537 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:51:06,537 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:06,537 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:51:06,538 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:51:06,538 INFO L87 Difference]: Start difference. First operand 1973 states and 4879 transitions. Second operand 6 states. [2019-11-15 20:51:06,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:06,726 INFO L93 Difference]: Finished difference Result 2134 states and 5230 transitions. [2019-11-15 20:51:06,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 20:51:06,727 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 20:51:06,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:06,729 INFO L225 Difference]: With dead ends: 2134 [2019-11-15 20:51:06,729 INFO L226 Difference]: Without dead ends: 2134 [2019-11-15 20:51:06,730 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=43, Unknown=0, NotChecked=0, Total=72 [2019-11-15 20:51:06,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2134 states. [2019-11-15 20:51:06,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2134 to 1918. [2019-11-15 20:51:06,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1918 states. [2019-11-15 20:51:06,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1918 states to 1918 states and 4727 transitions. [2019-11-15 20:51:06,755 INFO L78 Accepts]: Start accepts. Automaton has 1918 states and 4727 transitions. Word has length 94 [2019-11-15 20:51:06,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:06,756 INFO L462 AbstractCegarLoop]: Abstraction has 1918 states and 4727 transitions. [2019-11-15 20:51:06,756 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:51:06,756 INFO L276 IsEmpty]: Start isEmpty. Operand 1918 states and 4727 transitions. [2019-11-15 20:51:06,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:06,758 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:06,758 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:06,758 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:06,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:06,759 INFO L82 PathProgramCache]: Analyzing trace with hash -428815712, now seen corresponding path program 1 times [2019-11-15 20:51:06,759 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:06,759 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [945317888] [2019-11-15 20:51:06,759 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:06,759 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:06,760 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:06,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:06,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:06,826 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [945317888] [2019-11-15 20:51:06,826 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:06,826 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:51:06,826 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [577240313] [2019-11-15 20:51:06,827 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:51:06,827 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:06,827 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:51:06,827 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:51:06,827 INFO L87 Difference]: Start difference. First operand 1918 states and 4727 transitions. Second operand 4 states. [2019-11-15 20:51:06,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:06,948 INFO L93 Difference]: Finished difference Result 2187 states and 5333 transitions. [2019-11-15 20:51:06,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 20:51:06,949 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 94 [2019-11-15 20:51:06,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:06,951 INFO L225 Difference]: With dead ends: 2187 [2019-11-15 20:51:06,951 INFO L226 Difference]: Without dead ends: 2187 [2019-11-15 20:51:06,952 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:51:06,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2187 states. [2019-11-15 20:51:06,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2187 to 1986. [2019-11-15 20:51:06,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1986 states. [2019-11-15 20:51:06,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1986 states to 1986 states and 4880 transitions. [2019-11-15 20:51:06,978 INFO L78 Accepts]: Start accepts. Automaton has 1986 states and 4880 transitions. Word has length 94 [2019-11-15 20:51:06,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:06,978 INFO L462 AbstractCegarLoop]: Abstraction has 1986 states and 4880 transitions. [2019-11-15 20:51:06,978 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:51:06,978 INFO L276 IsEmpty]: Start isEmpty. Operand 1986 states and 4880 transitions. [2019-11-15 20:51:06,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:06,980 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:06,981 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:06,981 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:06,981 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:06,981 INFO L82 PathProgramCache]: Analyzing trace with hash 540765311, now seen corresponding path program 1 times [2019-11-15 20:51:06,981 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:06,982 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [528856849] [2019-11-15 20:51:06,982 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:06,982 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:06,982 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:06,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:07,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:07,165 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [528856849] [2019-11-15 20:51:07,165 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:07,166 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-15 20:51:07,166 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1058476161] [2019-11-15 20:51:07,167 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-15 20:51:07,167 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:07,168 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-15 20:51:07,168 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:51:07,168 INFO L87 Difference]: Start difference. First operand 1986 states and 4880 transitions. Second operand 10 states. [2019-11-15 20:51:09,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:09,770 INFO L93 Difference]: Finished difference Result 8469 states and 20552 transitions. [2019-11-15 20:51:09,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-11-15 20:51:09,770 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 94 [2019-11-15 20:51:09,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:09,777 INFO L225 Difference]: With dead ends: 8469 [2019-11-15 20:51:09,778 INFO L226 Difference]: Without dead ends: 8469 [2019-11-15 20:51:09,778 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 468 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=410, Invalid=1150, Unknown=0, NotChecked=0, Total=1560 [2019-11-15 20:51:09,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8469 states. [2019-11-15 20:51:09,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8469 to 2319. [2019-11-15 20:51:09,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2319 states. [2019-11-15 20:51:09,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2319 states to 2319 states and 5756 transitions. [2019-11-15 20:51:09,821 INFO L78 Accepts]: Start accepts. Automaton has 2319 states and 5756 transitions. Word has length 94 [2019-11-15 20:51:09,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:09,822 INFO L462 AbstractCegarLoop]: Abstraction has 2319 states and 5756 transitions. [2019-11-15 20:51:09,822 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-15 20:51:09,822 INFO L276 IsEmpty]: Start isEmpty. Operand 2319 states and 5756 transitions. [2019-11-15 20:51:09,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:09,823 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:09,824 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:09,824 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:09,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:09,824 INFO L82 PathProgramCache]: Analyzing trace with hash 1502379328, now seen corresponding path program 1 times [2019-11-15 20:51:09,824 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:09,825 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [126272124] [2019-11-15 20:51:09,825 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:09,825 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:09,825 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:09,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:09,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:09,926 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [126272124] [2019-11-15 20:51:09,927 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:09,927 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:51:09,927 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1027764351] [2019-11-15 20:51:09,927 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:51:09,928 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:09,928 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:51:09,928 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:51:09,928 INFO L87 Difference]: Start difference. First operand 2319 states and 5756 transitions. Second operand 6 states. [2019-11-15 20:51:10,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:10,247 INFO L93 Difference]: Finished difference Result 2487 states and 6072 transitions. [2019-11-15 20:51:10,248 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:51:10,248 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 20:51:10,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:10,251 INFO L225 Difference]: With dead ends: 2487 [2019-11-15 20:51:10,251 INFO L226 Difference]: Without dead ends: 2451 [2019-11-15 20:51:10,251 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:51:10,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2451 states. [2019-11-15 20:51:10,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2451 to 2421. [2019-11-15 20:51:10,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2421 states. [2019-11-15 20:51:10,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2421 states to 2421 states and 5954 transitions. [2019-11-15 20:51:10,282 INFO L78 Accepts]: Start accepts. Automaton has 2421 states and 5954 transitions. Word has length 94 [2019-11-15 20:51:10,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:10,283 INFO L462 AbstractCegarLoop]: Abstraction has 2421 states and 5954 transitions. [2019-11-15 20:51:10,283 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:51:10,283 INFO L276 IsEmpty]: Start isEmpty. Operand 2421 states and 5954 transitions. [2019-11-15 20:51:10,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:10,286 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:10,286 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:10,286 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:10,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:10,287 INFO L82 PathProgramCache]: Analyzing trace with hash -302599365, now seen corresponding path program 1 times [2019-11-15 20:51:10,287 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:10,287 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [532880356] [2019-11-15 20:51:10,287 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:10,287 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:10,288 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:10,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:10,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:10,354 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [532880356] [2019-11-15 20:51:10,354 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:10,355 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:51:10,355 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1858415821] [2019-11-15 20:51:10,356 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:51:10,356 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:10,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:51:10,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:51:10,358 INFO L87 Difference]: Start difference. First operand 2421 states and 5954 transitions. Second operand 5 states. [2019-11-15 20:51:10,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:10,568 INFO L93 Difference]: Finished difference Result 2705 states and 6573 transitions. [2019-11-15 20:51:10,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:51:10,569 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-11-15 20:51:10,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:10,572 INFO L225 Difference]: With dead ends: 2705 [2019-11-15 20:51:10,572 INFO L226 Difference]: Without dead ends: 2687 [2019-11-15 20:51:10,573 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:51:10,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2687 states. [2019-11-15 20:51:10,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2687 to 2426. [2019-11-15 20:51:10,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2426 states. [2019-11-15 20:51:10,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2426 states to 2426 states and 5964 transitions. [2019-11-15 20:51:10,606 INFO L78 Accepts]: Start accepts. Automaton has 2426 states and 5964 transitions. Word has length 94 [2019-11-15 20:51:10,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:10,607 INFO L462 AbstractCegarLoop]: Abstraction has 2426 states and 5964 transitions. [2019-11-15 20:51:10,607 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:51:10,607 INFO L276 IsEmpty]: Start isEmpty. Operand 2426 states and 5964 transitions. [2019-11-15 20:51:10,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:10,611 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:10,611 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:10,611 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:10,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:10,612 INFO L82 PathProgramCache]: Analyzing trace with hash -2003339844, now seen corresponding path program 2 times [2019-11-15 20:51:10,612 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:10,612 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1989493576] [2019-11-15 20:51:10,612 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:10,612 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:10,612 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:10,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:10,691 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:10,692 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1989493576] [2019-11-15 20:51:10,692 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:10,692 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:51:10,692 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1804826058] [2019-11-15 20:51:10,693 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:51:10,693 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:10,693 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:51:10,693 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:51:10,693 INFO L87 Difference]: Start difference. First operand 2426 states and 5964 transitions. Second operand 6 states. [2019-11-15 20:51:11,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:11,124 INFO L93 Difference]: Finished difference Result 3358 states and 7966 transitions. [2019-11-15 20:51:11,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 20:51:11,124 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 20:51:11,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:11,127 INFO L225 Difference]: With dead ends: 3358 [2019-11-15 20:51:11,127 INFO L226 Difference]: Without dead ends: 3358 [2019-11-15 20:51:11,128 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2019-11-15 20:51:11,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3358 states. [2019-11-15 20:51:11,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3358 to 2522. [2019-11-15 20:51:11,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2522 states. [2019-11-15 20:51:11,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2522 states to 2522 states and 6137 transitions. [2019-11-15 20:51:11,153 INFO L78 Accepts]: Start accepts. Automaton has 2522 states and 6137 transitions. Word has length 94 [2019-11-15 20:51:11,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:11,153 INFO L462 AbstractCegarLoop]: Abstraction has 2522 states and 6137 transitions. [2019-11-15 20:51:11,154 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:51:11,154 INFO L276 IsEmpty]: Start isEmpty. Operand 2522 states and 6137 transitions. [2019-11-15 20:51:11,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:11,156 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:11,157 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:11,157 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:11,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:11,157 INFO L82 PathProgramCache]: Analyzing trace with hash -1673574083, now seen corresponding path program 1 times [2019-11-15 20:51:11,157 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:11,158 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1343309046] [2019-11-15 20:51:11,158 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:11,158 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:11,158 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:11,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:11,296 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:11,297 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1343309046] [2019-11-15 20:51:11,297 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:11,297 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:51:11,297 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1375700588] [2019-11-15 20:51:11,300 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:51:11,300 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:11,301 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:51:11,301 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:51:11,301 INFO L87 Difference]: Start difference. First operand 2522 states and 6137 transitions. Second operand 6 states. [2019-11-15 20:51:11,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:11,457 INFO L93 Difference]: Finished difference Result 2652 states and 6382 transitions. [2019-11-15 20:51:11,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 20:51:11,457 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 20:51:11,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:11,460 INFO L225 Difference]: With dead ends: 2652 [2019-11-15 20:51:11,460 INFO L226 Difference]: Without dead ends: 2652 [2019-11-15 20:51:11,460 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 20:51:11,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2652 states. [2019-11-15 20:51:11,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2652 to 2510. [2019-11-15 20:51:11,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2510 states. [2019-11-15 20:51:11,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2510 states to 2510 states and 6098 transitions. [2019-11-15 20:51:11,490 INFO L78 Accepts]: Start accepts. Automaton has 2510 states and 6098 transitions. Word has length 94 [2019-11-15 20:51:11,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:11,490 INFO L462 AbstractCegarLoop]: Abstraction has 2510 states and 6098 transitions. [2019-11-15 20:51:11,490 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:51:11,491 INFO L276 IsEmpty]: Start isEmpty. Operand 2510 states and 6098 transitions. [2019-11-15 20:51:11,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:11,493 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:11,493 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:11,493 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:11,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:11,494 INFO L82 PathProgramCache]: Analyzing trace with hash -1303269315, now seen corresponding path program 1 times [2019-11-15 20:51:11,494 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:11,494 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1251691509] [2019-11-15 20:51:11,494 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:11,494 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:11,494 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:11,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:11,600 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:11,601 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1251691509] [2019-11-15 20:51:11,601 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:11,601 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:51:11,602 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1374419843] [2019-11-15 20:51:11,602 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:51:11,602 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:11,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:51:11,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:51:11,603 INFO L87 Difference]: Start difference. First operand 2510 states and 6098 transitions. Second operand 7 states. [2019-11-15 20:51:12,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:12,146 INFO L93 Difference]: Finished difference Result 3517 states and 8368 transitions. [2019-11-15 20:51:12,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-15 20:51:12,147 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-11-15 20:51:12,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:12,151 INFO L225 Difference]: With dead ends: 3517 [2019-11-15 20:51:12,151 INFO L226 Difference]: Without dead ends: 3499 [2019-11-15 20:51:12,152 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2019-11-15 20:51:12,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3499 states. [2019-11-15 20:51:12,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3499 to 2770. [2019-11-15 20:51:12,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2770 states. [2019-11-15 20:51:12,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2770 states to 2770 states and 6682 transitions. [2019-11-15 20:51:12,202 INFO L78 Accepts]: Start accepts. Automaton has 2770 states and 6682 transitions. Word has length 94 [2019-11-15 20:51:12,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:12,203 INFO L462 AbstractCegarLoop]: Abstraction has 2770 states and 6682 transitions. [2019-11-15 20:51:12,203 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:51:12,203 INFO L276 IsEmpty]: Start isEmpty. Operand 2770 states and 6682 transitions. [2019-11-15 20:51:12,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:12,207 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:12,207 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:12,207 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:12,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:12,208 INFO L82 PathProgramCache]: Analyzing trace with hash -58504834, now seen corresponding path program 1 times [2019-11-15 20:51:12,208 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:12,208 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [132438485] [2019-11-15 20:51:12,208 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:12,208 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:12,209 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:12,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:12,338 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:12,338 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [132438485] [2019-11-15 20:51:12,339 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:12,339 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:51:12,339 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1286753779] [2019-11-15 20:51:12,340 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:51:12,340 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:12,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:51:12,341 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:51:12,341 INFO L87 Difference]: Start difference. First operand 2770 states and 6682 transitions. Second operand 6 states. [2019-11-15 20:51:12,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:12,558 INFO L93 Difference]: Finished difference Result 2812 states and 6746 transitions. [2019-11-15 20:51:12,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 20:51:12,559 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 20:51:12,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:12,561 INFO L225 Difference]: With dead ends: 2812 [2019-11-15 20:51:12,561 INFO L226 Difference]: Without dead ends: 2812 [2019-11-15 20:51:12,562 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2019-11-15 20:51:12,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2812 states. [2019-11-15 20:51:12,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2812 to 2728. [2019-11-15 20:51:12,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2728 states. [2019-11-15 20:51:12,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2728 states to 2728 states and 6578 transitions. [2019-11-15 20:51:12,594 INFO L78 Accepts]: Start accepts. Automaton has 2728 states and 6578 transitions. Word has length 94 [2019-11-15 20:51:12,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:12,594 INFO L462 AbstractCegarLoop]: Abstraction has 2728 states and 6578 transitions. [2019-11-15 20:51:12,595 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:51:12,595 INFO L276 IsEmpty]: Start isEmpty. Operand 2728 states and 6578 transitions. [2019-11-15 20:51:12,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:12,597 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:12,597 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:12,598 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:12,598 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:12,598 INFO L82 PathProgramCache]: Analyzing trace with hash -973503554, now seen corresponding path program 1 times [2019-11-15 20:51:12,598 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:12,599 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [213191714] [2019-11-15 20:51:12,599 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:12,599 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:12,599 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:12,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:12,715 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:12,716 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [213191714] [2019-11-15 20:51:12,716 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:12,716 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:51:12,716 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1097114002] [2019-11-15 20:51:12,717 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:51:12,717 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:12,717 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:51:12,717 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:51:12,718 INFO L87 Difference]: Start difference. First operand 2728 states and 6578 transitions. Second operand 6 states. [2019-11-15 20:51:12,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:12,883 INFO L93 Difference]: Finished difference Result 2954 states and 7065 transitions. [2019-11-15 20:51:12,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:51:12,886 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 20:51:12,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:12,890 INFO L225 Difference]: With dead ends: 2954 [2019-11-15 20:51:12,890 INFO L226 Difference]: Without dead ends: 2954 [2019-11-15 20:51:12,890 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:51:12,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2954 states. [2019-11-15 20:51:12,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2954 to 2710. [2019-11-15 20:51:12,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2710 states. [2019-11-15 20:51:12,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2710 states to 2710 states and 6542 transitions. [2019-11-15 20:51:12,922 INFO L78 Accepts]: Start accepts. Automaton has 2710 states and 6542 transitions. Word has length 94 [2019-11-15 20:51:12,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:12,922 INFO L462 AbstractCegarLoop]: Abstraction has 2710 states and 6542 transitions. [2019-11-15 20:51:12,922 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:51:12,923 INFO L276 IsEmpty]: Start isEmpty. Operand 2710 states and 6542 transitions. [2019-11-15 20:51:12,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:12,924 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:12,924 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:12,925 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:12,925 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:12,925 INFO L82 PathProgramCache]: Analyzing trace with hash 78491902, now seen corresponding path program 1 times [2019-11-15 20:51:12,925 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:12,925 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393235802] [2019-11-15 20:51:12,925 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:12,925 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:12,925 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:12,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:13,079 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:13,079 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393235802] [2019-11-15 20:51:13,080 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:13,080 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-15 20:51:13,080 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [131039083] [2019-11-15 20:51:13,080 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-15 20:51:13,081 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:13,081 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-15 20:51:13,081 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-11-15 20:51:13,081 INFO L87 Difference]: Start difference. First operand 2710 states and 6542 transitions. Second operand 9 states. [2019-11-15 20:51:13,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:13,536 INFO L93 Difference]: Finished difference Result 3836 states and 9072 transitions. [2019-11-15 20:51:13,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-11-15 20:51:13,536 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 94 [2019-11-15 20:51:13,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:13,539 INFO L225 Difference]: With dead ends: 3836 [2019-11-15 20:51:13,539 INFO L226 Difference]: Without dead ends: 3818 [2019-11-15 20:51:13,540 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=58, Invalid=214, Unknown=0, NotChecked=0, Total=272 [2019-11-15 20:51:13,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3818 states. [2019-11-15 20:51:13,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3818 to 2924. [2019-11-15 20:51:13,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2924 states. [2019-11-15 20:51:13,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2924 states to 2924 states and 7003 transitions. [2019-11-15 20:51:13,567 INFO L78 Accepts]: Start accepts. Automaton has 2924 states and 7003 transitions. Word has length 94 [2019-11-15 20:51:13,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:13,567 INFO L462 AbstractCegarLoop]: Abstraction has 2924 states and 7003 transitions. [2019-11-15 20:51:13,567 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-15 20:51:13,567 INFO L276 IsEmpty]: Start isEmpty. Operand 2924 states and 7003 transitions. [2019-11-15 20:51:13,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:13,569 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:13,569 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:13,570 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:13,570 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:13,570 INFO L82 PathProgramCache]: Analyzing trace with hash 1323256383, now seen corresponding path program 1 times [2019-11-15 20:51:13,570 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:13,570 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1495630608] [2019-11-15 20:51:13,570 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:13,571 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:13,571 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:13,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:13,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:13,660 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1495630608] [2019-11-15 20:51:13,660 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:13,660 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:51:13,660 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1255908528] [2019-11-15 20:51:13,661 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:51:13,661 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:13,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:51:13,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:51:13,661 INFO L87 Difference]: Start difference. First operand 2924 states and 7003 transitions. Second operand 5 states. [2019-11-15 20:51:13,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:13,708 INFO L93 Difference]: Finished difference Result 4255 states and 10376 transitions. [2019-11-15 20:51:13,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:51:13,708 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-11-15 20:51:13,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:13,713 INFO L225 Difference]: With dead ends: 4255 [2019-11-15 20:51:13,713 INFO L226 Difference]: Without dead ends: 4255 [2019-11-15 20:51:13,714 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:51:13,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4255 states. [2019-11-15 20:51:13,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4255 to 2724. [2019-11-15 20:51:13,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2724 states. [2019-11-15 20:51:13,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2724 states to 2724 states and 6541 transitions. [2019-11-15 20:51:13,754 INFO L78 Accepts]: Start accepts. Automaton has 2724 states and 6541 transitions. Word has length 94 [2019-11-15 20:51:13,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:13,755 INFO L462 AbstractCegarLoop]: Abstraction has 2724 states and 6541 transitions. [2019-11-15 20:51:13,755 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:51:13,755 INFO L276 IsEmpty]: Start isEmpty. Operand 2724 states and 6541 transitions. [2019-11-15 20:51:13,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:13,758 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:13,758 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:13,758 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:13,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:13,758 INFO L82 PathProgramCache]: Analyzing trace with hash 408257663, now seen corresponding path program 1 times [2019-11-15 20:51:13,759 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:13,759 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [812159766] [2019-11-15 20:51:13,759 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:13,759 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:13,759 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:13,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:13,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:13,831 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [812159766] [2019-11-15 20:51:13,831 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:13,831 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:51:13,831 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [902791713] [2019-11-15 20:51:13,832 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:51:13,832 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:13,832 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:51:13,832 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:51:13,832 INFO L87 Difference]: Start difference. First operand 2724 states and 6541 transitions. Second operand 5 states. [2019-11-15 20:51:14,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:14,060 INFO L93 Difference]: Finished difference Result 2877 states and 6835 transitions. [2019-11-15 20:51:14,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:51:14,060 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-11-15 20:51:14,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:14,063 INFO L225 Difference]: With dead ends: 2877 [2019-11-15 20:51:14,064 INFO L226 Difference]: Without dead ends: 2859 [2019-11-15 20:51:14,065 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:51:14,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2859 states. [2019-11-15 20:51:14,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2859 to 2330. [2019-11-15 20:51:14,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2330 states. [2019-11-15 20:51:14,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2330 states to 2330 states and 5576 transitions. [2019-11-15 20:51:14,098 INFO L78 Accepts]: Start accepts. Automaton has 2330 states and 5576 transitions. Word has length 94 [2019-11-15 20:51:14,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:14,099 INFO L462 AbstractCegarLoop]: Abstraction has 2330 states and 5576 transitions. [2019-11-15 20:51:14,099 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:51:14,099 INFO L276 IsEmpty]: Start isEmpty. Operand 2330 states and 5576 transitions. [2019-11-15 20:51:14,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:14,101 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:14,102 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:14,102 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:14,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:14,102 INFO L82 PathProgramCache]: Analyzing trace with hash 1653022144, now seen corresponding path program 1 times [2019-11-15 20:51:14,103 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:14,103 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [662562850] [2019-11-15 20:51:14,103 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:14,103 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:14,103 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:14,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:14,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:14,228 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [662562850] [2019-11-15 20:51:14,228 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:14,228 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:51:14,229 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [878873781] [2019-11-15 20:51:14,229 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:51:14,229 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:14,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:51:14,229 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:51:14,230 INFO L87 Difference]: Start difference. First operand 2330 states and 5576 transitions. Second operand 7 states. [2019-11-15 20:51:14,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:14,333 INFO L93 Difference]: Finished difference Result 3930 states and 9549 transitions. [2019-11-15 20:51:14,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:51:14,333 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-11-15 20:51:14,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:14,335 INFO L225 Difference]: With dead ends: 3930 [2019-11-15 20:51:14,335 INFO L226 Difference]: Without dead ends: 1679 [2019-11-15 20:51:14,336 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-11-15 20:51:14,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1679 states. [2019-11-15 20:51:14,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1679 to 1679. [2019-11-15 20:51:14,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1679 states. [2019-11-15 20:51:14,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1679 states to 1679 states and 4103 transitions. [2019-11-15 20:51:14,358 INFO L78 Accepts]: Start accepts. Automaton has 1679 states and 4103 transitions. Word has length 94 [2019-11-15 20:51:14,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:14,358 INFO L462 AbstractCegarLoop]: Abstraction has 1679 states and 4103 transitions. [2019-11-15 20:51:14,358 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:51:14,358 INFO L276 IsEmpty]: Start isEmpty. Operand 1679 states and 4103 transitions. [2019-11-15 20:51:14,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:14,360 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:14,360 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:14,361 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:14,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:14,361 INFO L82 PathProgramCache]: Analyzing trace with hash 1995104468, now seen corresponding path program 2 times [2019-11-15 20:51:14,361 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:14,361 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2120327683] [2019-11-15 20:51:14,361 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:14,362 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:14,362 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:14,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:51:14,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:51:14,558 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2120327683] [2019-11-15 20:51:14,559 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:51:14,559 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-15 20:51:14,559 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [782833925] [2019-11-15 20:51:14,560 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-15 20:51:14,560 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:51:14,560 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-15 20:51:14,560 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2019-11-15 20:51:14,560 INFO L87 Difference]: Start difference. First operand 1679 states and 4103 transitions. Second operand 12 states. [2019-11-15 20:51:14,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:51:14,843 INFO L93 Difference]: Finished difference Result 3109 states and 7667 transitions. [2019-11-15 20:51:14,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-15 20:51:14,843 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 94 [2019-11-15 20:51:14,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:51:14,846 INFO L225 Difference]: With dead ends: 3109 [2019-11-15 20:51:14,846 INFO L226 Difference]: Without dead ends: 2209 [2019-11-15 20:51:14,846 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2019-11-15 20:51:14,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2209 states. [2019-11-15 20:51:14,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2209 to 2097. [2019-11-15 20:51:14,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2097 states. [2019-11-15 20:51:14,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2097 states to 2097 states and 5020 transitions. [2019-11-15 20:51:14,873 INFO L78 Accepts]: Start accepts. Automaton has 2097 states and 5020 transitions. Word has length 94 [2019-11-15 20:51:14,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:51:14,873 INFO L462 AbstractCegarLoop]: Abstraction has 2097 states and 5020 transitions. [2019-11-15 20:51:14,874 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-15 20:51:14,874 INFO L276 IsEmpty]: Start isEmpty. Operand 2097 states and 5020 transitions. [2019-11-15 20:51:14,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:51:14,876 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:51:14,876 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:51:14,877 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:51:14,877 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:51:14,877 INFO L82 PathProgramCache]: Analyzing trace with hash 1481457402, now seen corresponding path program 3 times [2019-11-15 20:51:14,877 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:51:14,879 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [221875872] [2019-11-15 20:51:14,879 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:14,880 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:51:14,880 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:51:14,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:51:14,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:51:15,001 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 20:51:15,002 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 20:51:15,168 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 20:51:15,173 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 08:51:15 BasicIcfg [2019-11-15 20:51:15,173 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 20:51:15,174 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 20:51:15,174 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 20:51:15,174 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 20:51:15,175 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:50:33" (3/4) ... [2019-11-15 20:51:15,190 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 20:51:15,337 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_4afd5811-e33f-4e7f-8647-cea88001bd59/bin/uautomizer/witness.graphml [2019-11-15 20:51:15,337 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 20:51:15,339 INFO L168 Benchmark]: Toolchain (without parser) took 43796.85 ms. Allocated memory was 1.0 GB in the beginning and 4.8 GB in the end (delta: 3.8 GB). Free memory was 944.8 MB in the beginning and 3.8 GB in the end (delta: -2.8 GB). Peak memory consumption was 964.5 MB. Max. memory is 11.5 GB. [2019-11-15 20:51:15,340 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 1.0 GB. Free memory is still 967.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:51:15,340 INFO L168 Benchmark]: CACSL2BoogieTranslator took 646.67 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 114.3 MB). Free memory was 944.8 MB in the beginning and 1.1 GB in the end (delta: -130.3 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2019-11-15 20:51:15,341 INFO L168 Benchmark]: Boogie Procedure Inliner took 67.62 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. [2019-11-15 20:51:15,341 INFO L168 Benchmark]: Boogie Preprocessor took 32.39 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:51:15,341 INFO L168 Benchmark]: RCFGBuilder took 896.74 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.9 MB). Peak memory consumption was 49.9 MB. Max. memory is 11.5 GB. [2019-11-15 20:51:15,342 INFO L168 Benchmark]: TraceAbstraction took 41985.87 ms. Allocated memory was 1.1 GB in the beginning and 4.8 GB in the end (delta: 3.7 GB). Free memory was 1.0 GB in the beginning and 3.8 GB in the end (delta: -2.8 GB). Peak memory consumption was 905.8 MB. Max. memory is 11.5 GB. [2019-11-15 20:51:15,342 INFO L168 Benchmark]: Witness Printer took 163.43 ms. Allocated memory is still 4.8 GB. Free memory was 3.8 GB in the beginning and 3.8 GB in the end (delta: 17.8 MB). Peak memory consumption was 17.8 MB. Max. memory is 11.5 GB. [2019-11-15 20:51:15,345 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 1.0 GB. Free memory is still 967.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 646.67 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 114.3 MB). Free memory was 944.8 MB in the beginning and 1.1 GB in the end (delta: -130.3 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 67.62 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 32.39 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 896.74 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.9 MB). Peak memory consumption was 49.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 41985.87 ms. Allocated memory was 1.1 GB in the beginning and 4.8 GB in the end (delta: 3.7 GB). Free memory was 1.0 GB in the beginning and 3.8 GB in the end (delta: -2.8 GB). Peak memory consumption was 905.8 MB. Max. memory is 11.5 GB. * Witness Printer took 163.43 ms. Allocated memory is still 4.8 GB. Free memory was 3.8 GB in the beginning and 3.8 GB in the end (delta: 17.8 MB). Peak memory consumption was 17.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L697] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L698] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L700] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L701] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L702] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L703] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L704] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L705] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L706] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L707] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L708] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L709] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L710] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L711] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L712] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L713] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L714] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L716] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L717] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L718] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L778] 0 pthread_t t1453; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L779] FCALL, FORK 0 pthread_create(&t1453, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L780] 0 pthread_t t1454; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L781] FCALL, FORK 0 pthread_create(&t1454, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L742] 2 x$w_buff1 = x$w_buff0 [L743] 2 x$w_buff0 = 2 [L744] 2 x$w_buff1_used = x$w_buff0_used [L745] 2 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L747] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L748] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L749] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L750] 2 x$r_buff0_thd2 = (_Bool)1 [L753] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L756] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L722] 1 y = 1 [L725] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L756] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L757] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=1] [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=2, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=1] [L757] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L758] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=2, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=1] [L758] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L759] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=2, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=1] [L759] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L760] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=2, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=1] [L760] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L763] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=2, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=1] [L728] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L729] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L729] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L730] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L730] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L731] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L731] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L732] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L735] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L783] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L788] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L788] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L789] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L789] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L790] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L790] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L791] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L791] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 x$flush_delayed = weak$$choice2 [L797] 0 x$mem_tmp = x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L799] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L799] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L800] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L800] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L801] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L801] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L802] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 0 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L803] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L804] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L804] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L806] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L806] 0 x = x$flush_delayed ? x$mem_tmp : x [L807] 0 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 175 locations, 3 error locations. Result: UNSAFE, OverallTime: 41.8s, OverallIterations: 32, TraceHistogramMax: 1, AutomataDifference: 19.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7693 SDtfs, 9210 SDslu, 20034 SDs, 0 SdLazy, 8405 SolverSat, 565 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 401 GetRequests, 105 SyntacticMatches, 15 SemanticMatches, 281 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 900 ImplicationChecksByTransitivity, 3.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=65445occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 16.2s AutomataMinimizationTime, 31 MinimizatonAttempts, 116020 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.5s InterpolantComputationTime, 2523 NumberOfCodeBlocks, 2523 NumberOfCodeBlocksAsserted, 32 NumberOfCheckSat, 2398 ConstructedInterpolants, 0 QuantifiedInterpolants, 526328 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 31 InterpolantComputations, 31 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...