./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix054_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_124dc473-0c2a-43db-a218-9fd7ddfb4a56/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_124dc473-0c2a-43db-a218-9fd7ddfb4a56/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_124dc473-0c2a-43db-a218-9fd7ddfb4a56/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_124dc473-0c2a-43db-a218-9fd7ddfb4a56/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix054_tso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_124dc473-0c2a-43db-a218-9fd7ddfb4a56/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_124dc473-0c2a-43db-a218-9fd7ddfb4a56/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d6ebf9d4a12bd832809edc3b0db3ef36dd62b8e0 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-16 00:05:09,880 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-16 00:05:09,881 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-16 00:05:09,899 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-16 00:05:09,900 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-16 00:05:09,901 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-16 00:05:09,903 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-16 00:05:09,914 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-16 00:05:09,919 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-16 00:05:09,921 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-16 00:05:09,922 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-16 00:05:09,924 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-16 00:05:09,924 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-16 00:05:09,925 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-16 00:05:09,926 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-16 00:05:09,927 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-16 00:05:09,928 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-16 00:05:09,929 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-16 00:05:09,930 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-16 00:05:09,932 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-16 00:05:09,940 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-16 00:05:09,942 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-16 00:05:09,945 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-16 00:05:09,946 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-16 00:05:09,951 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-16 00:05:09,951 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-16 00:05:09,953 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-16 00:05:09,955 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-16 00:05:09,956 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-16 00:05:09,957 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-16 00:05:09,958 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-16 00:05:09,958 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-16 00:05:09,959 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-16 00:05:09,960 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-16 00:05:09,962 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-16 00:05:09,962 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-16 00:05:09,963 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-16 00:05:09,963 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-16 00:05:09,963 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-16 00:05:09,964 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-16 00:05:09,965 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-16 00:05:09,966 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_124dc473-0c2a-43db-a218-9fd7ddfb4a56/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-16 00:05:09,994 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-16 00:05:09,994 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-16 00:05:09,996 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-16 00:05:09,996 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-16 00:05:09,996 INFO L138 SettingsManager]: * Use SBE=true [2019-11-16 00:05:09,996 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-16 00:05:09,997 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-16 00:05:09,997 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-16 00:05:09,997 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-16 00:05:09,997 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-16 00:05:09,998 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-16 00:05:09,998 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-16 00:05:09,998 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-16 00:05:09,998 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-16 00:05:09,999 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-16 00:05:09,999 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-16 00:05:09,999 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-16 00:05:09,999 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-16 00:05:10,000 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-16 00:05:10,000 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-16 00:05:10,000 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-16 00:05:10,000 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-16 00:05:10,001 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-16 00:05:10,001 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-16 00:05:10,001 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-16 00:05:10,001 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-16 00:05:10,002 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-16 00:05:10,002 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-16 00:05:10,002 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_124dc473-0c2a-43db-a218-9fd7ddfb4a56/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d6ebf9d4a12bd832809edc3b0db3ef36dd62b8e0 [2019-11-16 00:05:10,053 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-16 00:05:10,070 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-16 00:05:10,073 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-16 00:05:10,075 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-16 00:05:10,075 INFO L275 PluginConnector]: CDTParser initialized [2019-11-16 00:05:10,077 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_124dc473-0c2a-43db-a218-9fd7ddfb4a56/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix054_tso.opt.i [2019-11-16 00:05:10,140 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_124dc473-0c2a-43db-a218-9fd7ddfb4a56/bin/uautomizer/data/c37b65c70/6efe1e94eb1f41e6b916a7ddccfb30b5/FLAG3b888a68a [2019-11-16 00:05:10,709 INFO L306 CDTParser]: Found 1 translation units. [2019-11-16 00:05:10,709 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_124dc473-0c2a-43db-a218-9fd7ddfb4a56/sv-benchmarks/c/pthread-wmm/mix054_tso.opt.i [2019-11-16 00:05:10,732 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_124dc473-0c2a-43db-a218-9fd7ddfb4a56/bin/uautomizer/data/c37b65c70/6efe1e94eb1f41e6b916a7ddccfb30b5/FLAG3b888a68a [2019-11-16 00:05:11,026 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_124dc473-0c2a-43db-a218-9fd7ddfb4a56/bin/uautomizer/data/c37b65c70/6efe1e94eb1f41e6b916a7ddccfb30b5 [2019-11-16 00:05:11,028 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-16 00:05:11,029 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-16 00:05:11,034 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-16 00:05:11,034 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-16 00:05:11,038 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-16 00:05:11,039 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:05:11" (1/1) ... [2019-11-16 00:05:11,040 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5aa9c0de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:05:11, skipping insertion in model container [2019-11-16 00:05:11,041 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:05:11" (1/1) ... [2019-11-16 00:05:11,048 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-16 00:05:11,098 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-16 00:05:11,601 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-16 00:05:11,621 INFO L188 MainTranslator]: Completed pre-run [2019-11-16 00:05:11,738 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-16 00:05:11,827 INFO L192 MainTranslator]: Completed translation [2019-11-16 00:05:11,828 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:05:11 WrapperNode [2019-11-16 00:05:11,828 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-16 00:05:11,829 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-16 00:05:11,829 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-16 00:05:11,829 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-16 00:05:11,838 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:05:11" (1/1) ... [2019-11-16 00:05:11,857 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:05:11" (1/1) ... [2019-11-16 00:05:11,911 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-16 00:05:11,922 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-16 00:05:11,922 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-16 00:05:11,922 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-16 00:05:11,932 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:05:11" (1/1) ... [2019-11-16 00:05:11,933 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:05:11" (1/1) ... [2019-11-16 00:05:11,947 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:05:11" (1/1) ... [2019-11-16 00:05:11,957 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:05:11" (1/1) ... [2019-11-16 00:05:11,966 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:05:11" (1/1) ... [2019-11-16 00:05:11,984 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:05:11" (1/1) ... [2019-11-16 00:05:11,987 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:05:11" (1/1) ... [2019-11-16 00:05:11,992 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-16 00:05:11,997 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-16 00:05:11,997 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-16 00:05:11,997 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-16 00:05:12,002 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:05:11" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_124dc473-0c2a-43db-a218-9fd7ddfb4a56/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-16 00:05:12,081 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-16 00:05:12,081 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-16 00:05:12,082 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-16 00:05:12,082 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-16 00:05:12,083 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-16 00:05:12,084 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-16 00:05:12,084 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-16 00:05:12,084 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-16 00:05:12,084 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-16 00:05:12,084 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-16 00:05:12,086 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-16 00:05:12,088 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-16 00:05:12,905 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-16 00:05:12,905 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-16 00:05:12,906 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:05:12 BoogieIcfgContainer [2019-11-16 00:05:12,906 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-16 00:05:12,907 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-16 00:05:12,907 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-16 00:05:12,910 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-16 00:05:12,910 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.11 12:05:11" (1/3) ... [2019-11-16 00:05:12,911 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70539f69 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:05:12, skipping insertion in model container [2019-11-16 00:05:12,912 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:05:11" (2/3) ... [2019-11-16 00:05:12,912 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70539f69 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:05:12, skipping insertion in model container [2019-11-16 00:05:12,912 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:05:12" (3/3) ... [2019-11-16 00:05:12,914 INFO L109 eAbstractionObserver]: Analyzing ICFG mix054_tso.opt.i [2019-11-16 00:05:12,970 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,970 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,971 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,971 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,971 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,972 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,972 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,972 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,972 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,972 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,973 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,974 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,974 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,974 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,974 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,974 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,974 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,975 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,975 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,975 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,975 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,975 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,976 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,976 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,976 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,976 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,977 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,977 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,977 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,977 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,978 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,978 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,978 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,978 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,979 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,979 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,979 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,979 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,980 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,980 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,980 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,981 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,981 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,981 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,981 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,982 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,982 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,982 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,982 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,982 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,983 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,983 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,983 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,983 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,984 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,984 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,984 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,984 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,985 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,985 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,985 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,986 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,986 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,986 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:05:12,992 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-16 00:05:12,992 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-16 00:05:13,001 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-16 00:05:13,012 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-16 00:05:13,031 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-16 00:05:13,031 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-16 00:05:13,031 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-16 00:05:13,032 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-16 00:05:13,032 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-16 00:05:13,032 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-16 00:05:13,032 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-16 00:05:13,032 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-16 00:05:13,046 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 139 places, 177 transitions [2019-11-16 00:05:14,655 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22493 states. [2019-11-16 00:05:14,657 INFO L276 IsEmpty]: Start isEmpty. Operand 22493 states. [2019-11-16 00:05:14,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-11-16 00:05:14,667 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:14,668 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:14,670 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:14,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:14,675 INFO L82 PathProgramCache]: Analyzing trace with hash -1169224313, now seen corresponding path program 1 times [2019-11-16 00:05:14,682 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:14,682 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1292516587] [2019-11-16 00:05:14,682 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:14,683 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:14,683 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:14,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:14,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:14,967 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1292516587] [2019-11-16 00:05:14,968 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:14,969 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-16 00:05:14,969 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [363557996] [2019-11-16 00:05:14,973 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-16 00:05:14,974 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:14,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-16 00:05:14,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:05:14,991 INFO L87 Difference]: Start difference. First operand 22493 states. Second operand 4 states. [2019-11-16 00:05:15,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:15,641 INFO L93 Difference]: Finished difference Result 23445 states and 91746 transitions. [2019-11-16 00:05:15,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-16 00:05:15,643 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2019-11-16 00:05:15,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:15,902 INFO L225 Difference]: With dead ends: 23445 [2019-11-16 00:05:15,902 INFO L226 Difference]: Without dead ends: 21269 [2019-11-16 00:05:15,905 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:05:16,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21269 states. [2019-11-16 00:05:17,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21269 to 21269. [2019-11-16 00:05:17,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21269 states. [2019-11-16 00:05:17,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21269 states to 21269 states and 83770 transitions. [2019-11-16 00:05:17,342 INFO L78 Accepts]: Start accepts. Automaton has 21269 states and 83770 transitions. Word has length 36 [2019-11-16 00:05:17,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:17,343 INFO L462 AbstractCegarLoop]: Abstraction has 21269 states and 83770 transitions. [2019-11-16 00:05:17,343 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-16 00:05:17,344 INFO L276 IsEmpty]: Start isEmpty. Operand 21269 states and 83770 transitions. [2019-11-16 00:05:17,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-11-16 00:05:17,358 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:17,359 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:17,359 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:17,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:17,360 INFO L82 PathProgramCache]: Analyzing trace with hash -877225964, now seen corresponding path program 1 times [2019-11-16 00:05:17,360 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:17,360 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [745431889] [2019-11-16 00:05:17,361 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:17,361 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:17,361 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:17,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:17,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:17,555 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [745431889] [2019-11-16 00:05:17,556 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:17,556 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:05:17,557 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1001388420] [2019-11-16 00:05:17,559 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:05:17,559 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:17,560 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:05:17,560 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:05:17,560 INFO L87 Difference]: Start difference. First operand 21269 states and 83770 transitions. Second operand 5 states. [2019-11-16 00:05:18,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:18,779 INFO L93 Difference]: Finished difference Result 34703 states and 129062 transitions. [2019-11-16 00:05:18,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:05:18,780 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2019-11-16 00:05:18,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:18,947 INFO L225 Difference]: With dead ends: 34703 [2019-11-16 00:05:18,948 INFO L226 Difference]: Without dead ends: 34559 [2019-11-16 00:05:18,949 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:05:19,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34559 states. [2019-11-16 00:05:20,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34559 to 33059. [2019-11-16 00:05:20,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33059 states. [2019-11-16 00:05:20,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33059 states to 33059 states and 123950 transitions. [2019-11-16 00:05:20,450 INFO L78 Accepts]: Start accepts. Automaton has 33059 states and 123950 transitions. Word has length 43 [2019-11-16 00:05:20,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:20,452 INFO L462 AbstractCegarLoop]: Abstraction has 33059 states and 123950 transitions. [2019-11-16 00:05:20,452 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:05:20,452 INFO L276 IsEmpty]: Start isEmpty. Operand 33059 states and 123950 transitions. [2019-11-16 00:05:20,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-16 00:05:20,459 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:20,459 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:20,459 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:20,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:20,460 INFO L82 PathProgramCache]: Analyzing trace with hash -2129278721, now seen corresponding path program 1 times [2019-11-16 00:05:20,460 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:20,461 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1051349763] [2019-11-16 00:05:20,461 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:20,461 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:20,461 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:20,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:20,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:20,579 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1051349763] [2019-11-16 00:05:20,579 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:20,579 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:05:20,579 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1210170850] [2019-11-16 00:05:20,580 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:05:20,580 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:20,580 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:05:20,581 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:05:20,581 INFO L87 Difference]: Start difference. First operand 33059 states and 123950 transitions. Second operand 5 states. [2019-11-16 00:05:21,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:21,691 INFO L93 Difference]: Finished difference Result 40211 states and 148619 transitions. [2019-11-16 00:05:21,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:05:21,692 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-11-16 00:05:21,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:21,984 INFO L225 Difference]: With dead ends: 40211 [2019-11-16 00:05:21,984 INFO L226 Difference]: Without dead ends: 40051 [2019-11-16 00:05:21,985 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:05:22,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40051 states. [2019-11-16 00:05:22,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40051 to 34632. [2019-11-16 00:05:22,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34632 states. [2019-11-16 00:05:23,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34632 states to 34632 states and 129246 transitions. [2019-11-16 00:05:23,062 INFO L78 Accepts]: Start accepts. Automaton has 34632 states and 129246 transitions. Word has length 44 [2019-11-16 00:05:23,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:23,062 INFO L462 AbstractCegarLoop]: Abstraction has 34632 states and 129246 transitions. [2019-11-16 00:05:23,063 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:05:23,063 INFO L276 IsEmpty]: Start isEmpty. Operand 34632 states and 129246 transitions. [2019-11-16 00:05:23,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-16 00:05:23,080 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:23,080 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:23,081 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:23,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:23,081 INFO L82 PathProgramCache]: Analyzing trace with hash -118056920, now seen corresponding path program 1 times [2019-11-16 00:05:23,082 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:23,082 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [625512782] [2019-11-16 00:05:23,082 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:23,083 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:23,083 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:23,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:23,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:23,233 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [625512782] [2019-11-16 00:05:23,234 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:23,234 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:05:23,234 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1518325922] [2019-11-16 00:05:23,236 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:05:23,236 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:23,237 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:05:23,237 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:05:23,237 INFO L87 Difference]: Start difference. First operand 34632 states and 129246 transitions. Second operand 6 states. [2019-11-16 00:05:25,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:25,158 INFO L93 Difference]: Finished difference Result 45660 states and 166140 transitions. [2019-11-16 00:05:25,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-16 00:05:25,159 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 51 [2019-11-16 00:05:25,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:25,468 INFO L225 Difference]: With dead ends: 45660 [2019-11-16 00:05:25,468 INFO L226 Difference]: Without dead ends: 45516 [2019-11-16 00:05:25,469 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-16 00:05:25,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45516 states. [2019-11-16 00:05:26,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45516 to 33595. [2019-11-16 00:05:26,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33595 states. [2019-11-16 00:05:26,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33595 states to 33595 states and 125401 transitions. [2019-11-16 00:05:26,453 INFO L78 Accepts]: Start accepts. Automaton has 33595 states and 125401 transitions. Word has length 51 [2019-11-16 00:05:26,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:26,454 INFO L462 AbstractCegarLoop]: Abstraction has 33595 states and 125401 transitions. [2019-11-16 00:05:26,454 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:05:26,454 INFO L276 IsEmpty]: Start isEmpty. Operand 33595 states and 125401 transitions. [2019-11-16 00:05:26,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-11-16 00:05:26,486 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:26,486 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:26,487 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:26,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:26,487 INFO L82 PathProgramCache]: Analyzing trace with hash 481645682, now seen corresponding path program 1 times [2019-11-16 00:05:26,487 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:26,488 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [503955789] [2019-11-16 00:05:26,488 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:26,488 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:26,488 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:26,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:26,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:26,568 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [503955789] [2019-11-16 00:05:26,568 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:26,569 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:05:26,569 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1320785431] [2019-11-16 00:05:26,569 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:05:26,569 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:26,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:05:26,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:05:26,570 INFO L87 Difference]: Start difference. First operand 33595 states and 125401 transitions. Second operand 6 states. [2019-11-16 00:05:28,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:28,058 INFO L93 Difference]: Finished difference Result 46067 states and 167834 transitions. [2019-11-16 00:05:28,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-16 00:05:28,059 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-11-16 00:05:28,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:28,140 INFO L225 Difference]: With dead ends: 46067 [2019-11-16 00:05:28,140 INFO L226 Difference]: Without dead ends: 45827 [2019-11-16 00:05:28,140 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-16 00:05:28,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45827 states. [2019-11-16 00:05:28,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45827 to 39956. [2019-11-16 00:05:28,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39956 states. [2019-11-16 00:05:28,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39956 states to 39956 states and 147325 transitions. [2019-11-16 00:05:28,964 INFO L78 Accepts]: Start accepts. Automaton has 39956 states and 147325 transitions. Word has length 58 [2019-11-16 00:05:28,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:28,964 INFO L462 AbstractCegarLoop]: Abstraction has 39956 states and 147325 transitions. [2019-11-16 00:05:28,964 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:05:28,964 INFO L276 IsEmpty]: Start isEmpty. Operand 39956 states and 147325 transitions. [2019-11-16 00:05:29,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-16 00:05:29,001 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:29,001 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:29,002 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:29,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:29,002 INFO L82 PathProgramCache]: Analyzing trace with hash 751812519, now seen corresponding path program 1 times [2019-11-16 00:05:29,003 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:29,003 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1424162693] [2019-11-16 00:05:29,003 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:29,003 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:29,004 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:29,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:29,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:29,068 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1424162693] [2019-11-16 00:05:29,068 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:29,068 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-16 00:05:29,069 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [902077745] [2019-11-16 00:05:29,071 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-16 00:05:29,071 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:29,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-16 00:05:29,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:05:29,072 INFO L87 Difference]: Start difference. First operand 39956 states and 147325 transitions. Second operand 3 states. [2019-11-16 00:05:29,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:29,314 INFO L93 Difference]: Finished difference Result 50254 states and 182160 transitions. [2019-11-16 00:05:29,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-16 00:05:29,315 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 60 [2019-11-16 00:05:29,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:29,423 INFO L225 Difference]: With dead ends: 50254 [2019-11-16 00:05:29,423 INFO L226 Difference]: Without dead ends: 50254 [2019-11-16 00:05:29,423 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:05:29,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50254 states. [2019-11-16 00:05:30,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50254 to 43886. [2019-11-16 00:05:30,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43886 states. [2019-11-16 00:05:31,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43886 states to 43886 states and 160763 transitions. [2019-11-16 00:05:31,062 INFO L78 Accepts]: Start accepts. Automaton has 43886 states and 160763 transitions. Word has length 60 [2019-11-16 00:05:31,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:31,063 INFO L462 AbstractCegarLoop]: Abstraction has 43886 states and 160763 transitions. [2019-11-16 00:05:31,063 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-16 00:05:31,063 INFO L276 IsEmpty]: Start isEmpty. Operand 43886 states and 160763 transitions. [2019-11-16 00:05:31,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-11-16 00:05:31,095 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:31,095 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:31,095 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:31,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:31,095 INFO L82 PathProgramCache]: Analyzing trace with hash -1820538073, now seen corresponding path program 1 times [2019-11-16 00:05:31,096 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:31,096 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1175675776] [2019-11-16 00:05:31,096 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:31,096 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:31,096 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:31,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:31,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:31,183 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1175675776] [2019-11-16 00:05:31,184 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:31,184 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:05:31,184 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [550002280] [2019-11-16 00:05:31,184 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:05:31,185 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:31,185 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:05:31,185 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:05:31,185 INFO L87 Difference]: Start difference. First operand 43886 states and 160763 transitions. Second operand 7 states. [2019-11-16 00:05:32,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:32,261 INFO L93 Difference]: Finished difference Result 55882 states and 200497 transitions. [2019-11-16 00:05:32,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-16 00:05:32,262 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-11-16 00:05:32,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:32,385 INFO L225 Difference]: With dead ends: 55882 [2019-11-16 00:05:32,385 INFO L226 Difference]: Without dead ends: 55642 [2019-11-16 00:05:32,386 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-16 00:05:32,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55642 states. [2019-11-16 00:05:33,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55642 to 45112. [2019-11-16 00:05:33,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45112 states. [2019-11-16 00:05:33,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45112 states to 45112 states and 164930 transitions. [2019-11-16 00:05:33,298 INFO L78 Accepts]: Start accepts. Automaton has 45112 states and 164930 transitions. Word has length 64 [2019-11-16 00:05:33,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:33,298 INFO L462 AbstractCegarLoop]: Abstraction has 45112 states and 164930 transitions. [2019-11-16 00:05:33,298 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:05:33,299 INFO L276 IsEmpty]: Start isEmpty. Operand 45112 states and 164930 transitions. [2019-11-16 00:05:33,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-16 00:05:33,331 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:33,331 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:33,332 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:33,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:33,332 INFO L82 PathProgramCache]: Analyzing trace with hash -757902251, now seen corresponding path program 1 times [2019-11-16 00:05:33,332 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:33,332 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1987603882] [2019-11-16 00:05:33,333 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:33,333 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:33,333 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:33,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:33,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:33,396 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1987603882] [2019-11-16 00:05:33,397 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:33,397 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:05:33,397 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [909659605] [2019-11-16 00:05:33,398 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:05:33,398 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:33,398 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:05:33,398 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:05:33,399 INFO L87 Difference]: Start difference. First operand 45112 states and 164930 transitions. Second operand 5 states. [2019-11-16 00:05:34,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:34,829 INFO L93 Difference]: Finished difference Result 114994 states and 419362 transitions. [2019-11-16 00:05:34,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-16 00:05:34,829 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-11-16 00:05:34,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:35,069 INFO L225 Difference]: With dead ends: 114994 [2019-11-16 00:05:35,069 INFO L226 Difference]: Without dead ends: 114254 [2019-11-16 00:05:35,069 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-16 00:05:35,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114254 states. [2019-11-16 00:05:36,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114254 to 64567. [2019-11-16 00:05:36,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64567 states. [2019-11-16 00:05:36,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64567 states to 64567 states and 236504 transitions. [2019-11-16 00:05:36,548 INFO L78 Accepts]: Start accepts. Automaton has 64567 states and 236504 transitions. Word has length 65 [2019-11-16 00:05:36,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:36,548 INFO L462 AbstractCegarLoop]: Abstraction has 64567 states and 236504 transitions. [2019-11-16 00:05:36,549 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:05:36,549 INFO L276 IsEmpty]: Start isEmpty. Operand 64567 states and 236504 transitions. [2019-11-16 00:05:36,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-16 00:05:36,599 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:36,599 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:36,600 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:36,600 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:36,600 INFO L82 PathProgramCache]: Analyzing trace with hash 2138820354, now seen corresponding path program 1 times [2019-11-16 00:05:36,600 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:36,600 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711370174] [2019-11-16 00:05:36,601 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:36,601 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:36,601 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:36,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:36,725 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:36,726 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [711370174] [2019-11-16 00:05:36,726 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:36,726 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:05:36,727 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [460982940] [2019-11-16 00:05:36,727 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:05:36,727 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:36,727 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:05:36,728 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:05:36,728 INFO L87 Difference]: Start difference. First operand 64567 states and 236504 transitions. Second operand 6 states. [2019-11-16 00:05:37,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:37,462 INFO L93 Difference]: Finished difference Result 71032 states and 257891 transitions. [2019-11-16 00:05:37,463 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:05:37,463 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-11-16 00:05:37,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:37,615 INFO L225 Difference]: With dead ends: 71032 [2019-11-16 00:05:37,615 INFO L226 Difference]: Without dead ends: 71032 [2019-11-16 00:05:37,615 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:05:37,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71032 states. [2019-11-16 00:05:39,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71032 to 65435. [2019-11-16 00:05:39,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65435 states. [2019-11-16 00:05:39,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65435 states to 65435 states and 239323 transitions. [2019-11-16 00:05:39,432 INFO L78 Accepts]: Start accepts. Automaton has 65435 states and 239323 transitions. Word has length 65 [2019-11-16 00:05:39,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:39,432 INFO L462 AbstractCegarLoop]: Abstraction has 65435 states and 239323 transitions. [2019-11-16 00:05:39,432 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:05:39,432 INFO L276 IsEmpty]: Start isEmpty. Operand 65435 states and 239323 transitions. [2019-11-16 00:05:39,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-16 00:05:39,502 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:39,503 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:39,503 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:39,503 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:39,503 INFO L82 PathProgramCache]: Analyzing trace with hash -1677260653, now seen corresponding path program 1 times [2019-11-16 00:05:39,504 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:39,504 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1488259691] [2019-11-16 00:05:39,504 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:39,504 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:39,505 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:39,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:39,599 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:39,600 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1488259691] [2019-11-16 00:05:39,600 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:39,601 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:05:39,601 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [45003486] [2019-11-16 00:05:39,601 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:05:39,602 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:39,602 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:05:39,602 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:05:39,602 INFO L87 Difference]: Start difference. First operand 65435 states and 239323 transitions. Second operand 7 states. [2019-11-16 00:05:40,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:40,651 INFO L93 Difference]: Finished difference Result 75659 states and 272834 transitions. [2019-11-16 00:05:40,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-16 00:05:40,651 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-11-16 00:05:40,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:40,806 INFO L225 Difference]: With dead ends: 75659 [2019-11-16 00:05:40,807 INFO L226 Difference]: Without dead ends: 75459 [2019-11-16 00:05:40,807 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-16 00:05:41,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75459 states. [2019-11-16 00:05:41,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75459 to 66313. [2019-11-16 00:05:41,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66313 states. [2019-11-16 00:05:42,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66313 states to 66313 states and 242194 transitions. [2019-11-16 00:05:42,112 INFO L78 Accepts]: Start accepts. Automaton has 66313 states and 242194 transitions. Word has length 65 [2019-11-16 00:05:42,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:42,113 INFO L462 AbstractCegarLoop]: Abstraction has 66313 states and 242194 transitions. [2019-11-16 00:05:42,113 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:05:42,113 INFO L276 IsEmpty]: Start isEmpty. Operand 66313 states and 242194 transitions. [2019-11-16 00:05:42,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-11-16 00:05:42,172 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:42,172 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:42,172 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:42,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:42,173 INFO L82 PathProgramCache]: Analyzing trace with hash 1556884819, now seen corresponding path program 1 times [2019-11-16 00:05:42,173 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:42,173 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89131321] [2019-11-16 00:05:42,174 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:42,174 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:42,174 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:42,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:42,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:42,267 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [89131321] [2019-11-16 00:05:42,268 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:42,268 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-16 00:05:42,268 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2147060897] [2019-11-16 00:05:42,268 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-16 00:05:42,269 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:42,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-16 00:05:42,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:05:42,269 INFO L87 Difference]: Start difference. First operand 66313 states and 242194 transitions. Second operand 4 states. [2019-11-16 00:05:42,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:42,387 INFO L93 Difference]: Finished difference Result 21270 states and 67142 transitions. [2019-11-16 00:05:42,388 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-16 00:05:42,388 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-11-16 00:05:42,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:42,433 INFO L225 Difference]: With dead ends: 21270 [2019-11-16 00:05:42,434 INFO L226 Difference]: Without dead ends: 20567 [2019-11-16 00:05:42,434 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:05:42,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20567 states. [2019-11-16 00:05:43,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20567 to 20439. [2019-11-16 00:05:43,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20439 states. [2019-11-16 00:05:43,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20439 states to 20439 states and 64584 transitions. [2019-11-16 00:05:43,345 INFO L78 Accepts]: Start accepts. Automaton has 20439 states and 64584 transitions. Word has length 67 [2019-11-16 00:05:43,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:43,346 INFO L462 AbstractCegarLoop]: Abstraction has 20439 states and 64584 transitions. [2019-11-16 00:05:43,346 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-16 00:05:43,346 INFO L276 IsEmpty]: Start isEmpty. Operand 20439 states and 64584 transitions. [2019-11-16 00:05:43,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-11-16 00:05:43,373 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:43,373 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:43,373 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:43,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:43,374 INFO L82 PathProgramCache]: Analyzing trace with hash 631160209, now seen corresponding path program 1 times [2019-11-16 00:05:43,374 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:43,374 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [448360887] [2019-11-16 00:05:43,374 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:43,375 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:43,375 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:43,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:43,524 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:43,524 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [448360887] [2019-11-16 00:05:43,524 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:43,525 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-16 00:05:43,525 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [52470923] [2019-11-16 00:05:43,525 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-16 00:05:43,526 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:43,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-16 00:05:43,526 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:05:43,526 INFO L87 Difference]: Start difference. First operand 20439 states and 64584 transitions. Second operand 8 states. [2019-11-16 00:05:44,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:44,775 INFO L93 Difference]: Finished difference Result 22581 states and 70785 transitions. [2019-11-16 00:05:44,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-11-16 00:05:44,776 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 77 [2019-11-16 00:05:44,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:44,823 INFO L225 Difference]: With dead ends: 22581 [2019-11-16 00:05:44,823 INFO L226 Difference]: Without dead ends: 22533 [2019-11-16 00:05:44,825 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=165, Invalid=591, Unknown=0, NotChecked=0, Total=756 [2019-11-16 00:05:44,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22533 states. [2019-11-16 00:05:45,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22533 to 17910. [2019-11-16 00:05:45,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17910 states. [2019-11-16 00:05:45,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17910 states to 17910 states and 56952 transitions. [2019-11-16 00:05:45,155 INFO L78 Accepts]: Start accepts. Automaton has 17910 states and 56952 transitions. Word has length 77 [2019-11-16 00:05:45,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:45,155 INFO L462 AbstractCegarLoop]: Abstraction has 17910 states and 56952 transitions. [2019-11-16 00:05:45,155 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-16 00:05:45,155 INFO L276 IsEmpty]: Start isEmpty. Operand 17910 states and 56952 transitions. [2019-11-16 00:05:45,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-16 00:05:45,171 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:45,172 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:45,172 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:45,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:45,172 INFO L82 PathProgramCache]: Analyzing trace with hash -996181987, now seen corresponding path program 1 times [2019-11-16 00:05:45,173 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:45,173 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1754748310] [2019-11-16 00:05:45,173 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:45,173 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:45,173 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:45,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:45,239 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:45,240 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1754748310] [2019-11-16 00:05:45,240 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:45,240 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-16 00:05:45,240 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2085140326] [2019-11-16 00:05:45,241 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-16 00:05:45,241 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:45,242 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-16 00:05:45,242 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:05:45,242 INFO L87 Difference]: Start difference. First operand 17910 states and 56952 transitions. Second operand 3 states. [2019-11-16 00:05:45,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:45,518 INFO L93 Difference]: Finished difference Result 19343 states and 61175 transitions. [2019-11-16 00:05:45,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-16 00:05:45,518 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 78 [2019-11-16 00:05:45,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:45,548 INFO L225 Difference]: With dead ends: 19343 [2019-11-16 00:05:45,548 INFO L226 Difference]: Without dead ends: 19343 [2019-11-16 00:05:45,548 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:05:45,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19343 states. [2019-11-16 00:05:45,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19343 to 18604. [2019-11-16 00:05:45,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18604 states. [2019-11-16 00:05:45,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18604 states to 18604 states and 59000 transitions. [2019-11-16 00:05:45,824 INFO L78 Accepts]: Start accepts. Automaton has 18604 states and 59000 transitions. Word has length 78 [2019-11-16 00:05:45,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:45,824 INFO L462 AbstractCegarLoop]: Abstraction has 18604 states and 59000 transitions. [2019-11-16 00:05:45,824 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-16 00:05:45,824 INFO L276 IsEmpty]: Start isEmpty. Operand 18604 states and 59000 transitions. [2019-11-16 00:05:45,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-16 00:05:45,842 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:45,842 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:45,842 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:45,842 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:45,842 INFO L82 PathProgramCache]: Analyzing trace with hash 1904019491, now seen corresponding path program 1 times [2019-11-16 00:05:45,842 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:45,843 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1798966891] [2019-11-16 00:05:45,843 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:45,843 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:45,843 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:45,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:45,916 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:45,917 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1798966891] [2019-11-16 00:05:45,917 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:45,917 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-16 00:05:45,918 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2088207206] [2019-11-16 00:05:45,918 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-16 00:05:45,918 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:45,919 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-16 00:05:45,919 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:05:45,919 INFO L87 Difference]: Start difference. First operand 18604 states and 59000 transitions. Second operand 4 states. [2019-11-16 00:05:46,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:46,251 INFO L93 Difference]: Finished difference Result 22440 states and 70067 transitions. [2019-11-16 00:05:46,252 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-16 00:05:46,252 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-11-16 00:05:46,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:46,284 INFO L225 Difference]: With dead ends: 22440 [2019-11-16 00:05:46,284 INFO L226 Difference]: Without dead ends: 22332 [2019-11-16 00:05:46,285 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:05:46,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22332 states. [2019-11-16 00:05:46,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22332 to 21225. [2019-11-16 00:05:46,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21225 states. [2019-11-16 00:05:46,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21225 states to 21225 states and 66650 transitions. [2019-11-16 00:05:46,600 INFO L78 Accepts]: Start accepts. Automaton has 21225 states and 66650 transitions. Word has length 79 [2019-11-16 00:05:46,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:46,600 INFO L462 AbstractCegarLoop]: Abstraction has 21225 states and 66650 transitions. [2019-11-16 00:05:46,600 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-16 00:05:46,600 INFO L276 IsEmpty]: Start isEmpty. Operand 21225 states and 66650 transitions. [2019-11-16 00:05:46,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-16 00:05:46,619 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:46,620 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:46,620 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:46,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:46,620 INFO L82 PathProgramCache]: Analyzing trace with hash -31640796, now seen corresponding path program 1 times [2019-11-16 00:05:46,620 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:46,620 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2034930363] [2019-11-16 00:05:46,621 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:46,621 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:46,621 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:46,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:46,665 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:46,665 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2034930363] [2019-11-16 00:05:46,665 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:46,665 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-16 00:05:46,666 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1691704190] [2019-11-16 00:05:46,666 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-16 00:05:46,666 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:46,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-16 00:05:46,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:05:46,667 INFO L87 Difference]: Start difference. First operand 21225 states and 66650 transitions. Second operand 3 states. [2019-11-16 00:05:46,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:46,913 INFO L93 Difference]: Finished difference Result 22696 states and 70972 transitions. [2019-11-16 00:05:46,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-16 00:05:46,913 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-11-16 00:05:46,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:46,947 INFO L225 Difference]: With dead ends: 22696 [2019-11-16 00:05:46,947 INFO L226 Difference]: Without dead ends: 22696 [2019-11-16 00:05:46,948 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:05:46,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22696 states. [2019-11-16 00:05:47,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22696 to 21953. [2019-11-16 00:05:47,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21953 states. [2019-11-16 00:05:47,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21953 states to 21953 states and 68786 transitions. [2019-11-16 00:05:47,269 INFO L78 Accepts]: Start accepts. Automaton has 21953 states and 68786 transitions. Word has length 79 [2019-11-16 00:05:47,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:47,270 INFO L462 AbstractCegarLoop]: Abstraction has 21953 states and 68786 transitions. [2019-11-16 00:05:47,270 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-16 00:05:47,270 INFO L276 IsEmpty]: Start isEmpty. Operand 21953 states and 68786 transitions. [2019-11-16 00:05:47,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-16 00:05:47,290 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:47,290 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:47,291 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:47,291 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:47,291 INFO L82 PathProgramCache]: Analyzing trace with hash -1206129694, now seen corresponding path program 1 times [2019-11-16 00:05:47,291 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:47,292 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [970565763] [2019-11-16 00:05:47,292 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:47,292 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:47,292 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:47,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:47,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:47,422 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [970565763] [2019-11-16 00:05:47,423 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:47,426 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:05:47,426 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [301555286] [2019-11-16 00:05:47,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:05:47,427 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:47,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:05:47,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:05:47,428 INFO L87 Difference]: Start difference. First operand 21953 states and 68786 transitions. Second operand 6 states. [2019-11-16 00:05:48,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:48,049 INFO L93 Difference]: Finished difference Result 23567 states and 73153 transitions. [2019-11-16 00:05:48,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:05:48,050 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-11-16 00:05:48,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:48,083 INFO L225 Difference]: With dead ends: 23567 [2019-11-16 00:05:48,084 INFO L226 Difference]: Without dead ends: 23567 [2019-11-16 00:05:48,084 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:05:48,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23567 states. [2019-11-16 00:05:48,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23567 to 22578. [2019-11-16 00:05:48,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22578 states. [2019-11-16 00:05:48,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22578 states to 22578 states and 70288 transitions. [2019-11-16 00:05:48,413 INFO L78 Accepts]: Start accepts. Automaton has 22578 states and 70288 transitions. Word has length 80 [2019-11-16 00:05:48,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:48,414 INFO L462 AbstractCegarLoop]: Abstraction has 22578 states and 70288 transitions. [2019-11-16 00:05:48,414 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:05:48,414 INFO L276 IsEmpty]: Start isEmpty. Operand 22578 states and 70288 transitions. [2019-11-16 00:05:48,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-16 00:05:48,435 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:48,435 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:48,435 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:48,435 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:48,435 INFO L82 PathProgramCache]: Analyzing trace with hash 1153177315, now seen corresponding path program 1 times [2019-11-16 00:05:48,436 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:48,436 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487082871] [2019-11-16 00:05:48,436 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:48,436 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:48,436 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:48,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:48,571 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:48,571 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1487082871] [2019-11-16 00:05:48,571 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:48,571 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:05:48,571 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1539501008] [2019-11-16 00:05:48,572 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:05:48,572 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:48,572 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:05:48,572 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:05:48,572 INFO L87 Difference]: Start difference. First operand 22578 states and 70288 transitions. Second operand 7 states. [2019-11-16 00:05:49,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:49,147 INFO L93 Difference]: Finished difference Result 24538 states and 75698 transitions. [2019-11-16 00:05:49,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-16 00:05:49,148 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-11-16 00:05:49,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:49,182 INFO L225 Difference]: With dead ends: 24538 [2019-11-16 00:05:49,183 INFO L226 Difference]: Without dead ends: 24538 [2019-11-16 00:05:49,183 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-16 00:05:49,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24538 states. [2019-11-16 00:05:49,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24538 to 23533. [2019-11-16 00:05:49,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23533 states. [2019-11-16 00:05:49,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23533 states to 23533 states and 72789 transitions. [2019-11-16 00:05:49,522 INFO L78 Accepts]: Start accepts. Automaton has 23533 states and 72789 transitions. Word has length 80 [2019-11-16 00:05:49,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:49,522 INFO L462 AbstractCegarLoop]: Abstraction has 23533 states and 72789 transitions. [2019-11-16 00:05:49,522 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:05:49,522 INFO L276 IsEmpty]: Start isEmpty. Operand 23533 states and 72789 transitions. [2019-11-16 00:05:49,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-16 00:05:49,545 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:49,545 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:49,545 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:49,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:49,545 INFO L82 PathProgramCache]: Analyzing trace with hash 1482943076, now seen corresponding path program 1 times [2019-11-16 00:05:49,545 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:49,546 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1390215647] [2019-11-16 00:05:49,546 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:49,546 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:49,546 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:49,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:49,649 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:49,650 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1390215647] [2019-11-16 00:05:49,650 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:49,650 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:05:49,651 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [848680138] [2019-11-16 00:05:49,651 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:05:49,651 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:49,652 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:05:49,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:05:49,652 INFO L87 Difference]: Start difference. First operand 23533 states and 72789 transitions. Second operand 5 states. [2019-11-16 00:05:49,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:49,718 INFO L93 Difference]: Finished difference Result 3478 states and 8530 transitions. [2019-11-16 00:05:49,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-16 00:05:49,719 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 80 [2019-11-16 00:05:49,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:49,724 INFO L225 Difference]: With dead ends: 3478 [2019-11-16 00:05:49,724 INFO L226 Difference]: Without dead ends: 2921 [2019-11-16 00:05:49,725 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:05:49,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2921 states. [2019-11-16 00:05:49,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2921 to 2654. [2019-11-16 00:05:49,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2654 states. [2019-11-16 00:05:49,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2654 states to 2654 states and 6486 transitions. [2019-11-16 00:05:49,782 INFO L78 Accepts]: Start accepts. Automaton has 2654 states and 6486 transitions. Word has length 80 [2019-11-16 00:05:49,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:49,783 INFO L462 AbstractCegarLoop]: Abstraction has 2654 states and 6486 transitions. [2019-11-16 00:05:49,783 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:05:49,783 INFO L276 IsEmpty]: Start isEmpty. Operand 2654 states and 6486 transitions. [2019-11-16 00:05:49,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-11-16 00:05:49,787 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:49,788 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:49,788 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:49,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:49,789 INFO L82 PathProgramCache]: Analyzing trace with hash -566228037, now seen corresponding path program 1 times [2019-11-16 00:05:49,789 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:49,789 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1481127075] [2019-11-16 00:05:49,790 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:49,790 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:49,790 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:49,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:49,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:49,932 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1481127075] [2019-11-16 00:05:49,932 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:49,932 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:05:49,932 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [81536391] [2019-11-16 00:05:49,934 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:05:49,934 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:49,934 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:05:49,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:05:49,935 INFO L87 Difference]: Start difference. First operand 2654 states and 6486 transitions. Second operand 6 states. [2019-11-16 00:05:50,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:50,155 INFO L93 Difference]: Finished difference Result 3039 states and 7207 transitions. [2019-11-16 00:05:50,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-16 00:05:50,156 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 90 [2019-11-16 00:05:50,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:50,160 INFO L225 Difference]: With dead ends: 3039 [2019-11-16 00:05:50,161 INFO L226 Difference]: Without dead ends: 3039 [2019-11-16 00:05:50,161 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-16 00:05:50,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3039 states. [2019-11-16 00:05:50,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3039 to 2752. [2019-11-16 00:05:50,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2752 states. [2019-11-16 00:05:50,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2752 states to 2752 states and 6623 transitions. [2019-11-16 00:05:50,209 INFO L78 Accepts]: Start accepts. Automaton has 2752 states and 6623 transitions. Word has length 90 [2019-11-16 00:05:50,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:50,210 INFO L462 AbstractCegarLoop]: Abstraction has 2752 states and 6623 transitions. [2019-11-16 00:05:50,210 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:05:50,210 INFO L276 IsEmpty]: Start isEmpty. Operand 2752 states and 6623 transitions. [2019-11-16 00:05:50,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-11-16 00:05:50,212 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:50,213 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:50,213 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:50,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:50,214 INFO L82 PathProgramCache]: Analyzing trace with hash -1590921958, now seen corresponding path program 1 times [2019-11-16 00:05:50,214 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:50,214 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159573483] [2019-11-16 00:05:50,214 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:50,215 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:50,215 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:50,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:50,297 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:50,298 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159573483] [2019-11-16 00:05:50,298 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:50,298 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:05:50,299 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [393082793] [2019-11-16 00:05:50,299 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:05:50,299 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:50,299 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:05:50,300 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:05:50,300 INFO L87 Difference]: Start difference. First operand 2752 states and 6623 transitions. Second operand 5 states. [2019-11-16 00:05:50,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:50,549 INFO L93 Difference]: Finished difference Result 3256 states and 7715 transitions. [2019-11-16 00:05:50,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:05:50,550 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 90 [2019-11-16 00:05:50,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:50,553 INFO L225 Difference]: With dead ends: 3256 [2019-11-16 00:05:50,553 INFO L226 Difference]: Without dead ends: 3226 [2019-11-16 00:05:50,553 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:05:50,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3226 states. [2019-11-16 00:05:50,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3226 to 2825. [2019-11-16 00:05:50,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2825 states. [2019-11-16 00:05:50,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2825 states to 2825 states and 6780 transitions. [2019-11-16 00:05:50,582 INFO L78 Accepts]: Start accepts. Automaton has 2825 states and 6780 transitions. Word has length 90 [2019-11-16 00:05:50,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:50,582 INFO L462 AbstractCegarLoop]: Abstraction has 2825 states and 6780 transitions. [2019-11-16 00:05:50,582 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:05:50,582 INFO L276 IsEmpty]: Start isEmpty. Operand 2825 states and 6780 transitions. [2019-11-16 00:05:50,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-16 00:05:50,585 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:50,585 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:50,585 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:50,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:50,585 INFO L82 PathProgramCache]: Analyzing trace with hash -1264806944, now seen corresponding path program 1 times [2019-11-16 00:05:50,586 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:50,586 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1985390975] [2019-11-16 00:05:50,586 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:50,586 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:50,586 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:50,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:50,709 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:50,709 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1985390975] [2019-11-16 00:05:50,709 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:50,709 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-16 00:05:50,709 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [441039289] [2019-11-16 00:05:50,710 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-16 00:05:50,716 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:50,717 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-16 00:05:50,717 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:05:50,717 INFO L87 Difference]: Start difference. First operand 2825 states and 6780 transitions. Second operand 8 states. [2019-11-16 00:05:51,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:51,401 INFO L93 Difference]: Finished difference Result 4597 states and 10819 transitions. [2019-11-16 00:05:51,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-11-16 00:05:51,401 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 92 [2019-11-16 00:05:51,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:51,405 INFO L225 Difference]: With dead ends: 4597 [2019-11-16 00:05:51,405 INFO L226 Difference]: Without dead ends: 4561 [2019-11-16 00:05:51,406 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=87, Invalid=293, Unknown=0, NotChecked=0, Total=380 [2019-11-16 00:05:51,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4561 states. [2019-11-16 00:05:51,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4561 to 3298. [2019-11-16 00:05:51,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3298 states. [2019-11-16 00:05:51,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3298 states to 3298 states and 7873 transitions. [2019-11-16 00:05:51,450 INFO L78 Accepts]: Start accepts. Automaton has 3298 states and 7873 transitions. Word has length 92 [2019-11-16 00:05:51,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:51,451 INFO L462 AbstractCegarLoop]: Abstraction has 3298 states and 7873 transitions. [2019-11-16 00:05:51,451 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-16 00:05:51,451 INFO L276 IsEmpty]: Start isEmpty. Operand 3298 states and 7873 transitions. [2019-11-16 00:05:51,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-16 00:05:51,454 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:51,455 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:51,455 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:51,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:51,456 INFO L82 PathProgramCache]: Analyzing trace with hash 2057166880, now seen corresponding path program 1 times [2019-11-16 00:05:51,456 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:51,456 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1708713678] [2019-11-16 00:05:51,456 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:51,456 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:51,457 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:51,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:51,580 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:51,580 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1708713678] [2019-11-16 00:05:51,580 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:51,580 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:05:51,581 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [232195840] [2019-11-16 00:05:51,581 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:05:51,581 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:51,581 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:05:51,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:05:51,582 INFO L87 Difference]: Start difference. First operand 3298 states and 7873 transitions. Second operand 7 states. [2019-11-16 00:05:52,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:52,346 INFO L93 Difference]: Finished difference Result 5102 states and 12175 transitions. [2019-11-16 00:05:52,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-16 00:05:52,347 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 92 [2019-11-16 00:05:52,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:52,355 INFO L225 Difference]: With dead ends: 5102 [2019-11-16 00:05:52,355 INFO L226 Difference]: Without dead ends: 5058 [2019-11-16 00:05:52,355 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2019-11-16 00:05:52,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5058 states. [2019-11-16 00:05:52,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5058 to 3639. [2019-11-16 00:05:52,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3639 states. [2019-11-16 00:05:52,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3639 states to 3639 states and 8599 transitions. [2019-11-16 00:05:52,440 INFO L78 Accepts]: Start accepts. Automaton has 3639 states and 8599 transitions. Word has length 92 [2019-11-16 00:05:52,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:52,440 INFO L462 AbstractCegarLoop]: Abstraction has 3639 states and 8599 transitions. [2019-11-16 00:05:52,441 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:05:52,441 INFO L276 IsEmpty]: Start isEmpty. Operand 3639 states and 8599 transitions. [2019-11-16 00:05:52,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-16 00:05:52,447 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:52,447 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:52,447 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:52,448 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:52,448 INFO L82 PathProgramCache]: Analyzing trace with hash 121506593, now seen corresponding path program 1 times [2019-11-16 00:05:52,450 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:52,450 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [61432612] [2019-11-16 00:05:52,451 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:52,451 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:52,451 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:52,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:52,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:52,582 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [61432612] [2019-11-16 00:05:52,582 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:52,582 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:05:52,582 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [51831447] [2019-11-16 00:05:52,583 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:05:52,583 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:52,583 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:05:52,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:05:52,584 INFO L87 Difference]: Start difference. First operand 3639 states and 8599 transitions. Second operand 6 states. [2019-11-16 00:05:52,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:52,780 INFO L93 Difference]: Finished difference Result 2511 states and 6045 transitions. [2019-11-16 00:05:52,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-16 00:05:52,780 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2019-11-16 00:05:52,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:52,784 INFO L225 Difference]: With dead ends: 2511 [2019-11-16 00:05:52,784 INFO L226 Difference]: Without dead ends: 2511 [2019-11-16 00:05:52,784 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:05:52,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2511 states. [2019-11-16 00:05:52,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2511 to 2346. [2019-11-16 00:05:52,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2346 states. [2019-11-16 00:05:52,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2346 states to 2346 states and 5664 transitions. [2019-11-16 00:05:52,827 INFO L78 Accepts]: Start accepts. Automaton has 2346 states and 5664 transitions. Word has length 92 [2019-11-16 00:05:52,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:52,827 INFO L462 AbstractCegarLoop]: Abstraction has 2346 states and 5664 transitions. [2019-11-16 00:05:52,827 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:05:52,827 INFO L276 IsEmpty]: Start isEmpty. Operand 2346 states and 5664 transitions. [2019-11-16 00:05:52,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-16 00:05:52,831 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:52,831 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:52,832 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:52,833 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:52,833 INFO L82 PathProgramCache]: Analyzing trace with hash -803167344, now seen corresponding path program 1 times [2019-11-16 00:05:52,833 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:52,833 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101656515] [2019-11-16 00:05:52,833 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:52,834 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:52,834 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:52,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:53,015 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:53,016 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1101656515] [2019-11-16 00:05:53,016 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:53,016 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:05:53,016 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1534853403] [2019-11-16 00:05:53,017 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:05:53,017 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:53,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:05:53,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:05:53,018 INFO L87 Difference]: Start difference. First operand 2346 states and 5664 transitions. Second operand 6 states. [2019-11-16 00:05:53,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:53,401 INFO L93 Difference]: Finished difference Result 2468 states and 5879 transitions. [2019-11-16 00:05:53,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:05:53,402 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2019-11-16 00:05:53,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:53,404 INFO L225 Difference]: With dead ends: 2468 [2019-11-16 00:05:53,405 INFO L226 Difference]: Without dead ends: 2432 [2019-11-16 00:05:53,405 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:05:53,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2432 states. [2019-11-16 00:05:53,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2432 to 2408. [2019-11-16 00:05:53,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2408 states. [2019-11-16 00:05:53,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2408 states to 2408 states and 5773 transitions. [2019-11-16 00:05:53,438 INFO L78 Accepts]: Start accepts. Automaton has 2408 states and 5773 transitions. Word has length 92 [2019-11-16 00:05:53,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:53,438 INFO L462 AbstractCegarLoop]: Abstraction has 2408 states and 5773 transitions. [2019-11-16 00:05:53,438 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:05:53,439 INFO L276 IsEmpty]: Start isEmpty. Operand 2408 states and 5773 transitions. [2019-11-16 00:05:53,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-16 00:05:53,441 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:53,441 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:53,442 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:53,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:53,442 INFO L82 PathProgramCache]: Analyzing trace with hash 1470343021, now seen corresponding path program 1 times [2019-11-16 00:05:53,442 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:53,443 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [676131377] [2019-11-16 00:05:53,443 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:53,443 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:53,443 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:53,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:53,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:53,566 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [676131377] [2019-11-16 00:05:53,566 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:53,566 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:05:53,566 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [775109555] [2019-11-16 00:05:53,567 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:05:53,567 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:53,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:05:53,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:05:53,568 INFO L87 Difference]: Start difference. First operand 2408 states and 5773 transitions. Second operand 7 states. [2019-11-16 00:05:54,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:54,126 INFO L93 Difference]: Finished difference Result 3427 states and 8067 transitions. [2019-11-16 00:05:54,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-16 00:05:54,126 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 92 [2019-11-16 00:05:54,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:54,130 INFO L225 Difference]: With dead ends: 3427 [2019-11-16 00:05:54,130 INFO L226 Difference]: Without dead ends: 3409 [2019-11-16 00:05:54,131 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2019-11-16 00:05:54,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3409 states. [2019-11-16 00:05:54,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3409 to 3057. [2019-11-16 00:05:54,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3057 states. [2019-11-16 00:05:54,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3057 states to 3057 states and 7219 transitions. [2019-11-16 00:05:54,174 INFO L78 Accepts]: Start accepts. Automaton has 3057 states and 7219 transitions. Word has length 92 [2019-11-16 00:05:54,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:54,174 INFO L462 AbstractCegarLoop]: Abstraction has 3057 states and 7219 transitions. [2019-11-16 00:05:54,174 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:05:54,175 INFO L276 IsEmpty]: Start isEmpty. Operand 3057 states and 7219 transitions. [2019-11-16 00:05:54,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-16 00:05:54,178 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:54,178 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:54,178 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:54,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:54,179 INFO L82 PathProgramCache]: Analyzing trace with hash -1863010258, now seen corresponding path program 1 times [2019-11-16 00:05:54,179 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:54,179 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [698169258] [2019-11-16 00:05:54,179 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:54,179 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:54,180 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:54,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:54,275 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:54,275 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [698169258] [2019-11-16 00:05:54,275 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:54,276 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:05:54,276 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [902057538] [2019-11-16 00:05:54,277 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:05:54,277 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:54,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:05:54,277 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:05:54,278 INFO L87 Difference]: Start difference. First operand 3057 states and 7219 transitions. Second operand 7 states. [2019-11-16 00:05:54,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:54,710 INFO L93 Difference]: Finished difference Result 4092 states and 9580 transitions. [2019-11-16 00:05:54,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:05:54,711 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 92 [2019-11-16 00:05:54,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:54,715 INFO L225 Difference]: With dead ends: 4092 [2019-11-16 00:05:54,715 INFO L226 Difference]: Without dead ends: 4092 [2019-11-16 00:05:54,716 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2019-11-16 00:05:54,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4092 states. [2019-11-16 00:05:54,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4092 to 3307. [2019-11-16 00:05:54,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3307 states. [2019-11-16 00:05:54,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3307 states to 3307 states and 7822 transitions. [2019-11-16 00:05:54,765 INFO L78 Accepts]: Start accepts. Automaton has 3307 states and 7822 transitions. Word has length 92 [2019-11-16 00:05:54,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:54,765 INFO L462 AbstractCegarLoop]: Abstraction has 3307 states and 7822 transitions. [2019-11-16 00:05:54,765 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:05:54,766 INFO L276 IsEmpty]: Start isEmpty. Operand 3307 states and 7822 transitions. [2019-11-16 00:05:54,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-16 00:05:54,769 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:54,770 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:54,770 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:54,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:54,770 INFO L82 PathProgramCache]: Analyzing trace with hash -618245777, now seen corresponding path program 1 times [2019-11-16 00:05:54,771 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:54,771 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [817138356] [2019-11-16 00:05:54,771 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:54,771 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:54,771 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:54,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:54,894 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:54,894 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [817138356] [2019-11-16 00:05:54,894 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:54,894 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:05:54,895 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1563661866] [2019-11-16 00:05:54,895 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:05:54,895 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:54,896 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:05:54,896 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:05:54,896 INFO L87 Difference]: Start difference. First operand 3307 states and 7822 transitions. Second operand 5 states. [2019-11-16 00:05:54,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:54,939 INFO L93 Difference]: Finished difference Result 4812 states and 11551 transitions. [2019-11-16 00:05:54,939 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-16 00:05:54,940 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 92 [2019-11-16 00:05:54,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:54,946 INFO L225 Difference]: With dead ends: 4812 [2019-11-16 00:05:54,946 INFO L226 Difference]: Without dead ends: 4812 [2019-11-16 00:05:54,946 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:05:54,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4812 states. [2019-11-16 00:05:55,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4812 to 3057. [2019-11-16 00:05:55,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3057 states. [2019-11-16 00:05:55,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3057 states to 3057 states and 7111 transitions. [2019-11-16 00:05:55,010 INFO L78 Accepts]: Start accepts. Automaton has 3057 states and 7111 transitions. Word has length 92 [2019-11-16 00:05:55,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:55,010 INFO L462 AbstractCegarLoop]: Abstraction has 3057 states and 7111 transitions. [2019-11-16 00:05:55,010 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:05:55,011 INFO L276 IsEmpty]: Start isEmpty. Operand 3057 states and 7111 transitions. [2019-11-16 00:05:55,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-11-16 00:05:55,014 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:55,015 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:55,015 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:55,015 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:55,015 INFO L82 PathProgramCache]: Analyzing trace with hash -137529361, now seen corresponding path program 1 times [2019-11-16 00:05:55,016 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:55,016 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1124895375] [2019-11-16 00:05:55,016 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:55,016 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:55,017 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:55,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:55,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:55,163 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1124895375] [2019-11-16 00:05:55,163 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:55,163 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:05:55,164 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78153172] [2019-11-16 00:05:55,164 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:05:55,164 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:55,164 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:05:55,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:05:55,165 INFO L87 Difference]: Start difference. First operand 3057 states and 7111 transitions. Second operand 6 states. [2019-11-16 00:05:55,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:55,373 INFO L93 Difference]: Finished difference Result 2805 states and 6379 transitions. [2019-11-16 00:05:55,373 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-16 00:05:55,373 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2019-11-16 00:05:55,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:55,376 INFO L225 Difference]: With dead ends: 2805 [2019-11-16 00:05:55,376 INFO L226 Difference]: Without dead ends: 2805 [2019-11-16 00:05:55,376 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:05:55,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2805 states. [2019-11-16 00:05:55,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2805 to 1988. [2019-11-16 00:05:55,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1988 states. [2019-11-16 00:05:55,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1988 states to 1988 states and 4664 transitions. [2019-11-16 00:05:55,396 INFO L78 Accepts]: Start accepts. Automaton has 1988 states and 4664 transitions. Word has length 92 [2019-11-16 00:05:55,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:55,397 INFO L462 AbstractCegarLoop]: Abstraction has 1988 states and 4664 transitions. [2019-11-16 00:05:55,397 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:05:55,397 INFO L276 IsEmpty]: Start isEmpty. Operand 1988 states and 4664 transitions. [2019-11-16 00:05:55,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:05:55,398 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:55,399 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:55,399 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:55,399 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:55,399 INFO L82 PathProgramCache]: Analyzing trace with hash 364003198, now seen corresponding path program 1 times [2019-11-16 00:05:55,400 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:55,400 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1021809203] [2019-11-16 00:05:55,400 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:55,400 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:55,400 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:55,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:55,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:55,494 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1021809203] [2019-11-16 00:05:55,494 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:55,494 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:05:55,494 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2074967085] [2019-11-16 00:05:55,495 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:05:55,495 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:55,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:05:55,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:05:55,496 INFO L87 Difference]: Start difference. First operand 1988 states and 4664 transitions. Second operand 6 states. [2019-11-16 00:05:55,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:55,717 INFO L93 Difference]: Finished difference Result 2172 states and 5043 transitions. [2019-11-16 00:05:55,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-16 00:05:55,718 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-16 00:05:55,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:55,720 INFO L225 Difference]: With dead ends: 2172 [2019-11-16 00:05:55,720 INFO L226 Difference]: Without dead ends: 2172 [2019-11-16 00:05:55,720 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:05:55,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2172 states. [2019-11-16 00:05:55,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2172 to 1970. [2019-11-16 00:05:55,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1970 states. [2019-11-16 00:05:55,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1970 states to 1970 states and 4628 transitions. [2019-11-16 00:05:55,741 INFO L78 Accepts]: Start accepts. Automaton has 1970 states and 4628 transitions. Word has length 94 [2019-11-16 00:05:55,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:55,741 INFO L462 AbstractCegarLoop]: Abstraction has 1970 states and 4628 transitions. [2019-11-16 00:05:55,741 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:05:55,741 INFO L276 IsEmpty]: Start isEmpty. Operand 1970 states and 4628 transitions. [2019-11-16 00:05:55,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:05:55,743 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:55,744 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:55,744 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:55,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:55,744 INFO L82 PathProgramCache]: Analyzing trace with hash 408257663, now seen corresponding path program 1 times [2019-11-16 00:05:55,745 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:55,745 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [112662089] [2019-11-16 00:05:55,745 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:55,745 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:55,745 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:55,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:55,842 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:55,843 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [112662089] [2019-11-16 00:05:55,843 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:55,843 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:05:55,843 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [785990693] [2019-11-16 00:05:55,844 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:05:55,844 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:55,844 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:05:55,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:05:55,845 INFO L87 Difference]: Start difference. First operand 1970 states and 4628 transitions. Second operand 5 states. [2019-11-16 00:05:56,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:56,068 INFO L93 Difference]: Finished difference Result 2222 states and 5207 transitions. [2019-11-16 00:05:56,068 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-16 00:05:56,068 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-11-16 00:05:56,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:56,071 INFO L225 Difference]: With dead ends: 2222 [2019-11-16 00:05:56,071 INFO L226 Difference]: Without dead ends: 2204 [2019-11-16 00:05:56,072 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:05:56,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2204 states. [2019-11-16 00:05:56,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2204 to 1997. [2019-11-16 00:05:56,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1997 states. [2019-11-16 00:05:56,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1997 states to 1997 states and 4682 transitions. [2019-11-16 00:05:56,100 INFO L78 Accepts]: Start accepts. Automaton has 1997 states and 4682 transitions. Word has length 94 [2019-11-16 00:05:56,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:56,100 INFO L462 AbstractCegarLoop]: Abstraction has 1997 states and 4682 transitions. [2019-11-16 00:05:56,100 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:05:56,101 INFO L276 IsEmpty]: Start isEmpty. Operand 1997 states and 4682 transitions. [2019-11-16 00:05:56,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:05:56,103 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:56,103 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:56,103 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:56,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:56,104 INFO L82 PathProgramCache]: Analyzing trace with hash 1653022144, now seen corresponding path program 1 times [2019-11-16 00:05:56,104 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:56,104 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [259403097] [2019-11-16 00:05:56,104 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:56,105 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:56,105 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:56,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:56,235 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:56,235 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [259403097] [2019-11-16 00:05:56,236 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:56,236 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:05:56,236 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1618838830] [2019-11-16 00:05:56,236 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:05:56,237 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:56,237 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:05:56,237 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:05:56,237 INFO L87 Difference]: Start difference. First operand 1997 states and 4682 transitions. Second operand 7 states. [2019-11-16 00:05:56,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:56,346 INFO L93 Difference]: Finished difference Result 3264 states and 7761 transitions. [2019-11-16 00:05:56,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-16 00:05:56,346 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-11-16 00:05:56,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:56,349 INFO L225 Difference]: With dead ends: 3264 [2019-11-16 00:05:56,349 INFO L226 Difference]: Without dead ends: 1346 [2019-11-16 00:05:56,349 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-11-16 00:05:56,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1346 states. [2019-11-16 00:05:56,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1346 to 1346. [2019-11-16 00:05:56,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1346 states. [2019-11-16 00:05:56,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1346 states to 1346 states and 3209 transitions. [2019-11-16 00:05:56,370 INFO L78 Accepts]: Start accepts. Automaton has 1346 states and 3209 transitions. Word has length 94 [2019-11-16 00:05:56,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:56,370 INFO L462 AbstractCegarLoop]: Abstraction has 1346 states and 3209 transitions. [2019-11-16 00:05:56,370 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:05:56,370 INFO L276 IsEmpty]: Start isEmpty. Operand 1346 states and 3209 transitions. [2019-11-16 00:05:56,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:05:56,372 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:56,372 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:56,373 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:56,373 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:56,373 INFO L82 PathProgramCache]: Analyzing trace with hash 1995104468, now seen corresponding path program 2 times [2019-11-16 00:05:56,374 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:56,376 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1967536864] [2019-11-16 00:05:56,376 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:56,376 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:56,376 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:56,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:05:56,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:05:56,586 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1967536864] [2019-11-16 00:05:56,587 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:05:56,587 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-16 00:05:56,587 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2031142988] [2019-11-16 00:05:56,588 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-16 00:05:56,588 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:05:56,588 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-16 00:05:56,589 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2019-11-16 00:05:56,589 INFO L87 Difference]: Start difference. First operand 1346 states and 3209 transitions. Second operand 12 states. [2019-11-16 00:05:56,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:05:56,888 INFO L93 Difference]: Finished difference Result 2515 states and 6074 transitions. [2019-11-16 00:05:56,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-16 00:05:56,889 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 94 [2019-11-16 00:05:56,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:05:56,891 INFO L225 Difference]: With dead ends: 2515 [2019-11-16 00:05:56,891 INFO L226 Difference]: Without dead ends: 1876 [2019-11-16 00:05:56,892 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2019-11-16 00:05:56,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1876 states. [2019-11-16 00:05:56,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1876 to 1764. [2019-11-16 00:05:56,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1764 states. [2019-11-16 00:05:56,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1764 states to 1764 states and 4126 transitions. [2019-11-16 00:05:56,919 INFO L78 Accepts]: Start accepts. Automaton has 1764 states and 4126 transitions. Word has length 94 [2019-11-16 00:05:56,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:05:56,919 INFO L462 AbstractCegarLoop]: Abstraction has 1764 states and 4126 transitions. [2019-11-16 00:05:56,919 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-16 00:05:56,920 INFO L276 IsEmpty]: Start isEmpty. Operand 1764 states and 4126 transitions. [2019-11-16 00:05:56,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:05:56,922 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:05:56,922 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:05:56,922 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:05:56,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:05:56,923 INFO L82 PathProgramCache]: Analyzing trace with hash 1481457402, now seen corresponding path program 3 times [2019-11-16 00:05:56,923 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:05:56,923 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1856571015] [2019-11-16 00:05:56,923 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:56,924 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:05:56,924 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:05:56,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-16 00:05:56,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-16 00:05:57,048 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-16 00:05:57,048 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-16 00:05:57,227 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-16 00:05:57,236 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.11 12:05:57 BasicIcfg [2019-11-16 00:05:57,236 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-16 00:05:57,237 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-16 00:05:57,237 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-16 00:05:57,237 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-16 00:05:57,237 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:05:12" (3/4) ... [2019-11-16 00:05:57,245 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-16 00:05:57,395 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_124dc473-0c2a-43db-a218-9fd7ddfb4a56/bin/uautomizer/witness.graphml [2019-11-16 00:05:57,395 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-16 00:05:57,398 INFO L168 Benchmark]: Toolchain (without parser) took 46367.87 ms. Allocated memory was 1.0 GB in the beginning and 4.4 GB in the end (delta: 3.4 GB). Free memory was 944.7 MB in the beginning and 2.9 GB in the end (delta: -1.9 GB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. [2019-11-16 00:05:57,398 INFO L168 Benchmark]: CDTParser took 0.33 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-16 00:05:57,399 INFO L168 Benchmark]: CACSL2BoogieTranslator took 794.37 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 156.2 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -174.0 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-11-16 00:05:57,399 INFO L168 Benchmark]: Boogie Procedure Inliner took 92.88 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2019-11-16 00:05:57,400 INFO L168 Benchmark]: Boogie Preprocessor took 74.60 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-16 00:05:57,400 INFO L168 Benchmark]: RCFGBuilder took 909.50 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 48.2 MB). Peak memory consumption was 48.2 MB. Max. memory is 11.5 GB. [2019-11-16 00:05:57,401 INFO L168 Benchmark]: TraceAbstraction took 44329.06 ms. Allocated memory was 1.2 GB in the beginning and 4.4 GB in the end (delta: 3.2 GB). Free memory was 1.1 GB in the beginning and 2.9 GB in the end (delta: -1.8 GB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. [2019-11-16 00:05:57,402 INFO L168 Benchmark]: Witness Printer took 158.95 ms. Allocated memory is still 4.4 GB. Free memory was 2.9 GB in the beginning and 2.9 GB in the end (delta: 19.8 MB). Peak memory consumption was 19.8 MB. Max. memory is 11.5 GB. [2019-11-16 00:05:57,404 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.33 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 794.37 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 156.2 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -174.0 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 92.88 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 74.60 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 909.50 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 48.2 MB). Peak memory consumption was 48.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 44329.06 ms. Allocated memory was 1.2 GB in the beginning and 4.4 GB in the end (delta: 3.2 GB). Free memory was 1.1 GB in the beginning and 2.9 GB in the end (delta: -1.8 GB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. * Witness Printer took 158.95 ms. Allocated memory is still 4.4 GB. Free memory was 2.9 GB in the beginning and 2.9 GB in the end (delta: 19.8 MB). Peak memory consumption was 19.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L697] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L698] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L700] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L701] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L702] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L703] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L704] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L705] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L706] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L707] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L708] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L709] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L710] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L711] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L712] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L713] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L714] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L716] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L717] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L718] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L778] 0 pthread_t t1455; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L779] FCALL, FORK 0 pthread_create(&t1455, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L780] 0 pthread_t t1456; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L781] FCALL, FORK 0 pthread_create(&t1456, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L742] 2 x$w_buff1 = x$w_buff0 [L743] 2 x$w_buff0 = 2 [L744] 2 x$w_buff1_used = x$w_buff0_used [L745] 2 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L747] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L748] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L749] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L750] 2 x$r_buff0_thd2 = (_Bool)1 [L753] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L756] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L722] 1 y = 1 [L725] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L756] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L757] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=1] [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=2, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=1] [L757] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L758] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=2, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=1] [L758] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L759] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=2, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=1] [L759] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L760] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=2, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=1] [L760] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L763] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=2, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=1] [L728] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L729] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L729] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L730] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L730] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L731] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L731] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L732] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L735] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L783] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L788] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L788] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L789] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L789] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L790] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L790] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L791] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L791] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 x$flush_delayed = weak$$choice2 [L797] 0 x$mem_tmp = x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L799] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L799] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L800] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L800] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L801] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L801] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L802] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 0 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L803] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L804] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L804] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L806] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L806] 0 x = x$flush_delayed ? x$mem_tmp : x [L807] 0 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 175 locations, 3 error locations. Result: UNSAFE, OverallTime: 44.1s, OverallIterations: 33, TraceHistogramMax: 1, AutomataDifference: 21.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8106 SDtfs, 8651 SDslu, 20362 SDs, 0 SdLazy, 8801 SolverSat, 525 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 370 GetRequests, 98 SyntacticMatches, 12 SemanticMatches, 260 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 518 ImplicationChecksByTransitivity, 3.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=66313occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 16.3s AutomataMinimizationTime, 32 MinimizatonAttempts, 123429 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.7s InterpolantComputationTime, 2557 NumberOfCodeBlocks, 2557 NumberOfCodeBlocksAsserted, 33 NumberOfCheckSat, 2431 ConstructedInterpolants, 0 QuantifiedInterpolants, 488127 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 32 InterpolantComputations, 32 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...