./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded-reduced/pals_floodmax.3.2.ufo.UNBOUNDED.pals.c.v+nlh-reducer.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_e0568d53-fe6c-4eb3-b069-3509cedafff4/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_e0568d53-fe6c-4eb3-b069-3509cedafff4/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_e0568d53-fe6c-4eb3-b069-3509cedafff4/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_e0568d53-fe6c-4eb3-b069-3509cedafff4/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded-reduced/pals_floodmax.3.2.ufo.UNBOUNDED.pals.c.v+nlh-reducer.c -s /tmp/vcloud-vcloud-master/worker/run_dir_e0568d53-fe6c-4eb3-b069-3509cedafff4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_e0568d53-fe6c-4eb3-b069-3509cedafff4/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e3a9fbf61771579e3e5f979c3029cdc28b5b93f1 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 23:33:59,271 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 23:33:59,273 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 23:33:59,288 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 23:33:59,289 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 23:33:59,290 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 23:33:59,292 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 23:33:59,301 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 23:33:59,305 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 23:33:59,309 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 23:33:59,310 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 23:33:59,312 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 23:33:59,312 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 23:33:59,314 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 23:33:59,315 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 23:33:59,316 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 23:33:59,317 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 23:33:59,318 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 23:33:59,320 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 23:33:59,323 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 23:33:59,324 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 23:33:59,325 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 23:33:59,326 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 23:33:59,326 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 23:33:59,328 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 23:33:59,328 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 23:33:59,328 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 23:33:59,329 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 23:33:59,329 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 23:33:59,330 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 23:33:59,330 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 23:33:59,331 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 23:33:59,331 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 23:33:59,332 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 23:33:59,333 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 23:33:59,333 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 23:33:59,334 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 23:33:59,334 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 23:33:59,334 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 23:33:59,335 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 23:33:59,335 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 23:33:59,337 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_e0568d53-fe6c-4eb3-b069-3509cedafff4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 23:33:59,361 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 23:33:59,371 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 23:33:59,372 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 23:33:59,373 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 23:33:59,373 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 23:33:59,373 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 23:33:59,373 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 23:33:59,374 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 23:33:59,374 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 23:33:59,374 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 23:33:59,374 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 23:33:59,375 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 23:33:59,375 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 23:33:59,375 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 23:33:59,375 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 23:33:59,376 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 23:33:59,376 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 23:33:59,376 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 23:33:59,376 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 23:33:59,377 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 23:33:59,377 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 23:33:59,377 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 23:33:59,378 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 23:33:59,379 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 23:33:59,379 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 23:33:59,379 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 23:33:59,380 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 23:33:59,380 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 23:33:59,380 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_e0568d53-fe6c-4eb3-b069-3509cedafff4/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e3a9fbf61771579e3e5f979c3029cdc28b5b93f1 [2019-11-15 23:33:59,406 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 23:33:59,415 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 23:33:59,426 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 23:33:59,428 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 23:33:59,428 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 23:33:59,429 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_e0568d53-fe6c-4eb3-b069-3509cedafff4/bin/uautomizer/../../sv-benchmarks/c/seq-mthreaded-reduced/pals_floodmax.3.2.ufo.UNBOUNDED.pals.c.v+nlh-reducer.c [2019-11-15 23:33:59,484 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e0568d53-fe6c-4eb3-b069-3509cedafff4/bin/uautomizer/data/21b837706/a1f2a4d3bc4346d4bd6ec0b3489843c1/FLAGa03fa3671 [2019-11-15 23:33:59,915 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 23:33:59,915 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_e0568d53-fe6c-4eb3-b069-3509cedafff4/sv-benchmarks/c/seq-mthreaded-reduced/pals_floodmax.3.2.ufo.UNBOUNDED.pals.c.v+nlh-reducer.c [2019-11-15 23:33:59,928 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e0568d53-fe6c-4eb3-b069-3509cedafff4/bin/uautomizer/data/21b837706/a1f2a4d3bc4346d4bd6ec0b3489843c1/FLAGa03fa3671 [2019-11-15 23:34:00,283 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_e0568d53-fe6c-4eb3-b069-3509cedafff4/bin/uautomizer/data/21b837706/a1f2a4d3bc4346d4bd6ec0b3489843c1 [2019-11-15 23:34:00,289 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 23:34:00,290 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 23:34:00,293 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 23:34:00,294 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 23:34:00,297 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 23:34:00,298 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 11:34:00" (1/1) ... [2019-11-15 23:34:00,301 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@10b1ba46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:34:00, skipping insertion in model container [2019-11-15 23:34:00,302 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 11:34:00" (1/1) ... [2019-11-15 23:34:00,309 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 23:34:00,378 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 23:34:00,751 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 23:34:00,772 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 23:34:00,878 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 23:34:00,896 INFO L192 MainTranslator]: Completed translation [2019-11-15 23:34:00,896 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:34:00 WrapperNode [2019-11-15 23:34:00,897 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 23:34:00,897 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 23:34:00,897 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 23:34:00,898 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 23:34:00,906 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:34:00" (1/1) ... [2019-11-15 23:34:00,919 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:34:00" (1/1) ... [2019-11-15 23:34:00,959 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 23:34:00,960 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 23:34:00,960 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 23:34:00,960 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 23:34:00,969 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:34:00" (1/1) ... [2019-11-15 23:34:00,969 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:34:00" (1/1) ... [2019-11-15 23:34:00,974 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:34:00" (1/1) ... [2019-11-15 23:34:00,974 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:34:00" (1/1) ... [2019-11-15 23:34:00,986 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:34:00" (1/1) ... [2019-11-15 23:34:01,000 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:34:00" (1/1) ... [2019-11-15 23:34:01,004 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:34:00" (1/1) ... [2019-11-15 23:34:01,010 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 23:34:01,011 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 23:34:01,011 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 23:34:01,011 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 23:34:01,015 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:34:00" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_e0568d53-fe6c-4eb3-b069-3509cedafff4/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 23:34:01,094 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 23:34:01,095 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 23:34:02,240 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 23:34:02,241 INFO L284 CfgBuilder]: Removed 4 assume(true) statements. [2019-11-15 23:34:02,242 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 11:34:02 BoogieIcfgContainer [2019-11-15 23:34:02,243 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 23:34:02,243 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 23:34:02,243 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 23:34:02,246 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 23:34:02,246 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 11:34:00" (1/3) ... [2019-11-15 23:34:02,247 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@115d51fd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 11:34:02, skipping insertion in model container [2019-11-15 23:34:02,247 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:34:00" (2/3) ... [2019-11-15 23:34:02,247 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@115d51fd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 11:34:02, skipping insertion in model container [2019-11-15 23:34:02,248 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 11:34:02" (3/3) ... [2019-11-15 23:34:02,250 INFO L109 eAbstractionObserver]: Analyzing ICFG pals_floodmax.3.2.ufo.UNBOUNDED.pals.c.v+nlh-reducer.c [2019-11-15 23:34:02,258 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 23:34:02,266 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-11-15 23:34:02,276 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-11-15 23:34:02,298 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 23:34:02,298 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 23:34:02,298 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 23:34:02,299 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 23:34:02,299 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 23:34:02,299 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 23:34:02,299 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 23:34:02,299 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 23:34:02,319 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states. [2019-11-15 23:34:02,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:34:02,329 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:02,330 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:02,332 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:02,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:02,337 INFO L82 PathProgramCache]: Analyzing trace with hash -1885524630, now seen corresponding path program 1 times [2019-11-15 23:34:02,345 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:02,346 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409069102] [2019-11-15 23:34:02,346 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:02,346 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:02,346 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:02,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:02,781 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:02,782 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1409069102] [2019-11-15 23:34:02,783 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:02,783 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:34:02,783 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1727528894] [2019-11-15 23:34:02,787 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:34:02,787 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:02,800 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:34:02,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:02,802 INFO L87 Difference]: Start difference. First operand 224 states. Second operand 3 states. [2019-11-15 23:34:02,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:02,963 INFO L93 Difference]: Finished difference Result 452 states and 785 transitions. [2019-11-15 23:34:02,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:34:02,965 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 95 [2019-11-15 23:34:02,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:02,980 INFO L225 Difference]: With dead ends: 452 [2019-11-15 23:34:02,980 INFO L226 Difference]: Without dead ends: 334 [2019-11-15 23:34:02,982 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:02,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 334 states. [2019-11-15 23:34:03,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 334 to 332. [2019-11-15 23:34:03,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 332 states. [2019-11-15 23:34:03,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 332 states to 332 states and 507 transitions. [2019-11-15 23:34:03,047 INFO L78 Accepts]: Start accepts. Automaton has 332 states and 507 transitions. Word has length 95 [2019-11-15 23:34:03,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:03,048 INFO L462 AbstractCegarLoop]: Abstraction has 332 states and 507 transitions. [2019-11-15 23:34:03,048 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:34:03,048 INFO L276 IsEmpty]: Start isEmpty. Operand 332 states and 507 transitions. [2019-11-15 23:34:03,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:34:03,053 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:03,053 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:03,053 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:03,054 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:03,054 INFO L82 PathProgramCache]: Analyzing trace with hash -614138391, now seen corresponding path program 1 times [2019-11-15 23:34:03,054 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:03,054 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1905899193] [2019-11-15 23:34:03,055 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:03,055 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:03,055 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:03,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:03,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:03,384 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1905899193] [2019-11-15 23:34:03,384 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:03,384 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:34:03,385 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1428432110] [2019-11-15 23:34:03,386 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:34:03,386 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:03,387 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:34:03,387 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:34:03,387 INFO L87 Difference]: Start difference. First operand 332 states and 507 transitions. Second operand 4 states. [2019-11-15 23:34:03,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:03,533 INFO L93 Difference]: Finished difference Result 965 states and 1470 transitions. [2019-11-15 23:34:03,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:34:03,534 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2019-11-15 23:34:03,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:03,542 INFO L225 Difference]: With dead ends: 965 [2019-11-15 23:34:03,542 INFO L226 Difference]: Without dead ends: 642 [2019-11-15 23:34:03,548 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:34:03,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 642 states. [2019-11-15 23:34:03,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 642 to 640. [2019-11-15 23:34:03,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 640 states. [2019-11-15 23:34:03,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 640 states to 640 states and 968 transitions. [2019-11-15 23:34:03,613 INFO L78 Accepts]: Start accepts. Automaton has 640 states and 968 transitions. Word has length 95 [2019-11-15 23:34:03,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:03,613 INFO L462 AbstractCegarLoop]: Abstraction has 640 states and 968 transitions. [2019-11-15 23:34:03,613 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:34:03,614 INFO L276 IsEmpty]: Start isEmpty. Operand 640 states and 968 transitions. [2019-11-15 23:34:03,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 23:34:03,618 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:03,618 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:03,618 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:03,618 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:03,619 INFO L82 PathProgramCache]: Analyzing trace with hash -779319531, now seen corresponding path program 1 times [2019-11-15 23:34:03,619 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:03,619 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [895811197] [2019-11-15 23:34:03,619 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:03,619 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:03,620 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:03,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:03,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:03,720 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [895811197] [2019-11-15 23:34:03,721 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:03,721 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:34:03,721 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2061103645] [2019-11-15 23:34:03,723 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:34:03,724 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:03,724 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:34:03,725 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:03,728 INFO L87 Difference]: Start difference. First operand 640 states and 968 transitions. Second operand 3 states. [2019-11-15 23:34:03,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:03,816 INFO L93 Difference]: Finished difference Result 1882 states and 2842 transitions. [2019-11-15 23:34:03,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:34:03,816 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 96 [2019-11-15 23:34:03,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:03,825 INFO L225 Difference]: With dead ends: 1882 [2019-11-15 23:34:03,826 INFO L226 Difference]: Without dead ends: 1270 [2019-11-15 23:34:03,827 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:03,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1270 states. [2019-11-15 23:34:03,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1270 to 642. [2019-11-15 23:34:03,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 642 states. [2019-11-15 23:34:03,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 642 states to 642 states and 970 transitions. [2019-11-15 23:34:03,885 INFO L78 Accepts]: Start accepts. Automaton has 642 states and 970 transitions. Word has length 96 [2019-11-15 23:34:03,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:03,885 INFO L462 AbstractCegarLoop]: Abstraction has 642 states and 970 transitions. [2019-11-15 23:34:03,885 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:34:03,885 INFO L276 IsEmpty]: Start isEmpty. Operand 642 states and 970 transitions. [2019-11-15 23:34:03,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2019-11-15 23:34:03,888 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:03,888 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:03,888 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:03,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:03,889 INFO L82 PathProgramCache]: Analyzing trace with hash -611891448, now seen corresponding path program 1 times [2019-11-15 23:34:03,889 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:03,889 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [369328276] [2019-11-15 23:34:03,889 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:03,889 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:03,890 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:03,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:04,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:04,095 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [369328276] [2019-11-15 23:34:04,095 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:04,095 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:34:04,095 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1211958469] [2019-11-15 23:34:04,096 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:34:04,096 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:04,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:34:04,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:34:04,097 INFO L87 Difference]: Start difference. First operand 642 states and 970 transitions. Second operand 4 states. [2019-11-15 23:34:04,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:04,157 INFO L93 Difference]: Finished difference Result 1274 states and 1926 transitions. [2019-11-15 23:34:04,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:34:04,158 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 97 [2019-11-15 23:34:04,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:04,162 INFO L225 Difference]: With dead ends: 1274 [2019-11-15 23:34:04,162 INFO L226 Difference]: Without dead ends: 640 [2019-11-15 23:34:04,163 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:34:04,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 640 states. [2019-11-15 23:34:04,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 640 to 640. [2019-11-15 23:34:04,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 640 states. [2019-11-15 23:34:04,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 640 states to 640 states and 966 transitions. [2019-11-15 23:34:04,196 INFO L78 Accepts]: Start accepts. Automaton has 640 states and 966 transitions. Word has length 97 [2019-11-15 23:34:04,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:04,196 INFO L462 AbstractCegarLoop]: Abstraction has 640 states and 966 transitions. [2019-11-15 23:34:04,196 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:34:04,196 INFO L276 IsEmpty]: Start isEmpty. Operand 640 states and 966 transitions. [2019-11-15 23:34:04,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2019-11-15 23:34:04,198 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:04,198 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:04,199 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:04,199 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:04,199 INFO L82 PathProgramCache]: Analyzing trace with hash -981864435, now seen corresponding path program 1 times [2019-11-15 23:34:04,199 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:04,199 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1118064710] [2019-11-15 23:34:04,199 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:04,200 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:04,200 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:04,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:04,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:04,268 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1118064710] [2019-11-15 23:34:04,268 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:04,268 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:34:04,268 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1952023841] [2019-11-15 23:34:04,269 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:34:04,269 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:04,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:34:04,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:04,270 INFO L87 Difference]: Start difference. First operand 640 states and 966 transitions. Second operand 3 states. [2019-11-15 23:34:04,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:04,343 INFO L93 Difference]: Finished difference Result 1414 states and 2157 transitions. [2019-11-15 23:34:04,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:34:04,343 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 97 [2019-11-15 23:34:04,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:04,349 INFO L225 Difference]: With dead ends: 1414 [2019-11-15 23:34:04,349 INFO L226 Difference]: Without dead ends: 948 [2019-11-15 23:34:04,350 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:04,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 948 states. [2019-11-15 23:34:04,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 948 to 946. [2019-11-15 23:34:04,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 946 states. [2019-11-15 23:34:04,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 946 states to 946 states and 1411 transitions. [2019-11-15 23:34:04,407 INFO L78 Accepts]: Start accepts. Automaton has 946 states and 1411 transitions. Word has length 97 [2019-11-15 23:34:04,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:04,408 INFO L462 AbstractCegarLoop]: Abstraction has 946 states and 1411 transitions. [2019-11-15 23:34:04,408 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:34:04,409 INFO L276 IsEmpty]: Start isEmpty. Operand 946 states and 1411 transitions. [2019-11-15 23:34:04,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2019-11-15 23:34:04,410 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:04,411 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:04,411 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:04,411 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:04,412 INFO L82 PathProgramCache]: Analyzing trace with hash -83426502, now seen corresponding path program 1 times [2019-11-15 23:34:04,412 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:04,412 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1111581135] [2019-11-15 23:34:04,412 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:04,412 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:04,412 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:04,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:04,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:04,560 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1111581135] [2019-11-15 23:34:04,561 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:04,561 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:34:04,561 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [878381987] [2019-11-15 23:34:04,561 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:34:04,562 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:04,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:34:04,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:34:04,562 INFO L87 Difference]: Start difference. First operand 946 states and 1411 transitions. Second operand 4 states. [2019-11-15 23:34:04,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:04,713 INFO L93 Difference]: Finished difference Result 2376 states and 3546 transitions. [2019-11-15 23:34:04,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:34:04,713 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 99 [2019-11-15 23:34:04,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:04,723 INFO L225 Difference]: With dead ends: 2376 [2019-11-15 23:34:04,723 INFO L226 Difference]: Without dead ends: 1449 [2019-11-15 23:34:04,725 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:34:04,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1449 states. [2019-11-15 23:34:04,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1449 to 1447. [2019-11-15 23:34:04,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1447 states. [2019-11-15 23:34:04,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1447 states to 1447 states and 2139 transitions. [2019-11-15 23:34:04,830 INFO L78 Accepts]: Start accepts. Automaton has 1447 states and 2139 transitions. Word has length 99 [2019-11-15 23:34:04,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:04,830 INFO L462 AbstractCegarLoop]: Abstraction has 1447 states and 2139 transitions. [2019-11-15 23:34:04,831 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:34:04,831 INFO L276 IsEmpty]: Start isEmpty. Operand 1447 states and 2139 transitions. [2019-11-15 23:34:04,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2019-11-15 23:34:04,833 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:04,833 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:04,833 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:04,834 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:04,835 INFO L82 PathProgramCache]: Analyzing trace with hash -1303974225, now seen corresponding path program 1 times [2019-11-15 23:34:04,835 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:04,835 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1959936489] [2019-11-15 23:34:04,836 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:04,836 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:04,836 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:04,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:04,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:04,974 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1959936489] [2019-11-15 23:34:04,974 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:04,974 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:34:04,974 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [694111383] [2019-11-15 23:34:04,975 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:34:04,975 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:04,975 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:34:04,975 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:34:04,975 INFO L87 Difference]: Start difference. First operand 1447 states and 2139 transitions. Second operand 4 states. [2019-11-15 23:34:05,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:05,086 INFO L93 Difference]: Finished difference Result 2507 states and 3725 transitions. [2019-11-15 23:34:05,086 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:34:05,086 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 101 [2019-11-15 23:34:05,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:05,095 INFO L225 Difference]: With dead ends: 2507 [2019-11-15 23:34:05,095 INFO L226 Difference]: Without dead ends: 1447 [2019-11-15 23:34:05,097 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:34:05,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1447 states. [2019-11-15 23:34:05,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1447 to 1447. [2019-11-15 23:34:05,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1447 states. [2019-11-15 23:34:05,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1447 states to 1447 states and 2138 transitions. [2019-11-15 23:34:05,183 INFO L78 Accepts]: Start accepts. Automaton has 1447 states and 2138 transitions. Word has length 101 [2019-11-15 23:34:05,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:05,184 INFO L462 AbstractCegarLoop]: Abstraction has 1447 states and 2138 transitions. [2019-11-15 23:34:05,184 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:34:05,184 INFO L276 IsEmpty]: Start isEmpty. Operand 1447 states and 2138 transitions. [2019-11-15 23:34:05,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2019-11-15 23:34:05,186 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:05,186 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:05,186 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:05,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:05,187 INFO L82 PathProgramCache]: Analyzing trace with hash 963915244, now seen corresponding path program 1 times [2019-11-15 23:34:05,187 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:05,187 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [379239843] [2019-11-15 23:34:05,187 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:05,187 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:05,188 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:05,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:05,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:05,246 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [379239843] [2019-11-15 23:34:05,247 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:05,247 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:34:05,247 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [992984417] [2019-11-15 23:34:05,247 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:34:05,248 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:05,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:34:05,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:05,248 INFO L87 Difference]: Start difference. First operand 1447 states and 2138 transitions. Second operand 3 states. [2019-11-15 23:34:05,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:05,387 INFO L93 Difference]: Finished difference Result 3304 states and 4953 transitions. [2019-11-15 23:34:05,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:34:05,387 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 101 [2019-11-15 23:34:05,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:05,399 INFO L225 Difference]: With dead ends: 3304 [2019-11-15 23:34:05,399 INFO L226 Difference]: Without dead ends: 2196 [2019-11-15 23:34:05,402 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:05,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2196 states. [2019-11-15 23:34:05,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2196 to 2194. [2019-11-15 23:34:05,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2194 states. [2019-11-15 23:34:05,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2194 states to 2194 states and 3218 transitions. [2019-11-15 23:34:05,528 INFO L78 Accepts]: Start accepts. Automaton has 2194 states and 3218 transitions. Word has length 101 [2019-11-15 23:34:05,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:05,529 INFO L462 AbstractCegarLoop]: Abstraction has 2194 states and 3218 transitions. [2019-11-15 23:34:05,529 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:34:05,529 INFO L276 IsEmpty]: Start isEmpty. Operand 2194 states and 3218 transitions. [2019-11-15 23:34:05,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2019-11-15 23:34:05,532 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:05,534 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:05,534 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:05,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:05,534 INFO L82 PathProgramCache]: Analyzing trace with hash -1817525050, now seen corresponding path program 1 times [2019-11-15 23:34:05,535 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:05,535 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2077640542] [2019-11-15 23:34:05,535 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:05,535 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:05,535 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:05,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:05,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:05,668 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2077640542] [2019-11-15 23:34:05,669 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:05,669 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:34:05,669 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1169752135] [2019-11-15 23:34:05,670 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:34:05,670 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:05,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:34:05,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:34:05,671 INFO L87 Difference]: Start difference. First operand 2194 states and 3218 transitions. Second operand 4 states. [2019-11-15 23:34:06,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:06,002 INFO L93 Difference]: Finished difference Result 6348 states and 9298 transitions. [2019-11-15 23:34:06,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:34:06,003 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 103 [2019-11-15 23:34:06,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:06,027 INFO L225 Difference]: With dead ends: 6348 [2019-11-15 23:34:06,027 INFO L226 Difference]: Without dead ends: 4193 [2019-11-15 23:34:06,030 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:34:06,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4193 states. [2019-11-15 23:34:06,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4193 to 4191. [2019-11-15 23:34:06,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4191 states. [2019-11-15 23:34:06,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4191 states to 4191 states and 6087 transitions. [2019-11-15 23:34:06,296 INFO L78 Accepts]: Start accepts. Automaton has 4191 states and 6087 transitions. Word has length 103 [2019-11-15 23:34:06,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:06,297 INFO L462 AbstractCegarLoop]: Abstraction has 4191 states and 6087 transitions. [2019-11-15 23:34:06,297 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:34:06,297 INFO L276 IsEmpty]: Start isEmpty. Operand 4191 states and 6087 transitions. [2019-11-15 23:34:06,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2019-11-15 23:34:06,302 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:06,302 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:06,302 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:06,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:06,303 INFO L82 PathProgramCache]: Analyzing trace with hash -399665424, now seen corresponding path program 1 times [2019-11-15 23:34:06,303 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:06,303 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2036838932] [2019-11-15 23:34:06,303 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:06,303 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:06,303 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:06,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:06,338 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:06,338 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2036838932] [2019-11-15 23:34:06,339 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:06,339 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:34:06,340 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1705117013] [2019-11-15 23:34:06,340 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:34:06,340 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:06,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:34:06,341 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:06,341 INFO L87 Difference]: Start difference. First operand 4191 states and 6087 transitions. Second operand 3 states. [2019-11-15 23:34:06,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:06,783 INFO L93 Difference]: Finished difference Result 12389 states and 18020 transitions. [2019-11-15 23:34:06,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:34:06,784 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 104 [2019-11-15 23:34:06,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:06,830 INFO L225 Difference]: With dead ends: 12389 [2019-11-15 23:34:06,830 INFO L226 Difference]: Without dead ends: 8299 [2019-11-15 23:34:06,839 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:06,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8299 states. [2019-11-15 23:34:07,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8299 to 4197. [2019-11-15 23:34:07,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4197 states. [2019-11-15 23:34:07,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4197 states to 4197 states and 6093 transitions. [2019-11-15 23:34:07,159 INFO L78 Accepts]: Start accepts. Automaton has 4197 states and 6093 transitions. Word has length 104 [2019-11-15 23:34:07,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:07,159 INFO L462 AbstractCegarLoop]: Abstraction has 4197 states and 6093 transitions. [2019-11-15 23:34:07,159 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:34:07,159 INFO L276 IsEmpty]: Start isEmpty. Operand 4197 states and 6093 transitions. [2019-11-15 23:34:07,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-11-15 23:34:07,164 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:07,164 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:07,164 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:07,165 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:07,165 INFO L82 PathProgramCache]: Analyzing trace with hash -789174747, now seen corresponding path program 1 times [2019-11-15 23:34:07,165 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:07,165 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1686408890] [2019-11-15 23:34:07,165 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:07,166 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:07,166 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:07,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:07,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:07,273 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1686408890] [2019-11-15 23:34:07,273 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:07,274 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:34:07,274 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [439924799] [2019-11-15 23:34:07,274 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:34:07,274 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:07,275 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:34:07,275 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:34:07,275 INFO L87 Difference]: Start difference. First operand 4197 states and 6093 transitions. Second operand 4 states. [2019-11-15 23:34:07,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:07,529 INFO L93 Difference]: Finished difference Result 8291 states and 12052 transitions. [2019-11-15 23:34:07,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:34:07,530 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 105 [2019-11-15 23:34:07,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:07,569 INFO L225 Difference]: With dead ends: 8291 [2019-11-15 23:34:07,570 INFO L226 Difference]: Without dead ends: 4197 [2019-11-15 23:34:07,576 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:34:07,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4197 states. [2019-11-15 23:34:07,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4197 to 4194. [2019-11-15 23:34:07,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4194 states. [2019-11-15 23:34:07,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4194 states to 4194 states and 6086 transitions. [2019-11-15 23:34:07,881 INFO L78 Accepts]: Start accepts. Automaton has 4194 states and 6086 transitions. Word has length 105 [2019-11-15 23:34:07,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:07,881 INFO L462 AbstractCegarLoop]: Abstraction has 4194 states and 6086 transitions. [2019-11-15 23:34:07,881 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:34:07,881 INFO L276 IsEmpty]: Start isEmpty. Operand 4194 states and 6086 transitions. [2019-11-15 23:34:07,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-11-15 23:34:07,887 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:07,887 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:07,887 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:07,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:07,888 INFO L82 PathProgramCache]: Analyzing trace with hash 1175492870, now seen corresponding path program 1 times [2019-11-15 23:34:07,888 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:07,888 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1227141356] [2019-11-15 23:34:07,888 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:07,889 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:07,889 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:07,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:08,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:08,031 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1227141356] [2019-11-15 23:34:08,032 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:08,032 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:34:08,032 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [984615683] [2019-11-15 23:34:08,033 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:34:08,033 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:08,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:34:08,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:08,035 INFO L87 Difference]: Start difference. First operand 4194 states and 6086 transitions. Second operand 3 states. [2019-11-15 23:34:08,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:08,440 INFO L93 Difference]: Finished difference Result 10897 states and 15856 transitions. [2019-11-15 23:34:08,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:34:08,440 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 105 [2019-11-15 23:34:08,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:08,456 INFO L225 Difference]: With dead ends: 10897 [2019-11-15 23:34:08,456 INFO L226 Difference]: Without dead ends: 7377 [2019-11-15 23:34:08,462 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:08,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7377 states. [2019-11-15 23:34:08,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7377 to 7375. [2019-11-15 23:34:08,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7375 states. [2019-11-15 23:34:08,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7375 states to 7375 states and 10504 transitions. [2019-11-15 23:34:08,900 INFO L78 Accepts]: Start accepts. Automaton has 7375 states and 10504 transitions. Word has length 105 [2019-11-15 23:34:08,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:08,901 INFO L462 AbstractCegarLoop]: Abstraction has 7375 states and 10504 transitions. [2019-11-15 23:34:08,901 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:34:08,901 INFO L276 IsEmpty]: Start isEmpty. Operand 7375 states and 10504 transitions. [2019-11-15 23:34:08,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-11-15 23:34:08,910 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:08,910 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:08,910 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:08,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:08,911 INFO L82 PathProgramCache]: Analyzing trace with hash -717867767, now seen corresponding path program 1 times [2019-11-15 23:34:08,911 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:08,911 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665552515] [2019-11-15 23:34:08,911 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:08,912 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:08,912 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:08,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:09,076 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:09,076 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1665552515] [2019-11-15 23:34:09,076 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:09,077 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:34:09,077 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [769773283] [2019-11-15 23:34:09,077 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:34:09,077 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:09,078 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:34:09,078 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:34:09,078 INFO L87 Difference]: Start difference. First operand 7375 states and 10504 transitions. Second operand 4 states. [2019-11-15 23:34:09,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:09,427 INFO L93 Difference]: Finished difference Result 12986 states and 18662 transitions. [2019-11-15 23:34:09,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:34:09,428 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 105 [2019-11-15 23:34:09,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:09,440 INFO L225 Difference]: With dead ends: 12986 [2019-11-15 23:34:09,440 INFO L226 Difference]: Without dead ends: 6223 [2019-11-15 23:34:09,449 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:34:09,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6223 states. [2019-11-15 23:34:09,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6223 to 6223. [2019-11-15 23:34:09,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6223 states. [2019-11-15 23:34:09,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6223 states to 6223 states and 8885 transitions. [2019-11-15 23:34:09,791 INFO L78 Accepts]: Start accepts. Automaton has 6223 states and 8885 transitions. Word has length 105 [2019-11-15 23:34:09,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:09,792 INFO L462 AbstractCegarLoop]: Abstraction has 6223 states and 8885 transitions. [2019-11-15 23:34:09,792 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:34:09,792 INFO L276 IsEmpty]: Start isEmpty. Operand 6223 states and 8885 transitions. [2019-11-15 23:34:09,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2019-11-15 23:34:09,799 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:09,799 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:09,799 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:09,800 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:09,800 INFO L82 PathProgramCache]: Analyzing trace with hash -1323620079, now seen corresponding path program 1 times [2019-11-15 23:34:09,800 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:09,800 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [148090459] [2019-11-15 23:34:09,801 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:09,801 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:09,801 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:09,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:09,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:09,974 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [148090459] [2019-11-15 23:34:09,975 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:09,975 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:34:09,975 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [110803253] [2019-11-15 23:34:09,975 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:34:09,976 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:09,976 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:34:09,976 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:34:09,976 INFO L87 Difference]: Start difference. First operand 6223 states and 8885 transitions. Second operand 4 states. [2019-11-15 23:34:10,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:10,370 INFO L93 Difference]: Finished difference Result 9759 states and 14008 transitions. [2019-11-15 23:34:10,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:34:10,371 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 107 [2019-11-15 23:34:10,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:10,384 INFO L225 Difference]: With dead ends: 9759 [2019-11-15 23:34:10,384 INFO L226 Difference]: Without dead ends: 5619 [2019-11-15 23:34:10,392 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:34:10,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5619 states. [2019-11-15 23:34:10,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5619 to 5582. [2019-11-15 23:34:10,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5582 states. [2019-11-15 23:34:10,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5582 states to 5582 states and 7926 transitions. [2019-11-15 23:34:10,831 INFO L78 Accepts]: Start accepts. Automaton has 5582 states and 7926 transitions. Word has length 107 [2019-11-15 23:34:10,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:10,831 INFO L462 AbstractCegarLoop]: Abstraction has 5582 states and 7926 transitions. [2019-11-15 23:34:10,831 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:34:10,831 INFO L276 IsEmpty]: Start isEmpty. Operand 5582 states and 7926 transitions. [2019-11-15 23:34:10,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2019-11-15 23:34:10,837 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:10,838 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:10,838 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:10,838 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:10,838 INFO L82 PathProgramCache]: Analyzing trace with hash 1709812529, now seen corresponding path program 1 times [2019-11-15 23:34:10,839 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:10,839 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1310572038] [2019-11-15 23:34:10,839 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:10,839 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:10,839 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:10,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:10,885 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:10,886 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1310572038] [2019-11-15 23:34:10,886 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:10,886 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:34:10,886 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1167253390] [2019-11-15 23:34:10,887 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:34:10,887 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:10,887 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:34:10,887 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:10,887 INFO L87 Difference]: Start difference. First operand 5582 states and 7926 transitions. Second operand 3 states. [2019-11-15 23:34:11,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:11,587 INFO L93 Difference]: Finished difference Result 14170 states and 20651 transitions. [2019-11-15 23:34:11,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:34:11,587 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 109 [2019-11-15 23:34:11,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:11,608 INFO L225 Difference]: With dead ends: 14170 [2019-11-15 23:34:11,608 INFO L226 Difference]: Without dead ends: 10298 [2019-11-15 23:34:11,617 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:11,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10298 states. [2019-11-15 23:34:12,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10298 to 10296. [2019-11-15 23:34:12,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10296 states. [2019-11-15 23:34:12,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10296 states to 10296 states and 14706 transitions. [2019-11-15 23:34:12,271 INFO L78 Accepts]: Start accepts. Automaton has 10296 states and 14706 transitions. Word has length 109 [2019-11-15 23:34:12,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:12,271 INFO L462 AbstractCegarLoop]: Abstraction has 10296 states and 14706 transitions. [2019-11-15 23:34:12,271 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:34:12,271 INFO L276 IsEmpty]: Start isEmpty. Operand 10296 states and 14706 transitions. [2019-11-15 23:34:12,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2019-11-15 23:34:12,281 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:12,282 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:12,282 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:12,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:12,282 INFO L82 PathProgramCache]: Analyzing trace with hash 1172299126, now seen corresponding path program 1 times [2019-11-15 23:34:12,282 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:12,283 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1709158977] [2019-11-15 23:34:12,283 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:12,283 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:12,283 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:12,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:12,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:12,416 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1709158977] [2019-11-15 23:34:12,418 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:12,418 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:34:12,418 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1233438326] [2019-11-15 23:34:12,419 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:34:12,419 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:12,419 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:34:12,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:34:12,420 INFO L87 Difference]: Start difference. First operand 10296 states and 14706 transitions. Second operand 4 states. [2019-11-15 23:34:13,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:13,042 INFO L93 Difference]: Finished difference Result 20649 states and 29486 transitions. [2019-11-15 23:34:13,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:34:13,042 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 109 [2019-11-15 23:34:13,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:13,062 INFO L225 Difference]: With dead ends: 20649 [2019-11-15 23:34:13,062 INFO L226 Difference]: Without dead ends: 10502 [2019-11-15 23:34:13,075 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:34:13,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10502 states. [2019-11-15 23:34:13,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10502 to 10408. [2019-11-15 23:34:13,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10408 states. [2019-11-15 23:34:13,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10408 states to 10408 states and 14827 transitions. [2019-11-15 23:34:13,885 INFO L78 Accepts]: Start accepts. Automaton has 10408 states and 14827 transitions. Word has length 109 [2019-11-15 23:34:13,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:13,886 INFO L462 AbstractCegarLoop]: Abstraction has 10408 states and 14827 transitions. [2019-11-15 23:34:13,886 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:34:13,886 INFO L276 IsEmpty]: Start isEmpty. Operand 10408 states and 14827 transitions. [2019-11-15 23:34:13,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2019-11-15 23:34:13,896 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:13,896 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:13,897 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:13,897 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:13,897 INFO L82 PathProgramCache]: Analyzing trace with hash 808379514, now seen corresponding path program 1 times [2019-11-15 23:34:13,897 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:13,898 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1714919961] [2019-11-15 23:34:13,898 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:13,898 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:13,898 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:13,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:13,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:13,938 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1714919961] [2019-11-15 23:34:13,938 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:13,938 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:34:13,938 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [789268059] [2019-11-15 23:34:13,939 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:34:13,939 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:13,939 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:34:13,939 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:13,939 INFO L87 Difference]: Start difference. First operand 10408 states and 14827 transitions. Second operand 3 states. [2019-11-15 23:34:14,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:14,876 INFO L93 Difference]: Finished difference Result 28055 states and 40150 transitions. [2019-11-15 23:34:14,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:34:14,877 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 110 [2019-11-15 23:34:14,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:14,921 INFO L225 Difference]: With dead ends: 28055 [2019-11-15 23:34:14,922 INFO L226 Difference]: Without dead ends: 20618 [2019-11-15 23:34:14,936 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:14,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20618 states. [2019-11-15 23:34:15,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20618 to 10418. [2019-11-15 23:34:15,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10418 states. [2019-11-15 23:34:15,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10418 states to 10418 states and 14837 transitions. [2019-11-15 23:34:15,658 INFO L78 Accepts]: Start accepts. Automaton has 10418 states and 14837 transitions. Word has length 110 [2019-11-15 23:34:15,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:15,658 INFO L462 AbstractCegarLoop]: Abstraction has 10418 states and 14837 transitions. [2019-11-15 23:34:15,658 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:34:15,658 INFO L276 IsEmpty]: Start isEmpty. Operand 10418 states and 14837 transitions. [2019-11-15 23:34:15,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 23:34:15,668 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:15,668 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:15,668 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:15,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:15,669 INFO L82 PathProgramCache]: Analyzing trace with hash 744989516, now seen corresponding path program 1 times [2019-11-15 23:34:15,669 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:15,669 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2102979563] [2019-11-15 23:34:15,669 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:15,670 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:15,670 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:15,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:15,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:15,729 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2102979563] [2019-11-15 23:34:15,730 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:15,730 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:34:15,730 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2131998263] [2019-11-15 23:34:15,730 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:34:15,731 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:15,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:34:15,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:15,731 INFO L87 Difference]: Start difference. First operand 10418 states and 14837 transitions. Second operand 3 states. [2019-11-15 23:34:16,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:16,800 INFO L93 Difference]: Finished difference Result 22638 states and 34147 transitions. [2019-11-15 23:34:16,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:34:16,800 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 111 [2019-11-15 23:34:16,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:16,842 INFO L225 Difference]: With dead ends: 22638 [2019-11-15 23:34:16,843 INFO L226 Difference]: Without dead ends: 16528 [2019-11-15 23:34:16,853 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:34:16,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16528 states. [2019-11-15 23:34:18,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16528 to 16484. [2019-11-15 23:34:18,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16484 states. [2019-11-15 23:34:18,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16484 states to 16484 states and 24155 transitions. [2019-11-15 23:34:18,169 INFO L78 Accepts]: Start accepts. Automaton has 16484 states and 24155 transitions. Word has length 111 [2019-11-15 23:34:18,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:18,170 INFO L462 AbstractCegarLoop]: Abstraction has 16484 states and 24155 transitions. [2019-11-15 23:34:18,170 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:34:18,170 INFO L276 IsEmpty]: Start isEmpty. Operand 16484 states and 24155 transitions. [2019-11-15 23:34:18,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 23:34:18,176 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:18,177 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:18,177 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:18,177 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:18,177 INFO L82 PathProgramCache]: Analyzing trace with hash -1518514165, now seen corresponding path program 1 times [2019-11-15 23:34:18,178 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:18,178 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [818144361] [2019-11-15 23:34:18,178 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:18,178 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:18,178 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:18,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:18,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:18,556 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [818144361] [2019-11-15 23:34:18,556 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:18,556 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-11-15 23:34:18,557 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [352429651] [2019-11-15 23:34:18,558 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-11-15 23:34:18,558 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:18,558 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-11-15 23:34:18,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=178, Unknown=0, NotChecked=0, Total=210 [2019-11-15 23:34:18,559 INFO L87 Difference]: Start difference. First operand 16484 states and 24155 transitions. Second operand 15 states. [2019-11-15 23:34:23,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:23,985 INFO L93 Difference]: Finished difference Result 66341 states and 101068 transitions. [2019-11-15 23:34:23,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 23:34:23,985 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 111 [2019-11-15 23:34:23,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:24,058 INFO L225 Difference]: With dead ends: 66341 [2019-11-15 23:34:24,058 INFO L226 Difference]: Without dead ends: 53512 [2019-11-15 23:34:24,077 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=140, Invalid=412, Unknown=0, NotChecked=0, Total=552 [2019-11-15 23:34:24,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53512 states. [2019-11-15 23:34:27,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53512 to 53496. [2019-11-15 23:34:27,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53496 states. [2019-11-15 23:34:27,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53496 states to 53496 states and 80894 transitions. [2019-11-15 23:34:27,980 INFO L78 Accepts]: Start accepts. Automaton has 53496 states and 80894 transitions. Word has length 111 [2019-11-15 23:34:27,981 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:27,981 INFO L462 AbstractCegarLoop]: Abstraction has 53496 states and 80894 transitions. [2019-11-15 23:34:27,981 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-11-15 23:34:27,981 INFO L276 IsEmpty]: Start isEmpty. Operand 53496 states and 80894 transitions. [2019-11-15 23:34:27,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 23:34:27,992 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:27,993 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:27,993 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:27,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:27,993 INFO L82 PathProgramCache]: Analyzing trace with hash 1157308592, now seen corresponding path program 1 times [2019-11-15 23:34:27,994 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:27,994 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1737861062] [2019-11-15 23:34:27,994 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:27,994 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:27,994 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:28,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:28,268 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:28,269 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1737861062] [2019-11-15 23:34:28,269 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:28,269 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-15 23:34:28,269 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [428450188] [2019-11-15 23:34:28,270 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-15 23:34:28,270 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:28,270 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-15 23:34:28,271 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-11-15 23:34:28,271 INFO L87 Difference]: Start difference. First operand 53496 states and 80894 transitions. Second operand 12 states. [2019-11-15 23:34:33,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:33,243 INFO L93 Difference]: Finished difference Result 87634 states and 134104 transitions. [2019-11-15 23:34:33,243 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 23:34:33,243 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 111 [2019-11-15 23:34:33,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:33,313 INFO L225 Difference]: With dead ends: 87634 [2019-11-15 23:34:33,313 INFO L226 Difference]: Without dead ends: 58169 [2019-11-15 23:34:33,336 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=83, Invalid=223, Unknown=0, NotChecked=0, Total=306 [2019-11-15 23:34:33,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58169 states. [2019-11-15 23:34:36,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58169 to 34849. [2019-11-15 23:34:36,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34849 states. [2019-11-15 23:34:36,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34849 states to 34849 states and 52560 transitions. [2019-11-15 23:34:36,443 INFO L78 Accepts]: Start accepts. Automaton has 34849 states and 52560 transitions. Word has length 111 [2019-11-15 23:34:36,444 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:36,444 INFO L462 AbstractCegarLoop]: Abstraction has 34849 states and 52560 transitions. [2019-11-15 23:34:36,444 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-15 23:34:36,444 INFO L276 IsEmpty]: Start isEmpty. Operand 34849 states and 52560 transitions. [2019-11-15 23:34:36,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 23:34:36,450 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:36,450 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:36,450 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:36,450 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:36,450 INFO L82 PathProgramCache]: Analyzing trace with hash 1352743846, now seen corresponding path program 1 times [2019-11-15 23:34:36,451 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:36,451 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1017105532] [2019-11-15 23:34:36,451 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:36,451 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:36,451 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:36,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:36,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:36,704 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1017105532] [2019-11-15 23:34:36,705 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:36,705 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-15 23:34:36,705 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2115230372] [2019-11-15 23:34:36,705 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-15 23:34:36,706 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:36,706 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-15 23:34:36,706 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-11-15 23:34:36,706 INFO L87 Difference]: Start difference. First operand 34849 states and 52560 transitions. Second operand 12 states. [2019-11-15 23:34:44,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:44,849 INFO L93 Difference]: Finished difference Result 106920 states and 163735 transitions. [2019-11-15 23:34:44,849 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 23:34:44,849 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 111 [2019-11-15 23:34:44,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:44,946 INFO L225 Difference]: With dead ends: 106920 [2019-11-15 23:34:44,946 INFO L226 Difference]: Without dead ends: 80331 [2019-11-15 23:34:44,974 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=83, Invalid=223, Unknown=0, NotChecked=0, Total=306 [2019-11-15 23:34:45,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80331 states. [2019-11-15 23:34:48,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80331 to 35330. [2019-11-15 23:34:48,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35330 states. [2019-11-15 23:34:48,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35330 states to 35330 states and 53109 transitions. [2019-11-15 23:34:48,681 INFO L78 Accepts]: Start accepts. Automaton has 35330 states and 53109 transitions. Word has length 111 [2019-11-15 23:34:48,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:48,682 INFO L462 AbstractCegarLoop]: Abstraction has 35330 states and 53109 transitions. [2019-11-15 23:34:48,682 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-15 23:34:48,682 INFO L276 IsEmpty]: Start isEmpty. Operand 35330 states and 53109 transitions. [2019-11-15 23:34:48,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 23:34:48,688 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:48,688 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:48,688 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:48,689 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:48,689 INFO L82 PathProgramCache]: Analyzing trace with hash -266400693, now seen corresponding path program 1 times [2019-11-15 23:34:48,689 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:48,689 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1496877734] [2019-11-15 23:34:48,689 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:48,690 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:48,690 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:48,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:48,863 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:48,863 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1496877734] [2019-11-15 23:34:48,863 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:48,863 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 23:34:48,864 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1420596306] [2019-11-15 23:34:48,864 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 23:34:48,864 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:48,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 23:34:48,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:34:48,865 INFO L87 Difference]: Start difference. First operand 35330 states and 53109 transitions. Second operand 8 states. [2019-11-15 23:34:52,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:52,324 INFO L93 Difference]: Finished difference Result 65942 states and 100697 transitions. [2019-11-15 23:34:52,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:34:52,324 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 111 [2019-11-15 23:34:52,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:52,368 INFO L225 Difference]: With dead ends: 65942 [2019-11-15 23:34:52,368 INFO L226 Difference]: Without dead ends: 35332 [2019-11-15 23:34:52,396 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-11-15 23:34:52,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35332 states. [2019-11-15 23:34:54,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35332 to 22620. [2019-11-15 23:34:54,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22620 states. [2019-11-15 23:34:54,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22620 states to 22620 states and 33449 transitions. [2019-11-15 23:34:54,806 INFO L78 Accepts]: Start accepts. Automaton has 22620 states and 33449 transitions. Word has length 111 [2019-11-15 23:34:54,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:54,807 INFO L462 AbstractCegarLoop]: Abstraction has 22620 states and 33449 transitions. [2019-11-15 23:34:54,807 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 23:34:54,807 INFO L276 IsEmpty]: Start isEmpty. Operand 22620 states and 33449 transitions. [2019-11-15 23:34:54,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 23:34:54,812 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:54,812 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:54,812 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:54,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:54,812 INFO L82 PathProgramCache]: Analyzing trace with hash 2048402849, now seen corresponding path program 1 times [2019-11-15 23:34:54,812 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:54,813 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [554807842] [2019-11-15 23:34:54,813 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:54,813 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:54,813 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:54,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:54,921 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:54,921 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [554807842] [2019-11-15 23:34:54,921 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:54,922 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:34:54,922 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1967590939] [2019-11-15 23:34:54,922 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:34:54,922 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:54,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:34:54,923 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:34:54,923 INFO L87 Difference]: Start difference. First operand 22620 states and 33449 transitions. Second operand 4 states. [2019-11-15 23:34:57,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:34:57,565 INFO L93 Difference]: Finished difference Result 45407 states and 67107 transitions. [2019-11-15 23:34:57,566 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:34:57,566 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 111 [2019-11-15 23:34:57,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:34:57,588 INFO L225 Difference]: With dead ends: 45407 [2019-11-15 23:34:57,589 INFO L226 Difference]: Without dead ends: 23121 [2019-11-15 23:34:57,602 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:34:57,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23121 states. [2019-11-15 23:34:59,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23121 to 22901. [2019-11-15 23:34:59,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22901 states. [2019-11-15 23:34:59,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22901 states to 22901 states and 33750 transitions. [2019-11-15 23:34:59,842 INFO L78 Accepts]: Start accepts. Automaton has 22901 states and 33750 transitions. Word has length 111 [2019-11-15 23:34:59,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:34:59,842 INFO L462 AbstractCegarLoop]: Abstraction has 22901 states and 33750 transitions. [2019-11-15 23:34:59,842 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:34:59,842 INFO L276 IsEmpty]: Start isEmpty. Operand 22901 states and 33750 transitions. [2019-11-15 23:34:59,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 23:34:59,848 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:34:59,848 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:34:59,849 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:34:59,849 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:34:59,849 INFO L82 PathProgramCache]: Analyzing trace with hash -1191527915, now seen corresponding path program 1 times [2019-11-15 23:34:59,849 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:34:59,849 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [31468804] [2019-11-15 23:34:59,849 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:59,849 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:34:59,850 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:34:59,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:34:59,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:34:59,930 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [31468804] [2019-11-15 23:34:59,930 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:34:59,931 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:34:59,931 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1268313774] [2019-11-15 23:34:59,931 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:34:59,931 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:34:59,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:34:59,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:34:59,932 INFO L87 Difference]: Start difference. First operand 22901 states and 33750 transitions. Second operand 4 states. [2019-11-15 23:35:01,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:35:01,839 INFO L93 Difference]: Finished difference Result 32520 states and 47979 transitions. [2019-11-15 23:35:01,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:35:01,840 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 111 [2019-11-15 23:35:01,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:35:01,859 INFO L225 Difference]: With dead ends: 32520 [2019-11-15 23:35:01,859 INFO L226 Difference]: Without dead ends: 19857 [2019-11-15 23:35:01,868 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:35:01,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19857 states. [2019-11-15 23:35:03,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19857 to 19857. [2019-11-15 23:35:03,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19857 states. [2019-11-15 23:35:03,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19857 states to 19857 states and 29199 transitions. [2019-11-15 23:35:03,867 INFO L78 Accepts]: Start accepts. Automaton has 19857 states and 29199 transitions. Word has length 111 [2019-11-15 23:35:03,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:35:03,867 INFO L462 AbstractCegarLoop]: Abstraction has 19857 states and 29199 transitions. [2019-11-15 23:35:03,867 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:35:03,868 INFO L276 IsEmpty]: Start isEmpty. Operand 19857 states and 29199 transitions. [2019-11-15 23:35:03,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-11-15 23:35:03,870 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:35:03,870 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:35:03,871 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:35:03,871 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:35:03,871 INFO L82 PathProgramCache]: Analyzing trace with hash 1910968843, now seen corresponding path program 1 times [2019-11-15 23:35:03,871 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:35:03,871 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [570001449] [2019-11-15 23:35:03,872 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:35:03,872 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:35:03,872 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:35:03,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:35:04,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:35:04,912 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [570001449] [2019-11-15 23:35:04,913 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:35:04,913 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2019-11-15 23:35:04,913 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [186029320] [2019-11-15 23:35:04,913 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2019-11-15 23:35:04,913 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:35:04,914 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2019-11-15 23:35:04,914 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=445, Unknown=0, NotChecked=0, Total=506 [2019-11-15 23:35:04,914 INFO L87 Difference]: Start difference. First operand 19857 states and 29199 transitions. Second operand 23 states. [2019-11-15 23:35:05,692 WARN L191 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 50 [2019-11-15 23:35:05,880 WARN L191 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 60 [2019-11-15 23:35:06,166 WARN L191 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 71 [2019-11-15 23:35:06,379 WARN L191 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 76 [2019-11-15 23:35:07,018 WARN L191 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 53 [2019-11-15 23:35:14,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:35:14,845 INFO L93 Difference]: Finished difference Result 64360 states and 97302 transitions. [2019-11-15 23:35:14,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-11-15 23:35:14,845 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 113 [2019-11-15 23:35:14,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:35:14,914 INFO L225 Difference]: With dead ends: 64360 [2019-11-15 23:35:14,914 INFO L226 Difference]: Without dead ends: 57246 [2019-11-15 23:35:14,928 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=309, Invalid=1173, Unknown=0, NotChecked=0, Total=1482 [2019-11-15 23:35:14,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57246 states. [2019-11-15 23:35:18,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57246 to 20420. [2019-11-15 23:35:18,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20420 states. [2019-11-15 23:35:18,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20420 states to 20420 states and 29896 transitions. [2019-11-15 23:35:18,851 INFO L78 Accepts]: Start accepts. Automaton has 20420 states and 29896 transitions. Word has length 113 [2019-11-15 23:35:18,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:35:18,851 INFO L462 AbstractCegarLoop]: Abstraction has 20420 states and 29896 transitions. [2019-11-15 23:35:18,851 INFO L463 AbstractCegarLoop]: Interpolant automaton has 23 states. [2019-11-15 23:35:18,851 INFO L276 IsEmpty]: Start isEmpty. Operand 20420 states and 29896 transitions. [2019-11-15 23:35:18,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-11-15 23:35:18,854 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:35:18,854 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:35:18,855 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:35:18,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:35:18,855 INFO L82 PathProgramCache]: Analyzing trace with hash 655744324, now seen corresponding path program 1 times [2019-11-15 23:35:18,855 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:35:18,855 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [597952172] [2019-11-15 23:35:18,855 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:35:18,855 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:35:18,855 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:35:18,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 23:35:18,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 23:35:19,039 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 23:35:19,040 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 23:35:19,250 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 11:35:19 BoogieIcfgContainer [2019-11-15 23:35:19,250 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 23:35:19,251 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 23:35:19,251 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 23:35:19,251 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 23:35:19,252 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 11:34:02" (3/4) ... [2019-11-15 23:35:19,254 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 23:35:19,467 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_e0568d53-fe6c-4eb3-b069-3509cedafff4/bin/uautomizer/witness.graphml [2019-11-15 23:35:19,467 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 23:35:19,469 INFO L168 Benchmark]: Toolchain (without parser) took 79178.67 ms. Allocated memory was 1.0 GB in the beginning and 5.4 GB in the end (delta: 4.3 GB). Free memory was 944.7 MB in the beginning and 2.8 GB in the end (delta: -1.9 GB). Peak memory consumption was 2.4 GB. Max. memory is 11.5 GB. [2019-11-15 23:35:19,469 INFO L168 Benchmark]: CDTParser took 0.24 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 23:35:19,469 INFO L168 Benchmark]: CACSL2BoogieTranslator took 604.16 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 144.7 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -184.0 MB). Peak memory consumption was 23.1 MB. Max. memory is 11.5 GB. [2019-11-15 23:35:19,470 INFO L168 Benchmark]: Boogie Procedure Inliner took 62.20 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2019-11-15 23:35:19,470 INFO L168 Benchmark]: Boogie Preprocessor took 50.64 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 23:35:19,470 INFO L168 Benchmark]: RCFGBuilder took 1232.07 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 97.6 MB). Peak memory consumption was 97.6 MB. Max. memory is 11.5 GB. [2019-11-15 23:35:19,471 INFO L168 Benchmark]: TraceAbstraction took 77007.19 ms. Allocated memory was 1.2 GB in the beginning and 5.4 GB in the end (delta: 4.2 GB). Free memory was 1.0 GB in the beginning and 3.0 GB in the end (delta: -1.9 GB). Peak memory consumption was 2.3 GB. Max. memory is 11.5 GB. [2019-11-15 23:35:19,471 INFO L168 Benchmark]: Witness Printer took 216.72 ms. Allocated memory is still 5.4 GB. Free memory was 3.0 GB in the beginning and 2.8 GB in the end (delta: 107.1 MB). Peak memory consumption was 107.1 MB. Max. memory is 11.5 GB. [2019-11-15 23:35:19,473 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.24 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 604.16 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 144.7 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -184.0 MB). Peak memory consumption was 23.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 62.20 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 50.64 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 1232.07 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 97.6 MB). Peak memory consumption was 97.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 77007.19 ms. Allocated memory was 1.2 GB in the beginning and 5.4 GB in the end (delta: 4.2 GB). Free memory was 1.0 GB in the beginning and 3.0 GB in the end (delta: -1.9 GB). Peak memory consumption was 2.3 GB. Max. memory is 11.5 GB. * Witness Printer took 216.72 ms. Allocated memory is still 5.4 GB. Free memory was 3.0 GB in the beginning and 2.8 GB in the end (delta: 107.1 MB). Peak memory consumption was 107.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 536]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L1] int __return_main; [L12] msg_t nomsg = (msg_t )-1; [L13] port_t p12 = 0; [L14] char p12_old = '\x0'; [L15] char p12_new = '\x0'; [L16] _Bool ep12 = 0; [L17] port_t p13 = 0; [L18] char p13_old = '\x0'; [L19] char p13_new = '\x0'; [L20] _Bool ep13 = 0; [L21] port_t p21 = 0; [L22] char p21_old = '\x0'; [L23] char p21_new = '\x0'; [L24] _Bool ep21 = 0; [L25] port_t p23 = 0; [L26] char p23_old = '\x0'; [L27] char p23_new = '\x0'; [L28] _Bool ep23 = 0; [L29] port_t p31 = 0; [L30] char p31_old = '\x0'; [L31] char p31_new = '\x0'; [L32] _Bool ep31 = 0; [L33] port_t p32 = 0; [L34] char p32_old = '\x0'; [L35] char p32_new = '\x0'; [L36] _Bool ep32 = 0; [L37] char id1 = '\x0'; [L38] unsigned char r1 = '\x0'; [L39] char st1 = '\x0'; [L40] char nl1 = '\x0'; [L41] char m1 = '\x0'; [L42] char max1 = '\x0'; [L43] _Bool mode1 = 0; [L44] char id2 = '\x0'; [L45] unsigned char r2 = '\x0'; [L46] char st2 = '\x0'; [L47] char nl2 = '\x0'; [L48] char m2 = '\x0'; [L49] char max2 = '\x0'; [L50] _Bool mode2 = 0; [L51] char id3 = '\x0'; [L52] unsigned char r3 = '\x0'; [L53] char st3 = '\x0'; [L54] char nl3 = '\x0'; [L55] char m3 = '\x0'; [L56] char max3 = '\x0'; [L57] _Bool mode3 = 0; [L61] void (*nodes[3])() = { &node1, &node2, &node3 }; [L65] int __return_1142; [L66] int __return_1270; [L67] int __return_1389; [L68] int __return_1499; VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=0, ep13=0, ep21=0, ep23=0, ep31=0, ep32=0, id1=0, id2=0, id3=0, m1=0, m2=0, m3=0, max1=0, max2=0, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L71] int main__c1; [L72] int main__i2; [L73] main__c1 = 0 [L74] ep12 = __VERIFIER_nondet_bool() [L75] ep13 = __VERIFIER_nondet_bool() [L76] ep21 = __VERIFIER_nondet_bool() [L77] ep23 = __VERIFIER_nondet_bool() [L78] ep31 = __VERIFIER_nondet_bool() [L79] ep32 = __VERIFIER_nondet_bool() [L80] id1 = __VERIFIER_nondet_char() [L81] r1 = __VERIFIER_nondet_uchar() [L82] st1 = __VERIFIER_nondet_char() [L83] nl1 = __VERIFIER_nondet_char() [L84] m1 = __VERIFIER_nondet_char() [L85] max1 = __VERIFIER_nondet_char() [L86] mode1 = __VERIFIER_nondet_bool() [L87] id2 = __VERIFIER_nondet_char() [L88] r2 = __VERIFIER_nondet_uchar() [L89] st2 = __VERIFIER_nondet_char() [L90] nl2 = __VERIFIER_nondet_char() [L91] m2 = __VERIFIER_nondet_char() [L92] max2 = __VERIFIER_nondet_char() [L93] mode2 = __VERIFIER_nondet_bool() [L94] id3 = __VERIFIER_nondet_char() [L95] r3 = __VERIFIER_nondet_uchar() [L96] st3 = __VERIFIER_nondet_char() [L97] nl3 = __VERIFIER_nondet_char() [L98] m3 = __VERIFIER_nondet_char() [L99] max3 = __VERIFIER_nondet_char() [L100] mode3 = __VERIFIER_nondet_bool() [L102] _Bool init__r121; [L103] _Bool init__r131; [L104] _Bool init__r211; [L105] _Bool init__r231; [L106] _Bool init__r311; [L107] _Bool init__r321; [L108] _Bool init__r122; [L109] int init__tmp; [L110] _Bool init__r132; [L111] int init__tmp___0; [L112] _Bool init__r212; [L113] int init__tmp___1; [L114] _Bool init__r232; [L115] int init__tmp___2; [L116] _Bool init__r312; [L117] int init__tmp___3; [L118] _Bool init__r322; [L119] int init__tmp___4; [L120] int init__tmp___5; [L121] init__r121 = ep12 [L122] init__r131 = ep13 [L123] init__r211 = ep21 [L124] init__r231 = ep23 [L125] init__r311 = ep31 [L126] init__r321 = ep32 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L127] COND TRUE !(init__r121 == 0) [L129] init__tmp = 1 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L131] init__r122 = (_Bool)init__tmp VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L132] COND FALSE !(!(init__r131 == 0)) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L1612] COND TRUE !(init__r121 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L1614] COND TRUE !(ep23 == 0) [L1616] init__tmp___0 = 1 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L136] init__r132 = (_Bool)init__tmp___0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L137] COND FALSE !(!(init__r211 == 0)) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L1589] COND TRUE !(init__r231 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L1591] COND TRUE !(ep31 == 0) [L1593] init__tmp___1 = 1 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L141] init__r212 = (_Bool)init__tmp___1 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L142] COND TRUE !(init__r231 == 0) [L144] init__tmp___2 = 1 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L146] init__r232 = (_Bool)init__tmp___2 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L147] COND TRUE !(init__r311 == 0) [L149] init__tmp___3 = 1 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L151] init__r312 = (_Bool)init__tmp___3 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L152] COND FALSE !(!(init__r321 == 0)) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L1520] COND TRUE !(init__r311 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L1522] COND TRUE !(ep12 == 0) [L1524] init__tmp___4 = 1 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L156] init__r322 = (_Bool)init__tmp___4 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L157] COND TRUE ((int)id1) != ((int)id2) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L159] COND TRUE ((int)id1) != ((int)id3) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L161] COND TRUE ((int)id2) != ((int)id3) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L163] COND TRUE ((int)id1) >= 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L165] COND TRUE ((int)id2) >= 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L167] COND TRUE ((int)id3) >= 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L169] COND TRUE ((int)r1) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L171] COND TRUE ((int)r2) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L173] COND TRUE ((int)r3) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L175] COND TRUE !(init__r122 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L177] COND TRUE !(init__r132 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L179] COND TRUE !(init__r212 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L181] COND TRUE !(init__r232 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L183] COND TRUE !(init__r312 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L185] COND TRUE !(init__r322 == 0) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L187] COND TRUE ((int)max1) == ((int)id1) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L189] COND TRUE ((int)max2) == ((int)id2) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L191] COND TRUE ((int)max3) == ((int)id3) VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L193] COND TRUE ((int)st1) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L195] COND TRUE ((int)st2) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L197] COND TRUE ((int)st3) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L199] COND TRUE ((int)nl1) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L201] COND TRUE ((int)nl2) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L203] COND TRUE ((int)nl3) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L205] COND TRUE ((int)mode1) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L207] COND TRUE ((int)mode2) == 0 VAL [__return_1142=0, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L209] COND TRUE ((int)mode3) == 0 [L211] init__tmp___5 = 1 [L212] __return_1142 = init__tmp___5 [L213] main__i2 = __return_1142 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=0, p12_old=0, p13=0, p13_new=0, p13_old=0, p21=0, p21_new=0, p21_old=0, p23=0, p23_new=0, p23_old=0, p31=0, p31_new=0, p31_old=0, p32=0, p32_new=0, p32_old=0, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L214] COND TRUE main__i2 != 0 [L216] p12_old = nomsg [L217] p12_new = nomsg [L218] p13_old = nomsg [L219] p13_new = nomsg [L220] p21_old = nomsg [L221] p21_new = nomsg [L222] p23_old = nomsg [L223] p23_new = nomsg [L224] p31_old = nomsg [L225] p31_new = nomsg [L226] p32_old = nomsg [L227] p32_new = nomsg [L228] main__i2 = 0 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L230] COND FALSE !(!(mode1 == 0)) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L236] COND TRUE ((int)r1) < 2 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L238] COND TRUE !(ep12 == 0) [L240] int node1____CPAchecker_TMP_0; VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L241] COND TRUE max1 != nomsg VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L243] COND TRUE p12_new == nomsg [L245] node1____CPAchecker_TMP_0 = max1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L247] p12_new = node1____CPAchecker_TMP_0 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L249] COND FALSE !(!(ep13 == 0)) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L260] mode1 = 1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L262] COND FALSE !(!(mode2 == 0)) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L268] COND TRUE ((int)r2) < 2 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L270] COND FALSE !(!(ep21 == 0)) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L281] COND TRUE !(ep23 == 0) [L283] int node2____CPAchecker_TMP_1; VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L284] COND TRUE max2 != nomsg VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L286] COND TRUE p23_new == nomsg [L288] node2____CPAchecker_TMP_1 = max2 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L290] p23_new = node2____CPAchecker_TMP_1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=3, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L292] mode2 = 1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=3, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L294] COND FALSE !(!(mode3 == 0)) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=3, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L300] COND TRUE ((int)r3) < 2 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=3, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L302] COND TRUE !(ep31 == 0) [L304] int node3____CPAchecker_TMP_0; VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=3, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L305] COND TRUE max3 != nomsg VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=3, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L307] COND TRUE p31_new == nomsg [L309] node3____CPAchecker_TMP_0 = max3 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=3, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L311] p31_new = node3____CPAchecker_TMP_0 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=3, p23_old=-1, p31=0, p31_new=0, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L313] COND FALSE !(!(ep32 == 0)) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=3, p23_old=-1, p31=0, p31_new=0, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L324] mode3 = 1 [L325] p12_old = p12_new [L326] p12_new = nomsg [L327] p13_old = p13_new [L328] p13_new = nomsg [L329] p21_old = p21_new [L330] p21_new = nomsg [L331] p23_old = p23_new [L332] p23_new = nomsg [L333] p31_old = p31_new [L334] p31_new = nomsg [L335] p32_old = p32_new [L336] p32_new = nomsg [L338] int check__tmp; VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=0, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L339] COND TRUE ((((int)st1) + ((int)st2)) + ((int)st3)) <= 1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=0, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L341] COND TRUE (((int)st1) + ((int)nl1)) <= 1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=0, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L343] COND TRUE (((int)st2) + ((int)nl2)) <= 1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=0, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L345] COND TRUE (((int)st3) + ((int)nl3)) <= 1 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=0, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L347] COND FALSE !(((int)r1) >= 2) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=0, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L353] COND TRUE ((((int)st1) + ((int)st2)) + ((int)st3)) == 0 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=0, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L355] COND TRUE ((int)r1) < 2 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=0, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L357] COND FALSE !(((int)r1) >= 2) VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=0, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L363] COND TRUE ((((int)nl1) + ((int)nl2)) + ((int)nl3)) == 0 VAL [__return_1142=1, __return_1270=0, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=0, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L365] COND TRUE ((int)r1) < 2 [L367] check__tmp = 1 [L368] __return_1270 = check__tmp [L369] main__c1 = __return_1270 [L371] _Bool __tmp_1; [L372] __tmp_1 = main__c1 [L373] _Bool assert__arg; [L374] assert__arg = __tmp_1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=0, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L375] COND FALSE !(assert__arg == 0) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=0, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L382] COND TRUE !(mode1 == 0) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=0, p32=0, p32_new=-1, p32_old=-1, r1=0, r2=0, r3=0, st1=0, st2=0, st3=0] [L384] COND FALSE !(r1 == 255) [L390] r1 = r1 + 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=0, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=0, r3=0, st1=0, st2=0, st3=0] [L391] COND FALSE !(!(ep21 == 0)) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=0, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=0, r3=0, st1=0, st2=0, st3=0] [L399] COND TRUE !(ep31 == 0) [L401] m1 = p31_old [L402] p31_old = nomsg VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=0, r3=0, st1=0, st2=0, st3=0] [L403] COND FALSE !(((int)m1) > ((int)max1)) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=0, r3=0, st1=0, st2=0, st3=0] [L407] COND TRUE ((int)r1) == 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=0, r3=0, st1=0, st2=0, st3=0] [L409] COND TRUE ((int)max1) == ((int)id1) [L411] st1 = 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=1, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=0, r3=0, st1=1, st2=0, st3=0] [L413] mode1 = 0 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=0, r3=0, st1=1, st2=0, st3=0] [L415] COND TRUE !(mode2 == 0) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=0, r3=0, st1=1, st2=0, st3=0] [L417] COND FALSE !(r2 == 255) [L423] r2 = r2 + 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=0, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=0, st1=1, st2=0, st3=0] [L424] COND TRUE !(ep12 == 0) [L426] m2 = p12_old [L427] p12_old = nomsg VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=0, st1=1, st2=0, st3=0] [L428] COND FALSE !(((int)m2) > ((int)max2)) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=0, st1=1, st2=0, st3=0] [L432] COND FALSE !(!(ep32 == 0)) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=1, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=0, st1=1, st2=0, st3=0] [L440] COND FALSE !(((int)r2) == 2) [L446] mode2 = 0 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=0, st1=1, st2=0, st3=0] [L448] COND TRUE !(mode3 == 0) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=0, st1=1, st2=0, st3=0] [L450] COND FALSE !(r3 == 255) [L456] r3 = r3 + 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L457] COND FALSE !(!(ep13 == 0)) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=0, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=3, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L465] COND TRUE !(ep23 == 0) [L467] m3 = p23_old [L468] p23_old = nomsg VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=3, max1=1, max2=3, max3=0, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L469] COND TRUE ((int)m3) > ((int)max3) [L471] max3 = m3 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=3, max1=1, max2=3, max3=3, mode1=0, mode2=0, mode3=1, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L473] COND FALSE !(((int)r3) == 2) [L479] mode3 = 0 [L480] p12_old = p12_new [L481] p12_new = nomsg [L482] p13_old = p13_new [L483] p13_new = nomsg [L484] p21_old = p21_new [L485] p21_new = nomsg [L486] p23_old = p23_new [L487] p23_new = nomsg [L488] p31_old = p31_new [L489] p31_new = nomsg [L490] p32_old = p32_new [L491] p32_new = nomsg [L493] int check__tmp; VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=3, max1=1, max2=3, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L494] COND TRUE ((((int)st1) + ((int)st2)) + ((int)st3)) <= 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=3, max1=1, max2=3, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L496] COND TRUE (((int)st1) + ((int)nl1)) <= 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=3, max1=1, max2=3, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L498] COND TRUE (((int)st2) + ((int)nl2)) <= 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=3, max1=1, max2=3, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L500] COND TRUE (((int)st3) + ((int)nl3)) <= 1 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=3, max1=1, max2=3, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L502] COND FALSE !(((int)r1) >= 2) VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=3, max1=1, max2=3, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L508] COND FALSE !(((((int)st1) + ((int)st2)) + ((int)st3)) == 0) [L1090] check__tmp = 0 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=3, max1=1, max2=3, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L526] __return_1389 = check__tmp [L527] main__c1 = __return_1389 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=3, max1=1, max2=3, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L530] _Bool __tmp_2; [L531] __tmp_2 = main__c1 [L532] _Bool assert__arg; [L533] assert__arg = __tmp_2 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=3, max1=1, max2=3, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L534] COND TRUE assert__arg == 0 VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=3, max1=1, max2=3, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] [L536] __VERIFIER_error() VAL [__return_1142=1, __return_1270=1, __return_1389=0, __return_1499=0, __return_main=0, ep12=1, ep13=0, ep21=0, ep23=1, ep31=1, ep32=0, id1=1, id2=3, id3=0, m1=0, m2=1, m3=3, max1=1, max2=3, max3=3, mode1=0, mode2=0, mode3=0, nl1=0, nl2=0, nl3=0, nomsg=-1, p12=0, p12_new=-1, p12_old=-1, p13=0, p13_new=-1, p13_old=-1, p21=0, p21_new=-1, p21_old=-1, p23=0, p23_new=-1, p23_old=-1, p31=0, p31_new=-1, p31_old=-1, p32=0, p32_new=-1, p32_old=-1, r1=1, r2=1, r3=1, st1=1, st2=0, st3=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 224 locations, 1 error locations. Result: UNSAFE, OverallTime: 76.9s, OverallIterations: 26, TraceHistogramMax: 1, AutomataDifference: 43.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 11114 SDtfs, 19271 SDslu, 22701 SDs, 0 SdLazy, 6882 SolverSat, 753 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 189 GetRequests, 47 SyntacticMatches, 2 SemanticMatches, 140 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 213 ImplicationChecksByTransitivity, 4.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=53496occurred in iteration=19, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 27.4s AutomataMinimizationTime, 25 MinimizatonAttempts, 133219 StatesRemovedByMinimization, 21 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 1.0s SatisfiabilityAnalysisTime, 3.1s InterpolantComputationTime, 2741 NumberOfCodeBlocks, 2741 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 2603 ConstructedInterpolants, 0 QuantifiedInterpolants, 1263337 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...