./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/podwr000_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_cd372037-e71e-4500-8b60-d5fcabf3ee54/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_cd372037-e71e-4500-8b60-d5fcabf3ee54/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_cd372037-e71e-4500-8b60-d5fcabf3ee54/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_cd372037-e71e-4500-8b60-d5fcabf3ee54/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/podwr000_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_cd372037-e71e-4500-8b60-d5fcabf3ee54/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_cd372037-e71e-4500-8b60-d5fcabf3ee54/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d5a24facb20b58fe8f9a481b5f73e4952e58a646 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 21:44:32,958 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 21:44:32,960 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 21:44:32,972 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 21:44:32,973 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 21:44:32,974 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 21:44:32,976 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 21:44:32,978 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 21:44:32,980 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 21:44:32,982 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 21:44:32,983 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 21:44:32,984 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 21:44:32,985 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 21:44:32,986 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 21:44:32,987 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 21:44:32,988 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 21:44:32,989 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 21:44:32,990 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 21:44:32,992 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 21:44:32,995 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 21:44:32,997 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 21:44:32,998 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 21:44:32,999 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 21:44:33,000 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 21:44:33,003 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 21:44:33,004 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 21:44:33,004 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 21:44:33,006 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 21:44:33,006 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 21:44:33,007 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 21:44:33,008 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 21:44:33,009 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 21:44:33,009 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 21:44:33,010 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 21:44:33,012 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 21:44:33,012 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 21:44:33,013 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 21:44:33,013 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 21:44:33,013 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 21:44:33,014 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 21:44:33,015 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 21:44:33,016 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_cd372037-e71e-4500-8b60-d5fcabf3ee54/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 21:44:33,031 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 21:44:33,032 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 21:44:33,033 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 21:44:33,034 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 21:44:33,034 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 21:44:33,034 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 21:44:33,035 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 21:44:33,035 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 21:44:33,035 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 21:44:33,036 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 21:44:33,036 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 21:44:33,036 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 21:44:33,036 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 21:44:33,037 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 21:44:33,037 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 21:44:33,037 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 21:44:33,038 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 21:44:33,038 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 21:44:33,038 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 21:44:33,039 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 21:44:33,039 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 21:44:33,039 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 21:44:33,040 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 21:44:33,040 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 21:44:33,040 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 21:44:33,040 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 21:44:33,041 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 21:44:33,041 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 21:44:33,041 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_cd372037-e71e-4500-8b60-d5fcabf3ee54/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d5a24facb20b58fe8f9a481b5f73e4952e58a646 [2019-11-15 21:44:33,073 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 21:44:33,086 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 21:44:33,090 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 21:44:33,093 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 21:44:33,093 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 21:44:33,095 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_cd372037-e71e-4500-8b60-d5fcabf3ee54/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/podwr000_power.oepc.i [2019-11-15 21:44:33,166 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_cd372037-e71e-4500-8b60-d5fcabf3ee54/bin/uautomizer/data/db67ff852/4ae7851232344274b5a297fa4e2b9125/FLAG1736b5144 [2019-11-15 21:44:33,660 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 21:44:33,661 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_cd372037-e71e-4500-8b60-d5fcabf3ee54/sv-benchmarks/c/pthread-wmm/podwr000_power.oepc.i [2019-11-15 21:44:33,685 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_cd372037-e71e-4500-8b60-d5fcabf3ee54/bin/uautomizer/data/db67ff852/4ae7851232344274b5a297fa4e2b9125/FLAG1736b5144 [2019-11-15 21:44:33,970 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_cd372037-e71e-4500-8b60-d5fcabf3ee54/bin/uautomizer/data/db67ff852/4ae7851232344274b5a297fa4e2b9125 [2019-11-15 21:44:33,973 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 21:44:33,974 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 21:44:33,975 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 21:44:33,975 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 21:44:33,979 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 21:44:33,979 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 09:44:33" (1/1) ... [2019-11-15 21:44:33,982 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@41e37240 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:44:33, skipping insertion in model container [2019-11-15 21:44:33,982 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 09:44:33" (1/1) ... [2019-11-15 21:44:33,989 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 21:44:34,037 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 21:44:34,744 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 21:44:34,763 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 21:44:34,863 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 21:44:34,946 INFO L192 MainTranslator]: Completed translation [2019-11-15 21:44:34,946 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:44:34 WrapperNode [2019-11-15 21:44:34,946 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 21:44:34,948 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 21:44:34,948 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 21:44:34,948 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 21:44:34,958 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:44:34" (1/1) ... [2019-11-15 21:44:34,996 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:44:34" (1/1) ... [2019-11-15 21:44:35,042 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 21:44:35,043 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 21:44:35,044 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 21:44:35,044 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 21:44:35,054 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:44:34" (1/1) ... [2019-11-15 21:44:35,055 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:44:34" (1/1) ... [2019-11-15 21:44:35,071 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:44:34" (1/1) ... [2019-11-15 21:44:35,071 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:44:34" (1/1) ... [2019-11-15 21:44:35,080 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:44:34" (1/1) ... [2019-11-15 21:44:35,083 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:44:34" (1/1) ... [2019-11-15 21:44:35,095 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:44:34" (1/1) ... [2019-11-15 21:44:35,101 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 21:44:35,109 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 21:44:35,109 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 21:44:35,109 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 21:44:35,112 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:44:34" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_cd372037-e71e-4500-8b60-d5fcabf3ee54/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 21:44:35,191 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 21:44:35,191 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 21:44:35,192 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 21:44:35,192 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 21:44:35,192 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 21:44:35,192 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 21:44:35,193 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 21:44:35,193 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 21:44:35,193 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 21:44:35,193 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 21:44:35,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 21:44:35,195 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 21:44:36,015 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 21:44:36,015 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 21:44:36,017 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:44:36 BoogieIcfgContainer [2019-11-15 21:44:36,017 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 21:44:36,018 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 21:44:36,018 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 21:44:36,022 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 21:44:36,022 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 09:44:33" (1/3) ... [2019-11-15 21:44:36,023 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@31b616c0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 09:44:36, skipping insertion in model container [2019-11-15 21:44:36,023 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:44:34" (2/3) ... [2019-11-15 21:44:36,024 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@31b616c0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 09:44:36, skipping insertion in model container [2019-11-15 21:44:36,024 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:44:36" (3/3) ... [2019-11-15 21:44:36,026 INFO L109 eAbstractionObserver]: Analyzing ICFG podwr000_power.oepc.i [2019-11-15 21:44:36,078 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,078 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,078 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,078 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,078 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,078 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,079 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,079 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,079 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,079 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,079 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,079 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,079 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,080 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,080 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,080 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,080 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,080 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,080 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,080 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,081 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,081 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,081 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,081 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,081 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,081 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,082 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,082 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,082 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,082 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,083 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,083 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,083 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,083 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,084 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,084 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,084 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,085 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,085 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,085 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,085 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,085 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,086 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,086 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,086 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,086 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,086 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,087 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,087 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,087 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,087 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,087 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,087 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,088 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,088 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,088 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,088 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,088 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,089 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,089 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,089 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,089 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,089 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,090 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,090 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,090 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,090 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,090 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,091 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,091 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,091 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,091 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,091 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,092 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,092 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,092 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,092 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,092 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,093 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,093 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,093 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,093 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,093 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,093 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,094 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,094 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,094 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,094 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,094 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,095 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,095 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,095 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,095 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,095 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,096 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,096 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,096 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,096 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,096 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,096 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,097 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,097 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,097 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,097 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,098 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,098 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,098 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,098 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,098 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,099 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,099 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,099 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,099 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,099 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,100 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,100 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,100 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,100 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,100 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,100 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,101 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,101 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,101 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,101 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,101 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,102 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,102 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,102 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,102 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,102 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,103 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,105 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,105 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,105 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,106 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,106 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,106 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,106 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,106 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,106 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,106 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,106 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,107 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,107 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,109 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,109 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,109 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,109 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,110 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,110 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,110 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,110 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:44:36,117 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 21:44:36,118 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 21:44:36,126 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 21:44:36,138 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 21:44:36,159 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 21:44:36,159 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 21:44:36,159 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 21:44:36,159 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 21:44:36,159 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 21:44:36,159 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 21:44:36,159 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 21:44:36,159 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 21:44:36,173 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 140 places, 178 transitions [2019-11-15 21:44:39,326 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 32590 states. [2019-11-15 21:44:39,328 INFO L276 IsEmpty]: Start isEmpty. Operand 32590 states. [2019-11-15 21:44:39,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-11-15 21:44:39,336 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:44:39,337 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:44:39,340 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:44:39,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:44:39,347 INFO L82 PathProgramCache]: Analyzing trace with hash -254800073, now seen corresponding path program 1 times [2019-11-15 21:44:39,357 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:44:39,357 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1939640414] [2019-11-15 21:44:39,358 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:44:39,358 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:44:39,358 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:44:39,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:44:39,724 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:44:39,727 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1939640414] [2019-11-15 21:44:39,728 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:44:39,729 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:44:39,729 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [830999818] [2019-11-15 21:44:39,734 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:44:39,734 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:44:39,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:44:39,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:44:39,748 INFO L87 Difference]: Start difference. First operand 32590 states. Second operand 4 states. [2019-11-15 21:44:40,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:44:40,511 INFO L93 Difference]: Finished difference Result 33590 states and 129567 transitions. [2019-11-15 21:44:40,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:44:40,512 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2019-11-15 21:44:40,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:44:40,792 INFO L225 Difference]: With dead ends: 33590 [2019-11-15 21:44:40,792 INFO L226 Difference]: Without dead ends: 25702 [2019-11-15 21:44:40,795 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:44:41,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25702 states. [2019-11-15 21:44:42,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25702 to 25702. [2019-11-15 21:44:42,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25702 states. [2019-11-15 21:44:42,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25702 states to 25702 states and 99583 transitions. [2019-11-15 21:44:42,661 INFO L78 Accepts]: Start accepts. Automaton has 25702 states and 99583 transitions. Word has length 33 [2019-11-15 21:44:42,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:44:42,661 INFO L462 AbstractCegarLoop]: Abstraction has 25702 states and 99583 transitions. [2019-11-15 21:44:42,662 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:44:42,662 INFO L276 IsEmpty]: Start isEmpty. Operand 25702 states and 99583 transitions. [2019-11-15 21:44:42,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-15 21:44:42,679 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:44:42,679 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:44:42,680 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:44:42,680 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:44:42,680 INFO L82 PathProgramCache]: Analyzing trace with hash -250081261, now seen corresponding path program 1 times [2019-11-15 21:44:42,681 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:44:42,681 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [973056847] [2019-11-15 21:44:42,681 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:44:42,681 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:44:42,682 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:44:42,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:44:42,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:44:42,883 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [973056847] [2019-11-15 21:44:42,883 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:44:42,883 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:44:42,884 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1186373694] [2019-11-15 21:44:42,885 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:44:42,885 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:44:42,885 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:44:42,886 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:44:42,886 INFO L87 Difference]: Start difference. First operand 25702 states and 99583 transitions. Second operand 5 states. [2019-11-15 21:44:44,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:44:44,034 INFO L93 Difference]: Finished difference Result 41080 states and 150430 transitions. [2019-11-15 21:44:44,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:44:44,035 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-11-15 21:44:44,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:44:44,239 INFO L225 Difference]: With dead ends: 41080 [2019-11-15 21:44:44,240 INFO L226 Difference]: Without dead ends: 40544 [2019-11-15 21:44:44,241 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:44:44,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40544 states. [2019-11-15 21:44:45,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40544 to 38924. [2019-11-15 21:44:45,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38924 states. [2019-11-15 21:44:45,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38924 states to 38924 states and 143580 transitions. [2019-11-15 21:44:45,955 INFO L78 Accepts]: Start accepts. Automaton has 38924 states and 143580 transitions. Word has length 45 [2019-11-15 21:44:45,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:44:45,956 INFO L462 AbstractCegarLoop]: Abstraction has 38924 states and 143580 transitions. [2019-11-15 21:44:45,956 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:44:45,957 INFO L276 IsEmpty]: Start isEmpty. Operand 38924 states and 143580 transitions. [2019-11-15 21:44:45,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-11-15 21:44:45,965 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:44:45,965 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:44:45,965 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:44:45,966 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:44:45,966 INFO L82 PathProgramCache]: Analyzing trace with hash -1037182150, now seen corresponding path program 1 times [2019-11-15 21:44:45,966 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:44:45,967 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [973496644] [2019-11-15 21:44:45,967 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:44:45,967 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:44:45,967 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:44:46,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:44:46,103 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:44:46,103 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [973496644] [2019-11-15 21:44:46,104 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:44:46,104 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:44:46,104 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1477286766] [2019-11-15 21:44:46,105 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:44:46,105 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:44:46,105 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:44:46,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:44:46,106 INFO L87 Difference]: Start difference. First operand 38924 states and 143580 transitions. Second operand 5 states. [2019-11-15 21:44:46,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:44:46,804 INFO L93 Difference]: Finished difference Result 49777 states and 180632 transitions. [2019-11-15 21:44:46,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:44:46,806 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2019-11-15 21:44:46,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:44:47,045 INFO L225 Difference]: With dead ends: 49777 [2019-11-15 21:44:47,046 INFO L226 Difference]: Without dead ends: 49273 [2019-11-15 21:44:47,047 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:44:48,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49273 states. [2019-11-15 21:44:49,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49273 to 42676. [2019-11-15 21:44:49,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42676 states. [2019-11-15 21:44:49,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42676 states to 42676 states and 156591 transitions. [2019-11-15 21:44:49,336 INFO L78 Accepts]: Start accepts. Automaton has 42676 states and 156591 transitions. Word has length 46 [2019-11-15 21:44:49,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:44:49,337 INFO L462 AbstractCegarLoop]: Abstraction has 42676 states and 156591 transitions. [2019-11-15 21:44:49,337 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:44:49,337 INFO L276 IsEmpty]: Start isEmpty. Operand 42676 states and 156591 transitions. [2019-11-15 21:44:49,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-11-15 21:44:49,350 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:44:49,350 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:44:49,350 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:44:49,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:44:49,351 INFO L82 PathProgramCache]: Analyzing trace with hash 671596896, now seen corresponding path program 1 times [2019-11-15 21:44:49,351 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:44:49,352 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1342915002] [2019-11-15 21:44:49,352 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:44:49,352 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:44:49,352 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:44:49,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:44:49,404 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:44:49,405 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1342915002] [2019-11-15 21:44:49,405 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:44:49,406 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:44:49,406 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041888790] [2019-11-15 21:44:49,406 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:44:49,407 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:44:49,407 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:44:49,407 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:44:49,408 INFO L87 Difference]: Start difference. First operand 42676 states and 156591 transitions. Second operand 3 states. [2019-11-15 21:44:49,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:44:49,713 INFO L93 Difference]: Finished difference Result 61086 states and 221429 transitions. [2019-11-15 21:44:49,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:44:49,713 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2019-11-15 21:44:49,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:44:50,945 INFO L225 Difference]: With dead ends: 61086 [2019-11-15 21:44:50,945 INFO L226 Difference]: Without dead ends: 61086 [2019-11-15 21:44:50,949 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:44:51,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61086 states. [2019-11-15 21:44:52,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61086 to 48015. [2019-11-15 21:44:52,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48015 states. [2019-11-15 21:44:52,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48015 states to 48015 states and 174178 transitions. [2019-11-15 21:44:52,208 INFO L78 Accepts]: Start accepts. Automaton has 48015 states and 174178 transitions. Word has length 48 [2019-11-15 21:44:52,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:44:52,208 INFO L462 AbstractCegarLoop]: Abstraction has 48015 states and 174178 transitions. [2019-11-15 21:44:52,209 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:44:52,209 INFO L276 IsEmpty]: Start isEmpty. Operand 48015 states and 174178 transitions. [2019-11-15 21:44:52,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-15 21:44:52,227 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:44:52,228 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:44:52,228 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:44:52,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:44:52,228 INFO L82 PathProgramCache]: Analyzing trace with hash -934557998, now seen corresponding path program 1 times [2019-11-15 21:44:52,229 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:44:52,229 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [653913746] [2019-11-15 21:44:52,229 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:44:52,229 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:44:52,229 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:44:52,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:44:52,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:44:52,383 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [653913746] [2019-11-15 21:44:52,383 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:44:52,384 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:44:52,384 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1039141239] [2019-11-15 21:44:52,385 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:44:52,385 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:44:52,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:44:52,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:44:52,386 INFO L87 Difference]: Start difference. First operand 48015 states and 174178 transitions. Second operand 6 states. [2019-11-15 21:44:53,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:44:53,405 INFO L93 Difference]: Finished difference Result 63755 states and 229378 transitions. [2019-11-15 21:44:53,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:44:53,406 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-15 21:44:53,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:44:53,588 INFO L225 Difference]: With dead ends: 63755 [2019-11-15 21:44:53,588 INFO L226 Difference]: Without dead ends: 63755 [2019-11-15 21:44:53,589 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:44:55,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63755 states. [2019-11-15 21:44:55,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63755 to 59948. [2019-11-15 21:44:55,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59948 states. [2019-11-15 21:44:55,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59948 states to 59948 states and 215671 transitions. [2019-11-15 21:44:55,989 INFO L78 Accepts]: Start accepts. Automaton has 59948 states and 215671 transitions. Word has length 52 [2019-11-15 21:44:55,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:44:55,990 INFO L462 AbstractCegarLoop]: Abstraction has 59948 states and 215671 transitions. [2019-11-15 21:44:55,990 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:44:55,990 INFO L276 IsEmpty]: Start isEmpty. Operand 59948 states and 215671 transitions. [2019-11-15 21:44:56,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-15 21:44:56,011 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:44:56,012 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:44:56,012 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:44:56,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:44:56,013 INFO L82 PathProgramCache]: Analyzing trace with hash 1563457939, now seen corresponding path program 1 times [2019-11-15 21:44:56,013 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:44:56,013 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2106826262] [2019-11-15 21:44:56,014 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:44:56,014 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:44:56,014 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:44:56,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:44:56,157 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:44:56,158 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2106826262] [2019-11-15 21:44:56,158 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:44:56,158 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:44:56,159 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1255035264] [2019-11-15 21:44:56,159 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:44:56,159 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:44:56,160 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:44:56,160 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:44:56,160 INFO L87 Difference]: Start difference. First operand 59948 states and 215671 transitions. Second operand 7 states. [2019-11-15 21:44:57,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:44:57,593 INFO L93 Difference]: Finished difference Result 83684 states and 290096 transitions. [2019-11-15 21:44:57,593 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 21:44:57,594 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-11-15 21:44:57,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:44:57,788 INFO L225 Difference]: With dead ends: 83684 [2019-11-15 21:44:57,788 INFO L226 Difference]: Without dead ends: 83684 [2019-11-15 21:44:57,789 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:45:01,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83684 states. [2019-11-15 21:45:02,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83684 to 71011. [2019-11-15 21:45:02,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71011 states. [2019-11-15 21:45:03,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71011 states to 71011 states and 249885 transitions. [2019-11-15 21:45:03,105 INFO L78 Accepts]: Start accepts. Automaton has 71011 states and 249885 transitions. Word has length 52 [2019-11-15 21:45:03,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:03,105 INFO L462 AbstractCegarLoop]: Abstraction has 71011 states and 249885 transitions. [2019-11-15 21:45:03,105 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:45:03,105 INFO L276 IsEmpty]: Start isEmpty. Operand 71011 states and 249885 transitions. [2019-11-15 21:45:03,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-15 21:45:03,120 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:03,120 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:03,120 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:03,121 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:03,121 INFO L82 PathProgramCache]: Analyzing trace with hash -1844005676, now seen corresponding path program 1 times [2019-11-15 21:45:03,121 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:03,121 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1230229590] [2019-11-15 21:45:03,122 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:03,122 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:03,122 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:03,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:03,189 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:03,189 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1230229590] [2019-11-15 21:45:03,189 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:03,190 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:45:03,190 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1076460659] [2019-11-15 21:45:03,190 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:45:03,190 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:03,191 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:45:03,191 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:45:03,191 INFO L87 Difference]: Start difference. First operand 71011 states and 249885 transitions. Second operand 3 states. [2019-11-15 21:45:03,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:03,424 INFO L93 Difference]: Finished difference Result 54020 states and 188917 transitions. [2019-11-15 21:45:03,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:45:03,425 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-11-15 21:45:03,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:03,553 INFO L225 Difference]: With dead ends: 54020 [2019-11-15 21:45:03,553 INFO L226 Difference]: Without dead ends: 54020 [2019-11-15 21:45:03,553 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:45:03,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54020 states. [2019-11-15 21:45:05,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54020 to 53405. [2019-11-15 21:45:05,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53405 states. [2019-11-15 21:45:05,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53405 states to 53405 states and 187036 transitions. [2019-11-15 21:45:05,575 INFO L78 Accepts]: Start accepts. Automaton has 53405 states and 187036 transitions. Word has length 52 [2019-11-15 21:45:05,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:05,576 INFO L462 AbstractCegarLoop]: Abstraction has 53405 states and 187036 transitions. [2019-11-15 21:45:05,576 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:45:05,576 INFO L276 IsEmpty]: Start isEmpty. Operand 53405 states and 187036 transitions. [2019-11-15 21:45:05,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-15 21:45:05,586 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:05,587 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:05,587 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:05,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:05,587 INFO L82 PathProgramCache]: Analyzing trace with hash -456832597, now seen corresponding path program 1 times [2019-11-15 21:45:05,587 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:05,587 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [204835828] [2019-11-15 21:45:05,587 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:05,588 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:05,588 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:05,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:05,654 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:05,655 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [204835828] [2019-11-15 21:45:05,655 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:05,655 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:45:05,655 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1216671241] [2019-11-15 21:45:05,655 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:45:05,655 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:05,656 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:45:05,656 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:45:05,656 INFO L87 Difference]: Start difference. First operand 53405 states and 187036 transitions. Second operand 6 states. [2019-11-15 21:45:06,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:06,484 INFO L93 Difference]: Finished difference Result 68645 states and 237300 transitions. [2019-11-15 21:45:06,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 21:45:06,485 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-15 21:45:06,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:06,632 INFO L225 Difference]: With dead ends: 68645 [2019-11-15 21:45:06,632 INFO L226 Difference]: Without dead ends: 68077 [2019-11-15 21:45:06,633 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2019-11-15 21:45:06,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68077 states. [2019-11-15 21:45:07,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68077 to 53489. [2019-11-15 21:45:07,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53489 states. [2019-11-15 21:45:07,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53489 states to 53489 states and 187733 transitions. [2019-11-15 21:45:07,856 INFO L78 Accepts]: Start accepts. Automaton has 53489 states and 187733 transitions. Word has length 52 [2019-11-15 21:45:07,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:07,856 INFO L462 AbstractCegarLoop]: Abstraction has 53489 states and 187733 transitions. [2019-11-15 21:45:07,856 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:45:07,856 INFO L276 IsEmpty]: Start isEmpty. Operand 53489 states and 187733 transitions. [2019-11-15 21:45:07,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-15 21:45:07,869 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:07,869 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:07,869 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:07,869 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:07,869 INFO L82 PathProgramCache]: Analyzing trace with hash -1423918431, now seen corresponding path program 1 times [2019-11-15 21:45:07,870 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:07,870 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1194815682] [2019-11-15 21:45:07,870 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:07,870 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:07,870 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:07,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:08,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:08,017 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1194815682] [2019-11-15 21:45:08,018 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:08,018 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:45:08,019 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [231734624] [2019-11-15 21:45:08,019 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:45:08,020 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:08,021 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:45:08,021 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:45:08,022 INFO L87 Difference]: Start difference. First operand 53489 states and 187733 transitions. Second operand 6 states. [2019-11-15 21:45:08,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:08,842 INFO L93 Difference]: Finished difference Result 96424 states and 331752 transitions. [2019-11-15 21:45:08,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:45:08,843 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-11-15 21:45:08,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:09,044 INFO L225 Difference]: With dead ends: 96424 [2019-11-15 21:45:09,044 INFO L226 Difference]: Without dead ends: 96424 [2019-11-15 21:45:09,045 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:45:09,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96424 states. [2019-11-15 21:45:11,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96424 to 70773. [2019-11-15 21:45:11,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70773 states. [2019-11-15 21:45:11,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70773 states to 70773 states and 244809 transitions. [2019-11-15 21:45:11,411 INFO L78 Accepts]: Start accepts. Automaton has 70773 states and 244809 transitions. Word has length 53 [2019-11-15 21:45:11,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:11,411 INFO L462 AbstractCegarLoop]: Abstraction has 70773 states and 244809 transitions. [2019-11-15 21:45:11,411 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:45:11,412 INFO L276 IsEmpty]: Start isEmpty. Operand 70773 states and 244809 transitions. [2019-11-15 21:45:11,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-15 21:45:11,425 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:11,425 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:11,426 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:11,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:11,426 INFO L82 PathProgramCache]: Analyzing trace with hash -536414750, now seen corresponding path program 1 times [2019-11-15 21:45:11,426 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:11,426 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [968370311] [2019-11-15 21:45:11,426 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:11,426 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:11,426 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:11,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:11,510 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:11,511 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [968370311] [2019-11-15 21:45:11,511 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:11,511 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:45:11,511 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1690606872] [2019-11-15 21:45:11,512 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:45:11,512 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:11,512 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:45:11,512 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:45:11,512 INFO L87 Difference]: Start difference. First operand 70773 states and 244809 transitions. Second operand 4 states. [2019-11-15 21:45:11,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:11,587 INFO L93 Difference]: Finished difference Result 12386 states and 37621 transitions. [2019-11-15 21:45:11,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:45:11,588 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 53 [2019-11-15 21:45:11,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:11,603 INFO L225 Difference]: With dead ends: 12386 [2019-11-15 21:45:11,604 INFO L226 Difference]: Without dead ends: 10681 [2019-11-15 21:45:11,604 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:45:11,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10681 states. [2019-11-15 21:45:11,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10681 to 10633. [2019-11-15 21:45:11,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10633 states. [2019-11-15 21:45:11,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10633 states to 10633 states and 31700 transitions. [2019-11-15 21:45:11,754 INFO L78 Accepts]: Start accepts. Automaton has 10633 states and 31700 transitions. Word has length 53 [2019-11-15 21:45:11,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:11,754 INFO L462 AbstractCegarLoop]: Abstraction has 10633 states and 31700 transitions. [2019-11-15 21:45:11,754 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:45:11,754 INFO L276 IsEmpty]: Start isEmpty. Operand 10633 states and 31700 transitions. [2019-11-15 21:45:11,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-15 21:45:11,757 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:11,758 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:11,758 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:11,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:11,758 INFO L82 PathProgramCache]: Analyzing trace with hash -257891193, now seen corresponding path program 1 times [2019-11-15 21:45:11,758 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:11,758 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [774001630] [2019-11-15 21:45:11,759 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:11,759 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:11,759 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:11,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:11,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:11,808 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [774001630] [2019-11-15 21:45:11,808 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:11,808 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:45:11,808 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [303915163] [2019-11-15 21:45:11,809 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:45:11,809 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:11,809 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:45:11,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:45:11,810 INFO L87 Difference]: Start difference. First operand 10633 states and 31700 transitions. Second operand 4 states. [2019-11-15 21:45:11,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:11,983 INFO L93 Difference]: Finished difference Result 12165 states and 36338 transitions. [2019-11-15 21:45:11,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:45:11,984 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 60 [2019-11-15 21:45:11,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:12,007 INFO L225 Difference]: With dead ends: 12165 [2019-11-15 21:45:12,007 INFO L226 Difference]: Without dead ends: 12165 [2019-11-15 21:45:12,008 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:45:12,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12165 states. [2019-11-15 21:45:12,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12165 to 10963. [2019-11-15 21:45:12,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10963 states. [2019-11-15 21:45:12,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10963 states to 10963 states and 32702 transitions. [2019-11-15 21:45:12,192 INFO L78 Accepts]: Start accepts. Automaton has 10963 states and 32702 transitions. Word has length 60 [2019-11-15 21:45:12,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:12,192 INFO L462 AbstractCegarLoop]: Abstraction has 10963 states and 32702 transitions. [2019-11-15 21:45:12,192 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:45:12,192 INFO L276 IsEmpty]: Start isEmpty. Operand 10963 states and 32702 transitions. [2019-11-15 21:45:12,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-15 21:45:12,195 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:12,196 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:12,196 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:12,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:12,196 INFO L82 PathProgramCache]: Analyzing trace with hash 1484919142, now seen corresponding path program 1 times [2019-11-15 21:45:12,196 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:12,196 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [802335626] [2019-11-15 21:45:12,196 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:12,197 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:12,197 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:12,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:12,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:12,256 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [802335626] [2019-11-15 21:45:12,256 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:12,256 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:45:12,256 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [663486017] [2019-11-15 21:45:12,256 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:45:12,257 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:12,257 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:45:12,257 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:45:12,257 INFO L87 Difference]: Start difference. First operand 10963 states and 32702 transitions. Second operand 6 states. [2019-11-15 21:45:12,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:12,727 INFO L93 Difference]: Finished difference Result 13789 states and 40570 transitions. [2019-11-15 21:45:12,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 21:45:12,728 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-11-15 21:45:12,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:12,748 INFO L225 Difference]: With dead ends: 13789 [2019-11-15 21:45:12,748 INFO L226 Difference]: Without dead ends: 13728 [2019-11-15 21:45:12,748 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 21:45:12,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13728 states. [2019-11-15 21:45:12,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13728 to 12854. [2019-11-15 21:45:12,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12854 states. [2019-11-15 21:45:12,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12854 states to 12854 states and 38040 transitions. [2019-11-15 21:45:12,944 INFO L78 Accepts]: Start accepts. Automaton has 12854 states and 38040 transitions. Word has length 60 [2019-11-15 21:45:12,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:12,944 INFO L462 AbstractCegarLoop]: Abstraction has 12854 states and 38040 transitions. [2019-11-15 21:45:12,944 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:45:12,945 INFO L276 IsEmpty]: Start isEmpty. Operand 12854 states and 38040 transitions. [2019-11-15 21:45:12,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 21:45:12,951 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:12,951 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:12,951 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:12,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:12,951 INFO L82 PathProgramCache]: Analyzing trace with hash 1081136040, now seen corresponding path program 1 times [2019-11-15 21:45:12,951 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:12,952 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1489397553] [2019-11-15 21:45:12,952 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:12,952 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:12,952 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:12,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:13,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:13,023 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1489397553] [2019-11-15 21:45:13,023 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:13,024 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:45:13,024 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [736106239] [2019-11-15 21:45:13,024 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:45:13,024 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:13,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:45:13,025 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:45:13,025 INFO L87 Difference]: Start difference. First operand 12854 states and 38040 transitions. Second operand 4 states. [2019-11-15 21:45:13,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:13,418 INFO L93 Difference]: Finished difference Result 15947 states and 46763 transitions. [2019-11-15 21:45:13,419 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:45:13,419 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-11-15 21:45:13,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:13,442 INFO L225 Difference]: With dead ends: 15947 [2019-11-15 21:45:13,442 INFO L226 Difference]: Without dead ends: 15947 [2019-11-15 21:45:13,443 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:45:13,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15947 states. [2019-11-15 21:45:13,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15947 to 14216. [2019-11-15 21:45:13,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14216 states. [2019-11-15 21:45:13,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14216 states to 14216 states and 41815 transitions. [2019-11-15 21:45:13,660 INFO L78 Accepts]: Start accepts. Automaton has 14216 states and 41815 transitions. Word has length 66 [2019-11-15 21:45:13,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:13,660 INFO L462 AbstractCegarLoop]: Abstraction has 14216 states and 41815 transitions. [2019-11-15 21:45:13,660 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:45:13,661 INFO L276 IsEmpty]: Start isEmpty. Operand 14216 states and 41815 transitions. [2019-11-15 21:45:13,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 21:45:13,669 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:13,669 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:13,669 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:13,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:13,669 INFO L82 PathProgramCache]: Analyzing trace with hash -1969066775, now seen corresponding path program 1 times [2019-11-15 21:45:13,669 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:13,670 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [267093044] [2019-11-15 21:45:13,670 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:13,670 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:13,670 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:13,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:13,799 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:13,800 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [267093044] [2019-11-15 21:45:13,800 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:13,800 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:45:13,800 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1710280742] [2019-11-15 21:45:13,801 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:45:13,801 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:13,801 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:45:13,802 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:45:13,802 INFO L87 Difference]: Start difference. First operand 14216 states and 41815 transitions. Second operand 6 states. [2019-11-15 21:45:14,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:14,316 INFO L93 Difference]: Finished difference Result 15413 states and 44700 transitions. [2019-11-15 21:45:14,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:45:14,317 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-11-15 21:45:14,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:14,339 INFO L225 Difference]: With dead ends: 15413 [2019-11-15 21:45:14,339 INFO L226 Difference]: Without dead ends: 15413 [2019-11-15 21:45:14,340 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:45:14,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15413 states. [2019-11-15 21:45:14,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15413 to 15089. [2019-11-15 21:45:14,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15089 states. [2019-11-15 21:45:14,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15089 states to 15089 states and 43878 transitions. [2019-11-15 21:45:14,559 INFO L78 Accepts]: Start accepts. Automaton has 15089 states and 43878 transitions. Word has length 66 [2019-11-15 21:45:14,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:14,560 INFO L462 AbstractCegarLoop]: Abstraction has 15089 states and 43878 transitions. [2019-11-15 21:45:14,560 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:45:14,560 INFO L276 IsEmpty]: Start isEmpty. Operand 15089 states and 43878 transitions. [2019-11-15 21:45:14,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 21:45:14,569 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:14,569 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:14,569 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:14,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:14,569 INFO L82 PathProgramCache]: Analyzing trace with hash -1007452758, now seen corresponding path program 1 times [2019-11-15 21:45:14,569 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:14,570 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [25654244] [2019-11-15 21:45:14,570 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:14,570 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:14,570 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:14,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:14,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:14,700 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [25654244] [2019-11-15 21:45:14,700 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:14,701 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:45:14,701 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [928266253] [2019-11-15 21:45:14,701 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:45:14,701 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:14,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:45:14,702 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:45:14,702 INFO L87 Difference]: Start difference. First operand 15089 states and 43878 transitions. Second operand 6 states. [2019-11-15 21:45:15,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:15,173 INFO L93 Difference]: Finished difference Result 17155 states and 48592 transitions. [2019-11-15 21:45:15,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 21:45:15,174 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-11-15 21:45:15,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:15,198 INFO L225 Difference]: With dead ends: 17155 [2019-11-15 21:45:15,198 INFO L226 Difference]: Without dead ends: 17155 [2019-11-15 21:45:15,198 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:45:15,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17155 states. [2019-11-15 21:45:15,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17155 to 15619. [2019-11-15 21:45:15,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15619 states. [2019-11-15 21:45:15,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15619 states to 15619 states and 44726 transitions. [2019-11-15 21:45:15,444 INFO L78 Accepts]: Start accepts. Automaton has 15619 states and 44726 transitions. Word has length 66 [2019-11-15 21:45:15,444 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:15,445 INFO L462 AbstractCegarLoop]: Abstraction has 15619 states and 44726 transitions. [2019-11-15 21:45:15,445 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:45:15,445 INFO L276 IsEmpty]: Start isEmpty. Operand 15619 states and 44726 transitions. [2019-11-15 21:45:15,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 21:45:15,456 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:15,457 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:15,457 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:15,457 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:15,458 INFO L82 PathProgramCache]: Analyzing trace with hash -796101845, now seen corresponding path program 1 times [2019-11-15 21:45:15,458 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:15,458 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [231783822] [2019-11-15 21:45:15,458 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:15,459 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:15,459 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:15,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:15,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:15,540 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [231783822] [2019-11-15 21:45:15,540 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:15,540 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:45:15,541 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1433119154] [2019-11-15 21:45:15,541 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:45:15,542 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:15,542 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:45:15,542 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:45:15,542 INFO L87 Difference]: Start difference. First operand 15619 states and 44726 transitions. Second operand 5 states. [2019-11-15 21:45:15,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:15,965 INFO L93 Difference]: Finished difference Result 19634 states and 55999 transitions. [2019-11-15 21:45:15,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:45:15,966 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-11-15 21:45:15,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:15,993 INFO L225 Difference]: With dead ends: 19634 [2019-11-15 21:45:15,993 INFO L226 Difference]: Without dead ends: 19634 [2019-11-15 21:45:15,994 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:45:16,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19634 states. [2019-11-15 21:45:16,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19634 to 18191. [2019-11-15 21:45:16,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18191 states. [2019-11-15 21:45:16,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18191 states to 18191 states and 51753 transitions. [2019-11-15 21:45:16,402 INFO L78 Accepts]: Start accepts. Automaton has 18191 states and 51753 transitions. Word has length 66 [2019-11-15 21:45:16,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:16,402 INFO L462 AbstractCegarLoop]: Abstraction has 18191 states and 51753 transitions. [2019-11-15 21:45:16,402 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:45:16,402 INFO L276 IsEmpty]: Start isEmpty. Operand 18191 states and 51753 transitions. [2019-11-15 21:45:16,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 21:45:16,410 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:16,410 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:16,410 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:16,410 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:16,411 INFO L82 PathProgramCache]: Analyzing trace with hash -1306636022, now seen corresponding path program 1 times [2019-11-15 21:45:16,411 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:16,411 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1522516702] [2019-11-15 21:45:16,411 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:16,412 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:16,412 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:16,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:16,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:16,465 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1522516702] [2019-11-15 21:45:16,466 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:16,466 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:45:16,466 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [909915166] [2019-11-15 21:45:16,466 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:45:16,467 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:16,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:45:16,467 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:45:16,467 INFO L87 Difference]: Start difference. First operand 18191 states and 51753 transitions. Second operand 4 states. [2019-11-15 21:45:16,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:16,988 INFO L93 Difference]: Finished difference Result 21605 states and 61304 transitions. [2019-11-15 21:45:16,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:45:16,989 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-11-15 21:45:16,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:17,020 INFO L225 Difference]: With dead ends: 21605 [2019-11-15 21:45:17,020 INFO L226 Difference]: Without dead ends: 21383 [2019-11-15 21:45:17,020 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:45:17,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21383 states. [2019-11-15 21:45:17,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21383 to 20513. [2019-11-15 21:45:17,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20513 states. [2019-11-15 21:45:17,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20513 states to 20513 states and 58140 transitions. [2019-11-15 21:45:17,328 INFO L78 Accepts]: Start accepts. Automaton has 20513 states and 58140 transitions. Word has length 66 [2019-11-15 21:45:17,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:17,328 INFO L462 AbstractCegarLoop]: Abstraction has 20513 states and 58140 transitions. [2019-11-15 21:45:17,328 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:45:17,329 INFO L276 IsEmpty]: Start isEmpty. Operand 20513 states and 58140 transitions. [2019-11-15 21:45:17,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 21:45:17,336 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:17,337 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:17,337 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:17,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:17,337 INFO L82 PathProgramCache]: Analyzing trace with hash 303876234, now seen corresponding path program 1 times [2019-11-15 21:45:17,338 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:17,338 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2146968249] [2019-11-15 21:45:17,338 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:17,338 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:17,338 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:17,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:17,480 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:17,480 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2146968249] [2019-11-15 21:45:17,480 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:17,481 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:45:17,481 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [204160836] [2019-11-15 21:45:17,481 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:45:17,481 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:17,482 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:45:17,482 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:45:17,482 INFO L87 Difference]: Start difference. First operand 20513 states and 58140 transitions. Second operand 7 states. [2019-11-15 21:45:18,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:18,081 INFO L93 Difference]: Finished difference Result 21797 states and 60750 transitions. [2019-11-15 21:45:18,082 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 21:45:18,082 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-11-15 21:45:18,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:18,112 INFO L225 Difference]: With dead ends: 21797 [2019-11-15 21:45:18,112 INFO L226 Difference]: Without dead ends: 21797 [2019-11-15 21:45:18,113 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=87, Unknown=0, NotChecked=0, Total=132 [2019-11-15 21:45:18,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21797 states. [2019-11-15 21:45:18,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21797 to 18364. [2019-11-15 21:45:18,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18364 states. [2019-11-15 21:45:18,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18364 states to 18364 states and 51120 transitions. [2019-11-15 21:45:18,385 INFO L78 Accepts]: Start accepts. Automaton has 18364 states and 51120 transitions. Word has length 66 [2019-11-15 21:45:18,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:18,385 INFO L462 AbstractCegarLoop]: Abstraction has 18364 states and 51120 transitions. [2019-11-15 21:45:18,385 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:45:18,385 INFO L276 IsEmpty]: Start isEmpty. Operand 18364 states and 51120 transitions. [2019-11-15 21:45:18,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 21:45:18,392 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:18,393 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:18,393 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:18,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:18,393 INFO L82 PathProgramCache]: Analyzing trace with hash 1191379915, now seen corresponding path program 1 times [2019-11-15 21:45:18,393 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:18,393 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619976225] [2019-11-15 21:45:18,394 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:18,394 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:18,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:18,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:18,477 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:18,478 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1619976225] [2019-11-15 21:45:18,478 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:18,478 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:45:18,478 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [61340711] [2019-11-15 21:45:18,479 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:45:18,479 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:18,479 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:45:18,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:45:18,480 INFO L87 Difference]: Start difference. First operand 18364 states and 51120 transitions. Second operand 5 states. [2019-11-15 21:45:18,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:18,543 INFO L93 Difference]: Finished difference Result 6130 states and 14461 transitions. [2019-11-15 21:45:18,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:45:18,544 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-11-15 21:45:18,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:18,550 INFO L225 Difference]: With dead ends: 6130 [2019-11-15 21:45:18,550 INFO L226 Difference]: Without dead ends: 5260 [2019-11-15 21:45:18,551 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:45:18,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5260 states. [2019-11-15 21:45:18,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5260 to 4725. [2019-11-15 21:45:18,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4725 states. [2019-11-15 21:45:18,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4725 states to 4725 states and 10820 transitions. [2019-11-15 21:45:18,622 INFO L78 Accepts]: Start accepts. Automaton has 4725 states and 10820 transitions. Word has length 66 [2019-11-15 21:45:18,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:18,623 INFO L462 AbstractCegarLoop]: Abstraction has 4725 states and 10820 transitions. [2019-11-15 21:45:18,623 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:45:18,623 INFO L276 IsEmpty]: Start isEmpty. Operand 4725 states and 10820 transitions. [2019-11-15 21:45:18,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 21:45:18,628 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:18,629 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:18,629 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:18,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:18,629 INFO L82 PathProgramCache]: Analyzing trace with hash -1738873321, now seen corresponding path program 1 times [2019-11-15 21:45:18,630 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:18,630 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1731757192] [2019-11-15 21:45:18,630 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:18,630 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:18,630 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:18,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:18,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:18,669 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1731757192] [2019-11-15 21:45:18,669 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:18,669 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:45:18,670 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1432509647] [2019-11-15 21:45:18,671 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:45:18,671 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:18,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:45:18,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:45:18,672 INFO L87 Difference]: Start difference. First operand 4725 states and 10820 transitions. Second operand 3 states. [2019-11-15 21:45:18,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:18,716 INFO L93 Difference]: Finished difference Result 5855 states and 13186 transitions. [2019-11-15 21:45:18,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:45:18,719 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-11-15 21:45:18,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:18,726 INFO L225 Difference]: With dead ends: 5855 [2019-11-15 21:45:18,726 INFO L226 Difference]: Without dead ends: 5855 [2019-11-15 21:45:18,727 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:45:18,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5855 states. [2019-11-15 21:45:18,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5855 to 4660. [2019-11-15 21:45:18,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4660 states. [2019-11-15 21:45:18,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4660 states to 4660 states and 10382 transitions. [2019-11-15 21:45:18,806 INFO L78 Accepts]: Start accepts. Automaton has 4660 states and 10382 transitions. Word has length 66 [2019-11-15 21:45:18,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:18,806 INFO L462 AbstractCegarLoop]: Abstraction has 4660 states and 10382 transitions. [2019-11-15 21:45:18,806 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:45:18,807 INFO L276 IsEmpty]: Start isEmpty. Operand 4660 states and 10382 transitions. [2019-11-15 21:45:18,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-11-15 21:45:18,812 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:18,813 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:18,813 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:18,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:18,813 INFO L82 PathProgramCache]: Analyzing trace with hash 1014352042, now seen corresponding path program 1 times [2019-11-15 21:45:18,814 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:18,814 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [820933079] [2019-11-15 21:45:18,814 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:18,814 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:18,814 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:18,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:18,893 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:18,894 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [820933079] [2019-11-15 21:45:18,894 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:18,894 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:45:18,894 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [157580507] [2019-11-15 21:45:18,895 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:45:18,895 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:18,896 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:45:18,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:45:18,900 INFO L87 Difference]: Start difference. First operand 4660 states and 10382 transitions. Second operand 5 states. [2019-11-15 21:45:19,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:19,161 INFO L93 Difference]: Finished difference Result 5721 states and 12811 transitions. [2019-11-15 21:45:19,162 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 21:45:19,162 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2019-11-15 21:45:19,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:19,169 INFO L225 Difference]: With dead ends: 5721 [2019-11-15 21:45:19,169 INFO L226 Difference]: Without dead ends: 5721 [2019-11-15 21:45:19,170 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:45:19,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5721 states. [2019-11-15 21:45:19,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5721 to 5080. [2019-11-15 21:45:19,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5080 states. [2019-11-15 21:45:19,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5080 states to 5080 states and 11340 transitions. [2019-11-15 21:45:19,251 INFO L78 Accepts]: Start accepts. Automaton has 5080 states and 11340 transitions. Word has length 72 [2019-11-15 21:45:19,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:19,252 INFO L462 AbstractCegarLoop]: Abstraction has 5080 states and 11340 transitions. [2019-11-15 21:45:19,252 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:45:19,252 INFO L276 IsEmpty]: Start isEmpty. Operand 5080 states and 11340 transitions. [2019-11-15 21:45:19,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-11-15 21:45:19,259 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:19,260 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:19,260 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:19,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:19,260 INFO L82 PathProgramCache]: Analyzing trace with hash -1537804919, now seen corresponding path program 1 times [2019-11-15 21:45:19,261 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:19,261 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [839958068] [2019-11-15 21:45:19,261 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:19,261 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:19,261 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:19,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:19,370 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:19,370 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [839958068] [2019-11-15 21:45:19,370 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:19,370 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:45:19,371 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [412574972] [2019-11-15 21:45:19,371 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:45:19,371 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:19,371 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:45:19,372 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:45:19,372 INFO L87 Difference]: Start difference. First operand 5080 states and 11340 transitions. Second operand 7 states. [2019-11-15 21:45:19,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:19,743 INFO L93 Difference]: Finished difference Result 5820 states and 12863 transitions. [2019-11-15 21:45:19,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 21:45:19,744 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 72 [2019-11-15 21:45:19,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:19,749 INFO L225 Difference]: With dead ends: 5820 [2019-11-15 21:45:19,749 INFO L226 Difference]: Without dead ends: 5767 [2019-11-15 21:45:19,749 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=211, Unknown=0, NotChecked=0, Total=272 [2019-11-15 21:45:19,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5767 states. [2019-11-15 21:45:19,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5767 to 5167. [2019-11-15 21:45:19,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5167 states. [2019-11-15 21:45:19,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5167 states to 5167 states and 11429 transitions. [2019-11-15 21:45:19,808 INFO L78 Accepts]: Start accepts. Automaton has 5167 states and 11429 transitions. Word has length 72 [2019-11-15 21:45:19,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:19,808 INFO L462 AbstractCegarLoop]: Abstraction has 5167 states and 11429 transitions. [2019-11-15 21:45:19,808 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:45:19,808 INFO L276 IsEmpty]: Start isEmpty. Operand 5167 states and 11429 transitions. [2019-11-15 21:45:19,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 21:45:19,813 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:19,813 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:19,814 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:19,814 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:19,814 INFO L82 PathProgramCache]: Analyzing trace with hash 642995726, now seen corresponding path program 1 times [2019-11-15 21:45:19,814 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:19,814 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1459617319] [2019-11-15 21:45:19,814 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:19,814 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:19,814 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:19,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:19,885 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:19,886 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1459617319] [2019-11-15 21:45:19,886 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:19,886 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:45:19,886 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1951362664] [2019-11-15 21:45:19,889 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:45:19,889 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:19,889 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:45:19,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:45:19,890 INFO L87 Difference]: Start difference. First operand 5167 states and 11429 transitions. Second operand 4 states. [2019-11-15 21:45:20,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:20,046 INFO L93 Difference]: Finished difference Result 6179 states and 13586 transitions. [2019-11-15 21:45:20,047 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:45:20,047 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2019-11-15 21:45:20,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:20,055 INFO L225 Difference]: With dead ends: 6179 [2019-11-15 21:45:20,055 INFO L226 Difference]: Without dead ends: 6179 [2019-11-15 21:45:20,056 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:45:20,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6179 states. [2019-11-15 21:45:20,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6179 to 5466. [2019-11-15 21:45:20,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5466 states. [2019-11-15 21:45:20,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5466 states to 5466 states and 12067 transitions. [2019-11-15 21:45:20,144 INFO L78 Accepts]: Start accepts. Automaton has 5466 states and 12067 transitions. Word has length 93 [2019-11-15 21:45:20,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:20,144 INFO L462 AbstractCegarLoop]: Abstraction has 5466 states and 12067 transitions. [2019-11-15 21:45:20,145 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:45:20,145 INFO L276 IsEmpty]: Start isEmpty. Operand 5466 states and 12067 transitions. [2019-11-15 21:45:20,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:45:20,152 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:20,152 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:20,153 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:20,153 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:20,154 INFO L82 PathProgramCache]: Analyzing trace with hash 831435750, now seen corresponding path program 1 times [2019-11-15 21:45:20,154 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:20,154 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [639974046] [2019-11-15 21:45:20,154 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:20,154 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:20,155 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:20,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:20,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:20,234 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [639974046] [2019-11-15 21:45:20,235 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:20,235 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:45:20,235 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1759460756] [2019-11-15 21:45:20,236 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:45:20,236 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:20,237 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:45:20,237 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:45:20,237 INFO L87 Difference]: Start difference. First operand 5466 states and 12067 transitions. Second operand 5 states. [2019-11-15 21:45:20,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:20,389 INFO L93 Difference]: Finished difference Result 5929 states and 13076 transitions. [2019-11-15 21:45:20,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:45:20,390 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-11-15 21:45:20,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:20,396 INFO L225 Difference]: With dead ends: 5929 [2019-11-15 21:45:20,397 INFO L226 Difference]: Without dead ends: 5929 [2019-11-15 21:45:20,398 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:45:20,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5929 states. [2019-11-15 21:45:20,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5929 to 4550. [2019-11-15 21:45:20,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4550 states. [2019-11-15 21:45:20,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4550 states to 4550 states and 10035 transitions. [2019-11-15 21:45:20,471 INFO L78 Accepts]: Start accepts. Automaton has 4550 states and 10035 transitions. Word has length 95 [2019-11-15 21:45:20,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:20,471 INFO L462 AbstractCegarLoop]: Abstraction has 4550 states and 10035 transitions. [2019-11-15 21:45:20,471 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:45:20,472 INFO L276 IsEmpty]: Start isEmpty. Operand 4550 states and 10035 transitions. [2019-11-15 21:45:20,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:45:20,477 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:20,477 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:20,478 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:20,478 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:20,478 INFO L82 PathProgramCache]: Analyzing trace with hash -1738050649, now seen corresponding path program 1 times [2019-11-15 21:45:20,478 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:20,479 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [669840335] [2019-11-15 21:45:20,479 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:20,479 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:20,479 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:20,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:20,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:20,544 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [669840335] [2019-11-15 21:45:20,545 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:20,545 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:45:20,545 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [803587327] [2019-11-15 21:45:20,546 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:45:20,546 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:20,546 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:45:20,546 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:45:20,546 INFO L87 Difference]: Start difference. First operand 4550 states and 10035 transitions. Second operand 5 states. [2019-11-15 21:45:20,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:20,962 INFO L93 Difference]: Finished difference Result 7548 states and 16761 transitions. [2019-11-15 21:45:20,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 21:45:20,963 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-11-15 21:45:20,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:20,970 INFO L225 Difference]: With dead ends: 7548 [2019-11-15 21:45:20,970 INFO L226 Difference]: Without dead ends: 7530 [2019-11-15 21:45:20,970 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:45:20,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7530 states. [2019-11-15 21:45:21,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7530 to 5665. [2019-11-15 21:45:21,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5665 states. [2019-11-15 21:45:21,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5665 states to 5665 states and 12641 transitions. [2019-11-15 21:45:21,044 INFO L78 Accepts]: Start accepts. Automaton has 5665 states and 12641 transitions. Word has length 95 [2019-11-15 21:45:21,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:21,044 INFO L462 AbstractCegarLoop]: Abstraction has 5665 states and 12641 transitions. [2019-11-15 21:45:21,044 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:45:21,044 INFO L276 IsEmpty]: Start isEmpty. Operand 5665 states and 12641 transitions. [2019-11-15 21:45:21,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:45:21,051 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:21,051 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:21,052 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:21,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:21,052 INFO L82 PathProgramCache]: Analyzing trace with hash -281935255, now seen corresponding path program 1 times [2019-11-15 21:45:21,052 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:21,053 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [598419720] [2019-11-15 21:45:21,053 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:21,053 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:21,053 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:21,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:21,149 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:21,149 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [598419720] [2019-11-15 21:45:21,149 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:21,149 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:45:21,150 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [604738694] [2019-11-15 21:45:21,150 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:45:21,150 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:21,151 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:45:21,151 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:45:21,151 INFO L87 Difference]: Start difference. First operand 5665 states and 12641 transitions. Second operand 5 states. [2019-11-15 21:45:21,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:21,504 INFO L93 Difference]: Finished difference Result 6978 states and 15457 transitions. [2019-11-15 21:45:21,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:45:21,505 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-11-15 21:45:21,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:21,512 INFO L225 Difference]: With dead ends: 6978 [2019-11-15 21:45:21,512 INFO L226 Difference]: Without dead ends: 6864 [2019-11-15 21:45:21,512 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:45:21,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6864 states. [2019-11-15 21:45:21,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6864 to 5978. [2019-11-15 21:45:21,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5978 states. [2019-11-15 21:45:21,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5978 states to 5978 states and 13282 transitions. [2019-11-15 21:45:21,575 INFO L78 Accepts]: Start accepts. Automaton has 5978 states and 13282 transitions. Word has length 95 [2019-11-15 21:45:21,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:21,576 INFO L462 AbstractCegarLoop]: Abstraction has 5978 states and 13282 transitions. [2019-11-15 21:45:21,576 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:45:21,576 INFO L276 IsEmpty]: Start isEmpty. Operand 5978 states and 13282 transitions. [2019-11-15 21:45:21,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:45:21,581 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:21,581 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:21,582 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:21,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:21,582 INFO L82 PathProgramCache]: Analyzing trace with hash -834994143, now seen corresponding path program 2 times [2019-11-15 21:45:21,582 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:21,582 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1994550574] [2019-11-15 21:45:21,583 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:21,583 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:21,583 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:21,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:21,649 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:21,650 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1994550574] [2019-11-15 21:45:21,650 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:21,650 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:45:21,650 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1804808961] [2019-11-15 21:45:21,651 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:45:21,651 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:21,651 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:45:21,651 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:45:21,651 INFO L87 Difference]: Start difference. First operand 5978 states and 13282 transitions. Second operand 5 states. [2019-11-15 21:45:21,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:21,943 INFO L93 Difference]: Finished difference Result 6338 states and 13943 transitions. [2019-11-15 21:45:21,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:45:21,943 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-11-15 21:45:21,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:21,949 INFO L225 Difference]: With dead ends: 6338 [2019-11-15 21:45:21,949 INFO L226 Difference]: Without dead ends: 6309 [2019-11-15 21:45:21,950 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:45:21,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6309 states. [2019-11-15 21:45:22,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6309 to 5890. [2019-11-15 21:45:22,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5890 states. [2019-11-15 21:45:22,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5890 states to 5890 states and 12968 transitions. [2019-11-15 21:45:22,019 INFO L78 Accepts]: Start accepts. Automaton has 5890 states and 12968 transitions. Word has length 95 [2019-11-15 21:45:22,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:22,019 INFO L462 AbstractCegarLoop]: Abstraction has 5890 states and 12968 transitions. [2019-11-15 21:45:22,019 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:45:22,019 INFO L276 IsEmpty]: Start isEmpty. Operand 5890 states and 12968 transitions. [2019-11-15 21:45:22,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:45:22,024 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:22,024 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:22,025 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:22,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:22,025 INFO L82 PathProgramCache]: Analyzing trace with hash -1726734522, now seen corresponding path program 1 times [2019-11-15 21:45:22,025 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:22,025 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [538843254] [2019-11-15 21:45:22,026 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:22,026 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:22,026 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:22,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:22,120 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:22,121 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [538843254] [2019-11-15 21:45:22,121 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:22,121 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:45:22,121 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1961037289] [2019-11-15 21:45:22,122 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:45:22,122 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:22,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:45:22,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:45:22,123 INFO L87 Difference]: Start difference. First operand 5890 states and 12968 transitions. Second operand 6 states. [2019-11-15 21:45:22,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:22,490 INFO L93 Difference]: Finished difference Result 7112 states and 15543 transitions. [2019-11-15 21:45:22,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 21:45:22,491 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 21:45:22,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:22,496 INFO L225 Difference]: With dead ends: 7112 [2019-11-15 21:45:22,497 INFO L226 Difference]: Without dead ends: 7088 [2019-11-15 21:45:22,497 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 21:45:22,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7088 states. [2019-11-15 21:45:22,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7088 to 5429. [2019-11-15 21:45:22,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5429 states. [2019-11-15 21:45:22,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5429 states to 5429 states and 12025 transitions. [2019-11-15 21:45:22,557 INFO L78 Accepts]: Start accepts. Automaton has 5429 states and 12025 transitions. Word has length 95 [2019-11-15 21:45:22,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:22,557 INFO L462 AbstractCegarLoop]: Abstraction has 5429 states and 12025 transitions. [2019-11-15 21:45:22,557 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:45:22,557 INFO L276 IsEmpty]: Start isEmpty. Operand 5429 states and 12025 transitions. [2019-11-15 21:45:22,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:45:22,562 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:22,562 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:22,562 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:22,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:22,562 INFO L82 PathProgramCache]: Analyzing trace with hash -270619128, now seen corresponding path program 1 times [2019-11-15 21:45:22,562 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:22,563 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1120214161] [2019-11-15 21:45:22,563 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:22,563 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:22,563 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:22,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:22,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:22,719 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1120214161] [2019-11-15 21:45:22,719 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:22,720 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:45:22,720 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2105264032] [2019-11-15 21:45:22,721 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 21:45:22,721 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:22,721 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 21:45:22,721 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:45:22,722 INFO L87 Difference]: Start difference. First operand 5429 states and 12025 transitions. Second operand 8 states. [2019-11-15 21:45:23,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:23,490 INFO L93 Difference]: Finished difference Result 6970 states and 15341 transitions. [2019-11-15 21:45:23,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-15 21:45:23,491 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 95 [2019-11-15 21:45:23,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:23,499 INFO L225 Difference]: With dead ends: 6970 [2019-11-15 21:45:23,499 INFO L226 Difference]: Without dead ends: 6902 [2019-11-15 21:45:23,501 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2019-11-15 21:45:23,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6902 states. [2019-11-15 21:45:23,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6902 to 5835. [2019-11-15 21:45:23,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5835 states. [2019-11-15 21:45:23,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5835 states to 5835 states and 12940 transitions. [2019-11-15 21:45:23,586 INFO L78 Accepts]: Start accepts. Automaton has 5835 states and 12940 transitions. Word has length 95 [2019-11-15 21:45:23,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:23,587 INFO L462 AbstractCegarLoop]: Abstraction has 5835 states and 12940 transitions. [2019-11-15 21:45:23,587 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 21:45:23,587 INFO L276 IsEmpty]: Start isEmpty. Operand 5835 states and 12940 transitions. [2019-11-15 21:45:23,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:45:23,594 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:23,594 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:23,594 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:23,595 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:23,595 INFO L82 PathProgramCache]: Analyzing trace with hash -239599321, now seen corresponding path program 1 times [2019-11-15 21:45:23,595 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:23,595 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [68990814] [2019-11-15 21:45:23,595 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:23,596 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:23,596 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:23,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:23,718 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:23,718 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [68990814] [2019-11-15 21:45:23,718 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:23,719 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:45:23,719 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937033830] [2019-11-15 21:45:23,719 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:45:23,719 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:23,720 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:45:23,720 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:45:23,720 INFO L87 Difference]: Start difference. First operand 5835 states and 12940 transitions. Second operand 6 states. [2019-11-15 21:45:23,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:23,962 INFO L93 Difference]: Finished difference Result 6369 states and 14007 transitions. [2019-11-15 21:45:23,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:45:23,963 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 21:45:23,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:23,971 INFO L225 Difference]: With dead ends: 6369 [2019-11-15 21:45:23,971 INFO L226 Difference]: Without dead ends: 6369 [2019-11-15 21:45:23,973 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:45:23,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6369 states. [2019-11-15 21:45:24,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6369 to 5787. [2019-11-15 21:45:24,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5787 states. [2019-11-15 21:45:24,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5787 states to 5787 states and 12842 transitions. [2019-11-15 21:45:24,062 INFO L78 Accepts]: Start accepts. Automaton has 5787 states and 12842 transitions. Word has length 95 [2019-11-15 21:45:24,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:24,063 INFO L462 AbstractCegarLoop]: Abstraction has 5787 states and 12842 transitions. [2019-11-15 21:45:24,063 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:45:24,063 INFO L276 IsEmpty]: Start isEmpty. Operand 5787 states and 12842 transitions. [2019-11-15 21:45:24,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:45:24,070 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:24,070 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:24,071 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:24,071 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:24,072 INFO L82 PathProgramCache]: Analyzing trace with hash -219261946, now seen corresponding path program 1 times [2019-11-15 21:45:24,072 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:24,072 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1776367467] [2019-11-15 21:45:24,072 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:24,072 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:24,073 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:24,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:24,214 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:24,214 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1776367467] [2019-11-15 21:45:24,215 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:24,216 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:45:24,216 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [218789279] [2019-11-15 21:45:24,216 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:45:24,217 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:24,217 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:45:24,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:45:24,217 INFO L87 Difference]: Start difference. First operand 5787 states and 12842 transitions. Second operand 5 states. [2019-11-15 21:45:24,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:24,275 INFO L93 Difference]: Finished difference Result 5787 states and 12833 transitions. [2019-11-15 21:45:24,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:45:24,276 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-11-15 21:45:24,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:24,283 INFO L225 Difference]: With dead ends: 5787 [2019-11-15 21:45:24,283 INFO L226 Difference]: Without dead ends: 5787 [2019-11-15 21:45:24,283 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:45:24,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5787 states. [2019-11-15 21:45:24,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5787 to 5537. [2019-11-15 21:45:24,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5537 states. [2019-11-15 21:45:24,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5537 states to 5537 states and 12268 transitions. [2019-11-15 21:45:24,380 INFO L78 Accepts]: Start accepts. Automaton has 5537 states and 12268 transitions. Word has length 95 [2019-11-15 21:45:24,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:24,380 INFO L462 AbstractCegarLoop]: Abstraction has 5537 states and 12268 transitions. [2019-11-15 21:45:24,380 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:45:24,380 INFO L276 IsEmpty]: Start isEmpty. Operand 5537 states and 12268 transitions. [2019-11-15 21:45:24,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:45:24,388 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:24,388 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:24,388 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:24,389 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:24,389 INFO L82 PathProgramCache]: Analyzing trace with hash 668241735, now seen corresponding path program 1 times [2019-11-15 21:45:24,389 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:24,391 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [300945721] [2019-11-15 21:45:24,392 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:24,392 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:24,392 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:24,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:45:24,604 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:45:24,606 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [300945721] [2019-11-15 21:45:24,607 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:45:24,608 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-15 21:45:24,608 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2119873838] [2019-11-15 21:45:24,608 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-15 21:45:24,609 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:45:24,609 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-15 21:45:24,610 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:45:24,610 INFO L87 Difference]: Start difference. First operand 5537 states and 12268 transitions. Second operand 10 states. [2019-11-15 21:45:25,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:45:25,274 INFO L93 Difference]: Finished difference Result 15994 states and 35928 transitions. [2019-11-15 21:45:25,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-11-15 21:45:25,275 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 95 [2019-11-15 21:45:25,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:45:25,286 INFO L225 Difference]: With dead ends: 15994 [2019-11-15 21:45:25,286 INFO L226 Difference]: Without dead ends: 11265 [2019-11-15 21:45:25,288 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=95, Invalid=367, Unknown=0, NotChecked=0, Total=462 [2019-11-15 21:45:25,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11265 states. [2019-11-15 21:45:25,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11265 to 5561. [2019-11-15 21:45:25,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5561 states. [2019-11-15 21:45:25,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5561 states to 5561 states and 12238 transitions. [2019-11-15 21:45:25,428 INFO L78 Accepts]: Start accepts. Automaton has 5561 states and 12238 transitions. Word has length 95 [2019-11-15 21:45:25,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:45:25,428 INFO L462 AbstractCegarLoop]: Abstraction has 5561 states and 12238 transitions. [2019-11-15 21:45:25,428 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-15 21:45:25,428 INFO L276 IsEmpty]: Start isEmpty. Operand 5561 states and 12238 transitions. [2019-11-15 21:45:25,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:45:25,432 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:45:25,433 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:45:25,433 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:45:25,433 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:45:25,433 INFO L82 PathProgramCache]: Analyzing trace with hash -304604341, now seen corresponding path program 2 times [2019-11-15 21:45:25,433 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:45:25,433 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1055171014] [2019-11-15 21:45:25,433 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:25,433 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:45:25,434 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:45:25,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 21:45:25,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 21:45:25,558 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 21:45:25,559 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 21:45:25,748 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 21:45:25,750 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 09:45:25 BasicIcfg [2019-11-15 21:45:25,752 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 21:45:25,753 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 21:45:25,753 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 21:45:25,754 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 21:45:25,754 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:44:36" (3/4) ... [2019-11-15 21:45:25,756 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 21:45:25,908 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_cd372037-e71e-4500-8b60-d5fcabf3ee54/bin/uautomizer/witness.graphml [2019-11-15 21:45:25,908 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 21:45:25,910 INFO L168 Benchmark]: Toolchain (without parser) took 51935.40 ms. Allocated memory was 1.0 GB in the beginning and 5.2 GB in the end (delta: 4.2 GB). Free memory was 940.7 MB in the beginning and 4.4 GB in the end (delta: -3.4 GB). Peak memory consumption was 778.9 MB. Max. memory is 11.5 GB. [2019-11-15 21:45:25,911 INFO L168 Benchmark]: CDTParser took 0.62 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 21:45:25,911 INFO L168 Benchmark]: CACSL2BoogieTranslator took 972.34 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 176.7 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -198.3 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-11-15 21:45:25,912 INFO L168 Benchmark]: Boogie Procedure Inliner took 95.63 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2019-11-15 21:45:25,912 INFO L168 Benchmark]: Boogie Preprocessor took 58.25 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 21:45:25,912 INFO L168 Benchmark]: RCFGBuilder took 908.31 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 48.6 MB). Peak memory consumption was 48.6 MB. Max. memory is 11.5 GB. [2019-11-15 21:45:25,913 INFO L168 Benchmark]: TraceAbstraction took 49734.90 ms. Allocated memory was 1.2 GB in the beginning and 5.2 GB in the end (delta: 4.0 GB). Free memory was 1.1 GB in the beginning and 4.4 GB in the end (delta: -3.3 GB). Peak memory consumption was 725.8 MB. Max. memory is 11.5 GB. [2019-11-15 21:45:25,913 INFO L168 Benchmark]: Witness Printer took 154.72 ms. Allocated memory is still 5.2 GB. Free memory was 4.4 GB in the beginning and 4.4 GB in the end (delta: 19.4 MB). Peak memory consumption was 19.4 MB. Max. memory is 11.5 GB. [2019-11-15 21:45:25,916 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.62 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 972.34 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 176.7 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -198.3 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 95.63 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 58.25 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 908.31 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 48.6 MB). Peak memory consumption was 48.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 49734.90 ms. Allocated memory was 1.2 GB in the beginning and 5.2 GB in the end (delta: 4.0 GB). Free memory was 1.1 GB in the beginning and 4.4 GB in the end (delta: -3.3 GB). Peak memory consumption was 725.8 MB. Max. memory is 11.5 GB. * Witness Printer took 154.72 ms. Allocated memory is still 5.2 GB. Free memory was 4.4 GB in the beginning and 4.4 GB in the end (delta: 19.4 MB). Peak memory consumption was 19.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L698] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L699] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L700] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L702] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L704] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L705] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L706] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L707] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L708] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L709] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L710] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L711] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L712] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L713] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L714] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L715] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L716] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L717] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L718] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L719] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L720] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L793] 0 pthread_t t1545; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L794] FCALL, FORK 0 pthread_create(&t1545, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] 0 pthread_t t1546; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L724] 1 y$w_buff1 = y$w_buff0 [L725] 1 y$w_buff0 = 1 [L726] 1 y$w_buff1_used = y$w_buff0_used [L727] 1 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L729] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L730] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L731] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L732] 1 y$r_buff0_thd1 = (_Bool)1 [L735] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L738] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L796] FCALL, FORK 0 pthread_create(&t1546, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] 2 x = 1 [L755] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L756] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L757] 2 y$flush_delayed = weak$$choice2 [L758] 2 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L759] EXPR 2 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L738] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L739] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L759] 2 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L739] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L740] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L760] EXPR 2 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0))=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L760] 2 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L761] EXPR 2 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L761] 2 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L762] EXPR 2 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L762] 2 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L763] EXPR 2 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L763] 2 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L764] EXPR 2 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L764] 2 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L765] EXPR 2 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L765] 2 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L766] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L767] EXPR 2 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L767] 2 y = y$flush_delayed ? y$mem_tmp : y [L768] 2 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L771] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L771] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L771] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L771] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L772] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L772] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L773] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L773] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L774] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L774] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L775] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L775] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L778] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L741] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L741] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L742] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L742] 1 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L745] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L803] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L803] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L804] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L805] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L805] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L806] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L806] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L809] 0 main$tmp_guard1 = !(__unbuffered_p0_EAX == 0 && __unbuffered_p1_EAX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 218 locations, 3 error locations. Result: UNSAFE, OverallTime: 49.5s, OverallIterations: 33, TraceHistogramMax: 1, AutomataDifference: 18.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8694 SDtfs, 9776 SDslu, 19143 SDs, 0 SdLazy, 6990 SolverSat, 502 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 8.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 313 GetRequests, 92 SyntacticMatches, 21 SemanticMatches, 200 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 188 ImplicationChecksByTransitivity, 2.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=71011occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 23.7s AutomataMinimizationTime, 32 MinimizatonAttempts, 107578 StatesRemovedByMinimization, 31 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.6s InterpolantComputationTime, 2321 NumberOfCodeBlocks, 2321 NumberOfCodeBlocksAsserted, 33 NumberOfCheckSat, 2194 ConstructedInterpolants, 0 QuantifiedInterpolants, 476832 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 32 InterpolantComputations, 32 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...