./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/podwr000_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_0e945c6f-6904-4ae6-a65d-8df763bd20c4/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_0e945c6f-6904-4ae6-a65d-8df763bd20c4/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_0e945c6f-6904-4ae6-a65d-8df763bd20c4/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_0e945c6f-6904-4ae6-a65d-8df763bd20c4/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/podwr000_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_0e945c6f-6904-4ae6-a65d-8df763bd20c4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_0e945c6f-6904-4ae6-a65d-8df763bd20c4/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d1dedba2f53a8b300af4003ab021582d8cfaa8de ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 22:17:10,643 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 22:17:10,645 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 22:17:10,655 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 22:17:10,655 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 22:17:10,656 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 22:17:10,657 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 22:17:10,659 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 22:17:10,661 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 22:17:10,662 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 22:17:10,663 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 22:17:10,664 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 22:17:10,664 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 22:17:10,665 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 22:17:10,666 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 22:17:10,667 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 22:17:10,668 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 22:17:10,669 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 22:17:10,670 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 22:17:10,672 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 22:17:10,673 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 22:17:10,674 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 22:17:10,675 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 22:17:10,676 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 22:17:10,678 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 22:17:10,679 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 22:17:10,679 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 22:17:10,680 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 22:17:10,680 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 22:17:10,681 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 22:17:10,681 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 22:17:10,682 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 22:17:10,683 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 22:17:10,683 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 22:17:10,684 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 22:17:10,685 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 22:17:10,685 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 22:17:10,685 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 22:17:10,686 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 22:17:10,687 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 22:17:10,687 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 22:17:10,688 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_0e945c6f-6904-4ae6-a65d-8df763bd20c4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 22:17:10,700 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 22:17:10,701 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 22:17:10,702 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 22:17:10,702 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 22:17:10,702 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 22:17:10,703 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 22:17:10,703 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 22:17:10,703 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 22:17:10,703 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 22:17:10,704 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 22:17:10,704 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 22:17:10,704 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 22:17:10,704 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 22:17:10,705 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 22:17:10,705 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 22:17:10,705 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 22:17:10,705 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 22:17:10,706 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 22:17:10,706 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 22:17:10,706 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 22:17:10,706 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 22:17:10,707 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 22:17:10,707 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 22:17:10,707 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 22:17:10,707 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 22:17:10,708 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 22:17:10,708 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 22:17:10,708 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 22:17:10,708 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_0e945c6f-6904-4ae6-a65d-8df763bd20c4/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d1dedba2f53a8b300af4003ab021582d8cfaa8de [2019-11-15 22:17:10,734 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 22:17:10,743 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 22:17:10,747 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 22:17:10,748 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 22:17:10,748 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 22:17:10,749 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_0e945c6f-6904-4ae6-a65d-8df763bd20c4/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/podwr000_pso.oepc.i [2019-11-15 22:17:10,807 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0e945c6f-6904-4ae6-a65d-8df763bd20c4/bin/uautomizer/data/51f991d71/23adfef32bb94898a8212d07a2319441/FLAGd18d2b19b [2019-11-15 22:17:11,263 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 22:17:11,264 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_0e945c6f-6904-4ae6-a65d-8df763bd20c4/sv-benchmarks/c/pthread-wmm/podwr000_pso.oepc.i [2019-11-15 22:17:11,277 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0e945c6f-6904-4ae6-a65d-8df763bd20c4/bin/uautomizer/data/51f991d71/23adfef32bb94898a8212d07a2319441/FLAGd18d2b19b [2019-11-15 22:17:11,769 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_0e945c6f-6904-4ae6-a65d-8df763bd20c4/bin/uautomizer/data/51f991d71/23adfef32bb94898a8212d07a2319441 [2019-11-15 22:17:11,771 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 22:17:11,772 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 22:17:11,773 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 22:17:11,773 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 22:17:11,777 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 22:17:11,777 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 10:17:11" (1/1) ... [2019-11-15 22:17:11,780 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7c1ea15e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:17:11, skipping insertion in model container [2019-11-15 22:17:11,780 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 10:17:11" (1/1) ... [2019-11-15 22:17:11,787 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 22:17:11,854 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 22:17:12,334 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 22:17:12,349 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 22:17:12,440 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 22:17:12,512 INFO L192 MainTranslator]: Completed translation [2019-11-15 22:17:12,513 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:17:12 WrapperNode [2019-11-15 22:17:12,513 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 22:17:12,514 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 22:17:12,514 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 22:17:12,514 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 22:17:12,521 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:17:12" (1/1) ... [2019-11-15 22:17:12,538 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:17:12" (1/1) ... [2019-11-15 22:17:12,564 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 22:17:12,564 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 22:17:12,565 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 22:17:12,565 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 22:17:12,572 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:17:12" (1/1) ... [2019-11-15 22:17:12,572 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:17:12" (1/1) ... [2019-11-15 22:17:12,576 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:17:12" (1/1) ... [2019-11-15 22:17:12,576 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:17:12" (1/1) ... [2019-11-15 22:17:12,588 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:17:12" (1/1) ... [2019-11-15 22:17:12,592 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:17:12" (1/1) ... [2019-11-15 22:17:12,596 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:17:12" (1/1) ... [2019-11-15 22:17:12,600 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 22:17:12,601 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 22:17:12,601 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 22:17:12,601 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 22:17:12,602 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:17:12" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0e945c6f-6904-4ae6-a65d-8df763bd20c4/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 22:17:12,661 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 22:17:12,661 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 22:17:12,662 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 22:17:12,662 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 22:17:12,662 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 22:17:12,662 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 22:17:12,662 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 22:17:12,663 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 22:17:12,663 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 22:17:12,663 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 22:17:12,663 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 22:17:12,665 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 22:17:13,275 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 22:17:13,275 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 22:17:13,277 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 10:17:13 BoogieIcfgContainer [2019-11-15 22:17:13,277 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 22:17:13,278 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 22:17:13,278 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 22:17:13,281 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 22:17:13,281 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 10:17:11" (1/3) ... [2019-11-15 22:17:13,282 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6639a8a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 10:17:13, skipping insertion in model container [2019-11-15 22:17:13,282 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 10:17:12" (2/3) ... [2019-11-15 22:17:13,283 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6639a8a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 10:17:13, skipping insertion in model container [2019-11-15 22:17:13,283 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 10:17:13" (3/3) ... [2019-11-15 22:17:13,285 INFO L109 eAbstractionObserver]: Analyzing ICFG podwr000_pso.oepc.i [2019-11-15 22:17:13,340 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,341 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,341 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,341 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,341 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,341 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,342 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,342 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,342 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,343 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,343 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,343 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,344 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,344 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,344 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,344 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,345 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,345 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,345 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,345 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,345 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,346 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,346 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,346 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,346 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,347 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,347 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,347 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,347 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,348 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,348 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,348 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,348 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,350 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,351 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,352 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,352 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,352 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,352 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,352 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,352 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,353 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,353 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,354 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,354 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,355 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,356 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,356 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,356 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,357 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,357 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,357 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,357 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,357 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,357 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,358 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,358 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,359 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,359 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,359 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,359 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,359 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,360 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,360 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,360 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,360 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,360 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,360 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,361 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,361 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,361 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,361 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,362 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,362 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,362 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,362 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,362 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,362 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,363 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,363 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,363 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,363 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,363 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,363 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,364 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,364 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,364 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,364 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,364 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,364 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,365 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,365 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,365 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,366 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,366 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,366 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,366 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,367 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,367 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,367 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,368 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,371 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,371 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,371 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,371 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,371 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,372 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,372 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,372 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,373 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,373 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,373 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,373 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,381 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,381 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,381 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,381 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,381 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,382 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,382 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,382 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,382 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,382 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,382 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,382 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,383 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,383 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,383 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,383 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,383 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,383 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,384 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,384 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,384 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,384 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,384 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,384 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,385 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,385 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,385 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,385 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,385 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,385 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,386 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,386 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,386 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,386 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,386 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,386 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,387 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,387 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,387 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 22:17:13,393 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 22:17:13,393 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 22:17:13,400 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 22:17:13,410 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 22:17:13,427 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 22:17:13,427 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 22:17:13,427 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 22:17:13,427 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 22:17:13,428 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 22:17:13,428 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 22:17:13,428 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 22:17:13,428 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 22:17:13,447 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 140 places, 178 transitions [2019-11-15 22:17:15,913 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 32590 states. [2019-11-15 22:17:15,915 INFO L276 IsEmpty]: Start isEmpty. Operand 32590 states. [2019-11-15 22:17:15,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-11-15 22:17:15,921 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:15,922 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:15,924 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:15,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:15,930 INFO L82 PathProgramCache]: Analyzing trace with hash -254800073, now seen corresponding path program 1 times [2019-11-15 22:17:15,938 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:15,938 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1707489815] [2019-11-15 22:17:15,938 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:15,939 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:15,939 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:16,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:16,180 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:16,186 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1707489815] [2019-11-15 22:17:16,187 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:16,187 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:17:16,187 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1919195322] [2019-11-15 22:17:16,192 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:17:16,192 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:16,205 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:17:16,206 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:17:16,208 INFO L87 Difference]: Start difference. First operand 32590 states. Second operand 4 states. [2019-11-15 22:17:17,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:17,061 INFO L93 Difference]: Finished difference Result 33590 states and 129567 transitions. [2019-11-15 22:17:17,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 22:17:17,063 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2019-11-15 22:17:17,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:17,283 INFO L225 Difference]: With dead ends: 33590 [2019-11-15 22:17:17,283 INFO L226 Difference]: Without dead ends: 25702 [2019-11-15 22:17:17,284 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:17:17,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25702 states. [2019-11-15 22:17:18,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25702 to 25702. [2019-11-15 22:17:18,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25702 states. [2019-11-15 22:17:18,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25702 states to 25702 states and 99583 transitions. [2019-11-15 22:17:18,812 INFO L78 Accepts]: Start accepts. Automaton has 25702 states and 99583 transitions. Word has length 33 [2019-11-15 22:17:18,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:18,814 INFO L462 AbstractCegarLoop]: Abstraction has 25702 states and 99583 transitions. [2019-11-15 22:17:18,814 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:17:18,815 INFO L276 IsEmpty]: Start isEmpty. Operand 25702 states and 99583 transitions. [2019-11-15 22:17:18,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-15 22:17:18,827 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:18,827 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:18,827 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:18,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:18,828 INFO L82 PathProgramCache]: Analyzing trace with hash -250081261, now seen corresponding path program 1 times [2019-11-15 22:17:18,828 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:18,828 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [385693571] [2019-11-15 22:17:18,828 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:18,829 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:18,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:18,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:18,996 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:18,997 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [385693571] [2019-11-15 22:17:18,997 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:18,997 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:17:18,997 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1675310865] [2019-11-15 22:17:18,999 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:17:19,001 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:19,002 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:17:19,002 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:17:19,003 INFO L87 Difference]: Start difference. First operand 25702 states and 99583 transitions. Second operand 5 states. [2019-11-15 22:17:20,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:20,093 INFO L93 Difference]: Finished difference Result 41080 states and 150430 transitions. [2019-11-15 22:17:20,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 22:17:20,094 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-11-15 22:17:20,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:20,278 INFO L225 Difference]: With dead ends: 41080 [2019-11-15 22:17:20,279 INFO L226 Difference]: Without dead ends: 40544 [2019-11-15 22:17:20,280 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:17:20,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40544 states. [2019-11-15 22:17:21,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40544 to 38924. [2019-11-15 22:17:21,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38924 states. [2019-11-15 22:17:21,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38924 states to 38924 states and 143580 transitions. [2019-11-15 22:17:21,952 INFO L78 Accepts]: Start accepts. Automaton has 38924 states and 143580 transitions. Word has length 45 [2019-11-15 22:17:21,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:21,956 INFO L462 AbstractCegarLoop]: Abstraction has 38924 states and 143580 transitions. [2019-11-15 22:17:21,956 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:17:21,956 INFO L276 IsEmpty]: Start isEmpty. Operand 38924 states and 143580 transitions. [2019-11-15 22:17:21,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-11-15 22:17:21,965 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:21,965 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:21,966 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:21,966 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:21,966 INFO L82 PathProgramCache]: Analyzing trace with hash -1037182150, now seen corresponding path program 1 times [2019-11-15 22:17:21,967 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:21,967 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1936341073] [2019-11-15 22:17:21,967 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:21,968 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:21,968 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:22,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:22,063 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:22,063 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1936341073] [2019-11-15 22:17:22,064 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:22,064 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:17:22,064 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1518189013] [2019-11-15 22:17:22,064 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:17:22,065 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:22,065 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:17:22,065 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:17:22,065 INFO L87 Difference]: Start difference. First operand 38924 states and 143580 transitions. Second operand 5 states. [2019-11-15 22:17:22,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:22,658 INFO L93 Difference]: Finished difference Result 49777 states and 180632 transitions. [2019-11-15 22:17:22,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 22:17:22,659 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2019-11-15 22:17:22,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:22,816 INFO L225 Difference]: With dead ends: 49777 [2019-11-15 22:17:22,816 INFO L226 Difference]: Without dead ends: 49273 [2019-11-15 22:17:23,398 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:17:23,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49273 states. [2019-11-15 22:17:24,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49273 to 42676. [2019-11-15 22:17:24,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42676 states. [2019-11-15 22:17:24,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42676 states to 42676 states and 156591 transitions. [2019-11-15 22:17:24,587 INFO L78 Accepts]: Start accepts. Automaton has 42676 states and 156591 transitions. Word has length 46 [2019-11-15 22:17:24,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:24,587 INFO L462 AbstractCegarLoop]: Abstraction has 42676 states and 156591 transitions. [2019-11-15 22:17:24,587 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:17:24,587 INFO L276 IsEmpty]: Start isEmpty. Operand 42676 states and 156591 transitions. [2019-11-15 22:17:24,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-11-15 22:17:24,597 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:24,597 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:24,598 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:24,598 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:24,598 INFO L82 PathProgramCache]: Analyzing trace with hash 671596896, now seen corresponding path program 1 times [2019-11-15 22:17:24,598 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:24,599 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [424762371] [2019-11-15 22:17:24,599 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:24,599 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:24,599 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:24,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:24,642 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:24,642 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [424762371] [2019-11-15 22:17:24,642 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:24,642 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 22:17:24,642 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [854509458] [2019-11-15 22:17:24,643 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 22:17:24,643 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:24,643 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 22:17:24,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:17:24,643 INFO L87 Difference]: Start difference. First operand 42676 states and 156591 transitions. Second operand 3 states. [2019-11-15 22:17:24,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:24,902 INFO L93 Difference]: Finished difference Result 61086 states and 221429 transitions. [2019-11-15 22:17:24,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 22:17:24,902 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2019-11-15 22:17:24,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:25,091 INFO L225 Difference]: With dead ends: 61086 [2019-11-15 22:17:25,092 INFO L226 Difference]: Without dead ends: 61086 [2019-11-15 22:17:25,093 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:17:26,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61086 states. [2019-11-15 22:17:26,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61086 to 48015. [2019-11-15 22:17:26,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48015 states. [2019-11-15 22:17:27,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48015 states to 48015 states and 174178 transitions. [2019-11-15 22:17:27,082 INFO L78 Accepts]: Start accepts. Automaton has 48015 states and 174178 transitions. Word has length 48 [2019-11-15 22:17:27,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:27,083 INFO L462 AbstractCegarLoop]: Abstraction has 48015 states and 174178 transitions. [2019-11-15 22:17:27,083 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 22:17:27,083 INFO L276 IsEmpty]: Start isEmpty. Operand 48015 states and 174178 transitions. [2019-11-15 22:17:27,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-15 22:17:27,099 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:27,099 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:27,100 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:27,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:27,100 INFO L82 PathProgramCache]: Analyzing trace with hash -934557998, now seen corresponding path program 1 times [2019-11-15 22:17:27,100 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:27,100 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [763106967] [2019-11-15 22:17:27,101 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:27,101 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:27,101 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:27,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:27,303 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:27,303 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [763106967] [2019-11-15 22:17:27,303 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:27,304 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:17:27,304 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [610912560] [2019-11-15 22:17:27,304 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:17:27,304 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:27,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:17:27,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:17:27,305 INFO L87 Difference]: Start difference. First operand 48015 states and 174178 transitions. Second operand 6 states. [2019-11-15 22:17:28,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:28,258 INFO L93 Difference]: Finished difference Result 63755 states and 229378 transitions. [2019-11-15 22:17:28,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 22:17:28,258 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-15 22:17:28,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:28,410 INFO L225 Difference]: With dead ends: 63755 [2019-11-15 22:17:28,410 INFO L226 Difference]: Without dead ends: 63755 [2019-11-15 22:17:28,411 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:17:31,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63755 states. [2019-11-15 22:17:32,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63755 to 59948. [2019-11-15 22:17:32,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59948 states. [2019-11-15 22:17:32,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59948 states to 59948 states and 215671 transitions. [2019-11-15 22:17:32,713 INFO L78 Accepts]: Start accepts. Automaton has 59948 states and 215671 transitions. Word has length 52 [2019-11-15 22:17:32,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:32,713 INFO L462 AbstractCegarLoop]: Abstraction has 59948 states and 215671 transitions. [2019-11-15 22:17:32,713 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:17:32,713 INFO L276 IsEmpty]: Start isEmpty. Operand 59948 states and 215671 transitions. [2019-11-15 22:17:32,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-15 22:17:32,737 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:32,737 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:32,738 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:32,738 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:32,738 INFO L82 PathProgramCache]: Analyzing trace with hash 1563457939, now seen corresponding path program 1 times [2019-11-15 22:17:32,738 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:32,738 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [365049790] [2019-11-15 22:17:32,739 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:32,739 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:32,739 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:32,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:32,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:32,860 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [365049790] [2019-11-15 22:17:32,860 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:32,860 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 22:17:32,860 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [147835542] [2019-11-15 22:17:32,861 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 22:17:32,861 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:32,861 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 22:17:32,861 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:17:32,862 INFO L87 Difference]: Start difference. First operand 59948 states and 215671 transitions. Second operand 7 states. [2019-11-15 22:17:34,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:34,099 INFO L93 Difference]: Finished difference Result 83684 states and 290096 transitions. [2019-11-15 22:17:34,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 22:17:34,100 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-11-15 22:17:34,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:34,288 INFO L225 Difference]: With dead ends: 83684 [2019-11-15 22:17:34,288 INFO L226 Difference]: Without dead ends: 83684 [2019-11-15 22:17:34,289 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 22:17:34,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83684 states. [2019-11-15 22:17:36,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83684 to 71011. [2019-11-15 22:17:36,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71011 states. [2019-11-15 22:17:36,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71011 states to 71011 states and 249885 transitions. [2019-11-15 22:17:36,346 INFO L78 Accepts]: Start accepts. Automaton has 71011 states and 249885 transitions. Word has length 52 [2019-11-15 22:17:36,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:36,346 INFO L462 AbstractCegarLoop]: Abstraction has 71011 states and 249885 transitions. [2019-11-15 22:17:36,346 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 22:17:36,347 INFO L276 IsEmpty]: Start isEmpty. Operand 71011 states and 249885 transitions. [2019-11-15 22:17:36,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-15 22:17:36,363 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:36,363 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:36,364 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:36,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:36,364 INFO L82 PathProgramCache]: Analyzing trace with hash -1844005676, now seen corresponding path program 1 times [2019-11-15 22:17:36,364 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:36,364 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1882192622] [2019-11-15 22:17:36,364 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:36,364 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:36,364 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:36,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:36,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:36,420 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1882192622] [2019-11-15 22:17:36,420 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:36,420 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 22:17:36,420 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [877794554] [2019-11-15 22:17:36,420 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 22:17:36,421 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:36,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 22:17:36,421 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:17:36,421 INFO L87 Difference]: Start difference. First operand 71011 states and 249885 transitions. Second operand 3 states. [2019-11-15 22:17:36,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:36,693 INFO L93 Difference]: Finished difference Result 54020 states and 188917 transitions. [2019-11-15 22:17:36,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 22:17:36,693 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-11-15 22:17:36,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:36,816 INFO L225 Difference]: With dead ends: 54020 [2019-11-15 22:17:36,816 INFO L226 Difference]: Without dead ends: 54020 [2019-11-15 22:17:36,816 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:17:37,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54020 states. [2019-11-15 22:17:38,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54020 to 53405. [2019-11-15 22:17:38,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53405 states. [2019-11-15 22:17:38,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53405 states to 53405 states and 187036 transitions. [2019-11-15 22:17:38,620 INFO L78 Accepts]: Start accepts. Automaton has 53405 states and 187036 transitions. Word has length 52 [2019-11-15 22:17:38,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:38,620 INFO L462 AbstractCegarLoop]: Abstraction has 53405 states and 187036 transitions. [2019-11-15 22:17:38,620 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 22:17:38,621 INFO L276 IsEmpty]: Start isEmpty. Operand 53405 states and 187036 transitions. [2019-11-15 22:17:38,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-15 22:17:38,630 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:38,630 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:38,630 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:38,631 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:38,631 INFO L82 PathProgramCache]: Analyzing trace with hash -456832597, now seen corresponding path program 1 times [2019-11-15 22:17:38,631 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:38,631 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1907005434] [2019-11-15 22:17:38,631 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:38,631 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:38,631 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:38,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:38,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:38,704 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1907005434] [2019-11-15 22:17:38,704 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:38,704 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:17:38,704 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1568882722] [2019-11-15 22:17:38,705 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:17:38,705 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:38,705 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:17:38,705 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:17:38,705 INFO L87 Difference]: Start difference. First operand 53405 states and 187036 transitions. Second operand 6 states. [2019-11-15 22:17:39,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:39,485 INFO L93 Difference]: Finished difference Result 68645 states and 237300 transitions. [2019-11-15 22:17:39,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 22:17:39,486 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-15 22:17:39,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:39,641 INFO L225 Difference]: With dead ends: 68645 [2019-11-15 22:17:39,641 INFO L226 Difference]: Without dead ends: 68077 [2019-11-15 22:17:39,642 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2019-11-15 22:17:39,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68077 states. [2019-11-15 22:17:40,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68077 to 53489. [2019-11-15 22:17:40,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53489 states. [2019-11-15 22:17:40,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53489 states to 53489 states and 187733 transitions. [2019-11-15 22:17:40,778 INFO L78 Accepts]: Start accepts. Automaton has 53489 states and 187733 transitions. Word has length 52 [2019-11-15 22:17:40,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:40,779 INFO L462 AbstractCegarLoop]: Abstraction has 53489 states and 187733 transitions. [2019-11-15 22:17:40,779 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:17:40,779 INFO L276 IsEmpty]: Start isEmpty. Operand 53489 states and 187733 transitions. [2019-11-15 22:17:40,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-15 22:17:40,791 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:40,792 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:40,792 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:40,792 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:40,792 INFO L82 PathProgramCache]: Analyzing trace with hash -1423918431, now seen corresponding path program 1 times [2019-11-15 22:17:40,792 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:40,792 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [259540753] [2019-11-15 22:17:40,793 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:40,793 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:40,793 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:40,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:40,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:40,896 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [259540753] [2019-11-15 22:17:40,896 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:40,897 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:17:40,897 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [865747000] [2019-11-15 22:17:40,897 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:17:40,897 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:40,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:17:40,898 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:17:40,898 INFO L87 Difference]: Start difference. First operand 53489 states and 187733 transitions. Second operand 6 states. [2019-11-15 22:17:41,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:41,610 INFO L93 Difference]: Finished difference Result 96424 states and 331752 transitions. [2019-11-15 22:17:41,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 22:17:41,610 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-11-15 22:17:41,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:41,836 INFO L225 Difference]: With dead ends: 96424 [2019-11-15 22:17:41,836 INFO L226 Difference]: Without dead ends: 96424 [2019-11-15 22:17:41,836 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:17:42,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96424 states. [2019-11-15 22:17:43,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96424 to 70773. [2019-11-15 22:17:43,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70773 states. [2019-11-15 22:17:43,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70773 states to 70773 states and 244809 transitions. [2019-11-15 22:17:43,872 INFO L78 Accepts]: Start accepts. Automaton has 70773 states and 244809 transitions. Word has length 53 [2019-11-15 22:17:43,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:43,873 INFO L462 AbstractCegarLoop]: Abstraction has 70773 states and 244809 transitions. [2019-11-15 22:17:43,873 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:17:43,873 INFO L276 IsEmpty]: Start isEmpty. Operand 70773 states and 244809 transitions. [2019-11-15 22:17:43,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-15 22:17:43,885 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:43,886 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:43,886 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:43,886 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:43,886 INFO L82 PathProgramCache]: Analyzing trace with hash -536414750, now seen corresponding path program 1 times [2019-11-15 22:17:43,886 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:43,886 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2117204977] [2019-11-15 22:17:43,887 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:43,887 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:43,887 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:43,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:43,951 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:43,951 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2117204977] [2019-11-15 22:17:43,952 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:43,952 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:17:43,952 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [40184985] [2019-11-15 22:17:43,952 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:17:43,952 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:43,952 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:17:43,953 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:17:43,953 INFO L87 Difference]: Start difference. First operand 70773 states and 244809 transitions. Second operand 4 states. [2019-11-15 22:17:44,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:44,020 INFO L93 Difference]: Finished difference Result 12386 states and 37621 transitions. [2019-11-15 22:17:44,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:17:44,020 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 53 [2019-11-15 22:17:44,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:44,036 INFO L225 Difference]: With dead ends: 12386 [2019-11-15 22:17:44,036 INFO L226 Difference]: Without dead ends: 10681 [2019-11-15 22:17:44,036 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:17:44,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10681 states. [2019-11-15 22:17:44,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10681 to 10633. [2019-11-15 22:17:44,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10633 states. [2019-11-15 22:17:44,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10633 states to 10633 states and 31700 transitions. [2019-11-15 22:17:44,174 INFO L78 Accepts]: Start accepts. Automaton has 10633 states and 31700 transitions. Word has length 53 [2019-11-15 22:17:44,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:44,175 INFO L462 AbstractCegarLoop]: Abstraction has 10633 states and 31700 transitions. [2019-11-15 22:17:44,175 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:17:44,175 INFO L276 IsEmpty]: Start isEmpty. Operand 10633 states and 31700 transitions. [2019-11-15 22:17:44,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-15 22:17:44,178 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:44,178 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:44,178 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:44,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:44,178 INFO L82 PathProgramCache]: Analyzing trace with hash -257891193, now seen corresponding path program 1 times [2019-11-15 22:17:44,178 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:44,179 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1508424621] [2019-11-15 22:17:44,179 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:44,179 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:44,179 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:44,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:44,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:44,230 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1508424621] [2019-11-15 22:17:44,231 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:44,231 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:17:44,231 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [974559116] [2019-11-15 22:17:44,231 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:17:44,232 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:44,232 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:17:44,232 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:17:44,232 INFO L87 Difference]: Start difference. First operand 10633 states and 31700 transitions. Second operand 4 states. [2019-11-15 22:17:44,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:44,355 INFO L93 Difference]: Finished difference Result 12165 states and 36338 transitions. [2019-11-15 22:17:44,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:17:44,356 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 60 [2019-11-15 22:17:44,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:44,372 INFO L225 Difference]: With dead ends: 12165 [2019-11-15 22:17:44,372 INFO L226 Difference]: Without dead ends: 12165 [2019-11-15 22:17:44,373 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:17:44,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12165 states. [2019-11-15 22:17:44,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12165 to 10963. [2019-11-15 22:17:44,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10963 states. [2019-11-15 22:17:44,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10963 states to 10963 states and 32702 transitions. [2019-11-15 22:17:44,532 INFO L78 Accepts]: Start accepts. Automaton has 10963 states and 32702 transitions. Word has length 60 [2019-11-15 22:17:44,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:44,532 INFO L462 AbstractCegarLoop]: Abstraction has 10963 states and 32702 transitions. [2019-11-15 22:17:44,533 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:17:44,533 INFO L276 IsEmpty]: Start isEmpty. Operand 10963 states and 32702 transitions. [2019-11-15 22:17:44,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-15 22:17:44,536 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:44,536 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:44,537 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:44,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:44,537 INFO L82 PathProgramCache]: Analyzing trace with hash 1484919142, now seen corresponding path program 1 times [2019-11-15 22:17:44,537 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:44,537 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2133164021] [2019-11-15 22:17:44,537 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:44,538 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:44,538 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:44,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:44,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:44,603 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2133164021] [2019-11-15 22:17:44,604 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:44,604 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:17:44,604 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1197001862] [2019-11-15 22:17:44,605 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:17:44,605 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:44,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:17:44,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:17:44,606 INFO L87 Difference]: Start difference. First operand 10963 states and 32702 transitions. Second operand 6 states. [2019-11-15 22:17:44,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:44,981 INFO L93 Difference]: Finished difference Result 13789 states and 40570 transitions. [2019-11-15 22:17:44,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 22:17:44,981 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-11-15 22:17:44,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:45,001 INFO L225 Difference]: With dead ends: 13789 [2019-11-15 22:17:45,001 INFO L226 Difference]: Without dead ends: 13728 [2019-11-15 22:17:45,001 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 22:17:45,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13728 states. [2019-11-15 22:17:45,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13728 to 12854. [2019-11-15 22:17:45,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12854 states. [2019-11-15 22:17:45,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12854 states to 12854 states and 38040 transitions. [2019-11-15 22:17:45,184 INFO L78 Accepts]: Start accepts. Automaton has 12854 states and 38040 transitions. Word has length 60 [2019-11-15 22:17:45,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:45,184 INFO L462 AbstractCegarLoop]: Abstraction has 12854 states and 38040 transitions. [2019-11-15 22:17:45,184 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:17:45,184 INFO L276 IsEmpty]: Start isEmpty. Operand 12854 states and 38040 transitions. [2019-11-15 22:17:45,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 22:17:45,190 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:45,191 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:45,193 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:45,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:45,193 INFO L82 PathProgramCache]: Analyzing trace with hash -1235676948, now seen corresponding path program 1 times [2019-11-15 22:17:45,194 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:45,194 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1268646587] [2019-11-15 22:17:45,194 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:45,194 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:45,195 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:45,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:45,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:45,272 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1268646587] [2019-11-15 22:17:45,272 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:45,272 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:17:45,272 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1597444724] [2019-11-15 22:17:45,272 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:17:45,273 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:45,273 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:17:45,273 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:17:45,273 INFO L87 Difference]: Start difference. First operand 12854 states and 38040 transitions. Second operand 4 states. [2019-11-15 22:17:45,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:45,598 INFO L93 Difference]: Finished difference Result 15947 states and 46763 transitions. [2019-11-15 22:17:45,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 22:17:45,599 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-11-15 22:17:45,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:45,628 INFO L225 Difference]: With dead ends: 15947 [2019-11-15 22:17:45,629 INFO L226 Difference]: Without dead ends: 15947 [2019-11-15 22:17:45,629 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:17:45,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15947 states. [2019-11-15 22:17:45,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15947 to 14216. [2019-11-15 22:17:45,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14216 states. [2019-11-15 22:17:45,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14216 states to 14216 states and 41815 transitions. [2019-11-15 22:17:45,833 INFO L78 Accepts]: Start accepts. Automaton has 14216 states and 41815 transitions. Word has length 66 [2019-11-15 22:17:45,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:45,833 INFO L462 AbstractCegarLoop]: Abstraction has 14216 states and 41815 transitions. [2019-11-15 22:17:45,833 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:17:45,833 INFO L276 IsEmpty]: Start isEmpty. Operand 14216 states and 41815 transitions. [2019-11-15 22:17:45,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 22:17:45,840 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:45,840 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:45,841 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:45,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:45,841 INFO L82 PathProgramCache]: Analyzing trace with hash 982081005, now seen corresponding path program 1 times [2019-11-15 22:17:45,841 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:45,842 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1625662052] [2019-11-15 22:17:45,842 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:45,842 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:45,842 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:45,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:45,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:45,975 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1625662052] [2019-11-15 22:17:45,975 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:45,975 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:17:45,976 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [975116286] [2019-11-15 22:17:45,976 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:17:45,976 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:45,976 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:17:45,977 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:17:45,977 INFO L87 Difference]: Start difference. First operand 14216 states and 41815 transitions. Second operand 6 states. [2019-11-15 22:17:46,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:46,434 INFO L93 Difference]: Finished difference Result 15413 states and 44700 transitions. [2019-11-15 22:17:46,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 22:17:46,435 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-11-15 22:17:46,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:46,457 INFO L225 Difference]: With dead ends: 15413 [2019-11-15 22:17:46,457 INFO L226 Difference]: Without dead ends: 15413 [2019-11-15 22:17:46,457 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:17:46,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15413 states. [2019-11-15 22:17:46,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15413 to 15089. [2019-11-15 22:17:46,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15089 states. [2019-11-15 22:17:46,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15089 states to 15089 states and 43878 transitions. [2019-11-15 22:17:46,665 INFO L78 Accepts]: Start accepts. Automaton has 15089 states and 43878 transitions. Word has length 66 [2019-11-15 22:17:46,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:46,666 INFO L462 AbstractCegarLoop]: Abstraction has 15089 states and 43878 transitions. [2019-11-15 22:17:46,666 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:17:46,666 INFO L276 IsEmpty]: Start isEmpty. Operand 15089 states and 43878 transitions. [2019-11-15 22:17:46,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 22:17:46,674 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:46,674 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:46,674 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:46,674 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:46,675 INFO L82 PathProgramCache]: Analyzing trace with hash 1943695022, now seen corresponding path program 1 times [2019-11-15 22:17:46,675 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:46,675 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [194293780] [2019-11-15 22:17:46,675 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:46,675 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:46,676 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:46,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:46,755 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:46,755 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [194293780] [2019-11-15 22:17:46,755 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:46,756 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:17:46,756 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1619916311] [2019-11-15 22:17:46,756 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:17:46,756 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:46,757 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:17:46,757 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:17:46,757 INFO L87 Difference]: Start difference. First operand 15089 states and 43878 transitions. Second operand 6 states. [2019-11-15 22:17:47,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:47,252 INFO L93 Difference]: Finished difference Result 17155 states and 48592 transitions. [2019-11-15 22:17:47,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 22:17:47,253 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-11-15 22:17:47,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:47,275 INFO L225 Difference]: With dead ends: 17155 [2019-11-15 22:17:47,275 INFO L226 Difference]: Without dead ends: 17155 [2019-11-15 22:17:47,276 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 22:17:47,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17155 states. [2019-11-15 22:17:47,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17155 to 15619. [2019-11-15 22:17:47,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15619 states. [2019-11-15 22:17:47,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15619 states to 15619 states and 44726 transitions. [2019-11-15 22:17:47,483 INFO L78 Accepts]: Start accepts. Automaton has 15619 states and 44726 transitions. Word has length 66 [2019-11-15 22:17:47,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:47,483 INFO L462 AbstractCegarLoop]: Abstraction has 15619 states and 44726 transitions. [2019-11-15 22:17:47,484 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:17:47,484 INFO L276 IsEmpty]: Start isEmpty. Operand 15619 states and 44726 transitions. [2019-11-15 22:17:47,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 22:17:47,493 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:47,493 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:47,493 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:47,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:47,493 INFO L82 PathProgramCache]: Analyzing trace with hash -1106507793, now seen corresponding path program 1 times [2019-11-15 22:17:47,493 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:47,493 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [514710492] [2019-11-15 22:17:47,494 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:47,494 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:47,494 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:47,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:47,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:47,589 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [514710492] [2019-11-15 22:17:47,590 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:47,590 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:17:47,590 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [425774537] [2019-11-15 22:17:47,590 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:17:47,590 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:47,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:17:47,591 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:17:47,591 INFO L87 Difference]: Start difference. First operand 15619 states and 44726 transitions. Second operand 5 states. [2019-11-15 22:17:47,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:47,934 INFO L93 Difference]: Finished difference Result 19634 states and 55999 transitions. [2019-11-15 22:17:47,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 22:17:47,935 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-11-15 22:17:47,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:47,962 INFO L225 Difference]: With dead ends: 19634 [2019-11-15 22:17:47,962 INFO L226 Difference]: Without dead ends: 19634 [2019-11-15 22:17:47,962 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:17:47,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19634 states. [2019-11-15 22:17:48,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19634 to 18191. [2019-11-15 22:17:48,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18191 states. [2019-11-15 22:17:48,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18191 states to 18191 states and 51753 transitions. [2019-11-15 22:17:48,208 INFO L78 Accepts]: Start accepts. Automaton has 18191 states and 51753 transitions. Word has length 66 [2019-11-15 22:17:48,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:48,208 INFO L462 AbstractCegarLoop]: Abstraction has 18191 states and 51753 transitions. [2019-11-15 22:17:48,208 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:17:48,208 INFO L276 IsEmpty]: Start isEmpty. Operand 18191 states and 51753 transitions. [2019-11-15 22:17:48,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 22:17:48,216 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:48,216 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:48,217 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:48,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:48,217 INFO L82 PathProgramCache]: Analyzing trace with hash -1617041970, now seen corresponding path program 1 times [2019-11-15 22:17:48,217 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:48,217 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [687800085] [2019-11-15 22:17:48,217 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:48,217 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:48,217 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:48,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:48,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:48,279 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [687800085] [2019-11-15 22:17:48,279 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:48,279 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:17:48,280 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [157186544] [2019-11-15 22:17:48,280 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:17:48,280 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:48,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:17:48,281 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:17:48,281 INFO L87 Difference]: Start difference. First operand 18191 states and 51753 transitions. Second operand 4 states. [2019-11-15 22:17:48,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:48,720 INFO L93 Difference]: Finished difference Result 21605 states and 61304 transitions. [2019-11-15 22:17:48,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:17:48,721 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-11-15 22:17:48,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:48,750 INFO L225 Difference]: With dead ends: 21605 [2019-11-15 22:17:48,750 INFO L226 Difference]: Without dead ends: 21383 [2019-11-15 22:17:48,750 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:17:48,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21383 states. [2019-11-15 22:17:48,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21383 to 20513. [2019-11-15 22:17:48,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20513 states. [2019-11-15 22:17:49,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20513 states to 20513 states and 58140 transitions. [2019-11-15 22:17:49,031 INFO L78 Accepts]: Start accepts. Automaton has 20513 states and 58140 transitions. Word has length 66 [2019-11-15 22:17:49,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:49,031 INFO L462 AbstractCegarLoop]: Abstraction has 20513 states and 58140 transitions. [2019-11-15 22:17:49,031 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:17:49,031 INFO L276 IsEmpty]: Start isEmpty. Operand 20513 states and 58140 transitions. [2019-11-15 22:17:49,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 22:17:49,038 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:49,038 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:49,038 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:49,038 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:49,039 INFO L82 PathProgramCache]: Analyzing trace with hash -6529714, now seen corresponding path program 1 times [2019-11-15 22:17:49,039 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:49,039 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [686778074] [2019-11-15 22:17:49,039 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:49,039 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:49,039 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:49,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:49,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:49,114 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [686778074] [2019-11-15 22:17:49,114 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:49,114 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:17:49,114 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1889867206] [2019-11-15 22:17:49,115 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:17:49,115 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:49,115 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:17:49,115 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:17:49,115 INFO L87 Difference]: Start difference. First operand 20513 states and 58140 transitions. Second operand 5 states. [2019-11-15 22:17:49,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:49,169 INFO L93 Difference]: Finished difference Result 6026 states and 14258 transitions. [2019-11-15 22:17:49,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 22:17:49,169 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-11-15 22:17:49,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:49,176 INFO L225 Difference]: With dead ends: 6026 [2019-11-15 22:17:49,176 INFO L226 Difference]: Without dead ends: 5180 [2019-11-15 22:17:49,177 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:17:49,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5180 states. [2019-11-15 22:17:49,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5180 to 4755. [2019-11-15 22:17:49,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4755 states. [2019-11-15 22:17:49,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4755 states to 4755 states and 10906 transitions. [2019-11-15 22:17:49,247 INFO L78 Accepts]: Start accepts. Automaton has 4755 states and 10906 transitions. Word has length 66 [2019-11-15 22:17:49,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:49,247 INFO L462 AbstractCegarLoop]: Abstraction has 4755 states and 10906 transitions. [2019-11-15 22:17:49,248 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:17:49,248 INFO L276 IsEmpty]: Start isEmpty. Operand 4755 states and 10906 transitions. [2019-11-15 22:17:49,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 22:17:49,254 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:49,254 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:49,254 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:49,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:49,255 INFO L82 PathProgramCache]: Analyzing trace with hash -1738873321, now seen corresponding path program 1 times [2019-11-15 22:17:49,255 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:49,255 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [995755752] [2019-11-15 22:17:49,255 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:49,255 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:49,256 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:49,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:49,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:49,323 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [995755752] [2019-11-15 22:17:49,323 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:49,323 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 22:17:49,323 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1591899456] [2019-11-15 22:17:49,324 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 22:17:49,325 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:49,325 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 22:17:49,325 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:17:49,325 INFO L87 Difference]: Start difference. First operand 4755 states and 10906 transitions. Second operand 3 states. [2019-11-15 22:17:49,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:49,365 INFO L93 Difference]: Finished difference Result 5907 states and 13341 transitions. [2019-11-15 22:17:49,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 22:17:49,365 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-11-15 22:17:49,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:49,373 INFO L225 Difference]: With dead ends: 5907 [2019-11-15 22:17:49,373 INFO L226 Difference]: Without dead ends: 5907 [2019-11-15 22:17:49,373 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 22:17:49,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5907 states. [2019-11-15 22:17:49,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5907 to 4690. [2019-11-15 22:17:49,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4690 states. [2019-11-15 22:17:49,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4690 states to 4690 states and 10468 transitions. [2019-11-15 22:17:49,444 INFO L78 Accepts]: Start accepts. Automaton has 4690 states and 10468 transitions. Word has length 66 [2019-11-15 22:17:49,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:49,445 INFO L462 AbstractCegarLoop]: Abstraction has 4690 states and 10468 transitions. [2019-11-15 22:17:49,445 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 22:17:49,445 INFO L276 IsEmpty]: Start isEmpty. Operand 4690 states and 10468 transitions. [2019-11-15 22:17:49,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-11-15 22:17:49,452 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:49,452 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:49,453 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:49,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:49,453 INFO L82 PathProgramCache]: Analyzing trace with hash 1014352042, now seen corresponding path program 1 times [2019-11-15 22:17:49,453 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:49,453 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [172083711] [2019-11-15 22:17:49,454 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:49,454 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:49,454 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:49,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:49,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:49,529 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [172083711] [2019-11-15 22:17:49,529 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:49,530 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:17:49,530 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1976850327] [2019-11-15 22:17:49,530 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:17:49,531 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:49,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:17:49,531 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:17:49,531 INFO L87 Difference]: Start difference. First operand 4690 states and 10468 transitions. Second operand 5 states. [2019-11-15 22:17:49,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:49,725 INFO L93 Difference]: Finished difference Result 5761 states and 12916 transitions. [2019-11-15 22:17:49,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 22:17:49,726 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2019-11-15 22:17:49,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:49,733 INFO L225 Difference]: With dead ends: 5761 [2019-11-15 22:17:49,733 INFO L226 Difference]: Without dead ends: 5761 [2019-11-15 22:17:49,733 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-15 22:17:49,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5761 states. [2019-11-15 22:17:49,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5761 to 5110. [2019-11-15 22:17:49,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5110 states. [2019-11-15 22:17:49,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5110 states to 5110 states and 11426 transitions. [2019-11-15 22:17:49,808 INFO L78 Accepts]: Start accepts. Automaton has 5110 states and 11426 transitions. Word has length 72 [2019-11-15 22:17:49,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:49,808 INFO L462 AbstractCegarLoop]: Abstraction has 5110 states and 11426 transitions. [2019-11-15 22:17:49,808 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:17:49,808 INFO L276 IsEmpty]: Start isEmpty. Operand 5110 states and 11426 transitions. [2019-11-15 22:17:49,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-11-15 22:17:49,815 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:49,815 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:49,815 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:49,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:49,816 INFO L82 PathProgramCache]: Analyzing trace with hash -1537804919, now seen corresponding path program 1 times [2019-11-15 22:17:49,816 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:49,816 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1820007179] [2019-11-15 22:17:49,816 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:49,817 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:49,817 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:49,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:49,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:49,903 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1820007179] [2019-11-15 22:17:49,903 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:49,903 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 22:17:49,903 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2026007188] [2019-11-15 22:17:49,904 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 22:17:49,904 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:49,905 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 22:17:49,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:17:49,907 INFO L87 Difference]: Start difference. First operand 5110 states and 11426 transitions. Second operand 7 states. [2019-11-15 22:17:50,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:50,334 INFO L93 Difference]: Finished difference Result 6032 states and 13361 transitions. [2019-11-15 22:17:50,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 22:17:50,334 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 72 [2019-11-15 22:17:50,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:50,339 INFO L225 Difference]: With dead ends: 6032 [2019-11-15 22:17:50,339 INFO L226 Difference]: Without dead ends: 5979 [2019-11-15 22:17:50,340 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=211, Unknown=0, NotChecked=0, Total=272 [2019-11-15 22:17:50,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5979 states. [2019-11-15 22:17:50,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5979 to 5197. [2019-11-15 22:17:50,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5197 states. [2019-11-15 22:17:50,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5197 states to 5197 states and 11515 transitions. [2019-11-15 22:17:50,390 INFO L78 Accepts]: Start accepts. Automaton has 5197 states and 11515 transitions. Word has length 72 [2019-11-15 22:17:50,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:50,390 INFO L462 AbstractCegarLoop]: Abstraction has 5197 states and 11515 transitions. [2019-11-15 22:17:50,391 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 22:17:50,391 INFO L276 IsEmpty]: Start isEmpty. Operand 5197 states and 11515 transitions. [2019-11-15 22:17:50,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 22:17:50,395 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:50,395 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:50,395 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:50,396 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:50,396 INFO L82 PathProgramCache]: Analyzing trace with hash 1479207997, now seen corresponding path program 1 times [2019-11-15 22:17:50,396 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:50,396 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [523506048] [2019-11-15 22:17:50,397 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:50,397 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:50,397 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:50,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:50,467 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:50,467 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [523506048] [2019-11-15 22:17:50,468 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:50,468 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:17:50,468 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1828722581] [2019-11-15 22:17:50,468 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:17:50,468 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:50,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:17:50,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:17:50,469 INFO L87 Difference]: Start difference. First operand 5197 states and 11515 transitions. Second operand 5 states. [2019-11-15 22:17:50,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:50,711 INFO L93 Difference]: Finished difference Result 6214 states and 13704 transitions. [2019-11-15 22:17:50,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 22:17:50,711 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93 [2019-11-15 22:17:50,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:50,716 INFO L225 Difference]: With dead ends: 6214 [2019-11-15 22:17:50,717 INFO L226 Difference]: Without dead ends: 6214 [2019-11-15 22:17:50,717 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 22:17:50,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6214 states. [2019-11-15 22:17:50,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6214 to 5319. [2019-11-15 22:17:50,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5319 states. [2019-11-15 22:17:50,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5319 states to 5319 states and 11781 transitions. [2019-11-15 22:17:50,771 INFO L78 Accepts]: Start accepts. Automaton has 5319 states and 11781 transitions. Word has length 93 [2019-11-15 22:17:50,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:50,771 INFO L462 AbstractCegarLoop]: Abstraction has 5319 states and 11781 transitions. [2019-11-15 22:17:50,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:17:50,771 INFO L276 IsEmpty]: Start isEmpty. Operand 5319 states and 11781 transitions. [2019-11-15 22:17:50,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 22:17:50,776 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:50,776 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:50,777 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:50,777 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:50,777 INFO L82 PathProgramCache]: Analyzing trace with hash -1223592850, now seen corresponding path program 1 times [2019-11-15 22:17:50,777 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:50,777 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1164479424] [2019-11-15 22:17:50,777 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:50,777 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:50,777 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:50,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:50,838 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:50,839 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1164479424] [2019-11-15 22:17:50,839 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:50,839 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:17:50,840 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [263579688] [2019-11-15 22:17:50,840 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:17:50,840 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:50,840 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:17:50,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:17:50,841 INFO L87 Difference]: Start difference. First operand 5319 states and 11781 transitions. Second operand 4 states. [2019-11-15 22:17:50,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:50,959 INFO L93 Difference]: Finished difference Result 6292 states and 13844 transitions. [2019-11-15 22:17:50,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 22:17:50,960 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2019-11-15 22:17:50,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:50,968 INFO L225 Difference]: With dead ends: 6292 [2019-11-15 22:17:50,968 INFO L226 Difference]: Without dead ends: 6292 [2019-11-15 22:17:50,968 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:17:50,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6292 states. [2019-11-15 22:17:51,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6292 to 5523. [2019-11-15 22:17:51,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5523 states. [2019-11-15 22:17:51,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5523 states to 5523 states and 12210 transitions. [2019-11-15 22:17:51,050 INFO L78 Accepts]: Start accepts. Automaton has 5523 states and 12210 transitions. Word has length 93 [2019-11-15 22:17:51,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:51,051 INFO L462 AbstractCegarLoop]: Abstraction has 5523 states and 12210 transitions. [2019-11-15 22:17:51,051 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:17:51,051 INFO L276 IsEmpty]: Start isEmpty. Operand 5523 states and 12210 transitions. [2019-11-15 22:17:51,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 22:17:51,058 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:51,058 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:51,059 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:51,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:51,059 INFO L82 PathProgramCache]: Analyzing trace with hash -1046310043, now seen corresponding path program 1 times [2019-11-15 22:17:51,059 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:51,060 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1430112350] [2019-11-15 22:17:51,060 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:51,060 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:51,060 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:51,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:51,146 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:51,146 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1430112350] [2019-11-15 22:17:51,147 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:51,147 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 22:17:51,147 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1421807646] [2019-11-15 22:17:51,148 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 22:17:51,148 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:51,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 22:17:51,149 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:17:51,149 INFO L87 Difference]: Start difference. First operand 5523 states and 12210 transitions. Second operand 5 states. [2019-11-15 22:17:51,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:51,282 INFO L93 Difference]: Finished difference Result 5992 states and 13231 transitions. [2019-11-15 22:17:51,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 22:17:51,283 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-11-15 22:17:51,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:51,289 INFO L225 Difference]: With dead ends: 5992 [2019-11-15 22:17:51,290 INFO L226 Difference]: Without dead ends: 5992 [2019-11-15 22:17:51,291 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:17:51,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5992 states. [2019-11-15 22:17:51,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5992 to 4636. [2019-11-15 22:17:51,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4636 states. [2019-11-15 22:17:51,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4636 states to 4636 states and 10239 transitions. [2019-11-15 22:17:51,363 INFO L78 Accepts]: Start accepts. Automaton has 4636 states and 10239 transitions. Word has length 95 [2019-11-15 22:17:51,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:51,363 INFO L462 AbstractCegarLoop]: Abstraction has 4636 states and 10239 transitions. [2019-11-15 22:17:51,363 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 22:17:51,364 INFO L276 IsEmpty]: Start isEmpty. Operand 4636 states and 10239 transitions. [2019-11-15 22:17:51,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 22:17:51,369 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:51,369 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:51,369 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:51,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:51,370 INFO L82 PathProgramCache]: Analyzing trace with hash -1034993916, now seen corresponding path program 1 times [2019-11-15 22:17:51,370 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:51,370 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [928787785] [2019-11-15 22:17:51,370 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:51,371 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:51,371 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:51,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:51,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:51,434 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [928787785] [2019-11-15 22:17:51,434 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:51,434 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:17:51,434 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [917809481] [2019-11-15 22:17:51,435 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:17:51,435 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:51,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:17:51,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:17:51,436 INFO L87 Difference]: Start difference. First operand 4636 states and 10239 transitions. Second operand 4 states. [2019-11-15 22:17:51,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:51,519 INFO L93 Difference]: Finished difference Result 5067 states and 11206 transitions. [2019-11-15 22:17:51,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 22:17:51,520 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2019-11-15 22:17:51,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:51,524 INFO L225 Difference]: With dead ends: 5067 [2019-11-15 22:17:51,524 INFO L226 Difference]: Without dead ends: 5067 [2019-11-15 22:17:51,524 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:17:51,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5067 states. [2019-11-15 22:17:51,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5067 to 4707. [2019-11-15 22:17:51,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4707 states. [2019-11-15 22:17:51,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4707 states to 4707 states and 10390 transitions. [2019-11-15 22:17:51,567 INFO L78 Accepts]: Start accepts. Automaton has 4707 states and 10390 transitions. Word has length 95 [2019-11-15 22:17:51,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:51,567 INFO L462 AbstractCegarLoop]: Abstraction has 4707 states and 10390 transitions. [2019-11-15 22:17:51,567 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:17:51,567 INFO L276 IsEmpty]: Start isEmpty. Operand 4707 states and 10390 transitions. [2019-11-15 22:17:51,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 22:17:51,572 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:51,572 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:51,573 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:51,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:51,573 INFO L82 PathProgramCache]: Analyzing trace with hash 64984163, now seen corresponding path program 1 times [2019-11-15 22:17:51,573 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:51,574 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2074383343] [2019-11-15 22:17:51,574 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:51,574 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:51,574 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:51,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:51,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:51,669 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2074383343] [2019-11-15 22:17:51,669 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:51,669 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 22:17:51,670 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1491351842] [2019-11-15 22:17:51,670 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 22:17:51,670 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:51,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 22:17:51,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:17:51,671 INFO L87 Difference]: Start difference. First operand 4707 states and 10390 transitions. Second operand 6 states. [2019-11-15 22:17:51,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:51,905 INFO L93 Difference]: Finished difference Result 5209 states and 11414 transitions. [2019-11-15 22:17:51,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 22:17:51,905 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 22:17:51,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:51,911 INFO L225 Difference]: With dead ends: 5209 [2019-11-15 22:17:51,911 INFO L226 Difference]: Without dead ends: 5209 [2019-11-15 22:17:51,912 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 22:17:51,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5209 states. [2019-11-15 22:17:51,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5209 to 4603. [2019-11-15 22:17:51,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4603 states. [2019-11-15 22:17:51,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4603 states to 4603 states and 10203 transitions. [2019-11-15 22:17:51,956 INFO L78 Accepts]: Start accepts. Automaton has 4603 states and 10203 transitions. Word has length 95 [2019-11-15 22:17:51,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:51,957 INFO L462 AbstractCegarLoop]: Abstraction has 4603 states and 10203 transitions. [2019-11-15 22:17:51,957 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 22:17:51,957 INFO L276 IsEmpty]: Start isEmpty. Operand 4603 states and 10203 transitions. [2019-11-15 22:17:51,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 22:17:51,961 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:51,961 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:51,961 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:51,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:51,962 INFO L82 PathProgramCache]: Analyzing trace with hash -476923578, now seen corresponding path program 1 times [2019-11-15 22:17:51,962 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:51,962 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1472155533] [2019-11-15 22:17:51,962 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:51,962 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:51,963 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:51,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:52,021 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:52,021 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1472155533] [2019-11-15 22:17:52,021 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:52,022 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 22:17:52,022 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1011651502] [2019-11-15 22:17:52,022 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 22:17:52,022 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:52,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 22:17:52,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 22:17:52,023 INFO L87 Difference]: Start difference. First operand 4603 states and 10203 transitions. Second operand 4 states. [2019-11-15 22:17:52,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:52,272 INFO L93 Difference]: Finished difference Result 5835 states and 12862 transitions. [2019-11-15 22:17:52,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 22:17:52,272 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2019-11-15 22:17:52,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:52,277 INFO L225 Difference]: With dead ends: 5835 [2019-11-15 22:17:52,277 INFO L226 Difference]: Without dead ends: 5783 [2019-11-15 22:17:52,277 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 22:17:52,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5783 states. [2019-11-15 22:17:52,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5783 to 5480. [2019-11-15 22:17:52,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5480 states. [2019-11-15 22:17:52,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5480 states to 5480 states and 12104 transitions. [2019-11-15 22:17:52,334 INFO L78 Accepts]: Start accepts. Automaton has 5480 states and 12104 transitions. Word has length 95 [2019-11-15 22:17:52,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:52,334 INFO L462 AbstractCegarLoop]: Abstraction has 5480 states and 12104 transitions. [2019-11-15 22:17:52,334 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 22:17:52,334 INFO L276 IsEmpty]: Start isEmpty. Operand 5480 states and 12104 transitions. [2019-11-15 22:17:52,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 22:17:52,342 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:52,342 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:52,342 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:52,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:52,343 INFO L82 PathProgramCache]: Analyzing trace with hash 640856296, now seen corresponding path program 1 times [2019-11-15 22:17:52,343 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:52,343 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1711993794] [2019-11-15 22:17:52,343 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:52,344 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:52,344 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:52,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:52,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:52,437 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1711993794] [2019-11-15 22:17:52,437 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:52,437 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 22:17:52,438 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [606000492] [2019-11-15 22:17:52,438 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 22:17:52,438 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:52,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 22:17:52,439 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 22:17:52,439 INFO L87 Difference]: Start difference. First operand 5480 states and 12104 transitions. Second operand 7 states. [2019-11-15 22:17:52,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:52,802 INFO L93 Difference]: Finished difference Result 7306 states and 16105 transitions. [2019-11-15 22:17:52,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-15 22:17:52,802 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 95 [2019-11-15 22:17:52,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:52,809 INFO L225 Difference]: With dead ends: 7306 [2019-11-15 22:17:52,809 INFO L226 Difference]: Without dead ends: 7306 [2019-11-15 22:17:52,809 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2019-11-15 22:17:52,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7306 states. [2019-11-15 22:17:52,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7306 to 6576. [2019-11-15 22:17:52,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6576 states. [2019-11-15 22:17:52,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6576 states to 6576 states and 14521 transitions. [2019-11-15 22:17:52,882 INFO L78 Accepts]: Start accepts. Automaton has 6576 states and 14521 transitions. Word has length 95 [2019-11-15 22:17:52,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:52,882 INFO L462 AbstractCegarLoop]: Abstraction has 6576 states and 14521 transitions. [2019-11-15 22:17:52,882 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 22:17:52,883 INFO L276 IsEmpty]: Start isEmpty. Operand 6576 states and 14521 transitions. [2019-11-15 22:17:52,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 22:17:52,888 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:52,888 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:52,889 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:52,889 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:52,889 INFO L82 PathProgramCache]: Analyzing trace with hash 1740834375, now seen corresponding path program 1 times [2019-11-15 22:17:52,889 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:52,889 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1962259367] [2019-11-15 22:17:52,889 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:52,889 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:52,889 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:52,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:53,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:53,112 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1962259367] [2019-11-15 22:17:53,112 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:53,112 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-11-15 22:17:53,113 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2022117147] [2019-11-15 22:17:53,113 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-11-15 22:17:53,113 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:53,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-11-15 22:17:53,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2019-11-15 22:17:53,113 INFO L87 Difference]: Start difference. First operand 6576 states and 14521 transitions. Second operand 13 states. [2019-11-15 22:17:54,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:54,230 INFO L93 Difference]: Finished difference Result 9627 states and 20877 transitions. [2019-11-15 22:17:54,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-11-15 22:17:54,230 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 95 [2019-11-15 22:17:54,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:54,239 INFO L225 Difference]: With dead ends: 9627 [2019-11-15 22:17:54,239 INFO L226 Difference]: Without dead ends: 9627 [2019-11-15 22:17:54,240 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 8 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 154 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=155, Invalid=715, Unknown=0, NotChecked=0, Total=870 [2019-11-15 22:17:54,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9627 states. [2019-11-15 22:17:54,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9627 to 7371. [2019-11-15 22:17:54,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7371 states. [2019-11-15 22:17:54,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7371 states to 7371 states and 16263 transitions. [2019-11-15 22:17:54,351 INFO L78 Accepts]: Start accepts. Automaton has 7371 states and 16263 transitions. Word has length 95 [2019-11-15 22:17:54,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:54,352 INFO L462 AbstractCegarLoop]: Abstraction has 7371 states and 16263 transitions. [2019-11-15 22:17:54,352 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-11-15 22:17:54,352 INFO L276 IsEmpty]: Start isEmpty. Operand 7371 states and 16263 transitions. [2019-11-15 22:17:54,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 22:17:54,359 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:54,360 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:54,360 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:54,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:54,360 INFO L82 PathProgramCache]: Analyzing trace with hash -1455278327, now seen corresponding path program 1 times [2019-11-15 22:17:54,360 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:54,360 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1361367491] [2019-11-15 22:17:54,361 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:54,361 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:54,361 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:54,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 22:17:54,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 22:17:54,527 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1361367491] [2019-11-15 22:17:54,527 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 22:17:54,527 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-15 22:17:54,528 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1343880918] [2019-11-15 22:17:54,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-15 22:17:54,528 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 22:17:54,529 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-15 22:17:54,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2019-11-15 22:17:54,529 INFO L87 Difference]: Start difference. First operand 7371 states and 16263 transitions. Second operand 10 states. [2019-11-15 22:17:54,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 22:17:54,970 INFO L93 Difference]: Finished difference Result 21781 states and 48597 transitions. [2019-11-15 22:17:54,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-11-15 22:17:54,971 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 95 [2019-11-15 22:17:54,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 22:17:54,984 INFO L225 Difference]: With dead ends: 21781 [2019-11-15 22:17:54,984 INFO L226 Difference]: Without dead ends: 14413 [2019-11-15 22:17:54,985 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=95, Invalid=367, Unknown=0, NotChecked=0, Total=462 [2019-11-15 22:17:55,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14413 states. [2019-11-15 22:17:55,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14413 to 7181. [2019-11-15 22:17:55,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7181 states. [2019-11-15 22:17:55,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7181 states to 7181 states and 15781 transitions. [2019-11-15 22:17:55,090 INFO L78 Accepts]: Start accepts. Automaton has 7181 states and 15781 transitions. Word has length 95 [2019-11-15 22:17:55,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 22:17:55,090 INFO L462 AbstractCegarLoop]: Abstraction has 7181 states and 15781 transitions. [2019-11-15 22:17:55,090 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-15 22:17:55,090 INFO L276 IsEmpty]: Start isEmpty. Operand 7181 states and 15781 transitions. [2019-11-15 22:17:55,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 22:17:55,096 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 22:17:55,097 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 22:17:55,097 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 22:17:55,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 22:17:55,097 INFO L82 PathProgramCache]: Analyzing trace with hash 425096515, now seen corresponding path program 2 times [2019-11-15 22:17:55,097 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 22:17:55,097 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1201212437] [2019-11-15 22:17:55,098 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:55,098 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 22:17:55,098 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 22:17:55,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 22:17:55,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 22:17:55,185 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 22:17:55,185 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 22:17:55,348 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 22:17:55,353 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 10:17:55 BasicIcfg [2019-11-15 22:17:55,353 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 22:17:55,353 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 22:17:55,354 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 22:17:55,354 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 22:17:55,354 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 10:17:13" (3/4) ... [2019-11-15 22:17:55,370 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 22:17:55,532 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_0e945c6f-6904-4ae6-a65d-8df763bd20c4/bin/uautomizer/witness.graphml [2019-11-15 22:17:55,532 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 22:17:55,534 INFO L168 Benchmark]: Toolchain (without parser) took 43760.93 ms. Allocated memory was 1.0 GB in the beginning and 4.8 GB in the end (delta: 3.8 GB). Free memory was 939.4 MB in the beginning and 1.4 GB in the end (delta: -460.1 MB). Peak memory consumption was 3.3 GB. Max. memory is 11.5 GB. [2019-11-15 22:17:55,535 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 22:17:55,535 INFO L168 Benchmark]: CACSL2BoogieTranslator took 740.54 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 133.7 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -160.7 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-11-15 22:17:55,536 INFO L168 Benchmark]: Boogie Procedure Inliner took 50.31 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-11-15 22:17:55,536 INFO L168 Benchmark]: Boogie Preprocessor took 36.28 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 22:17:55,536 INFO L168 Benchmark]: RCFGBuilder took 675.74 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.2 MB). Peak memory consumption was 49.2 MB. Max. memory is 11.5 GB. [2019-11-15 22:17:55,537 INFO L168 Benchmark]: TraceAbstraction took 42075.44 ms. Allocated memory was 1.2 GB in the beginning and 4.8 GB in the end (delta: 3.7 GB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -428.0 MB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. [2019-11-15 22:17:55,537 INFO L168 Benchmark]: Witness Printer took 178.53 ms. Allocated memory is still 4.8 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 74.1 MB). Peak memory consumption was 74.1 MB. Max. memory is 11.5 GB. [2019-11-15 22:17:55,540 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 740.54 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 133.7 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -160.7 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 50.31 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 36.28 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 675.74 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.2 MB). Peak memory consumption was 49.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 42075.44 ms. Allocated memory was 1.2 GB in the beginning and 4.8 GB in the end (delta: 3.7 GB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -428.0 MB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. * Witness Printer took 178.53 ms. Allocated memory is still 4.8 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 74.1 MB). Peak memory consumption was 74.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L698] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L699] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L700] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L702] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L704] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L705] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L706] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L707] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L708] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L709] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L710] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L711] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L712] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L713] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L714] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L715] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L716] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L717] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L718] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L719] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L720] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L793] 0 pthread_t t1549; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L794] FCALL, FORK 0 pthread_create(&t1549, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] 0 pthread_t t1550; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L724] 1 y$w_buff1 = y$w_buff0 [L725] 1 y$w_buff0 = 1 [L726] 1 y$w_buff1_used = y$w_buff0_used [L727] 1 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L729] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L730] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L731] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L732] 1 y$r_buff0_thd1 = (_Bool)1 [L735] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L738] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L796] FCALL, FORK 0 pthread_create(&t1550, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] 2 x = 1 [L755] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L756] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L757] 2 y$flush_delayed = weak$$choice2 [L758] 2 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=3, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L759] EXPR 2 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=3, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L738] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L739] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=1, y$flush_delayed=3, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L759] 2 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L739] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L760] EXPR 2 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0))=1, x=1, y=0, y$flush_delayed=3, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L760] 2 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L761] EXPR 2 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1))=0, x=1, y=0, y$flush_delayed=3, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L761] 2 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L762] EXPR 2 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=3, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L762] 2 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L763] EXPR 2 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=3, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L763] 2 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L740] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=3, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L741] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=3, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L741] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L742] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=3, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L742] 1 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L745] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=3, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L764] EXPR 2 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2))=0, x=1, y=0, y$flush_delayed=3, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L764] 2 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L765] EXPR 2 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=3, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L765] 2 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L766] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=3, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L767] EXPR 2 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=3, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L767] 2 y = y$flush_delayed ? y$mem_tmp : y [L768] 2 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L771] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L771] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L771] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L771] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L772] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L772] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L773] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L773] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L774] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L774] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L775] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L775] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L778] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L803] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L803] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L804] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L805] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L805] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L806] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L806] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L809] 0 main$tmp_guard1 = !(__unbuffered_p0_EAX == 0 && __unbuffered_p1_EAX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 218 locations, 3 error locations. Result: UNSAFE, OverallTime: 41.9s, OverallIterations: 31, TraceHistogramMax: 1, AutomataDifference: 15.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8211 SDtfs, 8680 SDslu, 19699 SDs, 0 SdLazy, 7673 SolverSat, 428 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 305 GetRequests, 89 SyntacticMatches, 17 SemanticMatches, 199 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 330 ImplicationChecksByTransitivity, 2.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=71011occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 20.2s AutomataMinimizationTime, 30 MinimizatonAttempts, 104232 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.1s InterpolantComputationTime, 2158 NumberOfCodeBlocks, 2158 NumberOfCodeBlocksAsserted, 31 NumberOfCheckSat, 2033 ConstructedInterpolants, 0 QuantifiedInterpolants, 352901 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 30 InterpolantComputations, 30 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...