./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi000_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_532930b7-82de-406b-afaa-fa28bc22d96c/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_532930b7-82de-406b-afaa-fa28bc22d96c/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_532930b7-82de-406b-afaa-fa28bc22d96c/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_532930b7-82de-406b-afaa-fa28bc22d96c/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi000_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_532930b7-82de-406b-afaa-fa28bc22d96c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_532930b7-82de-406b-afaa-fa28bc22d96c/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 1f00de7da7b6b45d2876e8ff7272563c7aa8533e ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 21:32:02,539 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 21:32:02,540 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 21:32:02,550 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 21:32:02,551 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 21:32:02,552 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 21:32:02,553 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 21:32:02,555 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 21:32:02,557 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 21:32:02,558 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 21:32:02,558 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 21:32:02,560 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 21:32:02,560 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 21:32:02,561 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 21:32:02,562 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 21:32:02,563 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 21:32:02,563 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 21:32:02,564 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 21:32:02,566 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 21:32:02,568 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 21:32:02,569 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 21:32:02,570 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 21:32:02,571 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 21:32:02,572 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 21:32:02,575 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 21:32:02,575 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 21:32:02,575 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 21:32:02,576 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 21:32:02,577 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 21:32:02,578 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 21:32:02,578 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 21:32:02,579 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 21:32:02,579 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 21:32:02,580 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 21:32:02,581 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 21:32:02,581 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 21:32:02,582 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 21:32:02,582 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 21:32:02,582 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 21:32:02,583 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 21:32:02,584 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 21:32:02,587 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_532930b7-82de-406b-afaa-fa28bc22d96c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 21:32:02,600 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 21:32:02,601 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 21:32:02,602 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 21:32:02,602 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 21:32:02,602 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 21:32:02,602 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 21:32:02,603 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 21:32:02,603 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 21:32:02,603 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 21:32:02,603 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 21:32:02,604 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 21:32:02,604 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 21:32:02,604 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 21:32:02,604 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 21:32:02,605 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 21:32:02,605 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 21:32:02,605 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 21:32:02,605 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 21:32:02,606 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 21:32:02,606 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 21:32:02,606 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 21:32:02,606 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 21:32:02,607 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 21:32:02,607 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 21:32:02,607 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 21:32:02,607 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 21:32:02,608 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 21:32:02,608 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 21:32:02,608 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_532930b7-82de-406b-afaa-fa28bc22d96c/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1f00de7da7b6b45d2876e8ff7272563c7aa8533e [2019-11-15 21:32:02,644 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 21:32:02,655 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 21:32:02,657 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 21:32:02,659 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 21:32:02,659 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 21:32:02,659 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_532930b7-82de-406b-afaa-fa28bc22d96c/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/rfi000_power.opt.i [2019-11-15 21:32:02,709 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_532930b7-82de-406b-afaa-fa28bc22d96c/bin/uautomizer/data/5363e1780/a89882df4caf4735a1d43c68180ee210/FLAG24caaad70 [2019-11-15 21:32:03,128 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 21:32:03,129 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_532930b7-82de-406b-afaa-fa28bc22d96c/sv-benchmarks/c/pthread-wmm/rfi000_power.opt.i [2019-11-15 21:32:03,150 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_532930b7-82de-406b-afaa-fa28bc22d96c/bin/uautomizer/data/5363e1780/a89882df4caf4735a1d43c68180ee210/FLAG24caaad70 [2019-11-15 21:32:03,165 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_532930b7-82de-406b-afaa-fa28bc22d96c/bin/uautomizer/data/5363e1780/a89882df4caf4735a1d43c68180ee210 [2019-11-15 21:32:03,168 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 21:32:03,169 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 21:32:03,171 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 21:32:03,172 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 21:32:03,175 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 21:32:03,176 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 09:32:03" (1/1) ... [2019-11-15 21:32:03,179 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2462d061 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:32:03, skipping insertion in model container [2019-11-15 21:32:03,180 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 09:32:03" (1/1) ... [2019-11-15 21:32:03,186 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 21:32:03,240 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 21:32:03,603 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 21:32:03,614 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 21:32:03,668 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 21:32:03,758 INFO L192 MainTranslator]: Completed translation [2019-11-15 21:32:03,758 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:32:03 WrapperNode [2019-11-15 21:32:03,758 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 21:32:03,759 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 21:32:03,760 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 21:32:03,760 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 21:32:03,768 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:32:03" (1/1) ... [2019-11-15 21:32:03,788 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:32:03" (1/1) ... [2019-11-15 21:32:03,820 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 21:32:03,821 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 21:32:03,821 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 21:32:03,821 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 21:32:03,830 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:32:03" (1/1) ... [2019-11-15 21:32:03,830 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:32:03" (1/1) ... [2019-11-15 21:32:03,834 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:32:03" (1/1) ... [2019-11-15 21:32:03,835 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:32:03" (1/1) ... [2019-11-15 21:32:03,844 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:32:03" (1/1) ... [2019-11-15 21:32:03,847 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:32:03" (1/1) ... [2019-11-15 21:32:03,850 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:32:03" (1/1) ... [2019-11-15 21:32:03,855 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 21:32:03,855 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 21:32:03,855 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 21:32:03,856 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 21:32:03,856 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:32:03" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_532930b7-82de-406b-afaa-fa28bc22d96c/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 21:32:03,914 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 21:32:03,914 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 21:32:03,915 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 21:32:03,915 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 21:32:03,915 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 21:32:03,915 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 21:32:03,915 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 21:32:03,915 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 21:32:03,915 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 21:32:03,915 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 21:32:03,915 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 21:32:03,917 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 21:32:04,521 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 21:32:04,522 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 21:32:04,523 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:32:04 BoogieIcfgContainer [2019-11-15 21:32:04,523 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 21:32:04,524 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 21:32:04,524 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 21:32:04,527 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 21:32:04,527 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 09:32:03" (1/3) ... [2019-11-15 21:32:04,531 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@551bcece and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 09:32:04, skipping insertion in model container [2019-11-15 21:32:04,531 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:32:03" (2/3) ... [2019-11-15 21:32:04,532 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@551bcece and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 09:32:04, skipping insertion in model container [2019-11-15 21:32:04,532 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:32:04" (3/3) ... [2019-11-15 21:32:04,538 INFO L109 eAbstractionObserver]: Analyzing ICFG rfi000_power.opt.i [2019-11-15 21:32:04,596 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,597 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,597 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,597 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,597 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,597 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,598 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,598 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,598 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,598 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,598 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,598 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,599 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,599 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,599 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,599 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,600 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,600 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,600 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,600 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,600 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,600 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,601 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,601 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,601 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,601 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,601 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,602 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,602 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,602 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,602 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,603 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,603 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,603 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,603 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,603 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,603 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,604 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,604 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,604 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,604 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,604 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,605 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,605 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,605 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,605 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,605 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,606 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,606 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,606 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,606 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,606 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,607 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,607 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,607 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,607 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,607 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,607 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,608 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,608 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,608 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,608 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,608 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,608 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:32:04,614 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 21:32:04,614 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 21:32:04,621 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 21:32:04,631 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 21:32:04,648 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 21:32:04,648 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 21:32:04,649 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 21:32:04,649 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 21:32:04,649 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 21:32:04,649 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 21:32:04,649 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 21:32:04,649 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 21:32:04,661 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 140 places, 178 transitions [2019-11-15 21:32:06,245 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22494 states. [2019-11-15 21:32:06,247 INFO L276 IsEmpty]: Start isEmpty. Operand 22494 states. [2019-11-15 21:32:06,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-11-15 21:32:06,259 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:06,260 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:06,265 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:06,270 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:06,270 INFO L82 PathProgramCache]: Analyzing trace with hash 583556461, now seen corresponding path program 1 times [2019-11-15 21:32:06,278 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:06,279 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [996449879] [2019-11-15 21:32:06,279 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:06,280 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:06,280 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:06,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:06,619 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:06,624 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [996449879] [2019-11-15 21:32:06,625 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:06,625 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:32:06,626 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1474336658] [2019-11-15 21:32:06,630 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:32:06,630 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:06,643 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:32:06,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:32:06,646 INFO L87 Difference]: Start difference. First operand 22494 states. Second operand 4 states. [2019-11-15 21:32:07,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:07,264 INFO L93 Difference]: Finished difference Result 23446 states and 91747 transitions. [2019-11-15 21:32:07,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:32:07,266 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2019-11-15 21:32:07,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:07,477 INFO L225 Difference]: With dead ends: 23446 [2019-11-15 21:32:07,477 INFO L226 Difference]: Without dead ends: 21270 [2019-11-15 21:32:07,478 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:32:07,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21270 states. [2019-11-15 21:32:08,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21270 to 21270. [2019-11-15 21:32:08,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21270 states. [2019-11-15 21:32:08,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21270 states to 21270 states and 83771 transitions. [2019-11-15 21:32:08,672 INFO L78 Accepts]: Start accepts. Automaton has 21270 states and 83771 transitions. Word has length 37 [2019-11-15 21:32:08,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:08,673 INFO L462 AbstractCegarLoop]: Abstraction has 21270 states and 83771 transitions. [2019-11-15 21:32:08,674 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:32:08,674 INFO L276 IsEmpty]: Start isEmpty. Operand 21270 states and 83771 transitions. [2019-11-15 21:32:08,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-15 21:32:08,683 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:08,683 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:08,683 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:08,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:08,684 INFO L82 PathProgramCache]: Analyzing trace with hash -1191878066, now seen corresponding path program 1 times [2019-11-15 21:32:08,684 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:08,685 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [436245953] [2019-11-15 21:32:08,685 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:08,685 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:08,685 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:08,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:08,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:08,765 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [436245953] [2019-11-15 21:32:08,765 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:08,766 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:32:08,766 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2023392336] [2019-11-15 21:32:08,767 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:32:08,767 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:08,768 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:32:08,768 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:32:08,768 INFO L87 Difference]: Start difference. First operand 21270 states and 83771 transitions. Second operand 5 states. [2019-11-15 21:32:09,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:09,539 INFO L93 Difference]: Finished difference Result 34704 states and 129063 transitions. [2019-11-15 21:32:09,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:32:09,539 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-11-15 21:32:09,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:09,681 INFO L225 Difference]: With dead ends: 34704 [2019-11-15 21:32:09,681 INFO L226 Difference]: Without dead ends: 34560 [2019-11-15 21:32:09,682 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:32:10,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34560 states. [2019-11-15 21:32:10,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34560 to 33060. [2019-11-15 21:32:10,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33060 states. [2019-11-15 21:32:11,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33060 states to 33060 states and 123951 transitions. [2019-11-15 21:32:11,037 INFO L78 Accepts]: Start accepts. Automaton has 33060 states and 123951 transitions. Word has length 44 [2019-11-15 21:32:11,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:11,039 INFO L462 AbstractCegarLoop]: Abstraction has 33060 states and 123951 transitions. [2019-11-15 21:32:11,039 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:32:11,039 INFO L276 IsEmpty]: Start isEmpty. Operand 33060 states and 123951 transitions. [2019-11-15 21:32:11,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-15 21:32:11,043 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:11,043 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:11,044 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:11,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:11,044 INFO L82 PathProgramCache]: Analyzing trace with hash 613942952, now seen corresponding path program 1 times [2019-11-15 21:32:11,044 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:11,045 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1740470636] [2019-11-15 21:32:11,045 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:11,045 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:11,045 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:11,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:11,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:11,122 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1740470636] [2019-11-15 21:32:11,122 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:11,122 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:32:11,122 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1905745505] [2019-11-15 21:32:11,123 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:32:11,123 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:11,123 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:32:11,123 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:32:11,123 INFO L87 Difference]: Start difference. First operand 33060 states and 123951 transitions. Second operand 5 states. [2019-11-15 21:32:12,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:12,221 INFO L93 Difference]: Finished difference Result 40212 states and 148620 transitions. [2019-11-15 21:32:12,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:32:12,222 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-11-15 21:32:12,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:12,329 INFO L225 Difference]: With dead ends: 40212 [2019-11-15 21:32:12,329 INFO L226 Difference]: Without dead ends: 40052 [2019-11-15 21:32:12,330 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:32:12,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40052 states. [2019-11-15 21:32:13,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40052 to 34633. [2019-11-15 21:32:13,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34633 states. [2019-11-15 21:32:13,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34633 states to 34633 states and 129247 transitions. [2019-11-15 21:32:13,902 INFO L78 Accepts]: Start accepts. Automaton has 34633 states and 129247 transitions. Word has length 45 [2019-11-15 21:32:13,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:13,903 INFO L462 AbstractCegarLoop]: Abstraction has 34633 states and 129247 transitions. [2019-11-15 21:32:13,903 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:32:13,903 INFO L276 IsEmpty]: Start isEmpty. Operand 34633 states and 129247 transitions. [2019-11-15 21:32:13,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-15 21:32:13,917 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:13,918 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:13,918 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:13,918 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:13,919 INFO L82 PathProgramCache]: Analyzing trace with hash -1616471415, now seen corresponding path program 1 times [2019-11-15 21:32:13,919 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:13,919 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [747730852] [2019-11-15 21:32:13,919 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:13,919 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:13,920 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:13,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:14,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:14,060 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [747730852] [2019-11-15 21:32:14,060 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:14,061 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:32:14,061 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [967627887] [2019-11-15 21:32:14,061 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:32:14,061 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:14,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:32:14,062 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:32:14,062 INFO L87 Difference]: Start difference. First operand 34633 states and 129247 transitions. Second operand 6 states. [2019-11-15 21:32:14,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:14,994 INFO L93 Difference]: Finished difference Result 45661 states and 166141 transitions. [2019-11-15 21:32:14,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 21:32:14,994 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-15 21:32:14,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:15,096 INFO L225 Difference]: With dead ends: 45661 [2019-11-15 21:32:15,096 INFO L226 Difference]: Without dead ends: 45517 [2019-11-15 21:32:15,097 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 21:32:15,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45517 states. [2019-11-15 21:32:15,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45517 to 33596. [2019-11-15 21:32:15,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33596 states. [2019-11-15 21:32:16,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33596 states to 33596 states and 125402 transitions. [2019-11-15 21:32:16,059 INFO L78 Accepts]: Start accepts. Automaton has 33596 states and 125402 transitions. Word has length 52 [2019-11-15 21:32:16,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:16,060 INFO L462 AbstractCegarLoop]: Abstraction has 33596 states and 125402 transitions. [2019-11-15 21:32:16,060 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:32:16,060 INFO L276 IsEmpty]: Start isEmpty. Operand 33596 states and 125402 transitions. [2019-11-15 21:32:16,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-11-15 21:32:16,093 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:16,093 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:16,093 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:16,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:16,094 INFO L82 PathProgramCache]: Analyzing trace with hash -469025415, now seen corresponding path program 1 times [2019-11-15 21:32:16,094 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:16,094 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1226314138] [2019-11-15 21:32:16,095 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:16,095 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:16,095 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:16,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:16,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:16,201 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1226314138] [2019-11-15 21:32:16,201 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:16,202 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:32:16,202 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1318778542] [2019-11-15 21:32:16,202 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:32:16,202 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:16,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:32:16,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:32:16,203 INFO L87 Difference]: Start difference. First operand 33596 states and 125402 transitions. Second operand 6 states. [2019-11-15 21:32:17,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:17,469 INFO L93 Difference]: Finished difference Result 46068 states and 167835 transitions. [2019-11-15 21:32:17,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 21:32:17,470 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 59 [2019-11-15 21:32:17,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:17,549 INFO L225 Difference]: With dead ends: 46068 [2019-11-15 21:32:17,550 INFO L226 Difference]: Without dead ends: 45828 [2019-11-15 21:32:17,550 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 21:32:17,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45828 states. [2019-11-15 21:32:18,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45828 to 39957. [2019-11-15 21:32:18,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39957 states. [2019-11-15 21:32:18,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39957 states to 39957 states and 147326 transitions. [2019-11-15 21:32:18,336 INFO L78 Accepts]: Start accepts. Automaton has 39957 states and 147326 transitions. Word has length 59 [2019-11-15 21:32:18,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:18,336 INFO L462 AbstractCegarLoop]: Abstraction has 39957 states and 147326 transitions. [2019-11-15 21:32:18,336 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:32:18,336 INFO L276 IsEmpty]: Start isEmpty. Operand 39957 states and 147326 transitions. [2019-11-15 21:32:18,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-11-15 21:32:18,371 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:18,372 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:18,372 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:18,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:18,372 INFO L82 PathProgramCache]: Analyzing trace with hash 1354902346, now seen corresponding path program 1 times [2019-11-15 21:32:18,373 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:18,373 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [168542212] [2019-11-15 21:32:18,373 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:18,373 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:18,373 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:18,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:18,418 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:18,418 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [168542212] [2019-11-15 21:32:18,418 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:18,418 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:32:18,418 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1340092521] [2019-11-15 21:32:18,419 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:32:18,419 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:18,419 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:32:18,419 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:32:18,419 INFO L87 Difference]: Start difference. First operand 39957 states and 147326 transitions. Second operand 3 states. [2019-11-15 21:32:19,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:19,228 INFO L93 Difference]: Finished difference Result 50255 states and 182161 transitions. [2019-11-15 21:32:19,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:32:19,229 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-11-15 21:32:19,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:19,318 INFO L225 Difference]: With dead ends: 50255 [2019-11-15 21:32:19,318 INFO L226 Difference]: Without dead ends: 50255 [2019-11-15 21:32:19,318 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:32:19,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50255 states. [2019-11-15 21:32:19,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50255 to 43887. [2019-11-15 21:32:19,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43887 states. [2019-11-15 21:32:20,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43887 states to 43887 states and 160764 transitions. [2019-11-15 21:32:20,082 INFO L78 Accepts]: Start accepts. Automaton has 43887 states and 160764 transitions. Word has length 61 [2019-11-15 21:32:20,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:20,082 INFO L462 AbstractCegarLoop]: Abstraction has 43887 states and 160764 transitions. [2019-11-15 21:32:20,082 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:32:20,082 INFO L276 IsEmpty]: Start isEmpty. Operand 43887 states and 160764 transitions. [2019-11-15 21:32:20,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-15 21:32:20,115 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:20,115 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:20,115 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:20,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:20,115 INFO L82 PathProgramCache]: Analyzing trace with hash 1019283348, now seen corresponding path program 1 times [2019-11-15 21:32:20,116 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:20,116 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [120589927] [2019-11-15 21:32:20,116 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:20,116 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:20,116 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:20,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:20,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:20,206 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [120589927] [2019-11-15 21:32:20,206 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:20,206 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:32:20,206 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1237892137] [2019-11-15 21:32:20,207 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:32:20,207 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:20,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:32:20,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:32:20,208 INFO L87 Difference]: Start difference. First operand 43887 states and 160764 transitions. Second operand 7 states. [2019-11-15 21:32:21,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:21,017 INFO L93 Difference]: Finished difference Result 55883 states and 200498 transitions. [2019-11-15 21:32:21,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 21:32:21,017 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-11-15 21:32:21,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:21,124 INFO L225 Difference]: With dead ends: 55883 [2019-11-15 21:32:21,125 INFO L226 Difference]: Without dead ends: 55643 [2019-11-15 21:32:21,125 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-15 21:32:21,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55643 states. [2019-11-15 21:32:22,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55643 to 45113. [2019-11-15 21:32:22,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45113 states. [2019-11-15 21:32:22,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45113 states to 45113 states and 164931 transitions. [2019-11-15 21:32:22,309 INFO L78 Accepts]: Start accepts. Automaton has 45113 states and 164931 transitions. Word has length 65 [2019-11-15 21:32:22,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:22,310 INFO L462 AbstractCegarLoop]: Abstraction has 45113 states and 164931 transitions. [2019-11-15 21:32:22,310 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:32:22,310 INFO L276 IsEmpty]: Start isEmpty. Operand 45113 states and 164931 transitions. [2019-11-15 21:32:22,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 21:32:22,343 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:22,343 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:22,343 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:22,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:22,344 INFO L82 PathProgramCache]: Analyzing trace with hash -428543078, now seen corresponding path program 1 times [2019-11-15 21:32:22,344 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:22,344 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [290069889] [2019-11-15 21:32:22,344 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:22,344 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:22,344 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:22,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:22,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:22,433 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [290069889] [2019-11-15 21:32:22,434 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:22,434 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:32:22,434 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1522930917] [2019-11-15 21:32:22,434 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:32:22,434 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:22,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:32:22,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:32:22,435 INFO L87 Difference]: Start difference. First operand 45113 states and 164931 transitions. Second operand 7 states. [2019-11-15 21:32:23,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:23,438 INFO L93 Difference]: Finished difference Result 55097 states and 197675 transitions. [2019-11-15 21:32:23,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 21:32:23,439 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-11-15 21:32:23,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:23,550 INFO L225 Difference]: With dead ends: 55097 [2019-11-15 21:32:23,550 INFO L226 Difference]: Without dead ends: 54897 [2019-11-15 21:32:23,551 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-15 21:32:23,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54897 states. [2019-11-15 21:32:24,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54897 to 45991. [2019-11-15 21:32:24,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45991 states. [2019-11-15 21:32:24,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45991 states to 45991 states and 167802 transitions. [2019-11-15 21:32:24,474 INFO L78 Accepts]: Start accepts. Automaton has 45991 states and 167802 transitions. Word has length 66 [2019-11-15 21:32:24,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:24,474 INFO L462 AbstractCegarLoop]: Abstraction has 45991 states and 167802 transitions. [2019-11-15 21:32:24,474 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:32:24,475 INFO L276 IsEmpty]: Start isEmpty. Operand 45991 states and 167802 transitions. [2019-11-15 21:32:24,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-11-15 21:32:24,504 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:24,504 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:24,504 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:24,504 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:24,504 INFO L82 PathProgramCache]: Analyzing trace with hash 1329095655, now seen corresponding path program 1 times [2019-11-15 21:32:24,504 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:24,505 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [352876988] [2019-11-15 21:32:24,505 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:24,505 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:24,505 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:24,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:25,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:25,107 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [352876988] [2019-11-15 21:32:25,107 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:25,107 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:32:25,107 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [733051619] [2019-11-15 21:32:25,108 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:32:25,108 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:25,108 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:32:25,108 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:32:25,108 INFO L87 Difference]: Start difference. First operand 45991 states and 167802 transitions. Second operand 6 states. [2019-11-15 21:32:25,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:25,872 INFO L93 Difference]: Finished difference Result 65551 states and 237329 transitions. [2019-11-15 21:32:25,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:32:25,872 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2019-11-15 21:32:25,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:26,000 INFO L225 Difference]: With dead ends: 65551 [2019-11-15 21:32:26,000 INFO L226 Difference]: Without dead ends: 64907 [2019-11-15 21:32:26,000 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:32:26,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64907 states. [2019-11-15 21:32:26,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64907 to 56041. [2019-11-15 21:32:26,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56041 states. [2019-11-15 21:32:27,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56041 states to 56041 states and 204332 transitions. [2019-11-15 21:32:27,054 INFO L78 Accepts]: Start accepts. Automaton has 56041 states and 204332 transitions. Word has length 68 [2019-11-15 21:32:27,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:27,054 INFO L462 AbstractCegarLoop]: Abstraction has 56041 states and 204332 transitions. [2019-11-15 21:32:27,054 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:32:27,054 INFO L276 IsEmpty]: Start isEmpty. Operand 56041 states and 204332 transitions. [2019-11-15 21:32:27,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-11-15 21:32:27,098 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:27,098 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:27,099 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:27,099 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:27,099 INFO L82 PathProgramCache]: Analyzing trace with hash -2004257624, now seen corresponding path program 1 times [2019-11-15 21:32:27,099 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:27,099 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1027136387] [2019-11-15 21:32:27,100 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:27,100 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:27,100 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:27,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:27,200 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:27,200 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1027136387] [2019-11-15 21:32:27,200 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:27,200 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:32:27,201 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1476022298] [2019-11-15 21:32:27,201 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:32:27,201 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:27,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:32:27,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:32:27,202 INFO L87 Difference]: Start difference. First operand 56041 states and 204332 transitions. Second operand 7 states. [2019-11-15 21:32:28,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:28,182 INFO L93 Difference]: Finished difference Result 83029 states and 292760 transitions. [2019-11-15 21:32:28,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 21:32:28,183 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 68 [2019-11-15 21:32:28,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:28,348 INFO L225 Difference]: With dead ends: 83029 [2019-11-15 21:32:28,348 INFO L226 Difference]: Without dead ends: 83029 [2019-11-15 21:32:28,349 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:32:28,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83029 states. [2019-11-15 21:32:30,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83029 to 76078. [2019-11-15 21:32:30,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76078 states. [2019-11-15 21:32:30,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76078 states to 76078 states and 270627 transitions. [2019-11-15 21:32:30,266 INFO L78 Accepts]: Start accepts. Automaton has 76078 states and 270627 transitions. Word has length 68 [2019-11-15 21:32:30,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:30,266 INFO L462 AbstractCegarLoop]: Abstraction has 76078 states and 270627 transitions. [2019-11-15 21:32:30,266 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:32:30,266 INFO L276 IsEmpty]: Start isEmpty. Operand 76078 states and 270627 transitions. [2019-11-15 21:32:30,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-11-15 21:32:30,354 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:30,354 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:30,355 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:30,355 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:30,356 INFO L82 PathProgramCache]: Analyzing trace with hash -759493143, now seen corresponding path program 1 times [2019-11-15 21:32:30,356 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:30,358 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [372889815] [2019-11-15 21:32:30,358 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:30,358 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:30,358 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:30,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:30,498 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:30,498 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [372889815] [2019-11-15 21:32:30,498 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:30,499 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:32:30,499 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1165434245] [2019-11-15 21:32:30,499 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:32:30,499 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:30,499 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:32:30,500 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:32:30,500 INFO L87 Difference]: Start difference. First operand 76078 states and 270627 transitions. Second operand 5 states. [2019-11-15 21:32:30,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:30,612 INFO L93 Difference]: Finished difference Result 17223 states and 54505 transitions. [2019-11-15 21:32:30,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:32:30,612 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 68 [2019-11-15 21:32:30,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:30,643 INFO L225 Difference]: With dead ends: 17223 [2019-11-15 21:32:30,643 INFO L226 Difference]: Without dead ends: 16745 [2019-11-15 21:32:30,644 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:32:30,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16745 states. [2019-11-15 21:32:30,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16745 to 16733. [2019-11-15 21:32:30,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16733 states. [2019-11-15 21:32:30,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16733 states to 16733 states and 53000 transitions. [2019-11-15 21:32:30,861 INFO L78 Accepts]: Start accepts. Automaton has 16733 states and 53000 transitions. Word has length 68 [2019-11-15 21:32:30,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:30,861 INFO L462 AbstractCegarLoop]: Abstraction has 16733 states and 53000 transitions. [2019-11-15 21:32:30,861 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:32:30,861 INFO L276 IsEmpty]: Start isEmpty. Operand 16733 states and 53000 transitions. [2019-11-15 21:32:30,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-15 21:32:30,871 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:30,871 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:30,871 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:30,871 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:30,871 INFO L82 PathProgramCache]: Analyzing trace with hash 388009851, now seen corresponding path program 1 times [2019-11-15 21:32:30,872 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:30,872 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2126514412] [2019-11-15 21:32:30,872 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:30,872 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:30,872 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:30,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:30,932 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:30,933 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2126514412] [2019-11-15 21:32:30,933 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:30,933 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:32:30,933 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [621804624] [2019-11-15 21:32:30,933 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:32:30,934 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:30,934 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:32:30,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:32:30,934 INFO L87 Difference]: Start difference. First operand 16733 states and 53000 transitions. Second operand 4 states. [2019-11-15 21:32:31,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:31,202 INFO L93 Difference]: Finished difference Result 22097 states and 69081 transitions. [2019-11-15 21:32:31,203 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:32:31,203 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2019-11-15 21:32:31,203 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:31,235 INFO L225 Difference]: With dead ends: 22097 [2019-11-15 21:32:31,235 INFO L226 Difference]: Without dead ends: 22097 [2019-11-15 21:32:31,235 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:32:31,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22097 states. [2019-11-15 21:32:31,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22097 to 17609. [2019-11-15 21:32:31,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17609 states. [2019-11-15 21:32:31,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17609 states to 17609 states and 55559 transitions. [2019-11-15 21:32:31,483 INFO L78 Accepts]: Start accepts. Automaton has 17609 states and 55559 transitions. Word has length 78 [2019-11-15 21:32:31,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:31,484 INFO L462 AbstractCegarLoop]: Abstraction has 17609 states and 55559 transitions. [2019-11-15 21:32:31,484 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:32:31,484 INFO L276 IsEmpty]: Start isEmpty. Operand 17609 states and 55559 transitions. [2019-11-15 21:32:31,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-15 21:32:31,495 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:31,495 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:31,496 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:31,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:31,496 INFO L82 PathProgramCache]: Analyzing trace with hash 133273306, now seen corresponding path program 1 times [2019-11-15 21:32:31,496 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:31,496 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2034394757] [2019-11-15 21:32:31,496 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:31,496 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:31,496 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:31,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:31,587 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:31,588 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2034394757] [2019-11-15 21:32:31,588 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:31,588 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:32:31,589 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [678273552] [2019-11-15 21:32:31,589 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 21:32:31,589 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:31,589 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 21:32:31,590 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:32:31,590 INFO L87 Difference]: Start difference. First operand 17609 states and 55559 transitions. Second operand 8 states. [2019-11-15 21:32:32,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:32,595 INFO L93 Difference]: Finished difference Result 19703 states and 61635 transitions. [2019-11-15 21:32:32,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-11-15 21:32:32,596 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 78 [2019-11-15 21:32:32,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:32,622 INFO L225 Difference]: With dead ends: 19703 [2019-11-15 21:32:32,622 INFO L226 Difference]: Without dead ends: 19655 [2019-11-15 21:32:32,623 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=165, Invalid=591, Unknown=0, NotChecked=0, Total=756 [2019-11-15 21:32:32,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19655 states. [2019-11-15 21:32:32,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19655 to 15527. [2019-11-15 21:32:32,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15527 states. [2019-11-15 21:32:32,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15527 states to 15527 states and 49293 transitions. [2019-11-15 21:32:32,848 INFO L78 Accepts]: Start accepts. Automaton has 15527 states and 49293 transitions. Word has length 78 [2019-11-15 21:32:32,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:32,848 INFO L462 AbstractCegarLoop]: Abstraction has 15527 states and 49293 transitions. [2019-11-15 21:32:32,848 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 21:32:32,848 INFO L276 IsEmpty]: Start isEmpty. Operand 15527 states and 49293 transitions. [2019-11-15 21:32:32,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 21:32:32,859 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:32,859 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:32,859 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:32,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:32,860 INFO L82 PathProgramCache]: Analyzing trace with hash 696413371, now seen corresponding path program 1 times [2019-11-15 21:32:32,860 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:32,860 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [794498834] [2019-11-15 21:32:32,860 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:32,860 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:32,861 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:32,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:32,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:32,902 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [794498834] [2019-11-15 21:32:32,902 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:32,903 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:32:32,903 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [388556007] [2019-11-15 21:32:32,903 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:32:32,903 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:32,904 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:32:32,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:32:32,904 INFO L87 Difference]: Start difference. First operand 15527 states and 49293 transitions. Second operand 3 states. [2019-11-15 21:32:33,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:33,111 INFO L93 Difference]: Finished difference Result 16791 states and 53006 transitions. [2019-11-15 21:32:33,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:32:33,112 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-11-15 21:32:33,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:33,135 INFO L225 Difference]: With dead ends: 16791 [2019-11-15 21:32:33,135 INFO L226 Difference]: Without dead ends: 16791 [2019-11-15 21:32:33,135 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:32:33,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16791 states. [2019-11-15 21:32:33,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16791 to 16143. [2019-11-15 21:32:33,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16143 states. [2019-11-15 21:32:33,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16143 states to 16143 states and 51107 transitions. [2019-11-15 21:32:33,348 INFO L78 Accepts]: Start accepts. Automaton has 16143 states and 51107 transitions. Word has length 79 [2019-11-15 21:32:33,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:33,349 INFO L462 AbstractCegarLoop]: Abstraction has 16143 states and 51107 transitions. [2019-11-15 21:32:33,349 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:32:33,349 INFO L276 IsEmpty]: Start isEmpty. Operand 16143 states and 51107 transitions. [2019-11-15 21:32:33,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 21:32:33,360 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:33,361 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:33,361 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:33,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:33,361 INFO L82 PathProgramCache]: Analyzing trace with hash -1274580935, now seen corresponding path program 1 times [2019-11-15 21:32:33,362 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:33,362 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1768167415] [2019-11-15 21:32:33,362 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:33,362 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:33,362 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:33,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:33,418 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:33,418 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1768167415] [2019-11-15 21:32:33,418 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:33,418 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:32:33,418 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1441037900] [2019-11-15 21:32:33,419 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:32:33,419 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:33,419 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:32:33,419 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:32:33,419 INFO L87 Difference]: Start difference. First operand 16143 states and 51107 transitions. Second operand 4 states. [2019-11-15 21:32:33,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:33,692 INFO L93 Difference]: Finished difference Result 19271 states and 60153 transitions. [2019-11-15 21:32:33,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:32:33,692 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 80 [2019-11-15 21:32:33,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:33,718 INFO L225 Difference]: With dead ends: 19271 [2019-11-15 21:32:33,718 INFO L226 Difference]: Without dead ends: 19271 [2019-11-15 21:32:33,719 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:32:33,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19271 states. [2019-11-15 21:32:34,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19271 to 18248. [2019-11-15 21:32:34,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18248 states. [2019-11-15 21:32:34,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18248 states to 18248 states and 57269 transitions. [2019-11-15 21:32:34,083 INFO L78 Accepts]: Start accepts. Automaton has 18248 states and 57269 transitions. Word has length 80 [2019-11-15 21:32:34,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:34,084 INFO L462 AbstractCegarLoop]: Abstraction has 18248 states and 57269 transitions. [2019-11-15 21:32:34,084 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:32:34,084 INFO L276 IsEmpty]: Start isEmpty. Operand 18248 states and 57269 transitions. [2019-11-15 21:32:34,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 21:32:34,098 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:34,098 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:34,098 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:34,098 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:34,098 INFO L82 PathProgramCache]: Analyzing trace with hash 1084726074, now seen corresponding path program 1 times [2019-11-15 21:32:34,099 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:34,099 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [853994361] [2019-11-15 21:32:34,099 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:34,099 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:34,099 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:34,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:34,157 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:34,160 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [853994361] [2019-11-15 21:32:34,161 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:34,163 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:32:34,164 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1877170321] [2019-11-15 21:32:34,164 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:32:34,164 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:34,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:32:34,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:32:34,165 INFO L87 Difference]: Start difference. First operand 18248 states and 57269 transitions. Second operand 3 states. [2019-11-15 21:32:34,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:34,401 INFO L93 Difference]: Finished difference Result 19579 states and 61168 transitions. [2019-11-15 21:32:34,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:32:34,401 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2019-11-15 21:32:34,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:34,427 INFO L225 Difference]: With dead ends: 19579 [2019-11-15 21:32:34,427 INFO L226 Difference]: Without dead ends: 19579 [2019-11-15 21:32:34,428 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:32:34,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19579 states. [2019-11-15 21:32:34,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19579 to 18920. [2019-11-15 21:32:34,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18920 states. [2019-11-15 21:32:34,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18920 states to 18920 states and 59233 transitions. [2019-11-15 21:32:34,671 INFO L78 Accepts]: Start accepts. Automaton has 18920 states and 59233 transitions. Word has length 80 [2019-11-15 21:32:34,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:34,671 INFO L462 AbstractCegarLoop]: Abstraction has 18920 states and 59233 transitions. [2019-11-15 21:32:34,671 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:32:34,671 INFO L276 IsEmpty]: Start isEmpty. Operand 18920 states and 59233 transitions. [2019-11-15 21:32:34,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:32:34,685 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:34,686 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:34,686 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:34,686 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:34,688 INFO L82 PathProgramCache]: Analyzing trace with hash -1572831584, now seen corresponding path program 1 times [2019-11-15 21:32:34,688 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:34,688 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1606411886] [2019-11-15 21:32:34,689 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:34,689 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:34,689 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:34,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:34,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:34,804 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1606411886] [2019-11-15 21:32:34,804 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:34,804 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:32:34,804 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [782715909] [2019-11-15 21:32:34,805 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:32:34,805 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:34,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:32:34,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:32:34,805 INFO L87 Difference]: Start difference. First operand 18920 states and 59233 transitions. Second operand 6 states. [2019-11-15 21:32:35,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:35,349 INFO L93 Difference]: Finished difference Result 30233 states and 93412 transitions. [2019-11-15 21:32:35,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:32:35,350 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 81 [2019-11-15 21:32:35,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:35,393 INFO L225 Difference]: With dead ends: 30233 [2019-11-15 21:32:35,393 INFO L226 Difference]: Without dead ends: 30233 [2019-11-15 21:32:35,393 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:32:35,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30233 states. [2019-11-15 21:32:35,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30233 to 21554. [2019-11-15 21:32:35,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21554 states. [2019-11-15 21:32:35,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21554 states to 21554 states and 66908 transitions. [2019-11-15 21:32:35,724 INFO L78 Accepts]: Start accepts. Automaton has 21554 states and 66908 transitions. Word has length 81 [2019-11-15 21:32:35,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:35,724 INFO L462 AbstractCegarLoop]: Abstraction has 21554 states and 66908 transitions. [2019-11-15 21:32:35,725 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:32:35,725 INFO L276 IsEmpty]: Start isEmpty. Operand 21554 states and 66908 transitions. [2019-11-15 21:32:35,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:32:35,741 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:35,742 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:35,742 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:35,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:35,742 INFO L82 PathProgramCache]: Analyzing trace with hash -328067103, now seen corresponding path program 1 times [2019-11-15 21:32:35,742 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:35,742 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1359156634] [2019-11-15 21:32:35,742 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:35,742 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:35,742 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:35,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:35,795 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:35,795 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1359156634] [2019-11-15 21:32:35,796 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:35,796 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:32:35,796 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [218918127] [2019-11-15 21:32:35,796 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:32:35,797 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:35,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:32:35,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:32:35,797 INFO L87 Difference]: Start difference. First operand 21554 states and 66908 transitions. Second operand 4 states. [2019-11-15 21:32:36,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:36,404 INFO L93 Difference]: Finished difference Result 28570 states and 87454 transitions. [2019-11-15 21:32:36,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:32:36,405 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 81 [2019-11-15 21:32:36,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:36,444 INFO L225 Difference]: With dead ends: 28570 [2019-11-15 21:32:36,444 INFO L226 Difference]: Without dead ends: 28570 [2019-11-15 21:32:36,445 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:32:36,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28570 states. [2019-11-15 21:32:36,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28570 to 25907. [2019-11-15 21:32:36,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25907 states. [2019-11-15 21:32:36,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25907 states to 25907 states and 79894 transitions. [2019-11-15 21:32:36,805 INFO L78 Accepts]: Start accepts. Automaton has 25907 states and 79894 transitions. Word has length 81 [2019-11-15 21:32:36,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:36,805 INFO L462 AbstractCegarLoop]: Abstraction has 25907 states and 79894 transitions. [2019-11-15 21:32:36,805 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:32:36,805 INFO L276 IsEmpty]: Start isEmpty. Operand 25907 states and 79894 transitions. [2019-11-15 21:32:36,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:32:36,827 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:36,827 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:36,827 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:36,827 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:36,827 INFO L82 PathProgramCache]: Analyzing trace with hash -1135201760, now seen corresponding path program 1 times [2019-11-15 21:32:36,827 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:36,828 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [266914105] [2019-11-15 21:32:36,828 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:36,828 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:36,828 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:36,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:36,877 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:36,878 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [266914105] [2019-11-15 21:32:36,878 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:36,878 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:32:36,878 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [843433780] [2019-11-15 21:32:36,879 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:32:36,879 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:36,879 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:32:36,879 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:32:36,879 INFO L87 Difference]: Start difference. First operand 25907 states and 79894 transitions. Second operand 3 states. [2019-11-15 21:32:36,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:37,000 INFO L93 Difference]: Finished difference Result 24701 states and 74783 transitions. [2019-11-15 21:32:37,000 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:32:37,000 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 81 [2019-11-15 21:32:37,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:37,046 INFO L225 Difference]: With dead ends: 24701 [2019-11-15 21:32:37,046 INFO L226 Difference]: Without dead ends: 24701 [2019-11-15 21:32:37,046 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:32:37,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24701 states. [2019-11-15 21:32:37,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24701 to 23474. [2019-11-15 21:32:37,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23474 states. [2019-11-15 21:32:37,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23474 states to 23474 states and 71382 transitions. [2019-11-15 21:32:37,379 INFO L78 Accepts]: Start accepts. Automaton has 23474 states and 71382 transitions. Word has length 81 [2019-11-15 21:32:37,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:37,380 INFO L462 AbstractCegarLoop]: Abstraction has 23474 states and 71382 transitions. [2019-11-15 21:32:37,380 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:32:37,380 INFO L276 IsEmpty]: Start isEmpty. Operand 23474 states and 71382 transitions. [2019-11-15 21:32:37,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:32:37,398 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:37,398 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:37,398 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:37,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:37,398 INFO L82 PathProgramCache]: Analyzing trace with hash 2031239906, now seen corresponding path program 1 times [2019-11-15 21:32:37,398 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:37,399 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1503727054] [2019-11-15 21:32:37,399 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:37,399 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:37,399 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:37,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:37,513 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:37,513 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1503727054] [2019-11-15 21:32:37,513 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:37,514 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:32:37,514 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1973054020] [2019-11-15 21:32:37,514 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:32:37,514 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:37,515 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:32:37,515 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:32:37,515 INFO L87 Difference]: Start difference. First operand 23474 states and 71382 transitions. Second operand 5 states. [2019-11-15 21:32:37,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:37,753 INFO L93 Difference]: Finished difference Result 23429 states and 71217 transitions. [2019-11-15 21:32:37,754 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:32:37,754 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 81 [2019-11-15 21:32:37,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:37,794 INFO L225 Difference]: With dead ends: 23429 [2019-11-15 21:32:37,795 INFO L226 Difference]: Without dead ends: 23429 [2019-11-15 21:32:37,795 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:32:37,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23429 states. [2019-11-15 21:32:38,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23429 to 23384. [2019-11-15 21:32:38,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23384 states. [2019-11-15 21:32:38,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23384 states to 23384 states and 71097 transitions. [2019-11-15 21:32:38,148 INFO L78 Accepts]: Start accepts. Automaton has 23384 states and 71097 transitions. Word has length 81 [2019-11-15 21:32:38,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:38,148 INFO L462 AbstractCegarLoop]: Abstraction has 23384 states and 71097 transitions. [2019-11-15 21:32:38,148 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:32:38,148 INFO L276 IsEmpty]: Start isEmpty. Operand 23384 states and 71097 transitions. [2019-11-15 21:32:38,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:32:38,167 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:38,167 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:38,167 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:38,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:38,168 INFO L82 PathProgramCache]: Analyzing trace with hash 1748089442, now seen corresponding path program 1 times [2019-11-15 21:32:38,168 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:38,168 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1475691821] [2019-11-15 21:32:38,168 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:38,169 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:38,169 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:38,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:38,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:38,234 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1475691821] [2019-11-15 21:32:38,235 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:38,235 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:32:38,235 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [139995531] [2019-11-15 21:32:38,235 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:32:38,236 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:38,236 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:32:38,236 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:32:38,236 INFO L87 Difference]: Start difference. First operand 23384 states and 71097 transitions. Second operand 6 states. [2019-11-15 21:32:38,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:38,681 INFO L93 Difference]: Finished difference Result 40021 states and 121445 transitions. [2019-11-15 21:32:38,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:32:38,682 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 81 [2019-11-15 21:32:38,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:38,745 INFO L225 Difference]: With dead ends: 40021 [2019-11-15 21:32:38,745 INFO L226 Difference]: Without dead ends: 40021 [2019-11-15 21:32:38,746 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:32:38,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40021 states. [2019-11-15 21:32:39,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40021 to 25468. [2019-11-15 21:32:39,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25468 states. [2019-11-15 21:32:39,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25468 states to 25468 states and 76913 transitions. [2019-11-15 21:32:39,223 INFO L78 Accepts]: Start accepts. Automaton has 25468 states and 76913 transitions. Word has length 81 [2019-11-15 21:32:39,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:39,223 INFO L462 AbstractCegarLoop]: Abstraction has 25468 states and 76913 transitions. [2019-11-15 21:32:39,223 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:32:39,223 INFO L276 IsEmpty]: Start isEmpty. Operand 25468 states and 76913 transitions. [2019-11-15 21:32:39,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:32:39,240 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:39,241 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:39,241 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:39,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:39,241 INFO L82 PathProgramCache]: Analyzing trace with hash -1485664478, now seen corresponding path program 2 times [2019-11-15 21:32:39,241 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:39,242 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [788016764] [2019-11-15 21:32:39,242 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:39,242 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:39,242 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:39,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:39,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:39,335 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [788016764] [2019-11-15 21:32:39,336 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:39,336 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:32:39,336 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2007032723] [2019-11-15 21:32:39,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:32:39,336 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:39,337 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:32:39,337 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:32:39,337 INFO L87 Difference]: Start difference. First operand 25468 states and 76913 transitions. Second operand 7 states. [2019-11-15 21:32:40,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:40,239 INFO L93 Difference]: Finished difference Result 41330 states and 124160 transitions. [2019-11-15 21:32:40,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-11-15 21:32:40,239 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 81 [2019-11-15 21:32:40,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:40,307 INFO L225 Difference]: With dead ends: 41330 [2019-11-15 21:32:40,307 INFO L226 Difference]: Without dead ends: 41330 [2019-11-15 21:32:40,308 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=87, Invalid=185, Unknown=0, NotChecked=0, Total=272 [2019-11-15 21:32:40,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41330 states. [2019-11-15 21:32:40,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41330 to 27929. [2019-11-15 21:32:40,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27929 states. [2019-11-15 21:32:40,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27929 states to 27929 states and 84380 transitions. [2019-11-15 21:32:40,995 INFO L78 Accepts]: Start accepts. Automaton has 27929 states and 84380 transitions. Word has length 81 [2019-11-15 21:32:40,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:40,995 INFO L462 AbstractCegarLoop]: Abstraction has 27929 states and 84380 transitions. [2019-11-15 21:32:40,995 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:32:40,995 INFO L276 IsEmpty]: Start isEmpty. Operand 27929 states and 84380 transitions. [2019-11-15 21:32:41,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:32:41,018 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:41,018 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:41,018 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:41,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:41,018 INFO L82 PathProgramCache]: Analyzing trace with hash -240899997, now seen corresponding path program 1 times [2019-11-15 21:32:41,018 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:41,018 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1596345695] [2019-11-15 21:32:41,019 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:41,019 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:41,019 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:41,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:41,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:41,098 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1596345695] [2019-11-15 21:32:41,098 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:41,099 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:32:41,099 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1993284405] [2019-11-15 21:32:41,099 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:32:41,099 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:41,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:32:41,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:32:41,100 INFO L87 Difference]: Start difference. First operand 27929 states and 84380 transitions. Second operand 5 states. [2019-11-15 21:32:41,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:41,267 INFO L93 Difference]: Finished difference Result 35996 states and 109010 transitions. [2019-11-15 21:32:41,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:32:41,268 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 81 [2019-11-15 21:32:41,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:41,326 INFO L225 Difference]: With dead ends: 35996 [2019-11-15 21:32:41,326 INFO L226 Difference]: Without dead ends: 35996 [2019-11-15 21:32:41,327 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:32:41,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35996 states. [2019-11-15 21:32:41,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35996 to 20552. [2019-11-15 21:32:41,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20552 states. [2019-11-15 21:32:41,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20552 states to 20552 states and 61731 transitions. [2019-11-15 21:32:41,693 INFO L78 Accepts]: Start accepts. Automaton has 20552 states and 61731 transitions. Word has length 81 [2019-11-15 21:32:41,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:41,694 INFO L462 AbstractCegarLoop]: Abstraction has 20552 states and 61731 transitions. [2019-11-15 21:32:41,694 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:32:41,694 INFO L276 IsEmpty]: Start isEmpty. Operand 20552 states and 61731 transitions. [2019-11-15 21:32:41,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:32:41,712 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:41,712 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:41,713 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:41,713 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:41,713 INFO L82 PathProgramCache]: Analyzing trace with hash 239816419, now seen corresponding path program 1 times [2019-11-15 21:32:41,713 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:41,715 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1151543358] [2019-11-15 21:32:41,715 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:41,715 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:41,715 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:41,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:41,767 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:41,767 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1151543358] [2019-11-15 21:32:41,767 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:41,767 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:32:41,768 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1147647235] [2019-11-15 21:32:41,768 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:32:41,768 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:41,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:32:41,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:32:41,769 INFO L87 Difference]: Start difference. First operand 20552 states and 61731 transitions. Second operand 3 states. [2019-11-15 21:32:41,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:41,915 INFO L93 Difference]: Finished difference Result 16763 states and 50142 transitions. [2019-11-15 21:32:41,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:32:41,916 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 81 [2019-11-15 21:32:41,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:41,943 INFO L225 Difference]: With dead ends: 16763 [2019-11-15 21:32:41,944 INFO L226 Difference]: Without dead ends: 16763 [2019-11-15 21:32:41,945 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:32:41,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16763 states. [2019-11-15 21:32:42,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16763 to 15573. [2019-11-15 21:32:42,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15573 states. [2019-11-15 21:32:42,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15573 states to 15573 states and 46835 transitions. [2019-11-15 21:32:42,188 INFO L78 Accepts]: Start accepts. Automaton has 15573 states and 46835 transitions. Word has length 81 [2019-11-15 21:32:42,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:42,188 INFO L462 AbstractCegarLoop]: Abstraction has 15573 states and 46835 transitions. [2019-11-15 21:32:42,189 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:32:42,189 INFO L276 IsEmpty]: Start isEmpty. Operand 15573 states and 46835 transitions. [2019-11-15 21:32:42,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 21:32:42,200 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:42,200 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:42,200 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:42,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:42,200 INFO L82 PathProgramCache]: Analyzing trace with hash 547999525, now seen corresponding path program 1 times [2019-11-15 21:32:42,200 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:42,200 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2004987376] [2019-11-15 21:32:42,201 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:42,201 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:42,201 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:42,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:42,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:42,280 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2004987376] [2019-11-15 21:32:42,280 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:42,281 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:32:42,281 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1062788955] [2019-11-15 21:32:42,281 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:32:42,281 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:42,282 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:32:42,282 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:32:42,282 INFO L87 Difference]: Start difference. First operand 15573 states and 46835 transitions. Second operand 5 states. [2019-11-15 21:32:42,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:42,332 INFO L93 Difference]: Finished difference Result 2331 states and 5661 transitions. [2019-11-15 21:32:42,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:32:42,333 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2019-11-15 21:32:42,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:42,335 INFO L225 Difference]: With dead ends: 2331 [2019-11-15 21:32:42,335 INFO L226 Difference]: Without dead ends: 2061 [2019-11-15 21:32:42,336 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:32:42,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2061 states. [2019-11-15 21:32:42,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2061 to 1966. [2019-11-15 21:32:42,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1966 states. [2019-11-15 21:32:42,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1966 states to 1966 states and 4731 transitions. [2019-11-15 21:32:42,364 INFO L78 Accepts]: Start accepts. Automaton has 1966 states and 4731 transitions. Word has length 82 [2019-11-15 21:32:42,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:42,364 INFO L462 AbstractCegarLoop]: Abstraction has 1966 states and 4731 transitions. [2019-11-15 21:32:42,364 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:32:42,364 INFO L276 IsEmpty]: Start isEmpty. Operand 1966 states and 4731 transitions. [2019-11-15 21:32:42,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:32:42,366 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:42,367 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:42,367 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:42,367 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:42,367 INFO L82 PathProgramCache]: Analyzing trace with hash 655057021, now seen corresponding path program 1 times [2019-11-15 21:32:42,368 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:42,368 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [367459282] [2019-11-15 21:32:42,368 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:42,368 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:42,368 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:42,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:42,490 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:42,490 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [367459282] [2019-11-15 21:32:42,490 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:42,490 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:32:42,491 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1714212851] [2019-11-15 21:32:42,491 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:32:42,491 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:42,492 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:32:42,492 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:32:42,492 INFO L87 Difference]: Start difference. First operand 1966 states and 4731 transitions. Second operand 6 states. [2019-11-15 21:32:42,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:42,674 INFO L93 Difference]: Finished difference Result 2156 states and 5044 transitions. [2019-11-15 21:32:42,674 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:32:42,674 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 21:32:42,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:42,677 INFO L225 Difference]: With dead ends: 2156 [2019-11-15 21:32:42,677 INFO L226 Difference]: Without dead ends: 2111 [2019-11-15 21:32:42,677 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:32:42,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2111 states. [2019-11-15 21:32:42,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2111 to 1989. [2019-11-15 21:32:42,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1989 states. [2019-11-15 21:32:42,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1989 states to 1989 states and 4725 transitions. [2019-11-15 21:32:42,704 INFO L78 Accepts]: Start accepts. Automaton has 1989 states and 4725 transitions. Word has length 95 [2019-11-15 21:32:42,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:42,704 INFO L462 AbstractCegarLoop]: Abstraction has 1989 states and 4725 transitions. [2019-11-15 21:32:42,704 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:32:42,704 INFO L276 IsEmpty]: Start isEmpty. Operand 1989 states and 4725 transitions. [2019-11-15 21:32:42,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:32:42,705 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:42,705 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:42,706 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:42,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:42,706 INFO L82 PathProgramCache]: Analyzing trace with hash 206360382, now seen corresponding path program 1 times [2019-11-15 21:32:42,706 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:42,706 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2124838186] [2019-11-15 21:32:42,706 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:42,706 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:42,706 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:42,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:42,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:42,818 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2124838186] [2019-11-15 21:32:42,818 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:42,818 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:32:42,818 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [953787550] [2019-11-15 21:32:42,819 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:32:42,819 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:42,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:32:42,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:32:42,820 INFO L87 Difference]: Start difference. First operand 1989 states and 4725 transitions. Second operand 6 states. [2019-11-15 21:32:42,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:42,978 INFO L93 Difference]: Finished difference Result 2242 states and 5181 transitions. [2019-11-15 21:32:42,978 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 21:32:42,979 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 21:32:42,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:42,981 INFO L225 Difference]: With dead ends: 2242 [2019-11-15 21:32:42,981 INFO L226 Difference]: Without dead ends: 2242 [2019-11-15 21:32:42,982 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:32:42,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2242 states. [2019-11-15 21:32:43,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2242 to 2032. [2019-11-15 21:32:43,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2032 states. [2019-11-15 21:32:43,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2032 states to 2032 states and 4781 transitions. [2019-11-15 21:32:43,009 INFO L78 Accepts]: Start accepts. Automaton has 2032 states and 4781 transitions. Word has length 95 [2019-11-15 21:32:43,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:43,010 INFO L462 AbstractCegarLoop]: Abstraction has 2032 states and 4781 transitions. [2019-11-15 21:32:43,010 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:32:43,010 INFO L276 IsEmpty]: Start isEmpty. Operand 2032 states and 4781 transitions. [2019-11-15 21:32:43,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:32:43,012 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:43,012 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:43,013 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:43,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:43,013 INFO L82 PathProgramCache]: Analyzing trace with hash -716323201, now seen corresponding path program 1 times [2019-11-15 21:32:43,013 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:43,013 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1091084961] [2019-11-15 21:32:43,014 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:43,014 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:43,014 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:43,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:43,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:43,087 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1091084961] [2019-11-15 21:32:43,087 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:43,087 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:32:43,088 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [797577453] [2019-11-15 21:32:43,088 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:32:43,088 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:43,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:32:43,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:32:43,089 INFO L87 Difference]: Start difference. First operand 2032 states and 4781 transitions. Second operand 4 states. [2019-11-15 21:32:43,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:43,180 INFO L93 Difference]: Finished difference Result 2032 states and 4745 transitions. [2019-11-15 21:32:43,180 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:32:43,180 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2019-11-15 21:32:43,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:43,183 INFO L225 Difference]: With dead ends: 2032 [2019-11-15 21:32:43,183 INFO L226 Difference]: Without dead ends: 2032 [2019-11-15 21:32:43,183 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:32:43,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2032 states. [2019-11-15 21:32:43,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2032 to 1910. [2019-11-15 21:32:43,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1910 states. [2019-11-15 21:32:43,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1910 states to 1910 states and 4491 transitions. [2019-11-15 21:32:43,209 INFO L78 Accepts]: Start accepts. Automaton has 1910 states and 4491 transitions. Word has length 95 [2019-11-15 21:32:43,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:43,209 INFO L462 AbstractCegarLoop]: Abstraction has 1910 states and 4491 transitions. [2019-11-15 21:32:43,210 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:32:43,210 INFO L276 IsEmpty]: Start isEmpty. Operand 1910 states and 4491 transitions. [2019-11-15 21:32:43,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:32:43,212 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:43,212 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:43,212 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:43,212 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:43,213 INFO L82 PathProgramCache]: Analyzing trace with hash -1764813025, now seen corresponding path program 1 times [2019-11-15 21:32:43,213 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:43,213 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2072728585] [2019-11-15 21:32:43,213 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:43,213 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:43,214 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:43,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:43,299 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:43,300 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2072728585] [2019-11-15 21:32:43,300 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:43,300 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:32:43,300 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [553056961] [2019-11-15 21:32:43,301 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:32:43,301 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:43,301 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:32:43,301 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:32:43,301 INFO L87 Difference]: Start difference. First operand 1910 states and 4491 transitions. Second operand 5 states. [2019-11-15 21:32:43,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:43,501 INFO L93 Difference]: Finished difference Result 2162 states and 5070 transitions. [2019-11-15 21:32:43,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:32:43,502 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-11-15 21:32:43,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:43,504 INFO L225 Difference]: With dead ends: 2162 [2019-11-15 21:32:43,505 INFO L226 Difference]: Without dead ends: 2144 [2019-11-15 21:32:43,505 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:32:43,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2144 states. [2019-11-15 21:32:43,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2144 to 1937. [2019-11-15 21:32:43,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1937 states. [2019-11-15 21:32:43,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1937 states to 1937 states and 4545 transitions. [2019-11-15 21:32:43,534 INFO L78 Accepts]: Start accepts. Automaton has 1937 states and 4545 transitions. Word has length 95 [2019-11-15 21:32:43,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:43,535 INFO L462 AbstractCegarLoop]: Abstraction has 1937 states and 4545 transitions. [2019-11-15 21:32:43,535 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:32:43,535 INFO L276 IsEmpty]: Start isEmpty. Operand 1937 states and 4545 transitions. [2019-11-15 21:32:43,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:32:43,537 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:43,537 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:43,538 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:43,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:43,538 INFO L82 PathProgramCache]: Analyzing trace with hash -520048544, now seen corresponding path program 1 times [2019-11-15 21:32:43,538 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:43,538 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [798865197] [2019-11-15 21:32:43,539 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:43,539 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:43,539 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:43,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:43,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:43,656 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [798865197] [2019-11-15 21:32:43,656 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:43,657 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:32:43,657 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1570330245] [2019-11-15 21:32:43,657 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:32:43,657 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:43,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:32:43,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:32:43,658 INFO L87 Difference]: Start difference. First operand 1937 states and 4545 transitions. Second operand 6 states. [2019-11-15 21:32:43,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:43,739 INFO L93 Difference]: Finished difference Result 3203 states and 7615 transitions. [2019-11-15 21:32:43,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:32:43,740 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 21:32:43,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:43,741 INFO L225 Difference]: With dead ends: 3203 [2019-11-15 21:32:43,742 INFO L226 Difference]: Without dead ends: 1346 [2019-11-15 21:32:43,743 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:32:43,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1346 states. [2019-11-15 21:32:43,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1346 to 1346. [2019-11-15 21:32:43,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1346 states. [2019-11-15 21:32:43,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1346 states to 1346 states and 3201 transitions. [2019-11-15 21:32:43,762 INFO L78 Accepts]: Start accepts. Automaton has 1346 states and 3201 transitions. Word has length 95 [2019-11-15 21:32:43,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:43,762 INFO L462 AbstractCegarLoop]: Abstraction has 1346 states and 3201 transitions. [2019-11-15 21:32:43,763 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:32:43,763 INFO L276 IsEmpty]: Start isEmpty. Operand 1346 states and 3201 transitions. [2019-11-15 21:32:43,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:32:43,765 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:43,765 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:43,765 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:43,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:43,766 INFO L82 PathProgramCache]: Analyzing trace with hash -842764099, now seen corresponding path program 1 times [2019-11-15 21:32:43,766 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:43,766 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1643314823] [2019-11-15 21:32:43,766 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:43,766 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:43,767 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:43,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:43,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:43,844 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1643314823] [2019-11-15 21:32:43,844 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:43,845 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:32:43,845 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1157753548] [2019-11-15 21:32:43,845 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:32:43,845 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:43,846 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:32:43,846 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:32:43,846 INFO L87 Difference]: Start difference. First operand 1346 states and 3201 transitions. Second operand 5 states. [2019-11-15 21:32:43,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:43,995 INFO L93 Difference]: Finished difference Result 1611 states and 3738 transitions. [2019-11-15 21:32:43,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:32:43,996 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-11-15 21:32:43,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:43,998 INFO L225 Difference]: With dead ends: 1611 [2019-11-15 21:32:43,998 INFO L226 Difference]: Without dead ends: 1593 [2019-11-15 21:32:43,998 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:32:44,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1593 states. [2019-11-15 21:32:44,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1593 to 1363. [2019-11-15 21:32:44,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1363 states. [2019-11-15 21:32:44,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1363 states to 1363 states and 3235 transitions. [2019-11-15 21:32:44,017 INFO L78 Accepts]: Start accepts. Automaton has 1363 states and 3235 transitions. Word has length 95 [2019-11-15 21:32:44,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:44,018 INFO L462 AbstractCegarLoop]: Abstraction has 1363 states and 3235 transitions. [2019-11-15 21:32:44,018 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:32:44,018 INFO L276 IsEmpty]: Start isEmpty. Operand 1363 states and 3235 transitions. [2019-11-15 21:32:44,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:32:44,019 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:44,020 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:44,020 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:44,020 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:44,021 INFO L82 PathProgramCache]: Analyzing trace with hash -1843434049, now seen corresponding path program 1 times [2019-11-15 21:32:44,021 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:44,023 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [3332298] [2019-11-15 21:32:44,023 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:44,023 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:44,023 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:44,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:44,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:44,130 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [3332298] [2019-11-15 21:32:44,130 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:44,130 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:32:44,131 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2123770901] [2019-11-15 21:32:44,131 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:32:44,131 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:44,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:32:44,132 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:32:44,132 INFO L87 Difference]: Start difference. First operand 1363 states and 3235 transitions. Second operand 6 states. [2019-11-15 21:32:44,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:44,346 INFO L93 Difference]: Finished difference Result 1535 states and 3584 transitions. [2019-11-15 21:32:44,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:32:44,346 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 21:32:44,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:44,348 INFO L225 Difference]: With dead ends: 1535 [2019-11-15 21:32:44,348 INFO L226 Difference]: Without dead ends: 1535 [2019-11-15 21:32:44,348 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:32:44,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1535 states. [2019-11-15 21:32:44,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1535 to 1347. [2019-11-15 21:32:44,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1347 states. [2019-11-15 21:32:44,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1347 states to 1347 states and 3203 transitions. [2019-11-15 21:32:44,367 INFO L78 Accepts]: Start accepts. Automaton has 1347 states and 3203 transitions. Word has length 95 [2019-11-15 21:32:44,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:44,368 INFO L462 AbstractCegarLoop]: Abstraction has 1347 states and 3203 transitions. [2019-11-15 21:32:44,368 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:32:44,368 INFO L276 IsEmpty]: Start isEmpty. Operand 1347 states and 3203 transitions. [2019-11-15 21:32:44,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:32:44,369 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:44,370 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:44,370 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:44,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:44,370 INFO L82 PathProgramCache]: Analyzing trace with hash -869858112, now seen corresponding path program 2 times [2019-11-15 21:32:44,371 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:44,371 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [419908728] [2019-11-15 21:32:44,371 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:44,371 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:44,371 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:44,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:32:44,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:32:44,550 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [419908728] [2019-11-15 21:32:44,550 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:32:44,550 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-15 21:32:44,550 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1801797949] [2019-11-15 21:32:44,550 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-15 21:32:44,551 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:32:44,551 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-15 21:32:44,551 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2019-11-15 21:32:44,551 INFO L87 Difference]: Start difference. First operand 1347 states and 3203 transitions. Second operand 12 states. [2019-11-15 21:32:44,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:32:44,760 INFO L93 Difference]: Finished difference Result 2516 states and 6061 transitions. [2019-11-15 21:32:44,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-15 21:32:44,761 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 95 [2019-11-15 21:32:44,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:32:44,762 INFO L225 Difference]: With dead ends: 2516 [2019-11-15 21:32:44,762 INFO L226 Difference]: Without dead ends: 1877 [2019-11-15 21:32:44,763 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2019-11-15 21:32:44,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1877 states. [2019-11-15 21:32:44,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1877 to 1765. [2019-11-15 21:32:44,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1765 states. [2019-11-15 21:32:44,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1765 states to 1765 states and 4113 transitions. [2019-11-15 21:32:44,779 INFO L78 Accepts]: Start accepts. Automaton has 1765 states and 4113 transitions. Word has length 95 [2019-11-15 21:32:44,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:32:44,780 INFO L462 AbstractCegarLoop]: Abstraction has 1765 states and 4113 transitions. [2019-11-15 21:32:44,780 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-15 21:32:44,780 INFO L276 IsEmpty]: Start isEmpty. Operand 1765 states and 4113 transitions. [2019-11-15 21:32:44,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 21:32:44,782 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:32:44,782 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:32:44,782 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:32:44,782 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:32:44,782 INFO L82 PathProgramCache]: Analyzing trace with hash 1046677052, now seen corresponding path program 3 times [2019-11-15 21:32:44,782 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:32:44,782 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1274964839] [2019-11-15 21:32:44,782 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:44,783 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:32:44,783 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:32:44,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 21:32:44,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 21:32:44,868 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 21:32:44,868 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 21:32:45,012 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 21:32:45,018 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 09:32:45 BasicIcfg [2019-11-15 21:32:45,018 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 21:32:45,019 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 21:32:45,019 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 21:32:45,019 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 21:32:45,019 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:32:04" (3/4) ... [2019-11-15 21:32:45,021 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 21:32:45,178 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_532930b7-82de-406b-afaa-fa28bc22d96c/bin/uautomizer/witness.graphml [2019-11-15 21:32:45,178 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 21:32:45,181 INFO L168 Benchmark]: Toolchain (without parser) took 42011.11 ms. Allocated memory was 1.0 GB in the beginning and 4.3 GB in the end (delta: 3.2 GB). Free memory was 938.0 MB in the beginning and 2.0 GB in the end (delta: -1.0 GB). Peak memory consumption was 2.2 GB. Max. memory is 11.5 GB. [2019-11-15 21:32:45,181 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 962.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 21:32:45,182 INFO L168 Benchmark]: CACSL2BoogieTranslator took 587.48 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 116.9 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -145.3 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. [2019-11-15 21:32:45,182 INFO L168 Benchmark]: Boogie Procedure Inliner took 61.21 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-11-15 21:32:45,183 INFO L168 Benchmark]: Boogie Preprocessor took 34.25 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 21:32:45,184 INFO L168 Benchmark]: RCFGBuilder took 667.77 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.2 MB). Peak memory consumption was 49.2 MB. Max. memory is 11.5 GB. [2019-11-15 21:32:45,185 INFO L168 Benchmark]: TraceAbstraction took 40494.37 ms. Allocated memory was 1.1 GB in the beginning and 4.3 GB in the end (delta: 3.1 GB). Free memory was 1.0 GB in the beginning and 2.0 GB in the end (delta: -961.4 MB). Peak memory consumption was 2.2 GB. Max. memory is 11.5 GB. [2019-11-15 21:32:45,185 INFO L168 Benchmark]: Witness Printer took 159.91 ms. Allocated memory is still 4.3 GB. Free memory was 2.0 GB in the beginning and 2.0 GB in the end (delta: 19.2 MB). Peak memory consumption was 19.2 MB. Max. memory is 11.5 GB. [2019-11-15 21:32:45,187 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 962.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 587.48 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 116.9 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -145.3 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 61.21 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 34.25 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 667.77 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.2 MB). Peak memory consumption was 49.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 40494.37 ms. Allocated memory was 1.1 GB in the beginning and 4.3 GB in the end (delta: 3.1 GB). Free memory was 1.0 GB in the beginning and 2.0 GB in the end (delta: -961.4 MB). Peak memory consumption was 2.2 GB. Max. memory is 11.5 GB. * Witness Printer took 159.91 ms. Allocated memory is still 4.3 GB. Free memory was 2.0 GB in the beginning and 2.0 GB in the end (delta: 19.2 MB). Peak memory consumption was 19.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L698] 0 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L699] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L700] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L702] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L703] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L704] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L705] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L706] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L707] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L708] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L709] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L710] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L711] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L712] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L713] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L714] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L715] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L716] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L718] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L719] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L720] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L786] 0 pthread_t t1587; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L787] FCALL, FORK 0 pthread_create(&t1587, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L788] 0 pthread_t t1588; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L789] FCALL, FORK 0 pthread_create(&t1588, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L744] 2 x$w_buff1 = x$w_buff0 [L745] 2 x$w_buff0 = 2 [L746] 2 x$w_buff1_used = x$w_buff0_used [L747] 2 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L749] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L750] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L751] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L752] 2 x$r_buff0_thd2 = (_Bool)1 [L755] 2 y = 1 [L758] 2 __unbuffered_p1_EAX = y [L761] 2 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L764] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L724] 1 y = 2 [L727] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L730] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L730] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=2] [L730] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=2] [L730] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L731] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L731] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L732] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L764] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L733] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L733] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L765] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L765] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L766] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L766] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L767] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L767] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L768] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L768] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L771] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L734] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L734] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L737] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L791] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L795] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L795] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L795] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L795] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L796] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L797] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L797] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L798] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L798] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L799] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L799] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L802] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L803] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L804] 0 x$flush_delayed = weak$$choice2 [L805] 0 x$mem_tmp = x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=2, x$flush_delayed=3, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L806] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=2, x$flush_delayed=3, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L806] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L807] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=2, x$flush_delayed=3, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L807] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L808] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=2, x$flush_delayed=3, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L808] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L809] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=2, x$flush_delayed=3, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L809] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L810] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=2, x$flush_delayed=3, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L810] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L811] EXPR 0 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=2, x$flush_delayed=3, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L811] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L812] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=2, x$flush_delayed=3, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L812] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L813] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=2, x$flush_delayed=3, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L814] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=2, x$flush_delayed=3, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L814] 0 x = x$flush_delayed ? x$mem_tmp : x [L815] 0 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=3, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 176 locations, 3 error locations. Result: UNSAFE, OverallTime: 40.3s, OverallIterations: 34, TraceHistogramMax: 1, AutomataDifference: 17.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8783 SDtfs, 8949 SDslu, 18852 SDs, 0 SdLazy, 7904 SolverSat, 500 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 341 GetRequests, 94 SyntacticMatches, 20 SemanticMatches, 227 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 444 ImplicationChecksByTransitivity, 2.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=76078occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 16.5s AutomataMinimizationTime, 33 MinimizatonAttempts, 135778 StatesRemovedByMinimization, 31 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.3s InterpolantComputationTime, 2613 NumberOfCodeBlocks, 2613 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 2485 ConstructedInterpolants, 0 QuantifiedInterpolants, 455613 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...