./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi000_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_492c2041-dc9f-4fa5-8a94-29c133b349f2/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_492c2041-dc9f-4fa5-8a94-29c133b349f2/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_492c2041-dc9f-4fa5-8a94-29c133b349f2/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_492c2041-dc9f-4fa5-8a94-29c133b349f2/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi000_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_492c2041-dc9f-4fa5-8a94-29c133b349f2/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_492c2041-dc9f-4fa5-8a94-29c133b349f2/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a0dff34e947647ee1664b97ad9afbb19310f98b1 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 23:05:52,958 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 23:05:52,960 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 23:05:52,978 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 23:05:52,979 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 23:05:52,980 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 23:05:52,981 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 23:05:52,984 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 23:05:52,986 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 23:05:52,987 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 23:05:52,988 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 23:05:52,989 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 23:05:52,989 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 23:05:52,990 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 23:05:52,991 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 23:05:52,992 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 23:05:52,993 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 23:05:52,994 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 23:05:52,997 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 23:05:52,999 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 23:05:53,001 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 23:05:53,002 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 23:05:53,004 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 23:05:53,005 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 23:05:53,008 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 23:05:53,008 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 23:05:53,008 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 23:05:53,009 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 23:05:53,010 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 23:05:53,011 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 23:05:53,012 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 23:05:53,012 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 23:05:53,013 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 23:05:53,014 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 23:05:53,015 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 23:05:53,016 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 23:05:53,016 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 23:05:53,017 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 23:05:53,017 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 23:05:53,018 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 23:05:53,019 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 23:05:53,019 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_492c2041-dc9f-4fa5-8a94-29c133b349f2/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 23:05:53,037 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 23:05:53,040 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 23:05:53,042 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 23:05:53,042 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 23:05:53,042 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 23:05:53,043 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 23:05:53,043 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 23:05:53,044 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 23:05:53,044 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 23:05:53,044 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 23:05:53,046 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 23:05:53,046 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 23:05:53,046 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 23:05:53,046 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 23:05:53,047 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 23:05:53,047 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 23:05:53,047 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 23:05:53,047 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 23:05:53,048 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 23:05:53,048 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 23:05:53,048 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 23:05:53,048 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 23:05:53,049 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 23:05:53,049 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 23:05:53,049 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 23:05:53,050 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 23:05:53,050 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 23:05:53,050 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 23:05:53,050 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_492c2041-dc9f-4fa5-8a94-29c133b349f2/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a0dff34e947647ee1664b97ad9afbb19310f98b1 [2019-11-15 23:05:53,095 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 23:05:53,115 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 23:05:53,122 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 23:05:53,123 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 23:05:53,124 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 23:05:53,125 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_492c2041-dc9f-4fa5-8a94-29c133b349f2/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/rfi000_rmo.opt.i [2019-11-15 23:05:53,206 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_492c2041-dc9f-4fa5-8a94-29c133b349f2/bin/uautomizer/data/b54e2f844/11deed75df7e47d0859720f3003e058e/FLAG7fd01b912 [2019-11-15 23:05:53,702 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 23:05:53,703 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_492c2041-dc9f-4fa5-8a94-29c133b349f2/sv-benchmarks/c/pthread-wmm/rfi000_rmo.opt.i [2019-11-15 23:05:53,724 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_492c2041-dc9f-4fa5-8a94-29c133b349f2/bin/uautomizer/data/b54e2f844/11deed75df7e47d0859720f3003e058e/FLAG7fd01b912 [2019-11-15 23:05:53,997 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_492c2041-dc9f-4fa5-8a94-29c133b349f2/bin/uautomizer/data/b54e2f844/11deed75df7e47d0859720f3003e058e [2019-11-15 23:05:54,000 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 23:05:54,001 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 23:05:54,002 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 23:05:54,002 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 23:05:54,006 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 23:05:54,007 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 11:05:53" (1/1) ... [2019-11-15 23:05:54,010 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@56cd750d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:05:54, skipping insertion in model container [2019-11-15 23:05:54,010 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 11:05:53" (1/1) ... [2019-11-15 23:05:54,018 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 23:05:54,073 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 23:05:54,692 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 23:05:54,715 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 23:05:54,829 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 23:05:54,936 INFO L192 MainTranslator]: Completed translation [2019-11-15 23:05:54,937 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:05:54 WrapperNode [2019-11-15 23:05:54,938 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 23:05:54,939 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 23:05:54,940 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 23:05:54,940 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 23:05:54,950 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:05:54" (1/1) ... [2019-11-15 23:05:54,992 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:05:54" (1/1) ... [2019-11-15 23:05:55,036 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 23:05:55,036 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 23:05:55,036 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 23:05:55,037 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 23:05:55,047 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:05:54" (1/1) ... [2019-11-15 23:05:55,048 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:05:54" (1/1) ... [2019-11-15 23:05:55,051 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:05:54" (1/1) ... [2019-11-15 23:05:55,052 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:05:54" (1/1) ... [2019-11-15 23:05:55,077 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:05:54" (1/1) ... [2019-11-15 23:05:55,080 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:05:54" (1/1) ... [2019-11-15 23:05:55,083 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:05:54" (1/1) ... [2019-11-15 23:05:55,087 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 23:05:55,088 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 23:05:55,088 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 23:05:55,100 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 23:05:55,102 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:05:54" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_492c2041-dc9f-4fa5-8a94-29c133b349f2/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 23:05:55,187 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 23:05:55,188 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 23:05:55,188 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 23:05:55,188 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 23:05:55,190 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 23:05:55,190 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 23:05:55,190 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 23:05:55,191 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 23:05:55,191 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 23:05:55,191 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 23:05:55,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 23:05:55,195 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 23:05:56,066 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 23:05:56,066 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 23:05:56,068 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 11:05:56 BoogieIcfgContainer [2019-11-15 23:05:56,068 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 23:05:56,069 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 23:05:56,069 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 23:05:56,072 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 23:05:56,072 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 11:05:53" (1/3) ... [2019-11-15 23:05:56,073 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4d9cffdf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 11:05:56, skipping insertion in model container [2019-11-15 23:05:56,073 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:05:54" (2/3) ... [2019-11-15 23:05:56,074 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4d9cffdf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 11:05:56, skipping insertion in model container [2019-11-15 23:05:56,074 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 11:05:56" (3/3) ... [2019-11-15 23:05:56,076 INFO L109 eAbstractionObserver]: Analyzing ICFG rfi000_rmo.opt.i [2019-11-15 23:05:56,118 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,118 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,119 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,119 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,119 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,119 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,120 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,120 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,120 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,120 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,121 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,121 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,121 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,121 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,121 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,122 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,122 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,122 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,122 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,123 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,123 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,123 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,123 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,124 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,124 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,124 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,124 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,124 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,125 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,125 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,126 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,126 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,126 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,126 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,126 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,127 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,127 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,127 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,128 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,128 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,128 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,128 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,129 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,129 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,129 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,129 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,130 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,130 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,130 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,130 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,131 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,131 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,131 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,131 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,131 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,132 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,132 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,132 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,132 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,133 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,133 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,133 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,133 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,134 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:05:56,140 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 23:05:56,140 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 23:05:56,149 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 23:05:56,160 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 23:05:56,181 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 23:05:56,181 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 23:05:56,181 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 23:05:56,181 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 23:05:56,181 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 23:05:56,181 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 23:05:56,182 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 23:05:56,182 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 23:05:56,207 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 140 places, 178 transitions [2019-11-15 23:05:58,038 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22494 states. [2019-11-15 23:05:58,040 INFO L276 IsEmpty]: Start isEmpty. Operand 22494 states. [2019-11-15 23:05:58,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-11-15 23:05:58,051 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:58,052 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:58,054 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:58,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:58,060 INFO L82 PathProgramCache]: Analyzing trace with hash 583556461, now seen corresponding path program 1 times [2019-11-15 23:05:58,069 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:58,070 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1061266480] [2019-11-15 23:05:58,070 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:58,070 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:58,070 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:58,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:58,382 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:58,383 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1061266480] [2019-11-15 23:05:58,384 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:58,384 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:05:58,384 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1189652790] [2019-11-15 23:05:58,389 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:05:58,390 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:58,405 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:05:58,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:05:58,408 INFO L87 Difference]: Start difference. First operand 22494 states. Second operand 4 states. [2019-11-15 23:05:59,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:59,212 INFO L93 Difference]: Finished difference Result 23446 states and 91747 transitions. [2019-11-15 23:05:59,213 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:05:59,215 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2019-11-15 23:05:59,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:59,434 INFO L225 Difference]: With dead ends: 23446 [2019-11-15 23:05:59,434 INFO L226 Difference]: Without dead ends: 21270 [2019-11-15 23:05:59,436 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:05:59,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21270 states. [2019-11-15 23:06:00,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21270 to 21270. [2019-11-15 23:06:00,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21270 states. [2019-11-15 23:06:00,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21270 states to 21270 states and 83771 transitions. [2019-11-15 23:06:00,785 INFO L78 Accepts]: Start accepts. Automaton has 21270 states and 83771 transitions. Word has length 37 [2019-11-15 23:06:00,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:00,786 INFO L462 AbstractCegarLoop]: Abstraction has 21270 states and 83771 transitions. [2019-11-15 23:06:00,786 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:06:00,786 INFO L276 IsEmpty]: Start isEmpty. Operand 21270 states and 83771 transitions. [2019-11-15 23:06:00,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-15 23:06:00,797 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:00,798 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:00,798 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:00,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:00,799 INFO L82 PathProgramCache]: Analyzing trace with hash -1191878066, now seen corresponding path program 1 times [2019-11-15 23:06:00,800 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:00,800 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [445063823] [2019-11-15 23:06:00,800 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:00,800 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:00,801 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:00,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:00,945 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:00,945 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [445063823] [2019-11-15 23:06:00,945 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:00,946 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:06:00,946 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1532082778] [2019-11-15 23:06:00,947 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:06:00,948 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:00,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:06:00,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:06:00,948 INFO L87 Difference]: Start difference. First operand 21270 states and 83771 transitions. Second operand 5 states. [2019-11-15 23:06:02,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:02,327 INFO L93 Difference]: Finished difference Result 34704 states and 129063 transitions. [2019-11-15 23:06:02,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:06:02,328 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-11-15 23:06:02,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:02,497 INFO L225 Difference]: With dead ends: 34704 [2019-11-15 23:06:02,497 INFO L226 Difference]: Without dead ends: 34560 [2019-11-15 23:06:02,498 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:06:03,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34560 states. [2019-11-15 23:06:03,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34560 to 33060. [2019-11-15 23:06:03,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33060 states. [2019-11-15 23:06:04,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33060 states to 33060 states and 123951 transitions. [2019-11-15 23:06:04,013 INFO L78 Accepts]: Start accepts. Automaton has 33060 states and 123951 transitions. Word has length 44 [2019-11-15 23:06:04,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:04,015 INFO L462 AbstractCegarLoop]: Abstraction has 33060 states and 123951 transitions. [2019-11-15 23:06:04,015 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:06:04,015 INFO L276 IsEmpty]: Start isEmpty. Operand 33060 states and 123951 transitions. [2019-11-15 23:06:04,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-15 23:06:04,022 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:04,022 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:04,023 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:04,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:04,023 INFO L82 PathProgramCache]: Analyzing trace with hash 613942952, now seen corresponding path program 1 times [2019-11-15 23:06:04,023 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:04,024 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1233730215] [2019-11-15 23:06:04,024 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:04,024 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:04,025 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:04,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:04,192 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:04,194 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1233730215] [2019-11-15 23:06:04,194 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:04,195 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:06:04,195 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1323610927] [2019-11-15 23:06:04,197 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:06:04,199 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:04,199 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:06:04,199 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:06:04,200 INFO L87 Difference]: Start difference. First operand 33060 states and 123951 transitions. Second operand 5 states. [2019-11-15 23:06:05,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:05,366 INFO L93 Difference]: Finished difference Result 40212 states and 148620 transitions. [2019-11-15 23:06:05,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:06:05,367 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-11-15 23:06:05,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:05,522 INFO L225 Difference]: With dead ends: 40212 [2019-11-15 23:06:05,522 INFO L226 Difference]: Without dead ends: 40052 [2019-11-15 23:06:05,523 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:06:05,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40052 states. [2019-11-15 23:06:07,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40052 to 34633. [2019-11-15 23:06:07,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34633 states. [2019-11-15 23:06:07,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34633 states to 34633 states and 129247 transitions. [2019-11-15 23:06:07,269 INFO L78 Accepts]: Start accepts. Automaton has 34633 states and 129247 transitions. Word has length 45 [2019-11-15 23:06:07,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:07,270 INFO L462 AbstractCegarLoop]: Abstraction has 34633 states and 129247 transitions. [2019-11-15 23:06:07,270 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:06:07,270 INFO L276 IsEmpty]: Start isEmpty. Operand 34633 states and 129247 transitions. [2019-11-15 23:06:07,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-15 23:06:07,287 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:07,287 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:07,288 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:07,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:07,288 INFO L82 PathProgramCache]: Analyzing trace with hash -1616471415, now seen corresponding path program 1 times [2019-11-15 23:06:07,288 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:07,289 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1108705617] [2019-11-15 23:06:07,289 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:07,289 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:07,289 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:07,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:07,469 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:07,470 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1108705617] [2019-11-15 23:06:07,471 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:07,471 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:06:07,471 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [594687376] [2019-11-15 23:06:07,472 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:06:07,472 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:07,472 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:06:07,473 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:06:07,473 INFO L87 Difference]: Start difference. First operand 34633 states and 129247 transitions. Second operand 6 states. [2019-11-15 23:06:08,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:08,653 INFO L93 Difference]: Finished difference Result 45661 states and 166141 transitions. [2019-11-15 23:06:08,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 23:06:08,654 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-11-15 23:06:08,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:08,793 INFO L225 Difference]: With dead ends: 45661 [2019-11-15 23:06:08,793 INFO L226 Difference]: Without dead ends: 45517 [2019-11-15 23:06:08,794 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 23:06:09,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45517 states. [2019-11-15 23:06:10,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45517 to 33596. [2019-11-15 23:06:10,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33596 states. [2019-11-15 23:06:10,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33596 states to 33596 states and 125402 transitions. [2019-11-15 23:06:10,512 INFO L78 Accepts]: Start accepts. Automaton has 33596 states and 125402 transitions. Word has length 52 [2019-11-15 23:06:10,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:10,513 INFO L462 AbstractCegarLoop]: Abstraction has 33596 states and 125402 transitions. [2019-11-15 23:06:10,513 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:06:10,513 INFO L276 IsEmpty]: Start isEmpty. Operand 33596 states and 125402 transitions. [2019-11-15 23:06:10,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-11-15 23:06:10,551 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:10,552 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:10,552 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:10,552 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:10,553 INFO L82 PathProgramCache]: Analyzing trace with hash -469025415, now seen corresponding path program 1 times [2019-11-15 23:06:10,553 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:10,553 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1569981858] [2019-11-15 23:06:10,553 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:10,554 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:10,554 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:10,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:10,650 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:10,650 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1569981858] [2019-11-15 23:06:10,651 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:10,651 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:06:10,651 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1698937359] [2019-11-15 23:06:10,652 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:06:10,652 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:10,652 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:06:10,653 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:06:10,653 INFO L87 Difference]: Start difference. First operand 33596 states and 125402 transitions. Second operand 6 states. [2019-11-15 23:06:11,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:11,435 INFO L93 Difference]: Finished difference Result 46068 states and 167835 transitions. [2019-11-15 23:06:11,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 23:06:11,436 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 59 [2019-11-15 23:06:11,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:11,539 INFO L225 Difference]: With dead ends: 46068 [2019-11-15 23:06:11,539 INFO L226 Difference]: Without dead ends: 45828 [2019-11-15 23:06:11,539 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 23:06:11,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45828 states. [2019-11-15 23:06:12,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45828 to 39957. [2019-11-15 23:06:12,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39957 states. [2019-11-15 23:06:12,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39957 states to 39957 states and 147326 transitions. [2019-11-15 23:06:12,934 INFO L78 Accepts]: Start accepts. Automaton has 39957 states and 147326 transitions. Word has length 59 [2019-11-15 23:06:12,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:12,935 INFO L462 AbstractCegarLoop]: Abstraction has 39957 states and 147326 transitions. [2019-11-15 23:06:12,935 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:06:12,935 INFO L276 IsEmpty]: Start isEmpty. Operand 39957 states and 147326 transitions. [2019-11-15 23:06:12,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-11-15 23:06:12,972 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:12,972 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:12,973 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:12,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:12,973 INFO L82 PathProgramCache]: Analyzing trace with hash 1354902346, now seen corresponding path program 1 times [2019-11-15 23:06:12,973 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:12,973 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [587453879] [2019-11-15 23:06:12,974 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:12,974 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:12,974 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:12,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:13,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:13,024 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [587453879] [2019-11-15 23:06:13,024 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:13,024 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:06:13,025 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [576711733] [2019-11-15 23:06:13,025 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:06:13,025 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:13,025 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:06:13,026 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:06:13,026 INFO L87 Difference]: Start difference. First operand 39957 states and 147326 transitions. Second operand 3 states. [2019-11-15 23:06:13,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:13,283 INFO L93 Difference]: Finished difference Result 50255 states and 182161 transitions. [2019-11-15 23:06:13,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:06:13,284 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-11-15 23:06:13,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:13,400 INFO L225 Difference]: With dead ends: 50255 [2019-11-15 23:06:13,400 INFO L226 Difference]: Without dead ends: 50255 [2019-11-15 23:06:13,400 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:06:13,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50255 states. [2019-11-15 23:06:14,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50255 to 43887. [2019-11-15 23:06:14,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43887 states. [2019-11-15 23:06:14,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43887 states to 43887 states and 160764 transitions. [2019-11-15 23:06:14,294 INFO L78 Accepts]: Start accepts. Automaton has 43887 states and 160764 transitions. Word has length 61 [2019-11-15 23:06:14,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:14,294 INFO L462 AbstractCegarLoop]: Abstraction has 43887 states and 160764 transitions. [2019-11-15 23:06:14,295 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:06:14,295 INFO L276 IsEmpty]: Start isEmpty. Operand 43887 states and 160764 transitions. [2019-11-15 23:06:14,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-15 23:06:14,333 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:14,333 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:14,333 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:14,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:14,334 INFO L82 PathProgramCache]: Analyzing trace with hash 1019283348, now seen corresponding path program 1 times [2019-11-15 23:06:14,334 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:14,334 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1847994768] [2019-11-15 23:06:14,335 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:14,335 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:14,335 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:14,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:14,432 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:14,433 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1847994768] [2019-11-15 23:06:14,433 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:14,433 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:06:14,433 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1647244243] [2019-11-15 23:06:14,434 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:06:14,434 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:14,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:06:14,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:06:14,435 INFO L87 Difference]: Start difference. First operand 43887 states and 160764 transitions. Second operand 7 states. [2019-11-15 23:06:16,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:16,002 INFO L93 Difference]: Finished difference Result 55883 states and 200498 transitions. [2019-11-15 23:06:16,002 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 23:06:16,002 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-11-15 23:06:16,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:16,128 INFO L225 Difference]: With dead ends: 55883 [2019-11-15 23:06:16,128 INFO L226 Difference]: Without dead ends: 55643 [2019-11-15 23:06:16,128 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-15 23:06:16,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55643 states. [2019-11-15 23:06:16,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55643 to 45113. [2019-11-15 23:06:16,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45113 states. [2019-11-15 23:06:17,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45113 states to 45113 states and 164931 transitions. [2019-11-15 23:06:17,065 INFO L78 Accepts]: Start accepts. Automaton has 45113 states and 164931 transitions. Word has length 65 [2019-11-15 23:06:17,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:17,066 INFO L462 AbstractCegarLoop]: Abstraction has 45113 states and 164931 transitions. [2019-11-15 23:06:17,066 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:06:17,066 INFO L276 IsEmpty]: Start isEmpty. Operand 45113 states and 164931 transitions. [2019-11-15 23:06:17,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 23:06:17,105 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:17,106 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:17,106 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:17,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:17,106 INFO L82 PathProgramCache]: Analyzing trace with hash -428543078, now seen corresponding path program 1 times [2019-11-15 23:06:17,106 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:17,107 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1521973240] [2019-11-15 23:06:17,107 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:17,107 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:17,107 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:17,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:17,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:17,203 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1521973240] [2019-11-15 23:06:17,203 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:17,203 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:06:17,203 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2133886950] [2019-11-15 23:06:17,204 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:06:17,204 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:17,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:06:17,205 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:06:17,205 INFO L87 Difference]: Start difference. First operand 45113 states and 164931 transitions. Second operand 7 states. [2019-11-15 23:06:18,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:18,491 INFO L93 Difference]: Finished difference Result 55097 states and 197675 transitions. [2019-11-15 23:06:18,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 23:06:18,492 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-11-15 23:06:18,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:18,621 INFO L225 Difference]: With dead ends: 55097 [2019-11-15 23:06:18,621 INFO L226 Difference]: Without dead ends: 54897 [2019-11-15 23:06:18,621 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-15 23:06:18,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54897 states. [2019-11-15 23:06:19,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54897 to 45991. [2019-11-15 23:06:19,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45991 states. [2019-11-15 23:06:20,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45991 states to 45991 states and 167802 transitions. [2019-11-15 23:06:20,020 INFO L78 Accepts]: Start accepts. Automaton has 45991 states and 167802 transitions. Word has length 66 [2019-11-15 23:06:20,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:20,020 INFO L462 AbstractCegarLoop]: Abstraction has 45991 states and 167802 transitions. [2019-11-15 23:06:20,021 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:06:20,021 INFO L276 IsEmpty]: Start isEmpty. Operand 45991 states and 167802 transitions. [2019-11-15 23:06:20,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-11-15 23:06:20,069 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:20,069 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:20,069 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:20,070 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:20,070 INFO L82 PathProgramCache]: Analyzing trace with hash 1329095655, now seen corresponding path program 1 times [2019-11-15 23:06:20,070 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:20,070 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [168097050] [2019-11-15 23:06:20,070 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:20,071 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:20,071 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:20,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:20,238 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:20,239 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [168097050] [2019-11-15 23:06:20,239 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:20,239 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:06:20,239 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [325762253] [2019-11-15 23:06:20,240 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:06:20,240 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:20,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:06:20,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:06:20,241 INFO L87 Difference]: Start difference. First operand 45991 states and 167802 transitions. Second operand 6 states. [2019-11-15 23:06:21,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:21,037 INFO L93 Difference]: Finished difference Result 65551 states and 237329 transitions. [2019-11-15 23:06:21,038 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:06:21,038 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2019-11-15 23:06:21,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:21,189 INFO L225 Difference]: With dead ends: 65551 [2019-11-15 23:06:21,189 INFO L226 Difference]: Without dead ends: 64907 [2019-11-15 23:06:21,190 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:06:21,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64907 states. [2019-11-15 23:06:22,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64907 to 56041. [2019-11-15 23:06:22,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56041 states. [2019-11-15 23:06:22,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56041 states to 56041 states and 204332 transitions. [2019-11-15 23:06:22,456 INFO L78 Accepts]: Start accepts. Automaton has 56041 states and 204332 transitions. Word has length 68 [2019-11-15 23:06:22,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:22,456 INFO L462 AbstractCegarLoop]: Abstraction has 56041 states and 204332 transitions. [2019-11-15 23:06:22,456 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:06:22,456 INFO L276 IsEmpty]: Start isEmpty. Operand 56041 states and 204332 transitions. [2019-11-15 23:06:22,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-11-15 23:06:22,510 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:22,511 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:22,511 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:22,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:22,511 INFO L82 PathProgramCache]: Analyzing trace with hash -2004257624, now seen corresponding path program 1 times [2019-11-15 23:06:22,512 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:22,512 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487506340] [2019-11-15 23:06:22,512 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:22,512 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:22,512 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:22,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:22,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:22,641 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1487506340] [2019-11-15 23:06:22,642 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:22,642 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:06:22,642 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1398108243] [2019-11-15 23:06:22,642 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:06:22,642 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:22,643 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:06:22,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:06:22,643 INFO L87 Difference]: Start difference. First operand 56041 states and 204332 transitions. Second operand 7 states. [2019-11-15 23:06:24,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:24,068 INFO L93 Difference]: Finished difference Result 83029 states and 292760 transitions. [2019-11-15 23:06:24,068 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 23:06:24,069 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 68 [2019-11-15 23:06:24,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:24,253 INFO L225 Difference]: With dead ends: 83029 [2019-11-15 23:06:24,253 INFO L226 Difference]: Without dead ends: 83029 [2019-11-15 23:06:24,253 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 23:06:24,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83029 states. [2019-11-15 23:06:25,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83029 to 76078. [2019-11-15 23:06:25,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76078 states. [2019-11-15 23:06:25,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76078 states to 76078 states and 270627 transitions. [2019-11-15 23:06:25,773 INFO L78 Accepts]: Start accepts. Automaton has 76078 states and 270627 transitions. Word has length 68 [2019-11-15 23:06:25,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:25,773 INFO L462 AbstractCegarLoop]: Abstraction has 76078 states and 270627 transitions. [2019-11-15 23:06:25,774 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:06:25,774 INFO L276 IsEmpty]: Start isEmpty. Operand 76078 states and 270627 transitions. [2019-11-15 23:06:25,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-11-15 23:06:25,852 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:25,853 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:25,853 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:25,853 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:25,853 INFO L82 PathProgramCache]: Analyzing trace with hash -759493143, now seen corresponding path program 1 times [2019-11-15 23:06:25,854 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:25,854 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [269893160] [2019-11-15 23:06:25,854 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:25,854 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:25,855 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:25,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:25,921 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:25,922 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [269893160] [2019-11-15 23:06:25,922 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:25,922 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:06:25,923 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [639874374] [2019-11-15 23:06:25,923 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:06:25,923 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:25,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:06:25,924 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:06:25,924 INFO L87 Difference]: Start difference. First operand 76078 states and 270627 transitions. Second operand 3 states. [2019-11-15 23:06:26,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:26,236 INFO L93 Difference]: Finished difference Result 54414 states and 197408 transitions. [2019-11-15 23:06:26,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:06:26,237 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 68 [2019-11-15 23:06:26,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:26,362 INFO L225 Difference]: With dead ends: 54414 [2019-11-15 23:06:26,362 INFO L226 Difference]: Without dead ends: 54252 [2019-11-15 23:06:26,362 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:06:26,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54252 states. [2019-11-15 23:06:27,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54252 to 54212. [2019-11-15 23:06:27,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54212 states. [2019-11-15 23:06:28,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54212 states to 54212 states and 196823 transitions. [2019-11-15 23:06:28,030 INFO L78 Accepts]: Start accepts. Automaton has 54212 states and 196823 transitions. Word has length 68 [2019-11-15 23:06:28,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:28,030 INFO L462 AbstractCegarLoop]: Abstraction has 54212 states and 196823 transitions. [2019-11-15 23:06:28,031 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:06:28,031 INFO L276 IsEmpty]: Start isEmpty. Operand 54212 states and 196823 transitions. [2019-11-15 23:06:28,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 23:06:28,072 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:28,072 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:28,073 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:28,073 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:28,073 INFO L82 PathProgramCache]: Analyzing trace with hash -1811531678, now seen corresponding path program 1 times [2019-11-15 23:06:28,073 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:28,073 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2058494638] [2019-11-15 23:06:28,073 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:28,073 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:28,073 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:28,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:28,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:28,205 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2058494638] [2019-11-15 23:06:28,205 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:28,206 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:06:28,206 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1823782568] [2019-11-15 23:06:28,206 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:06:28,206 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:28,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:06:28,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:06:28,207 INFO L87 Difference]: Start difference. First operand 54212 states and 196823 transitions. Second operand 5 states. [2019-11-15 23:06:28,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:28,984 INFO L93 Difference]: Finished difference Result 84427 states and 303655 transitions. [2019-11-15 23:06:28,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:06:28,984 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 69 [2019-11-15 23:06:28,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:29,177 INFO L225 Difference]: With dead ends: 84427 [2019-11-15 23:06:29,177 INFO L226 Difference]: Without dead ends: 84231 [2019-11-15 23:06:29,178 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:06:29,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84231 states. [2019-11-15 23:06:30,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84231 to 76146. [2019-11-15 23:06:30,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76146 states. [2019-11-15 23:06:30,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76146 states to 76146 states and 275543 transitions. [2019-11-15 23:06:30,697 INFO L78 Accepts]: Start accepts. Automaton has 76146 states and 275543 transitions. Word has length 69 [2019-11-15 23:06:30,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:30,698 INFO L462 AbstractCegarLoop]: Abstraction has 76146 states and 275543 transitions. [2019-11-15 23:06:30,698 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:06:30,698 INFO L276 IsEmpty]: Start isEmpty. Operand 76146 states and 275543 transitions. [2019-11-15 23:06:30,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 23:06:30,756 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:30,756 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:30,756 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:30,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:30,756 INFO L82 PathProgramCache]: Analyzing trace with hash -566767197, now seen corresponding path program 1 times [2019-11-15 23:06:30,757 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:30,757 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1231661945] [2019-11-15 23:06:30,757 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:30,757 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:30,757 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:30,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:30,888 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:30,888 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1231661945] [2019-11-15 23:06:30,889 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:30,889 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:06:30,889 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [293062609] [2019-11-15 23:06:30,890 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:06:30,890 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:30,891 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:06:30,891 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:06:30,891 INFO L87 Difference]: Start difference. First operand 76146 states and 275543 transitions. Second operand 5 states. [2019-11-15 23:06:31,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:31,086 INFO L93 Difference]: Finished difference Result 19614 states and 62264 transitions. [2019-11-15 23:06:31,086 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 23:06:31,087 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 69 [2019-11-15 23:06:31,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:31,135 INFO L225 Difference]: With dead ends: 19614 [2019-11-15 23:06:31,135 INFO L226 Difference]: Without dead ends: 19136 [2019-11-15 23:06:31,136 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 6 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:06:31,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19136 states. [2019-11-15 23:06:31,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19136 to 19124. [2019-11-15 23:06:31,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19124 states. [2019-11-15 23:06:31,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19124 states to 19124 states and 60759 transitions. [2019-11-15 23:06:31,484 INFO L78 Accepts]: Start accepts. Automaton has 19124 states and 60759 transitions. Word has length 69 [2019-11-15 23:06:31,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:31,485 INFO L462 AbstractCegarLoop]: Abstraction has 19124 states and 60759 transitions. [2019-11-15 23:06:31,485 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:06:31,485 INFO L276 IsEmpty]: Start isEmpty. Operand 19124 states and 60759 transitions. [2019-11-15 23:06:31,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-15 23:06:31,500 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:31,500 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:31,501 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:31,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:31,501 INFO L82 PathProgramCache]: Analyzing trace with hash -456462020, now seen corresponding path program 1 times [2019-11-15 23:06:31,501 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:31,501 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [654381463] [2019-11-15 23:06:31,501 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:31,501 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:31,502 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:31,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:31,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:31,572 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [654381463] [2019-11-15 23:06:31,573 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:31,573 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:06:31,573 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [257867232] [2019-11-15 23:06:31,573 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:06:31,574 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:31,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:06:31,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:06:31,574 INFO L87 Difference]: Start difference. First operand 19124 states and 60759 transitions. Second operand 4 states. [2019-11-15 23:06:31,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:31,903 INFO L93 Difference]: Finished difference Result 24074 states and 75427 transitions. [2019-11-15 23:06:31,903 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:06:31,903 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2019-11-15 23:06:31,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:31,940 INFO L225 Difference]: With dead ends: 24074 [2019-11-15 23:06:31,940 INFO L226 Difference]: Without dead ends: 24074 [2019-11-15 23:06:31,941 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:06:31,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24074 states. [2019-11-15 23:06:32,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24074 to 19964. [2019-11-15 23:06:32,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19964 states. [2019-11-15 23:06:32,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19964 states to 19964 states and 63126 transitions. [2019-11-15 23:06:32,535 INFO L78 Accepts]: Start accepts. Automaton has 19964 states and 63126 transitions. Word has length 78 [2019-11-15 23:06:32,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:32,535 INFO L462 AbstractCegarLoop]: Abstraction has 19964 states and 63126 transitions. [2019-11-15 23:06:32,536 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:06:32,536 INFO L276 IsEmpty]: Start isEmpty. Operand 19964 states and 63126 transitions. [2019-11-15 23:06:32,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-15 23:06:32,552 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:32,552 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:32,552 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:32,552 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:32,552 INFO L82 PathProgramCache]: Analyzing trace with hash -711198565, now seen corresponding path program 1 times [2019-11-15 23:06:32,552 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:32,552 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [557232901] [2019-11-15 23:06:32,553 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:32,553 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:32,553 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:32,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:32,650 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:32,650 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [557232901] [2019-11-15 23:06:32,651 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:32,651 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 23:06:32,651 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1353483615] [2019-11-15 23:06:32,651 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 23:06:32,652 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:32,652 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 23:06:32,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:06:32,652 INFO L87 Difference]: Start difference. First operand 19964 states and 63126 transitions. Second operand 8 states. [2019-11-15 23:06:33,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:33,699 INFO L93 Difference]: Finished difference Result 22070 states and 69318 transitions. [2019-11-15 23:06:33,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-11-15 23:06:33,699 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 78 [2019-11-15 23:06:33,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:33,734 INFO L225 Difference]: With dead ends: 22070 [2019-11-15 23:06:33,734 INFO L226 Difference]: Without dead ends: 22022 [2019-11-15 23:06:33,735 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=404, Unknown=0, NotChecked=0, Total=506 [2019-11-15 23:06:33,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22022 states. [2019-11-15 23:06:33,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22022 to 19436. [2019-11-15 23:06:33,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19436 states. [2019-11-15 23:06:34,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19436 states to 19436 states and 61628 transitions. [2019-11-15 23:06:34,029 INFO L78 Accepts]: Start accepts. Automaton has 19436 states and 61628 transitions. Word has length 78 [2019-11-15 23:06:34,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:34,030 INFO L462 AbstractCegarLoop]: Abstraction has 19436 states and 61628 transitions. [2019-11-15 23:06:34,030 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 23:06:34,030 INFO L276 IsEmpty]: Start isEmpty. Operand 19436 states and 61628 transitions. [2019-11-15 23:06:34,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 23:06:34,047 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:34,047 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:34,048 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:34,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:34,048 INFO L82 PathProgramCache]: Analyzing trace with hash 1694853667, now seen corresponding path program 1 times [2019-11-15 23:06:34,048 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:34,048 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2121377834] [2019-11-15 23:06:34,049 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:34,049 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:34,049 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:34,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:34,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:34,161 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2121377834] [2019-11-15 23:06:34,161 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:34,162 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 23:06:34,162 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [777533146] [2019-11-15 23:06:34,162 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 23:06:34,163 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:34,163 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 23:06:34,163 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:06:34,163 INFO L87 Difference]: Start difference. First operand 19436 states and 61628 transitions. Second operand 8 states. [2019-11-15 23:06:36,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:36,530 INFO L93 Difference]: Finished difference Result 50430 states and 153646 transitions. [2019-11-15 23:06:36,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-11-15 23:06:36,531 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 81 [2019-11-15 23:06:36,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:36,616 INFO L225 Difference]: With dead ends: 50430 [2019-11-15 23:06:36,616 INFO L226 Difference]: Without dead ends: 49731 [2019-11-15 23:06:36,617 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=153, Invalid=497, Unknown=0, NotChecked=0, Total=650 [2019-11-15 23:06:36,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49731 states. [2019-11-15 23:06:37,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49731 to 29964. [2019-11-15 23:06:37,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29964 states. [2019-11-15 23:06:37,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29964 states to 29964 states and 93558 transitions. [2019-11-15 23:06:37,202 INFO L78 Accepts]: Start accepts. Automaton has 29964 states and 93558 transitions. Word has length 81 [2019-11-15 23:06:37,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:37,202 INFO L462 AbstractCegarLoop]: Abstraction has 29964 states and 93558 transitions. [2019-11-15 23:06:37,202 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 23:06:37,202 INFO L276 IsEmpty]: Start isEmpty. Operand 29964 states and 93558 transitions. [2019-11-15 23:06:37,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 23:06:37,234 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:37,235 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:37,235 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:37,235 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:37,235 INFO L82 PathProgramCache]: Analyzing trace with hash -1638499612, now seen corresponding path program 1 times [2019-11-15 23:06:37,235 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:37,235 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [875189389] [2019-11-15 23:06:37,235 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:37,236 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:37,236 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:37,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:37,372 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:37,373 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [875189389] [2019-11-15 23:06:37,373 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:37,373 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:06:37,374 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [860852996] [2019-11-15 23:06:37,374 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:06:37,374 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:37,375 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:06:37,375 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:06:37,375 INFO L87 Difference]: Start difference. First operand 29964 states and 93558 transitions. Second operand 6 states. [2019-11-15 23:06:37,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:37,932 INFO L93 Difference]: Finished difference Result 31402 states and 97495 transitions. [2019-11-15 23:06:37,932 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:06:37,932 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 81 [2019-11-15 23:06:37,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:37,983 INFO L225 Difference]: With dead ends: 31402 [2019-11-15 23:06:37,983 INFO L226 Difference]: Without dead ends: 31402 [2019-11-15 23:06:37,984 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:06:38,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31402 states. [2019-11-15 23:06:38,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31402 to 29633. [2019-11-15 23:06:38,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29633 states. [2019-11-15 23:06:38,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29633 states to 29633 states and 92401 transitions. [2019-11-15 23:06:38,437 INFO L78 Accepts]: Start accepts. Automaton has 29633 states and 92401 transitions. Word has length 81 [2019-11-15 23:06:38,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:38,437 INFO L462 AbstractCegarLoop]: Abstraction has 29633 states and 92401 transitions. [2019-11-15 23:06:38,437 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:06:38,437 INFO L276 IsEmpty]: Start isEmpty. Operand 29633 states and 92401 transitions. [2019-11-15 23:06:38,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 23:06:38,464 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:38,464 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:38,465 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:38,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:38,465 INFO L82 PathProgramCache]: Analyzing trace with hash 720807397, now seen corresponding path program 1 times [2019-11-15 23:06:38,465 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:38,465 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1195371475] [2019-11-15 23:06:38,465 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:38,465 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:38,466 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:38,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:38,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:38,604 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1195371475] [2019-11-15 23:06:38,604 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:38,604 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:06:38,604 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [650558013] [2019-11-15 23:06:38,605 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:06:38,605 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:38,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:06:38,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:06:38,606 INFO L87 Difference]: Start difference. First operand 29633 states and 92401 transitions. Second operand 7 states. [2019-11-15 23:06:39,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:39,114 INFO L93 Difference]: Finished difference Result 31147 states and 96557 transitions. [2019-11-15 23:06:39,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 23:06:39,115 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 81 [2019-11-15 23:06:39,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:39,165 INFO L225 Difference]: With dead ends: 31147 [2019-11-15 23:06:39,166 INFO L226 Difference]: Without dead ends: 31147 [2019-11-15 23:06:39,166 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 23:06:39,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31147 states. [2019-11-15 23:06:39,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31147 to 29965. [2019-11-15 23:06:39,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29965 states. [2019-11-15 23:06:39,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29965 states to 29965 states and 93232 transitions. [2019-11-15 23:06:39,603 INFO L78 Accepts]: Start accepts. Automaton has 29965 states and 93232 transitions. Word has length 81 [2019-11-15 23:06:39,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:39,604 INFO L462 AbstractCegarLoop]: Abstraction has 29965 states and 93232 transitions. [2019-11-15 23:06:39,604 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:06:39,604 INFO L276 IsEmpty]: Start isEmpty. Operand 29965 states and 93232 transitions. [2019-11-15 23:06:39,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 23:06:39,636 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:39,636 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:39,637 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:39,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:39,637 INFO L82 PathProgramCache]: Analyzing trace with hash 1050573158, now seen corresponding path program 1 times [2019-11-15 23:06:39,637 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:39,637 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2064703481] [2019-11-15 23:06:39,637 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:39,637 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:39,638 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:39,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:39,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:39,698 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2064703481] [2019-11-15 23:06:39,698 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:39,698 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:06:39,698 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2062713231] [2019-11-15 23:06:39,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:06:39,700 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:39,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:06:39,700 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:06:39,700 INFO L87 Difference]: Start difference. First operand 29965 states and 93232 transitions. Second operand 3 states. [2019-11-15 23:06:39,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:39,810 INFO L93 Difference]: Finished difference Result 21486 states and 66269 transitions. [2019-11-15 23:06:39,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:06:39,811 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 81 [2019-11-15 23:06:39,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:39,851 INFO L225 Difference]: With dead ends: 21486 [2019-11-15 23:06:39,851 INFO L226 Difference]: Without dead ends: 21486 [2019-11-15 23:06:39,851 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:06:39,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21486 states. [2019-11-15 23:06:40,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21486 to 21163. [2019-11-15 23:06:40,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21163 states. [2019-11-15 23:06:40,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21163 states to 21163 states and 65320 transitions. [2019-11-15 23:06:40,382 INFO L78 Accepts]: Start accepts. Automaton has 21163 states and 65320 transitions. Word has length 81 [2019-11-15 23:06:40,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:40,383 INFO L462 AbstractCegarLoop]: Abstraction has 21163 states and 65320 transitions. [2019-11-15 23:06:40,383 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:06:40,383 INFO L276 IsEmpty]: Start isEmpty. Operand 21163 states and 65320 transitions. [2019-11-15 23:06:40,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 23:06:40,402 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:40,402 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:40,402 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:40,403 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:40,403 INFO L82 PathProgramCache]: Analyzing trace with hash -208125143, now seen corresponding path program 1 times [2019-11-15 23:06:40,403 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:40,403 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1981089948] [2019-11-15 23:06:40,403 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:40,403 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:40,403 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:40,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:40,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:40,506 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1981089948] [2019-11-15 23:06:40,507 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:40,507 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:06:40,507 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1441641517] [2019-11-15 23:06:40,508 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:06:40,508 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:40,508 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:06:40,508 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:06:40,508 INFO L87 Difference]: Start difference. First operand 21163 states and 65320 transitions. Second operand 5 states. [2019-11-15 23:06:40,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:40,559 INFO L93 Difference]: Finished difference Result 3133 states and 7751 transitions. [2019-11-15 23:06:40,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 23:06:40,559 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2019-11-15 23:06:40,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:40,562 INFO L225 Difference]: With dead ends: 3133 [2019-11-15 23:06:40,563 INFO L226 Difference]: Without dead ends: 2747 [2019-11-15 23:06:40,563 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:06:40,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2747 states. [2019-11-15 23:06:40,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2747 to 2569. [2019-11-15 23:06:40,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2569 states. [2019-11-15 23:06:40,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2569 states to 2569 states and 6367 transitions. [2019-11-15 23:06:40,600 INFO L78 Accepts]: Start accepts. Automaton has 2569 states and 6367 transitions. Word has length 82 [2019-11-15 23:06:40,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:40,601 INFO L462 AbstractCegarLoop]: Abstraction has 2569 states and 6367 transitions. [2019-11-15 23:06:40,601 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:06:40,601 INFO L276 IsEmpty]: Start isEmpty. Operand 2569 states and 6367 transitions. [2019-11-15 23:06:40,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:06:40,605 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:40,605 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:40,605 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:40,606 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:40,606 INFO L82 PathProgramCache]: Analyzing trace with hash 233851131, now seen corresponding path program 1 times [2019-11-15 23:06:40,606 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:40,606 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [966743870] [2019-11-15 23:06:40,607 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:40,607 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:40,607 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:40,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:40,687 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:40,687 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [966743870] [2019-11-15 23:06:40,687 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:40,688 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:06:40,688 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1104339014] [2019-11-15 23:06:40,689 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:06:40,689 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:40,689 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:06:40,692 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:06:40,692 INFO L87 Difference]: Start difference. First operand 2569 states and 6367 transitions. Second operand 5 states. [2019-11-15 23:06:40,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:40,955 INFO L93 Difference]: Finished difference Result 2843 states and 6960 transitions. [2019-11-15 23:06:40,955 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:06:40,956 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-11-15 23:06:40,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:40,959 INFO L225 Difference]: With dead ends: 2843 [2019-11-15 23:06:40,960 INFO L226 Difference]: Without dead ends: 2817 [2019-11-15 23:06:40,962 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:06:40,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2817 states. [2019-11-15 23:06:40,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2817 to 2668. [2019-11-15 23:06:40,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2668 states. [2019-11-15 23:06:41,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 6586 transitions. [2019-11-15 23:06:41,003 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 6586 transitions. Word has length 95 [2019-11-15 23:06:41,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:41,003 INFO L462 AbstractCegarLoop]: Abstraction has 2668 states and 6586 transitions. [2019-11-15 23:06:41,003 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:06:41,003 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 6586 transitions. [2019-11-15 23:06:41,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:06:41,008 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:41,008 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:41,009 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:41,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:41,009 INFO L82 PathProgramCache]: Analyzing trace with hash -214845508, now seen corresponding path program 1 times [2019-11-15 23:06:41,009 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:41,010 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1787585712] [2019-11-15 23:06:41,010 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:41,010 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:41,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:41,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:41,170 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:41,170 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1787585712] [2019-11-15 23:06:41,170 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:41,171 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:06:41,171 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [602690055] [2019-11-15 23:06:41,171 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:06:41,172 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:41,172 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:06:41,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:06:41,172 INFO L87 Difference]: Start difference. First operand 2668 states and 6586 transitions. Second operand 6 states. [2019-11-15 23:06:41,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:41,284 INFO L93 Difference]: Finished difference Result 2946 states and 7117 transitions. [2019-11-15 23:06:41,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:06:41,285 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 23:06:41,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:41,288 INFO L225 Difference]: With dead ends: 2946 [2019-11-15 23:06:41,288 INFO L226 Difference]: Without dead ends: 2920 [2019-11-15 23:06:41,289 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:06:41,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2920 states. [2019-11-15 23:06:41,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2920 to 2743. [2019-11-15 23:06:41,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2743 states. [2019-11-15 23:06:41,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2743 states to 2743 states and 6705 transitions. [2019-11-15 23:06:41,320 INFO L78 Accepts]: Start accepts. Automaton has 2743 states and 6705 transitions. Word has length 95 [2019-11-15 23:06:41,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:41,320 INFO L462 AbstractCegarLoop]: Abstraction has 2743 states and 6705 transitions. [2019-11-15 23:06:41,321 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:06:41,321 INFO L276 IsEmpty]: Start isEmpty. Operand 2743 states and 6705 transitions. [2019-11-15 23:06:41,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:06:41,324 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:41,325 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:41,325 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:41,325 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:41,326 INFO L82 PathProgramCache]: Analyzing trace with hash -285017405, now seen corresponding path program 2 times [2019-11-15 23:06:41,326 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:41,326 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1531798798] [2019-11-15 23:06:41,326 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:41,327 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:41,327 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:41,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:41,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:41,407 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1531798798] [2019-11-15 23:06:41,407 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:41,407 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:06:41,407 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1392843920] [2019-11-15 23:06:41,410 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:06:41,410 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:41,410 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:06:41,411 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:06:41,411 INFO L87 Difference]: Start difference. First operand 2743 states and 6705 transitions. Second operand 5 states. [2019-11-15 23:06:41,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:41,698 INFO L93 Difference]: Finished difference Result 3168 states and 7628 transitions. [2019-11-15 23:06:41,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:06:41,699 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-11-15 23:06:41,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:41,702 INFO L225 Difference]: With dead ends: 3168 [2019-11-15 23:06:41,702 INFO L226 Difference]: Without dead ends: 3142 [2019-11-15 23:06:41,702 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:06:41,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3142 states. [2019-11-15 23:06:41,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3142 to 2786. [2019-11-15 23:06:41,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2786 states. [2019-11-15 23:06:41,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2786 states to 2786 states and 6783 transitions. [2019-11-15 23:06:41,731 INFO L78 Accepts]: Start accepts. Automaton has 2786 states and 6783 transitions. Word has length 95 [2019-11-15 23:06:41,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:41,732 INFO L462 AbstractCegarLoop]: Abstraction has 2786 states and 6783 transitions. [2019-11-15 23:06:41,732 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:06:41,732 INFO L276 IsEmpty]: Start isEmpty. Operand 2786 states and 6783 transitions. [2019-11-15 23:06:41,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:06:41,734 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:41,734 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:41,735 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:41,735 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:41,735 INFO L82 PathProgramCache]: Analyzing trace with hash -1915585987, now seen corresponding path program 1 times [2019-11-15 23:06:41,736 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:41,736 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [783941251] [2019-11-15 23:06:41,736 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:41,736 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:41,736 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:41,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:41,838 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:41,838 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [783941251] [2019-11-15 23:06:41,839 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:41,839 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:06:41,839 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [90749561] [2019-11-15 23:06:41,840 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:06:41,840 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:41,840 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:06:41,840 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:06:41,841 INFO L87 Difference]: Start difference. First operand 2786 states and 6783 transitions. Second operand 6 states. [2019-11-15 23:06:41,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:41,974 INFO L93 Difference]: Finished difference Result 3156 states and 7506 transitions. [2019-11-15 23:06:41,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 23:06:41,975 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 23:06:41,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:41,978 INFO L225 Difference]: With dead ends: 3156 [2019-11-15 23:06:41,978 INFO L226 Difference]: Without dead ends: 3156 [2019-11-15 23:06:41,978 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 23:06:41,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3156 states. [2019-11-15 23:06:42,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3156 to 2882. [2019-11-15 23:06:42,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2882 states. [2019-11-15 23:06:42,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2882 states to 2882 states and 6955 transitions. [2019-11-15 23:06:42,008 INFO L78 Accepts]: Start accepts. Automaton has 2882 states and 6955 transitions. Word has length 95 [2019-11-15 23:06:42,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:42,008 INFO L462 AbstractCegarLoop]: Abstraction has 2882 states and 6955 transitions. [2019-11-15 23:06:42,009 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:06:42,009 INFO L276 IsEmpty]: Start isEmpty. Operand 2882 states and 6955 transitions. [2019-11-15 23:06:42,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:06:42,012 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:42,012 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:42,012 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:42,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:42,013 INFO L82 PathProgramCache]: Analyzing trace with hash 443721022, now seen corresponding path program 1 times [2019-11-15 23:06:42,013 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:42,013 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [481995813] [2019-11-15 23:06:42,013 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:42,014 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:42,014 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:42,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:42,116 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:42,116 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [481995813] [2019-11-15 23:06:42,116 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:42,117 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:06:42,117 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1843069263] [2019-11-15 23:06:42,117 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:06:42,117 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:42,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:06:42,118 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:06:42,118 INFO L87 Difference]: Start difference. First operand 2882 states and 6955 transitions. Second operand 6 states. [2019-11-15 23:06:42,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:42,280 INFO L93 Difference]: Finished difference Result 2893 states and 6895 transitions. [2019-11-15 23:06:42,281 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 23:06:42,281 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 23:06:42,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:42,283 INFO L225 Difference]: With dead ends: 2893 [2019-11-15 23:06:42,283 INFO L226 Difference]: Without dead ends: 2893 [2019-11-15 23:06:42,284 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2019-11-15 23:06:42,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2893 states. [2019-11-15 23:06:42,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2893 to 2662. [2019-11-15 23:06:42,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2662 states. [2019-11-15 23:06:42,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2662 states to 2662 states and 6430 transitions. [2019-11-15 23:06:42,312 INFO L78 Accepts]: Start accepts. Automaton has 2662 states and 6430 transitions. Word has length 95 [2019-11-15 23:06:42,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:42,313 INFO L462 AbstractCegarLoop]: Abstraction has 2662 states and 6430 transitions. [2019-11-15 23:06:42,313 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:06:42,313 INFO L276 IsEmpty]: Start isEmpty. Operand 2662 states and 6430 transitions. [2019-11-15 23:06:42,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:06:42,315 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:42,315 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:42,315 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:42,315 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:42,315 INFO L82 PathProgramCache]: Analyzing trace with hash -1122077188, now seen corresponding path program 1 times [2019-11-15 23:06:42,315 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:42,316 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2008992902] [2019-11-15 23:06:42,316 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:42,316 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:42,316 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:42,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:42,386 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:42,387 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2008992902] [2019-11-15 23:06:42,387 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:42,387 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:06:42,387 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1079542753] [2019-11-15 23:06:42,388 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:06:42,388 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:42,388 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:06:42,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:06:42,389 INFO L87 Difference]: Start difference. First operand 2662 states and 6430 transitions. Second operand 4 states. [2019-11-15 23:06:42,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:42,543 INFO L93 Difference]: Finished difference Result 3069 states and 7276 transitions. [2019-11-15 23:06:42,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:06:42,543 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2019-11-15 23:06:42,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:42,547 INFO L225 Difference]: With dead ends: 3069 [2019-11-15 23:06:42,547 INFO L226 Difference]: Without dead ends: 3042 [2019-11-15 23:06:42,548 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:06:42,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3042 states. [2019-11-15 23:06:42,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3042 to 2715. [2019-11-15 23:06:42,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2715 states. [2019-11-15 23:06:42,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2715 states to 2715 states and 6538 transitions. [2019-11-15 23:06:42,590 INFO L78 Accepts]: Start accepts. Automaton has 2715 states and 6538 transitions. Word has length 95 [2019-11-15 23:06:42,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:42,591 INFO L462 AbstractCegarLoop]: Abstraction has 2715 states and 6538 transitions. [2019-11-15 23:06:42,591 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:06:42,591 INFO L276 IsEmpty]: Start isEmpty. Operand 2715 states and 6538 transitions. [2019-11-15 23:06:42,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:06:42,594 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:42,595 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:42,595 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:42,595 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:42,595 INFO L82 PathProgramCache]: Analyzing trace with hash 644311999, now seen corresponding path program 1 times [2019-11-15 23:06:42,596 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:42,596 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1201692925] [2019-11-15 23:06:42,596 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:42,596 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:42,596 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:42,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:42,658 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:42,658 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1201692925] [2019-11-15 23:06:42,659 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:42,659 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:06:42,659 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [617483706] [2019-11-15 23:06:42,660 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:06:42,660 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:42,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:06:42,660 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:06:42,660 INFO L87 Difference]: Start difference. First operand 2715 states and 6538 transitions. Second operand 4 states. [2019-11-15 23:06:42,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:42,758 INFO L93 Difference]: Finished difference Result 2139 states and 5014 transitions. [2019-11-15 23:06:42,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:06:42,759 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2019-11-15 23:06:42,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:42,762 INFO L225 Difference]: With dead ends: 2139 [2019-11-15 23:06:42,762 INFO L226 Difference]: Without dead ends: 2139 [2019-11-15 23:06:42,762 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:06:42,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2139 states. [2019-11-15 23:06:42,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2139 to 2001. [2019-11-15 23:06:42,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2001 states. [2019-11-15 23:06:42,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2001 states to 2001 states and 4725 transitions. [2019-11-15 23:06:42,790 INFO L78 Accepts]: Start accepts. Automaton has 2001 states and 4725 transitions. Word has length 95 [2019-11-15 23:06:42,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:42,791 INFO L462 AbstractCegarLoop]: Abstraction has 2001 states and 4725 transitions. [2019-11-15 23:06:42,791 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:06:42,791 INFO L276 IsEmpty]: Start isEmpty. Operand 2001 states and 4725 transitions. [2019-11-15 23:06:42,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:06:42,793 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:42,794 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:42,794 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:42,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:42,794 INFO L82 PathProgramCache]: Analyzing trace with hash -1648942306, now seen corresponding path program 1 times [2019-11-15 23:06:42,795 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:42,795 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [767464657] [2019-11-15 23:06:42,795 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:42,795 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:42,795 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:42,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:42,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:42,875 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [767464657] [2019-11-15 23:06:42,875 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:42,876 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:06:42,876 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1780746832] [2019-11-15 23:06:42,876 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:06:42,876 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:42,877 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:06:42,877 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:06:42,877 INFO L87 Difference]: Start difference. First operand 2001 states and 4725 transitions. Second operand 5 states. [2019-11-15 23:06:43,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:43,111 INFO L93 Difference]: Finished difference Result 2253 states and 5304 transitions. [2019-11-15 23:06:43,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:06:43,112 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-11-15 23:06:43,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:43,115 INFO L225 Difference]: With dead ends: 2253 [2019-11-15 23:06:43,115 INFO L226 Difference]: Without dead ends: 2235 [2019-11-15 23:06:43,115 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:06:43,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2235 states. [2019-11-15 23:06:43,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2235 to 2028. [2019-11-15 23:06:43,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2028 states. [2019-11-15 23:06:43,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2028 states to 2028 states and 4779 transitions. [2019-11-15 23:06:43,145 INFO L78 Accepts]: Start accepts. Automaton has 2028 states and 4779 transitions. Word has length 95 [2019-11-15 23:06:43,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:43,145 INFO L462 AbstractCegarLoop]: Abstraction has 2028 states and 4779 transitions. [2019-11-15 23:06:43,146 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:06:43,146 INFO L276 IsEmpty]: Start isEmpty. Operand 2028 states and 4779 transitions. [2019-11-15 23:06:43,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:06:43,148 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:43,148 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:43,149 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:43,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:43,149 INFO L82 PathProgramCache]: Analyzing trace with hash -404177825, now seen corresponding path program 1 times [2019-11-15 23:06:43,149 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:43,150 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1402043081] [2019-11-15 23:06:43,150 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:43,150 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:43,150 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:43,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:43,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:43,247 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1402043081] [2019-11-15 23:06:43,247 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:43,248 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:06:43,248 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1853196919] [2019-11-15 23:06:43,248 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:06:43,248 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:43,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:06:43,249 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:06:43,249 INFO L87 Difference]: Start difference. First operand 2028 states and 4779 transitions. Second operand 6 states. [2019-11-15 23:06:43,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:43,620 INFO L93 Difference]: Finished difference Result 2341 states and 5414 transitions. [2019-11-15 23:06:43,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:06:43,621 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 23:06:43,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:43,624 INFO L225 Difference]: With dead ends: 2341 [2019-11-15 23:06:43,624 INFO L226 Difference]: Without dead ends: 2341 [2019-11-15 23:06:43,625 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:06:43,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2341 states. [2019-11-15 23:06:43,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2341 to 2018. [2019-11-15 23:06:43,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2018 states. [2019-11-15 23:06:43,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2018 states to 2018 states and 4744 transitions. [2019-11-15 23:06:43,657 INFO L78 Accepts]: Start accepts. Automaton has 2018 states and 4744 transitions. Word has length 95 [2019-11-15 23:06:43,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:43,658 INFO L462 AbstractCegarLoop]: Abstraction has 2018 states and 4744 transitions. [2019-11-15 23:06:43,658 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:06:43,658 INFO L276 IsEmpty]: Start isEmpty. Operand 2018 states and 4744 transitions. [2019-11-15 23:06:43,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:06:43,660 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:43,661 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:43,661 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:43,661 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:43,662 INFO L82 PathProgramCache]: Analyzing trace with hash -849814305, now seen corresponding path program 2 times [2019-11-15 23:06:43,662 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:43,662 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [723654998] [2019-11-15 23:06:43,662 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:43,662 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:43,663 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:43,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:43,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:43,774 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [723654998] [2019-11-15 23:06:43,774 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:43,774 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:06:43,774 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [932211930] [2019-11-15 23:06:43,775 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:06:43,775 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:43,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:06:43,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:06:43,775 INFO L87 Difference]: Start difference. First operand 2018 states and 4744 transitions. Second operand 7 states. [2019-11-15 23:06:44,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:44,253 INFO L93 Difference]: Finished difference Result 3118 states and 7418 transitions. [2019-11-15 23:06:44,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 23:06:44,254 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 95 [2019-11-15 23:06:44,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:44,258 INFO L225 Difference]: With dead ends: 3118 [2019-11-15 23:06:44,258 INFO L226 Difference]: Without dead ends: 3118 [2019-11-15 23:06:44,259 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=76, Invalid=134, Unknown=0, NotChecked=0, Total=210 [2019-11-15 23:06:44,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3118 states. [2019-11-15 23:06:44,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3118 to 1937. [2019-11-15 23:06:44,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1937 states. [2019-11-15 23:06:44,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1937 states to 1937 states and 4545 transitions. [2019-11-15 23:06:44,295 INFO L78 Accepts]: Start accepts. Automaton has 1937 states and 4545 transitions. Word has length 95 [2019-11-15 23:06:44,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:44,296 INFO L462 AbstractCegarLoop]: Abstraction has 1937 states and 4545 transitions. [2019-11-15 23:06:44,296 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:06:44,296 INFO L276 IsEmpty]: Start isEmpty. Operand 1937 states and 4545 transitions. [2019-11-15 23:06:44,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:06:44,299 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:44,299 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:44,299 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:44,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:44,300 INFO L82 PathProgramCache]: Analyzing trace with hash -520048544, now seen corresponding path program 1 times [2019-11-15 23:06:44,300 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:44,300 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1114950673] [2019-11-15 23:06:44,300 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:44,301 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:44,301 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:44,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:44,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:44,441 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1114950673] [2019-11-15 23:06:44,443 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:44,443 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:06:44,443 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1179300638] [2019-11-15 23:06:44,443 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:06:44,444 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:44,444 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:06:44,444 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:06:44,444 INFO L87 Difference]: Start difference. First operand 1937 states and 4545 transitions. Second operand 6 states. [2019-11-15 23:06:44,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:44,533 INFO L93 Difference]: Finished difference Result 3203 states and 7615 transitions. [2019-11-15 23:06:44,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 23:06:44,534 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 23:06:44,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:44,536 INFO L225 Difference]: With dead ends: 3203 [2019-11-15 23:06:44,536 INFO L226 Difference]: Without dead ends: 1346 [2019-11-15 23:06:44,536 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-15 23:06:44,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1346 states. [2019-11-15 23:06:44,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1346 to 1346. [2019-11-15 23:06:44,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1346 states. [2019-11-15 23:06:44,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1346 states to 1346 states and 3201 transitions. [2019-11-15 23:06:44,556 INFO L78 Accepts]: Start accepts. Automaton has 1346 states and 3201 transitions. Word has length 95 [2019-11-15 23:06:44,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:44,557 INFO L462 AbstractCegarLoop]: Abstraction has 1346 states and 3201 transitions. [2019-11-15 23:06:44,557 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:06:44,557 INFO L276 IsEmpty]: Start isEmpty. Operand 1346 states and 3201 transitions. [2019-11-15 23:06:44,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:06:44,559 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:44,559 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:44,560 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:44,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:44,560 INFO L82 PathProgramCache]: Analyzing trace with hash -842764099, now seen corresponding path program 1 times [2019-11-15 23:06:44,560 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:44,563 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [990711681] [2019-11-15 23:06:44,564 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:44,564 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:44,564 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:44,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:44,632 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:44,636 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [990711681] [2019-11-15 23:06:44,637 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:44,637 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:06:44,638 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1641872250] [2019-11-15 23:06:44,638 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:06:44,638 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:44,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:06:44,640 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:06:44,640 INFO L87 Difference]: Start difference. First operand 1346 states and 3201 transitions. Second operand 5 states. [2019-11-15 23:06:44,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:44,761 INFO L93 Difference]: Finished difference Result 1611 states and 3738 transitions. [2019-11-15 23:06:44,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:06:44,761 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-11-15 23:06:44,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:44,763 INFO L225 Difference]: With dead ends: 1611 [2019-11-15 23:06:44,763 INFO L226 Difference]: Without dead ends: 1593 [2019-11-15 23:06:44,763 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:06:44,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1593 states. [2019-11-15 23:06:44,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1593 to 1363. [2019-11-15 23:06:44,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1363 states. [2019-11-15 23:06:44,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1363 states to 1363 states and 3235 transitions. [2019-11-15 23:06:44,784 INFO L78 Accepts]: Start accepts. Automaton has 1363 states and 3235 transitions. Word has length 95 [2019-11-15 23:06:44,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:44,784 INFO L462 AbstractCegarLoop]: Abstraction has 1363 states and 3235 transitions. [2019-11-15 23:06:44,784 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:06:44,784 INFO L276 IsEmpty]: Start isEmpty. Operand 1363 states and 3235 transitions. [2019-11-15 23:06:44,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:06:44,786 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:44,787 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:44,787 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:44,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:44,787 INFO L82 PathProgramCache]: Analyzing trace with hash -1843434049, now seen corresponding path program 1 times [2019-11-15 23:06:44,788 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:44,788 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1906584857] [2019-11-15 23:06:44,788 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:44,788 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:44,789 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:44,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:44,882 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:44,882 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1906584857] [2019-11-15 23:06:44,882 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:44,882 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:06:44,882 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1278336302] [2019-11-15 23:06:44,883 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:06:44,883 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:44,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:06:44,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:06:44,884 INFO L87 Difference]: Start difference. First operand 1363 states and 3235 transitions. Second operand 6 states. [2019-11-15 23:06:45,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:45,089 INFO L93 Difference]: Finished difference Result 1535 states and 3584 transitions. [2019-11-15 23:06:45,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 23:06:45,089 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 23:06:45,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:45,091 INFO L225 Difference]: With dead ends: 1535 [2019-11-15 23:06:45,091 INFO L226 Difference]: Without dead ends: 1535 [2019-11-15 23:06:45,091 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:06:45,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1535 states. [2019-11-15 23:06:45,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1535 to 1347. [2019-11-15 23:06:45,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1347 states. [2019-11-15 23:06:45,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1347 states to 1347 states and 3203 transitions. [2019-11-15 23:06:45,106 INFO L78 Accepts]: Start accepts. Automaton has 1347 states and 3203 transitions. Word has length 95 [2019-11-15 23:06:45,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:45,107 INFO L462 AbstractCegarLoop]: Abstraction has 1347 states and 3203 transitions. [2019-11-15 23:06:45,107 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:06:45,107 INFO L276 IsEmpty]: Start isEmpty. Operand 1347 states and 3203 transitions. [2019-11-15 23:06:45,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:06:45,109 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:45,109 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:45,109 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:45,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:45,109 INFO L82 PathProgramCache]: Analyzing trace with hash -869858112, now seen corresponding path program 2 times [2019-11-15 23:06:45,110 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:45,110 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1701554563] [2019-11-15 23:06:45,110 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:45,110 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:45,110 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:45,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:06:45,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:06:45,317 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1701554563] [2019-11-15 23:06:45,317 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:06:45,318 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-15 23:06:45,318 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [300030884] [2019-11-15 23:06:45,318 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-15 23:06:45,319 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:06:45,319 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-15 23:06:45,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2019-11-15 23:06:45,319 INFO L87 Difference]: Start difference. First operand 1347 states and 3203 transitions. Second operand 12 states. [2019-11-15 23:06:45,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:06:45,556 INFO L93 Difference]: Finished difference Result 2516 states and 6061 transitions. [2019-11-15 23:06:45,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-15 23:06:45,556 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 95 [2019-11-15 23:06:45,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:06:45,558 INFO L225 Difference]: With dead ends: 2516 [2019-11-15 23:06:45,558 INFO L226 Difference]: Without dead ends: 1877 [2019-11-15 23:06:45,559 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2019-11-15 23:06:45,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1877 states. [2019-11-15 23:06:45,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1877 to 1765. [2019-11-15 23:06:45,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1765 states. [2019-11-15 23:06:45,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1765 states to 1765 states and 4113 transitions. [2019-11-15 23:06:45,576 INFO L78 Accepts]: Start accepts. Automaton has 1765 states and 4113 transitions. Word has length 95 [2019-11-15 23:06:45,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:06:45,576 INFO L462 AbstractCegarLoop]: Abstraction has 1765 states and 4113 transitions. [2019-11-15 23:06:45,576 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-15 23:06:45,576 INFO L276 IsEmpty]: Start isEmpty. Operand 1765 states and 4113 transitions. [2019-11-15 23:06:45,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:06:45,578 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:06:45,578 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:06:45,578 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:06:45,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:06:45,578 INFO L82 PathProgramCache]: Analyzing trace with hash 1046677052, now seen corresponding path program 3 times [2019-11-15 23:06:45,578 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:06:45,579 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1453320133] [2019-11-15 23:06:45,579 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:45,579 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:06:45,579 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:06:45,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 23:06:45,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 23:06:45,673 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 23:06:45,673 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 23:06:45,820 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 23:06:45,823 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 11:06:45 BasicIcfg [2019-11-15 23:06:45,824 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 23:06:45,825 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 23:06:45,825 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 23:06:45,825 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 23:06:45,826 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 11:05:56" (3/4) ... [2019-11-15 23:06:45,832 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 23:06:46,020 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_492c2041-dc9f-4fa5-8a94-29c133b349f2/bin/uautomizer/witness.graphml [2019-11-15 23:06:46,021 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 23:06:46,024 INFO L168 Benchmark]: Toolchain (without parser) took 52021.48 ms. Allocated memory was 1.0 GB in the beginning and 4.6 GB in the end (delta: 3.6 GB). Free memory was 940.8 MB in the beginning and 2.8 GB in the end (delta: -1.8 GB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. [2019-11-15 23:06:46,024 INFO L168 Benchmark]: CDTParser took 0.66 ms. Allocated memory is still 1.0 GB. Free memory is still 967.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 23:06:46,025 INFO L168 Benchmark]: CACSL2BoogieTranslator took 936.78 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 126.4 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -151.9 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-11-15 23:06:46,027 INFO L168 Benchmark]: Boogie Procedure Inliner took 96.52 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-11-15 23:06:46,028 INFO L168 Benchmark]: Boogie Preprocessor took 51.58 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 23:06:46,028 INFO L168 Benchmark]: RCFGBuilder took 979.81 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.2 MB). Peak memory consumption was 49.2 MB. Max. memory is 11.5 GB. [2019-11-15 23:06:46,028 INFO L168 Benchmark]: TraceAbstraction took 49755.78 ms. Allocated memory was 1.2 GB in the beginning and 4.6 GB in the end (delta: 3.5 GB). Free memory was 1.0 GB in the beginning and 2.8 GB in the end (delta: -1.7 GB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. [2019-11-15 23:06:46,029 INFO L168 Benchmark]: Witness Printer took 196.24 ms. Allocated memory is still 4.6 GB. Free memory was 2.8 GB in the beginning and 2.8 GB in the end (delta: 22.1 MB). Peak memory consumption was 22.1 MB. Max. memory is 11.5 GB. [2019-11-15 23:06:46,031 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.66 ms. Allocated memory is still 1.0 GB. Free memory is still 967.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 936.78 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 126.4 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -151.9 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 96.52 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 51.58 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 979.81 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.2 MB). Peak memory consumption was 49.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 49755.78 ms. Allocated memory was 1.2 GB in the beginning and 4.6 GB in the end (delta: 3.5 GB). Free memory was 1.0 GB in the beginning and 2.8 GB in the end (delta: -1.7 GB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. * Witness Printer took 196.24 ms. Allocated memory is still 4.6 GB. Free memory was 2.8 GB in the beginning and 2.8 GB in the end (delta: 22.1 MB). Peak memory consumption was 22.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L698] 0 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L699] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L700] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L702] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L703] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L704] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L705] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L706] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L707] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L708] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L709] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L710] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L711] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L712] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L713] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L714] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L715] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L716] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L718] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L719] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L720] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L786] 0 pthread_t t1595; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L787] FCALL, FORK 0 pthread_create(&t1595, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L788] 0 pthread_t t1596; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L789] FCALL, FORK 0 pthread_create(&t1596, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L744] 2 x$w_buff1 = x$w_buff0 [L745] 2 x$w_buff0 = 2 [L746] 2 x$w_buff1_used = x$w_buff0_used [L747] 2 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L749] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L750] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L751] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L752] 2 x$r_buff0_thd2 = (_Bool)1 [L755] 2 y = 1 [L758] 2 __unbuffered_p1_EAX = y [L761] 2 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L764] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L724] 1 y = 2 [L727] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L730] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L730] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=2] [L730] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=2] [L730] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L731] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L731] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L732] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L764] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L733] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L733] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L765] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L765] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L766] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L766] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L767] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L767] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L768] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L768] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L771] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L734] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L734] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L737] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L791] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L795] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L795] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L795] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L795] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L796] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L797] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L797] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L798] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L798] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L799] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L799] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L802] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L803] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L804] 0 x$flush_delayed = weak$$choice2 [L805] 0 x$mem_tmp = x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L806] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L806] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L807] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L807] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L808] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L808] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L809] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L809] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L810] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L810] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L811] EXPR 0 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L811] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L812] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L812] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L813] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L814] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L814] 0 x = x$flush_delayed ? x$mem_tmp : x [L815] 0 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 176 locations, 3 error locations. Result: UNSAFE, OverallTime: 49.6s, OverallIterations: 35, TraceHistogramMax: 1, AutomataDifference: 22.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8480 SDtfs, 9140 SDslu, 20763 SDs, 0 SdLazy, 9256 SolverSat, 592 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 388 GetRequests, 100 SyntacticMatches, 24 SemanticMatches, 264 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 516 ImplicationChecksByTransitivity, 3.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=76146occurred in iteration=12, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 20.5s AutomataMinimizationTime, 34 MinimizatonAttempts, 108277 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.8s InterpolantComputationTime, 2758 NumberOfCodeBlocks, 2758 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 2629 ConstructedInterpolants, 0 QuantifiedInterpolants, 515785 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...