./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi001_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_de445ea9-49d6-4054-a6a6-0c37a9b57dbf/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_de445ea9-49d6-4054-a6a6-0c37a9b57dbf/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_de445ea9-49d6-4054-a6a6-0c37a9b57dbf/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_de445ea9-49d6-4054-a6a6-0c37a9b57dbf/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi001_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_de445ea9-49d6-4054-a6a6-0c37a9b57dbf/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_de445ea9-49d6-4054-a6a6-0c37a9b57dbf/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8f46953826e9fad0ebac0c72408ce17d1befe0ec ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-16 00:18:32,600 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-16 00:18:32,602 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-16 00:18:32,617 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-16 00:18:32,618 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-16 00:18:32,619 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-16 00:18:32,621 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-16 00:18:32,631 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-16 00:18:32,636 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-16 00:18:32,640 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-16 00:18:32,642 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-16 00:18:32,644 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-16 00:18:32,644 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-16 00:18:32,646 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-16 00:18:32,647 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-16 00:18:32,648 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-16 00:18:32,649 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-16 00:18:32,650 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-16 00:18:32,653 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-16 00:18:32,657 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-16 00:18:32,661 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-16 00:18:32,663 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-16 00:18:32,666 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-16 00:18:32,667 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-16 00:18:32,671 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-16 00:18:32,671 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-16 00:18:32,671 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-16 00:18:32,675 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-16 00:18:32,675 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-16 00:18:32,676 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-16 00:18:32,676 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-16 00:18:32,677 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-16 00:18:32,678 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-16 00:18:32,678 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-16 00:18:32,680 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-16 00:18:32,680 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-16 00:18:32,681 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-16 00:18:32,681 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-16 00:18:32,682 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-16 00:18:32,682 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-16 00:18:32,683 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-16 00:18:32,684 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_de445ea9-49d6-4054-a6a6-0c37a9b57dbf/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-16 00:18:32,712 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-16 00:18:32,724 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-16 00:18:32,725 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-16 00:18:32,725 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-16 00:18:32,725 INFO L138 SettingsManager]: * Use SBE=true [2019-11-16 00:18:32,726 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-16 00:18:32,726 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-16 00:18:32,726 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-16 00:18:32,727 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-16 00:18:32,727 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-16 00:18:32,727 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-16 00:18:32,727 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-16 00:18:32,728 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-16 00:18:32,728 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-16 00:18:32,728 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-16 00:18:32,729 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-16 00:18:32,729 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-16 00:18:32,729 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-16 00:18:32,729 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-16 00:18:32,730 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-16 00:18:32,730 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-16 00:18:32,730 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-16 00:18:32,731 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-16 00:18:32,732 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-16 00:18:32,732 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-16 00:18:32,733 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-16 00:18:32,733 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-16 00:18:32,733 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-16 00:18:32,733 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_de445ea9-49d6-4054-a6a6-0c37a9b57dbf/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8f46953826e9fad0ebac0c72408ce17d1befe0ec [2019-11-16 00:18:32,771 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-16 00:18:32,781 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-16 00:18:32,784 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-16 00:18:32,785 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-16 00:18:32,786 INFO L275 PluginConnector]: CDTParser initialized [2019-11-16 00:18:32,786 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_de445ea9-49d6-4054-a6a6-0c37a9b57dbf/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/rfi001_power.opt.i [2019-11-16 00:18:32,848 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_de445ea9-49d6-4054-a6a6-0c37a9b57dbf/bin/uautomizer/data/cfc02c9b4/6b15b65fdf99499cb2ce717959e7f1ac/FLAG1cd475094 [2019-11-16 00:18:33,416 INFO L306 CDTParser]: Found 1 translation units. [2019-11-16 00:18:33,417 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_de445ea9-49d6-4054-a6a6-0c37a9b57dbf/sv-benchmarks/c/pthread-wmm/rfi001_power.opt.i [2019-11-16 00:18:33,436 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_de445ea9-49d6-4054-a6a6-0c37a9b57dbf/bin/uautomizer/data/cfc02c9b4/6b15b65fdf99499cb2ce717959e7f1ac/FLAG1cd475094 [2019-11-16 00:18:33,731 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_de445ea9-49d6-4054-a6a6-0c37a9b57dbf/bin/uautomizer/data/cfc02c9b4/6b15b65fdf99499cb2ce717959e7f1ac [2019-11-16 00:18:33,734 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-16 00:18:33,734 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-16 00:18:33,735 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-16 00:18:33,736 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-16 00:18:33,739 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-16 00:18:33,740 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:18:33" (1/1) ... [2019-11-16 00:18:33,743 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7be40f23 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:18:33, skipping insertion in model container [2019-11-16 00:18:33,743 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:18:33" (1/1) ... [2019-11-16 00:18:33,750 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-16 00:18:33,811 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-16 00:18:34,270 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-16 00:18:34,283 INFO L188 MainTranslator]: Completed pre-run [2019-11-16 00:18:34,344 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-16 00:18:34,427 INFO L192 MainTranslator]: Completed translation [2019-11-16 00:18:34,428 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:18:34 WrapperNode [2019-11-16 00:18:34,428 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-16 00:18:34,429 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-16 00:18:34,429 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-16 00:18:34,430 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-16 00:18:34,439 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:18:34" (1/1) ... [2019-11-16 00:18:34,459 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:18:34" (1/1) ... [2019-11-16 00:18:34,498 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-16 00:18:34,499 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-16 00:18:34,499 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-16 00:18:34,499 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-16 00:18:34,515 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:18:34" (1/1) ... [2019-11-16 00:18:34,515 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:18:34" (1/1) ... [2019-11-16 00:18:34,525 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:18:34" (1/1) ... [2019-11-16 00:18:34,526 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:18:34" (1/1) ... [2019-11-16 00:18:34,538 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:18:34" (1/1) ... [2019-11-16 00:18:34,544 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:18:34" (1/1) ... [2019-11-16 00:18:34,562 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:18:34" (1/1) ... [2019-11-16 00:18:34,574 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-16 00:18:34,576 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-16 00:18:34,576 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-16 00:18:34,576 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-16 00:18:34,577 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:18:34" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_de445ea9-49d6-4054-a6a6-0c37a9b57dbf/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-16 00:18:34,652 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-16 00:18:34,652 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-16 00:18:34,652 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-16 00:18:34,653 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-16 00:18:34,653 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-16 00:18:34,653 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-16 00:18:34,653 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-16 00:18:34,653 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-16 00:18:34,654 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-16 00:18:34,654 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-16 00:18:34,654 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-16 00:18:34,656 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-16 00:18:35,472 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-16 00:18:35,472 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-16 00:18:35,474 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:18:35 BoogieIcfgContainer [2019-11-16 00:18:35,474 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-16 00:18:35,475 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-16 00:18:35,475 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-16 00:18:35,478 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-16 00:18:35,478 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.11 12:18:33" (1/3) ... [2019-11-16 00:18:35,479 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5a34b5ea and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:18:35, skipping insertion in model container [2019-11-16 00:18:35,479 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:18:34" (2/3) ... [2019-11-16 00:18:35,480 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5a34b5ea and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:18:35, skipping insertion in model container [2019-11-16 00:18:35,480 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:18:35" (3/3) ... [2019-11-16 00:18:35,482 INFO L109 eAbstractionObserver]: Analyzing ICFG rfi001_power.opt.i [2019-11-16 00:18:35,518 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,518 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,518 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,518 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,519 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,519 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,519 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,519 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,519 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,519 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,520 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,520 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,520 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,520 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,521 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,521 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,521 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,521 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,521 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,521 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,522 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,522 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,522 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,522 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,523 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,523 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,523 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,523 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,523 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,523 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,524 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,524 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,524 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,525 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,525 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,525 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,525 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,525 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,526 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,526 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,526 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,526 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,527 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,527 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,527 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,527 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,528 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,528 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,528 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,528 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,528 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,529 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,529 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,529 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,529 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,529 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,530 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,530 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,530 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,530 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,530 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,531 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,531 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,531 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:18:35,537 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-16 00:18:35,537 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-16 00:18:35,545 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-16 00:18:35,553 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-16 00:18:35,572 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-16 00:18:35,572 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-16 00:18:35,573 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-16 00:18:35,573 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-16 00:18:35,573 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-16 00:18:35,573 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-16 00:18:35,573 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-16 00:18:35,573 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-16 00:18:35,586 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 141 places, 179 transitions [2019-11-16 00:18:37,350 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22495 states. [2019-11-16 00:18:37,353 INFO L276 IsEmpty]: Start isEmpty. Operand 22495 states. [2019-11-16 00:18:37,370 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-11-16 00:18:37,371 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:18:37,372 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:18:37,376 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:18:37,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:18:37,382 INFO L82 PathProgramCache]: Analyzing trace with hash -697756791, now seen corresponding path program 1 times [2019-11-16 00:18:37,391 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:18:37,391 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1058906588] [2019-11-16 00:18:37,392 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:37,392 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:37,392 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:18:37,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:18:37,781 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:18:37,784 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1058906588] [2019-11-16 00:18:37,785 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:18:37,786 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-16 00:18:37,786 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1819581943] [2019-11-16 00:18:37,791 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-16 00:18:37,792 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:18:37,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-16 00:18:37,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:18:37,812 INFO L87 Difference]: Start difference. First operand 22495 states. Second operand 4 states. [2019-11-16 00:18:38,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:18:38,580 INFO L93 Difference]: Finished difference Result 23447 states and 91748 transitions. [2019-11-16 00:18:38,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-16 00:18:38,581 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2019-11-16 00:18:38,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:18:38,860 INFO L225 Difference]: With dead ends: 23447 [2019-11-16 00:18:38,860 INFO L226 Difference]: Without dead ends: 21271 [2019-11-16 00:18:38,862 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:18:39,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21271 states. [2019-11-16 00:18:40,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21271 to 21271. [2019-11-16 00:18:40,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21271 states. [2019-11-16 00:18:40,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21271 states to 21271 states and 83772 transitions. [2019-11-16 00:18:40,256 INFO L78 Accepts]: Start accepts. Automaton has 21271 states and 83772 transitions. Word has length 38 [2019-11-16 00:18:40,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:18:40,257 INFO L462 AbstractCegarLoop]: Abstraction has 21271 states and 83772 transitions. [2019-11-16 00:18:40,257 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-16 00:18:40,257 INFO L276 IsEmpty]: Start isEmpty. Operand 21271 states and 83772 transitions. [2019-11-16 00:18:40,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-16 00:18:40,268 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:18:40,268 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:18:40,268 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:18:40,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:18:40,269 INFO L82 PathProgramCache]: Analyzing trace with hash 298957026, now seen corresponding path program 1 times [2019-11-16 00:18:40,270 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:18:40,270 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1178095347] [2019-11-16 00:18:40,270 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:40,270 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:40,270 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:18:40,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:18:40,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:18:40,434 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1178095347] [2019-11-16 00:18:40,434 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:18:40,434 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:18:40,434 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1378894763] [2019-11-16 00:18:40,436 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:18:40,436 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:18:40,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:18:40,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:18:40,437 INFO L87 Difference]: Start difference. First operand 21271 states and 83772 transitions. Second operand 5 states. [2019-11-16 00:18:41,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:18:41,709 INFO L93 Difference]: Finished difference Result 34705 states and 129064 transitions. [2019-11-16 00:18:41,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:18:41,710 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-11-16 00:18:41,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:18:41,887 INFO L225 Difference]: With dead ends: 34705 [2019-11-16 00:18:41,887 INFO L226 Difference]: Without dead ends: 34561 [2019-11-16 00:18:41,888 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:18:42,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34561 states. [2019-11-16 00:18:43,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34561 to 33061. [2019-11-16 00:18:43,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33061 states. [2019-11-16 00:18:43,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33061 states to 33061 states and 123952 transitions. [2019-11-16 00:18:43,398 INFO L78 Accepts]: Start accepts. Automaton has 33061 states and 123952 transitions. Word has length 45 [2019-11-16 00:18:43,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:18:43,400 INFO L462 AbstractCegarLoop]: Abstraction has 33061 states and 123952 transitions. [2019-11-16 00:18:43,400 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:18:43,401 INFO L276 IsEmpty]: Start isEmpty. Operand 33061 states and 123952 transitions. [2019-11-16 00:18:43,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-11-16 00:18:43,407 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:18:43,408 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:18:43,408 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:18:43,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:18:43,409 INFO L82 PathProgramCache]: Analyzing trace with hash 528900453, now seen corresponding path program 1 times [2019-11-16 00:18:43,409 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:18:43,409 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1445086722] [2019-11-16 00:18:43,410 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:43,410 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:43,410 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:18:43,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:18:43,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:18:43,550 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1445086722] [2019-11-16 00:18:43,550 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:18:43,550 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:18:43,550 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [362978178] [2019-11-16 00:18:43,551 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:18:43,551 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:18:43,551 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:18:43,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:18:43,552 INFO L87 Difference]: Start difference. First operand 33061 states and 123952 transitions. Second operand 5 states. [2019-11-16 00:18:44,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:18:44,317 INFO L93 Difference]: Finished difference Result 40213 states and 148621 transitions. [2019-11-16 00:18:44,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:18:44,318 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2019-11-16 00:18:44,319 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:18:45,008 INFO L225 Difference]: With dead ends: 40213 [2019-11-16 00:18:45,008 INFO L226 Difference]: Without dead ends: 40053 [2019-11-16 00:18:45,009 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:18:45,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40053 states. [2019-11-16 00:18:46,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40053 to 34634. [2019-11-16 00:18:46,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34634 states. [2019-11-16 00:18:46,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34634 states to 34634 states and 129248 transitions. [2019-11-16 00:18:46,250 INFO L78 Accepts]: Start accepts. Automaton has 34634 states and 129248 transitions. Word has length 46 [2019-11-16 00:18:46,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:18:46,250 INFO L462 AbstractCegarLoop]: Abstraction has 34634 states and 129248 transitions. [2019-11-16 00:18:46,251 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:18:46,251 INFO L276 IsEmpty]: Start isEmpty. Operand 34634 states and 129248 transitions. [2019-11-16 00:18:46,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-16 00:18:46,266 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:18:46,266 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:18:46,267 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:18:46,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:18:46,267 INFO L82 PathProgramCache]: Analyzing trace with hash 440704446, now seen corresponding path program 1 times [2019-11-16 00:18:46,268 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:18:46,268 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [118400642] [2019-11-16 00:18:46,268 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:46,268 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:46,269 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:18:46,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:18:46,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:18:46,394 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [118400642] [2019-11-16 00:18:46,394 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:18:46,394 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:18:46,394 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1038928055] [2019-11-16 00:18:46,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:18:46,395 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:18:46,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:18:46,395 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:18:46,396 INFO L87 Difference]: Start difference. First operand 34634 states and 129248 transitions. Second operand 6 states. [2019-11-16 00:18:47,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:18:47,986 INFO L93 Difference]: Finished difference Result 45662 states and 166142 transitions. [2019-11-16 00:18:47,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-16 00:18:47,986 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-11-16 00:18:47,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:18:48,126 INFO L225 Difference]: With dead ends: 45662 [2019-11-16 00:18:48,126 INFO L226 Difference]: Without dead ends: 45518 [2019-11-16 00:18:48,127 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-16 00:18:48,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45518 states. [2019-11-16 00:18:49,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45518 to 33597. [2019-11-16 00:18:49,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33597 states. [2019-11-16 00:18:49,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33597 states to 33597 states and 125403 transitions. [2019-11-16 00:18:49,124 INFO L78 Accepts]: Start accepts. Automaton has 33597 states and 125403 transitions. Word has length 53 [2019-11-16 00:18:49,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:18:49,124 INFO L462 AbstractCegarLoop]: Abstraction has 33597 states and 125403 transitions. [2019-11-16 00:18:49,124 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:18:49,124 INFO L276 IsEmpty]: Start isEmpty. Operand 33597 states and 125403 transitions. [2019-11-16 00:18:49,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-16 00:18:49,159 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:18:49,160 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:18:49,160 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:18:49,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:18:49,161 INFO L82 PathProgramCache]: Analyzing trace with hash -2021901069, now seen corresponding path program 1 times [2019-11-16 00:18:49,161 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:18:49,161 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1056215734] [2019-11-16 00:18:49,161 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:49,162 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:49,162 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:18:49,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:18:49,243 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:18:49,244 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1056215734] [2019-11-16 00:18:49,244 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:18:49,245 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:18:49,245 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1815916887] [2019-11-16 00:18:49,245 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:18:49,246 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:18:49,246 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:18:49,246 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:18:49,247 INFO L87 Difference]: Start difference. First operand 33597 states and 125403 transitions. Second operand 6 states. [2019-11-16 00:18:49,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:18:49,939 INFO L93 Difference]: Finished difference Result 46069 states and 167836 transitions. [2019-11-16 00:18:49,939 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-16 00:18:49,940 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-11-16 00:18:49,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:18:50,055 INFO L225 Difference]: With dead ends: 46069 [2019-11-16 00:18:50,055 INFO L226 Difference]: Without dead ends: 45829 [2019-11-16 00:18:50,055 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-16 00:18:50,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45829 states. [2019-11-16 00:18:51,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45829 to 39958. [2019-11-16 00:18:51,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39958 states. [2019-11-16 00:18:51,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39958 states to 39958 states and 147327 transitions. [2019-11-16 00:18:51,444 INFO L78 Accepts]: Start accepts. Automaton has 39958 states and 147327 transitions. Word has length 60 [2019-11-16 00:18:51,444 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:18:51,445 INFO L462 AbstractCegarLoop]: Abstraction has 39958 states and 147327 transitions. [2019-11-16 00:18:51,445 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:18:51,445 INFO L276 IsEmpty]: Start isEmpty. Operand 39958 states and 147327 transitions. [2019-11-16 00:18:51,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-11-16 00:18:51,481 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:18:51,481 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:18:51,481 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:18:51,481 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:18:51,482 INFO L82 PathProgramCache]: Analyzing trace with hash -481942333, now seen corresponding path program 1 times [2019-11-16 00:18:51,482 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:18:51,482 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [333881147] [2019-11-16 00:18:51,482 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:51,483 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:51,483 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:18:51,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:18:51,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:18:51,531 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [333881147] [2019-11-16 00:18:51,531 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:18:51,531 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-16 00:18:51,531 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [756333062] [2019-11-16 00:18:51,532 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-16 00:18:51,532 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:18:51,532 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-16 00:18:51,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:18:51,533 INFO L87 Difference]: Start difference. First operand 39958 states and 147327 transitions. Second operand 3 states. [2019-11-16 00:18:51,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:18:51,765 INFO L93 Difference]: Finished difference Result 50256 states and 182162 transitions. [2019-11-16 00:18:51,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-16 00:18:51,766 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 62 [2019-11-16 00:18:51,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:18:51,876 INFO L225 Difference]: With dead ends: 50256 [2019-11-16 00:18:51,876 INFO L226 Difference]: Without dead ends: 50256 [2019-11-16 00:18:51,876 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:18:52,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50256 states. [2019-11-16 00:18:53,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50256 to 43888. [2019-11-16 00:18:53,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43888 states. [2019-11-16 00:18:53,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43888 states to 43888 states and 160765 transitions. [2019-11-16 00:18:53,187 INFO L78 Accepts]: Start accepts. Automaton has 43888 states and 160765 transitions. Word has length 62 [2019-11-16 00:18:53,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:18:53,187 INFO L462 AbstractCegarLoop]: Abstraction has 43888 states and 160765 transitions. [2019-11-16 00:18:53,188 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-16 00:18:53,188 INFO L276 IsEmpty]: Start isEmpty. Operand 43888 states and 160765 transitions. [2019-11-16 00:18:53,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-16 00:18:53,225 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:18:53,225 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:18:53,225 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:18:53,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:18:53,226 INFO L82 PathProgramCache]: Analyzing trace with hash 1024024957, now seen corresponding path program 1 times [2019-11-16 00:18:53,226 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:18:53,226 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1480453437] [2019-11-16 00:18:53,226 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:53,226 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:53,226 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:18:53,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:18:53,327 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:18:53,327 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1480453437] [2019-11-16 00:18:53,328 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:18:53,328 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:18:53,328 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1980308724] [2019-11-16 00:18:53,329 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:18:53,329 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:18:53,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:18:53,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:18:53,330 INFO L87 Difference]: Start difference. First operand 43888 states and 160765 transitions. Second operand 7 states. [2019-11-16 00:18:54,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:18:54,443 INFO L93 Difference]: Finished difference Result 55884 states and 200499 transitions. [2019-11-16 00:18:54,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-16 00:18:54,443 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-11-16 00:18:54,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:18:54,575 INFO L225 Difference]: With dead ends: 55884 [2019-11-16 00:18:54,575 INFO L226 Difference]: Without dead ends: 55644 [2019-11-16 00:18:54,576 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-16 00:18:54,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55644 states. [2019-11-16 00:18:55,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55644 to 45114. [2019-11-16 00:18:55,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45114 states. [2019-11-16 00:18:55,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45114 states to 45114 states and 164932 transitions. [2019-11-16 00:18:55,548 INFO L78 Accepts]: Start accepts. Automaton has 45114 states and 164932 transitions. Word has length 66 [2019-11-16 00:18:55,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:18:55,548 INFO L462 AbstractCegarLoop]: Abstraction has 45114 states and 164932 transitions. [2019-11-16 00:18:55,548 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:18:55,548 INFO L276 IsEmpty]: Start isEmpty. Operand 45114 states and 164932 transitions. [2019-11-16 00:18:55,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-11-16 00:18:55,590 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:18:55,590 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:18:55,590 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:18:55,591 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:18:55,591 INFO L82 PathProgramCache]: Analyzing trace with hash -2014746228, now seen corresponding path program 1 times [2019-11-16 00:18:55,591 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:18:55,591 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1339354390] [2019-11-16 00:18:55,592 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:55,592 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:55,592 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:18:55,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:18:55,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:18:55,713 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1339354390] [2019-11-16 00:18:55,714 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:18:55,714 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:18:55,714 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1764779263] [2019-11-16 00:18:55,715 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:18:55,715 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:18:55,715 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:18:55,715 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:18:55,716 INFO L87 Difference]: Start difference. First operand 45114 states and 164932 transitions. Second operand 7 states. [2019-11-16 00:18:57,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:18:57,099 INFO L93 Difference]: Finished difference Result 55098 states and 197676 transitions. [2019-11-16 00:18:57,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-16 00:18:57,100 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-11-16 00:18:57,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:18:57,226 INFO L225 Difference]: With dead ends: 55098 [2019-11-16 00:18:57,226 INFO L226 Difference]: Without dead ends: 54898 [2019-11-16 00:18:57,227 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-16 00:18:57,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54898 states. [2019-11-16 00:18:58,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54898 to 45992. [2019-11-16 00:18:58,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45992 states. [2019-11-16 00:18:58,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45992 states to 45992 states and 167803 transitions. [2019-11-16 00:18:58,219 INFO L78 Accepts]: Start accepts. Automaton has 45992 states and 167803 transitions. Word has length 67 [2019-11-16 00:18:58,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:18:58,220 INFO L462 AbstractCegarLoop]: Abstraction has 45992 states and 167803 transitions. [2019-11-16 00:18:58,220 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:18:58,220 INFO L276 IsEmpty]: Start isEmpty. Operand 45992 states and 167803 transitions. [2019-11-16 00:18:58,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-16 00:18:58,257 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:18:58,257 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:18:58,257 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:18:58,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:18:58,258 INFO L82 PathProgramCache]: Analyzing trace with hash 883100043, now seen corresponding path program 1 times [2019-11-16 00:18:58,258 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:18:58,258 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1382629117] [2019-11-16 00:18:58,259 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:58,259 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:18:58,259 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:18:58,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:18:58,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:18:58,328 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1382629117] [2019-11-16 00:18:58,328 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:18:58,329 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-16 00:18:58,329 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [154452968] [2019-11-16 00:18:58,329 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-16 00:18:58,330 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:18:58,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-16 00:18:58,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:18:58,330 INFO L87 Difference]: Start difference. First operand 45992 states and 167803 transitions. Second operand 3 states. [2019-11-16 00:18:58,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:18:58,859 INFO L93 Difference]: Finished difference Result 61486 states and 224137 transitions. [2019-11-16 00:18:58,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-16 00:18:58,860 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-11-16 00:18:58,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:18:59,008 INFO L225 Difference]: With dead ends: 61486 [2019-11-16 00:18:59,008 INFO L226 Difference]: Without dead ends: 61486 [2019-11-16 00:18:59,008 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:18:59,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61486 states. [2019-11-16 00:19:00,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61486 to 53433. [2019-11-16 00:19:00,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53433 states. [2019-11-16 00:19:00,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53433 states to 53433 states and 195616 transitions. [2019-11-16 00:19:00,755 INFO L78 Accepts]: Start accepts. Automaton has 53433 states and 195616 transitions. Word has length 69 [2019-11-16 00:19:00,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:00,756 INFO L462 AbstractCegarLoop]: Abstraction has 53433 states and 195616 transitions. [2019-11-16 00:19:00,756 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-16 00:19:00,756 INFO L276 IsEmpty]: Start isEmpty. Operand 53433 states and 195616 transitions. [2019-11-16 00:19:00,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-16 00:19:00,807 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:00,807 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:00,807 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:00,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:00,808 INFO L82 PathProgramCache]: Analyzing trace with hash -1887210997, now seen corresponding path program 1 times [2019-11-16 00:19:00,808 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:00,808 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1721560472] [2019-11-16 00:19:00,808 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:00,809 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:00,809 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:00,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:00,977 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:00,978 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1721560472] [2019-11-16 00:19:00,979 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:00,979 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:19:00,979 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1500607529] [2019-11-16 00:19:00,980 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:19:00,980 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:00,981 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:19:00,981 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:19:00,981 INFO L87 Difference]: Start difference. First operand 53433 states and 195616 transitions. Second operand 6 states. [2019-11-16 00:19:01,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:01,779 INFO L93 Difference]: Finished difference Result 65982 states and 238830 transitions. [2019-11-16 00:19:01,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:19:01,780 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 69 [2019-11-16 00:19:01,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:01,935 INFO L225 Difference]: With dead ends: 65982 [2019-11-16 00:19:01,935 INFO L226 Difference]: Without dead ends: 65338 [2019-11-16 00:19:01,936 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:19:02,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65338 states. [2019-11-16 00:19:02,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65338 to 56042. [2019-11-16 00:19:02,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56042 states. [2019-11-16 00:19:03,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56042 states to 56042 states and 204333 transitions. [2019-11-16 00:19:03,145 INFO L78 Accepts]: Start accepts. Automaton has 56042 states and 204333 transitions. Word has length 69 [2019-11-16 00:19:03,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:03,146 INFO L462 AbstractCegarLoop]: Abstraction has 56042 states and 204333 transitions. [2019-11-16 00:19:03,146 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:19:03,146 INFO L276 IsEmpty]: Start isEmpty. Operand 56042 states and 204333 transitions. [2019-11-16 00:19:03,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-16 00:19:03,208 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:03,208 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:03,208 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:03,209 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:03,209 INFO L82 PathProgramCache]: Analyzing trace with hash -925596980, now seen corresponding path program 1 times [2019-11-16 00:19:03,209 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:03,209 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [441793563] [2019-11-16 00:19:03,210 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:03,210 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:03,210 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:03,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:03,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:03,346 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [441793563] [2019-11-16 00:19:03,346 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:03,346 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:19:03,346 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1798248098] [2019-11-16 00:19:03,347 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:19:03,347 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:03,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:19:03,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:19:03,347 INFO L87 Difference]: Start difference. First operand 56042 states and 204333 transitions. Second operand 7 states. [2019-11-16 00:19:04,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:04,516 INFO L93 Difference]: Finished difference Result 83030 states and 292761 transitions. [2019-11-16 00:19:04,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-16 00:19:04,516 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 69 [2019-11-16 00:19:04,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:04,722 INFO L225 Difference]: With dead ends: 83030 [2019-11-16 00:19:04,722 INFO L226 Difference]: Without dead ends: 83030 [2019-11-16 00:19:04,723 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-16 00:19:05,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83030 states. [2019-11-16 00:19:06,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83030 to 76079. [2019-11-16 00:19:06,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76079 states. [2019-11-16 00:19:06,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76079 states to 76079 states and 270628 transitions. [2019-11-16 00:19:06,924 INFO L78 Accepts]: Start accepts. Automaton has 76079 states and 270628 transitions. Word has length 69 [2019-11-16 00:19:06,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:06,925 INFO L462 AbstractCegarLoop]: Abstraction has 76079 states and 270628 transitions. [2019-11-16 00:19:06,925 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:19:06,925 INFO L276 IsEmpty]: Start isEmpty. Operand 76079 states and 270628 transitions. [2019-11-16 00:19:06,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-16 00:19:06,990 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:06,990 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:06,990 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:06,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:06,991 INFO L82 PathProgramCache]: Analyzing trace with hash 319167501, now seen corresponding path program 1 times [2019-11-16 00:19:06,991 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:06,991 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [59147496] [2019-11-16 00:19:06,991 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:06,991 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:06,991 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:07,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:07,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:07,057 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [59147496] [2019-11-16 00:19:07,057 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:07,058 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-16 00:19:07,058 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [477983216] [2019-11-16 00:19:07,059 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-16 00:19:07,059 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:07,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-16 00:19:07,060 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:19:07,060 INFO L87 Difference]: Start difference. First operand 76079 states and 270628 transitions. Second operand 3 states. [2019-11-16 00:19:07,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:07,435 INFO L93 Difference]: Finished difference Result 54415 states and 197409 transitions. [2019-11-16 00:19:07,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-16 00:19:07,436 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-11-16 00:19:07,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:07,568 INFO L225 Difference]: With dead ends: 54415 [2019-11-16 00:19:07,568 INFO L226 Difference]: Without dead ends: 54253 [2019-11-16 00:19:07,568 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:19:07,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54253 states. [2019-11-16 00:19:08,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54253 to 54213. [2019-11-16 00:19:08,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54213 states. [2019-11-16 00:19:08,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54213 states to 54213 states and 196824 transitions. [2019-11-16 00:19:08,646 INFO L78 Accepts]: Start accepts. Automaton has 54213 states and 196824 transitions. Word has length 69 [2019-11-16 00:19:08,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:08,647 INFO L462 AbstractCegarLoop]: Abstraction has 54213 states and 196824 transitions. [2019-11-16 00:19:08,647 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-16 00:19:08,647 INFO L276 IsEmpty]: Start isEmpty. Operand 54213 states and 196824 transitions. [2019-11-16 00:19:08,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-16 00:19:08,690 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:08,690 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:08,690 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:08,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:08,690 INFO L82 PathProgramCache]: Analyzing trace with hash 871106303, now seen corresponding path program 1 times [2019-11-16 00:19:08,691 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:08,691 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [573719264] [2019-11-16 00:19:08,691 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:08,691 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:08,691 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:08,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:08,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:08,802 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [573719264] [2019-11-16 00:19:08,803 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:08,803 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:19:08,803 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [576038987] [2019-11-16 00:19:08,804 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:19:08,804 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:08,804 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:19:08,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:19:08,804 INFO L87 Difference]: Start difference. First operand 54213 states and 196824 transitions. Second operand 5 states. [2019-11-16 00:19:09,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:09,523 INFO L93 Difference]: Finished difference Result 84428 states and 303656 transitions. [2019-11-16 00:19:09,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-16 00:19:09,523 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2019-11-16 00:19:09,524 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:09,723 INFO L225 Difference]: With dead ends: 84428 [2019-11-16 00:19:09,723 INFO L226 Difference]: Without dead ends: 84232 [2019-11-16 00:19:09,724 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:19:10,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84232 states. [2019-11-16 00:19:11,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84232 to 76147. [2019-11-16 00:19:11,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76147 states. [2019-11-16 00:19:11,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76147 states to 76147 states and 275544 transitions. [2019-11-16 00:19:11,857 INFO L78 Accepts]: Start accepts. Automaton has 76147 states and 275544 transitions. Word has length 70 [2019-11-16 00:19:11,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:11,857 INFO L462 AbstractCegarLoop]: Abstraction has 76147 states and 275544 transitions. [2019-11-16 00:19:11,858 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:19:11,858 INFO L276 IsEmpty]: Start isEmpty. Operand 76147 states and 275544 transitions. [2019-11-16 00:19:11,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-16 00:19:11,921 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:11,921 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:11,921 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:11,921 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:11,921 INFO L82 PathProgramCache]: Analyzing trace with hash 2115870784, now seen corresponding path program 1 times [2019-11-16 00:19:11,921 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:11,922 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1743050373] [2019-11-16 00:19:11,922 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:11,922 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:11,922 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:11,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:12,012 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:12,013 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1743050373] [2019-11-16 00:19:12,013 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:12,013 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-16 00:19:12,014 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1845602268] [2019-11-16 00:19:12,014 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-16 00:19:12,014 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:12,015 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-16 00:19:12,015 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:19:12,015 INFO L87 Difference]: Start difference. First operand 76147 states and 275544 transitions. Second operand 4 states. [2019-11-16 00:19:12,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:12,138 INFO L93 Difference]: Finished difference Result 19615 states and 62265 transitions. [2019-11-16 00:19:12,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-16 00:19:12,143 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 70 [2019-11-16 00:19:12,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:12,187 INFO L225 Difference]: With dead ends: 19615 [2019-11-16 00:19:12,188 INFO L226 Difference]: Without dead ends: 19137 [2019-11-16 00:19:12,189 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:19:12,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19137 states. [2019-11-16 00:19:12,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19137 to 19125. [2019-11-16 00:19:12,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19125 states. [2019-11-16 00:19:12,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19125 states to 19125 states and 60760 transitions. [2019-11-16 00:19:12,573 INFO L78 Accepts]: Start accepts. Automaton has 19125 states and 60760 transitions. Word has length 70 [2019-11-16 00:19:12,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:12,574 INFO L462 AbstractCegarLoop]: Abstraction has 19125 states and 60760 transitions. [2019-11-16 00:19:12,574 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-16 00:19:12,574 INFO L276 IsEmpty]: Start isEmpty. Operand 19125 states and 60760 transitions. [2019-11-16 00:19:12,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-16 00:19:12,598 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:12,598 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:12,598 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:12,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:12,599 INFO L82 PathProgramCache]: Analyzing trace with hash 2121759987, now seen corresponding path program 1 times [2019-11-16 00:19:12,599 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:12,599 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1588758862] [2019-11-16 00:19:12,600 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:12,600 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:12,600 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:12,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:12,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:12,694 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1588758862] [2019-11-16 00:19:12,695 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:12,695 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-16 00:19:12,695 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [415294467] [2019-11-16 00:19:12,696 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-16 00:19:12,696 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:12,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-16 00:19:12,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:19:12,697 INFO L87 Difference]: Start difference. First operand 19125 states and 60760 transitions. Second operand 4 states. [2019-11-16 00:19:12,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:12,937 INFO L93 Difference]: Finished difference Result 24075 states and 75428 transitions. [2019-11-16 00:19:12,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-16 00:19:12,937 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-11-16 00:19:12,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:12,978 INFO L225 Difference]: With dead ends: 24075 [2019-11-16 00:19:12,978 INFO L226 Difference]: Without dead ends: 24075 [2019-11-16 00:19:12,979 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:19:13,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24075 states. [2019-11-16 00:19:13,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24075 to 19965. [2019-11-16 00:19:13,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19965 states. [2019-11-16 00:19:13,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19965 states to 19965 states and 63127 transitions. [2019-11-16 00:19:13,303 INFO L78 Accepts]: Start accepts. Automaton has 19965 states and 63127 transitions. Word has length 79 [2019-11-16 00:19:13,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:13,304 INFO L462 AbstractCegarLoop]: Abstraction has 19965 states and 63127 transitions. [2019-11-16 00:19:13,304 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-16 00:19:13,304 INFO L276 IsEmpty]: Start isEmpty. Operand 19965 states and 63127 transitions. [2019-11-16 00:19:13,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-16 00:19:13,321 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:13,321 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:13,322 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:13,322 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:13,322 INFO L82 PathProgramCache]: Analyzing trace with hash 1867023442, now seen corresponding path program 1 times [2019-11-16 00:19:13,323 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:13,323 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1333758562] [2019-11-16 00:19:13,323 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:13,323 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:13,323 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:13,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:13,438 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:13,439 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1333758562] [2019-11-16 00:19:13,439 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:13,439 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-16 00:19:13,439 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1517841425] [2019-11-16 00:19:13,440 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-16 00:19:13,440 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:13,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-16 00:19:13,440 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:19:13,440 INFO L87 Difference]: Start difference. First operand 19965 states and 63127 transitions. Second operand 8 states. [2019-11-16 00:19:14,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:14,498 INFO L93 Difference]: Finished difference Result 22071 states and 69319 transitions. [2019-11-16 00:19:14,499 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-11-16 00:19:14,499 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 79 [2019-11-16 00:19:14,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:14,534 INFO L225 Difference]: With dead ends: 22071 [2019-11-16 00:19:14,534 INFO L226 Difference]: Without dead ends: 22023 [2019-11-16 00:19:14,534 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=404, Unknown=0, NotChecked=0, Total=506 [2019-11-16 00:19:14,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22023 states. [2019-11-16 00:19:14,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22023 to 19437. [2019-11-16 00:19:14,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19437 states. [2019-11-16 00:19:14,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19437 states to 19437 states and 61629 transitions. [2019-11-16 00:19:14,840 INFO L78 Accepts]: Start accepts. Automaton has 19437 states and 61629 transitions. Word has length 79 [2019-11-16 00:19:14,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:14,841 INFO L462 AbstractCegarLoop]: Abstraction has 19437 states and 61629 transitions. [2019-11-16 00:19:14,841 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-16 00:19:14,841 INFO L276 IsEmpty]: Start isEmpty. Operand 19437 states and 61629 transitions. [2019-11-16 00:19:14,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-16 00:19:14,863 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:14,863 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:14,863 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:14,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:14,864 INFO L82 PathProgramCache]: Analyzing trace with hash -1015310952, now seen corresponding path program 1 times [2019-11-16 00:19:14,864 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:14,864 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1729123586] [2019-11-16 00:19:14,864 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:14,864 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:14,864 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:14,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:14,994 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:14,995 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1729123586] [2019-11-16 00:19:14,995 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:14,995 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-16 00:19:14,996 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [451297124] [2019-11-16 00:19:14,996 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-16 00:19:14,996 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:14,997 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-16 00:19:14,997 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:19:14,997 INFO L87 Difference]: Start difference. First operand 19437 states and 61629 transitions. Second operand 8 states. [2019-11-16 00:19:17,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:17,413 INFO L93 Difference]: Finished difference Result 50431 states and 153647 transitions. [2019-11-16 00:19:17,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-11-16 00:19:17,414 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 82 [2019-11-16 00:19:17,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:17,501 INFO L225 Difference]: With dead ends: 50431 [2019-11-16 00:19:17,501 INFO L226 Difference]: Without dead ends: 49732 [2019-11-16 00:19:17,502 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=153, Invalid=497, Unknown=0, NotChecked=0, Total=650 [2019-11-16 00:19:17,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49732 states. [2019-11-16 00:19:18,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49732 to 29965. [2019-11-16 00:19:18,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29965 states. [2019-11-16 00:19:18,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29965 states to 29965 states and 93559 transitions. [2019-11-16 00:19:18,127 INFO L78 Accepts]: Start accepts. Automaton has 29965 states and 93559 transitions. Word has length 82 [2019-11-16 00:19:18,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:18,128 INFO L462 AbstractCegarLoop]: Abstraction has 29965 states and 93559 transitions. [2019-11-16 00:19:18,128 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-16 00:19:18,128 INFO L276 IsEmpty]: Start isEmpty. Operand 29965 states and 93559 transitions. [2019-11-16 00:19:18,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-16 00:19:18,163 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:18,163 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:18,164 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:18,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:18,164 INFO L82 PathProgramCache]: Analyzing trace with hash -53696935, now seen corresponding path program 1 times [2019-11-16 00:19:18,164 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:18,164 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1171352444] [2019-11-16 00:19:18,165 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:18,165 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:18,165 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:18,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:18,272 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:18,272 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1171352444] [2019-11-16 00:19:18,273 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:18,273 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:19:18,273 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [44831859] [2019-11-16 00:19:18,273 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:19:18,274 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:18,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:19:18,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:19:18,274 INFO L87 Difference]: Start difference. First operand 29965 states and 93559 transitions. Second operand 6 states. [2019-11-16 00:19:19,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:19,124 INFO L93 Difference]: Finished difference Result 31403 states and 97496 transitions. [2019-11-16 00:19:19,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:19:19,125 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-11-16 00:19:19,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:19,195 INFO L225 Difference]: With dead ends: 31403 [2019-11-16 00:19:19,195 INFO L226 Difference]: Without dead ends: 31403 [2019-11-16 00:19:19,196 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:19:19,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31403 states. [2019-11-16 00:19:19,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31403 to 29634. [2019-11-16 00:19:19,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29634 states. [2019-11-16 00:19:19,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29634 states to 29634 states and 92402 transitions. [2019-11-16 00:19:19,786 INFO L78 Accepts]: Start accepts. Automaton has 29634 states and 92402 transitions. Word has length 82 [2019-11-16 00:19:19,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:19,787 INFO L462 AbstractCegarLoop]: Abstraction has 29634 states and 92402 transitions. [2019-11-16 00:19:19,787 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:19:19,787 INFO L276 IsEmpty]: Start isEmpty. Operand 29634 states and 92402 transitions. [2019-11-16 00:19:19,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-16 00:19:19,826 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:19,826 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:19,827 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:19,827 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:19,827 INFO L82 PathProgramCache]: Analyzing trace with hash -1989357222, now seen corresponding path program 1 times [2019-11-16 00:19:19,827 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:19,827 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [830205268] [2019-11-16 00:19:19,827 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:19,828 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:19,828 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:19,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:19,975 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:19,975 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [830205268] [2019-11-16 00:19:19,976 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:19,976 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:19:19,976 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1632601788] [2019-11-16 00:19:19,977 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:19:19,978 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:19,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:19:19,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:19:19,978 INFO L87 Difference]: Start difference. First operand 29634 states and 92402 transitions. Second operand 7 states. [2019-11-16 00:19:20,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:20,692 INFO L93 Difference]: Finished difference Result 31148 states and 96558 transitions. [2019-11-16 00:19:20,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-16 00:19:20,693 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 82 [2019-11-16 00:19:20,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:20,744 INFO L225 Difference]: With dead ends: 31148 [2019-11-16 00:19:20,744 INFO L226 Difference]: Without dead ends: 31148 [2019-11-16 00:19:20,745 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-16 00:19:20,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31148 states. [2019-11-16 00:19:21,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31148 to 29966. [2019-11-16 00:19:21,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29966 states. [2019-11-16 00:19:21,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29966 states to 29966 states and 93233 transitions. [2019-11-16 00:19:21,190 INFO L78 Accepts]: Start accepts. Automaton has 29966 states and 93233 transitions. Word has length 82 [2019-11-16 00:19:21,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:21,190 INFO L462 AbstractCegarLoop]: Abstraction has 29966 states and 93233 transitions. [2019-11-16 00:19:21,190 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:19:21,190 INFO L276 IsEmpty]: Start isEmpty. Operand 29966 states and 93233 transitions. [2019-11-16 00:19:21,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-16 00:19:21,226 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:21,226 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:21,226 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:21,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:21,226 INFO L82 PathProgramCache]: Analyzing trace with hash -1659591461, now seen corresponding path program 1 times [2019-11-16 00:19:21,226 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:21,227 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245992675] [2019-11-16 00:19:21,227 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:21,227 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:21,227 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:21,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:21,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:21,279 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245992675] [2019-11-16 00:19:21,279 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:21,279 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-16 00:19:21,279 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [225095115] [2019-11-16 00:19:21,280 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-16 00:19:21,280 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:21,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-16 00:19:21,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:19:21,280 INFO L87 Difference]: Start difference. First operand 29966 states and 93233 transitions. Second operand 3 states. [2019-11-16 00:19:21,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:21,409 INFO L93 Difference]: Finished difference Result 21487 states and 66270 transitions. [2019-11-16 00:19:21,409 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-16 00:19:21,409 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 82 [2019-11-16 00:19:21,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:21,452 INFO L225 Difference]: With dead ends: 21487 [2019-11-16 00:19:21,452 INFO L226 Difference]: Without dead ends: 21487 [2019-11-16 00:19:21,453 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:19:21,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21487 states. [2019-11-16 00:19:21,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21487 to 21164. [2019-11-16 00:19:21,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21164 states. [2019-11-16 00:19:21,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21164 states to 21164 states and 65321 transitions. [2019-11-16 00:19:21,774 INFO L78 Accepts]: Start accepts. Automaton has 21164 states and 65321 transitions. Word has length 82 [2019-11-16 00:19:21,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:21,774 INFO L462 AbstractCegarLoop]: Abstraction has 21164 states and 65321 transitions. [2019-11-16 00:19:21,774 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-16 00:19:21,775 INFO L276 IsEmpty]: Start isEmpty. Operand 21164 states and 65321 transitions. [2019-11-16 00:19:21,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-16 00:19:21,794 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:21,795 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:21,795 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:21,795 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:21,796 INFO L82 PathProgramCache]: Analyzing trace with hash 502506102, now seen corresponding path program 1 times [2019-11-16 00:19:21,796 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:21,796 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1903789739] [2019-11-16 00:19:21,796 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:21,796 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:21,797 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:21,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:21,889 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:21,889 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1903789739] [2019-11-16 00:19:21,889 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:21,890 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:19:21,890 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [96939989] [2019-11-16 00:19:21,890 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:19:21,891 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:21,891 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:19:21,893 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:19:21,894 INFO L87 Difference]: Start difference. First operand 21164 states and 65321 transitions. Second operand 6 states. [2019-11-16 00:19:22,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:22,315 INFO L93 Difference]: Finished difference Result 37344 states and 115064 transitions. [2019-11-16 00:19:22,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-16 00:19:22,315 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 83 [2019-11-16 00:19:22,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:22,373 INFO L225 Difference]: With dead ends: 37344 [2019-11-16 00:19:22,373 INFO L226 Difference]: Without dead ends: 37344 [2019-11-16 00:19:22,374 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:19:22,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37344 states. [2019-11-16 00:19:22,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37344 to 23234. [2019-11-16 00:19:22,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23234 states. [2019-11-16 00:19:22,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23234 states to 23234 states and 71275 transitions. [2019-11-16 00:19:22,809 INFO L78 Accepts]: Start accepts. Automaton has 23234 states and 71275 transitions. Word has length 83 [2019-11-16 00:19:22,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:22,809 INFO L462 AbstractCegarLoop]: Abstraction has 23234 states and 71275 transitions. [2019-11-16 00:19:22,809 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:19:22,810 INFO L276 IsEmpty]: Start isEmpty. Operand 23234 states and 71275 transitions. [2019-11-16 00:19:22,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-16 00:19:22,831 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:22,832 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:22,832 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:22,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:22,832 INFO L82 PathProgramCache]: Analyzing trace with hash 832271863, now seen corresponding path program 1 times [2019-11-16 00:19:22,833 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:22,833 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [785342679] [2019-11-16 00:19:22,833 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:22,833 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:22,833 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:22,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:22,918 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:22,918 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [785342679] [2019-11-16 00:19:22,918 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:22,919 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:19:22,919 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1258881120] [2019-11-16 00:19:22,919 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:19:22,920 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:22,920 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:19:22,920 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:19:22,920 INFO L87 Difference]: Start difference. First operand 23234 states and 71275 transitions. Second operand 5 states. [2019-11-16 00:19:22,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:22,976 INFO L93 Difference]: Finished difference Result 3104 states and 7662 transitions. [2019-11-16 00:19:22,977 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-16 00:19:22,977 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 83 [2019-11-16 00:19:22,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:22,981 INFO L225 Difference]: With dead ends: 3104 [2019-11-16 00:19:22,981 INFO L226 Difference]: Without dead ends: 2718 [2019-11-16 00:19:22,981 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:19:22,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2718 states. [2019-11-16 00:19:23,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2718 to 2566. [2019-11-16 00:19:23,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2566 states. [2019-11-16 00:19:23,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2566 states to 2566 states and 6342 transitions. [2019-11-16 00:19:23,017 INFO L78 Accepts]: Start accepts. Automaton has 2566 states and 6342 transitions. Word has length 83 [2019-11-16 00:19:23,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:23,017 INFO L462 AbstractCegarLoop]: Abstraction has 2566 states and 6342 transitions. [2019-11-16 00:19:23,017 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:19:23,018 INFO L276 IsEmpty]: Start isEmpty. Operand 2566 states and 6342 transitions. [2019-11-16 00:19:23,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-16 00:19:23,021 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:23,021 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:23,021 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:23,021 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:23,022 INFO L82 PathProgramCache]: Analyzing trace with hash -1029354612, now seen corresponding path program 1 times [2019-11-16 00:19:23,022 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:23,022 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2080364113] [2019-11-16 00:19:23,022 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:23,022 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:23,023 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:23,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:23,103 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:23,106 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2080364113] [2019-11-16 00:19:23,107 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:23,107 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-16 00:19:23,107 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1777812350] [2019-11-16 00:19:23,109 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-16 00:19:23,110 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:23,110 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-16 00:19:23,110 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:19:23,110 INFO L87 Difference]: Start difference. First operand 2566 states and 6342 transitions. Second operand 4 states. [2019-11-16 00:19:23,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:23,290 INFO L93 Difference]: Finished difference Result 2936 states and 7183 transitions. [2019-11-16 00:19:23,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-16 00:19:23,290 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-11-16 00:19:23,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:23,294 INFO L225 Difference]: With dead ends: 2936 [2019-11-16 00:19:23,294 INFO L226 Difference]: Without dead ends: 2936 [2019-11-16 00:19:23,295 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:19:23,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2936 states. [2019-11-16 00:19:23,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2936 to 2660. [2019-11-16 00:19:23,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2660 states. [2019-11-16 00:19:23,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2660 states to 2660 states and 6556 transitions. [2019-11-16 00:19:23,334 INFO L78 Accepts]: Start accepts. Automaton has 2660 states and 6556 transitions. Word has length 96 [2019-11-16 00:19:23,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:23,335 INFO L462 AbstractCegarLoop]: Abstraction has 2660 states and 6556 transitions. [2019-11-16 00:19:23,335 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-16 00:19:23,335 INFO L276 IsEmpty]: Start isEmpty. Operand 2660 states and 6556 transitions. [2019-11-16 00:19:23,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-16 00:19:23,338 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:23,339 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:23,339 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:23,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:23,340 INFO L82 PathProgramCache]: Analyzing trace with hash -1478051251, now seen corresponding path program 1 times [2019-11-16 00:19:23,340 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:23,340 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [894625872] [2019-11-16 00:19:23,340 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:23,341 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:23,341 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:23,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:23,467 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:23,468 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [894625872] [2019-11-16 00:19:23,468 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:23,468 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:19:23,468 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [259003248] [2019-11-16 00:19:23,469 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:19:23,469 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:23,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:19:23,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:19:23,470 INFO L87 Difference]: Start difference. First operand 2660 states and 6556 transitions. Second operand 6 states. [2019-11-16 00:19:23,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:23,609 INFO L93 Difference]: Finished difference Result 2940 states and 7065 transitions. [2019-11-16 00:19:23,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-16 00:19:23,609 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-16 00:19:23,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:23,612 INFO L225 Difference]: With dead ends: 2940 [2019-11-16 00:19:23,612 INFO L226 Difference]: Without dead ends: 2883 [2019-11-16 00:19:23,612 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:19:23,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2883 states. [2019-11-16 00:19:23,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2883 to 2750. [2019-11-16 00:19:23,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2750 states. [2019-11-16 00:19:23,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2750 states to 2750 states and 6692 transitions. [2019-11-16 00:19:23,641 INFO L78 Accepts]: Start accepts. Automaton has 2750 states and 6692 transitions. Word has length 96 [2019-11-16 00:19:23,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:23,641 INFO L462 AbstractCegarLoop]: Abstraction has 2750 states and 6692 transitions. [2019-11-16 00:19:23,642 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:19:23,642 INFO L276 IsEmpty]: Start isEmpty. Operand 2750 states and 6692 transitions. [2019-11-16 00:19:23,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-16 00:19:23,644 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:23,644 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:23,645 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:23,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:23,645 INFO L82 PathProgramCache]: Analyzing trace with hash 1116175566, now seen corresponding path program 1 times [2019-11-16 00:19:23,645 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:23,645 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1869962933] [2019-11-16 00:19:23,646 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:23,646 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:23,646 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:23,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:23,742 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:23,743 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1869962933] [2019-11-16 00:19:23,743 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:23,743 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:19:23,743 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [313876497] [2019-11-16 00:19:23,744 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:19:23,744 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:23,744 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:19:23,744 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:19:23,745 INFO L87 Difference]: Start difference. First operand 2750 states and 6692 transitions. Second operand 6 states. [2019-11-16 00:19:23,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:23,947 INFO L93 Difference]: Finished difference Result 3069 states and 7313 transitions. [2019-11-16 00:19:23,947 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-16 00:19:23,947 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-16 00:19:23,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:23,950 INFO L225 Difference]: With dead ends: 3069 [2019-11-16 00:19:23,950 INFO L226 Difference]: Without dead ends: 3069 [2019-11-16 00:19:23,950 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-16 00:19:23,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3069 states. [2019-11-16 00:19:23,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3069 to 2813. [2019-11-16 00:19:23,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2813 states. [2019-11-16 00:19:23,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2813 states to 2813 states and 6797 transitions. [2019-11-16 00:19:23,979 INFO L78 Accepts]: Start accepts. Automaton has 2813 states and 6797 transitions. Word has length 96 [2019-11-16 00:19:23,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:23,980 INFO L462 AbstractCegarLoop]: Abstraction has 2813 states and 6797 transitions. [2019-11-16 00:19:23,980 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:19:23,980 INFO L276 IsEmpty]: Start isEmpty. Operand 2813 states and 6797 transitions. [2019-11-16 00:19:23,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-16 00:19:23,984 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:23,984 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:23,984 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:23,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:23,985 INFO L82 PathProgramCache]: Analyzing trace with hash -819484721, now seen corresponding path program 1 times [2019-11-16 00:19:23,985 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:23,985 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1341528406] [2019-11-16 00:19:23,985 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:23,985 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:23,986 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:24,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:24,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:24,113 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1341528406] [2019-11-16 00:19:24,114 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:24,114 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:19:24,114 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2065806953] [2019-11-16 00:19:24,115 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:19:24,115 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:24,115 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:19:24,115 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:19:24,116 INFO L87 Difference]: Start difference. First operand 2813 states and 6797 transitions. Second operand 7 states. [2019-11-16 00:19:24,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:24,428 INFO L93 Difference]: Finished difference Result 3223 states and 7620 transitions. [2019-11-16 00:19:24,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:19:24,428 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2019-11-16 00:19:24,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:24,431 INFO L225 Difference]: With dead ends: 3223 [2019-11-16 00:19:24,431 INFO L226 Difference]: Without dead ends: 3223 [2019-11-16 00:19:24,431 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2019-11-16 00:19:24,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3223 states. [2019-11-16 00:19:24,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3223 to 2934. [2019-11-16 00:19:24,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2934 states. [2019-11-16 00:19:24,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2934 states to 2934 states and 7036 transitions. [2019-11-16 00:19:24,463 INFO L78 Accepts]: Start accepts. Automaton has 2934 states and 7036 transitions. Word has length 96 [2019-11-16 00:19:24,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:24,463 INFO L462 AbstractCegarLoop]: Abstraction has 2934 states and 7036 transitions. [2019-11-16 00:19:24,463 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:19:24,463 INFO L276 IsEmpty]: Start isEmpty. Operand 2934 states and 7036 transitions. [2019-11-16 00:19:24,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-16 00:19:24,465 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:24,465 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:24,466 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:24,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:24,466 INFO L82 PathProgramCache]: Analyzing trace with hash 1795144495, now seen corresponding path program 1 times [2019-11-16 00:19:24,466 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:24,467 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130095693] [2019-11-16 00:19:24,467 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:24,467 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:24,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:24,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:24,528 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:24,529 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [130095693] [2019-11-16 00:19:24,529 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:24,529 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-16 00:19:24,529 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [512929888] [2019-11-16 00:19:24,530 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-16 00:19:24,530 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:24,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-16 00:19:24,531 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:19:24,531 INFO L87 Difference]: Start difference. First operand 2934 states and 7036 transitions. Second operand 4 states. [2019-11-16 00:19:24,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:24,810 INFO L93 Difference]: Finished difference Result 3249 states and 7753 transitions. [2019-11-16 00:19:24,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-16 00:19:24,811 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-11-16 00:19:24,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:24,815 INFO L225 Difference]: With dead ends: 3249 [2019-11-16 00:19:24,815 INFO L226 Difference]: Without dead ends: 3213 [2019-11-16 00:19:24,816 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:19:24,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3213 states. [2019-11-16 00:19:24,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3213 to 2934. [2019-11-16 00:19:24,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2934 states. [2019-11-16 00:19:24,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2934 states to 2934 states and 7018 transitions. [2019-11-16 00:19:24,863 INFO L78 Accepts]: Start accepts. Automaton has 2934 states and 7018 transitions. Word has length 96 [2019-11-16 00:19:24,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:24,864 INFO L462 AbstractCegarLoop]: Abstraction has 2934 states and 7018 transitions. [2019-11-16 00:19:24,864 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-16 00:19:24,864 INFO L276 IsEmpty]: Start isEmpty. Operand 2934 states and 7018 transitions. [2019-11-16 00:19:24,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-16 00:19:24,868 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:24,869 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:24,869 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:24,869 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:24,869 INFO L82 PathProgramCache]: Analyzing trace with hash 1511994031, now seen corresponding path program 1 times [2019-11-16 00:19:24,870 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:24,870 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [937128066] [2019-11-16 00:19:24,870 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:24,870 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:24,870 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:24,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:24,967 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:24,968 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [937128066] [2019-11-16 00:19:24,968 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:24,968 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:19:24,968 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1220394909] [2019-11-16 00:19:24,969 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:19:24,969 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:24,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:19:24,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:19:24,970 INFO L87 Difference]: Start difference. First operand 2934 states and 7018 transitions. Second operand 5 states. [2019-11-16 00:19:25,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:25,244 INFO L93 Difference]: Finished difference Result 2610 states and 6091 transitions. [2019-11-16 00:19:25,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-16 00:19:25,245 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2019-11-16 00:19:25,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:25,248 INFO L225 Difference]: With dead ends: 2610 [2019-11-16 00:19:25,248 INFO L226 Difference]: Without dead ends: 2592 [2019-11-16 00:19:25,248 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:19:25,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2592 states. [2019-11-16 00:19:25,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2592 to 2203. [2019-11-16 00:19:25,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2203 states. [2019-11-16 00:19:25,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2203 states to 2203 states and 5186 transitions. [2019-11-16 00:19:25,278 INFO L78 Accepts]: Start accepts. Automaton has 2203 states and 5186 transitions. Word has length 96 [2019-11-16 00:19:25,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:25,279 INFO L462 AbstractCegarLoop]: Abstraction has 2203 states and 5186 transitions. [2019-11-16 00:19:25,279 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:19:25,279 INFO L276 IsEmpty]: Start isEmpty. Operand 2203 states and 5186 transitions. [2019-11-16 00:19:25,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-16 00:19:25,281 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:25,281 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:25,282 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:25,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:25,282 INFO L82 PathProgramCache]: Analyzing trace with hash -1538208784, now seen corresponding path program 1 times [2019-11-16 00:19:25,282 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:25,282 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2035185671] [2019-11-16 00:19:25,283 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:25,283 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:25,283 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:25,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:25,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:25,426 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2035185671] [2019-11-16 00:19:25,426 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:25,427 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:19:25,427 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [930448680] [2019-11-16 00:19:25,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:19:25,427 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:25,428 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:19:25,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:19:25,428 INFO L87 Difference]: Start difference. First operand 2203 states and 5186 transitions. Second operand 5 states. [2019-11-16 00:19:25,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:25,520 INFO L93 Difference]: Finished difference Result 2217 states and 5215 transitions. [2019-11-16 00:19:25,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-16 00:19:25,520 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2019-11-16 00:19:25,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:25,523 INFO L225 Difference]: With dead ends: 2217 [2019-11-16 00:19:25,523 INFO L226 Difference]: Without dead ends: 2217 [2019-11-16 00:19:25,525 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:19:25,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2217 states. [2019-11-16 00:19:25,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2217 to 2197. [2019-11-16 00:19:25,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2197 states. [2019-11-16 00:19:25,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2197 states to 2197 states and 5173 transitions. [2019-11-16 00:19:25,555 INFO L78 Accepts]: Start accepts. Automaton has 2197 states and 5173 transitions. Word has length 96 [2019-11-16 00:19:25,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:25,556 INFO L462 AbstractCegarLoop]: Abstraction has 2197 states and 5173 transitions. [2019-11-16 00:19:25,556 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:19:25,556 INFO L276 IsEmpty]: Start isEmpty. Operand 2197 states and 5173 transitions. [2019-11-16 00:19:25,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-16 00:19:25,558 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:25,559 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:25,559 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:25,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:25,559 INFO L82 PathProgramCache]: Analyzing trace with hash 1227396560, now seen corresponding path program 2 times [2019-11-16 00:19:25,560 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:25,560 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [799862912] [2019-11-16 00:19:25,560 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:25,560 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:25,560 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:25,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:25,677 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:25,678 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [799862912] [2019-11-16 00:19:25,678 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:25,678 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:19:25,678 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [511773454] [2019-11-16 00:19:25,679 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:19:25,679 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:25,679 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:19:25,679 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:19:25,679 INFO L87 Difference]: Start difference. First operand 2197 states and 5173 transitions. Second operand 5 states. [2019-11-16 00:19:25,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:25,820 INFO L93 Difference]: Finished difference Result 2086 states and 4900 transitions. [2019-11-16 00:19:25,820 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-16 00:19:25,820 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2019-11-16 00:19:25,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:25,823 INFO L225 Difference]: With dead ends: 2086 [2019-11-16 00:19:25,823 INFO L226 Difference]: Without dead ends: 2086 [2019-11-16 00:19:25,824 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:19:25,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2086 states. [2019-11-16 00:19:25,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2086 to 2038. [2019-11-16 00:19:25,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2038 states. [2019-11-16 00:19:25,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2038 states to 2038 states and 4799 transitions. [2019-11-16 00:19:25,852 INFO L78 Accepts]: Start accepts. Automaton has 2038 states and 4799 transitions. Word has length 96 [2019-11-16 00:19:25,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:25,853 INFO L462 AbstractCegarLoop]: Abstraction has 2038 states and 4799 transitions. [2019-11-16 00:19:25,853 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:19:25,853 INFO L276 IsEmpty]: Start isEmpty. Operand 2038 states and 4799 transitions. [2019-11-16 00:19:25,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-16 00:19:25,856 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:25,856 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:25,856 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:25,857 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:25,857 INFO L82 PathProgramCache]: Analyzing trace with hash -1759290832, now seen corresponding path program 1 times [2019-11-16 00:19:25,857 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:25,857 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [698029231] [2019-11-16 00:19:25,857 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:25,858 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:25,858 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:25,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:25,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:25,974 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [698029231] [2019-11-16 00:19:25,976 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:25,976 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:19:25,976 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [836418181] [2019-11-16 00:19:25,976 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:19:25,977 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:25,977 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:19:25,977 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:19:25,977 INFO L87 Difference]: Start difference. First operand 2038 states and 4799 transitions. Second operand 6 states. [2019-11-16 00:19:26,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:26,238 INFO L93 Difference]: Finished difference Result 2237 states and 5197 transitions. [2019-11-16 00:19:26,238 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-16 00:19:26,238 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-16 00:19:26,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:26,242 INFO L225 Difference]: With dead ends: 2237 [2019-11-16 00:19:26,242 INFO L226 Difference]: Without dead ends: 2237 [2019-11-16 00:19:26,242 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2019-11-16 00:19:26,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2237 states. [2019-11-16 00:19:26,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2237 to 2109. [2019-11-16 00:19:26,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2109 states. [2019-11-16 00:19:26,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2109 states to 2109 states and 4949 transitions. [2019-11-16 00:19:26,275 INFO L78 Accepts]: Start accepts. Automaton has 2109 states and 4949 transitions. Word has length 96 [2019-11-16 00:19:26,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:26,276 INFO L462 AbstractCegarLoop]: Abstraction has 2109 states and 4949 transitions. [2019-11-16 00:19:26,276 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:19:26,276 INFO L276 IsEmpty]: Start isEmpty. Operand 2109 states and 4949 transitions. [2019-11-16 00:19:26,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-16 00:19:26,279 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:26,279 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:26,280 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:26,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:26,280 INFO L82 PathProgramCache]: Analyzing trace with hash -1429525071, now seen corresponding path program 1 times [2019-11-16 00:19:26,280 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:26,283 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [724028553] [2019-11-16 00:19:26,283 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:26,283 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:26,283 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:26,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:19:26,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:19:26,457 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [724028553] [2019-11-16 00:19:26,457 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:19:26,457 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:19:26,458 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [577748876] [2019-11-16 00:19:26,458 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:19:26,458 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:19:26,459 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:19:26,459 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:19:26,459 INFO L87 Difference]: Start difference. First operand 2109 states and 4949 transitions. Second operand 7 states. [2019-11-16 00:19:26,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:19:26,549 INFO L93 Difference]: Finished difference Result 3400 states and 8085 transitions. [2019-11-16 00:19:26,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-16 00:19:26,550 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2019-11-16 00:19:26,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:19:26,551 INFO L225 Difference]: With dead ends: 3400 [2019-11-16 00:19:26,552 INFO L226 Difference]: Without dead ends: 1372 [2019-11-16 00:19:26,552 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-11-16 00:19:26,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1372 states. [2019-11-16 00:19:26,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1372 to 1372. [2019-11-16 00:19:26,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1372 states. [2019-11-16 00:19:26,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1372 states to 1372 states and 3268 transitions. [2019-11-16 00:19:26,566 INFO L78 Accepts]: Start accepts. Automaton has 1372 states and 3268 transitions. Word has length 96 [2019-11-16 00:19:26,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:19:26,566 INFO L462 AbstractCegarLoop]: Abstraction has 1372 states and 3268 transitions. [2019-11-16 00:19:26,567 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:19:26,567 INFO L276 IsEmpty]: Start isEmpty. Operand 1372 states and 3268 transitions. [2019-11-16 00:19:26,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-16 00:19:26,568 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:19:26,568 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:19:26,568 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:19:26,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:19:26,569 INFO L82 PathProgramCache]: Analyzing trace with hash -1727149841, now seen corresponding path program 2 times [2019-11-16 00:19:26,569 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:19:26,569 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054516509] [2019-11-16 00:19:26,569 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:26,569 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:19:26,569 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:19:26,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-16 00:19:26,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-16 00:19:26,663 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-16 00:19:26,663 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-16 00:19:26,829 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-16 00:19:26,831 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.11 12:19:26 BasicIcfg [2019-11-16 00:19:26,831 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-16 00:19:26,832 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-16 00:19:26,832 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-16 00:19:26,832 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-16 00:19:26,833 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:18:35" (3/4) ... [2019-11-16 00:19:26,835 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-16 00:19:26,981 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_de445ea9-49d6-4054-a6a6-0c37a9b57dbf/bin/uautomizer/witness.graphml [2019-11-16 00:19:26,981 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-16 00:19:26,983 INFO L168 Benchmark]: Toolchain (without parser) took 53248.12 ms. Allocated memory was 1.0 GB in the beginning and 4.6 GB in the end (delta: 3.6 GB). Free memory was 944.8 MB in the beginning and 2.0 GB in the end (delta: -1.0 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. [2019-11-16 00:19:26,984 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 967.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-16 00:19:26,984 INFO L168 Benchmark]: CACSL2BoogieTranslator took 693.42 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 144.7 MB). Free memory was 944.8 MB in the beginning and 1.1 GB in the end (delta: -166.2 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-11-16 00:19:26,985 INFO L168 Benchmark]: Boogie Procedure Inliner took 69.42 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-11-16 00:19:26,985 INFO L168 Benchmark]: Boogie Preprocessor took 76.64 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-16 00:19:26,985 INFO L168 Benchmark]: RCFGBuilder took 898.31 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 49.2 MB). Peak memory consumption was 49.2 MB. Max. memory is 11.5 GB. [2019-11-16 00:19:26,987 INFO L168 Benchmark]: TraceAbstraction took 51356.41 ms. Allocated memory was 1.2 GB in the beginning and 4.6 GB in the end (delta: 3.5 GB). Free memory was 1.1 GB in the beginning and 2.0 GB in the end (delta: -949.0 MB). Peak memory consumption was 2.5 GB. Max. memory is 11.5 GB. [2019-11-16 00:19:26,988 INFO L168 Benchmark]: Witness Printer took 149.58 ms. Allocated memory is still 4.6 GB. Free memory was 2.0 GB in the beginning and 2.0 GB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. [2019-11-16 00:19:26,989 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 967.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 693.42 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 144.7 MB). Free memory was 944.8 MB in the beginning and 1.1 GB in the end (delta: -166.2 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 69.42 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 76.64 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 898.31 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 49.2 MB). Peak memory consumption was 49.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 51356.41 ms. Allocated memory was 1.2 GB in the beginning and 4.6 GB in the end (delta: 3.5 GB). Free memory was 1.1 GB in the beginning and 2.0 GB in the end (delta: -949.0 MB). Peak memory consumption was 2.5 GB. Max. memory is 11.5 GB. * Witness Printer took 149.58 ms. Allocated memory is still 4.6 GB. Free memory was 2.0 GB in the beginning and 2.0 GB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L698] 0 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L699] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L700] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L702] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L704] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L705] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L706] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L707] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L708] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L709] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L710] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L711] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L712] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L713] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L714] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L715] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L716] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L717] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L718] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L720] 0 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L721] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L722] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L788] 0 pthread_t t1603; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L789] FCALL, FORK 0 pthread_create(&t1603, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L790] 0 pthread_t t1604; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L791] FCALL, FORK 0 pthread_create(&t1604, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L746] 2 y$w_buff1 = y$w_buff0 [L747] 2 y$w_buff0 = 2 [L748] 2 y$w_buff1_used = y$w_buff0_used [L749] 2 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L751] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L752] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L753] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L754] 2 y$r_buff0_thd2 = (_Bool)1 [L757] 2 z = 1 [L760] 2 __unbuffered_p1_EAX = z [L763] 2 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L726] 1 x = 1 [L729] 1 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L732] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L732] EXPR 1 y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=1, z=1] [L732] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=1, z=1] [L732] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L733] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L733] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L766] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L734] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L734] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L766] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L767] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L767] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L768] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L768] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L769] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L769] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L770] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L770] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L773] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L735] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L735] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L736] 1 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L739] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L793] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L798] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L798] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L799] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L799] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L800] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L800] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L801] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L801] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L804] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L805] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L806] 0 y$flush_delayed = weak$$choice2 [L807] 0 y$mem_tmp = y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L809] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L809] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L810] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L810] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L811] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L811] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L812] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L812] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L813] EXPR 0 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L813] 0 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L814] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L814] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L815] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L816] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L816] 0 y = y$flush_delayed ? y$mem_tmp : y [L817] 0 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 177 locations, 3 error locations. Result: UNSAFE, OverallTime: 51.2s, OverallIterations: 33, TraceHistogramMax: 1, AutomataDifference: 22.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8565 SDtfs, 8725 SDslu, 19345 SDs, 0 SdLazy, 8808 SolverSat, 573 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 336 GetRequests, 87 SyntacticMatches, 20 SemanticMatches, 229 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 474 ImplicationChecksByTransitivity, 2.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=76147occurred in iteration=13, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 21.9s AutomataMinimizationTime, 32 MinimizatonAttempts, 128769 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.7s InterpolantComputationTime, 2561 NumberOfCodeBlocks, 2561 NumberOfCodeBlocksAsserted, 33 NumberOfCheckSat, 2433 ConstructedInterpolants, 0 QuantifiedInterpolants, 452173 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 32 InterpolantComputations, 32 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...