./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi001_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_16da411c-069d-4cde-bcd0-e3d3ef176e81/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_16da411c-069d-4cde-bcd0-e3d3ef176e81/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_16da411c-069d-4cde-bcd0-e3d3ef176e81/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_16da411c-069d-4cde-bcd0-e3d3ef176e81/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi001_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_16da411c-069d-4cde-bcd0-e3d3ef176e81/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_16da411c-069d-4cde-bcd0-e3d3ef176e81/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash fd364d5a21fdf7bc40f73b96a86cdb24c0b51eff ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 20:05:21,603 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 20:05:21,606 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 20:05:21,624 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 20:05:21,625 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 20:05:21,626 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 20:05:21,628 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 20:05:21,639 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 20:05:21,645 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 20:05:21,648 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 20:05:21,651 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 20:05:21,652 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 20:05:21,653 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 20:05:21,656 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 20:05:21,657 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 20:05:21,658 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 20:05:21,659 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 20:05:21,661 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 20:05:21,664 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 20:05:21,670 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 20:05:21,674 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 20:05:21,676 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 20:05:21,679 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 20:05:21,680 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 20:05:21,685 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 20:05:21,685 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 20:05:21,685 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 20:05:21,687 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 20:05:21,688 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 20:05:21,689 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 20:05:21,689 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 20:05:21,690 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 20:05:21,690 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 20:05:21,691 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 20:05:21,693 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 20:05:21,694 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 20:05:21,694 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 20:05:21,695 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 20:05:21,695 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 20:05:21,696 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 20:05:21,697 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 20:05:21,698 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_16da411c-069d-4cde-bcd0-e3d3ef176e81/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 20:05:21,727 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 20:05:21,740 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 20:05:21,742 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 20:05:21,742 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 20:05:21,742 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 20:05:21,743 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 20:05:21,743 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 20:05:21,743 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 20:05:21,744 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 20:05:21,744 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 20:05:21,744 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 20:05:21,745 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 20:05:21,745 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 20:05:21,745 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 20:05:21,745 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 20:05:21,746 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 20:05:21,746 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 20:05:21,746 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 20:05:21,747 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 20:05:21,747 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 20:05:21,747 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 20:05:21,748 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:05:21,748 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 20:05:21,748 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 20:05:21,749 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 20:05:21,749 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 20:05:21,750 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 20:05:21,751 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 20:05:21,751 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_16da411c-069d-4cde-bcd0-e3d3ef176e81/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> fd364d5a21fdf7bc40f73b96a86cdb24c0b51eff [2019-11-15 20:05:21,788 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 20:05:21,801 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 20:05:21,805 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 20:05:21,807 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 20:05:21,807 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 20:05:21,808 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_16da411c-069d-4cde-bcd0-e3d3ef176e81/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/rfi001_pso.opt.i [2019-11-15 20:05:21,873 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_16da411c-069d-4cde-bcd0-e3d3ef176e81/bin/uautomizer/data/ef9026633/9f53cfd93e874a8c9c6fe718ccc304a8/FLAG9a05d6289 [2019-11-15 20:05:22,457 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 20:05:22,458 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_16da411c-069d-4cde-bcd0-e3d3ef176e81/sv-benchmarks/c/pthread-wmm/rfi001_pso.opt.i [2019-11-15 20:05:22,484 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_16da411c-069d-4cde-bcd0-e3d3ef176e81/bin/uautomizer/data/ef9026633/9f53cfd93e874a8c9c6fe718ccc304a8/FLAG9a05d6289 [2019-11-15 20:05:22,736 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_16da411c-069d-4cde-bcd0-e3d3ef176e81/bin/uautomizer/data/ef9026633/9f53cfd93e874a8c9c6fe718ccc304a8 [2019-11-15 20:05:22,739 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 20:05:22,741 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 20:05:22,748 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 20:05:22,748 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 20:05:22,752 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 20:05:22,753 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:05:22" (1/1) ... [2019-11-15 20:05:22,756 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@22e31798 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:05:22, skipping insertion in model container [2019-11-15 20:05:22,756 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:05:22" (1/1) ... [2019-11-15 20:05:22,765 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 20:05:22,836 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 20:05:23,373 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:05:23,386 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 20:05:23,467 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:05:23,552 INFO L192 MainTranslator]: Completed translation [2019-11-15 20:05:23,552 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:05:23 WrapperNode [2019-11-15 20:05:23,553 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 20:05:23,554 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 20:05:23,554 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 20:05:23,554 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 20:05:23,564 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:05:23" (1/1) ... [2019-11-15 20:05:23,586 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:05:23" (1/1) ... [2019-11-15 20:05:23,626 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 20:05:23,626 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 20:05:23,626 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 20:05:23,626 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 20:05:23,635 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:05:23" (1/1) ... [2019-11-15 20:05:23,635 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:05:23" (1/1) ... [2019-11-15 20:05:23,640 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:05:23" (1/1) ... [2019-11-15 20:05:23,641 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:05:23" (1/1) ... [2019-11-15 20:05:23,652 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:05:23" (1/1) ... [2019-11-15 20:05:23,656 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:05:23" (1/1) ... [2019-11-15 20:05:23,661 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:05:23" (1/1) ... [2019-11-15 20:05:23,666 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 20:05:23,667 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 20:05:23,667 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 20:05:23,667 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 20:05:23,668 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:05:23" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_16da411c-069d-4cde-bcd0-e3d3ef176e81/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:05:23,767 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 20:05:23,768 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 20:05:23,768 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 20:05:23,768 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 20:05:23,770 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 20:05:23,770 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 20:05:23,770 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 20:05:23,770 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 20:05:23,771 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 20:05:23,771 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 20:05:23,773 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 20:05:23,776 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 20:05:24,702 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 20:05:24,702 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 20:05:24,703 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:05:24 BoogieIcfgContainer [2019-11-15 20:05:24,704 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 20:05:24,705 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 20:05:24,705 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 20:05:24,708 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 20:05:24,708 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 08:05:22" (1/3) ... [2019-11-15 20:05:24,709 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1f087cfc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:05:24, skipping insertion in model container [2019-11-15 20:05:24,709 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:05:23" (2/3) ... [2019-11-15 20:05:24,710 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1f087cfc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:05:24, skipping insertion in model container [2019-11-15 20:05:24,710 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:05:24" (3/3) ... [2019-11-15 20:05:24,722 INFO L109 eAbstractionObserver]: Analyzing ICFG rfi001_pso.opt.i [2019-11-15 20:05:24,771 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,772 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,772 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,772 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,772 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,772 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,773 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,773 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,773 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,773 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,774 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,774 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,774 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,774 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,774 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,775 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,775 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,775 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,775 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,776 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,776 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,776 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,776 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,777 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,777 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,777 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,777 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,778 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,778 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,778 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,779 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,779 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,779 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,779 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,780 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,780 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,780 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,780 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,781 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,781 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,781 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,781 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,782 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,782 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,782 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,782 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,783 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,783 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,783 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,783 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,784 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,784 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,784 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,784 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,785 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,785 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,785 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,785 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,785 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,786 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,786 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,786 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,786 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,787 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:05:24,793 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 20:05:24,793 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 20:05:24,802 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 20:05:24,814 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 20:05:24,835 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 20:05:24,836 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 20:05:24,836 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 20:05:24,836 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 20:05:24,836 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 20:05:24,836 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 20:05:24,836 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 20:05:24,837 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 20:05:24,852 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 141 places, 179 transitions [2019-11-15 20:05:26,740 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22495 states. [2019-11-15 20:05:26,743 INFO L276 IsEmpty]: Start isEmpty. Operand 22495 states. [2019-11-15 20:05:26,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-11-15 20:05:26,760 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:05:26,761 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:05:26,766 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:05:26,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:05:26,772 INFO L82 PathProgramCache]: Analyzing trace with hash -697756791, now seen corresponding path program 1 times [2019-11-15 20:05:26,782 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:05:26,783 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2007501925] [2019-11-15 20:05:26,783 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:26,783 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:26,783 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:05:26,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:05:27,149 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:05:27,150 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2007501925] [2019-11-15 20:05:27,151 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:05:27,151 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:05:27,152 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [836240625] [2019-11-15 20:05:27,156 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:05:27,157 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:05:27,173 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:05:27,174 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:05:27,177 INFO L87 Difference]: Start difference. First operand 22495 states. Second operand 4 states. [2019-11-15 20:05:27,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:05:27,967 INFO L93 Difference]: Finished difference Result 23447 states and 91748 transitions. [2019-11-15 20:05:27,968 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 20:05:27,970 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2019-11-15 20:05:27,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:05:28,235 INFO L225 Difference]: With dead ends: 23447 [2019-11-15 20:05:28,235 INFO L226 Difference]: Without dead ends: 21271 [2019-11-15 20:05:28,238 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:05:28,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21271 states. [2019-11-15 20:05:29,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21271 to 21271. [2019-11-15 20:05:29,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21271 states. [2019-11-15 20:05:29,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21271 states to 21271 states and 83772 transitions. [2019-11-15 20:05:29,682 INFO L78 Accepts]: Start accepts. Automaton has 21271 states and 83772 transitions. Word has length 38 [2019-11-15 20:05:29,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:05:29,684 INFO L462 AbstractCegarLoop]: Abstraction has 21271 states and 83772 transitions. [2019-11-15 20:05:29,684 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:05:29,684 INFO L276 IsEmpty]: Start isEmpty. Operand 21271 states and 83772 transitions. [2019-11-15 20:05:29,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-15 20:05:29,698 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:05:29,699 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:05:29,699 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:05:29,700 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:05:29,700 INFO L82 PathProgramCache]: Analyzing trace with hash 298957026, now seen corresponding path program 1 times [2019-11-15 20:05:29,701 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:05:29,701 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [813717544] [2019-11-15 20:05:29,701 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:29,702 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:29,702 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:05:29,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:05:29,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:05:29,875 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [813717544] [2019-11-15 20:05:29,876 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:05:29,876 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:05:29,877 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1770854009] [2019-11-15 20:05:29,879 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:05:29,879 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:05:29,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:05:29,880 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:05:29,880 INFO L87 Difference]: Start difference. First operand 21271 states and 83772 transitions. Second operand 5 states. [2019-11-15 20:05:31,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:05:31,195 INFO L93 Difference]: Finished difference Result 34705 states and 129064 transitions. [2019-11-15 20:05:31,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:05:31,196 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-11-15 20:05:31,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:05:31,372 INFO L225 Difference]: With dead ends: 34705 [2019-11-15 20:05:31,372 INFO L226 Difference]: Without dead ends: 34561 [2019-11-15 20:05:31,373 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:05:32,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34561 states. [2019-11-15 20:05:32,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34561 to 33061. [2019-11-15 20:05:32,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33061 states. [2019-11-15 20:05:32,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33061 states to 33061 states and 123952 transitions. [2019-11-15 20:05:32,928 INFO L78 Accepts]: Start accepts. Automaton has 33061 states and 123952 transitions. Word has length 45 [2019-11-15 20:05:32,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:05:32,931 INFO L462 AbstractCegarLoop]: Abstraction has 33061 states and 123952 transitions. [2019-11-15 20:05:32,931 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:05:32,931 INFO L276 IsEmpty]: Start isEmpty. Operand 33061 states and 123952 transitions. [2019-11-15 20:05:32,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-11-15 20:05:32,939 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:05:32,940 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:05:32,940 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:05:32,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:05:32,941 INFO L82 PathProgramCache]: Analyzing trace with hash 528900453, now seen corresponding path program 1 times [2019-11-15 20:05:32,941 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:05:32,941 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1547849531] [2019-11-15 20:05:32,942 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:32,942 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:32,942 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:05:32,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:05:33,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:05:33,095 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1547849531] [2019-11-15 20:05:33,096 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:05:33,096 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:05:33,096 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [520744411] [2019-11-15 20:05:33,098 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:05:33,099 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:05:33,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:05:33,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:05:33,100 INFO L87 Difference]: Start difference. First operand 33061 states and 123952 transitions. Second operand 5 states. [2019-11-15 20:05:34,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:05:34,308 INFO L93 Difference]: Finished difference Result 40213 states and 148621 transitions. [2019-11-15 20:05:34,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:05:34,309 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2019-11-15 20:05:34,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:05:34,635 INFO L225 Difference]: With dead ends: 40213 [2019-11-15 20:05:34,636 INFO L226 Difference]: Without dead ends: 40053 [2019-11-15 20:05:34,636 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:05:34,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40053 states. [2019-11-15 20:05:35,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40053 to 34634. [2019-11-15 20:05:35,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34634 states. [2019-11-15 20:05:36,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34634 states to 34634 states and 129248 transitions. [2019-11-15 20:05:36,447 INFO L78 Accepts]: Start accepts. Automaton has 34634 states and 129248 transitions. Word has length 46 [2019-11-15 20:05:36,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:05:36,447 INFO L462 AbstractCegarLoop]: Abstraction has 34634 states and 129248 transitions. [2019-11-15 20:05:36,448 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:05:36,448 INFO L276 IsEmpty]: Start isEmpty. Operand 34634 states and 129248 transitions. [2019-11-15 20:05:36,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-15 20:05:36,464 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:05:36,465 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:05:36,465 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:05:36,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:05:36,466 INFO L82 PathProgramCache]: Analyzing trace with hash 440704446, now seen corresponding path program 1 times [2019-11-15 20:05:36,466 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:05:36,466 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1580499450] [2019-11-15 20:05:36,466 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:36,467 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:36,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:05:36,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:05:36,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:05:36,628 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1580499450] [2019-11-15 20:05:36,629 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:05:36,629 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:05:36,629 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1709816189] [2019-11-15 20:05:36,630 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:05:36,631 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:05:36,631 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:05:36,631 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:05:36,631 INFO L87 Difference]: Start difference. First operand 34634 states and 129248 transitions. Second operand 6 states. [2019-11-15 20:05:37,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:05:37,725 INFO L93 Difference]: Finished difference Result 45662 states and 166142 transitions. [2019-11-15 20:05:37,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 20:05:37,726 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-11-15 20:05:37,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:05:37,862 INFO L225 Difference]: With dead ends: 45662 [2019-11-15 20:05:37,862 INFO L226 Difference]: Without dead ends: 45518 [2019-11-15 20:05:37,863 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 20:05:38,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45518 states. [2019-11-15 20:05:38,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45518 to 33597. [2019-11-15 20:05:38,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33597 states. [2019-11-15 20:05:38,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33597 states to 33597 states and 125403 transitions. [2019-11-15 20:05:38,807 INFO L78 Accepts]: Start accepts. Automaton has 33597 states and 125403 transitions. Word has length 53 [2019-11-15 20:05:38,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:05:38,807 INFO L462 AbstractCegarLoop]: Abstraction has 33597 states and 125403 transitions. [2019-11-15 20:05:38,807 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:05:38,808 INFO L276 IsEmpty]: Start isEmpty. Operand 33597 states and 125403 transitions. [2019-11-15 20:05:38,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-15 20:05:38,846 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:05:38,846 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:05:38,846 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:05:38,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:05:38,847 INFO L82 PathProgramCache]: Analyzing trace with hash -2021901069, now seen corresponding path program 1 times [2019-11-15 20:05:38,847 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:05:38,847 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1950516035] [2019-11-15 20:05:38,847 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:38,847 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:38,848 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:05:38,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:05:38,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:05:38,960 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1950516035] [2019-11-15 20:05:38,960 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:05:38,961 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:05:38,961 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [313386041] [2019-11-15 20:05:38,961 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:05:38,961 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:05:38,962 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:05:38,962 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:05:38,962 INFO L87 Difference]: Start difference. First operand 33597 states and 125403 transitions. Second operand 6 states. [2019-11-15 20:05:40,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:05:40,514 INFO L93 Difference]: Finished difference Result 46069 states and 167836 transitions. [2019-11-15 20:05:40,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 20:05:40,514 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-11-15 20:05:40,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:05:40,622 INFO L225 Difference]: With dead ends: 46069 [2019-11-15 20:05:40,622 INFO L226 Difference]: Without dead ends: 45829 [2019-11-15 20:05:40,622 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 20:05:40,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45829 states. [2019-11-15 20:05:41,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45829 to 39958. [2019-11-15 20:05:41,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39958 states. [2019-11-15 20:05:41,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39958 states to 39958 states and 147327 transitions. [2019-11-15 20:05:41,441 INFO L78 Accepts]: Start accepts. Automaton has 39958 states and 147327 transitions. Word has length 60 [2019-11-15 20:05:41,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:05:41,441 INFO L462 AbstractCegarLoop]: Abstraction has 39958 states and 147327 transitions. [2019-11-15 20:05:41,442 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:05:41,442 INFO L276 IsEmpty]: Start isEmpty. Operand 39958 states and 147327 transitions. [2019-11-15 20:05:41,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-11-15 20:05:41,484 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:05:41,484 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:05:41,485 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:05:41,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:05:41,485 INFO L82 PathProgramCache]: Analyzing trace with hash -481942333, now seen corresponding path program 1 times [2019-11-15 20:05:41,485 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:05:41,485 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [691091942] [2019-11-15 20:05:41,486 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:41,486 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:41,486 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:05:41,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:05:41,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:05:41,540 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [691091942] [2019-11-15 20:05:41,541 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:05:41,541 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:05:41,542 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [168599995] [2019-11-15 20:05:41,542 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:05:41,544 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:05:41,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:05:41,544 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:05:41,545 INFO L87 Difference]: Start difference. First operand 39958 states and 147327 transitions. Second operand 3 states. [2019-11-15 20:05:42,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:05:42,543 INFO L93 Difference]: Finished difference Result 50256 states and 182162 transitions. [2019-11-15 20:05:42,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:05:42,544 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 62 [2019-11-15 20:05:42,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:05:42,658 INFO L225 Difference]: With dead ends: 50256 [2019-11-15 20:05:42,658 INFO L226 Difference]: Without dead ends: 50256 [2019-11-15 20:05:42,658 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:05:42,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50256 states. [2019-11-15 20:05:43,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50256 to 43888. [2019-11-15 20:05:43,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43888 states. [2019-11-15 20:05:43,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43888 states to 43888 states and 160765 transitions. [2019-11-15 20:05:43,527 INFO L78 Accepts]: Start accepts. Automaton has 43888 states and 160765 transitions. Word has length 62 [2019-11-15 20:05:43,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:05:43,528 INFO L462 AbstractCegarLoop]: Abstraction has 43888 states and 160765 transitions. [2019-11-15 20:05:43,528 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:05:43,528 INFO L276 IsEmpty]: Start isEmpty. Operand 43888 states and 160765 transitions. [2019-11-15 20:05:43,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 20:05:43,568 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:05:43,568 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:05:43,568 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:05:43,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:05:43,568 INFO L82 PathProgramCache]: Analyzing trace with hash 1024024957, now seen corresponding path program 1 times [2019-11-15 20:05:43,569 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:05:43,569 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [181263089] [2019-11-15 20:05:43,569 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:43,569 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:43,569 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:05:43,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:05:43,727 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:05:43,727 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [181263089] [2019-11-15 20:05:43,728 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:05:43,728 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:05:43,728 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1073720912] [2019-11-15 20:05:43,728 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:05:43,728 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:05:43,728 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:05:43,729 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:05:43,729 INFO L87 Difference]: Start difference. First operand 43888 states and 160765 transitions. Second operand 7 states. [2019-11-15 20:05:44,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:05:44,763 INFO L93 Difference]: Finished difference Result 55884 states and 200499 transitions. [2019-11-15 20:05:44,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 20:05:44,764 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-11-15 20:05:44,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:05:44,894 INFO L225 Difference]: With dead ends: 55884 [2019-11-15 20:05:44,894 INFO L226 Difference]: Without dead ends: 55644 [2019-11-15 20:05:44,895 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-15 20:05:45,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55644 states. [2019-11-15 20:05:46,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55644 to 45114. [2019-11-15 20:05:46,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45114 states. [2019-11-15 20:05:46,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45114 states to 45114 states and 164932 transitions. [2019-11-15 20:05:46,322 INFO L78 Accepts]: Start accepts. Automaton has 45114 states and 164932 transitions. Word has length 66 [2019-11-15 20:05:46,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:05:46,323 INFO L462 AbstractCegarLoop]: Abstraction has 45114 states and 164932 transitions. [2019-11-15 20:05:46,323 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:05:46,323 INFO L276 IsEmpty]: Start isEmpty. Operand 45114 states and 164932 transitions. [2019-11-15 20:05:46,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-11-15 20:05:46,361 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:05:46,361 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:05:46,362 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:05:46,362 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:05:46,362 INFO L82 PathProgramCache]: Analyzing trace with hash -2014746228, now seen corresponding path program 1 times [2019-11-15 20:05:46,362 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:05:46,363 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [76157786] [2019-11-15 20:05:46,363 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:46,363 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:46,363 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:05:46,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:05:46,468 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:05:46,468 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [76157786] [2019-11-15 20:05:46,469 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:05:46,469 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:05:46,469 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2052030425] [2019-11-15 20:05:46,470 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:05:46,470 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:05:46,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:05:46,471 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:05:46,471 INFO L87 Difference]: Start difference. First operand 45114 states and 164932 transitions. Second operand 7 states. [2019-11-15 20:05:47,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:05:47,706 INFO L93 Difference]: Finished difference Result 55098 states and 197676 transitions. [2019-11-15 20:05:47,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 20:05:47,706 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-11-15 20:05:47,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:05:47,831 INFO L225 Difference]: With dead ends: 55098 [2019-11-15 20:05:47,831 INFO L226 Difference]: Without dead ends: 54898 [2019-11-15 20:05:47,832 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-15 20:05:48,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54898 states. [2019-11-15 20:05:48,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54898 to 45992. [2019-11-15 20:05:48,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45992 states. [2019-11-15 20:05:48,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45992 states to 45992 states and 167803 transitions. [2019-11-15 20:05:48,825 INFO L78 Accepts]: Start accepts. Automaton has 45992 states and 167803 transitions. Word has length 67 [2019-11-15 20:05:48,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:05:48,825 INFO L462 AbstractCegarLoop]: Abstraction has 45992 states and 167803 transitions. [2019-11-15 20:05:48,826 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:05:48,826 INFO L276 IsEmpty]: Start isEmpty. Operand 45992 states and 167803 transitions. [2019-11-15 20:05:48,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 20:05:48,873 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:05:48,873 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:05:48,873 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:05:48,874 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:05:48,874 INFO L82 PathProgramCache]: Analyzing trace with hash 883100043, now seen corresponding path program 1 times [2019-11-15 20:05:48,874 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:05:48,874 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [357104596] [2019-11-15 20:05:48,875 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:48,875 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:48,875 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:05:48,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:05:48,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:05:48,941 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [357104596] [2019-11-15 20:05:48,942 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:05:48,942 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:05:48,942 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [935745097] [2019-11-15 20:05:48,943 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:05:48,943 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:05:48,943 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:05:48,943 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:05:48,944 INFO L87 Difference]: Start difference. First operand 45992 states and 167803 transitions. Second operand 3 states. [2019-11-15 20:05:49,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:05:49,791 INFO L93 Difference]: Finished difference Result 61486 states and 224137 transitions. [2019-11-15 20:05:49,792 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:05:49,792 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-11-15 20:05:49,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:05:49,932 INFO L225 Difference]: With dead ends: 61486 [2019-11-15 20:05:49,932 INFO L226 Difference]: Without dead ends: 61486 [2019-11-15 20:05:49,933 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:05:50,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61486 states. [2019-11-15 20:05:50,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61486 to 53433. [2019-11-15 20:05:50,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53433 states. [2019-11-15 20:05:51,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53433 states to 53433 states and 195616 transitions. [2019-11-15 20:05:51,069 INFO L78 Accepts]: Start accepts. Automaton has 53433 states and 195616 transitions. Word has length 69 [2019-11-15 20:05:51,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:05:51,069 INFO L462 AbstractCegarLoop]: Abstraction has 53433 states and 195616 transitions. [2019-11-15 20:05:51,069 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:05:51,069 INFO L276 IsEmpty]: Start isEmpty. Operand 53433 states and 195616 transitions. [2019-11-15 20:05:51,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 20:05:51,120 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:05:51,120 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:05:51,120 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:05:51,121 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:05:51,121 INFO L82 PathProgramCache]: Analyzing trace with hash -1887210997, now seen corresponding path program 1 times [2019-11-15 20:05:51,121 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:05:51,122 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1263159246] [2019-11-15 20:05:51,122 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:51,122 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:51,122 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:05:51,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:05:51,265 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:05:51,269 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1263159246] [2019-11-15 20:05:51,270 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:05:51,270 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:05:51,270 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1623153744] [2019-11-15 20:05:51,271 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:05:51,271 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:05:51,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:05:51,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:05:51,272 INFO L87 Difference]: Start difference. First operand 53433 states and 195616 transitions. Second operand 6 states. [2019-11-15 20:05:52,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:05:52,057 INFO L93 Difference]: Finished difference Result 65982 states and 238830 transitions. [2019-11-15 20:05:52,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:05:52,057 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 69 [2019-11-15 20:05:52,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:05:52,202 INFO L225 Difference]: With dead ends: 65982 [2019-11-15 20:05:52,202 INFO L226 Difference]: Without dead ends: 65338 [2019-11-15 20:05:52,202 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:05:52,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65338 states. [2019-11-15 20:05:53,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65338 to 56042. [2019-11-15 20:05:53,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56042 states. [2019-11-15 20:05:54,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56042 states to 56042 states and 204333 transitions. [2019-11-15 20:05:54,357 INFO L78 Accepts]: Start accepts. Automaton has 56042 states and 204333 transitions. Word has length 69 [2019-11-15 20:05:54,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:05:54,357 INFO L462 AbstractCegarLoop]: Abstraction has 56042 states and 204333 transitions. [2019-11-15 20:05:54,357 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:05:54,357 INFO L276 IsEmpty]: Start isEmpty. Operand 56042 states and 204333 transitions. [2019-11-15 20:05:54,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 20:05:54,419 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:05:54,420 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:05:54,420 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:05:54,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:05:54,421 INFO L82 PathProgramCache]: Analyzing trace with hash -925596980, now seen corresponding path program 1 times [2019-11-15 20:05:54,421 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:05:54,421 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [513479498] [2019-11-15 20:05:54,421 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:54,421 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:54,422 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:05:54,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:05:54,578 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:05:54,579 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [513479498] [2019-11-15 20:05:54,579 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:05:54,579 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:05:54,579 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1809033980] [2019-11-15 20:05:54,580 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:05:54,580 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:05:54,580 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:05:54,581 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:05:54,581 INFO L87 Difference]: Start difference. First operand 56042 states and 204333 transitions. Second operand 7 states. [2019-11-15 20:05:55,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:05:55,697 INFO L93 Difference]: Finished difference Result 83030 states and 292761 transitions. [2019-11-15 20:05:55,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 20:05:55,697 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 69 [2019-11-15 20:05:55,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:05:55,879 INFO L225 Difference]: With dead ends: 83030 [2019-11-15 20:05:55,879 INFO L226 Difference]: Without dead ends: 83030 [2019-11-15 20:05:55,879 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:05:56,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83030 states. [2019-11-15 20:05:57,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83030 to 76079. [2019-11-15 20:05:57,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76079 states. [2019-11-15 20:05:57,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76079 states to 76079 states and 270628 transitions. [2019-11-15 20:05:57,496 INFO L78 Accepts]: Start accepts. Automaton has 76079 states and 270628 transitions. Word has length 69 [2019-11-15 20:05:57,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:05:57,497 INFO L462 AbstractCegarLoop]: Abstraction has 76079 states and 270628 transitions. [2019-11-15 20:05:57,497 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:05:57,497 INFO L276 IsEmpty]: Start isEmpty. Operand 76079 states and 270628 transitions. [2019-11-15 20:05:57,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 20:05:57,574 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:05:57,574 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:05:57,574 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:05:57,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:05:57,574 INFO L82 PathProgramCache]: Analyzing trace with hash 319167501, now seen corresponding path program 1 times [2019-11-15 20:05:57,575 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:05:57,575 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2103038924] [2019-11-15 20:05:57,575 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:57,575 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:05:57,575 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:05:57,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:05:57,645 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:05:57,645 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2103038924] [2019-11-15 20:05:57,645 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:05:57,646 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:05:57,646 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1288115222] [2019-11-15 20:05:57,646 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:05:57,646 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:05:57,647 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:05:57,647 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:05:57,647 INFO L87 Difference]: Start difference. First operand 76079 states and 270628 transitions. Second operand 3 states. [2019-11-15 20:05:57,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:05:57,939 INFO L93 Difference]: Finished difference Result 54415 states and 197409 transitions. [2019-11-15 20:05:57,939 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:05:57,939 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-11-15 20:05:57,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:05:58,064 INFO L225 Difference]: With dead ends: 54415 [2019-11-15 20:05:58,064 INFO L226 Difference]: Without dead ends: 54253 [2019-11-15 20:05:58,065 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:05:58,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54253 states. [2019-11-15 20:06:03,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54253 to 54213. [2019-11-15 20:06:03,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54213 states. [2019-11-15 20:06:03,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54213 states to 54213 states and 196824 transitions. [2019-11-15 20:06:03,467 INFO L78 Accepts]: Start accepts. Automaton has 54213 states and 196824 transitions. Word has length 69 [2019-11-15 20:06:03,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:03,467 INFO L462 AbstractCegarLoop]: Abstraction has 54213 states and 196824 transitions. [2019-11-15 20:06:03,467 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:06:03,467 INFO L276 IsEmpty]: Start isEmpty. Operand 54213 states and 196824 transitions. [2019-11-15 20:06:03,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 20:06:03,510 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:03,510 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:03,510 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:03,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:03,511 INFO L82 PathProgramCache]: Analyzing trace with hash 871106303, now seen corresponding path program 1 times [2019-11-15 20:06:03,511 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:03,511 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1038171991] [2019-11-15 20:06:03,512 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:03,512 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:03,512 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:03,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:03,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:03,613 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1038171991] [2019-11-15 20:06:03,613 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:03,613 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:06:03,613 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [970479645] [2019-11-15 20:06:03,614 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:06:03,614 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:03,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:06:03,615 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:06:03,615 INFO L87 Difference]: Start difference. First operand 54213 states and 196824 transitions. Second operand 5 states. [2019-11-15 20:06:04,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:04,404 INFO L93 Difference]: Finished difference Result 84428 states and 303656 transitions. [2019-11-15 20:06:04,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:06:04,405 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2019-11-15 20:06:04,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:04,604 INFO L225 Difference]: With dead ends: 84428 [2019-11-15 20:06:04,604 INFO L226 Difference]: Without dead ends: 84232 [2019-11-15 20:06:04,605 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:06:04,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84232 states. [2019-11-15 20:06:05,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84232 to 76147. [2019-11-15 20:06:05,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76147 states. [2019-11-15 20:06:06,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76147 states to 76147 states and 275544 transitions. [2019-11-15 20:06:06,175 INFO L78 Accepts]: Start accepts. Automaton has 76147 states and 275544 transitions. Word has length 70 [2019-11-15 20:06:06,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:06,175 INFO L462 AbstractCegarLoop]: Abstraction has 76147 states and 275544 transitions. [2019-11-15 20:06:06,175 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:06:06,175 INFO L276 IsEmpty]: Start isEmpty. Operand 76147 states and 275544 transitions. [2019-11-15 20:06:06,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 20:06:06,240 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:06,240 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:06,241 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:06,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:06,241 INFO L82 PathProgramCache]: Analyzing trace with hash 2115870784, now seen corresponding path program 1 times [2019-11-15 20:06:06,241 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:06,241 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725573357] [2019-11-15 20:06:06,241 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:06,241 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:06,241 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:06,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:06,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:06,368 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [725573357] [2019-11-15 20:06:06,368 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:06,369 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:06:06,369 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1157534428] [2019-11-15 20:06:06,369 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:06:06,370 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:06,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:06:06,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:06:06,370 INFO L87 Difference]: Start difference. First operand 76147 states and 275544 transitions. Second operand 4 states. [2019-11-15 20:06:06,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:06,495 INFO L93 Difference]: Finished difference Result 19615 states and 62265 transitions. [2019-11-15 20:06:06,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:06:06,496 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 70 [2019-11-15 20:06:06,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:06,540 INFO L225 Difference]: With dead ends: 19615 [2019-11-15 20:06:06,540 INFO L226 Difference]: Without dead ends: 19137 [2019-11-15 20:06:06,542 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:06:06,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19137 states. [2019-11-15 20:06:06,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19137 to 19125. [2019-11-15 20:06:06,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19125 states. [2019-11-15 20:06:06,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19125 states to 19125 states and 60760 transitions. [2019-11-15 20:06:06,945 INFO L78 Accepts]: Start accepts. Automaton has 19125 states and 60760 transitions. Word has length 70 [2019-11-15 20:06:06,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:06,945 INFO L462 AbstractCegarLoop]: Abstraction has 19125 states and 60760 transitions. [2019-11-15 20:06:06,945 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:06:06,945 INFO L276 IsEmpty]: Start isEmpty. Operand 19125 states and 60760 transitions. [2019-11-15 20:06:06,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 20:06:06,969 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:06,970 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:06,970 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:06,970 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:06,970 INFO L82 PathProgramCache]: Analyzing trace with hash 2121759987, now seen corresponding path program 1 times [2019-11-15 20:06:06,971 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:06,971 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [332329477] [2019-11-15 20:06:06,971 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:06,971 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:06,971 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:07,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:07,069 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:07,070 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [332329477] [2019-11-15 20:06:07,070 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:07,070 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:06:07,070 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1005878839] [2019-11-15 20:06:07,071 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:06:07,071 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:07,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:06:07,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:06:07,072 INFO L87 Difference]: Start difference. First operand 19125 states and 60760 transitions. Second operand 4 states. [2019-11-15 20:06:07,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:07,425 INFO L93 Difference]: Finished difference Result 24075 states and 75428 transitions. [2019-11-15 20:06:07,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:06:07,426 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-11-15 20:06:07,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:07,480 INFO L225 Difference]: With dead ends: 24075 [2019-11-15 20:06:07,480 INFO L226 Difference]: Without dead ends: 24075 [2019-11-15 20:06:07,480 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:06:07,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24075 states. [2019-11-15 20:06:07,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24075 to 19965. [2019-11-15 20:06:07,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19965 states. [2019-11-15 20:06:07,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19965 states to 19965 states and 63127 transitions. [2019-11-15 20:06:07,842 INFO L78 Accepts]: Start accepts. Automaton has 19965 states and 63127 transitions. Word has length 79 [2019-11-15 20:06:07,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:07,843 INFO L462 AbstractCegarLoop]: Abstraction has 19965 states and 63127 transitions. [2019-11-15 20:06:07,843 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:06:07,843 INFO L276 IsEmpty]: Start isEmpty. Operand 19965 states and 63127 transitions. [2019-11-15 20:06:07,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 20:06:07,863 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:07,863 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:07,863 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:07,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:07,864 INFO L82 PathProgramCache]: Analyzing trace with hash 1867023442, now seen corresponding path program 1 times [2019-11-15 20:06:07,864 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:07,864 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000607098] [2019-11-15 20:06:07,864 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:07,865 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:07,865 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:07,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:07,977 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:07,977 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2000607098] [2019-11-15 20:06:07,978 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:07,978 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:06:07,978 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1508962271] [2019-11-15 20:06:07,979 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:06:07,979 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:07,979 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:06:07,979 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:06:07,980 INFO L87 Difference]: Start difference. First operand 19965 states and 63127 transitions. Second operand 8 states. [2019-11-15 20:06:09,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:09,025 INFO L93 Difference]: Finished difference Result 22071 states and 69319 transitions. [2019-11-15 20:06:09,026 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-11-15 20:06:09,026 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 79 [2019-11-15 20:06:09,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:09,081 INFO L225 Difference]: With dead ends: 22071 [2019-11-15 20:06:09,082 INFO L226 Difference]: Without dead ends: 22023 [2019-11-15 20:06:09,083 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=404, Unknown=0, NotChecked=0, Total=506 [2019-11-15 20:06:09,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22023 states. [2019-11-15 20:06:09,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22023 to 19437. [2019-11-15 20:06:09,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19437 states. [2019-11-15 20:06:09,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19437 states to 19437 states and 61629 transitions. [2019-11-15 20:06:09,587 INFO L78 Accepts]: Start accepts. Automaton has 19437 states and 61629 transitions. Word has length 79 [2019-11-15 20:06:09,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:09,588 INFO L462 AbstractCegarLoop]: Abstraction has 19437 states and 61629 transitions. [2019-11-15 20:06:09,588 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:06:09,589 INFO L276 IsEmpty]: Start isEmpty. Operand 19437 states and 61629 transitions. [2019-11-15 20:06:09,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 20:06:09,617 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:09,617 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:09,617 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:09,618 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:09,618 INFO L82 PathProgramCache]: Analyzing trace with hash -1015310952, now seen corresponding path program 1 times [2019-11-15 20:06:09,618 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:09,618 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [98666348] [2019-11-15 20:06:09,618 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:09,618 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:09,619 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:09,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:09,750 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:09,751 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [98666348] [2019-11-15 20:06:09,751 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:09,751 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:06:09,751 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1169297402] [2019-11-15 20:06:09,752 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:06:09,752 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:09,752 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:06:09,753 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:06:09,753 INFO L87 Difference]: Start difference. First operand 19437 states and 61629 transitions. Second operand 8 states. [2019-11-15 20:06:12,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:12,481 INFO L93 Difference]: Finished difference Result 50431 states and 153647 transitions. [2019-11-15 20:06:12,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-11-15 20:06:12,481 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 82 [2019-11-15 20:06:12,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:12,567 INFO L225 Difference]: With dead ends: 50431 [2019-11-15 20:06:12,567 INFO L226 Difference]: Without dead ends: 49732 [2019-11-15 20:06:12,567 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=153, Invalid=497, Unknown=0, NotChecked=0, Total=650 [2019-11-15 20:06:12,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49732 states. [2019-11-15 20:06:13,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49732 to 29965. [2019-11-15 20:06:13,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29965 states. [2019-11-15 20:06:13,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29965 states to 29965 states and 93559 transitions. [2019-11-15 20:06:13,153 INFO L78 Accepts]: Start accepts. Automaton has 29965 states and 93559 transitions. Word has length 82 [2019-11-15 20:06:13,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:13,154 INFO L462 AbstractCegarLoop]: Abstraction has 29965 states and 93559 transitions. [2019-11-15 20:06:13,154 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:06:13,154 INFO L276 IsEmpty]: Start isEmpty. Operand 29965 states and 93559 transitions. [2019-11-15 20:06:13,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 20:06:13,186 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:13,186 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:13,186 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:13,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:13,187 INFO L82 PathProgramCache]: Analyzing trace with hash -53696935, now seen corresponding path program 1 times [2019-11-15 20:06:13,187 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:13,187 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [118012688] [2019-11-15 20:06:13,187 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:13,187 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:13,187 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:13,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:13,307 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:13,307 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [118012688] [2019-11-15 20:06:13,308 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:13,308 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:06:13,308 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1775678456] [2019-11-15 20:06:13,308 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:06:13,309 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:13,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:06:13,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:06:13,309 INFO L87 Difference]: Start difference. First operand 29965 states and 93559 transitions. Second operand 6 states. [2019-11-15 20:06:13,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:13,970 INFO L93 Difference]: Finished difference Result 31403 states and 97496 transitions. [2019-11-15 20:06:13,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:06:13,971 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-11-15 20:06:13,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:14,024 INFO L225 Difference]: With dead ends: 31403 [2019-11-15 20:06:14,025 INFO L226 Difference]: Without dead ends: 31403 [2019-11-15 20:06:14,025 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:06:14,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31403 states. [2019-11-15 20:06:14,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31403 to 29634. [2019-11-15 20:06:14,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29634 states. [2019-11-15 20:06:14,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29634 states to 29634 states and 92402 transitions. [2019-11-15 20:06:14,487 INFO L78 Accepts]: Start accepts. Automaton has 29634 states and 92402 transitions. Word has length 82 [2019-11-15 20:06:14,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:14,487 INFO L462 AbstractCegarLoop]: Abstraction has 29634 states and 92402 transitions. [2019-11-15 20:06:14,487 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:06:14,487 INFO L276 IsEmpty]: Start isEmpty. Operand 29634 states and 92402 transitions. [2019-11-15 20:06:14,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 20:06:14,518 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:14,518 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:14,518 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:14,518 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:14,518 INFO L82 PathProgramCache]: Analyzing trace with hash -1989357222, now seen corresponding path program 1 times [2019-11-15 20:06:14,519 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:14,519 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995862126] [2019-11-15 20:06:14,519 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:14,519 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:14,519 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:14,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:14,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:14,633 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995862126] [2019-11-15 20:06:14,633 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:14,634 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:06:14,634 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [644644301] [2019-11-15 20:06:14,634 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:06:14,634 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:14,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:06:14,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:06:14,635 INFO L87 Difference]: Start difference. First operand 29634 states and 92402 transitions. Second operand 7 states. [2019-11-15 20:06:15,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:15,441 INFO L93 Difference]: Finished difference Result 31148 states and 96558 transitions. [2019-11-15 20:06:15,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 20:06:15,441 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 82 [2019-11-15 20:06:15,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:15,489 INFO L225 Difference]: With dead ends: 31148 [2019-11-15 20:06:15,490 INFO L226 Difference]: Without dead ends: 31148 [2019-11-15 20:06:15,490 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:06:15,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31148 states. [2019-11-15 20:06:15,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31148 to 29966. [2019-11-15 20:06:15,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29966 states. [2019-11-15 20:06:15,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29966 states to 29966 states and 93233 transitions. [2019-11-15 20:06:15,926 INFO L78 Accepts]: Start accepts. Automaton has 29966 states and 93233 transitions. Word has length 82 [2019-11-15 20:06:15,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:15,927 INFO L462 AbstractCegarLoop]: Abstraction has 29966 states and 93233 transitions. [2019-11-15 20:06:15,927 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:06:15,927 INFO L276 IsEmpty]: Start isEmpty. Operand 29966 states and 93233 transitions. [2019-11-15 20:06:15,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 20:06:15,959 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:15,959 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:15,959 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:15,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:15,960 INFO L82 PathProgramCache]: Analyzing trace with hash -1659591461, now seen corresponding path program 1 times [2019-11-15 20:06:15,960 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:15,960 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [320283772] [2019-11-15 20:06:15,960 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:15,960 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:15,960 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:15,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:16,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:16,029 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [320283772] [2019-11-15 20:06:16,030 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:16,030 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:06:16,030 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1879196575] [2019-11-15 20:06:16,031 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:06:16,031 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:16,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:06:16,031 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:06:16,031 INFO L87 Difference]: Start difference. First operand 29966 states and 93233 transitions. Second operand 3 states. [2019-11-15 20:06:16,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:16,159 INFO L93 Difference]: Finished difference Result 21487 states and 66270 transitions. [2019-11-15 20:06:16,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:06:16,159 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 82 [2019-11-15 20:06:16,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:16,203 INFO L225 Difference]: With dead ends: 21487 [2019-11-15 20:06:16,203 INFO L226 Difference]: Without dead ends: 21487 [2019-11-15 20:06:16,203 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:06:16,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21487 states. [2019-11-15 20:06:16,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21487 to 21164. [2019-11-15 20:06:16,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21164 states. [2019-11-15 20:06:16,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21164 states to 21164 states and 65321 transitions. [2019-11-15 20:06:16,510 INFO L78 Accepts]: Start accepts. Automaton has 21164 states and 65321 transitions. Word has length 82 [2019-11-15 20:06:16,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:16,510 INFO L462 AbstractCegarLoop]: Abstraction has 21164 states and 65321 transitions. [2019-11-15 20:06:16,510 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:06:16,510 INFO L276 IsEmpty]: Start isEmpty. Operand 21164 states and 65321 transitions. [2019-11-15 20:06:16,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:06:16,527 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:16,527 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:16,527 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:16,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:16,527 INFO L82 PathProgramCache]: Analyzing trace with hash 502506102, now seen corresponding path program 1 times [2019-11-15 20:06:16,528 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:16,528 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1706157934] [2019-11-15 20:06:16,528 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:16,528 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:16,528 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:16,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:16,655 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:16,656 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1706157934] [2019-11-15 20:06:16,656 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:16,656 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:06:16,657 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [424186222] [2019-11-15 20:06:16,657 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:06:16,657 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:16,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:06:16,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:06:16,658 INFO L87 Difference]: Start difference. First operand 21164 states and 65321 transitions. Second operand 6 states. [2019-11-15 20:06:17,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:17,052 INFO L93 Difference]: Finished difference Result 37344 states and 115064 transitions. [2019-11-15 20:06:17,052 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:06:17,052 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 83 [2019-11-15 20:06:17,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:17,112 INFO L225 Difference]: With dead ends: 37344 [2019-11-15 20:06:17,112 INFO L226 Difference]: Without dead ends: 37344 [2019-11-15 20:06:17,112 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:06:17,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37344 states. [2019-11-15 20:06:17,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37344 to 23234. [2019-11-15 20:06:17,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23234 states. [2019-11-15 20:06:17,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23234 states to 23234 states and 71275 transitions. [2019-11-15 20:06:17,514 INFO L78 Accepts]: Start accepts. Automaton has 23234 states and 71275 transitions. Word has length 83 [2019-11-15 20:06:17,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:17,515 INFO L462 AbstractCegarLoop]: Abstraction has 23234 states and 71275 transitions. [2019-11-15 20:06:17,515 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:06:17,515 INFO L276 IsEmpty]: Start isEmpty. Operand 23234 states and 71275 transitions. [2019-11-15 20:06:17,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:06:17,535 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:17,536 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:17,536 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:17,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:17,536 INFO L82 PathProgramCache]: Analyzing trace with hash 832271863, now seen corresponding path program 1 times [2019-11-15 20:06:17,537 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:17,537 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [638750596] [2019-11-15 20:06:17,537 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:17,537 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:17,537 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:17,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:17,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:17,625 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [638750596] [2019-11-15 20:06:17,625 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:17,625 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:06:17,625 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1594646241] [2019-11-15 20:06:17,626 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:06:17,626 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:17,626 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:06:17,626 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:06:17,626 INFO L87 Difference]: Start difference. First operand 23234 states and 71275 transitions. Second operand 5 states. [2019-11-15 20:06:17,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:17,689 INFO L93 Difference]: Finished difference Result 3104 states and 7662 transitions. [2019-11-15 20:06:17,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:06:17,689 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 83 [2019-11-15 20:06:17,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:17,692 INFO L225 Difference]: With dead ends: 3104 [2019-11-15 20:06:17,693 INFO L226 Difference]: Without dead ends: 2718 [2019-11-15 20:06:17,693 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:06:17,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2718 states. [2019-11-15 20:06:17,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2718 to 2566. [2019-11-15 20:06:17,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2566 states. [2019-11-15 20:06:17,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2566 states to 2566 states and 6342 transitions. [2019-11-15 20:06:17,721 INFO L78 Accepts]: Start accepts. Automaton has 2566 states and 6342 transitions. Word has length 83 [2019-11-15 20:06:17,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:17,721 INFO L462 AbstractCegarLoop]: Abstraction has 2566 states and 6342 transitions. [2019-11-15 20:06:17,721 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:06:17,721 INFO L276 IsEmpty]: Start isEmpty. Operand 2566 states and 6342 transitions. [2019-11-15 20:06:17,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:06:17,723 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:17,724 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:17,724 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:17,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:17,724 INFO L82 PathProgramCache]: Analyzing trace with hash -1029354612, now seen corresponding path program 1 times [2019-11-15 20:06:17,724 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:17,725 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [376847000] [2019-11-15 20:06:17,725 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:17,725 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:17,725 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:17,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:17,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:17,802 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [376847000] [2019-11-15 20:06:17,803 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:17,803 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:06:17,803 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [577700537] [2019-11-15 20:06:17,804 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:06:17,804 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:17,804 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:06:17,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:06:17,804 INFO L87 Difference]: Start difference. First operand 2566 states and 6342 transitions. Second operand 4 states. [2019-11-15 20:06:17,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:17,940 INFO L93 Difference]: Finished difference Result 2936 states and 7183 transitions. [2019-11-15 20:06:17,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 20:06:17,940 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-11-15 20:06:17,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:17,943 INFO L225 Difference]: With dead ends: 2936 [2019-11-15 20:06:17,943 INFO L226 Difference]: Without dead ends: 2936 [2019-11-15 20:06:17,943 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:06:17,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2936 states. [2019-11-15 20:06:17,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2936 to 2660. [2019-11-15 20:06:17,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2660 states. [2019-11-15 20:06:17,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2660 states to 2660 states and 6556 transitions. [2019-11-15 20:06:17,967 INFO L78 Accepts]: Start accepts. Automaton has 2660 states and 6556 transitions. Word has length 96 [2019-11-15 20:06:17,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:17,967 INFO L462 AbstractCegarLoop]: Abstraction has 2660 states and 6556 transitions. [2019-11-15 20:06:17,967 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:06:17,967 INFO L276 IsEmpty]: Start isEmpty. Operand 2660 states and 6556 transitions. [2019-11-15 20:06:17,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:06:17,969 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:17,969 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:17,969 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:17,970 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:17,970 INFO L82 PathProgramCache]: Analyzing trace with hash -1478051251, now seen corresponding path program 1 times [2019-11-15 20:06:17,970 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:17,970 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [790851619] [2019-11-15 20:06:17,970 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:17,970 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:17,971 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:17,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:18,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:18,071 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [790851619] [2019-11-15 20:06:18,071 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:18,071 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:06:18,071 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [437481794] [2019-11-15 20:06:18,072 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:06:18,072 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:18,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:06:18,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:06:18,073 INFO L87 Difference]: Start difference. First operand 2660 states and 6556 transitions. Second operand 6 states. [2019-11-15 20:06:18,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:18,253 INFO L93 Difference]: Finished difference Result 2940 states and 7065 transitions. [2019-11-15 20:06:18,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:06:18,253 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-15 20:06:18,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:18,256 INFO L225 Difference]: With dead ends: 2940 [2019-11-15 20:06:18,257 INFO L226 Difference]: Without dead ends: 2883 [2019-11-15 20:06:18,259 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:06:18,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2883 states. [2019-11-15 20:06:18,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2883 to 2750. [2019-11-15 20:06:18,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2750 states. [2019-11-15 20:06:18,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2750 states to 2750 states and 6692 transitions. [2019-11-15 20:06:18,291 INFO L78 Accepts]: Start accepts. Automaton has 2750 states and 6692 transitions. Word has length 96 [2019-11-15 20:06:18,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:18,291 INFO L462 AbstractCegarLoop]: Abstraction has 2750 states and 6692 transitions. [2019-11-15 20:06:18,292 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:06:18,292 INFO L276 IsEmpty]: Start isEmpty. Operand 2750 states and 6692 transitions. [2019-11-15 20:06:18,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:06:18,294 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:18,294 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:18,294 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:18,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:18,295 INFO L82 PathProgramCache]: Analyzing trace with hash 1116175566, now seen corresponding path program 1 times [2019-11-15 20:06:18,295 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:18,295 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2009166511] [2019-11-15 20:06:18,295 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:18,296 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:18,296 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:18,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:18,389 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:18,389 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2009166511] [2019-11-15 20:06:18,389 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:18,389 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:06:18,390 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1866348237] [2019-11-15 20:06:18,390 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:06:18,390 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:18,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:06:18,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:06:18,391 INFO L87 Difference]: Start difference. First operand 2750 states and 6692 transitions. Second operand 6 states. [2019-11-15 20:06:18,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:18,597 INFO L93 Difference]: Finished difference Result 3069 states and 7313 transitions. [2019-11-15 20:06:18,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 20:06:18,597 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-15 20:06:18,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:18,601 INFO L225 Difference]: With dead ends: 3069 [2019-11-15 20:06:18,601 INFO L226 Difference]: Without dead ends: 3069 [2019-11-15 20:06:18,601 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 20:06:18,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3069 states. [2019-11-15 20:06:18,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3069 to 2813. [2019-11-15 20:06:18,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2813 states. [2019-11-15 20:06:18,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2813 states to 2813 states and 6797 transitions. [2019-11-15 20:06:18,636 INFO L78 Accepts]: Start accepts. Automaton has 2813 states and 6797 transitions. Word has length 96 [2019-11-15 20:06:18,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:18,637 INFO L462 AbstractCegarLoop]: Abstraction has 2813 states and 6797 transitions. [2019-11-15 20:06:18,637 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:06:18,637 INFO L276 IsEmpty]: Start isEmpty. Operand 2813 states and 6797 transitions. [2019-11-15 20:06:18,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:06:18,640 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:18,640 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:18,640 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:18,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:18,641 INFO L82 PathProgramCache]: Analyzing trace with hash -819484721, now seen corresponding path program 1 times [2019-11-15 20:06:18,641 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:18,641 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [255300145] [2019-11-15 20:06:18,641 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:18,641 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:18,641 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:18,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:18,752 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:18,753 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [255300145] [2019-11-15 20:06:18,753 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:18,753 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:06:18,753 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1858793458] [2019-11-15 20:06:18,754 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:06:18,754 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:18,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:06:18,754 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:06:18,755 INFO L87 Difference]: Start difference. First operand 2813 states and 6797 transitions. Second operand 7 states. [2019-11-15 20:06:19,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:19,176 INFO L93 Difference]: Finished difference Result 3223 states and 7620 transitions. [2019-11-15 20:06:19,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:06:19,177 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2019-11-15 20:06:19,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:19,181 INFO L225 Difference]: With dead ends: 3223 [2019-11-15 20:06:19,182 INFO L226 Difference]: Without dead ends: 3223 [2019-11-15 20:06:19,182 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2019-11-15 20:06:19,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3223 states. [2019-11-15 20:06:19,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3223 to 2934. [2019-11-15 20:06:19,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2934 states. [2019-11-15 20:06:19,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2934 states to 2934 states and 7036 transitions. [2019-11-15 20:06:19,226 INFO L78 Accepts]: Start accepts. Automaton has 2934 states and 7036 transitions. Word has length 96 [2019-11-15 20:06:19,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:19,227 INFO L462 AbstractCegarLoop]: Abstraction has 2934 states and 7036 transitions. [2019-11-15 20:06:19,227 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:06:19,227 INFO L276 IsEmpty]: Start isEmpty. Operand 2934 states and 7036 transitions. [2019-11-15 20:06:19,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:06:19,231 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:19,231 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:19,231 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:19,232 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:19,232 INFO L82 PathProgramCache]: Analyzing trace with hash 1795144495, now seen corresponding path program 1 times [2019-11-15 20:06:19,232 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:19,232 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910803580] [2019-11-15 20:06:19,233 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:19,233 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:19,233 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:19,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:19,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:19,317 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [910803580] [2019-11-15 20:06:19,318 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:19,318 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:06:19,318 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1982832446] [2019-11-15 20:06:19,318 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:06:19,319 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:19,319 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:06:19,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:06:19,319 INFO L87 Difference]: Start difference. First operand 2934 states and 7036 transitions. Second operand 4 states. [2019-11-15 20:06:19,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:19,606 INFO L93 Difference]: Finished difference Result 3249 states and 7753 transitions. [2019-11-15 20:06:19,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:06:19,606 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-11-15 20:06:19,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:19,611 INFO L225 Difference]: With dead ends: 3249 [2019-11-15 20:06:19,611 INFO L226 Difference]: Without dead ends: 3213 [2019-11-15 20:06:19,611 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:06:19,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3213 states. [2019-11-15 20:06:20,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3213 to 2934. [2019-11-15 20:06:20,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2934 states. [2019-11-15 20:06:20,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2934 states to 2934 states and 7018 transitions. [2019-11-15 20:06:20,029 INFO L78 Accepts]: Start accepts. Automaton has 2934 states and 7018 transitions. Word has length 96 [2019-11-15 20:06:20,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:20,030 INFO L462 AbstractCegarLoop]: Abstraction has 2934 states and 7018 transitions. [2019-11-15 20:06:20,030 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:06:20,030 INFO L276 IsEmpty]: Start isEmpty. Operand 2934 states and 7018 transitions. [2019-11-15 20:06:20,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:06:20,034 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:20,034 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:20,035 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:20,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:20,037 INFO L82 PathProgramCache]: Analyzing trace with hash 1511994031, now seen corresponding path program 1 times [2019-11-15 20:06:20,037 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:20,037 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2048043291] [2019-11-15 20:06:20,038 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:20,038 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:20,038 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:20,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:20,142 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:20,142 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2048043291] [2019-11-15 20:06:20,142 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:20,143 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:06:20,143 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1754818152] [2019-11-15 20:06:20,143 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:06:20,143 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:20,143 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:06:20,144 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:06:20,144 INFO L87 Difference]: Start difference. First operand 2934 states and 7018 transitions. Second operand 5 states. [2019-11-15 20:06:20,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:20,366 INFO L93 Difference]: Finished difference Result 2610 states and 6091 transitions. [2019-11-15 20:06:20,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:06:20,366 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2019-11-15 20:06:20,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:20,368 INFO L225 Difference]: With dead ends: 2610 [2019-11-15 20:06:20,369 INFO L226 Difference]: Without dead ends: 2592 [2019-11-15 20:06:20,369 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:06:20,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2592 states. [2019-11-15 20:06:20,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2592 to 2203. [2019-11-15 20:06:20,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2203 states. [2019-11-15 20:06:20,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2203 states to 2203 states and 5186 transitions. [2019-11-15 20:06:20,397 INFO L78 Accepts]: Start accepts. Automaton has 2203 states and 5186 transitions. Word has length 96 [2019-11-15 20:06:20,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:20,397 INFO L462 AbstractCegarLoop]: Abstraction has 2203 states and 5186 transitions. [2019-11-15 20:06:20,397 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:06:20,398 INFO L276 IsEmpty]: Start isEmpty. Operand 2203 states and 5186 transitions. [2019-11-15 20:06:20,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:06:20,399 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:20,399 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:20,400 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:20,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:20,400 INFO L82 PathProgramCache]: Analyzing trace with hash -1538208784, now seen corresponding path program 1 times [2019-11-15 20:06:20,400 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:20,400 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1166319978] [2019-11-15 20:06:20,400 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:20,400 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:20,400 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:20,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:20,550 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:20,550 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1166319978] [2019-11-15 20:06:20,551 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:20,551 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:06:20,551 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1774005245] [2019-11-15 20:06:20,551 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:06:20,552 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:20,552 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:06:20,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:06:20,552 INFO L87 Difference]: Start difference. First operand 2203 states and 5186 transitions. Second operand 5 states. [2019-11-15 20:06:20,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:20,659 INFO L93 Difference]: Finished difference Result 2217 states and 5215 transitions. [2019-11-15 20:06:20,659 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:06:20,660 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2019-11-15 20:06:20,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:20,663 INFO L225 Difference]: With dead ends: 2217 [2019-11-15 20:06:20,663 INFO L226 Difference]: Without dead ends: 2217 [2019-11-15 20:06:20,663 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:06:20,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2217 states. [2019-11-15 20:06:20,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2217 to 2197. [2019-11-15 20:06:20,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2197 states. [2019-11-15 20:06:20,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2197 states to 2197 states and 5173 transitions. [2019-11-15 20:06:20,695 INFO L78 Accepts]: Start accepts. Automaton has 2197 states and 5173 transitions. Word has length 96 [2019-11-15 20:06:20,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:20,696 INFO L462 AbstractCegarLoop]: Abstraction has 2197 states and 5173 transitions. [2019-11-15 20:06:20,696 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:06:20,696 INFO L276 IsEmpty]: Start isEmpty. Operand 2197 states and 5173 transitions. [2019-11-15 20:06:20,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:06:20,699 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:20,699 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:20,700 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:20,700 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:20,700 INFO L82 PathProgramCache]: Analyzing trace with hash 1227396560, now seen corresponding path program 2 times [2019-11-15 20:06:20,700 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:20,701 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1922892872] [2019-11-15 20:06:20,701 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:20,701 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:20,701 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:20,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:20,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:20,824 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1922892872] [2019-11-15 20:06:20,824 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:20,824 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:06:20,824 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1020561381] [2019-11-15 20:06:20,825 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:06:20,825 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:20,825 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:06:20,825 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:06:20,825 INFO L87 Difference]: Start difference. First operand 2197 states and 5173 transitions. Second operand 5 states. [2019-11-15 20:06:20,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:20,922 INFO L93 Difference]: Finished difference Result 2086 states and 4900 transitions. [2019-11-15 20:06:20,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:06:20,923 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2019-11-15 20:06:20,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:20,926 INFO L225 Difference]: With dead ends: 2086 [2019-11-15 20:06:20,926 INFO L226 Difference]: Without dead ends: 2086 [2019-11-15 20:06:20,927 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:06:20,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2086 states. [2019-11-15 20:06:20,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2086 to 2038. [2019-11-15 20:06:20,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2038 states. [2019-11-15 20:06:20,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2038 states to 2038 states and 4799 transitions. [2019-11-15 20:06:20,956 INFO L78 Accepts]: Start accepts. Automaton has 2038 states and 4799 transitions. Word has length 96 [2019-11-15 20:06:20,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:20,956 INFO L462 AbstractCegarLoop]: Abstraction has 2038 states and 4799 transitions. [2019-11-15 20:06:20,957 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:06:20,957 INFO L276 IsEmpty]: Start isEmpty. Operand 2038 states and 4799 transitions. [2019-11-15 20:06:20,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:06:20,959 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:20,959 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:20,960 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:20,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:20,960 INFO L82 PathProgramCache]: Analyzing trace with hash 2030821392, now seen corresponding path program 1 times [2019-11-15 20:06:20,961 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:20,961 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [440068800] [2019-11-15 20:06:20,961 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:20,961 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:20,961 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:20,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:21,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:21,109 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [440068800] [2019-11-15 20:06:21,110 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:21,110 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:06:21,110 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [870885128] [2019-11-15 20:06:21,110 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:06:21,111 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:21,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:06:21,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:06:21,111 INFO L87 Difference]: Start difference. First operand 2038 states and 4799 transitions. Second operand 6 states. [2019-11-15 20:06:21,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:21,379 INFO L93 Difference]: Finished difference Result 2237 states and 5197 transitions. [2019-11-15 20:06:21,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 20:06:21,380 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-15 20:06:21,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:21,383 INFO L225 Difference]: With dead ends: 2237 [2019-11-15 20:06:21,384 INFO L226 Difference]: Without dead ends: 2237 [2019-11-15 20:06:21,384 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2019-11-15 20:06:21,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2237 states. [2019-11-15 20:06:21,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2237 to 2109. [2019-11-15 20:06:21,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2109 states. [2019-11-15 20:06:21,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2109 states to 2109 states and 4949 transitions. [2019-11-15 20:06:21,417 INFO L78 Accepts]: Start accepts. Automaton has 2109 states and 4949 transitions. Word has length 96 [2019-11-15 20:06:21,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:21,418 INFO L462 AbstractCegarLoop]: Abstraction has 2109 states and 4949 transitions. [2019-11-15 20:06:21,418 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:06:21,418 INFO L276 IsEmpty]: Start isEmpty. Operand 2109 states and 4949 transitions. [2019-11-15 20:06:21,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:06:21,421 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:21,421 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:21,421 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:21,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:21,422 INFO L82 PathProgramCache]: Analyzing trace with hash -1934380143, now seen corresponding path program 1 times [2019-11-15 20:06:21,422 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:21,424 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1479844993] [2019-11-15 20:06:21,425 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:21,425 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:21,425 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:21,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:06:21,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:06:21,605 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1479844993] [2019-11-15 20:06:21,606 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:06:21,606 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:06:21,606 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1517984864] [2019-11-15 20:06:21,607 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:06:21,607 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:06:21,608 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:06:21,608 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:06:21,608 INFO L87 Difference]: Start difference. First operand 2109 states and 4949 transitions. Second operand 7 states. [2019-11-15 20:06:21,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:06:21,743 INFO L93 Difference]: Finished difference Result 3400 states and 8085 transitions. [2019-11-15 20:06:21,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:06:21,744 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2019-11-15 20:06:21,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:06:21,746 INFO L225 Difference]: With dead ends: 3400 [2019-11-15 20:06:21,746 INFO L226 Difference]: Without dead ends: 1372 [2019-11-15 20:06:21,748 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-11-15 20:06:21,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1372 states. [2019-11-15 20:06:21,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1372 to 1372. [2019-11-15 20:06:21,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1372 states. [2019-11-15 20:06:21,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1372 states to 1372 states and 3268 transitions. [2019-11-15 20:06:21,770 INFO L78 Accepts]: Start accepts. Automaton has 1372 states and 3268 transitions. Word has length 96 [2019-11-15 20:06:21,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:06:21,771 INFO L462 AbstractCegarLoop]: Abstraction has 1372 states and 3268 transitions. [2019-11-15 20:06:21,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:06:21,771 INFO L276 IsEmpty]: Start isEmpty. Operand 1372 states and 3268 transitions. [2019-11-15 20:06:21,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:06:21,773 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:06:21,773 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:06:21,774 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:06:21,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:06:21,774 INFO L82 PathProgramCache]: Analyzing trace with hash 2062962383, now seen corresponding path program 2 times [2019-11-15 20:06:21,774 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:06:21,775 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1923280003] [2019-11-15 20:06:21,775 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:21,775 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:06:21,775 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:06:21,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:06:21,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:06:21,897 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 20:06:21,897 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 20:06:22,094 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 20:06:22,096 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 08:06:22 BasicIcfg [2019-11-15 20:06:22,096 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 20:06:22,096 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 20:06:22,097 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 20:06:22,097 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 20:06:22,097 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:05:24" (3/4) ... [2019-11-15 20:06:22,099 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 20:06:22,238 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_16da411c-069d-4cde-bcd0-e3d3ef176e81/bin/uautomizer/witness.graphml [2019-11-15 20:06:22,239 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 20:06:22,241 INFO L168 Benchmark]: Toolchain (without parser) took 59499.69 ms. Allocated memory was 1.0 GB in the beginning and 5.3 GB in the end (delta: 4.3 GB). Free memory was 940.7 MB in the beginning and 4.2 GB in the end (delta: -3.3 GB). Peak memory consumption was 1.0 GB. Max. memory is 11.5 GB. [2019-11-15 20:06:22,242 INFO L168 Benchmark]: CDTParser took 0.28 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:06:22,243 INFO L168 Benchmark]: CACSL2BoogieTranslator took 805.88 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 145.8 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -171.4 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-11-15 20:06:22,244 INFO L168 Benchmark]: Boogie Procedure Inliner took 72.06 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-11-15 20:06:22,244 INFO L168 Benchmark]: Boogie Preprocessor took 40.52 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:06:22,245 INFO L168 Benchmark]: RCFGBuilder took 1036.76 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 49.2 MB). Peak memory consumption was 49.2 MB. Max. memory is 11.5 GB. [2019-11-15 20:06:22,247 INFO L168 Benchmark]: TraceAbstraction took 57391.25 ms. Allocated memory was 1.2 GB in the beginning and 5.3 GB in the end (delta: 4.2 GB). Free memory was 1.1 GB in the beginning and 4.2 GB in the end (delta: -3.2 GB). Peak memory consumption was 982.0 MB. Max. memory is 11.5 GB. [2019-11-15 20:06:22,247 INFO L168 Benchmark]: Witness Printer took 142.48 ms. Allocated memory is still 5.3 GB. Free memory was 4.2 GB in the beginning and 4.2 GB in the end (delta: 21.1 MB). Peak memory consumption was 21.1 MB. Max. memory is 11.5 GB. [2019-11-15 20:06:22,250 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.28 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 805.88 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 145.8 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -171.4 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 72.06 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 40.52 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 1036.76 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 49.2 MB). Peak memory consumption was 49.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 57391.25 ms. Allocated memory was 1.2 GB in the beginning and 5.3 GB in the end (delta: 4.2 GB). Free memory was 1.1 GB in the beginning and 4.2 GB in the end (delta: -3.2 GB). Peak memory consumption was 982.0 MB. Max. memory is 11.5 GB. * Witness Printer took 142.48 ms. Allocated memory is still 5.3 GB. Free memory was 4.2 GB in the beginning and 4.2 GB in the end (delta: 21.1 MB). Peak memory consumption was 21.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L698] 0 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L699] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L700] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L702] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L704] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L705] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L706] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L707] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L708] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L709] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L710] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L711] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L712] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L713] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L714] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L715] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L716] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L717] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L718] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L720] 0 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L721] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L722] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L788] 0 pthread_t t1607; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L789] FCALL, FORK 0 pthread_create(&t1607, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L790] 0 pthread_t t1608; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L791] FCALL, FORK 0 pthread_create(&t1608, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L746] 2 y$w_buff1 = y$w_buff0 [L747] 2 y$w_buff0 = 2 [L748] 2 y$w_buff1_used = y$w_buff0_used [L749] 2 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L751] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L752] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L753] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L754] 2 y$r_buff0_thd2 = (_Bool)1 [L757] 2 z = 1 [L760] 2 __unbuffered_p1_EAX = z [L763] 2 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L726] 1 x = 1 [L729] 1 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L732] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L732] EXPR 1 y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=1, z=1] [L732] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=1, z=1] [L732] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L733] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L733] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L734] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L766] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L734] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L766] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L767] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L767] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L768] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L768] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L769] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L769] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L770] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L770] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L773] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L735] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L735] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L736] 1 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L739] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L793] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L798] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L798] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L799] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L799] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L800] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L800] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L801] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L801] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L804] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L805] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L806] 0 y$flush_delayed = weak$$choice2 [L807] 0 y$mem_tmp = y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L809] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L809] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L810] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L810] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L811] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L811] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L812] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L812] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L813] EXPR 0 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L813] 0 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L814] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L814] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L815] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L816] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L816] 0 y = y$flush_delayed ? y$mem_tmp : y [L817] 0 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 177 locations, 3 error locations. Result: UNSAFE, OverallTime: 57.2s, OverallIterations: 33, TraceHistogramMax: 1, AutomataDifference: 24.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8565 SDtfs, 8725 SDslu, 19345 SDs, 0 SdLazy, 8808 SolverSat, 573 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 336 GetRequests, 87 SyntacticMatches, 20 SemanticMatches, 229 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 474 ImplicationChecksByTransitivity, 3.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=76147occurred in iteration=13, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 25.9s AutomataMinimizationTime, 32 MinimizatonAttempts, 128769 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.8s InterpolantComputationTime, 2561 NumberOfCodeBlocks, 2561 NumberOfCodeBlocksAsserted, 33 NumberOfCheckSat, 2433 ConstructedInterpolants, 0 QuantifiedInterpolants, 451318 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 32 InterpolantComputations, 32 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...