./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi001_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_bcee2b57-9fea-417d-b694-47b6a60119b5/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_bcee2b57-9fea-417d-b694-47b6a60119b5/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_bcee2b57-9fea-417d-b694-47b6a60119b5/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_bcee2b57-9fea-417d-b694-47b6a60119b5/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi001_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_bcee2b57-9fea-417d-b694-47b6a60119b5/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_bcee2b57-9fea-417d-b694-47b6a60119b5/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a6016f10387eb4b26de686db9a2753e52cad86d3 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 20:38:01,496 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 20:38:01,500 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 20:38:01,519 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 20:38:01,519 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 20:38:01,521 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 20:38:01,524 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 20:38:01,526 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 20:38:01,528 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 20:38:01,530 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 20:38:01,531 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 20:38:01,532 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 20:38:01,533 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 20:38:01,534 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 20:38:01,535 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 20:38:01,536 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 20:38:01,537 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 20:38:01,538 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 20:38:01,541 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 20:38:01,543 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 20:38:01,545 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 20:38:01,546 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 20:38:01,548 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 20:38:01,548 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 20:38:01,551 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 20:38:01,552 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 20:38:01,552 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 20:38:01,553 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 20:38:01,554 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 20:38:01,555 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 20:38:01,556 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 20:38:01,556 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 20:38:01,557 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 20:38:01,558 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 20:38:01,560 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 20:38:01,560 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 20:38:01,561 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 20:38:01,561 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 20:38:01,561 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 20:38:01,563 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 20:38:01,563 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 20:38:01,564 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_bcee2b57-9fea-417d-b694-47b6a60119b5/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 20:38:01,579 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 20:38:01,580 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 20:38:01,581 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 20:38:01,581 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 20:38:01,582 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 20:38:01,582 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 20:38:01,582 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 20:38:01,583 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 20:38:01,583 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 20:38:01,583 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 20:38:01,584 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 20:38:01,584 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 20:38:01,584 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 20:38:01,584 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 20:38:01,585 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 20:38:01,585 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 20:38:01,585 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 20:38:01,586 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 20:38:01,586 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 20:38:01,586 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 20:38:01,587 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 20:38:01,587 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:38:01,587 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 20:38:01,588 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 20:38:01,588 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 20:38:01,588 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 20:38:01,589 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 20:38:01,589 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 20:38:01,589 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_bcee2b57-9fea-417d-b694-47b6a60119b5/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a6016f10387eb4b26de686db9a2753e52cad86d3 [2019-11-15 20:38:01,634 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 20:38:01,652 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 20:38:01,656 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 20:38:01,657 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 20:38:01,657 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 20:38:01,659 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_bcee2b57-9fea-417d-b694-47b6a60119b5/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/rfi001_rmo.opt.i [2019-11-15 20:38:01,734 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_bcee2b57-9fea-417d-b694-47b6a60119b5/bin/uautomizer/data/d9833f51d/8d9a0c62d17c491ab8d05c0c04778968/FLAG0e67c920c [2019-11-15 20:38:02,296 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 20:38:02,297 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_bcee2b57-9fea-417d-b694-47b6a60119b5/sv-benchmarks/c/pthread-wmm/rfi001_rmo.opt.i [2019-11-15 20:38:02,317 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_bcee2b57-9fea-417d-b694-47b6a60119b5/bin/uautomizer/data/d9833f51d/8d9a0c62d17c491ab8d05c0c04778968/FLAG0e67c920c [2019-11-15 20:38:02,579 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_bcee2b57-9fea-417d-b694-47b6a60119b5/bin/uautomizer/data/d9833f51d/8d9a0c62d17c491ab8d05c0c04778968 [2019-11-15 20:38:02,583 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 20:38:02,584 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 20:38:02,589 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 20:38:02,589 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 20:38:02,594 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 20:38:02,595 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:38:02" (1/1) ... [2019-11-15 20:38:02,598 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7e47d9c3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:38:02, skipping insertion in model container [2019-11-15 20:38:02,598 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:38:02" (1/1) ... [2019-11-15 20:38:02,607 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 20:38:02,696 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 20:38:03,265 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:38:03,278 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 20:38:03,376 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:38:03,459 INFO L192 MainTranslator]: Completed translation [2019-11-15 20:38:03,460 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:38:03 WrapperNode [2019-11-15 20:38:03,460 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 20:38:03,461 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 20:38:03,461 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 20:38:03,462 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 20:38:03,472 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:38:03" (1/1) ... [2019-11-15 20:38:03,494 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:38:03" (1/1) ... [2019-11-15 20:38:03,535 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 20:38:03,535 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 20:38:03,536 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 20:38:03,536 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 20:38:03,548 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:38:03" (1/1) ... [2019-11-15 20:38:03,548 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:38:03" (1/1) ... [2019-11-15 20:38:03,554 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:38:03" (1/1) ... [2019-11-15 20:38:03,554 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:38:03" (1/1) ... [2019-11-15 20:38:03,566 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:38:03" (1/1) ... [2019-11-15 20:38:03,570 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:38:03" (1/1) ... [2019-11-15 20:38:03,575 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:38:03" (1/1) ... [2019-11-15 20:38:03,581 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 20:38:03,581 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 20:38:03,582 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 20:38:03,582 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 20:38:03,584 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:38:03" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_bcee2b57-9fea-417d-b694-47b6a60119b5/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:38:03,653 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 20:38:03,653 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 20:38:03,654 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 20:38:03,654 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 20:38:03,654 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 20:38:03,654 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 20:38:03,655 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 20:38:03,655 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 20:38:03,655 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 20:38:03,655 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 20:38:03,655 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 20:38:03,658 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 20:38:04,483 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 20:38:04,483 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 20:38:04,484 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:38:04 BoogieIcfgContainer [2019-11-15 20:38:04,484 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 20:38:04,486 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 20:38:04,486 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 20:38:04,489 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 20:38:04,489 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 08:38:02" (1/3) ... [2019-11-15 20:38:04,490 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@58909462 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:38:04, skipping insertion in model container [2019-11-15 20:38:04,491 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:38:03" (2/3) ... [2019-11-15 20:38:04,491 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@58909462 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:38:04, skipping insertion in model container [2019-11-15 20:38:04,491 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:38:04" (3/3) ... [2019-11-15 20:38:04,493 INFO L109 eAbstractionObserver]: Analyzing ICFG rfi001_rmo.opt.i [2019-11-15 20:38:04,535 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,536 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,536 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,536 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,536 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,537 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,537 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,537 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,537 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,538 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,538 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,538 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,538 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,539 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,539 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,539 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,539 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,539 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,540 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,540 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,540 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,540 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,541 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,541 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,542 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,542 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,542 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,542 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,543 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,543 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,544 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,544 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,545 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,545 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,545 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,545 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,545 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,546 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,547 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,554 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,555 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,555 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,556 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,557 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,557 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,558 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,559 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,559 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,559 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,560 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,561 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,561 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,561 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,561 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,562 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,563 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,563 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,563 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,563 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,564 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,564 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,564 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,564 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,565 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:38:04,572 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 20:38:04,573 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 20:38:04,581 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 20:38:04,592 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 20:38:04,611 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 20:38:04,611 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 20:38:04,611 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 20:38:04,611 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 20:38:04,612 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 20:38:04,612 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 20:38:04,612 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 20:38:04,612 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 20:38:04,627 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 141 places, 179 transitions [2019-11-15 20:38:06,773 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22495 states. [2019-11-15 20:38:06,776 INFO L276 IsEmpty]: Start isEmpty. Operand 22495 states. [2019-11-15 20:38:06,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-11-15 20:38:06,795 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:06,797 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:06,800 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:06,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:06,807 INFO L82 PathProgramCache]: Analyzing trace with hash -697756791, now seen corresponding path program 1 times [2019-11-15 20:38:06,817 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:06,818 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [827386216] [2019-11-15 20:38:06,819 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:06,819 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:06,819 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:07,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:07,249 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:07,250 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [827386216] [2019-11-15 20:38:07,252 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:07,252 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:38:07,253 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [58698528] [2019-11-15 20:38:07,258 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:38:07,258 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:07,275 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:38:07,276 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:38:07,279 INFO L87 Difference]: Start difference. First operand 22495 states. Second operand 4 states. [2019-11-15 20:38:07,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:07,887 INFO L93 Difference]: Finished difference Result 23447 states and 91748 transitions. [2019-11-15 20:38:07,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 20:38:07,889 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2019-11-15 20:38:07,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:08,160 INFO L225 Difference]: With dead ends: 23447 [2019-11-15 20:38:08,161 INFO L226 Difference]: Without dead ends: 21271 [2019-11-15 20:38:08,163 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:38:08,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21271 states. [2019-11-15 20:38:09,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21271 to 21271. [2019-11-15 20:38:09,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21271 states. [2019-11-15 20:38:09,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21271 states to 21271 states and 83772 transitions. [2019-11-15 20:38:09,635 INFO L78 Accepts]: Start accepts. Automaton has 21271 states and 83772 transitions. Word has length 38 [2019-11-15 20:38:09,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:09,637 INFO L462 AbstractCegarLoop]: Abstraction has 21271 states and 83772 transitions. [2019-11-15 20:38:09,637 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:38:09,637 INFO L276 IsEmpty]: Start isEmpty. Operand 21271 states and 83772 transitions. [2019-11-15 20:38:09,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-15 20:38:09,649 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:09,649 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:09,650 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:09,650 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:09,650 INFO L82 PathProgramCache]: Analyzing trace with hash 298957026, now seen corresponding path program 1 times [2019-11-15 20:38:09,650 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:09,651 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1630620342] [2019-11-15 20:38:09,651 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:09,651 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:09,651 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:09,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:09,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:09,819 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1630620342] [2019-11-15 20:38:09,819 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:09,819 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:38:09,820 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1334785217] [2019-11-15 20:38:09,826 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:38:09,826 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:09,827 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:38:09,827 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:38:09,827 INFO L87 Difference]: Start difference. First operand 21271 states and 83772 transitions. Second operand 5 states. [2019-11-15 20:38:10,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:10,928 INFO L93 Difference]: Finished difference Result 34705 states and 129064 transitions. [2019-11-15 20:38:10,929 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:38:10,929 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-11-15 20:38:10,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:11,107 INFO L225 Difference]: With dead ends: 34705 [2019-11-15 20:38:11,108 INFO L226 Difference]: Without dead ends: 34561 [2019-11-15 20:38:11,109 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:38:11,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34561 states. [2019-11-15 20:38:12,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34561 to 33061. [2019-11-15 20:38:12,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33061 states. [2019-11-15 20:38:12,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33061 states to 33061 states and 123952 transitions. [2019-11-15 20:38:12,677 INFO L78 Accepts]: Start accepts. Automaton has 33061 states and 123952 transitions. Word has length 45 [2019-11-15 20:38:12,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:12,679 INFO L462 AbstractCegarLoop]: Abstraction has 33061 states and 123952 transitions. [2019-11-15 20:38:12,679 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:38:12,679 INFO L276 IsEmpty]: Start isEmpty. Operand 33061 states and 123952 transitions. [2019-11-15 20:38:12,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-11-15 20:38:12,684 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:12,684 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:12,684 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:12,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:12,685 INFO L82 PathProgramCache]: Analyzing trace with hash 528900453, now seen corresponding path program 1 times [2019-11-15 20:38:12,685 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:12,686 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [919524338] [2019-11-15 20:38:12,686 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:12,686 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:12,686 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:12,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:12,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:12,803 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [919524338] [2019-11-15 20:38:12,803 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:12,803 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:38:12,803 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [790754665] [2019-11-15 20:38:12,804 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:38:12,804 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:12,804 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:38:12,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:38:12,804 INFO L87 Difference]: Start difference. First operand 33061 states and 123952 transitions. Second operand 5 states. [2019-11-15 20:38:14,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:14,086 INFO L93 Difference]: Finished difference Result 40213 states and 148621 transitions. [2019-11-15 20:38:14,087 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:38:14,087 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2019-11-15 20:38:14,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:14,221 INFO L225 Difference]: With dead ends: 40213 [2019-11-15 20:38:14,221 INFO L226 Difference]: Without dead ends: 40053 [2019-11-15 20:38:14,222 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:38:14,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40053 states. [2019-11-15 20:38:15,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40053 to 34634. [2019-11-15 20:38:15,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34634 states. [2019-11-15 20:38:15,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34634 states to 34634 states and 129248 transitions. [2019-11-15 20:38:15,412 INFO L78 Accepts]: Start accepts. Automaton has 34634 states and 129248 transitions. Word has length 46 [2019-11-15 20:38:15,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:15,413 INFO L462 AbstractCegarLoop]: Abstraction has 34634 states and 129248 transitions. [2019-11-15 20:38:15,413 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:38:15,413 INFO L276 IsEmpty]: Start isEmpty. Operand 34634 states and 129248 transitions. [2019-11-15 20:38:15,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-15 20:38:15,428 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:15,428 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:15,429 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:15,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:15,429 INFO L82 PathProgramCache]: Analyzing trace with hash 440704446, now seen corresponding path program 1 times [2019-11-15 20:38:15,430 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:15,430 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101156401] [2019-11-15 20:38:15,430 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:15,430 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:15,431 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:15,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:15,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:15,528 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1101156401] [2019-11-15 20:38:15,528 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:15,528 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:38:15,529 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1511417392] [2019-11-15 20:38:15,529 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:38:15,530 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:15,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:38:15,530 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:38:15,530 INFO L87 Difference]: Start difference. First operand 34634 states and 129248 transitions. Second operand 6 states. [2019-11-15 20:38:17,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:17,567 INFO L93 Difference]: Finished difference Result 45662 states and 166142 transitions. [2019-11-15 20:38:17,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 20:38:17,568 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-11-15 20:38:17,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:17,702 INFO L225 Difference]: With dead ends: 45662 [2019-11-15 20:38:17,702 INFO L226 Difference]: Without dead ends: 45518 [2019-11-15 20:38:17,703 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 20:38:18,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45518 states. [2019-11-15 20:38:18,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45518 to 33597. [2019-11-15 20:38:18,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33597 states. [2019-11-15 20:38:18,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33597 states to 33597 states and 125403 transitions. [2019-11-15 20:38:18,732 INFO L78 Accepts]: Start accepts. Automaton has 33597 states and 125403 transitions. Word has length 53 [2019-11-15 20:38:18,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:18,733 INFO L462 AbstractCegarLoop]: Abstraction has 33597 states and 125403 transitions. [2019-11-15 20:38:18,733 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:38:18,733 INFO L276 IsEmpty]: Start isEmpty. Operand 33597 states and 125403 transitions. [2019-11-15 20:38:18,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-15 20:38:18,772 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:18,773 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:18,773 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:18,773 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:18,774 INFO L82 PathProgramCache]: Analyzing trace with hash -2021901069, now seen corresponding path program 1 times [2019-11-15 20:38:18,774 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:18,774 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1928620009] [2019-11-15 20:38:18,774 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:18,775 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:18,775 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:18,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:18,882 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:18,884 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1928620009] [2019-11-15 20:38:18,884 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:18,885 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:38:18,885 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1197565119] [2019-11-15 20:38:18,886 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:38:18,886 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:18,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:38:18,887 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:38:18,887 INFO L87 Difference]: Start difference. First operand 33597 states and 125403 transitions. Second operand 6 states. [2019-11-15 20:38:20,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:20,746 INFO L93 Difference]: Finished difference Result 46069 states and 167836 transitions. [2019-11-15 20:38:20,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 20:38:20,746 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-11-15 20:38:20,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:20,844 INFO L225 Difference]: With dead ends: 46069 [2019-11-15 20:38:20,844 INFO L226 Difference]: Without dead ends: 45829 [2019-11-15 20:38:20,845 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 20:38:21,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45829 states. [2019-11-15 20:38:21,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45829 to 39958. [2019-11-15 20:38:21,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39958 states. [2019-11-15 20:38:21,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39958 states to 39958 states and 147327 transitions. [2019-11-15 20:38:21,738 INFO L78 Accepts]: Start accepts. Automaton has 39958 states and 147327 transitions. Word has length 60 [2019-11-15 20:38:21,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:21,739 INFO L462 AbstractCegarLoop]: Abstraction has 39958 states and 147327 transitions. [2019-11-15 20:38:21,739 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:38:21,739 INFO L276 IsEmpty]: Start isEmpty. Operand 39958 states and 147327 transitions. [2019-11-15 20:38:21,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-11-15 20:38:21,782 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:21,782 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:21,783 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:21,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:21,783 INFO L82 PathProgramCache]: Analyzing trace with hash -481942333, now seen corresponding path program 1 times [2019-11-15 20:38:21,783 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:21,784 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [791811583] [2019-11-15 20:38:21,784 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:21,784 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:21,784 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:21,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:21,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:21,838 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [791811583] [2019-11-15 20:38:21,839 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:21,839 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:38:21,839 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1996601076] [2019-11-15 20:38:21,840 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:38:21,840 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:21,840 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:38:21,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:38:21,841 INFO L87 Difference]: Start difference. First operand 39958 states and 147327 transitions. Second operand 3 states. [2019-11-15 20:38:22,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:22,098 INFO L93 Difference]: Finished difference Result 50256 states and 182162 transitions. [2019-11-15 20:38:22,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:38:22,098 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 62 [2019-11-15 20:38:22,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:22,213 INFO L225 Difference]: With dead ends: 50256 [2019-11-15 20:38:22,213 INFO L226 Difference]: Without dead ends: 50256 [2019-11-15 20:38:22,214 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:38:22,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50256 states. [2019-11-15 20:38:24,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50256 to 43888. [2019-11-15 20:38:24,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43888 states. [2019-11-15 20:38:24,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43888 states to 43888 states and 160765 transitions. [2019-11-15 20:38:24,298 INFO L78 Accepts]: Start accepts. Automaton has 43888 states and 160765 transitions. Word has length 62 [2019-11-15 20:38:24,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:24,299 INFO L462 AbstractCegarLoop]: Abstraction has 43888 states and 160765 transitions. [2019-11-15 20:38:24,299 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:38:24,299 INFO L276 IsEmpty]: Start isEmpty. Operand 43888 states and 160765 transitions. [2019-11-15 20:38:24,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-11-15 20:38:24,336 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:24,337 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:24,337 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:24,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:24,337 INFO L82 PathProgramCache]: Analyzing trace with hash 1024024957, now seen corresponding path program 1 times [2019-11-15 20:38:24,337 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:24,337 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [393122954] [2019-11-15 20:38:24,337 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:24,338 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:24,338 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:24,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:24,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:24,436 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [393122954] [2019-11-15 20:38:24,436 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:24,436 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:38:24,437 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [841409561] [2019-11-15 20:38:24,437 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:38:24,437 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:24,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:38:24,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:38:24,438 INFO L87 Difference]: Start difference. First operand 43888 states and 160765 transitions. Second operand 7 states. [2019-11-15 20:38:25,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:25,565 INFO L93 Difference]: Finished difference Result 55884 states and 200499 transitions. [2019-11-15 20:38:25,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 20:38:25,566 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-11-15 20:38:25,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:25,698 INFO L225 Difference]: With dead ends: 55884 [2019-11-15 20:38:25,698 INFO L226 Difference]: Without dead ends: 55644 [2019-11-15 20:38:25,699 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-15 20:38:25,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55644 states. [2019-11-15 20:38:26,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55644 to 45114. [2019-11-15 20:38:26,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45114 states. [2019-11-15 20:38:26,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45114 states to 45114 states and 164932 transitions. [2019-11-15 20:38:26,710 INFO L78 Accepts]: Start accepts. Automaton has 45114 states and 164932 transitions. Word has length 66 [2019-11-15 20:38:26,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:26,711 INFO L462 AbstractCegarLoop]: Abstraction has 45114 states and 164932 transitions. [2019-11-15 20:38:26,711 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:38:26,711 INFO L276 IsEmpty]: Start isEmpty. Operand 45114 states and 164932 transitions. [2019-11-15 20:38:26,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-11-15 20:38:26,750 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:26,751 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:26,751 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:26,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:26,751 INFO L82 PathProgramCache]: Analyzing trace with hash -2014746228, now seen corresponding path program 1 times [2019-11-15 20:38:26,751 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:26,752 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1505610472] [2019-11-15 20:38:26,752 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:26,752 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:26,752 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:26,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:26,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:26,856 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1505610472] [2019-11-15 20:38:26,856 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:26,856 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:38:26,856 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [380957287] [2019-11-15 20:38:26,857 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:38:26,857 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:26,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:38:26,858 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:38:26,858 INFO L87 Difference]: Start difference. First operand 45114 states and 164932 transitions. Second operand 7 states. [2019-11-15 20:38:30,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:30,508 INFO L93 Difference]: Finished difference Result 55098 states and 197676 transitions. [2019-11-15 20:38:30,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 20:38:30,508 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-11-15 20:38:30,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:30,654 INFO L225 Difference]: With dead ends: 55098 [2019-11-15 20:38:30,654 INFO L226 Difference]: Without dead ends: 54898 [2019-11-15 20:38:30,655 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-15 20:38:30,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54898 states. [2019-11-15 20:38:31,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54898 to 45992. [2019-11-15 20:38:31,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45992 states. [2019-11-15 20:38:31,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45992 states to 45992 states and 167803 transitions. [2019-11-15 20:38:31,665 INFO L78 Accepts]: Start accepts. Automaton has 45992 states and 167803 transitions. Word has length 67 [2019-11-15 20:38:31,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:31,666 INFO L462 AbstractCegarLoop]: Abstraction has 45992 states and 167803 transitions. [2019-11-15 20:38:31,666 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:38:31,666 INFO L276 IsEmpty]: Start isEmpty. Operand 45992 states and 167803 transitions. [2019-11-15 20:38:31,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 20:38:31,704 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:31,704 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:31,704 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:31,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:31,705 INFO L82 PathProgramCache]: Analyzing trace with hash 883100043, now seen corresponding path program 1 times [2019-11-15 20:38:31,705 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:31,705 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1032904066] [2019-11-15 20:38:31,705 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:31,705 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:31,705 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:31,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:31,784 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:31,785 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1032904066] [2019-11-15 20:38:31,786 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:31,786 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:38:31,786 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [919884850] [2019-11-15 20:38:31,787 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:38:31,787 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:31,787 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:38:31,788 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:38:31,788 INFO L87 Difference]: Start difference. First operand 45992 states and 167803 transitions. Second operand 3 states. [2019-11-15 20:38:32,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:32,395 INFO L93 Difference]: Finished difference Result 61486 states and 224137 transitions. [2019-11-15 20:38:32,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:38:32,395 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-11-15 20:38:32,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:32,541 INFO L225 Difference]: With dead ends: 61486 [2019-11-15 20:38:32,541 INFO L226 Difference]: Without dead ends: 61486 [2019-11-15 20:38:32,542 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:38:32,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61486 states. [2019-11-15 20:38:34,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61486 to 53433. [2019-11-15 20:38:34,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53433 states. [2019-11-15 20:38:34,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53433 states to 53433 states and 195616 transitions. [2019-11-15 20:38:34,571 INFO L78 Accepts]: Start accepts. Automaton has 53433 states and 195616 transitions. Word has length 69 [2019-11-15 20:38:34,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:34,572 INFO L462 AbstractCegarLoop]: Abstraction has 53433 states and 195616 transitions. [2019-11-15 20:38:34,572 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:38:34,572 INFO L276 IsEmpty]: Start isEmpty. Operand 53433 states and 195616 transitions. [2019-11-15 20:38:34,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 20:38:34,624 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:34,624 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:34,624 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:34,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:34,625 INFO L82 PathProgramCache]: Analyzing trace with hash -1887210997, now seen corresponding path program 1 times [2019-11-15 20:38:34,625 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:34,625 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [298953179] [2019-11-15 20:38:34,626 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:34,626 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:34,626 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:34,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:34,778 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:34,778 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [298953179] [2019-11-15 20:38:34,778 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:34,779 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:38:34,779 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2004647622] [2019-11-15 20:38:34,779 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:38:34,779 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:34,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:38:34,780 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:38:34,780 INFO L87 Difference]: Start difference. First operand 53433 states and 195616 transitions. Second operand 6 states. [2019-11-15 20:38:35,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:35,562 INFO L93 Difference]: Finished difference Result 65982 states and 238830 transitions. [2019-11-15 20:38:35,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:38:35,563 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 69 [2019-11-15 20:38:35,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:35,716 INFO L225 Difference]: With dead ends: 65982 [2019-11-15 20:38:35,717 INFO L226 Difference]: Without dead ends: 65338 [2019-11-15 20:38:35,717 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:38:36,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65338 states. [2019-11-15 20:38:36,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65338 to 56042. [2019-11-15 20:38:36,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56042 states. [2019-11-15 20:38:36,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56042 states to 56042 states and 204333 transitions. [2019-11-15 20:38:36,975 INFO L78 Accepts]: Start accepts. Automaton has 56042 states and 204333 transitions. Word has length 69 [2019-11-15 20:38:36,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:36,975 INFO L462 AbstractCegarLoop]: Abstraction has 56042 states and 204333 transitions. [2019-11-15 20:38:36,975 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:38:36,975 INFO L276 IsEmpty]: Start isEmpty. Operand 56042 states and 204333 transitions. [2019-11-15 20:38:37,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 20:38:37,036 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:37,036 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:37,037 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:37,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:37,037 INFO L82 PathProgramCache]: Analyzing trace with hash -925596980, now seen corresponding path program 1 times [2019-11-15 20:38:37,038 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:37,038 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113376200] [2019-11-15 20:38:37,038 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:37,038 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:37,038 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:37,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:37,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:37,202 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [113376200] [2019-11-15 20:38:37,202 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:37,202 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:38:37,203 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1422745023] [2019-11-15 20:38:37,203 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:38:37,203 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:37,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:38:37,204 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:38:37,204 INFO L87 Difference]: Start difference. First operand 56042 states and 204333 transitions. Second operand 7 states. [2019-11-15 20:38:38,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:38,493 INFO L93 Difference]: Finished difference Result 83030 states and 292761 transitions. [2019-11-15 20:38:38,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 20:38:38,493 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 69 [2019-11-15 20:38:38,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:38,681 INFO L225 Difference]: With dead ends: 83030 [2019-11-15 20:38:38,681 INFO L226 Difference]: Without dead ends: 83030 [2019-11-15 20:38:38,682 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:38:39,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83030 states. [2019-11-15 20:38:40,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83030 to 76079. [2019-11-15 20:38:40,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76079 states. [2019-11-15 20:38:41,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76079 states to 76079 states and 270628 transitions. [2019-11-15 20:38:41,006 INFO L78 Accepts]: Start accepts. Automaton has 76079 states and 270628 transitions. Word has length 69 [2019-11-15 20:38:41,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:41,007 INFO L462 AbstractCegarLoop]: Abstraction has 76079 states and 270628 transitions. [2019-11-15 20:38:41,007 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:38:41,007 INFO L276 IsEmpty]: Start isEmpty. Operand 76079 states and 270628 transitions. [2019-11-15 20:38:41,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-15 20:38:41,070 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:41,070 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:41,071 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:41,071 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:41,071 INFO L82 PathProgramCache]: Analyzing trace with hash 319167501, now seen corresponding path program 1 times [2019-11-15 20:38:41,071 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:41,071 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [355883731] [2019-11-15 20:38:41,071 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:41,072 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:41,072 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:41,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:41,145 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:41,146 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [355883731] [2019-11-15 20:38:41,146 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:41,146 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:38:41,146 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [744180419] [2019-11-15 20:38:41,147 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:38:41,147 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:41,147 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:38:41,148 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:38:41,148 INFO L87 Difference]: Start difference. First operand 76079 states and 270628 transitions. Second operand 3 states. [2019-11-15 20:38:41,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:41,486 INFO L93 Difference]: Finished difference Result 54415 states and 197409 transitions. [2019-11-15 20:38:41,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:38:41,486 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-11-15 20:38:41,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:41,621 INFO L225 Difference]: With dead ends: 54415 [2019-11-15 20:38:41,621 INFO L226 Difference]: Without dead ends: 54253 [2019-11-15 20:38:41,621 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:38:41,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54253 states. [2019-11-15 20:38:42,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54253 to 54213. [2019-11-15 20:38:42,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54213 states. [2019-11-15 20:38:42,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54213 states to 54213 states and 196824 transitions. [2019-11-15 20:38:42,755 INFO L78 Accepts]: Start accepts. Automaton has 54213 states and 196824 transitions. Word has length 69 [2019-11-15 20:38:42,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:42,755 INFO L462 AbstractCegarLoop]: Abstraction has 54213 states and 196824 transitions. [2019-11-15 20:38:42,755 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:38:42,755 INFO L276 IsEmpty]: Start isEmpty. Operand 54213 states and 196824 transitions. [2019-11-15 20:38:42,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 20:38:42,804 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:42,804 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:42,804 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:42,804 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:42,804 INFO L82 PathProgramCache]: Analyzing trace with hash 871106303, now seen corresponding path program 1 times [2019-11-15 20:38:42,805 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:42,805 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [933446801] [2019-11-15 20:38:42,805 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:42,805 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:42,805 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:42,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:42,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:42,926 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [933446801] [2019-11-15 20:38:42,926 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:42,926 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:38:42,926 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302536197] [2019-11-15 20:38:42,927 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:38:42,927 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:42,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:38:42,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:38:42,927 INFO L87 Difference]: Start difference. First operand 54213 states and 196824 transitions. Second operand 5 states. [2019-11-15 20:38:43,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:43,749 INFO L93 Difference]: Finished difference Result 84428 states and 303656 transitions. [2019-11-15 20:38:43,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:38:43,749 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2019-11-15 20:38:43,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:43,959 INFO L225 Difference]: With dead ends: 84428 [2019-11-15 20:38:43,959 INFO L226 Difference]: Without dead ends: 84232 [2019-11-15 20:38:43,959 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:38:44,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84232 states. [2019-11-15 20:38:46,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84232 to 76147. [2019-11-15 20:38:46,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76147 states. [2019-11-15 20:38:46,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76147 states to 76147 states and 275544 transitions. [2019-11-15 20:38:46,294 INFO L78 Accepts]: Start accepts. Automaton has 76147 states and 275544 transitions. Word has length 70 [2019-11-15 20:38:46,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:46,294 INFO L462 AbstractCegarLoop]: Abstraction has 76147 states and 275544 transitions. [2019-11-15 20:38:46,294 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:38:46,294 INFO L276 IsEmpty]: Start isEmpty. Operand 76147 states and 275544 transitions. [2019-11-15 20:38:46,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 20:38:46,359 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:46,359 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:46,359 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:46,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:46,360 INFO L82 PathProgramCache]: Analyzing trace with hash 2115870784, now seen corresponding path program 1 times [2019-11-15 20:38:46,360 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:46,360 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [684549030] [2019-11-15 20:38:46,360 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:46,360 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:46,360 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:46,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:46,466 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:46,466 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [684549030] [2019-11-15 20:38:46,466 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:46,466 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:38:46,467 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1813927799] [2019-11-15 20:38:46,467 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:38:46,467 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:46,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:38:46,468 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:38:46,468 INFO L87 Difference]: Start difference. First operand 76147 states and 275544 transitions. Second operand 4 states. [2019-11-15 20:38:46,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:46,581 INFO L93 Difference]: Finished difference Result 19615 states and 62265 transitions. [2019-11-15 20:38:46,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:38:46,582 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 70 [2019-11-15 20:38:46,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:46,622 INFO L225 Difference]: With dead ends: 19615 [2019-11-15 20:38:46,622 INFO L226 Difference]: Without dead ends: 19137 [2019-11-15 20:38:46,623 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:38:46,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19137 states. [2019-11-15 20:38:46,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19137 to 19125. [2019-11-15 20:38:46,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19125 states. [2019-11-15 20:38:46,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19125 states to 19125 states and 60760 transitions. [2019-11-15 20:38:46,919 INFO L78 Accepts]: Start accepts. Automaton has 19125 states and 60760 transitions. Word has length 70 [2019-11-15 20:38:46,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:46,919 INFO L462 AbstractCegarLoop]: Abstraction has 19125 states and 60760 transitions. [2019-11-15 20:38:46,919 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:38:46,920 INFO L276 IsEmpty]: Start isEmpty. Operand 19125 states and 60760 transitions. [2019-11-15 20:38:46,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 20:38:46,938 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:46,938 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:46,938 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:46,938 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:46,938 INFO L82 PathProgramCache]: Analyzing trace with hash -1855900557, now seen corresponding path program 1 times [2019-11-15 20:38:46,938 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:46,939 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1392757595] [2019-11-15 20:38:46,939 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:46,939 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:46,939 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:46,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:47,019 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:47,020 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1392757595] [2019-11-15 20:38:47,020 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:47,020 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:38:47,020 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [825853139] [2019-11-15 20:38:47,021 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:38:47,021 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:47,021 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:38:47,021 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:38:47,022 INFO L87 Difference]: Start difference. First operand 19125 states and 60760 transitions. Second operand 4 states. [2019-11-15 20:38:47,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:47,380 INFO L93 Difference]: Finished difference Result 24075 states and 75428 transitions. [2019-11-15 20:38:47,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:38:47,381 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-11-15 20:38:47,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:47,435 INFO L225 Difference]: With dead ends: 24075 [2019-11-15 20:38:47,435 INFO L226 Difference]: Without dead ends: 24075 [2019-11-15 20:38:47,438 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:38:47,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24075 states. [2019-11-15 20:38:47,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24075 to 19965. [2019-11-15 20:38:47,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19965 states. [2019-11-15 20:38:47,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19965 states to 19965 states and 63127 transitions. [2019-11-15 20:38:47,901 INFO L78 Accepts]: Start accepts. Automaton has 19965 states and 63127 transitions. Word has length 79 [2019-11-15 20:38:47,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:47,902 INFO L462 AbstractCegarLoop]: Abstraction has 19965 states and 63127 transitions. [2019-11-15 20:38:47,902 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:38:47,902 INFO L276 IsEmpty]: Start isEmpty. Operand 19965 states and 63127 transitions. [2019-11-15 20:38:47,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 20:38:47,931 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:47,931 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:47,932 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:47,932 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:47,932 INFO L82 PathProgramCache]: Analyzing trace with hash -2110637102, now seen corresponding path program 1 times [2019-11-15 20:38:47,933 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:47,933 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1570053858] [2019-11-15 20:38:47,933 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:47,933 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:47,933 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:47,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:48,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:48,083 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1570053858] [2019-11-15 20:38:48,083 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:48,083 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:38:48,084 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [358735765] [2019-11-15 20:38:48,084 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:38:48,084 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:48,085 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:38:48,085 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:38:48,085 INFO L87 Difference]: Start difference. First operand 19965 states and 63127 transitions. Second operand 8 states. [2019-11-15 20:38:49,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:49,160 INFO L93 Difference]: Finished difference Result 22071 states and 69319 transitions. [2019-11-15 20:38:49,160 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-11-15 20:38:49,161 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 79 [2019-11-15 20:38:49,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:49,202 INFO L225 Difference]: With dead ends: 22071 [2019-11-15 20:38:49,203 INFO L226 Difference]: Without dead ends: 22023 [2019-11-15 20:38:49,203 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=404, Unknown=0, NotChecked=0, Total=506 [2019-11-15 20:38:49,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22023 states. [2019-11-15 20:38:49,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22023 to 19437. [2019-11-15 20:38:49,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19437 states. [2019-11-15 20:38:49,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19437 states to 19437 states and 61629 transitions. [2019-11-15 20:38:49,527 INFO L78 Accepts]: Start accepts. Automaton has 19437 states and 61629 transitions. Word has length 79 [2019-11-15 20:38:49,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:49,528 INFO L462 AbstractCegarLoop]: Abstraction has 19437 states and 61629 transitions. [2019-11-15 20:38:49,528 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:38:49,528 INFO L276 IsEmpty]: Start isEmpty. Operand 19437 states and 61629 transitions. [2019-11-15 20:38:49,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 20:38:49,550 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:49,550 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:49,550 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:49,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:49,551 INFO L82 PathProgramCache]: Analyzing trace with hash -1015310952, now seen corresponding path program 1 times [2019-11-15 20:38:49,551 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:49,551 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1134523713] [2019-11-15 20:38:49,551 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:49,551 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:49,551 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:49,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:49,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:49,669 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1134523713] [2019-11-15 20:38:49,669 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:49,669 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:38:49,670 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1885811343] [2019-11-15 20:38:49,670 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:38:49,670 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:49,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:38:49,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:38:49,671 INFO L87 Difference]: Start difference. First operand 19437 states and 61629 transitions. Second operand 8 states. [2019-11-15 20:38:52,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:52,420 INFO L93 Difference]: Finished difference Result 50431 states and 153647 transitions. [2019-11-15 20:38:52,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-11-15 20:38:52,422 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 82 [2019-11-15 20:38:52,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:52,515 INFO L225 Difference]: With dead ends: 50431 [2019-11-15 20:38:52,515 INFO L226 Difference]: Without dead ends: 49732 [2019-11-15 20:38:52,516 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=153, Invalid=497, Unknown=0, NotChecked=0, Total=650 [2019-11-15 20:38:52,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49732 states. [2019-11-15 20:38:53,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49732 to 29965. [2019-11-15 20:38:53,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29965 states. [2019-11-15 20:38:53,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29965 states to 29965 states and 93559 transitions. [2019-11-15 20:38:53,157 INFO L78 Accepts]: Start accepts. Automaton has 29965 states and 93559 transitions. Word has length 82 [2019-11-15 20:38:53,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:53,157 INFO L462 AbstractCegarLoop]: Abstraction has 29965 states and 93559 transitions. [2019-11-15 20:38:53,157 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:38:53,157 INFO L276 IsEmpty]: Start isEmpty. Operand 29965 states and 93559 transitions. [2019-11-15 20:38:53,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 20:38:53,193 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:53,193 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:53,193 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:53,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:53,193 INFO L82 PathProgramCache]: Analyzing trace with hash -53696935, now seen corresponding path program 1 times [2019-11-15 20:38:53,193 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:53,194 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616879458] [2019-11-15 20:38:53,194 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:53,194 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:53,194 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:53,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:53,310 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:53,310 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616879458] [2019-11-15 20:38:53,311 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:53,311 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:38:53,311 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1947985388] [2019-11-15 20:38:53,312 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:38:53,312 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:53,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:38:53,313 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:38:53,313 INFO L87 Difference]: Start difference. First operand 29965 states and 93559 transitions. Second operand 6 states. [2019-11-15 20:38:54,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:54,114 INFO L93 Difference]: Finished difference Result 31403 states and 97496 transitions. [2019-11-15 20:38:54,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:38:54,115 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-11-15 20:38:54,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:54,169 INFO L225 Difference]: With dead ends: 31403 [2019-11-15 20:38:54,169 INFO L226 Difference]: Without dead ends: 31403 [2019-11-15 20:38:54,170 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:38:54,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31403 states. [2019-11-15 20:38:54,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31403 to 29634. [2019-11-15 20:38:54,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29634 states. [2019-11-15 20:38:54,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29634 states to 29634 states and 92402 transitions. [2019-11-15 20:38:54,856 INFO L78 Accepts]: Start accepts. Automaton has 29634 states and 92402 transitions. Word has length 82 [2019-11-15 20:38:54,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:54,857 INFO L462 AbstractCegarLoop]: Abstraction has 29634 states and 92402 transitions. [2019-11-15 20:38:54,857 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:38:54,857 INFO L276 IsEmpty]: Start isEmpty. Operand 29634 states and 92402 transitions. [2019-11-15 20:38:54,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 20:38:54,887 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:54,887 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:54,887 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:54,887 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:54,887 INFO L82 PathProgramCache]: Analyzing trace with hash -1989357222, now seen corresponding path program 1 times [2019-11-15 20:38:54,888 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:54,888 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1775602709] [2019-11-15 20:38:54,888 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:54,888 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:54,888 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:54,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:55,027 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:55,028 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1775602709] [2019-11-15 20:38:55,028 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:55,029 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:38:55,029 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1182888837] [2019-11-15 20:38:55,029 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:38:55,029 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:55,030 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:38:55,030 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:38:55,030 INFO L87 Difference]: Start difference. First operand 29634 states and 92402 transitions. Second operand 7 states. [2019-11-15 20:38:55,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:55,799 INFO L93 Difference]: Finished difference Result 31148 states and 96558 transitions. [2019-11-15 20:38:55,799 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 20:38:55,799 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 82 [2019-11-15 20:38:55,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:55,853 INFO L225 Difference]: With dead ends: 31148 [2019-11-15 20:38:55,853 INFO L226 Difference]: Without dead ends: 31148 [2019-11-15 20:38:55,853 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:38:55,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31148 states. [2019-11-15 20:38:56,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31148 to 29966. [2019-11-15 20:38:56,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29966 states. [2019-11-15 20:38:56,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29966 states to 29966 states and 93233 transitions. [2019-11-15 20:38:56,336 INFO L78 Accepts]: Start accepts. Automaton has 29966 states and 93233 transitions. Word has length 82 [2019-11-15 20:38:56,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:56,336 INFO L462 AbstractCegarLoop]: Abstraction has 29966 states and 93233 transitions. [2019-11-15 20:38:56,336 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:38:56,336 INFO L276 IsEmpty]: Start isEmpty. Operand 29966 states and 93233 transitions. [2019-11-15 20:38:56,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 20:38:56,372 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:56,372 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:56,372 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:56,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:56,373 INFO L82 PathProgramCache]: Analyzing trace with hash -1659591461, now seen corresponding path program 1 times [2019-11-15 20:38:56,373 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:56,373 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [797340791] [2019-11-15 20:38:56,373 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:56,373 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:56,374 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:56,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:56,431 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:56,432 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [797340791] [2019-11-15 20:38:56,432 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:56,432 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:38:56,433 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1504247748] [2019-11-15 20:38:56,433 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:38:56,433 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:56,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:38:56,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:38:56,434 INFO L87 Difference]: Start difference. First operand 29966 states and 93233 transitions. Second operand 3 states. [2019-11-15 20:38:56,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:56,561 INFO L93 Difference]: Finished difference Result 21487 states and 66270 transitions. [2019-11-15 20:38:56,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:38:56,561 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 82 [2019-11-15 20:38:56,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:56,607 INFO L225 Difference]: With dead ends: 21487 [2019-11-15 20:38:56,607 INFO L226 Difference]: Without dead ends: 21487 [2019-11-15 20:38:56,608 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:38:56,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21487 states. [2019-11-15 20:38:56,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21487 to 21164. [2019-11-15 20:38:56,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21164 states. [2019-11-15 20:38:56,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21164 states to 21164 states and 65321 transitions. [2019-11-15 20:38:56,964 INFO L78 Accepts]: Start accepts. Automaton has 21164 states and 65321 transitions. Word has length 82 [2019-11-15 20:38:56,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:56,965 INFO L462 AbstractCegarLoop]: Abstraction has 21164 states and 65321 transitions. [2019-11-15 20:38:56,965 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:38:56,965 INFO L276 IsEmpty]: Start isEmpty. Operand 21164 states and 65321 transitions. [2019-11-15 20:38:56,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:38:56,985 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:56,985 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:56,985 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:56,985 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:56,986 INFO L82 PathProgramCache]: Analyzing trace with hash -1372218890, now seen corresponding path program 1 times [2019-11-15 20:38:56,986 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:56,986 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [319766531] [2019-11-15 20:38:56,986 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:56,987 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:56,987 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:57,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:57,069 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:57,069 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [319766531] [2019-11-15 20:38:57,070 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:57,070 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:38:57,070 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1149693981] [2019-11-15 20:38:57,070 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:38:57,070 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:57,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:38:57,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:38:57,071 INFO L87 Difference]: Start difference. First operand 21164 states and 65321 transitions. Second operand 6 states. [2019-11-15 20:38:57,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:57,543 INFO L93 Difference]: Finished difference Result 37344 states and 115064 transitions. [2019-11-15 20:38:57,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:38:57,544 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 83 [2019-11-15 20:38:57,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:57,608 INFO L225 Difference]: With dead ends: 37344 [2019-11-15 20:38:57,608 INFO L226 Difference]: Without dead ends: 37344 [2019-11-15 20:38:57,608 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:38:57,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37344 states. [2019-11-15 20:38:58,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37344 to 23234. [2019-11-15 20:38:58,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23234 states. [2019-11-15 20:38:58,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23234 states to 23234 states and 71275 transitions. [2019-11-15 20:38:58,074 INFO L78 Accepts]: Start accepts. Automaton has 23234 states and 71275 transitions. Word has length 83 [2019-11-15 20:38:58,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:58,074 INFO L462 AbstractCegarLoop]: Abstraction has 23234 states and 71275 transitions. [2019-11-15 20:38:58,074 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:38:58,075 INFO L276 IsEmpty]: Start isEmpty. Operand 23234 states and 71275 transitions. [2019-11-15 20:38:58,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-15 20:38:58,096 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:58,097 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:58,097 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:58,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:58,098 INFO L82 PathProgramCache]: Analyzing trace with hash -1042453129, now seen corresponding path program 1 times [2019-11-15 20:38:58,098 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:58,098 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [797688495] [2019-11-15 20:38:58,098 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:58,099 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:58,099 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:58,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:58,193 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:58,193 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [797688495] [2019-11-15 20:38:58,194 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:58,194 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:38:58,194 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [831792277] [2019-11-15 20:38:58,195 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:38:58,195 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:58,195 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:38:58,195 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:38:58,196 INFO L87 Difference]: Start difference. First operand 23234 states and 71275 transitions. Second operand 5 states. [2019-11-15 20:38:58,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:58,262 INFO L93 Difference]: Finished difference Result 3104 states and 7662 transitions. [2019-11-15 20:38:58,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:38:58,263 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 83 [2019-11-15 20:38:58,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:58,267 INFO L225 Difference]: With dead ends: 3104 [2019-11-15 20:38:58,267 INFO L226 Difference]: Without dead ends: 2718 [2019-11-15 20:38:58,268 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:38:58,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2718 states. [2019-11-15 20:38:58,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2718 to 2566. [2019-11-15 20:38:58,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2566 states. [2019-11-15 20:38:58,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2566 states to 2566 states and 6342 transitions. [2019-11-15 20:38:58,312 INFO L78 Accepts]: Start accepts. Automaton has 2566 states and 6342 transitions. Word has length 83 [2019-11-15 20:38:58,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:58,313 INFO L462 AbstractCegarLoop]: Abstraction has 2566 states and 6342 transitions. [2019-11-15 20:38:58,313 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:38:58,313 INFO L276 IsEmpty]: Start isEmpty. Operand 2566 states and 6342 transitions. [2019-11-15 20:38:58,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:38:58,317 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:58,317 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:58,317 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:58,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:58,318 INFO L82 PathProgramCache]: Analyzing trace with hash -179745300, now seen corresponding path program 1 times [2019-11-15 20:38:58,318 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:58,318 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [993297261] [2019-11-15 20:38:58,318 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:58,319 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:58,319 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:58,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:58,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:58,504 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [993297261] [2019-11-15 20:38:58,504 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:58,505 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:38:58,505 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1444069488] [2019-11-15 20:38:58,507 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:38:58,507 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:58,507 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:38:58,508 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:38:58,508 INFO L87 Difference]: Start difference. First operand 2566 states and 6342 transitions. Second operand 6 states. [2019-11-15 20:38:58,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:58,741 INFO L93 Difference]: Finished difference Result 2544 states and 6297 transitions. [2019-11-15 20:38:58,742 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:38:58,742 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-15 20:38:58,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:58,746 INFO L225 Difference]: With dead ends: 2544 [2019-11-15 20:38:58,746 INFO L226 Difference]: Without dead ends: 2544 [2019-11-15 20:38:58,746 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:38:58,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2544 states. [2019-11-15 20:38:58,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2544 to 2446. [2019-11-15 20:38:58,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2446 states. [2019-11-15 20:38:58,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2446 states to 2446 states and 6054 transitions. [2019-11-15 20:38:58,786 INFO L78 Accepts]: Start accepts. Automaton has 2446 states and 6054 transitions. Word has length 96 [2019-11-15 20:38:58,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:58,786 INFO L462 AbstractCegarLoop]: Abstraction has 2446 states and 6054 transitions. [2019-11-15 20:38:58,787 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:38:58,787 INFO L276 IsEmpty]: Start isEmpty. Operand 2446 states and 6054 transitions. [2019-11-15 20:38:58,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:38:58,790 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:58,790 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:58,791 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:58,791 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:58,792 INFO L82 PathProgramCache]: Analyzing trace with hash 953445293, now seen corresponding path program 1 times [2019-11-15 20:38:58,792 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:58,792 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1979169995] [2019-11-15 20:38:58,792 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:58,792 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:58,793 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:58,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:58,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:58,875 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1979169995] [2019-11-15 20:38:58,876 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:58,876 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:38:58,876 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1558380337] [2019-11-15 20:38:58,877 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:38:58,877 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:58,878 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:38:58,878 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:38:58,878 INFO L87 Difference]: Start difference. First operand 2446 states and 6054 transitions. Second operand 4 states. [2019-11-15 20:38:59,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:59,046 INFO L93 Difference]: Finished difference Result 2810 states and 6865 transitions. [2019-11-15 20:38:59,047 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 20:38:59,047 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-11-15 20:38:59,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:59,051 INFO L225 Difference]: With dead ends: 2810 [2019-11-15 20:38:59,051 INFO L226 Difference]: Without dead ends: 2810 [2019-11-15 20:38:59,053 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:38:59,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2810 states. [2019-11-15 20:38:59,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2810 to 2534. [2019-11-15 20:38:59,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2534 states. [2019-11-15 20:38:59,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2534 states to 2534 states and 6250 transitions. [2019-11-15 20:38:59,097 INFO L78 Accepts]: Start accepts. Automaton has 2534 states and 6250 transitions. Word has length 96 [2019-11-15 20:38:59,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:59,098 INFO L462 AbstractCegarLoop]: Abstraction has 2534 states and 6250 transitions. [2019-11-15 20:38:59,098 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:38:59,098 INFO L276 IsEmpty]: Start isEmpty. Operand 2534 states and 6250 transitions. [2019-11-15 20:38:59,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:38:59,101 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:59,102 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:59,102 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:59,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:59,102 INFO L82 PathProgramCache]: Analyzing trace with hash 504748654, now seen corresponding path program 1 times [2019-11-15 20:38:59,103 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:59,103 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1354244595] [2019-11-15 20:38:59,103 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:59,103 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:59,103 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:59,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:59,331 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:59,331 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1354244595] [2019-11-15 20:38:59,331 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:59,332 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:38:59,332 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [698489429] [2019-11-15 20:38:59,332 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:38:59,333 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:59,333 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:38:59,333 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:38:59,333 INFO L87 Difference]: Start difference. First operand 2534 states and 6250 transitions. Second operand 7 states. [2019-11-15 20:38:59,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:59,640 INFO L93 Difference]: Finished difference Result 2909 states and 7051 transitions. [2019-11-15 20:38:59,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 20:38:59,641 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2019-11-15 20:38:59,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:59,644 INFO L225 Difference]: With dead ends: 2909 [2019-11-15 20:38:59,644 INFO L226 Difference]: Without dead ends: 2909 [2019-11-15 20:38:59,644 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2019-11-15 20:38:59,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2909 states. [2019-11-15 20:38:59,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2909 to 2749. [2019-11-15 20:38:59,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2749 states. [2019-11-15 20:38:59,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2749 states to 2749 states and 6722 transitions. [2019-11-15 20:38:59,677 INFO L78 Accepts]: Start accepts. Automaton has 2749 states and 6722 transitions. Word has length 96 [2019-11-15 20:38:59,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:59,677 INFO L462 AbstractCegarLoop]: Abstraction has 2749 states and 6722 transitions. [2019-11-15 20:38:59,677 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:38:59,677 INFO L276 IsEmpty]: Start isEmpty. Operand 2749 states and 6722 transitions. [2019-11-15 20:38:59,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:38:59,680 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:59,680 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:59,681 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:59,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:59,681 INFO L82 PathProgramCache]: Analyzing trace with hash 834514415, now seen corresponding path program 1 times [2019-11-15 20:38:59,681 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:59,682 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487986341] [2019-11-15 20:38:59,682 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:59,682 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:59,682 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:59,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:38:59,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:38:59,818 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1487986341] [2019-11-15 20:38:59,818 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:38:59,819 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:38:59,819 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [287823733] [2019-11-15 20:38:59,819 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:38:59,820 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:38:59,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:38:59,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:38:59,820 INFO L87 Difference]: Start difference. First operand 2749 states and 6722 transitions. Second operand 6 states. [2019-11-15 20:38:59,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:38:59,903 INFO L93 Difference]: Finished difference Result 2946 states and 7028 transitions. [2019-11-15 20:38:59,903 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:38:59,903 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-15 20:38:59,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:38:59,906 INFO L225 Difference]: With dead ends: 2946 [2019-11-15 20:38:59,906 INFO L226 Difference]: Without dead ends: 2895 [2019-11-15 20:38:59,907 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:38:59,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2895 states. [2019-11-15 20:38:59,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2895 to 2768. [2019-11-15 20:38:59,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2768 states. [2019-11-15 20:38:59,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2768 states to 2768 states and 6671 transitions. [2019-11-15 20:38:59,942 INFO L78 Accepts]: Start accepts. Automaton has 2768 states and 6671 transitions. Word has length 96 [2019-11-15 20:38:59,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:38:59,942 INFO L462 AbstractCegarLoop]: Abstraction has 2768 states and 6671 transitions. [2019-11-15 20:38:59,942 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:38:59,943 INFO L276 IsEmpty]: Start isEmpty. Operand 2768 states and 6671 transitions. [2019-11-15 20:38:59,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:38:59,946 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:38:59,947 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:38:59,947 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:38:59,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:38:59,947 INFO L82 PathProgramCache]: Analyzing trace with hash -866226064, now seen corresponding path program 1 times [2019-11-15 20:38:59,948 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:38:59,948 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1781652525] [2019-11-15 20:38:59,948 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:59,948 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:38:59,949 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:38:59,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:39:00,079 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:39:00,080 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1781652525] [2019-11-15 20:39:00,080 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:39:00,080 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:39:00,080 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [56369807] [2019-11-15 20:39:00,081 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:39:00,081 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:39:00,081 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:39:00,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:39:00,082 INFO L87 Difference]: Start difference. First operand 2768 states and 6671 transitions. Second operand 6 states. [2019-11-15 20:39:00,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:39:00,263 INFO L93 Difference]: Finished difference Result 2925 states and 6948 transitions. [2019-11-15 20:39:00,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 20:39:00,264 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-11-15 20:39:00,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:39:00,266 INFO L225 Difference]: With dead ends: 2925 [2019-11-15 20:39:00,267 INFO L226 Difference]: Without dead ends: 2925 [2019-11-15 20:39:00,267 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 20:39:00,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2925 states. [2019-11-15 20:39:00,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2925 to 2754. [2019-11-15 20:39:00,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2754 states. [2019-11-15 20:39:00,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2754 states to 2754 states and 6615 transitions. [2019-11-15 20:39:00,299 INFO L78 Accepts]: Start accepts. Automaton has 2754 states and 6615 transitions. Word has length 96 [2019-11-15 20:39:00,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:39:00,299 INFO L462 AbstractCegarLoop]: Abstraction has 2754 states and 6615 transitions. [2019-11-15 20:39:00,300 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:39:00,300 INFO L276 IsEmpty]: Start isEmpty. Operand 2754 states and 6615 transitions. [2019-11-15 20:39:00,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:39:00,302 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:39:00,307 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:39:00,308 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:39:00,308 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:39:00,309 INFO L82 PathProgramCache]: Analyzing trace with hash 1493080945, now seen corresponding path program 1 times [2019-11-15 20:39:00,309 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:39:00,309 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1998578200] [2019-11-15 20:39:00,309 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:39:00,309 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:39:00,310 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:39:00,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:39:00,382 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:39:00,382 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1998578200] [2019-11-15 20:39:00,383 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:39:00,383 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:39:00,383 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [898497799] [2019-11-15 20:39:00,383 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:39:00,384 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:39:00,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:39:00,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:39:00,384 INFO L87 Difference]: Start difference. First operand 2754 states and 6615 transitions. Second operand 4 states. [2019-11-15 20:39:00,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:39:00,507 INFO L93 Difference]: Finished difference Result 2178 states and 5091 transitions. [2019-11-15 20:39:00,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:39:00,508 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-11-15 20:39:00,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:39:00,511 INFO L225 Difference]: With dead ends: 2178 [2019-11-15 20:39:00,511 INFO L226 Difference]: Without dead ends: 2178 [2019-11-15 20:39:00,512 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:39:00,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2178 states. [2019-11-15 20:39:00,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2178 to 2082. [2019-11-15 20:39:00,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2082 states. [2019-11-15 20:39:00,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2082 states to 2082 states and 4895 transitions. [2019-11-15 20:39:00,547 INFO L78 Accepts]: Start accepts. Automaton has 2082 states and 4895 transitions. Word has length 96 [2019-11-15 20:39:00,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:39:00,547 INFO L462 AbstractCegarLoop]: Abstraction has 2082 states and 4895 transitions. [2019-11-15 20:39:00,547 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:39:00,548 INFO L276 IsEmpty]: Start isEmpty. Operand 2082 states and 4895 transitions. [2019-11-15 20:39:00,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:39:00,550 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:39:00,551 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:39:00,551 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:39:00,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:39:00,551 INFO L82 PathProgramCache]: Analyzing trace with hash -800173360, now seen corresponding path program 1 times [2019-11-15 20:39:00,552 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:39:00,552 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [844720594] [2019-11-15 20:39:00,552 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:39:00,552 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:39:00,553 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:39:00,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:39:00,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:39:00,670 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [844720594] [2019-11-15 20:39:00,670 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:39:00,670 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:39:00,670 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1131052181] [2019-11-15 20:39:00,670 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:39:00,671 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:39:00,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:39:00,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:39:00,671 INFO L87 Difference]: Start difference. First operand 2082 states and 4895 transitions. Second operand 5 states. [2019-11-15 20:39:00,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:39:00,936 INFO L93 Difference]: Finished difference Result 2334 states and 5474 transitions. [2019-11-15 20:39:00,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:39:00,937 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2019-11-15 20:39:00,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:39:00,940 INFO L225 Difference]: With dead ends: 2334 [2019-11-15 20:39:00,940 INFO L226 Difference]: Without dead ends: 2316 [2019-11-15 20:39:00,942 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:39:00,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2316 states. [2019-11-15 20:39:00,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2316 to 2109. [2019-11-15 20:39:00,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2109 states. [2019-11-15 20:39:00,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2109 states to 2109 states and 4949 transitions. [2019-11-15 20:39:00,979 INFO L78 Accepts]: Start accepts. Automaton has 2109 states and 4949 transitions. Word has length 96 [2019-11-15 20:39:00,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:39:00,980 INFO L462 AbstractCegarLoop]: Abstraction has 2109 states and 4949 transitions. [2019-11-15 20:39:00,980 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:39:00,980 INFO L276 IsEmpty]: Start isEmpty. Operand 2109 states and 4949 transitions. [2019-11-15 20:39:00,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:39:00,983 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:39:00,983 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:39:00,983 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:39:00,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:39:00,984 INFO L82 PathProgramCache]: Analyzing trace with hash 444591121, now seen corresponding path program 1 times [2019-11-15 20:39:00,984 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:39:00,984 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1137755829] [2019-11-15 20:39:00,985 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:39:00,985 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:39:00,985 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:39:01,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:39:01,155 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:39:01,155 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1137755829] [2019-11-15 20:39:01,155 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:39:01,156 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:39:01,156 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [924050618] [2019-11-15 20:39:01,156 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:39:01,156 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:39:01,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:39:01,157 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:39:01,157 INFO L87 Difference]: Start difference. First operand 2109 states and 4949 transitions. Second operand 7 states. [2019-11-15 20:39:01,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:39:01,274 INFO L93 Difference]: Finished difference Result 3400 states and 8085 transitions. [2019-11-15 20:39:01,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:39:01,274 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2019-11-15 20:39:01,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:39:01,277 INFO L225 Difference]: With dead ends: 3400 [2019-11-15 20:39:01,277 INFO L226 Difference]: Without dead ends: 1372 [2019-11-15 20:39:01,278 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-11-15 20:39:01,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1372 states. [2019-11-15 20:39:01,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1372 to 1372. [2019-11-15 20:39:01,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1372 states. [2019-11-15 20:39:01,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1372 states to 1372 states and 3268 transitions. [2019-11-15 20:39:01,301 INFO L78 Accepts]: Start accepts. Automaton has 1372 states and 3268 transitions. Word has length 96 [2019-11-15 20:39:01,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:39:01,301 INFO L462 AbstractCegarLoop]: Abstraction has 1372 states and 3268 transitions. [2019-11-15 20:39:01,301 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:39:01,301 INFO L276 IsEmpty]: Start isEmpty. Operand 1372 states and 3268 transitions. [2019-11-15 20:39:01,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-11-15 20:39:01,303 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:39:01,304 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:39:01,304 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:39:01,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:39:01,304 INFO L82 PathProgramCache]: Analyzing trace with hash 2062962383, now seen corresponding path program 2 times [2019-11-15 20:39:01,305 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:39:01,305 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [970662188] [2019-11-15 20:39:01,305 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:39:01,305 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:39:01,305 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:39:01,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:39:01,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:39:01,433 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 20:39:01,434 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 20:39:01,641 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 20:39:01,646 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 08:39:01 BasicIcfg [2019-11-15 20:39:01,647 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 20:39:01,647 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 20:39:01,647 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 20:39:01,648 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 20:39:01,648 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:38:04" (3/4) ... [2019-11-15 20:39:01,658 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 20:39:01,862 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_bcee2b57-9fea-417d-b694-47b6a60119b5/bin/uautomizer/witness.graphml [2019-11-15 20:39:01,863 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 20:39:01,866 INFO L168 Benchmark]: Toolchain (without parser) took 59280.36 ms. Allocated memory was 1.0 GB in the beginning and 4.9 GB in the end (delta: 3.9 GB). Free memory was 939.4 MB in the beginning and 2.2 GB in the end (delta: -1.2 GB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. [2019-11-15 20:39:01,866 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 1.0 GB. Free memory is still 967.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:39:01,867 INFO L168 Benchmark]: CACSL2BoogieTranslator took 871.72 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 155.2 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -176.2 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-11-15 20:39:01,867 INFO L168 Benchmark]: Boogie Procedure Inliner took 73.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. [2019-11-15 20:39:01,868 INFO L168 Benchmark]: Boogie Preprocessor took 45.72 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:39:01,869 INFO L168 Benchmark]: RCFGBuilder took 903.10 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 50.5 MB). Peak memory consumption was 50.5 MB. Max. memory is 11.5 GB. [2019-11-15 20:39:01,869 INFO L168 Benchmark]: TraceAbstraction took 57161.03 ms. Allocated memory was 1.2 GB in the beginning and 4.9 GB in the end (delta: 3.8 GB). Free memory was 1.1 GB in the beginning and 2.3 GB in the end (delta: -1.2 GB). Peak memory consumption was 2.5 GB. Max. memory is 11.5 GB. [2019-11-15 20:39:01,870 INFO L168 Benchmark]: Witness Printer took 215.64 ms. Allocated memory is still 4.9 GB. Free memory was 2.3 GB in the beginning and 2.2 GB in the end (delta: 79.1 MB). Peak memory consumption was 79.1 MB. Max. memory is 11.5 GB. [2019-11-15 20:39:01,874 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 1.0 GB. Free memory is still 967.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 871.72 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 155.2 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -176.2 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 73.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 45.72 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 903.10 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 50.5 MB). Peak memory consumption was 50.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 57161.03 ms. Allocated memory was 1.2 GB in the beginning and 4.9 GB in the end (delta: 3.8 GB). Free memory was 1.1 GB in the beginning and 2.3 GB in the end (delta: -1.2 GB). Peak memory consumption was 2.5 GB. Max. memory is 11.5 GB. * Witness Printer took 215.64 ms. Allocated memory is still 4.9 GB. Free memory was 2.3 GB in the beginning and 2.2 GB in the end (delta: 79.1 MB). Peak memory consumption was 79.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L698] 0 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L699] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L700] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L702] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L704] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L705] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L706] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L707] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L708] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L709] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L710] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L711] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L712] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L713] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L714] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L715] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L716] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L717] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L718] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L720] 0 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L721] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L722] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L788] 0 pthread_t t1611; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L789] FCALL, FORK 0 pthread_create(&t1611, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L790] 0 pthread_t t1612; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L791] FCALL, FORK 0 pthread_create(&t1612, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L746] 2 y$w_buff1 = y$w_buff0 [L747] 2 y$w_buff0 = 2 [L748] 2 y$w_buff1_used = y$w_buff0_used [L749] 2 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L751] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L752] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L753] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L754] 2 y$r_buff0_thd2 = (_Bool)1 [L757] 2 z = 1 [L760] 2 __unbuffered_p1_EAX = z [L763] 2 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L726] 1 x = 1 [L729] 1 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L732] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L732] EXPR 1 y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=1, z=1] [L732] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y)=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y=1, z=1] [L732] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L733] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L733] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L734] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L766] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L734] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L766] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L767] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L767] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L768] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L768] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L769] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L769] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L770] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L770] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L773] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L735] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L735] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L736] 1 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L739] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L793] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L798] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L798] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L799] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L799] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L800] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L800] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L801] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L801] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L804] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L805] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L806] 0 y$flush_delayed = weak$$choice2 [L807] 0 y$mem_tmp = y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L809] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L809] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L810] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L810] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L811] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L811] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L812] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L812] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L813] EXPR 0 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L813] 0 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L814] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L814] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L815] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L816] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L816] 0 y = y$flush_delayed ? y$mem_tmp : y [L817] 0 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 177 locations, 3 error locations. Result: UNSAFE, OverallTime: 57.0s, OverallIterations: 31, TraceHistogramMax: 1, AutomataDifference: 26.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8164 SDtfs, 8711 SDslu, 18519 SDs, 0 SdLazy, 8365 SolverSat, 556 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 319 GetRequests, 83 SyntacticMatches, 16 SemanticMatches, 220 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 469 ImplicationChecksByTransitivity, 5.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=76147occurred in iteration=13, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 23.3s AutomataMinimizationTime, 30 MinimizatonAttempts, 128086 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.8s InterpolantComputationTime, 2369 NumberOfCodeBlocks, 2369 NumberOfCodeBlocksAsserted, 31 NumberOfCheckSat, 2243 ConstructedInterpolants, 0 QuantifiedInterpolants, 418163 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 30 InterpolantComputations, 30 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...