./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe006_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_1e6c7da2-2f06-43ce-b2ac-ec3969719008/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_1e6c7da2-2f06-43ce-b2ac-ec3969719008/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_1e6c7da2-2f06-43ce-b2ac-ec3969719008/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_1e6c7da2-2f06-43ce-b2ac-ec3969719008/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe006_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_1e6c7da2-2f06-43ce-b2ac-ec3969719008/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_1e6c7da2-2f06-43ce-b2ac-ec3969719008/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 78673b79635fef2ecc7e122f643561ad563798cf ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 23:32:00,952 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 23:32:00,953 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 23:32:00,963 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 23:32:00,963 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 23:32:00,964 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 23:32:00,966 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 23:32:00,975 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 23:32:00,981 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 23:32:00,981 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 23:32:00,982 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 23:32:00,983 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 23:32:00,983 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 23:32:00,983 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 23:32:00,984 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 23:32:00,984 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 23:32:00,985 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 23:32:00,985 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 23:32:00,986 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 23:32:00,987 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 23:32:00,988 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 23:32:00,992 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 23:32:00,993 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 23:32:00,994 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 23:32:00,996 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 23:32:00,996 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 23:32:00,997 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 23:32:00,999 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 23:32:01,000 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 23:32:01,000 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 23:32:01,000 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 23:32:01,001 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 23:32:01,001 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 23:32:01,002 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 23:32:01,003 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 23:32:01,003 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 23:32:01,003 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 23:32:01,004 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 23:32:01,004 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 23:32:01,005 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 23:32:01,005 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 23:32:01,006 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_1e6c7da2-2f06-43ce-b2ac-ec3969719008/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 23:32:01,018 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 23:32:01,018 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 23:32:01,019 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 23:32:01,019 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 23:32:01,019 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 23:32:01,019 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 23:32:01,020 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 23:32:01,020 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 23:32:01,020 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 23:32:01,020 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 23:32:01,020 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 23:32:01,021 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 23:32:01,021 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 23:32:01,021 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 23:32:01,021 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 23:32:01,021 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 23:32:01,021 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 23:32:01,022 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 23:32:01,022 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 23:32:01,022 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 23:32:01,022 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 23:32:01,022 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 23:32:01,023 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 23:32:01,023 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 23:32:01,023 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 23:32:01,023 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 23:32:01,023 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 23:32:01,024 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 23:32:01,024 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_1e6c7da2-2f06-43ce-b2ac-ec3969719008/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 78673b79635fef2ecc7e122f643561ad563798cf [2019-11-15 23:32:01,047 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 23:32:01,056 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 23:32:01,059 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 23:32:01,060 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 23:32:01,061 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 23:32:01,061 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_1e6c7da2-2f06-43ce-b2ac-ec3969719008/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe006_power.opt.i [2019-11-15 23:32:01,123 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1e6c7da2-2f06-43ce-b2ac-ec3969719008/bin/uautomizer/data/d8334d0be/fda58ae9f7cd4c32aa4ec16c56a936da/FLAG26f9eca8a [2019-11-15 23:32:01,591 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 23:32:01,592 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_1e6c7da2-2f06-43ce-b2ac-ec3969719008/sv-benchmarks/c/pthread-wmm/safe006_power.opt.i [2019-11-15 23:32:01,620 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1e6c7da2-2f06-43ce-b2ac-ec3969719008/bin/uautomizer/data/d8334d0be/fda58ae9f7cd4c32aa4ec16c56a936da/FLAG26f9eca8a [2019-11-15 23:32:02,079 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_1e6c7da2-2f06-43ce-b2ac-ec3969719008/bin/uautomizer/data/d8334d0be/fda58ae9f7cd4c32aa4ec16c56a936da [2019-11-15 23:32:02,081 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 23:32:02,082 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 23:32:02,083 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 23:32:02,083 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 23:32:02,087 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 23:32:02,087 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 11:32:02" (1/1) ... [2019-11-15 23:32:02,090 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6cf298bf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:32:02, skipping insertion in model container [2019-11-15 23:32:02,090 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 11:32:02" (1/1) ... [2019-11-15 23:32:02,097 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 23:32:02,161 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 23:32:02,550 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 23:32:02,571 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 23:32:02,655 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 23:32:02,724 INFO L192 MainTranslator]: Completed translation [2019-11-15 23:32:02,724 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:32:02 WrapperNode [2019-11-15 23:32:02,724 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 23:32:02,725 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 23:32:02,725 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 23:32:02,725 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 23:32:02,732 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:32:02" (1/1) ... [2019-11-15 23:32:02,750 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:32:02" (1/1) ... [2019-11-15 23:32:02,777 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 23:32:02,783 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 23:32:02,784 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 23:32:02,784 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 23:32:02,793 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:32:02" (1/1) ... [2019-11-15 23:32:02,793 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:32:02" (1/1) ... [2019-11-15 23:32:02,800 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:32:02" (1/1) ... [2019-11-15 23:32:02,810 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:32:02" (1/1) ... [2019-11-15 23:32:02,842 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:32:02" (1/1) ... [2019-11-15 23:32:02,856 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:32:02" (1/1) ... [2019-11-15 23:32:02,859 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:32:02" (1/1) ... [2019-11-15 23:32:02,864 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 23:32:02,877 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 23:32:02,877 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 23:32:02,877 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 23:32:02,878 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:32:02" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_1e6c7da2-2f06-43ce-b2ac-ec3969719008/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 23:32:02,948 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-11-15 23:32:02,948 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 23:32:02,948 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 23:32:02,949 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 23:32:02,950 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 23:32:02,950 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 23:32:02,950 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 23:32:02,951 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 23:32:02,951 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 23:32:02,951 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-11-15 23:32:02,953 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 23:32:02,953 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 23:32:02,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 23:32:02,955 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 23:32:03,746 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 23:32:03,746 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 23:32:03,747 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 11:32:03 BoogieIcfgContainer [2019-11-15 23:32:03,747 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 23:32:03,748 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 23:32:03,748 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 23:32:03,750 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 23:32:03,751 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 11:32:02" (1/3) ... [2019-11-15 23:32:03,751 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@51106fba and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 11:32:03, skipping insertion in model container [2019-11-15 23:32:03,751 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:32:02" (2/3) ... [2019-11-15 23:32:03,752 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@51106fba and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 11:32:03, skipping insertion in model container [2019-11-15 23:32:03,752 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 11:32:03" (3/3) ... [2019-11-15 23:32:03,756 INFO L109 eAbstractionObserver]: Analyzing ICFG safe006_power.opt.i [2019-11-15 23:32:03,826 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,826 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,827 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,827 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,827 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,827 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,828 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,828 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,829 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,829 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,829 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,830 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,830 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,830 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,830 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,830 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,831 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,831 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,831 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,831 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,832 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,832 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,832 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,832 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,832 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,833 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,833 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,833 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,834 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,834 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,834 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,834 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,834 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,835 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,835 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,835 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,839 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,839 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,840 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,840 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,840 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,840 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,840 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,840 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,840 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,840 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,841 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,841 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,841 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,841 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,841 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,841 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,841 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,842 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,842 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,842 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,842 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,842 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,842 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,842 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,842 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,842 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,842 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,843 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,843 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,843 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,843 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,843 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,843 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,843 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,843 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,844 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,844 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,844 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,844 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,844 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,844 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,844 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,844 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,845 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,845 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,845 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,845 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,845 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,846 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,846 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,846 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,846 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,846 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,847 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,847 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,847 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,847 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,847 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,848 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,848 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,848 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,848 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,849 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,849 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,849 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,849 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,849 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,850 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,850 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,850 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,850 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,850 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,851 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,851 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,851 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,851 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,851 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,852 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,852 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,852 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,852 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,852 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,853 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,853 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,853 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,853 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,853 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,854 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,854 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,854 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,854 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,854 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,855 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,855 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,855 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,855 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,855 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,856 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,856 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,856 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,856 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,856 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,857 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,857 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,857 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,857 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,857 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,858 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,858 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,858 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,858 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,858 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,859 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,859 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,859 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,859 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,859 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,860 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,860 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,860 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,860 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,860 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,861 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,861 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,861 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,861 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,861 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,862 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,862 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,862 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,862 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,862 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,863 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,863 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,863 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,863 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,863 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,864 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,864 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,864 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,864 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,864 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,865 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,865 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,865 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,865 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,865 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,865 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,866 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,866 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,866 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,866 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,866 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,867 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,867 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,867 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,867 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,867 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,868 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,868 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,868 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,868 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,868 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,869 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,869 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,869 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,869 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,869 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,870 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,870 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,870 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,870 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,871 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,871 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,871 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,871 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,871 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,872 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,872 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,872 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,872 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,872 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,872 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,873 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,873 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,873 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,873 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,873 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,874 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,874 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,874 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,874 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,874 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,875 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,875 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,875 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,875 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,875 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,876 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,876 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,876 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,876 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,876 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,877 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,877 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,877 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,877 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,877 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:32:03,888 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 23:32:03,888 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 23:32:03,895 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 23:32:03,905 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 23:32:03,922 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 23:32:03,922 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 23:32:03,922 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 23:32:03,922 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 23:32:03,922 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 23:32:03,922 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 23:32:03,923 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 23:32:03,923 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 23:32:03,934 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 198 places, 257 transitions [2019-11-15 23:32:08,060 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 61566 states. [2019-11-15 23:32:08,061 INFO L276 IsEmpty]: Start isEmpty. Operand 61566 states. [2019-11-15 23:32:08,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-15 23:32:08,069 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:08,070 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:08,071 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:08,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:08,076 INFO L82 PathProgramCache]: Analyzing trace with hash -1293688045, now seen corresponding path program 1 times [2019-11-15 23:32:08,083 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:08,084 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1745613139] [2019-11-15 23:32:08,084 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:08,084 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:08,085 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:08,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:08,345 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:08,346 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1745613139] [2019-11-15 23:32:08,346 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:08,347 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:32:08,347 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1075484027] [2019-11-15 23:32:08,351 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:32:08,351 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:08,364 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:32:08,365 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:32:08,367 INFO L87 Difference]: Start difference. First operand 61566 states. Second operand 4 states. [2019-11-15 23:32:09,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:09,336 INFO L93 Difference]: Finished difference Result 63246 states and 248045 transitions. [2019-11-15 23:32:09,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:32:09,338 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2019-11-15 23:32:09,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:10,020 INFO L225 Difference]: With dead ends: 63246 [2019-11-15 23:32:10,020 INFO L226 Difference]: Without dead ends: 50190 [2019-11-15 23:32:10,027 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:32:10,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50190 states. [2019-11-15 23:32:11,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50190 to 50190. [2019-11-15 23:32:11,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50190 states. [2019-11-15 23:32:12,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50190 states to 50190 states and 198149 transitions. [2019-11-15 23:32:12,445 INFO L78 Accepts]: Start accepts. Automaton has 50190 states and 198149 transitions. Word has length 49 [2019-11-15 23:32:12,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:12,446 INFO L462 AbstractCegarLoop]: Abstraction has 50190 states and 198149 transitions. [2019-11-15 23:32:12,446 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:32:12,446 INFO L276 IsEmpty]: Start isEmpty. Operand 50190 states and 198149 transitions. [2019-11-15 23:32:12,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-11-15 23:32:12,460 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:12,461 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:12,461 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:12,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:12,462 INFO L82 PathProgramCache]: Analyzing trace with hash 465120393, now seen corresponding path program 1 times [2019-11-15 23:32:12,462 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:12,462 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1376444797] [2019-11-15 23:32:12,462 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:12,463 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:12,463 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:12,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:12,573 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:12,573 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1376444797] [2019-11-15 23:32:12,573 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:12,573 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:32:12,574 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [551545313] [2019-11-15 23:32:12,575 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:32:12,575 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:12,576 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:32:12,576 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:32:12,576 INFO L87 Difference]: Start difference. First operand 50190 states and 198149 transitions. Second operand 5 states. [2019-11-15 23:32:13,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:13,960 INFO L93 Difference]: Finished difference Result 80986 states and 302743 transitions. [2019-11-15 23:32:13,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:32:13,961 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 61 [2019-11-15 23:32:13,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:14,200 INFO L225 Difference]: With dead ends: 80986 [2019-11-15 23:32:14,200 INFO L226 Difference]: Without dead ends: 80146 [2019-11-15 23:32:14,201 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:32:14,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80146 states. [2019-11-15 23:32:16,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80146 to 77168. [2019-11-15 23:32:16,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77168 states. [2019-11-15 23:32:16,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77168 states to 77168 states and 290103 transitions. [2019-11-15 23:32:16,631 INFO L78 Accepts]: Start accepts. Automaton has 77168 states and 290103 transitions. Word has length 61 [2019-11-15 23:32:16,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:16,632 INFO L462 AbstractCegarLoop]: Abstraction has 77168 states and 290103 transitions. [2019-11-15 23:32:16,632 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:32:16,632 INFO L276 IsEmpty]: Start isEmpty. Operand 77168 states and 290103 transitions. [2019-11-15 23:32:16,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-11-15 23:32:16,641 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:16,641 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:16,641 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:16,642 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:16,642 INFO L82 PathProgramCache]: Analyzing trace with hash -1955238875, now seen corresponding path program 1 times [2019-11-15 23:32:16,642 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:16,642 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [421461045] [2019-11-15 23:32:16,642 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:16,643 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:16,643 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:16,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:16,769 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:16,769 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [421461045] [2019-11-15 23:32:16,769 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:16,770 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:32:16,770 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [635637999] [2019-11-15 23:32:16,770 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:32:16,771 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:16,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:32:16,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:32:16,771 INFO L87 Difference]: Start difference. First operand 77168 states and 290103 transitions. Second operand 6 states. [2019-11-15 23:32:18,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:18,862 INFO L93 Difference]: Finished difference Result 119435 states and 436396 transitions. [2019-11-15 23:32:18,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 23:32:18,863 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 62 [2019-11-15 23:32:18,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:19,229 INFO L225 Difference]: With dead ends: 119435 [2019-11-15 23:32:19,230 INFO L226 Difference]: Without dead ends: 118427 [2019-11-15 23:32:19,231 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=90, Unknown=0, NotChecked=0, Total=132 [2019-11-15 23:32:19,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118427 states. [2019-11-15 23:32:20,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118427 to 85982. [2019-11-15 23:32:20,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85982 states. [2019-11-15 23:32:27,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85982 states to 85982 states and 321009 transitions. [2019-11-15 23:32:27,703 INFO L78 Accepts]: Start accepts. Automaton has 85982 states and 321009 transitions. Word has length 62 [2019-11-15 23:32:27,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:27,703 INFO L462 AbstractCegarLoop]: Abstraction has 85982 states and 321009 transitions. [2019-11-15 23:32:27,703 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:32:27,703 INFO L276 IsEmpty]: Start isEmpty. Operand 85982 states and 321009 transitions. [2019-11-15 23:32:27,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-11-15 23:32:27,719 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:27,719 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:27,720 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:27,720 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:27,720 INFO L82 PathProgramCache]: Analyzing trace with hash -1087915666, now seen corresponding path program 1 times [2019-11-15 23:32:27,720 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:27,720 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [760602890] [2019-11-15 23:32:27,721 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:27,721 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:27,721 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:27,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:27,788 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:27,788 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [760602890] [2019-11-15 23:32:27,789 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:27,789 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:32:27,789 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1865708554] [2019-11-15 23:32:27,789 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:32:27,789 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:27,790 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:32:27,790 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:32:27,790 INFO L87 Difference]: Start difference. First operand 85982 states and 321009 transitions. Second operand 3 states. [2019-11-15 23:32:28,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:28,322 INFO L93 Difference]: Finished difference Result 113655 states and 419177 transitions. [2019-11-15 23:32:28,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:32:28,322 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-11-15 23:32:28,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:28,603 INFO L225 Difference]: With dead ends: 113655 [2019-11-15 23:32:28,603 INFO L226 Difference]: Without dead ends: 113655 [2019-11-15 23:32:28,604 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:32:29,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113655 states. [2019-11-15 23:32:31,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113655 to 96017. [2019-11-15 23:32:31,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96017 states. [2019-11-15 23:32:31,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96017 states to 96017 states and 354764 transitions. [2019-11-15 23:32:31,300 INFO L78 Accepts]: Start accepts. Automaton has 96017 states and 354764 transitions. Word has length 64 [2019-11-15 23:32:31,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:31,300 INFO L462 AbstractCegarLoop]: Abstraction has 96017 states and 354764 transitions. [2019-11-15 23:32:31,300 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:32:31,301 INFO L276 IsEmpty]: Start isEmpty. Operand 96017 states and 354764 transitions. [2019-11-15 23:32:31,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-11-15 23:32:31,332 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:31,332 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:31,333 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:31,333 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:31,333 INFO L82 PathProgramCache]: Analyzing trace with hash 107382563, now seen corresponding path program 1 times [2019-11-15 23:32:31,333 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:31,334 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [898822963] [2019-11-15 23:32:31,334 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:31,334 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:31,334 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:31,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:31,489 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:31,490 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [898822963] [2019-11-15 23:32:31,490 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:31,490 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:32:31,491 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1908836765] [2019-11-15 23:32:31,491 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:32:31,491 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:31,492 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:32:31,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:32:31,494 INFO L87 Difference]: Start difference. First operand 96017 states and 354764 transitions. Second operand 7 states. [2019-11-15 23:32:33,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:33,012 INFO L93 Difference]: Finished difference Result 123921 states and 450565 transitions. [2019-11-15 23:32:33,012 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-11-15 23:32:33,012 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 68 [2019-11-15 23:32:33,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:33,286 INFO L225 Difference]: With dead ends: 123921 [2019-11-15 23:32:33,286 INFO L226 Difference]: Without dead ends: 122969 [2019-11-15 23:32:33,286 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=114, Invalid=348, Unknown=0, NotChecked=0, Total=462 [2019-11-15 23:32:33,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122969 states. [2019-11-15 23:32:35,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122969 to 93225. [2019-11-15 23:32:35,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93225 states. [2019-11-15 23:32:36,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93225 states to 93225 states and 345738 transitions. [2019-11-15 23:32:36,163 INFO L78 Accepts]: Start accepts. Automaton has 93225 states and 345738 transitions. Word has length 68 [2019-11-15 23:32:36,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:36,163 INFO L462 AbstractCegarLoop]: Abstraction has 93225 states and 345738 transitions. [2019-11-15 23:32:36,163 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:32:36,163 INFO L276 IsEmpty]: Start isEmpty. Operand 93225 states and 345738 transitions. [2019-11-15 23:32:36,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 23:32:36,191 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:36,191 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:36,192 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:36,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:36,192 INFO L82 PathProgramCache]: Analyzing trace with hash 93104040, now seen corresponding path program 1 times [2019-11-15 23:32:36,192 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:36,192 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1246682364] [2019-11-15 23:32:36,192 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:36,192 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:36,193 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:36,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:36,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:36,306 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1246682364] [2019-11-15 23:32:36,307 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:36,307 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:32:36,307 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1962838138] [2019-11-15 23:32:36,308 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:32:36,308 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:36,308 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:32:36,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:32:36,309 INFO L87 Difference]: Start difference. First operand 93225 states and 345738 transitions. Second operand 6 states. [2019-11-15 23:32:37,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:37,509 INFO L93 Difference]: Finished difference Result 117215 states and 426034 transitions. [2019-11-15 23:32:37,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:32:37,509 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2019-11-15 23:32:37,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:37,771 INFO L225 Difference]: With dead ends: 117215 [2019-11-15 23:32:37,771 INFO L226 Difference]: Without dead ends: 116953 [2019-11-15 23:32:37,772 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:32:38,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116953 states. [2019-11-15 23:32:40,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116953 to 113598. [2019-11-15 23:32:40,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113598 states. [2019-11-15 23:32:40,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113598 states to 113598 states and 413906 transitions. [2019-11-15 23:32:40,771 INFO L78 Accepts]: Start accepts. Automaton has 113598 states and 413906 transitions. Word has length 70 [2019-11-15 23:32:40,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:40,771 INFO L462 AbstractCegarLoop]: Abstraction has 113598 states and 413906 transitions. [2019-11-15 23:32:40,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:32:40,771 INFO L276 IsEmpty]: Start isEmpty. Operand 113598 states and 413906 transitions. [2019-11-15 23:32:40,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 23:32:40,807 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:40,807 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:40,808 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:40,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:40,808 INFO L82 PathProgramCache]: Analyzing trace with hash -200298967, now seen corresponding path program 1 times [2019-11-15 23:32:40,808 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:40,808 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813110484] [2019-11-15 23:32:40,809 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:40,809 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:40,809 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:40,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:40,910 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:40,911 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1813110484] [2019-11-15 23:32:40,911 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:40,911 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:32:40,911 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1367960710] [2019-11-15 23:32:40,913 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:32:40,913 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:40,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:32:40,914 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:32:40,914 INFO L87 Difference]: Start difference. First operand 113598 states and 413906 transitions. Second operand 7 states. [2019-11-15 23:32:42,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:42,649 INFO L93 Difference]: Finished difference Result 162864 states and 574461 transitions. [2019-11-15 23:32:42,650 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 23:32:42,650 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 70 [2019-11-15 23:32:42,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:42,993 INFO L225 Difference]: With dead ends: 162864 [2019-11-15 23:32:42,993 INFO L226 Difference]: Without dead ends: 162864 [2019-11-15 23:32:42,993 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2019-11-15 23:32:43,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162864 states. [2019-11-15 23:32:46,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162864 to 139509. [2019-11-15 23:32:46,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139509 states. [2019-11-15 23:32:46,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139509 states to 139509 states and 498565 transitions. [2019-11-15 23:32:46,969 INFO L78 Accepts]: Start accepts. Automaton has 139509 states and 498565 transitions. Word has length 70 [2019-11-15 23:32:46,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:46,969 INFO L462 AbstractCegarLoop]: Abstraction has 139509 states and 498565 transitions. [2019-11-15 23:32:46,970 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:32:46,970 INFO L276 IsEmpty]: Start isEmpty. Operand 139509 states and 498565 transitions. [2019-11-15 23:32:47,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 23:32:47,004 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:47,004 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:47,004 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:47,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:47,005 INFO L82 PathProgramCache]: Analyzing trace with hash -2007753430, now seen corresponding path program 1 times [2019-11-15 23:32:47,005 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:47,005 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [670425492] [2019-11-15 23:32:47,005 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:47,005 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:47,005 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:47,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:47,064 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:47,064 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [670425492] [2019-11-15 23:32:47,064 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:47,064 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:32:47,064 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [221051315] [2019-11-15 23:32:47,065 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:32:47,065 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:47,065 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:32:47,065 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:32:47,065 INFO L87 Difference]: Start difference. First operand 139509 states and 498565 transitions. Second operand 3 states. [2019-11-15 23:32:47,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:47,543 INFO L93 Difference]: Finished difference Result 112233 states and 398893 transitions. [2019-11-15 23:32:47,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:32:47,543 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 70 [2019-11-15 23:32:47,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:47,796 INFO L225 Difference]: With dead ends: 112233 [2019-11-15 23:32:47,796 INFO L226 Difference]: Without dead ends: 112233 [2019-11-15 23:32:47,796 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:32:48,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112233 states. [2019-11-15 23:32:49,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112233 to 111326. [2019-11-15 23:32:49,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111326 states. [2019-11-15 23:32:49,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111326 states to 111326 states and 396115 transitions. [2019-11-15 23:32:49,849 INFO L78 Accepts]: Start accepts. Automaton has 111326 states and 396115 transitions. Word has length 70 [2019-11-15 23:32:49,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:49,850 INFO L462 AbstractCegarLoop]: Abstraction has 111326 states and 396115 transitions. [2019-11-15 23:32:49,850 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:32:49,850 INFO L276 IsEmpty]: Start isEmpty. Operand 111326 states and 396115 transitions. [2019-11-15 23:32:49,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-11-15 23:32:49,868 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:49,868 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:49,868 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:49,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:49,869 INFO L82 PathProgramCache]: Analyzing trace with hash -1511739026, now seen corresponding path program 1 times [2019-11-15 23:32:49,869 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:49,869 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [419364420] [2019-11-15 23:32:49,869 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:49,869 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:49,869 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:49,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:49,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:49,958 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [419364420] [2019-11-15 23:32:49,959 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:49,959 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:32:49,959 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1097252584] [2019-11-15 23:32:49,959 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:32:49,960 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:49,960 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:32:49,960 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:32:49,960 INFO L87 Difference]: Start difference. First operand 111326 states and 396115 transitions. Second operand 4 states. [2019-11-15 23:32:50,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:50,061 INFO L93 Difference]: Finished difference Result 17102 states and 53412 transitions. [2019-11-15 23:32:50,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:32:50,061 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 70 [2019-11-15 23:32:50,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:50,094 INFO L225 Difference]: With dead ends: 17102 [2019-11-15 23:32:50,095 INFO L226 Difference]: Without dead ends: 14466 [2019-11-15 23:32:50,095 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:32:50,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14466 states. [2019-11-15 23:32:50,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14466 to 14414. [2019-11-15 23:32:50,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14414 states. [2019-11-15 23:32:50,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14414 states to 14414 states and 44443 transitions. [2019-11-15 23:32:50,854 INFO L78 Accepts]: Start accepts. Automaton has 14414 states and 44443 transitions. Word has length 70 [2019-11-15 23:32:50,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:50,854 INFO L462 AbstractCegarLoop]: Abstraction has 14414 states and 44443 transitions. [2019-11-15 23:32:50,855 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:32:50,855 INFO L276 IsEmpty]: Start isEmpty. Operand 14414 states and 44443 transitions. [2019-11-15 23:32:50,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-11-15 23:32:50,860 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:50,860 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:50,860 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:50,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:50,860 INFO L82 PathProgramCache]: Analyzing trace with hash -1518532732, now seen corresponding path program 1 times [2019-11-15 23:32:50,861 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:50,861 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [634485145] [2019-11-15 23:32:50,861 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:50,861 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:50,861 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:50,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:50,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:50,944 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [634485145] [2019-11-15 23:32:50,945 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:50,945 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:32:50,945 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808863494] [2019-11-15 23:32:50,945 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:32:50,946 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:50,946 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:32:50,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:32:50,946 INFO L87 Difference]: Start difference. First operand 14414 states and 44443 transitions. Second operand 4 states. [2019-11-15 23:32:51,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:51,154 INFO L93 Difference]: Finished difference Result 15730 states and 48359 transitions. [2019-11-15 23:32:51,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:32:51,155 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 76 [2019-11-15 23:32:51,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:51,185 INFO L225 Difference]: With dead ends: 15730 [2019-11-15 23:32:51,185 INFO L226 Difference]: Without dead ends: 15730 [2019-11-15 23:32:51,185 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:32:51,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15730 states. [2019-11-15 23:32:51,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15730 to 15322. [2019-11-15 23:32:51,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15322 states. [2019-11-15 23:32:51,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15322 states to 15322 states and 47101 transitions. [2019-11-15 23:32:51,409 INFO L78 Accepts]: Start accepts. Automaton has 15322 states and 47101 transitions. Word has length 76 [2019-11-15 23:32:51,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:51,409 INFO L462 AbstractCegarLoop]: Abstraction has 15322 states and 47101 transitions. [2019-11-15 23:32:51,409 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:32:51,409 INFO L276 IsEmpty]: Start isEmpty. Operand 15322 states and 47101 transitions. [2019-11-15 23:32:51,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-11-15 23:32:51,412 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:51,412 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:51,413 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:51,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:51,413 INFO L82 PathProgramCache]: Analyzing trace with hash 224277603, now seen corresponding path program 1 times [2019-11-15 23:32:51,413 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:51,413 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [305542512] [2019-11-15 23:32:51,413 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:51,413 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:51,413 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:51,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:51,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:51,534 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [305542512] [2019-11-15 23:32:51,534 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:51,534 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:32:51,534 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [297785292] [2019-11-15 23:32:51,534 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:32:51,535 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:51,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:32:51,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:32:51,535 INFO L87 Difference]: Start difference. First operand 15322 states and 47101 transitions. Second operand 5 states. [2019-11-15 23:32:51,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:51,620 INFO L93 Difference]: Finished difference Result 15844 states and 48444 transitions. [2019-11-15 23:32:51,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:32:51,621 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 76 [2019-11-15 23:32:51,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:51,642 INFO L225 Difference]: With dead ends: 15844 [2019-11-15 23:32:51,642 INFO L226 Difference]: Without dead ends: 15844 [2019-11-15 23:32:51,642 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:32:51,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15844 states. [2019-11-15 23:32:51,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15844 to 15670. [2019-11-15 23:32:51,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15670 states. [2019-11-15 23:32:51,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15670 states to 15670 states and 47967 transitions. [2019-11-15 23:32:51,835 INFO L78 Accepts]: Start accepts. Automaton has 15670 states and 47967 transitions. Word has length 76 [2019-11-15 23:32:51,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:51,836 INFO L462 AbstractCegarLoop]: Abstraction has 15670 states and 47967 transitions. [2019-11-15 23:32:51,836 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:32:51,836 INFO L276 IsEmpty]: Start isEmpty. Operand 15670 states and 47967 transitions. [2019-11-15 23:32:51,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-11-15 23:32:51,839 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:51,839 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:51,840 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:51,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:51,840 INFO L82 PathProgramCache]: Analyzing trace with hash 2021228962, now seen corresponding path program 1 times [2019-11-15 23:32:51,840 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:51,840 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218435470] [2019-11-15 23:32:51,841 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:51,841 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:51,841 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:51,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:51,984 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:51,985 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [218435470] [2019-11-15 23:32:51,985 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:51,985 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:32:51,985 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [912535875] [2019-11-15 23:32:51,986 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:32:51,986 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:51,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:32:51,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:32:51,986 INFO L87 Difference]: Start difference. First operand 15670 states and 47967 transitions. Second operand 7 states. [2019-11-15 23:32:52,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:52,639 INFO L93 Difference]: Finished difference Result 19545 states and 58883 transitions. [2019-11-15 23:32:52,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 23:32:52,639 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 76 [2019-11-15 23:32:52,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:52,662 INFO L225 Difference]: With dead ends: 19545 [2019-11-15 23:32:52,662 INFO L226 Difference]: Without dead ends: 19484 [2019-11-15 23:32:52,662 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2019-11-15 23:32:52,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19484 states. [2019-11-15 23:32:52,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19484 to 17423. [2019-11-15 23:32:52,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17423 states. [2019-11-15 23:32:52,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17423 states to 17423 states and 52978 transitions. [2019-11-15 23:32:52,872 INFO L78 Accepts]: Start accepts. Automaton has 17423 states and 52978 transitions. Word has length 76 [2019-11-15 23:32:52,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:52,872 INFO L462 AbstractCegarLoop]: Abstraction has 17423 states and 52978 transitions. [2019-11-15 23:32:52,872 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:32:52,872 INFO L276 IsEmpty]: Start isEmpty. Operand 17423 states and 52978 transitions. [2019-11-15 23:32:52,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 23:32:52,877 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:52,878 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:52,878 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:52,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:52,878 INFO L82 PathProgramCache]: Analyzing trace with hash -366442464, now seen corresponding path program 1 times [2019-11-15 23:32:52,878 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:52,878 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047509423] [2019-11-15 23:32:52,878 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:52,878 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:52,878 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:52,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:52,922 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:52,922 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047509423] [2019-11-15 23:32:52,922 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:52,922 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:32:52,922 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [139510894] [2019-11-15 23:32:52,923 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:32:52,923 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:52,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:32:52,923 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:32:52,923 INFO L87 Difference]: Start difference. First operand 17423 states and 52978 transitions. Second operand 3 states. [2019-11-15 23:32:53,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:53,009 INFO L93 Difference]: Finished difference Result 20125 states and 60680 transitions. [2019-11-15 23:32:53,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:32:53,009 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 82 [2019-11-15 23:32:53,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:53,033 INFO L225 Difference]: With dead ends: 20125 [2019-11-15 23:32:53,033 INFO L226 Difference]: Without dead ends: 20125 [2019-11-15 23:32:53,033 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:32:53,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20125 states. [2019-11-15 23:32:53,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20125 to 16881. [2019-11-15 23:32:53,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16881 states. [2019-11-15 23:32:53,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16881 states to 16881 states and 50639 transitions. [2019-11-15 23:32:53,246 INFO L78 Accepts]: Start accepts. Automaton has 16881 states and 50639 transitions. Word has length 82 [2019-11-15 23:32:53,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:53,246 INFO L462 AbstractCegarLoop]: Abstraction has 16881 states and 50639 transitions. [2019-11-15 23:32:53,246 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:32:53,246 INFO L276 IsEmpty]: Start isEmpty. Operand 16881 states and 50639 transitions. [2019-11-15 23:32:53,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2019-11-15 23:32:53,253 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:53,253 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:53,254 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:53,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:53,254 INFO L82 PathProgramCache]: Analyzing trace with hash -1049435942, now seen corresponding path program 1 times [2019-11-15 23:32:53,254 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:53,254 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [640846548] [2019-11-15 23:32:53,254 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:53,254 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:53,254 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:53,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:53,300 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:53,301 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [640846548] [2019-11-15 23:32:53,301 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:53,301 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:32:53,301 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1039454373] [2019-11-15 23:32:53,302 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:32:53,302 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:53,302 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:32:53,302 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:32:53,302 INFO L87 Difference]: Start difference. First operand 16881 states and 50639 transitions. Second operand 4 states. [2019-11-15 23:32:53,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:53,614 INFO L93 Difference]: Finished difference Result 18654 states and 54992 transitions. [2019-11-15 23:32:53,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:32:53,615 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 84 [2019-11-15 23:32:53,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:53,640 INFO L225 Difference]: With dead ends: 18654 [2019-11-15 23:32:53,640 INFO L226 Difference]: Without dead ends: 18654 [2019-11-15 23:32:53,640 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:32:53,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18654 states. [2019-11-15 23:32:53,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18654 to 17760. [2019-11-15 23:32:53,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17760 states. [2019-11-15 23:32:53,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17760 states to 17760 states and 52714 transitions. [2019-11-15 23:32:53,851 INFO L78 Accepts]: Start accepts. Automaton has 17760 states and 52714 transitions. Word has length 84 [2019-11-15 23:32:53,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:53,851 INFO L462 AbstractCegarLoop]: Abstraction has 17760 states and 52714 transitions. [2019-11-15 23:32:53,851 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:32:53,851 INFO L276 IsEmpty]: Start isEmpty. Operand 17760 states and 52714 transitions. [2019-11-15 23:32:53,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2019-11-15 23:32:53,860 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:53,860 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:53,861 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:53,861 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:53,861 INFO L82 PathProgramCache]: Analyzing trace with hash 1168322011, now seen corresponding path program 1 times [2019-11-15 23:32:53,861 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:53,861 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [579981366] [2019-11-15 23:32:53,862 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:53,862 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:53,862 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:53,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:53,948 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:53,948 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [579981366] [2019-11-15 23:32:53,948 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:53,948 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:32:53,949 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1251023134] [2019-11-15 23:32:53,949 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:32:53,949 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:53,949 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:32:53,950 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:32:53,950 INFO L87 Difference]: Start difference. First operand 17760 states and 52714 transitions. Second operand 6 states. [2019-11-15 23:32:54,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:54,472 INFO L93 Difference]: Finished difference Result 18959 states and 55328 transitions. [2019-11-15 23:32:54,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 23:32:54,473 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 84 [2019-11-15 23:32:54,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:54,495 INFO L225 Difference]: With dead ends: 18959 [2019-11-15 23:32:54,496 INFO L226 Difference]: Without dead ends: 18959 [2019-11-15 23:32:54,496 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 23:32:54,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18959 states. [2019-11-15 23:32:54,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18959 to 18130. [2019-11-15 23:32:54,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18130 states. [2019-11-15 23:32:54,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18130 states to 18130 states and 53275 transitions. [2019-11-15 23:32:54,711 INFO L78 Accepts]: Start accepts. Automaton has 18130 states and 53275 transitions. Word has length 84 [2019-11-15 23:32:54,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:54,711 INFO L462 AbstractCegarLoop]: Abstraction has 18130 states and 53275 transitions. [2019-11-15 23:32:54,711 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:32:54,711 INFO L276 IsEmpty]: Start isEmpty. Operand 18130 states and 53275 transitions. [2019-11-15 23:32:54,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2019-11-15 23:32:54,720 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:54,720 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:54,720 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:54,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:54,721 INFO L82 PathProgramCache]: Analyzing trace with hash -1881880804, now seen corresponding path program 1 times [2019-11-15 23:32:54,721 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:54,721 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1352517952] [2019-11-15 23:32:54,721 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:54,721 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:54,722 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:54,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:54,789 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:54,789 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1352517952] [2019-11-15 23:32:54,790 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:54,790 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:32:54,790 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2107951147] [2019-11-15 23:32:54,790 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:32:54,791 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:54,791 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:32:54,791 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:32:54,791 INFO L87 Difference]: Start difference. First operand 18130 states and 53275 transitions. Second operand 5 states. [2019-11-15 23:32:55,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:55,338 INFO L93 Difference]: Finished difference Result 21826 states and 63096 transitions. [2019-11-15 23:32:55,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:32:55,338 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 84 [2019-11-15 23:32:55,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:55,366 INFO L225 Difference]: With dead ends: 21826 [2019-11-15 23:32:55,366 INFO L226 Difference]: Without dead ends: 21826 [2019-11-15 23:32:55,366 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:32:55,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21826 states. [2019-11-15 23:32:55,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21826 to 20200. [2019-11-15 23:32:55,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20200 states. [2019-11-15 23:32:55,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20200 states to 20200 states and 58391 transitions. [2019-11-15 23:32:55,607 INFO L78 Accepts]: Start accepts. Automaton has 20200 states and 58391 transitions. Word has length 84 [2019-11-15 23:32:55,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:55,607 INFO L462 AbstractCegarLoop]: Abstraction has 20200 states and 58391 transitions. [2019-11-15 23:32:55,607 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:32:55,607 INFO L276 IsEmpty]: Start isEmpty. Operand 20200 states and 58391 transitions. [2019-11-15 23:32:55,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2019-11-15 23:32:55,614 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:55,614 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:55,615 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:55,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:55,615 INFO L82 PathProgramCache]: Analyzing trace with hash 1416014139, now seen corresponding path program 1 times [2019-11-15 23:32:55,615 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:55,615 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1772164278] [2019-11-15 23:32:55,615 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:55,615 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:55,615 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:55,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:55,670 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:55,671 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1772164278] [2019-11-15 23:32:55,671 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:55,671 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:32:55,671 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1154348138] [2019-11-15 23:32:55,672 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:32:55,672 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:55,672 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:32:55,672 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:32:55,673 INFO L87 Difference]: Start difference. First operand 20200 states and 58391 transitions. Second operand 4 states. [2019-11-15 23:32:56,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:56,260 INFO L93 Difference]: Finished difference Result 24505 states and 70549 transitions. [2019-11-15 23:32:56,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:32:56,260 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 84 [2019-11-15 23:32:56,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:56,289 INFO L225 Difference]: With dead ends: 24505 [2019-11-15 23:32:56,289 INFO L226 Difference]: Without dead ends: 24208 [2019-11-15 23:32:56,290 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:32:56,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24208 states. [2019-11-15 23:32:56,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24208 to 23080. [2019-11-15 23:32:56,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23080 states. [2019-11-15 23:32:56,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23080 states to 23080 states and 66455 transitions. [2019-11-15 23:32:56,747 INFO L78 Accepts]: Start accepts. Automaton has 23080 states and 66455 transitions. Word has length 84 [2019-11-15 23:32:56,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:56,747 INFO L462 AbstractCegarLoop]: Abstraction has 23080 states and 66455 transitions. [2019-11-15 23:32:56,747 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:32:56,747 INFO L276 IsEmpty]: Start isEmpty. Operand 23080 states and 66455 transitions. [2019-11-15 23:32:56,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2019-11-15 23:32:56,755 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:56,755 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:56,755 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:56,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:56,755 INFO L82 PathProgramCache]: Analyzing trace with hash 1122611132, now seen corresponding path program 1 times [2019-11-15 23:32:56,756 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:56,756 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762631000] [2019-11-15 23:32:56,756 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:56,756 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:56,756 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:56,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:56,925 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:56,925 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1762631000] [2019-11-15 23:32:56,925 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:56,926 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:32:56,926 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410531737] [2019-11-15 23:32:56,926 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:32:56,926 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:56,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:32:56,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:32:56,927 INFO L87 Difference]: Start difference. First operand 23080 states and 66455 transitions. Second operand 7 states. [2019-11-15 23:32:57,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:57,550 INFO L93 Difference]: Finished difference Result 32772 states and 91213 transitions. [2019-11-15 23:32:57,551 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 23:32:57,551 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 84 [2019-11-15 23:32:57,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:57,589 INFO L225 Difference]: With dead ends: 32772 [2019-11-15 23:32:57,589 INFO L226 Difference]: Without dead ends: 32772 [2019-11-15 23:32:57,589 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=87, Unknown=0, NotChecked=0, Total=132 [2019-11-15 23:32:57,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32772 states. [2019-11-15 23:32:57,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32772 to 27257. [2019-11-15 23:32:57,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27257 states. [2019-11-15 23:32:57,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27257 states to 27257 states and 76177 transitions. [2019-11-15 23:32:57,930 INFO L78 Accepts]: Start accepts. Automaton has 27257 states and 76177 transitions. Word has length 84 [2019-11-15 23:32:57,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:57,930 INFO L462 AbstractCegarLoop]: Abstraction has 27257 states and 76177 transitions. [2019-11-15 23:32:57,930 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:32:57,930 INFO L276 IsEmpty]: Start isEmpty. Operand 27257 states and 76177 transitions. [2019-11-15 23:32:57,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2019-11-15 23:32:57,940 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:57,940 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:57,940 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:57,941 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:57,941 INFO L82 PathProgramCache]: Analyzing trace with hash -684843331, now seen corresponding path program 1 times [2019-11-15 23:32:57,941 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:57,941 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [945381325] [2019-11-15 23:32:57,941 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:57,941 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:57,942 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:57,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:58,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:58,014 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [945381325] [2019-11-15 23:32:58,014 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:58,014 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:32:58,014 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018322636] [2019-11-15 23:32:58,015 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:32:58,016 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:58,016 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:32:58,016 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:32:58,016 INFO L87 Difference]: Start difference. First operand 27257 states and 76177 transitions. Second operand 5 states. [2019-11-15 23:32:58,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:58,080 INFO L93 Difference]: Finished difference Result 7652 states and 17669 transitions. [2019-11-15 23:32:58,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 23:32:58,081 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 84 [2019-11-15 23:32:58,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:58,088 INFO L225 Difference]: With dead ends: 7652 [2019-11-15 23:32:58,088 INFO L226 Difference]: Without dead ends: 6479 [2019-11-15 23:32:58,089 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:32:58,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6479 states. [2019-11-15 23:32:58,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6479 to 5920. [2019-11-15 23:32:58,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5920 states. [2019-11-15 23:32:58,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5920 states to 5920 states and 13289 transitions. [2019-11-15 23:32:58,167 INFO L78 Accepts]: Start accepts. Automaton has 5920 states and 13289 transitions. Word has length 84 [2019-11-15 23:32:58,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:58,167 INFO L462 AbstractCegarLoop]: Abstraction has 5920 states and 13289 transitions. [2019-11-15 23:32:58,167 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:32:58,168 INFO L276 IsEmpty]: Start isEmpty. Operand 5920 states and 13289 transitions. [2019-11-15 23:32:58,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2019-11-15 23:32:58,173 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:58,173 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:58,174 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:58,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:58,174 INFO L82 PathProgramCache]: Analyzing trace with hash -973912163, now seen corresponding path program 1 times [2019-11-15 23:32:58,174 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:58,175 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1425496920] [2019-11-15 23:32:58,175 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:58,175 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:58,175 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:58,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:58,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:58,234 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1425496920] [2019-11-15 23:32:58,234 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:58,234 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:32:58,235 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [156504602] [2019-11-15 23:32:58,235 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:32:58,235 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:58,236 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:32:58,236 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:32:58,236 INFO L87 Difference]: Start difference. First operand 5920 states and 13289 transitions. Second operand 5 states. [2019-11-15 23:32:58,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:58,385 INFO L93 Difference]: Finished difference Result 7176 states and 16129 transitions. [2019-11-15 23:32:58,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 23:32:58,386 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 88 [2019-11-15 23:32:58,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:58,391 INFO L225 Difference]: With dead ends: 7176 [2019-11-15 23:32:58,391 INFO L226 Difference]: Without dead ends: 7176 [2019-11-15 23:32:58,392 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-15 23:32:58,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7176 states. [2019-11-15 23:32:58,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7176 to 6397. [2019-11-15 23:32:58,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6397 states. [2019-11-15 23:32:58,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6397 states to 6397 states and 14387 transitions. [2019-11-15 23:32:58,455 INFO L78 Accepts]: Start accepts. Automaton has 6397 states and 14387 transitions. Word has length 88 [2019-11-15 23:32:58,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:58,455 INFO L462 AbstractCegarLoop]: Abstraction has 6397 states and 14387 transitions. [2019-11-15 23:32:58,455 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:32:58,455 INFO L276 IsEmpty]: Start isEmpty. Operand 6397 states and 14387 transitions. [2019-11-15 23:32:58,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2019-11-15 23:32:58,459 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:58,460 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:58,460 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:58,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:58,460 INFO L82 PathProgramCache]: Analyzing trace with hash 768898172, now seen corresponding path program 1 times [2019-11-15 23:32:58,460 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:58,460 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2121486518] [2019-11-15 23:32:58,460 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:58,461 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:58,461 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:58,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:58,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:58,564 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2121486518] [2019-11-15 23:32:58,564 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:58,564 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:32:58,564 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [926146673] [2019-11-15 23:32:58,565 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:32:58,565 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:58,565 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:32:58,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:32:58,568 INFO L87 Difference]: Start difference. First operand 6397 states and 14387 transitions. Second operand 6 states. [2019-11-15 23:32:59,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:59,100 INFO L93 Difference]: Finished difference Result 8474 states and 19016 transitions. [2019-11-15 23:32:59,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 23:32:59,100 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 88 [2019-11-15 23:32:59,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:59,107 INFO L225 Difference]: With dead ends: 8474 [2019-11-15 23:32:59,107 INFO L226 Difference]: Without dead ends: 8421 [2019-11-15 23:32:59,107 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-11-15 23:32:59,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8421 states. [2019-11-15 23:32:59,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8421 to 6929. [2019-11-15 23:32:59,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6929 states. [2019-11-15 23:32:59,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6929 states to 6929 states and 15551 transitions. [2019-11-15 23:32:59,182 INFO L78 Accepts]: Start accepts. Automaton has 6929 states and 15551 transitions. Word has length 88 [2019-11-15 23:32:59,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:59,182 INFO L462 AbstractCegarLoop]: Abstraction has 6929 states and 15551 transitions. [2019-11-15 23:32:59,182 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:32:59,182 INFO L276 IsEmpty]: Start isEmpty. Operand 6929 states and 15551 transitions. [2019-11-15 23:32:59,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 23:32:59,188 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:59,188 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:59,188 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:59,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:59,188 INFO L82 PathProgramCache]: Analyzing trace with hash 104817111, now seen corresponding path program 1 times [2019-11-15 23:32:59,189 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:59,189 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1836894880] [2019-11-15 23:32:59,189 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:59,189 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:59,189 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:59,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:59,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:59,227 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1836894880] [2019-11-15 23:32:59,227 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:59,227 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:32:59,228 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [106386252] [2019-11-15 23:32:59,228 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:32:59,228 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:59,228 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:32:59,229 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:32:59,229 INFO L87 Difference]: Start difference. First operand 6929 states and 15551 transitions. Second operand 3 states. [2019-11-15 23:32:59,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:59,454 INFO L93 Difference]: Finished difference Result 8556 states and 18980 transitions. [2019-11-15 23:32:59,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:32:59,454 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 111 [2019-11-15 23:32:59,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:59,463 INFO L225 Difference]: With dead ends: 8556 [2019-11-15 23:32:59,464 INFO L226 Difference]: Without dead ends: 8556 [2019-11-15 23:32:59,464 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:32:59,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8556 states. [2019-11-15 23:32:59,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8556 to 7125. [2019-11-15 23:32:59,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7125 states. [2019-11-15 23:32:59,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7125 states to 7125 states and 15761 transitions. [2019-11-15 23:32:59,567 INFO L78 Accepts]: Start accepts. Automaton has 7125 states and 15761 transitions. Word has length 111 [2019-11-15 23:32:59,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:59,567 INFO L462 AbstractCegarLoop]: Abstraction has 7125 states and 15761 transitions. [2019-11-15 23:32:59,567 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:32:59,567 INFO L276 IsEmpty]: Start isEmpty. Operand 7125 states and 15761 transitions. [2019-11-15 23:32:59,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-11-15 23:32:59,575 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:59,575 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:59,576 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:59,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:59,576 INFO L82 PathProgramCache]: Analyzing trace with hash 1089829412, now seen corresponding path program 1 times [2019-11-15 23:32:59,577 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:59,577 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317772248] [2019-11-15 23:32:59,577 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:59,577 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:59,577 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:59,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:59,651 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:59,651 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1317772248] [2019-11-15 23:32:59,652 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:59,652 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:32:59,652 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1816149181] [2019-11-15 23:32:59,654 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:32:59,654 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:59,654 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:32:59,655 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:32:59,655 INFO L87 Difference]: Start difference. First operand 7125 states and 15761 transitions. Second operand 4 states. [2019-11-15 23:32:59,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:32:59,778 INFO L93 Difference]: Finished difference Result 7839 states and 17193 transitions. [2019-11-15 23:32:59,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 23:32:59,779 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 111 [2019-11-15 23:32:59,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:32:59,787 INFO L225 Difference]: With dead ends: 7839 [2019-11-15 23:32:59,787 INFO L226 Difference]: Without dead ends: 7839 [2019-11-15 23:32:59,788 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:32:59,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7839 states. [2019-11-15 23:32:59,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7839 to 7176. [2019-11-15 23:32:59,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7176 states. [2019-11-15 23:32:59,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7176 states to 7176 states and 15834 transitions. [2019-11-15 23:32:59,884 INFO L78 Accepts]: Start accepts. Automaton has 7176 states and 15834 transitions. Word has length 111 [2019-11-15 23:32:59,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:32:59,885 INFO L462 AbstractCegarLoop]: Abstraction has 7176 states and 15834 transitions. [2019-11-15 23:32:59,885 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:32:59,885 INFO L276 IsEmpty]: Start isEmpty. Operand 7176 states and 15834 transitions. [2019-11-15 23:32:59,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-11-15 23:32:59,893 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:32:59,893 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:32:59,893 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:32:59,894 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:32:59,894 INFO L82 PathProgramCache]: Analyzing trace with hash 1367550453, now seen corresponding path program 1 times [2019-11-15 23:32:59,894 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:32:59,894 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356005212] [2019-11-15 23:32:59,895 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:59,895 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:32:59,895 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:32:59,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:32:59,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:32:59,978 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [356005212] [2019-11-15 23:32:59,979 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:32:59,979 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:32:59,979 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [707004095] [2019-11-15 23:32:59,979 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:32:59,980 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:32:59,980 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:32:59,981 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:32:59,981 INFO L87 Difference]: Start difference. First operand 7176 states and 15834 transitions. Second operand 6 states. [2019-11-15 23:33:00,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:33:00,450 INFO L93 Difference]: Finished difference Result 8570 states and 18844 transitions. [2019-11-15 23:33:00,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 23:33:00,451 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 113 [2019-11-15 23:33:00,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:33:00,460 INFO L225 Difference]: With dead ends: 8570 [2019-11-15 23:33:00,460 INFO L226 Difference]: Without dead ends: 8570 [2019-11-15 23:33:00,461 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-15 23:33:00,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8570 states. [2019-11-15 23:33:00,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8570 to 7178. [2019-11-15 23:33:00,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7178 states. [2019-11-15 23:33:00,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7178 states to 7178 states and 15825 transitions. [2019-11-15 23:33:00,560 INFO L78 Accepts]: Start accepts. Automaton has 7178 states and 15825 transitions. Word has length 113 [2019-11-15 23:33:00,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:33:00,561 INFO L462 AbstractCegarLoop]: Abstraction has 7178 states and 15825 transitions. [2019-11-15 23:33:00,561 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:33:00,561 INFO L276 IsEmpty]: Start isEmpty. Operand 7178 states and 15825 transitions. [2019-11-15 23:33:00,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-11-15 23:33:00,568 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:33:00,569 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:33:00,569 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:33:00,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:33:00,569 INFO L82 PathProgramCache]: Analyzing trace with hash -642553388, now seen corresponding path program 1 times [2019-11-15 23:33:00,570 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:33:00,570 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1759200998] [2019-11-15 23:33:00,570 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:33:00,570 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:33:00,570 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:33:00,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:33:00,637 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:33:00,638 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1759200998] [2019-11-15 23:33:00,638 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:33:00,638 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:33:00,638 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2017167821] [2019-11-15 23:33:00,639 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:33:00,639 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:33:00,639 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:33:00,639 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:33:00,640 INFO L87 Difference]: Start difference. First operand 7178 states and 15825 transitions. Second operand 4 states. [2019-11-15 23:33:00,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:33:00,979 INFO L93 Difference]: Finished difference Result 8953 states and 19739 transitions. [2019-11-15 23:33:00,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:33:00,980 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 113 [2019-11-15 23:33:00,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:33:00,989 INFO L225 Difference]: With dead ends: 8953 [2019-11-15 23:33:00,989 INFO L226 Difference]: Without dead ends: 8897 [2019-11-15 23:33:00,989 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:33:01,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8897 states. [2019-11-15 23:33:01,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8897 to 8199. [2019-11-15 23:33:01,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8199 states. [2019-11-15 23:33:01,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8199 states to 8199 states and 18094 transitions. [2019-11-15 23:33:01,096 INFO L78 Accepts]: Start accepts. Automaton has 8199 states and 18094 transitions. Word has length 113 [2019-11-15 23:33:01,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:33:01,096 INFO L462 AbstractCegarLoop]: Abstraction has 8199 states and 18094 transitions. [2019-11-15 23:33:01,097 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:33:01,097 INFO L276 IsEmpty]: Start isEmpty. Operand 8199 states and 18094 transitions. [2019-11-15 23:33:01,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-11-15 23:33:01,105 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:33:01,105 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:33:01,106 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:33:01,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:33:01,106 INFO L82 PathProgramCache]: Analyzing trace with hash 319060629, now seen corresponding path program 1 times [2019-11-15 23:33:01,106 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:33:01,106 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930715785] [2019-11-15 23:33:01,107 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:33:01,107 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:33:01,107 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:33:01,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:33:01,244 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:33:01,244 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930715785] [2019-11-15 23:33:01,245 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:33:01,245 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:33:01,245 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1615283588] [2019-11-15 23:33:01,246 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:33:01,246 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:33:01,246 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:33:01,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:33:01,247 INFO L87 Difference]: Start difference. First operand 8199 states and 18094 transitions. Second operand 7 states. [2019-11-15 23:33:01,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:33:01,454 INFO L93 Difference]: Finished difference Result 9323 states and 20511 transitions. [2019-11-15 23:33:01,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:33:01,454 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 113 [2019-11-15 23:33:01,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:33:01,461 INFO L225 Difference]: With dead ends: 9323 [2019-11-15 23:33:01,461 INFO L226 Difference]: Without dead ends: 9323 [2019-11-15 23:33:01,461 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2019-11-15 23:33:01,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9323 states. [2019-11-15 23:33:01,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9323 to 7977. [2019-11-15 23:33:01,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7977 states. [2019-11-15 23:33:01,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7977 states to 7977 states and 17499 transitions. [2019-11-15 23:33:01,539 INFO L78 Accepts]: Start accepts. Automaton has 7977 states and 17499 transitions. Word has length 113 [2019-11-15 23:33:01,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:33:01,539 INFO L462 AbstractCegarLoop]: Abstraction has 7977 states and 17499 transitions. [2019-11-15 23:33:01,539 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:33:01,539 INFO L276 IsEmpty]: Start isEmpty. Operand 7977 states and 17499 transitions. [2019-11-15 23:33:01,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-11-15 23:33:01,545 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:33:01,545 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:33:01,545 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:33:01,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:33:01,545 INFO L82 PathProgramCache]: Analyzing trace with hash 1563825110, now seen corresponding path program 1 times [2019-11-15 23:33:01,546 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:33:01,546 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1164526751] [2019-11-15 23:33:01,546 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:33:01,546 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:33:01,546 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:33:01,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:33:01,598 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:33:01,599 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1164526751] [2019-11-15 23:33:01,599 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:33:01,599 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:33:01,599 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [361334593] [2019-11-15 23:33:01,600 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:33:01,600 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:33:01,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:33:01,600 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:33:01,600 INFO L87 Difference]: Start difference. First operand 7977 states and 17499 transitions. Second operand 3 states. [2019-11-15 23:33:01,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:33:01,623 INFO L93 Difference]: Finished difference Result 7977 states and 17490 transitions. [2019-11-15 23:33:01,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:33:01,624 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 113 [2019-11-15 23:33:01,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:33:01,632 INFO L225 Difference]: With dead ends: 7977 [2019-11-15 23:33:01,632 INFO L226 Difference]: Without dead ends: 7977 [2019-11-15 23:33:01,633 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:33:01,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7977 states. [2019-11-15 23:33:01,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7977 to 7977. [2019-11-15 23:33:01,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7977 states. [2019-11-15 23:33:01,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7977 states to 7977 states and 17490 transitions. [2019-11-15 23:33:01,730 INFO L78 Accepts]: Start accepts. Automaton has 7977 states and 17490 transitions. Word has length 113 [2019-11-15 23:33:01,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:33:01,731 INFO L462 AbstractCegarLoop]: Abstraction has 7977 states and 17490 transitions. [2019-11-15 23:33:01,731 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:33:01,731 INFO L276 IsEmpty]: Start isEmpty. Operand 7977 states and 17490 transitions. [2019-11-15 23:33:01,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-11-15 23:33:01,739 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:33:01,739 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:33:01,739 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:33:01,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:33:01,739 INFO L82 PathProgramCache]: Analyzing trace with hash 807228844, now seen corresponding path program 1 times [2019-11-15 23:33:01,740 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:33:01,740 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2043808415] [2019-11-15 23:33:01,740 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:33:01,740 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:33:01,740 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:33:01,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:33:01,857 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:33:01,857 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2043808415] [2019-11-15 23:33:01,857 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:33:01,858 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:33:01,858 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [875000727] [2019-11-15 23:33:01,858 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:33:01,858 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:33:01,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:33:01,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:33:01,859 INFO L87 Difference]: Start difference. First operand 7977 states and 17490 transitions. Second operand 5 states. [2019-11-15 23:33:01,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:33:01,916 INFO L93 Difference]: Finished difference Result 7977 states and 17481 transitions. [2019-11-15 23:33:01,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:33:01,916 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 115 [2019-11-15 23:33:01,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:33:01,925 INFO L225 Difference]: With dead ends: 7977 [2019-11-15 23:33:01,925 INFO L226 Difference]: Without dead ends: 7977 [2019-11-15 23:33:01,925 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:33:01,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7977 states. [2019-11-15 23:33:02,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7977 to 7741. [2019-11-15 23:33:02,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7741 states. [2019-11-15 23:33:02,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7741 states to 7741 states and 16954 transitions. [2019-11-15 23:33:02,021 INFO L78 Accepts]: Start accepts. Automaton has 7741 states and 16954 transitions. Word has length 115 [2019-11-15 23:33:02,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:33:02,021 INFO L462 AbstractCegarLoop]: Abstraction has 7741 states and 16954 transitions. [2019-11-15 23:33:02,021 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:33:02,021 INFO L276 IsEmpty]: Start isEmpty. Operand 7741 states and 16954 transitions. [2019-11-15 23:33:02,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-11-15 23:33:02,027 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:33:02,027 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:33:02,027 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:33:02,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:33:02,027 INFO L82 PathProgramCache]: Analyzing trace with hash -989722515, now seen corresponding path program 1 times [2019-11-15 23:33:02,027 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:33:02,028 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1331216769] [2019-11-15 23:33:02,028 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:33:02,028 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:33:02,028 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:33:02,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:33:02,133 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:33:02,133 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1331216769] [2019-11-15 23:33:02,134 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:33:02,134 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:33:02,134 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203067734] [2019-11-15 23:33:02,134 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:33:02,135 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:33:02,135 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:33:02,135 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:33:02,135 INFO L87 Difference]: Start difference. First operand 7741 states and 16954 transitions. Second operand 7 states. [2019-11-15 23:33:02,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:33:02,257 INFO L93 Difference]: Finished difference Result 9106 states and 20075 transitions. [2019-11-15 23:33:02,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:33:02,257 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 115 [2019-11-15 23:33:02,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:33:02,259 INFO L225 Difference]: With dead ends: 9106 [2019-11-15 23:33:02,259 INFO L226 Difference]: Without dead ends: 1508 [2019-11-15 23:33:02,260 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-15 23:33:02,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1508 states. [2019-11-15 23:33:02,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1508 to 1508. [2019-11-15 23:33:02,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1508 states. [2019-11-15 23:33:02,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1508 states to 1508 states and 3325 transitions. [2019-11-15 23:33:02,277 INFO L78 Accepts]: Start accepts. Automaton has 1508 states and 3325 transitions. Word has length 115 [2019-11-15 23:33:02,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:33:02,277 INFO L462 AbstractCegarLoop]: Abstraction has 1508 states and 3325 transitions. [2019-11-15 23:33:02,277 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:33:02,277 INFO L276 IsEmpty]: Start isEmpty. Operand 1508 states and 3325 transitions. [2019-11-15 23:33:02,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-11-15 23:33:02,279 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:33:02,279 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:33:02,279 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:33:02,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:33:02,280 INFO L82 PathProgramCache]: Analyzing trace with hash -1044850689, now seen corresponding path program 2 times [2019-11-15 23:33:02,280 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:33:02,280 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1193407654] [2019-11-15 23:33:02,280 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:33:02,281 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:33:02,281 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:33:02,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 23:33:02,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 23:33:02,416 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 23:33:02,416 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 23:33:02,658 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 23:33:02,661 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 11:33:02 BasicIcfg [2019-11-15 23:33:02,662 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 23:33:02,662 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 23:33:02,662 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 23:33:02,663 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 23:33:02,663 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 11:32:03" (3/4) ... [2019-11-15 23:33:02,678 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 23:33:02,866 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_1e6c7da2-2f06-43ce-b2ac-ec3969719008/bin/uautomizer/witness.graphml [2019-11-15 23:33:02,866 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 23:33:02,868 INFO L168 Benchmark]: Toolchain (without parser) took 60785.77 ms. Allocated memory was 1.0 GB in the beginning and 4.9 GB in the end (delta: 3.9 GB). Free memory was 939.4 MB in the beginning and 1.4 GB in the end (delta: -472.7 MB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. [2019-11-15 23:33:02,869 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 962.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 23:33:02,869 INFO L168 Benchmark]: CACSL2BoogieTranslator took 641.50 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 140.5 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -162.2 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-11-15 23:33:02,869 INFO L168 Benchmark]: Boogie Procedure Inliner took 58.29 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 23:33:02,870 INFO L168 Benchmark]: Boogie Preprocessor took 93.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-11-15 23:33:02,870 INFO L168 Benchmark]: RCFGBuilder took 870.35 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.0 MB). Peak memory consumption was 60.0 MB. Max. memory is 11.5 GB. [2019-11-15 23:33:02,870 INFO L168 Benchmark]: TraceAbstraction took 58913.87 ms. Allocated memory was 1.2 GB in the beginning and 4.9 GB in the end (delta: 3.7 GB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -494.8 MB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. [2019-11-15 23:33:02,871 INFO L168 Benchmark]: Witness Printer took 204.34 ms. Allocated memory is still 4.9 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 118.9 MB). Peak memory consumption was 118.9 MB. Max. memory is 11.5 GB. [2019-11-15 23:33:02,872 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 962.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 641.50 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 140.5 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -162.2 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 58.29 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 93.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 870.35 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.0 MB). Peak memory consumption was 60.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 58913.87 ms. Allocated memory was 1.2 GB in the beginning and 4.9 GB in the end (delta: 3.7 GB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -494.8 MB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. * Witness Printer took 204.34 ms. Allocated memory is still 4.9 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 118.9 MB). Peak memory consumption was 118.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L698] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L699] 0 _Bool __unbuffered_p1_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0] [L700] 0 int __unbuffered_p1_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0] [L701] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0] [L702] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0] [L703] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0] [L704] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0] [L705] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0] [L706] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0] [L707] 0 _Bool __unbuffered_p1_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0] [L708] 0 int *__unbuffered_p1_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}] [L709] 0 int __unbuffered_p1_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0] [L710] 0 _Bool __unbuffered_p1_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0] [L711] 0 int __unbuffered_p1_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0] [L712] 0 _Bool __unbuffered_p1_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0] [L713] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0] [L714] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L716] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}] [L717] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0] [L718] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0] [L719] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L720] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L721] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L722] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L723] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L724] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L725] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L726] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L727] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L728] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L729] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L730] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L732] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L733] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L734] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L735] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L811] 0 pthread_t t1923; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L812] FCALL, FORK 0 pthread_create(&t1923, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L813] 0 pthread_t t1924; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L814] FCALL, FORK 0 pthread_create(&t1924, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L767] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L768] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L769] 2 x$flush_delayed = weak$$choice2 [L770] EXPR 2 \read(x) [L770] 2 x$mem_tmp = x [L771] 2 weak$$choice1 = __VERIFIER_nondet_bool() [L772] EXPR 2 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L772] EXPR 2 \read(x) [L772] EXPR 2 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) VAL [!x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x))))=0, \read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=6, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L772] 2 x = !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L773] EXPR 2 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0))))=0, x={2:0}, x$flush_delayed=6, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L773] 2 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) [L774] EXPR 2 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1))))=0, x={2:0}, x$flush_delayed=6, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L774] 2 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) [L775] EXPR 2 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0))))=0, x={2:0}, x$flush_delayed=6, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L775] 2 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) [L776] EXPR 2 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={2:0}, x$flush_delayed=6, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L776] 2 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L777] EXPR 2 weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={2:0}, x$flush_delayed=6, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L777] 2 x$r_buff0_thd2 = weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L778] EXPR 2 weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={2:0}, x$flush_delayed=6, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L778] 2 x$r_buff1_thd2 = weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L779] 2 __unbuffered_p1_EAX$read_delayed = (_Bool)1 [L780] 2 __unbuffered_p1_EAX$read_delayed_var = &x [L781] EXPR 2 \read(x) [L781] 2 __unbuffered_p1_EAX = x [L782] EXPR 2 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=6, x$flush_delayed ? x$mem_tmp : x=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L782] 2 x = x$flush_delayed ? x$mem_tmp : x [L783] 2 x$flush_delayed = (_Bool)0 [L786] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L739] 1 __unbuffered_p0_EAX = y [L742] 1 x$w_buff1 = x$w_buff0 [L743] 1 x$w_buff0 = 1 [L744] 1 x$w_buff1_used = x$w_buff0_used [L745] 1 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L747] 1 x$r_buff1_thd0 = x$r_buff0_thd0 [L748] 1 x$r_buff1_thd1 = x$r_buff0_thd1 [L749] 1 x$r_buff1_thd2 = x$r_buff0_thd2 [L750] 1 x$r_buff0_thd1 = (_Bool)1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L753] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L753] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L754] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L789] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L789] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L789] EXPR 2 \read(x) [L789] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x VAL [\read(x)=1, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=1, y=1] [L789] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [\read(x)=1, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x)=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=1, y=1] [L789] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L790] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L790] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L791] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L754] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L755] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L755] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L756] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L756] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L757] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L757] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L760] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L791] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L792] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L792] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L793] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L793] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L796] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L816] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L820] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L820] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L820] EXPR 0 \read(x) [L820] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L820] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L820] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L821] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L821] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L822] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L822] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L823] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L823] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L824] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L824] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L827] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L828] EXPR 0 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L828] EXPR 0 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX [L828] EXPR 0 \read(*__unbuffered_p1_EAX$read_delayed_var) [L828] EXPR 0 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L828] EXPR 0 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L828] 0 __unbuffered_p1_EAX = __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX [L829] 0 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=6, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 314 locations, 3 error locations. Result: UNSAFE, OverallTime: 58.7s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 19.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 10361 SDtfs, 11986 SDslu, 20131 SDs, 0 SdLazy, 7538 SolverSat, 706 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 252 GetRequests, 73 SyntacticMatches, 13 SemanticMatches, 166 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 204 ImplicationChecksByTransitivity, 1.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=139509occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 31.8s AutomataMinimizationTime, 29 MinimizatonAttempts, 134949 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 2593 NumberOfCodeBlocks, 2593 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 2449 ConstructedInterpolants, 0 QuantifiedInterpolants, 512415 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...