./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe007_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_df18f1b9-ce1d-4779-8f20-ac021f64b895/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_df18f1b9-ce1d-4779-8f20-ac021f64b895/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_df18f1b9-ce1d-4779-8f20-ac021f64b895/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_df18f1b9-ce1d-4779-8f20-ac021f64b895/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe007_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_df18f1b9-ce1d-4779-8f20-ac021f64b895/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_df18f1b9-ce1d-4779-8f20-ac021f64b895/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f166c8ce773dc15e5e8bfcdf0e8eac7607e3ec62 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 23:04:50,683 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 23:04:50,685 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 23:04:50,698 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 23:04:50,699 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 23:04:50,700 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 23:04:50,702 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 23:04:50,711 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 23:04:50,716 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 23:04:50,719 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 23:04:50,721 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 23:04:50,722 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 23:04:50,723 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 23:04:50,724 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 23:04:50,725 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 23:04:50,726 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 23:04:50,727 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 23:04:50,728 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 23:04:50,730 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 23:04:50,733 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 23:04:50,736 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 23:04:50,738 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 23:04:50,740 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 23:04:50,741 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 23:04:50,744 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 23:04:50,744 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 23:04:50,744 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 23:04:50,746 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 23:04:50,746 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 23:04:50,747 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 23:04:50,747 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 23:04:50,748 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 23:04:50,748 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 23:04:50,749 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 23:04:50,751 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 23:04:50,751 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 23:04:50,752 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 23:04:50,752 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 23:04:50,752 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 23:04:50,753 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 23:04:50,753 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 23:04:50,754 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_df18f1b9-ce1d-4779-8f20-ac021f64b895/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 23:04:50,778 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 23:04:50,788 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 23:04:50,790 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 23:04:50,790 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 23:04:50,790 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 23:04:50,791 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 23:04:50,791 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 23:04:50,791 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 23:04:50,791 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 23:04:50,792 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 23:04:50,792 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 23:04:50,792 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 23:04:50,792 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 23:04:50,792 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 23:04:50,793 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 23:04:50,794 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 23:04:50,794 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 23:04:50,794 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 23:04:50,795 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 23:04:50,795 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 23:04:50,795 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 23:04:50,795 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 23:04:50,796 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 23:04:50,796 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 23:04:50,796 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 23:04:50,797 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 23:04:50,797 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 23:04:50,797 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 23:04:50,797 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_df18f1b9-ce1d-4779-8f20-ac021f64b895/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f166c8ce773dc15e5e8bfcdf0e8eac7607e3ec62 [2019-11-15 23:04:50,831 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 23:04:50,843 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 23:04:50,846 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 23:04:50,847 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 23:04:50,847 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 23:04:50,848 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_df18f1b9-ce1d-4779-8f20-ac021f64b895/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe007_rmo.oepc.i [2019-11-15 23:04:50,907 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_df18f1b9-ce1d-4779-8f20-ac021f64b895/bin/uautomizer/data/e708fdff8/c283fafa6f7e4624b26cdf43bc3d0bb1/FLAG990e35739 [2019-11-15 23:04:51,362 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 23:04:51,364 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_df18f1b9-ce1d-4779-8f20-ac021f64b895/sv-benchmarks/c/pthread-wmm/safe007_rmo.oepc.i [2019-11-15 23:04:51,387 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_df18f1b9-ce1d-4779-8f20-ac021f64b895/bin/uautomizer/data/e708fdff8/c283fafa6f7e4624b26cdf43bc3d0bb1/FLAG990e35739 [2019-11-15 23:04:51,640 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_df18f1b9-ce1d-4779-8f20-ac021f64b895/bin/uautomizer/data/e708fdff8/c283fafa6f7e4624b26cdf43bc3d0bb1 [2019-11-15 23:04:51,641 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 23:04:51,642 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 23:04:51,643 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 23:04:51,643 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 23:04:51,646 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 23:04:51,647 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 11:04:51" (1/1) ... [2019-11-15 23:04:51,649 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@79973c03 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:04:51, skipping insertion in model container [2019-11-15 23:04:51,649 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 11:04:51" (1/1) ... [2019-11-15 23:04:51,655 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 23:04:51,693 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 23:04:52,103 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 23:04:52,122 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 23:04:52,212 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 23:04:52,293 INFO L192 MainTranslator]: Completed translation [2019-11-15 23:04:52,294 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:04:52 WrapperNode [2019-11-15 23:04:52,294 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 23:04:52,294 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 23:04:52,295 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 23:04:52,295 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 23:04:52,301 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:04:52" (1/1) ... [2019-11-15 23:04:52,317 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:04:52" (1/1) ... [2019-11-15 23:04:52,343 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 23:04:52,344 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 23:04:52,344 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 23:04:52,344 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 23:04:52,350 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:04:52" (1/1) ... [2019-11-15 23:04:52,351 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:04:52" (1/1) ... [2019-11-15 23:04:52,355 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:04:52" (1/1) ... [2019-11-15 23:04:52,355 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:04:52" (1/1) ... [2019-11-15 23:04:52,367 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:04:52" (1/1) ... [2019-11-15 23:04:52,372 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:04:52" (1/1) ... [2019-11-15 23:04:52,375 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:04:52" (1/1) ... [2019-11-15 23:04:52,380 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 23:04:52,381 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 23:04:52,381 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 23:04:52,381 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 23:04:52,382 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:04:52" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_df18f1b9-ce1d-4779-8f20-ac021f64b895/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 23:04:52,458 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-11-15 23:04:52,458 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 23:04:52,459 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 23:04:52,459 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 23:04:52,460 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 23:04:52,461 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 23:04:52,461 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 23:04:52,461 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 23:04:52,461 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 23:04:52,461 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-11-15 23:04:52,464 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-11-15 23:04:52,464 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-11-15 23:04:52,464 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 23:04:52,464 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 23:04:52,465 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 23:04:52,466 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 23:04:53,174 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 23:04:53,174 INFO L284 CfgBuilder]: Removed 6 assume(true) statements. [2019-11-15 23:04:53,176 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 11:04:53 BoogieIcfgContainer [2019-11-15 23:04:53,176 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 23:04:53,176 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 23:04:53,177 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 23:04:53,179 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 23:04:53,179 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 11:04:51" (1/3) ... [2019-11-15 23:04:53,180 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@11886889 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 11:04:53, skipping insertion in model container [2019-11-15 23:04:53,180 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 11:04:52" (2/3) ... [2019-11-15 23:04:53,180 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@11886889 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 11:04:53, skipping insertion in model container [2019-11-15 23:04:53,181 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 11:04:53" (3/3) ... [2019-11-15 23:04:53,183 INFO L109 eAbstractionObserver]: Analyzing ICFG safe007_rmo.oepc.i [2019-11-15 23:04:53,222 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,222 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,222 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,222 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,223 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,223 WARN L315 ript$VariableManager]: TermVariabe Thread1_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,223 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,223 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,223 WARN L315 ript$VariableManager]: TermVariabe Thread1_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,224 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,224 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,224 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,224 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,224 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,224 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,225 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,225 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,225 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,225 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,225 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,226 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,226 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,226 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,226 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,226 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,226 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,227 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,227 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,227 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,227 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,227 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,228 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,228 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,228 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,228 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,228 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,228 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,229 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,229 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,229 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,229 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,229 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,230 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,230 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,230 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,230 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,230 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,230 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,231 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,231 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,231 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,231 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,231 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,231 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,232 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,232 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,232 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,232 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,232 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,233 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,233 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,233 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,233 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,233 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,233 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,234 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,234 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,234 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,234 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,234 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,234 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,235 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,235 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,235 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,235 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,235 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,236 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,236 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,236 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,236 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,236 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,236 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,237 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,237 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,237 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,237 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,237 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,238 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,238 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,238 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,238 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,238 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,239 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,239 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,239 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,239 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,239 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,239 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,240 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,240 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,240 WARN L315 ript$VariableManager]: TermVariabe |Thread2_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,240 WARN L315 ript$VariableManager]: TermVariabe |Thread2_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,240 WARN L315 ript$VariableManager]: TermVariabe Thread2_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,241 WARN L315 ript$VariableManager]: TermVariabe Thread2_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,241 WARN L315 ript$VariableManager]: TermVariabe |Thread2_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,241 WARN L315 ript$VariableManager]: TermVariabe |Thread2_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,241 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,242 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,242 WARN L315 ript$VariableManager]: TermVariabe Thread0_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,242 WARN L315 ript$VariableManager]: TermVariabe Thread0_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,242 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,242 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,243 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,243 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,243 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,243 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,243 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,243 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,244 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,244 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,244 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,244 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,244 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,244 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,245 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,245 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,245 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,245 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,245 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,246 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,246 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,246 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,246 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,246 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,247 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,247 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,247 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,247 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 23:04:53,267 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 23:04:53,268 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 23:04:53,275 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-11-15 23:04:53,284 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-11-15 23:04:53,299 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 23:04:53,300 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 23:04:53,300 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 23:04:53,300 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 23:04:53,300 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 23:04:53,300 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 23:04:53,300 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 23:04:53,301 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 23:04:53,314 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 160 places, 192 transitions [2019-11-15 23:05:05,516 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 101068 states. [2019-11-15 23:05:05,518 INFO L276 IsEmpty]: Start isEmpty. Operand 101068 states. [2019-11-15 23:05:05,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 23:05:05,646 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:05,646 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:05,648 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:05,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:05,654 INFO L82 PathProgramCache]: Analyzing trace with hash 709219595, now seen corresponding path program 1 times [2019-11-15 23:05:05,661 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:05,662 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1975572444] [2019-11-15 23:05:05,662 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:05,662 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:05,663 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:05,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:05,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:05,963 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1975572444] [2019-11-15 23:05:05,964 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:05,964 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:05:05,965 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2119721665] [2019-11-15 23:05:05,970 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:05:05,970 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:05,983 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:05:05,984 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:05:05,986 INFO L87 Difference]: Start difference. First operand 101068 states. Second operand 3 states. [2019-11-15 23:05:07,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:07,389 INFO L93 Difference]: Finished difference Result 112844 states and 526572 transitions. [2019-11-15 23:05:07,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:05:07,391 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-11-15 23:05:07,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:08,184 INFO L225 Difference]: With dead ends: 112844 [2019-11-15 23:05:08,185 INFO L226 Difference]: Without dead ends: 83404 [2019-11-15 23:05:08,187 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:05:09,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83404 states. [2019-11-15 23:05:11,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83404 to 77516. [2019-11-15 23:05:11,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77516 states. [2019-11-15 23:05:18,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77516 states to 77516 states and 367692 transitions. [2019-11-15 23:05:18,608 INFO L78 Accepts]: Start accepts. Automaton has 77516 states and 367692 transitions. Word has length 79 [2019-11-15 23:05:18,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:18,612 INFO L462 AbstractCegarLoop]: Abstraction has 77516 states and 367692 transitions. [2019-11-15 23:05:18,612 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:05:18,612 INFO L276 IsEmpty]: Start isEmpty. Operand 77516 states and 367692 transitions. [2019-11-15 23:05:18,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 23:05:18,741 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:18,742 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:18,742 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:18,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:18,743 INFO L82 PathProgramCache]: Analyzing trace with hash -798332214, now seen corresponding path program 1 times [2019-11-15 23:05:18,743 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:18,743 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1372551991] [2019-11-15 23:05:18,744 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:18,744 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:18,744 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:18,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:18,897 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:18,897 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1372551991] [2019-11-15 23:05:18,898 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:18,898 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:05:18,898 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [493539729] [2019-11-15 23:05:18,900 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:05:18,900 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:18,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:05:18,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:05:18,901 INFO L87 Difference]: Start difference. First operand 77516 states and 367692 transitions. Second operand 4 states. [2019-11-15 23:05:19,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:19,864 INFO L93 Difference]: Finished difference Result 109792 states and 491927 transitions. [2019-11-15 23:05:19,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:05:19,864 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-11-15 23:05:19,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:20,270 INFO L225 Difference]: With dead ends: 109792 [2019-11-15 23:05:20,270 INFO L226 Difference]: Without dead ends: 109792 [2019-11-15 23:05:20,271 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:05:21,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109792 states. [2019-11-15 23:05:23,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109792 to 105944. [2019-11-15 23:05:23,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105944 states. [2019-11-15 23:05:23,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105944 states to 105944 states and 476905 transitions. [2019-11-15 23:05:23,985 INFO L78 Accepts]: Start accepts. Automaton has 105944 states and 476905 transitions. Word has length 79 [2019-11-15 23:05:23,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:23,985 INFO L462 AbstractCegarLoop]: Abstraction has 105944 states and 476905 transitions. [2019-11-15 23:05:23,986 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:05:23,986 INFO L276 IsEmpty]: Start isEmpty. Operand 105944 states and 476905 transitions. [2019-11-15 23:05:24,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 23:05:24,030 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:24,030 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:24,030 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:24,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:24,031 INFO L82 PathProgramCache]: Analyzing trace with hash -229579307, now seen corresponding path program 1 times [2019-11-15 23:05:24,031 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:24,031 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1497009075] [2019-11-15 23:05:24,031 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:24,031 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:24,032 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:24,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:24,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:24,236 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1497009075] [2019-11-15 23:05:24,237 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:24,237 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:05:24,237 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1809253462] [2019-11-15 23:05:24,239 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:05:24,239 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:24,239 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:05:24,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:05:24,240 INFO L87 Difference]: Start difference. First operand 105944 states and 476905 transitions. Second operand 6 states. [2019-11-15 23:05:25,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:25,719 INFO L93 Difference]: Finished difference Result 144292 states and 623102 transitions. [2019-11-15 23:05:25,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:05:25,719 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 81 [2019-11-15 23:05:25,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:26,152 INFO L225 Difference]: With dead ends: 144292 [2019-11-15 23:05:26,152 INFO L226 Difference]: Without dead ends: 144292 [2019-11-15 23:05:26,152 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:05:28,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144292 states. [2019-11-15 23:05:30,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144292 to 126276. [2019-11-15 23:05:30,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126276 states. [2019-11-15 23:05:30,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126276 states to 126276 states and 553838 transitions. [2019-11-15 23:05:30,574 INFO L78 Accepts]: Start accepts. Automaton has 126276 states and 553838 transitions. Word has length 81 [2019-11-15 23:05:30,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:30,574 INFO L462 AbstractCegarLoop]: Abstraction has 126276 states and 553838 transitions. [2019-11-15 23:05:30,574 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:05:30,575 INFO L276 IsEmpty]: Start isEmpty. Operand 126276 states and 553838 transitions. [2019-11-15 23:05:30,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 23:05:30,613 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:30,614 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:30,614 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:30,614 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:30,614 INFO L82 PathProgramCache]: Analyzing trace with hash 967458166, now seen corresponding path program 1 times [2019-11-15 23:05:30,614 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:30,614 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159106072] [2019-11-15 23:05:30,615 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:30,615 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:30,615 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:30,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:30,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:30,731 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159106072] [2019-11-15 23:05:30,731 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:30,731 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:05:30,731 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2059133239] [2019-11-15 23:05:30,732 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:05:30,732 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:30,732 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:05:30,732 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:05:30,733 INFO L87 Difference]: Start difference. First operand 126276 states and 553838 transitions. Second operand 4 states. [2019-11-15 23:05:32,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:32,674 INFO L93 Difference]: Finished difference Result 106098 states and 453188 transitions. [2019-11-15 23:05:32,675 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:05:32,675 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 81 [2019-11-15 23:05:32,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:33,096 INFO L225 Difference]: With dead ends: 106098 [2019-11-15 23:05:33,096 INFO L226 Difference]: Without dead ends: 103378 [2019-11-15 23:05:33,097 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:05:33,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103378 states. [2019-11-15 23:05:34,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103378 to 103378. [2019-11-15 23:05:34,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103378 states. [2019-11-15 23:05:35,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103378 states to 103378 states and 443505 transitions. [2019-11-15 23:05:35,286 INFO L78 Accepts]: Start accepts. Automaton has 103378 states and 443505 transitions. Word has length 81 [2019-11-15 23:05:35,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:35,287 INFO L462 AbstractCegarLoop]: Abstraction has 103378 states and 443505 transitions. [2019-11-15 23:05:35,287 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:05:35,287 INFO L276 IsEmpty]: Start isEmpty. Operand 103378 states and 443505 transitions. [2019-11-15 23:05:35,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-11-15 23:05:35,317 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:35,317 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:35,318 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:35,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:35,318 INFO L82 PathProgramCache]: Analyzing trace with hash 167888710, now seen corresponding path program 1 times [2019-11-15 23:05:35,318 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:35,319 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1598192353] [2019-11-15 23:05:35,319 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:35,319 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:35,319 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:35,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:35,464 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:35,465 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1598192353] [2019-11-15 23:05:35,466 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:35,466 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:05:35,466 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1317467817] [2019-11-15 23:05:35,467 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:05:35,467 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:35,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:05:35,468 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:05:35,468 INFO L87 Difference]: Start difference. First operand 103378 states and 443505 transitions. Second operand 5 states. [2019-11-15 23:05:35,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:35,678 INFO L93 Difference]: Finished difference Result 29410 states and 112481 transitions. [2019-11-15 23:05:35,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 23:05:35,678 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2019-11-15 23:05:35,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:35,745 INFO L225 Difference]: With dead ends: 29410 [2019-11-15 23:05:35,745 INFO L226 Difference]: Without dead ends: 27193 [2019-11-15 23:05:35,746 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:05:35,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27193 states. [2019-11-15 23:05:36,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27193 to 27193. [2019-11-15 23:05:36,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27193 states. [2019-11-15 23:05:37,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27193 states to 27193 states and 103539 transitions. [2019-11-15 23:05:37,068 INFO L78 Accepts]: Start accepts. Automaton has 27193 states and 103539 transitions. Word has length 82 [2019-11-15 23:05:37,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:37,068 INFO L462 AbstractCegarLoop]: Abstraction has 27193 states and 103539 transitions. [2019-11-15 23:05:37,068 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:05:37,069 INFO L276 IsEmpty]: Start isEmpty. Operand 27193 states and 103539 transitions. [2019-11-15 23:05:37,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-11-15 23:05:37,089 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:37,089 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:37,089 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:37,089 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:37,090 INFO L82 PathProgramCache]: Analyzing trace with hash 212812663, now seen corresponding path program 1 times [2019-11-15 23:05:37,090 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:37,090 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [754051864] [2019-11-15 23:05:37,090 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:37,091 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:37,091 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:37,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:37,221 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:37,221 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [754051864] [2019-11-15 23:05:37,221 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:37,221 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:05:37,222 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1905168332] [2019-11-15 23:05:37,222 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:05:37,222 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:37,223 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:05:37,223 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:05:37,223 INFO L87 Difference]: Start difference. First operand 27193 states and 103539 transitions. Second operand 4 states. [2019-11-15 23:05:37,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:37,481 INFO L93 Difference]: Finished difference Result 26475 states and 99467 transitions. [2019-11-15 23:05:37,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:05:37,483 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2019-11-15 23:05:37,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:37,536 INFO L225 Difference]: With dead ends: 26475 [2019-11-15 23:05:37,536 INFO L226 Difference]: Without dead ends: 26475 [2019-11-15 23:05:37,536 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:05:37,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26475 states. [2019-11-15 23:05:37,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26475 to 25098. [2019-11-15 23:05:37,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25098 states. [2019-11-15 23:05:37,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25098 states to 25098 states and 94571 transitions. [2019-11-15 23:05:37,953 INFO L78 Accepts]: Start accepts. Automaton has 25098 states and 94571 transitions. Word has length 93 [2019-11-15 23:05:37,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:37,953 INFO L462 AbstractCegarLoop]: Abstraction has 25098 states and 94571 transitions. [2019-11-15 23:05:37,953 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:05:37,953 INFO L276 IsEmpty]: Start isEmpty. Operand 25098 states and 94571 transitions. [2019-11-15 23:05:37,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:05:37,981 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:37,981 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:37,981 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:37,981 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:37,982 INFO L82 PathProgramCache]: Analyzing trace with hash -1666832320, now seen corresponding path program 1 times [2019-11-15 23:05:37,982 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:37,982 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [598555788] [2019-11-15 23:05:37,982 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:37,982 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:37,983 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:38,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:38,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:38,091 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [598555788] [2019-11-15 23:05:38,091 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:38,092 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:05:38,092 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1513211856] [2019-11-15 23:05:38,092 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:05:38,092 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:38,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:05:38,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:05:38,093 INFO L87 Difference]: Start difference. First operand 25098 states and 94571 transitions. Second operand 5 states. [2019-11-15 23:05:38,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:38,723 INFO L93 Difference]: Finished difference Result 46462 states and 173590 transitions. [2019-11-15 23:05:38,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 23:05:38,723 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-11-15 23:05:38,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:38,804 INFO L225 Difference]: With dead ends: 46462 [2019-11-15 23:05:38,804 INFO L226 Difference]: Without dead ends: 46462 [2019-11-15 23:05:38,805 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-15 23:05:38,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46462 states. [2019-11-15 23:05:39,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46462 to 17661. [2019-11-15 23:05:39,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17661 states. [2019-11-15 23:05:39,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17661 states to 17661 states and 66368 transitions. [2019-11-15 23:05:39,240 INFO L78 Accepts]: Start accepts. Automaton has 17661 states and 66368 transitions. Word has length 95 [2019-11-15 23:05:39,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:39,240 INFO L462 AbstractCegarLoop]: Abstraction has 17661 states and 66368 transitions. [2019-11-15 23:05:39,240 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:05:39,241 INFO L276 IsEmpty]: Start isEmpty. Operand 17661 states and 66368 transitions. [2019-11-15 23:05:39,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:05:39,262 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:39,262 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:39,262 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:39,263 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:39,263 INFO L82 PathProgramCache]: Analyzing trace with hash 831183617, now seen corresponding path program 1 times [2019-11-15 23:05:39,263 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:39,263 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [842716982] [2019-11-15 23:05:39,263 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:39,264 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:39,264 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:39,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:39,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:39,334 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [842716982] [2019-11-15 23:05:39,334 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:39,335 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:05:39,335 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [825320490] [2019-11-15 23:05:39,335 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:05:39,335 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:39,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:05:39,336 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:05:39,336 INFO L87 Difference]: Start difference. First operand 17661 states and 66368 transitions. Second operand 4 states. [2019-11-15 23:05:39,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:39,589 INFO L93 Difference]: Finished difference Result 22409 states and 83382 transitions. [2019-11-15 23:05:39,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:05:39,589 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2019-11-15 23:05:39,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:39,638 INFO L225 Difference]: With dead ends: 22409 [2019-11-15 23:05:39,638 INFO L226 Difference]: Without dead ends: 22409 [2019-11-15 23:05:39,638 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:05:39,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22409 states. [2019-11-15 23:05:39,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22409 to 19475. [2019-11-15 23:05:39,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19475 states. [2019-11-15 23:05:40,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19475 states to 19475 states and 72567 transitions. [2019-11-15 23:05:40,004 INFO L78 Accepts]: Start accepts. Automaton has 19475 states and 72567 transitions. Word has length 95 [2019-11-15 23:05:40,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:40,004 INFO L462 AbstractCegarLoop]: Abstraction has 19475 states and 72567 transitions. [2019-11-15 23:05:40,004 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:05:40,004 INFO L276 IsEmpty]: Start isEmpty. Operand 19475 states and 72567 transitions. [2019-11-15 23:05:40,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:05:40,022 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:40,022 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:40,023 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:40,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:40,023 INFO L82 PathProgramCache]: Analyzing trace with hash -165888736, now seen corresponding path program 1 times [2019-11-15 23:05:40,023 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:40,024 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [444322736] [2019-11-15 23:05:40,024 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:40,024 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:40,024 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:40,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:40,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:40,213 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [444322736] [2019-11-15 23:05:40,213 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:40,214 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:05:40,215 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [675768875] [2019-11-15 23:05:40,215 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:05:40,215 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:40,215 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:05:40,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:05:40,216 INFO L87 Difference]: Start difference. First operand 19475 states and 72567 transitions. Second operand 7 states. [2019-11-15 23:05:40,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:40,822 INFO L93 Difference]: Finished difference Result 34558 states and 125932 transitions. [2019-11-15 23:05:40,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:05:40,822 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 95 [2019-11-15 23:05:40,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:40,878 INFO L225 Difference]: With dead ends: 34558 [2019-11-15 23:05:40,878 INFO L226 Difference]: Without dead ends: 34558 [2019-11-15 23:05:40,879 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=54, Unknown=0, NotChecked=0, Total=90 [2019-11-15 23:05:40,952 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34558 states. [2019-11-15 23:05:41,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34558 to 17661. [2019-11-15 23:05:41,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17661 states. [2019-11-15 23:05:41,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17661 states to 17661 states and 64577 transitions. [2019-11-15 23:05:41,236 INFO L78 Accepts]: Start accepts. Automaton has 17661 states and 64577 transitions. Word has length 95 [2019-11-15 23:05:41,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:41,236 INFO L462 AbstractCegarLoop]: Abstraction has 17661 states and 64577 transitions. [2019-11-15 23:05:41,236 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:05:41,236 INFO L276 IsEmpty]: Start isEmpty. Operand 17661 states and 64577 transitions. [2019-11-15 23:05:41,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:05:41,248 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:41,248 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:41,248 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:41,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:41,248 INFO L82 PathProgramCache]: Analyzing trace with hash 2028221090, now seen corresponding path program 1 times [2019-11-15 23:05:41,249 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:41,249 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1316454383] [2019-11-15 23:05:41,249 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:41,249 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:41,249 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:41,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:41,315 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:41,316 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1316454383] [2019-11-15 23:05:41,316 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:41,316 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:05:41,316 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [112542241] [2019-11-15 23:05:41,317 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:05:41,317 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:41,317 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:05:41,317 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:05:41,318 INFO L87 Difference]: Start difference. First operand 17661 states and 64577 transitions. Second operand 4 states. [2019-11-15 23:05:41,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:41,639 INFO L93 Difference]: Finished difference Result 23583 states and 84633 transitions. [2019-11-15 23:05:41,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:05:41,639 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2019-11-15 23:05:41,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:41,680 INFO L225 Difference]: With dead ends: 23583 [2019-11-15 23:05:41,681 INFO L226 Difference]: Without dead ends: 23583 [2019-11-15 23:05:41,681 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:05:41,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23583 states. [2019-11-15 23:05:42,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23583 to 21500. [2019-11-15 23:05:42,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21500 states. [2019-11-15 23:05:42,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21500 states to 21500 states and 77748 transitions. [2019-11-15 23:05:42,153 INFO L78 Accepts]: Start accepts. Automaton has 21500 states and 77748 transitions. Word has length 95 [2019-11-15 23:05:42,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:42,153 INFO L462 AbstractCegarLoop]: Abstraction has 21500 states and 77748 transitions. [2019-11-15 23:05:42,153 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:05:42,153 INFO L276 IsEmpty]: Start isEmpty. Operand 21500 states and 77748 transitions. [2019-11-15 23:05:42,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:05:42,169 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:42,169 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:42,169 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:42,169 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:42,169 INFO L82 PathProgramCache]: Analyzing trace with hash -1305132189, now seen corresponding path program 1 times [2019-11-15 23:05:42,170 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:42,170 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [620513315] [2019-11-15 23:05:42,170 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:42,170 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:42,170 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:42,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:42,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:42,306 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [620513315] [2019-11-15 23:05:42,306 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:42,306 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:05:42,307 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2099657435] [2019-11-15 23:05:42,307 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:05:42,307 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:42,308 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:05:42,308 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:05:42,308 INFO L87 Difference]: Start difference. First operand 21500 states and 77748 transitions. Second operand 6 states. [2019-11-15 23:05:42,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:42,574 INFO L93 Difference]: Finished difference Result 25339 states and 90881 transitions. [2019-11-15 23:05:42,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 23:05:42,575 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 23:05:42,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:42,624 INFO L225 Difference]: With dead ends: 25339 [2019-11-15 23:05:42,625 INFO L226 Difference]: Without dead ends: 25339 [2019-11-15 23:05:42,625 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:05:42,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25339 states. [2019-11-15 23:05:42,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25339 to 22099. [2019-11-15 23:05:42,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22099 states. [2019-11-15 23:05:42,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22099 states to 22099 states and 79727 transitions. [2019-11-15 23:05:42,989 INFO L78 Accepts]: Start accepts. Automaton has 22099 states and 79727 transitions. Word has length 95 [2019-11-15 23:05:42,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:42,990 INFO L462 AbstractCegarLoop]: Abstraction has 22099 states and 79727 transitions. [2019-11-15 23:05:42,990 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:05:42,990 INFO L276 IsEmpty]: Start isEmpty. Operand 22099 states and 79727 transitions. [2019-11-15 23:05:43,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-11-15 23:05:43,008 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:43,008 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:43,008 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:43,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:43,008 INFO L82 PathProgramCache]: Analyzing trace with hash -60367708, now seen corresponding path program 1 times [2019-11-15 23:05:43,009 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:43,009 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [813416744] [2019-11-15 23:05:43,009 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:43,009 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:43,009 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:43,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:43,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:43,092 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [813416744] [2019-11-15 23:05:43,092 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:43,093 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 23:05:43,093 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1813520276] [2019-11-15 23:05:43,093 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 23:05:43,093 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:43,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 23:05:43,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 23:05:43,094 INFO L87 Difference]: Start difference. First operand 22099 states and 79727 transitions. Second operand 6 states. [2019-11-15 23:05:43,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:43,194 INFO L93 Difference]: Finished difference Result 6826 states and 21617 transitions. [2019-11-15 23:05:43,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:05:43,195 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-11-15 23:05:43,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:43,205 INFO L225 Difference]: With dead ends: 6826 [2019-11-15 23:05:43,206 INFO L226 Difference]: Without dead ends: 5841 [2019-11-15 23:05:43,206 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-11-15 23:05:43,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5841 states. [2019-11-15 23:05:43,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5841 to 5841. [2019-11-15 23:05:43,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5841 states. [2019-11-15 23:05:43,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5841 states to 5841 states and 18219 transitions. [2019-11-15 23:05:43,283 INFO L78 Accepts]: Start accepts. Automaton has 5841 states and 18219 transitions. Word has length 95 [2019-11-15 23:05:43,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:43,283 INFO L462 AbstractCegarLoop]: Abstraction has 5841 states and 18219 transitions. [2019-11-15 23:05:43,283 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 23:05:43,284 INFO L276 IsEmpty]: Start isEmpty. Operand 5841 states and 18219 transitions. [2019-11-15 23:05:43,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2019-11-15 23:05:43,290 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:43,290 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:43,290 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:43,290 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:43,290 INFO L82 PathProgramCache]: Analyzing trace with hash -936719294, now seen corresponding path program 1 times [2019-11-15 23:05:43,291 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:43,291 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [182461912] [2019-11-15 23:05:43,291 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:43,291 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:43,291 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:43,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:43,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:43,347 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [182461912] [2019-11-15 23:05:43,347 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:43,347 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:05:43,347 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [332532581] [2019-11-15 23:05:43,348 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:05:43,348 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:43,348 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:05:43,348 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:05:43,349 INFO L87 Difference]: Start difference. First operand 5841 states and 18219 transitions. Second operand 4 states. [2019-11-15 23:05:43,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:43,498 INFO L93 Difference]: Finished difference Result 7954 states and 24418 transitions. [2019-11-15 23:05:43,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:05:43,498 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 110 [2019-11-15 23:05:43,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:43,511 INFO L225 Difference]: With dead ends: 7954 [2019-11-15 23:05:43,511 INFO L226 Difference]: Without dead ends: 7818 [2019-11-15 23:05:43,511 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:05:43,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7818 states. [2019-11-15 23:05:43,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7818 to 6933. [2019-11-15 23:05:43,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6933 states. [2019-11-15 23:05:43,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6933 states to 6933 states and 21404 transitions. [2019-11-15 23:05:43,615 INFO L78 Accepts]: Start accepts. Automaton has 6933 states and 21404 transitions. Word has length 110 [2019-11-15 23:05:43,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:43,615 INFO L462 AbstractCegarLoop]: Abstraction has 6933 states and 21404 transitions. [2019-11-15 23:05:43,615 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:05:43,616 INFO L276 IsEmpty]: Start isEmpty. Operand 6933 states and 21404 transitions. [2019-11-15 23:05:43,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-11-15 23:05:43,623 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:43,623 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:43,623 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:43,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:43,623 INFO L82 PathProgramCache]: Analyzing trace with hash 1943222183, now seen corresponding path program 1 times [2019-11-15 23:05:43,623 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:43,624 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [79296949] [2019-11-15 23:05:43,624 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:43,624 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:43,624 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:43,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:43,688 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:43,689 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [79296949] [2019-11-15 23:05:43,689 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:43,689 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 23:05:43,689 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1513765103] [2019-11-15 23:05:43,690 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 23:05:43,690 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:43,690 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 23:05:43,690 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 23:05:43,691 INFO L87 Difference]: Start difference. First operand 6933 states and 21404 transitions. Second operand 4 states. [2019-11-15 23:05:43,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:43,827 INFO L93 Difference]: Finished difference Result 10872 states and 33772 transitions. [2019-11-15 23:05:43,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 23:05:43,828 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 112 [2019-11-15 23:05:43,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:43,846 INFO L225 Difference]: With dead ends: 10872 [2019-11-15 23:05:43,846 INFO L226 Difference]: Without dead ends: 10872 [2019-11-15 23:05:43,847 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:05:43,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10872 states. [2019-11-15 23:05:43,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10872 to 7957. [2019-11-15 23:05:43,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7957 states. [2019-11-15 23:05:44,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7957 states to 7957 states and 24452 transitions. [2019-11-15 23:05:44,001 INFO L78 Accepts]: Start accepts. Automaton has 7957 states and 24452 transitions. Word has length 112 [2019-11-15 23:05:44,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:44,001 INFO L462 AbstractCegarLoop]: Abstraction has 7957 states and 24452 transitions. [2019-11-15 23:05:44,001 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 23:05:44,001 INFO L276 IsEmpty]: Start isEmpty. Operand 7957 states and 24452 transitions. [2019-11-15 23:05:44,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-11-15 23:05:44,008 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:44,009 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:44,009 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:44,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:44,009 INFO L82 PathProgramCache]: Analyzing trace with hash -66881658, now seen corresponding path program 1 times [2019-11-15 23:05:44,010 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:44,010 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [928568130] [2019-11-15 23:05:44,010 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:44,010 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:44,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:44,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:44,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:44,082 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [928568130] [2019-11-15 23:05:44,082 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:44,082 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 23:05:44,083 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [247920427] [2019-11-15 23:05:44,083 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 23:05:44,083 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:44,083 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 23:05:44,084 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 23:05:44,084 INFO L87 Difference]: Start difference. First operand 7957 states and 24452 transitions. Second operand 5 states. [2019-11-15 23:05:44,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:44,272 INFO L93 Difference]: Finished difference Result 9090 states and 27830 transitions. [2019-11-15 23:05:44,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:05:44,272 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 112 [2019-11-15 23:05:44,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:44,283 INFO L225 Difference]: With dead ends: 9090 [2019-11-15 23:05:44,283 INFO L226 Difference]: Without dead ends: 8954 [2019-11-15 23:05:44,284 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:05:44,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8954 states. [2019-11-15 23:05:44,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8954 to 7933. [2019-11-15 23:05:44,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7933 states. [2019-11-15 23:05:44,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7933 states to 7933 states and 24378 transitions. [2019-11-15 23:05:44,386 INFO L78 Accepts]: Start accepts. Automaton has 7933 states and 24378 transitions. Word has length 112 [2019-11-15 23:05:44,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:44,386 INFO L462 AbstractCegarLoop]: Abstraction has 7933 states and 24378 transitions. [2019-11-15 23:05:44,386 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 23:05:44,387 INFO L276 IsEmpty]: Start isEmpty. Operand 7933 states and 24378 transitions. [2019-11-15 23:05:44,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-11-15 23:05:44,398 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:44,398 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:44,398 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:44,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:44,399 INFO L82 PathProgramCache]: Analyzing trace with hash -1182476984, now seen corresponding path program 1 times [2019-11-15 23:05:44,399 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:44,399 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025028665] [2019-11-15 23:05:44,399 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:44,399 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:44,399 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:44,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:44,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:44,573 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1025028665] [2019-11-15 23:05:44,575 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:44,575 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 23:05:44,576 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2062036819] [2019-11-15 23:05:44,576 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 23:05:44,576 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:44,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 23:05:44,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-11-15 23:05:44,577 INFO L87 Difference]: Start difference. First operand 7933 states and 24378 transitions. Second operand 8 states. [2019-11-15 23:05:45,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:45,025 INFO L93 Difference]: Finished difference Result 10179 states and 30951 transitions. [2019-11-15 23:05:45,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 23:05:45,025 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 112 [2019-11-15 23:05:45,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:45,037 INFO L225 Difference]: With dead ends: 10179 [2019-11-15 23:05:45,037 INFO L226 Difference]: Without dead ends: 10179 [2019-11-15 23:05:45,037 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 5 SyntacticMatches, 4 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=68, Invalid=172, Unknown=0, NotChecked=0, Total=240 [2019-11-15 23:05:45,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10179 states. [2019-11-15 23:05:45,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10179 to 8213. [2019-11-15 23:05:45,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8213 states. [2019-11-15 23:05:45,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8213 states to 8213 states and 25184 transitions. [2019-11-15 23:05:45,148 INFO L78 Accepts]: Start accepts. Automaton has 8213 states and 25184 transitions. Word has length 112 [2019-11-15 23:05:45,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:45,148 INFO L462 AbstractCegarLoop]: Abstraction has 8213 states and 25184 transitions. [2019-11-15 23:05:45,148 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 23:05:45,149 INFO L276 IsEmpty]: Start isEmpty. Operand 8213 states and 25184 transitions. [2019-11-15 23:05:45,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-11-15 23:05:45,157 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:45,157 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:45,157 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:45,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:45,157 INFO L82 PathProgramCache]: Analyzing trace with hash 62287497, now seen corresponding path program 1 times [2019-11-15 23:05:45,157 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:45,158 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1450673703] [2019-11-15 23:05:45,158 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:45,158 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:45,158 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:45,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:45,216 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:45,216 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1450673703] [2019-11-15 23:05:45,216 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:45,216 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 23:05:45,217 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761847983] [2019-11-15 23:05:45,217 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 23:05:45,217 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:45,217 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 23:05:45,218 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:05:45,218 INFO L87 Difference]: Start difference. First operand 8213 states and 25184 transitions. Second operand 3 states. [2019-11-15 23:05:45,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:45,250 INFO L93 Difference]: Finished difference Result 8213 states and 25157 transitions. [2019-11-15 23:05:45,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 23:05:45,250 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 112 [2019-11-15 23:05:45,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:45,263 INFO L225 Difference]: With dead ends: 8213 [2019-11-15 23:05:45,263 INFO L226 Difference]: Without dead ends: 8213 [2019-11-15 23:05:45,264 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 23:05:45,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8213 states. [2019-11-15 23:05:45,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8213 to 8213. [2019-11-15 23:05:45,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8213 states. [2019-11-15 23:05:45,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8213 states to 8213 states and 25157 transitions. [2019-11-15 23:05:45,357 INFO L78 Accepts]: Start accepts. Automaton has 8213 states and 25157 transitions. Word has length 112 [2019-11-15 23:05:45,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:45,357 INFO L462 AbstractCegarLoop]: Abstraction has 8213 states and 25157 transitions. [2019-11-15 23:05:45,358 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 23:05:45,358 INFO L276 IsEmpty]: Start isEmpty. Operand 8213 states and 25157 transitions. [2019-11-15 23:05:45,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2019-11-15 23:05:45,365 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:45,365 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:45,365 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:45,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:45,365 INFO L82 PathProgramCache]: Analyzing trace with hash -370258387, now seen corresponding path program 1 times [2019-11-15 23:05:45,365 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:45,365 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [301776945] [2019-11-15 23:05:45,366 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:45,366 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:45,366 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:45,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 23:05:45,520 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 23:05:45,520 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [301776945] [2019-11-15 23:05:45,520 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 23:05:45,521 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 23:05:45,521 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1077098763] [2019-11-15 23:05:45,521 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 23:05:45,521 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 23:05:45,521 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 23:05:45,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 23:05:45,522 INFO L87 Difference]: Start difference. First operand 8213 states and 25157 transitions. Second operand 7 states. [2019-11-15 23:05:45,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 23:05:45,643 INFO L93 Difference]: Finished difference Result 9428 states and 28496 transitions. [2019-11-15 23:05:45,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 23:05:45,644 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 114 [2019-11-15 23:05:45,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 23:05:45,649 INFO L225 Difference]: With dead ends: 9428 [2019-11-15 23:05:45,649 INFO L226 Difference]: Without dead ends: 3470 [2019-11-15 23:05:45,649 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-15 23:05:45,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3470 states. [2019-11-15 23:05:45,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3470 to 3470. [2019-11-15 23:05:45,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3470 states. [2019-11-15 23:05:45,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3470 states to 3470 states and 8822 transitions. [2019-11-15 23:05:45,698 INFO L78 Accepts]: Start accepts. Automaton has 3470 states and 8822 transitions. Word has length 114 [2019-11-15 23:05:45,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 23:05:45,699 INFO L462 AbstractCegarLoop]: Abstraction has 3470 states and 8822 transitions. [2019-11-15 23:05:45,699 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 23:05:45,699 INFO L276 IsEmpty]: Start isEmpty. Operand 3470 states and 8822 transitions. [2019-11-15 23:05:45,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2019-11-15 23:05:45,703 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 23:05:45,703 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 23:05:45,703 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 23:05:45,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 23:05:45,704 INFO L82 PathProgramCache]: Analyzing trace with hash -1725743903, now seen corresponding path program 2 times [2019-11-15 23:05:45,704 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 23:05:45,704 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1586805889] [2019-11-15 23:05:45,704 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:45,704 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 23:05:45,705 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 23:05:45,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 23:05:45,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 23:05:45,880 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 23:05:45,880 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 23:05:46,137 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 23:05:46,138 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 11:05:46 BasicIcfg [2019-11-15 23:05:46,139 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 23:05:46,139 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 23:05:46,139 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 23:05:46,139 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 23:05:46,140 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 11:04:53" (3/4) ... [2019-11-15 23:05:46,142 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 23:05:46,351 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_df18f1b9-ce1d-4779-8f20-ac021f64b895/bin/uautomizer/witness.graphml [2019-11-15 23:05:46,351 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 23:05:46,354 INFO L168 Benchmark]: Toolchain (without parser) took 54709.79 ms. Allocated memory was 1.0 GB in the beginning and 5.4 GB in the end (delta: 4.4 GB). Free memory was 944.7 MB in the beginning and 1.8 GB in the end (delta: -859.7 MB). Peak memory consumption was 3.5 GB. Max. memory is 11.5 GB. [2019-11-15 23:05:46,354 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 23:05:46,355 INFO L168 Benchmark]: CACSL2BoogieTranslator took 651.04 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 132.1 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -150.2 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-11-15 23:05:46,355 INFO L168 Benchmark]: Boogie Procedure Inliner took 49.23 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2019-11-15 23:05:46,355 INFO L168 Benchmark]: Boogie Preprocessor took 36.77 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 23:05:46,356 INFO L168 Benchmark]: RCFGBuilder took 794.84 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.6 MB). Peak memory consumption was 54.6 MB. Max. memory is 11.5 GB. [2019-11-15 23:05:46,356 INFO L168 Benchmark]: TraceAbstraction took 52962.24 ms. Allocated memory was 1.2 GB in the beginning and 5.4 GB in the end (delta: 4.3 GB). Free memory was 1.0 GB in the beginning and 1.9 GB in the end (delta: -836.3 MB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. [2019-11-15 23:05:46,357 INFO L168 Benchmark]: Witness Printer took 211.93 ms. Allocated memory is still 5.4 GB. Free memory was 1.9 GB in the beginning and 1.8 GB in the end (delta: 65.6 MB). Peak memory consumption was 65.6 MB. Max. memory is 11.5 GB. [2019-11-15 23:05:46,359 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 651.04 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 132.1 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -150.2 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 49.23 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 36.77 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 794.84 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.6 MB). Peak memory consumption was 54.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 52962.24 ms. Allocated memory was 1.2 GB in the beginning and 5.4 GB in the end (delta: 4.3 GB). Free memory was 1.0 GB in the beginning and 1.9 GB in the end (delta: -836.3 MB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. * Witness Printer took 211.93 ms. Allocated memory is still 5.4 GB. Free memory was 1.9 GB in the beginning and 1.8 GB in the end (delta: 65.6 MB). Peak memory consumption was 65.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L696] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L698] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L699] 0 _Bool __unbuffered_p0_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0] [L700] 0 int __unbuffered_p0_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0] [L701] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0] [L702] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0] [L703] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0] [L704] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0] [L705] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0] [L706] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0] [L707] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0] [L708] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0] [L709] 0 _Bool __unbuffered_p0_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0] [L710] 0 int *__unbuffered_p0_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}] [L711] 0 int __unbuffered_p0_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0] [L712] 0 _Bool __unbuffered_p0_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0] [L713] 0 int __unbuffered_p0_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0] [L714] 0 _Bool __unbuffered_p0_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0] [L716] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0] [L718] 0 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L719] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L720] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L722] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L724] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L726] 0 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}] [L727] 0 _Bool z$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0] [L728] 0 int z$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0] [L729] 0 _Bool z$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0] [L730] 0 _Bool z$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0] [L731] 0 _Bool z$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0] [L732] 0 _Bool z$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0] [L733] 0 _Bool z$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0] [L734] 0 _Bool z$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0] [L735] 0 _Bool z$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0] [L736] 0 _Bool z$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0] [L737] 0 _Bool z$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0] [L738] 0 int *z$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}] [L739] 0 int z$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0] [L740] 0 _Bool z$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0] [L741] 0 int z$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0] [L742] 0 _Bool z$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L743] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L744] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L745] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L822] 0 pthread_t t1949; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L823] FCALL, FORK 0 pthread_create(&t1949, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L749] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L750] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L751] 1 z$flush_delayed = weak$$choice2 [L752] EXPR 1 \read(z) [L752] 1 z$mem_tmp = z [L824] 0 pthread_t t1950; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={1:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L753] EXPR 1 !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) [L753] EXPR 1 \read(z) [L753] EXPR 1 !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1)=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={1:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L825] FCALL, FORK 0 pthread_create(&t1950, ((void *)0), P1, ((void *)0)) VAL [!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1)=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={1:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L753] 1 z = !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) [L754] EXPR 1 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0))=0, x=0, y=0, z={1:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L826] 0 pthread_t t1951; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0))=0, x=0, y=0, z={1:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L754] 1 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)) [L755] EXPR 1 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1))=0, x=0, y=0, z={1:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L755] 1 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)) [L756] EXPR 1 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used))=0, x=0, y=0, z={1:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L756] 1 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used)) [L757] EXPR 1 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y=0, z={1:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L757] 1 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L758] EXPR 1 weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1))=0, x=0, y=0, z={1:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L758] 1 z$r_buff0_thd1 = weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1)) [L759] EXPR 1 weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y=0, z={1:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L759] 1 z$r_buff1_thd1 = weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L760] 1 __unbuffered_p0_EAX$read_delayed = (_Bool)1 [L761] 1 __unbuffered_p0_EAX$read_delayed_var = &z [L762] EXPR 1 \read(z) [L762] 1 __unbuffered_p0_EAX = z [L763] EXPR 1 z$flush_delayed ? z$mem_tmp : z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={1:0}, z$flush_delayed=1, z$flush_delayed ? z$mem_tmp : z=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L763] 1 z = z$flush_delayed ? z$mem_tmp : z [L764] 1 z$flush_delayed = (_Bool)0 [L767] 1 x = 1 [L772] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=0, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L779] 2 __unbuffered_p1_EAX = x [L782] 2 y = 1 [L787] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L827] FCALL, FORK 0 pthread_create(&t1951, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L794] 3 __unbuffered_p2_EAX = y [L797] 3 z = 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] EXPR 3 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z [L800] EXPR 3 \read(z) [L800] EXPR 3 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L800] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z)=1, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L800] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L801] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L801] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L802] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L802] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L803] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L803] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L804] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L804] 3 z$r_buff1_thd3 = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 [L807] 3 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L829] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] EXPR 0 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z [L833] EXPR 0 \read(z) [L833] EXPR 0 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L834] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L834] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L835] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L835] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L836] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L836] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L837] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L840] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L841] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX [L841] EXPR 0 \read(*__unbuffered_p0_EAX$read_delayed_var) [L841] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] 0 __unbuffered_p0_EAX = __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L842] 0 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] COND TRUE 0 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] 0 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={1:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={1:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 226 locations, 1 error locations. Result: UNSAFE, OverallTime: 52.8s, OverallIterations: 19, TraceHistogramMax: 1, AutomataDifference: 12.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 4306 SDtfs, 5049 SDslu, 7776 SDs, 0 SdLazy, 2670 SolverSat, 216 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 162 GetRequests, 52 SyntacticMatches, 19 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 1.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=126276occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 25.1s AutomataMinimizationTime, 18 MinimizatonAttempts, 89871 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.5s InterpolantComputationTime, 1851 NumberOfCodeBlocks, 1851 NumberOfCodeBlocksAsserted, 19 NumberOfCheckSat, 1719 ConstructedInterpolants, 0 QuantifiedInterpolants, 376027 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 18 InterpolantComputations, 18 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...