./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe010_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_709d40c5-1f68-4a8b-bef3-d11b27c5b91f/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_709d40c5-1f68-4a8b-bef3-d11b27c5b91f/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_709d40c5-1f68-4a8b-bef3-d11b27c5b91f/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_709d40c5-1f68-4a8b-bef3-d11b27c5b91f/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe010_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_709d40c5-1f68-4a8b-bef3-d11b27c5b91f/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_709d40c5-1f68-4a8b-bef3-d11b27c5b91f/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 31d6964eed2cb94ec120d453769c6230ed3a07c6 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 21:46:45,633 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 21:46:45,635 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 21:46:45,648 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 21:46:45,649 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 21:46:45,651 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 21:46:45,653 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 21:46:45,656 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 21:46:45,661 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 21:46:45,675 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 21:46:45,676 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 21:46:45,677 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 21:46:45,677 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 21:46:45,679 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 21:46:45,680 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 21:46:45,681 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 21:46:45,682 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 21:46:45,683 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 21:46:45,685 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 21:46:45,687 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 21:46:45,694 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 21:46:45,696 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 21:46:45,697 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 21:46:45,698 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 21:46:45,701 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 21:46:45,701 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 21:46:45,702 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 21:46:45,703 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 21:46:45,703 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 21:46:45,704 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 21:46:45,705 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 21:46:45,706 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 21:46:45,706 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 21:46:45,707 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 21:46:45,708 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 21:46:45,709 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 21:46:45,710 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 21:46:45,710 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 21:46:45,710 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 21:46:45,711 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 21:46:45,712 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 21:46:45,713 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_709d40c5-1f68-4a8b-bef3-d11b27c5b91f/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 21:46:45,729 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 21:46:45,730 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 21:46:45,731 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 21:46:45,731 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 21:46:45,732 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 21:46:45,732 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 21:46:45,732 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 21:46:45,733 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 21:46:45,733 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 21:46:45,733 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 21:46:45,733 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 21:46:45,734 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 21:46:45,734 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 21:46:45,734 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 21:46:45,734 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 21:46:45,735 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 21:46:45,735 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 21:46:45,735 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 21:46:45,736 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 21:46:45,736 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 21:46:45,736 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 21:46:45,736 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 21:46:45,737 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 21:46:45,737 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 21:46:45,737 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 21:46:45,737 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 21:46:45,738 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 21:46:45,738 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 21:46:45,738 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_709d40c5-1f68-4a8b-bef3-d11b27c5b91f/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 31d6964eed2cb94ec120d453769c6230ed3a07c6 [2019-11-15 21:46:45,771 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 21:46:45,784 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 21:46:45,787 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 21:46:45,792 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 21:46:45,792 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 21:46:45,793 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_709d40c5-1f68-4a8b-bef3-d11b27c5b91f/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe010_power.opt.i [2019-11-15 21:46:45,870 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_709d40c5-1f68-4a8b-bef3-d11b27c5b91f/bin/uautomizer/data/d73549200/831ec36eb977423ba20be188e13a5c55/FLAG8a05edc06 [2019-11-15 21:46:46,517 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 21:46:46,519 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_709d40c5-1f68-4a8b-bef3-d11b27c5b91f/sv-benchmarks/c/pthread-wmm/safe010_power.opt.i [2019-11-15 21:46:46,536 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_709d40c5-1f68-4a8b-bef3-d11b27c5b91f/bin/uautomizer/data/d73549200/831ec36eb977423ba20be188e13a5c55/FLAG8a05edc06 [2019-11-15 21:46:46,815 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_709d40c5-1f68-4a8b-bef3-d11b27c5b91f/bin/uautomizer/data/d73549200/831ec36eb977423ba20be188e13a5c55 [2019-11-15 21:46:46,819 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 21:46:46,820 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 21:46:46,822 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 21:46:46,822 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 21:46:46,826 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 21:46:46,827 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 09:46:46" (1/1) ... [2019-11-15 21:46:46,830 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@77f3a41 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:46:46, skipping insertion in model container [2019-11-15 21:46:46,831 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 09:46:46" (1/1) ... [2019-11-15 21:46:46,839 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 21:46:46,920 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 21:46:47,455 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 21:46:47,468 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 21:46:47,544 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 21:46:47,621 INFO L192 MainTranslator]: Completed translation [2019-11-15 21:46:47,622 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:46:47 WrapperNode [2019-11-15 21:46:47,622 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 21:46:47,623 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 21:46:47,624 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 21:46:47,624 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 21:46:47,634 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:46:47" (1/1) ... [2019-11-15 21:46:47,655 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:46:47" (1/1) ... [2019-11-15 21:46:47,698 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 21:46:47,698 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 21:46:47,698 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 21:46:47,699 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 21:46:47,710 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:46:47" (1/1) ... [2019-11-15 21:46:47,710 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:46:47" (1/1) ... [2019-11-15 21:46:47,716 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:46:47" (1/1) ... [2019-11-15 21:46:47,716 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:46:47" (1/1) ... [2019-11-15 21:46:47,728 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:46:47" (1/1) ... [2019-11-15 21:46:47,732 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:46:47" (1/1) ... [2019-11-15 21:46:47,737 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:46:47" (1/1) ... [2019-11-15 21:46:47,745 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 21:46:47,746 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 21:46:47,761 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 21:46:47,761 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 21:46:47,763 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:46:47" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_709d40c5-1f68-4a8b-bef3-d11b27c5b91f/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 21:46:47,838 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 21:46:47,838 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 21:46:47,839 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 21:46:47,839 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 21:46:47,839 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 21:46:47,839 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 21:46:47,840 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 21:46:47,840 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 21:46:47,840 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 21:46:47,840 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 21:46:47,841 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 21:46:47,843 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 21:46:48,625 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 21:46:48,625 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 21:46:48,627 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:46:48 BoogieIcfgContainer [2019-11-15 21:46:48,627 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 21:46:48,628 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 21:46:48,628 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 21:46:48,631 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 21:46:48,632 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 09:46:46" (1/3) ... [2019-11-15 21:46:48,634 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70a85ba3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 09:46:48, skipping insertion in model container [2019-11-15 21:46:48,635 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 09:46:47" (2/3) ... [2019-11-15 21:46:48,635 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70a85ba3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 09:46:48, skipping insertion in model container [2019-11-15 21:46:48,635 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:46:48" (3/3) ... [2019-11-15 21:46:48,639 INFO L109 eAbstractionObserver]: Analyzing ICFG safe010_power.opt.i [2019-11-15 21:46:48,705 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,706 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,706 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,707 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,707 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,707 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,708 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,708 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,708 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,709 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,709 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,709 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,709 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,710 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,710 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,710 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,711 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,711 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,711 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,711 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,712 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,712 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,713 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,713 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,713 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,713 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,713 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,714 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,714 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,714 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,714 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,715 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,715 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,715 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,716 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,716 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,716 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,716 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,716 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,717 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,717 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,717 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,717 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,718 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,723 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,724 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,724 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,724 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,724 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,724 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,725 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,725 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,726 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,726 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,726 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,726 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,727 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,727 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,727 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,727 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,727 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,728 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,729 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,729 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 21:46:48,736 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 21:46:48,736 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 21:46:48,745 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 21:46:48,763 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 21:46:48,785 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 21:46:48,786 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 21:46:48,786 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 21:46:48,786 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 21:46:48,787 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 21:46:48,787 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 21:46:48,787 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 21:46:48,787 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 21:46:48,808 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 139 places, 177 transitions [2019-11-15 21:46:51,064 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22509 states. [2019-11-15 21:46:51,066 INFO L276 IsEmpty]: Start isEmpty. Operand 22509 states. [2019-11-15 21:46:51,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-11-15 21:46:51,078 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:46:51,080 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:46:51,085 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:46:51,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:46:51,092 INFO L82 PathProgramCache]: Analyzing trace with hash 733594359, now seen corresponding path program 1 times [2019-11-15 21:46:51,101 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:46:51,102 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1300669167] [2019-11-15 21:46:51,102 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:46:51,103 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:46:51,103 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:46:51,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:46:51,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:46:51,469 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1300669167] [2019-11-15 21:46:51,471 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:46:51,471 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:46:51,472 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1714296575] [2019-11-15 21:46:51,477 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:46:51,478 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:46:51,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:46:51,496 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:46:51,499 INFO L87 Difference]: Start difference. First operand 22509 states. Second operand 4 states. [2019-11-15 21:46:52,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:46:52,119 INFO L93 Difference]: Finished difference Result 23453 states and 91770 transitions. [2019-11-15 21:46:52,119 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:46:52,121 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2019-11-15 21:46:52,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:46:52,401 INFO L225 Difference]: With dead ends: 23453 [2019-11-15 21:46:52,402 INFO L226 Difference]: Without dead ends: 21277 [2019-11-15 21:46:52,404 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:46:52,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21277 states. [2019-11-15 21:46:53,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21277 to 21277. [2019-11-15 21:46:53,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21277 states. [2019-11-15 21:46:54,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21277 states to 21277 states and 83794 transitions. [2019-11-15 21:46:54,072 INFO L78 Accepts]: Start accepts. Automaton has 21277 states and 83794 transitions. Word has length 32 [2019-11-15 21:46:54,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:46:54,074 INFO L462 AbstractCegarLoop]: Abstraction has 21277 states and 83794 transitions. [2019-11-15 21:46:54,074 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:46:54,074 INFO L276 IsEmpty]: Start isEmpty. Operand 21277 states and 83794 transitions. [2019-11-15 21:46:54,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-11-15 21:46:54,089 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:46:54,089 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:46:54,089 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:46:54,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:46:54,090 INFO L82 PathProgramCache]: Analyzing trace with hash 1574494247, now seen corresponding path program 1 times [2019-11-15 21:46:54,090 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:46:54,091 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1063021038] [2019-11-15 21:46:54,091 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:46:54,091 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:46:54,091 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:46:54,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:46:54,270 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:46:54,270 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1063021038] [2019-11-15 21:46:54,271 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:46:54,271 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:46:54,271 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [180803942] [2019-11-15 21:46:54,273 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:46:54,273 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:46:54,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:46:54,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:46:54,274 INFO L87 Difference]: Start difference. First operand 21277 states and 83794 transitions. Second operand 5 states. [2019-11-15 21:46:55,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:46:55,605 INFO L93 Difference]: Finished difference Result 34711 states and 129090 transitions. [2019-11-15 21:46:55,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:46:55,606 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2019-11-15 21:46:55,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:46:55,812 INFO L225 Difference]: With dead ends: 34711 [2019-11-15 21:46:55,813 INFO L226 Difference]: Without dead ends: 34567 [2019-11-15 21:46:55,814 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:46:56,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34567 states. [2019-11-15 21:46:57,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34567 to 33067. [2019-11-15 21:46:57,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33067 states. [2019-11-15 21:46:57,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33067 states to 33067 states and 123978 transitions. [2019-11-15 21:46:57,452 INFO L78 Accepts]: Start accepts. Automaton has 33067 states and 123978 transitions. Word has length 43 [2019-11-15 21:46:57,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:46:57,454 INFO L462 AbstractCegarLoop]: Abstraction has 33067 states and 123978 transitions. [2019-11-15 21:46:57,454 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:46:57,454 INFO L276 IsEmpty]: Start isEmpty. Operand 33067 states and 123978 transitions. [2019-11-15 21:46:57,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-15 21:46:57,465 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:46:57,466 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:46:57,466 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:46:57,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:46:57,467 INFO L82 PathProgramCache]: Analyzing trace with hash -606075449, now seen corresponding path program 1 times [2019-11-15 21:46:57,467 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:46:57,468 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1620177929] [2019-11-15 21:46:57,468 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:46:57,468 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:46:57,469 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:46:57,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:46:57,604 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:46:57,605 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1620177929] [2019-11-15 21:46:57,605 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:46:57,605 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:46:57,606 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [400026537] [2019-11-15 21:46:57,606 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:46:57,606 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:46:57,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:46:57,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:46:57,607 INFO L87 Difference]: Start difference. First operand 33067 states and 123978 transitions. Second operand 5 states. [2019-11-15 21:46:58,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:46:58,841 INFO L93 Difference]: Finished difference Result 40219 states and 148647 transitions. [2019-11-15 21:46:58,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:46:58,842 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-11-15 21:46:58,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:46:59,004 INFO L225 Difference]: With dead ends: 40219 [2019-11-15 21:46:59,004 INFO L226 Difference]: Without dead ends: 40059 [2019-11-15 21:46:59,005 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:46:59,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40059 states. [2019-11-15 21:47:00,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40059 to 34640. [2019-11-15 21:47:00,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34640 states. [2019-11-15 21:47:00,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34640 states to 34640 states and 129274 transitions. [2019-11-15 21:47:00,176 INFO L78 Accepts]: Start accepts. Automaton has 34640 states and 129274 transitions. Word has length 44 [2019-11-15 21:47:00,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:00,176 INFO L462 AbstractCegarLoop]: Abstraction has 34640 states and 129274 transitions. [2019-11-15 21:47:00,176 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:47:00,177 INFO L276 IsEmpty]: Start isEmpty. Operand 34640 states and 129274 transitions. [2019-11-15 21:47:00,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-15 21:47:00,189 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:00,190 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:00,190 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:00,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:00,190 INFO L82 PathProgramCache]: Analyzing trace with hash 905685778, now seen corresponding path program 1 times [2019-11-15 21:47:00,191 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:00,191 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2014754918] [2019-11-15 21:47:00,191 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:00,191 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:00,192 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:00,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:00,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:00,284 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2014754918] [2019-11-15 21:47:00,284 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:00,284 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:47:00,285 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1183280478] [2019-11-15 21:47:00,285 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:47:00,286 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:00,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:47:00,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:47:00,286 INFO L87 Difference]: Start difference. First operand 34640 states and 129274 transitions. Second operand 6 states. [2019-11-15 21:47:02,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:02,300 INFO L93 Difference]: Finished difference Result 45668 states and 166168 transitions. [2019-11-15 21:47:02,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 21:47:02,301 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 51 [2019-11-15 21:47:02,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:02,435 INFO L225 Difference]: With dead ends: 45668 [2019-11-15 21:47:02,435 INFO L226 Difference]: Without dead ends: 45524 [2019-11-15 21:47:02,436 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 21:47:02,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45524 states. [2019-11-15 21:47:03,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45524 to 33603. [2019-11-15 21:47:03,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33603 states. [2019-11-15 21:47:03,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33603 states to 33603 states and 125429 transitions. [2019-11-15 21:47:03,435 INFO L78 Accepts]: Start accepts. Automaton has 33603 states and 125429 transitions. Word has length 51 [2019-11-15 21:47:03,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:03,435 INFO L462 AbstractCegarLoop]: Abstraction has 33603 states and 125429 transitions. [2019-11-15 21:47:03,435 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:47:03,435 INFO L276 IsEmpty]: Start isEmpty. Operand 33603 states and 125429 transitions. [2019-11-15 21:47:03,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-11-15 21:47:03,478 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:03,478 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:03,478 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:03,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:03,479 INFO L82 PathProgramCache]: Analyzing trace with hash -1972912513, now seen corresponding path program 1 times [2019-11-15 21:47:03,479 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:03,479 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [365889419] [2019-11-15 21:47:03,480 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:03,480 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:03,480 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:03,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:03,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:03,588 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [365889419] [2019-11-15 21:47:03,589 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:03,589 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:47:03,589 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [747978809] [2019-11-15 21:47:03,590 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:47:03,590 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:03,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:47:03,591 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:47:03,591 INFO L87 Difference]: Start difference. First operand 33603 states and 125429 transitions. Second operand 6 states. [2019-11-15 21:47:05,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:05,149 INFO L93 Difference]: Finished difference Result 46075 states and 167862 transitions. [2019-11-15 21:47:05,149 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 21:47:05,149 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-11-15 21:47:05,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:05,247 INFO L225 Difference]: With dead ends: 46075 [2019-11-15 21:47:05,247 INFO L226 Difference]: Without dead ends: 45835 [2019-11-15 21:47:05,248 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 21:47:05,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45835 states. [2019-11-15 21:47:05,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45835 to 39964. [2019-11-15 21:47:05,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39964 states. [2019-11-15 21:47:06,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39964 states to 39964 states and 147353 transitions. [2019-11-15 21:47:06,086 INFO L78 Accepts]: Start accepts. Automaton has 39964 states and 147353 transitions. Word has length 58 [2019-11-15 21:47:06,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:06,086 INFO L462 AbstractCegarLoop]: Abstraction has 39964 states and 147353 transitions. [2019-11-15 21:47:06,086 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:47:06,086 INFO L276 IsEmpty]: Start isEmpty. Operand 39964 states and 147353 transitions. [2019-11-15 21:47:06,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-15 21:47:06,123 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:06,124 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:06,124 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:06,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:06,125 INFO L82 PathProgramCache]: Analyzing trace with hash -207346572, now seen corresponding path program 1 times [2019-11-15 21:47:06,125 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:06,125 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1222050430] [2019-11-15 21:47:06,125 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:06,125 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:06,125 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:06,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:06,193 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:06,194 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1222050430] [2019-11-15 21:47:06,195 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:06,195 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:47:06,195 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [917249393] [2019-11-15 21:47:06,197 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:47:06,197 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:06,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:47:06,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:47:06,198 INFO L87 Difference]: Start difference. First operand 39964 states and 147353 transitions. Second operand 3 states. [2019-11-15 21:47:06,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:06,460 INFO L93 Difference]: Finished difference Result 50262 states and 182188 transitions. [2019-11-15 21:47:06,460 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:47:06,460 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 60 [2019-11-15 21:47:06,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:06,577 INFO L225 Difference]: With dead ends: 50262 [2019-11-15 21:47:06,578 INFO L226 Difference]: Without dead ends: 50262 [2019-11-15 21:47:06,578 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:47:06,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50262 states. [2019-11-15 21:47:07,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50262 to 43894. [2019-11-15 21:47:07,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43894 states. [2019-11-15 21:47:08,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43894 states to 43894 states and 160791 transitions. [2019-11-15 21:47:08,514 INFO L78 Accepts]: Start accepts. Automaton has 43894 states and 160791 transitions. Word has length 60 [2019-11-15 21:47:08,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:08,515 INFO L462 AbstractCegarLoop]: Abstraction has 43894 states and 160791 transitions. [2019-11-15 21:47:08,515 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:47:08,515 INFO L276 IsEmpty]: Start isEmpty. Operand 43894 states and 160791 transitions. [2019-11-15 21:47:08,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-11-15 21:47:08,554 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:08,554 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:08,555 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:08,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:08,555 INFO L82 PathProgramCache]: Analyzing trace with hash 280232242, now seen corresponding path program 1 times [2019-11-15 21:47:08,555 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:08,555 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1261682140] [2019-11-15 21:47:08,555 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:08,555 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:08,556 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:08,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:08,716 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:08,717 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1261682140] [2019-11-15 21:47:08,717 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:08,717 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:47:08,718 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1249258636] [2019-11-15 21:47:08,718 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:47:08,718 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:08,718 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:47:08,719 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:47:08,719 INFO L87 Difference]: Start difference. First operand 43894 states and 160791 transitions. Second operand 7 states. [2019-11-15 21:47:09,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:09,859 INFO L93 Difference]: Finished difference Result 55890 states and 200525 transitions. [2019-11-15 21:47:09,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 21:47:09,859 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-11-15 21:47:09,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:09,987 INFO L225 Difference]: With dead ends: 55890 [2019-11-15 21:47:09,987 INFO L226 Difference]: Without dead ends: 55650 [2019-11-15 21:47:09,987 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-15 21:47:10,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55650 states. [2019-11-15 21:47:10,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55650 to 45120. [2019-11-15 21:47:10,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45120 states. [2019-11-15 21:47:10,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45120 states to 45120 states and 164958 transitions. [2019-11-15 21:47:10,982 INFO L78 Accepts]: Start accepts. Automaton has 45120 states and 164958 transitions. Word has length 64 [2019-11-15 21:47:10,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:10,982 INFO L462 AbstractCegarLoop]: Abstraction has 45120 states and 164958 transitions. [2019-11-15 21:47:10,983 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:47:10,983 INFO L276 IsEmpty]: Start isEmpty. Operand 45120 states and 164958 transitions. [2019-11-15 21:47:11,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-15 21:47:11,024 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:11,024 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:11,024 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:11,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:11,024 INFO L82 PathProgramCache]: Analyzing trace with hash 1547139530, now seen corresponding path program 1 times [2019-11-15 21:47:11,025 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:11,025 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [827653019] [2019-11-15 21:47:11,025 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:11,025 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:11,026 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:11,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:11,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:11,107 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [827653019] [2019-11-15 21:47:11,107 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:11,107 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:47:11,107 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [272261117] [2019-11-15 21:47:11,108 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:47:11,108 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:11,108 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:47:11,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:47:11,109 INFO L87 Difference]: Start difference. First operand 45120 states and 164958 transitions. Second operand 5 states. [2019-11-15 21:47:13,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:13,058 INFO L93 Difference]: Finished difference Result 115002 states and 419394 transitions. [2019-11-15 21:47:13,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 21:47:13,058 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-11-15 21:47:13,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:13,336 INFO L225 Difference]: With dead ends: 115002 [2019-11-15 21:47:13,336 INFO L226 Difference]: Without dead ends: 114262 [2019-11-15 21:47:13,337 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:47:13,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114262 states. [2019-11-15 21:47:14,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114262 to 64599. [2019-11-15 21:47:14,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64599 states. [2019-11-15 21:47:15,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64599 states to 64599 states and 236588 transitions. [2019-11-15 21:47:15,022 INFO L78 Accepts]: Start accepts. Automaton has 64599 states and 236588 transitions. Word has length 65 [2019-11-15 21:47:15,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:15,022 INFO L462 AbstractCegarLoop]: Abstraction has 64599 states and 236588 transitions. [2019-11-15 21:47:15,022 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:47:15,022 INFO L276 IsEmpty]: Start isEmpty. Operand 64599 states and 236588 transitions. [2019-11-15 21:47:15,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-15 21:47:15,078 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:15,078 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:15,078 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:15,078 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:15,078 INFO L82 PathProgramCache]: Analyzing trace with hash 1184022475, now seen corresponding path program 1 times [2019-11-15 21:47:15,079 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:15,079 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [992236220] [2019-11-15 21:47:15,079 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:15,079 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:15,079 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:15,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:15,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:15,209 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [992236220] [2019-11-15 21:47:15,209 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:15,209 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:47:15,209 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1489437109] [2019-11-15 21:47:15,210 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:47:15,210 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:15,210 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:47:15,211 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:47:15,211 INFO L87 Difference]: Start difference. First operand 64599 states and 236588 transitions. Second operand 6 states. [2019-11-15 21:47:15,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:15,960 INFO L93 Difference]: Finished difference Result 71048 states and 257943 transitions. [2019-11-15 21:47:15,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:47:15,960 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-11-15 21:47:15,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:16,125 INFO L225 Difference]: With dead ends: 71048 [2019-11-15 21:47:16,125 INFO L226 Difference]: Without dead ends: 71048 [2019-11-15 21:47:16,126 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:47:16,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71048 states. [2019-11-15 21:47:17,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71048 to 65451. [2019-11-15 21:47:17,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65451 states. [2019-11-15 21:47:18,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65451 states to 65451 states and 239375 transitions. [2019-11-15 21:47:18,029 INFO L78 Accepts]: Start accepts. Automaton has 65451 states and 239375 transitions. Word has length 65 [2019-11-15 21:47:18,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:18,029 INFO L462 AbstractCegarLoop]: Abstraction has 65451 states and 239375 transitions. [2019-11-15 21:47:18,029 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:47:18,029 INFO L276 IsEmpty]: Start isEmpty. Operand 65451 states and 239375 transitions. [2019-11-15 21:47:18,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-15 21:47:18,104 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:18,105 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:18,105 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:18,105 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:18,106 INFO L82 PathProgramCache]: Analyzing trace with hash -1183167156, now seen corresponding path program 1 times [2019-11-15 21:47:18,106 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:18,106 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [624908914] [2019-11-15 21:47:18,106 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:18,107 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:18,107 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:18,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:18,214 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:18,215 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [624908914] [2019-11-15 21:47:18,215 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:18,215 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:47:18,215 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [104080928] [2019-11-15 21:47:18,216 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:47:18,216 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:18,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:47:18,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:47:18,217 INFO L87 Difference]: Start difference. First operand 65451 states and 239375 transitions. Second operand 7 states. [2019-11-15 21:47:19,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:19,730 INFO L93 Difference]: Finished difference Result 75675 states and 272886 transitions. [2019-11-15 21:47:19,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 21:47:19,730 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-11-15 21:47:19,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:19,901 INFO L225 Difference]: With dead ends: 75675 [2019-11-15 21:47:19,901 INFO L226 Difference]: Without dead ends: 75475 [2019-11-15 21:47:19,902 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-15 21:47:20,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75475 states. [2019-11-15 21:47:21,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75475 to 66329. [2019-11-15 21:47:21,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66329 states. [2019-11-15 21:47:21,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66329 states to 66329 states and 242246 transitions. [2019-11-15 21:47:21,271 INFO L78 Accepts]: Start accepts. Automaton has 66329 states and 242246 transitions. Word has length 65 [2019-11-15 21:47:21,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:21,271 INFO L462 AbstractCegarLoop]: Abstraction has 66329 states and 242246 transitions. [2019-11-15 21:47:21,271 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:47:21,272 INFO L276 IsEmpty]: Start isEmpty. Operand 66329 states and 242246 transitions. [2019-11-15 21:47:21,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-11-15 21:47:21,334 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:21,334 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:21,334 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:21,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:21,334 INFO L82 PathProgramCache]: Analyzing trace with hash 575104520, now seen corresponding path program 1 times [2019-11-15 21:47:21,334 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:21,335 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [257944751] [2019-11-15 21:47:21,335 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:21,335 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:21,335 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:21,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:21,437 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:21,438 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [257944751] [2019-11-15 21:47:21,438 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:21,438 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:47:21,439 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1429060008] [2019-11-15 21:47:21,439 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:47:21,439 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:21,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:47:21,440 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:47:21,440 INFO L87 Difference]: Start difference. First operand 66329 states and 242246 transitions. Second operand 4 states. [2019-11-15 21:47:21,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:21,959 INFO L93 Difference]: Finished difference Result 21286 states and 67194 transitions. [2019-11-15 21:47:21,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:47:21,960 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-11-15 21:47:21,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:21,992 INFO L225 Difference]: With dead ends: 21286 [2019-11-15 21:47:21,992 INFO L226 Difference]: Without dead ends: 20583 [2019-11-15 21:47:21,992 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:47:22,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20583 states. [2019-11-15 21:47:22,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20583 to 20447. [2019-11-15 21:47:22,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20447 states. [2019-11-15 21:47:22,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20447 states to 20447 states and 64612 transitions. [2019-11-15 21:47:22,288 INFO L78 Accepts]: Start accepts. Automaton has 20447 states and 64612 transitions. Word has length 67 [2019-11-15 21:47:22,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:22,288 INFO L462 AbstractCegarLoop]: Abstraction has 20447 states and 64612 transitions. [2019-11-15 21:47:22,288 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:47:22,288 INFO L276 IsEmpty]: Start isEmpty. Operand 20447 states and 64612 transitions. [2019-11-15 21:47:22,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-11-15 21:47:22,308 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:22,309 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:22,309 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:22,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:22,309 INFO L82 PathProgramCache]: Analyzing trace with hash 1982614502, now seen corresponding path program 1 times [2019-11-15 21:47:22,309 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:22,309 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [727481165] [2019-11-15 21:47:22,310 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:22,310 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:22,310 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:22,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:22,445 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:22,445 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [727481165] [2019-11-15 21:47:22,446 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:22,446 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:47:22,446 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [342068126] [2019-11-15 21:47:22,446 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 21:47:22,447 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:22,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 21:47:22,447 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:47:22,447 INFO L87 Difference]: Start difference. First operand 20447 states and 64612 transitions. Second operand 8 states. [2019-11-15 21:47:23,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:23,666 INFO L93 Difference]: Finished difference Result 22589 states and 70813 transitions. [2019-11-15 21:47:23,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-11-15 21:47:23,667 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 77 [2019-11-15 21:47:23,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:23,700 INFO L225 Difference]: With dead ends: 22589 [2019-11-15 21:47:23,700 INFO L226 Difference]: Without dead ends: 22541 [2019-11-15 21:47:23,700 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=165, Invalid=591, Unknown=0, NotChecked=0, Total=756 [2019-11-15 21:47:23,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22541 states. [2019-11-15 21:47:23,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22541 to 17918. [2019-11-15 21:47:23,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17918 states. [2019-11-15 21:47:23,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17918 states to 17918 states and 56980 transitions. [2019-11-15 21:47:23,991 INFO L78 Accepts]: Start accepts. Automaton has 17918 states and 56980 transitions. Word has length 77 [2019-11-15 21:47:23,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:23,991 INFO L462 AbstractCegarLoop]: Abstraction has 17918 states and 56980 transitions. [2019-11-15 21:47:23,991 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 21:47:23,992 INFO L276 IsEmpty]: Start isEmpty. Operand 17918 states and 56980 transitions. [2019-11-15 21:47:24,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-15 21:47:24,008 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:24,009 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:24,009 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:24,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:24,009 INFO L82 PathProgramCache]: Analyzing trace with hash 198286228, now seen corresponding path program 1 times [2019-11-15 21:47:24,009 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:24,009 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2143748987] [2019-11-15 21:47:24,010 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:24,010 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:24,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:24,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:24,066 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:24,066 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2143748987] [2019-11-15 21:47:24,067 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:24,067 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:47:24,067 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1650892645] [2019-11-15 21:47:24,068 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:47:24,068 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:24,068 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:47:24,069 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:47:24,069 INFO L87 Difference]: Start difference. First operand 17918 states and 56980 transitions. Second operand 3 states. [2019-11-15 21:47:24,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:24,325 INFO L93 Difference]: Finished difference Result 19351 states and 61203 transitions. [2019-11-15 21:47:24,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:47:24,325 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 78 [2019-11-15 21:47:24,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:24,356 INFO L225 Difference]: With dead ends: 19351 [2019-11-15 21:47:24,356 INFO L226 Difference]: Without dead ends: 19351 [2019-11-15 21:47:24,357 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:47:24,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19351 states. [2019-11-15 21:47:24,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19351 to 18612. [2019-11-15 21:47:24,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18612 states. [2019-11-15 21:47:24,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18612 states to 18612 states and 59028 transitions. [2019-11-15 21:47:24,642 INFO L78 Accepts]: Start accepts. Automaton has 18612 states and 59028 transitions. Word has length 78 [2019-11-15 21:47:24,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:24,642 INFO L462 AbstractCegarLoop]: Abstraction has 18612 states and 59028 transitions. [2019-11-15 21:47:24,642 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:47:24,643 INFO L276 IsEmpty]: Start isEmpty. Operand 18612 states and 59028 transitions. [2019-11-15 21:47:24,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 21:47:24,661 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:24,661 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:24,661 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:24,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:24,662 INFO L82 PathProgramCache]: Analyzing trace with hash -19237352, now seen corresponding path program 1 times [2019-11-15 21:47:24,662 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:24,662 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1417073344] [2019-11-15 21:47:24,663 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:24,663 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:24,663 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:24,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:24,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:24,743 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1417073344] [2019-11-15 21:47:24,744 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:24,744 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:47:24,744 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1996265114] [2019-11-15 21:47:24,744 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:47:24,745 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:24,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:47:24,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:47:24,745 INFO L87 Difference]: Start difference. First operand 18612 states and 59028 transitions. Second operand 4 states. [2019-11-15 21:47:25,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:25,174 INFO L93 Difference]: Finished difference Result 22488 states and 70179 transitions. [2019-11-15 21:47:25,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 21:47:25,175 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-11-15 21:47:25,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:25,221 INFO L225 Difference]: With dead ends: 22488 [2019-11-15 21:47:25,222 INFO L226 Difference]: Without dead ends: 22380 [2019-11-15 21:47:25,223 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:47:25,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22380 states. [2019-11-15 21:47:25,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22380 to 21273. [2019-11-15 21:47:25,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21273 states. [2019-11-15 21:47:25,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21273 states to 21273 states and 66762 transitions. [2019-11-15 21:47:25,559 INFO L78 Accepts]: Start accepts. Automaton has 21273 states and 66762 transitions. Word has length 79 [2019-11-15 21:47:25,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:25,560 INFO L462 AbstractCegarLoop]: Abstraction has 21273 states and 66762 transitions. [2019-11-15 21:47:25,560 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:47:25,560 INFO L276 IsEmpty]: Start isEmpty. Operand 21273 states and 66762 transitions. [2019-11-15 21:47:25,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-11-15 21:47:25,582 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:25,582 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:25,582 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:25,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:25,583 INFO L82 PathProgramCache]: Analyzing trace with hash -1954897639, now seen corresponding path program 1 times [2019-11-15 21:47:25,583 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:25,583 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1830157914] [2019-11-15 21:47:25,583 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:25,583 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:25,583 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:25,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:25,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:25,644 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1830157914] [2019-11-15 21:47:25,644 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:25,644 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:47:25,645 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [198039460] [2019-11-15 21:47:25,645 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:47:25,645 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:25,646 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:47:25,646 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:47:25,646 INFO L87 Difference]: Start difference. First operand 21273 states and 66762 transitions. Second operand 3 states. [2019-11-15 21:47:26,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:26,032 INFO L93 Difference]: Finished difference Result 22756 states and 71108 transitions. [2019-11-15 21:47:26,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:47:26,033 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-11-15 21:47:26,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:26,070 INFO L225 Difference]: With dead ends: 22756 [2019-11-15 21:47:26,070 INFO L226 Difference]: Without dead ends: 22756 [2019-11-15 21:47:26,071 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:47:26,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22756 states. [2019-11-15 21:47:26,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22756 to 22009. [2019-11-15 21:47:26,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22009 states. [2019-11-15 21:47:26,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22009 states to 22009 states and 68914 transitions. [2019-11-15 21:47:26,416 INFO L78 Accepts]: Start accepts. Automaton has 22009 states and 68914 transitions. Word has length 79 [2019-11-15 21:47:26,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:26,416 INFO L462 AbstractCegarLoop]: Abstraction has 22009 states and 68914 transitions. [2019-11-15 21:47:26,417 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:47:26,417 INFO L276 IsEmpty]: Start isEmpty. Operand 22009 states and 68914 transitions. [2019-11-15 21:47:26,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 21:47:26,438 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:26,438 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:26,438 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:26,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:26,438 INFO L82 PathProgramCache]: Analyzing trace with hash -1019434405, now seen corresponding path program 1 times [2019-11-15 21:47:26,438 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:26,439 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [447013525] [2019-11-15 21:47:26,439 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:26,439 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:26,439 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:26,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:26,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:26,582 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [447013525] [2019-11-15 21:47:26,582 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:26,582 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:47:26,583 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1076722783] [2019-11-15 21:47:26,583 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:47:26,583 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:26,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:47:26,584 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:47:26,584 INFO L87 Difference]: Start difference. First operand 22009 states and 68914 transitions. Second operand 6 states. [2019-11-15 21:47:27,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:27,276 INFO L93 Difference]: Finished difference Result 23615 states and 73269 transitions. [2019-11-15 21:47:27,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:47:27,276 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-11-15 21:47:27,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:27,325 INFO L225 Difference]: With dead ends: 23615 [2019-11-15 21:47:27,326 INFO L226 Difference]: Without dead ends: 23615 [2019-11-15 21:47:27,326 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:47:27,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23615 states. [2019-11-15 21:47:27,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23615 to 22626. [2019-11-15 21:47:27,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22626 states. [2019-11-15 21:47:27,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22626 states to 22626 states and 70404 transitions. [2019-11-15 21:47:27,787 INFO L78 Accepts]: Start accepts. Automaton has 22626 states and 70404 transitions. Word has length 80 [2019-11-15 21:47:27,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:27,788 INFO L462 AbstractCegarLoop]: Abstraction has 22626 states and 70404 transitions. [2019-11-15 21:47:27,788 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:47:27,788 INFO L276 IsEmpty]: Start isEmpty. Operand 22626 states and 70404 transitions. [2019-11-15 21:47:27,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 21:47:27,819 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:27,819 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:27,819 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:27,820 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:27,820 INFO L82 PathProgramCache]: Analyzing trace with hash 1339872604, now seen corresponding path program 1 times [2019-11-15 21:47:27,820 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:27,820 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1488665969] [2019-11-15 21:47:27,820 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:27,821 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:27,821 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:27,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:28,000 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:28,001 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1488665969] [2019-11-15 21:47:28,002 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:28,002 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:47:28,002 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [662449758] [2019-11-15 21:47:28,003 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:47:28,003 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:28,003 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:47:28,003 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:47:28,003 INFO L87 Difference]: Start difference. First operand 22626 states and 70404 transitions. Second operand 7 states. [2019-11-15 21:47:28,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:28,702 INFO L93 Difference]: Finished difference Result 24586 states and 75814 transitions. [2019-11-15 21:47:28,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 21:47:28,703 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-11-15 21:47:28,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:28,743 INFO L225 Difference]: With dead ends: 24586 [2019-11-15 21:47:28,743 INFO L226 Difference]: Without dead ends: 24586 [2019-11-15 21:47:28,743 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:47:28,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24586 states. [2019-11-15 21:47:29,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24586 to 23581. [2019-11-15 21:47:29,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23581 states. [2019-11-15 21:47:29,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23581 states to 23581 states and 72905 transitions. [2019-11-15 21:47:29,187 INFO L78 Accepts]: Start accepts. Automaton has 23581 states and 72905 transitions. Word has length 80 [2019-11-15 21:47:29,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:29,187 INFO L462 AbstractCegarLoop]: Abstraction has 23581 states and 72905 transitions. [2019-11-15 21:47:29,187 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:47:29,187 INFO L276 IsEmpty]: Start isEmpty. Operand 23581 states and 72905 transitions. [2019-11-15 21:47:29,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 21:47:29,211 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:29,211 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:29,211 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:29,212 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:29,212 INFO L82 PathProgramCache]: Analyzing trace with hash 1669638365, now seen corresponding path program 1 times [2019-11-15 21:47:29,212 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:29,212 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1097416827] [2019-11-15 21:47:29,212 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:29,212 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:29,212 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:29,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:29,272 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:29,272 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1097416827] [2019-11-15 21:47:29,272 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:29,273 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:47:29,273 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [227894846] [2019-11-15 21:47:29,273 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:47:29,274 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:29,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:47:29,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:47:29,274 INFO L87 Difference]: Start difference. First operand 23581 states and 72905 transitions. Second operand 3 states. [2019-11-15 21:47:29,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:29,391 INFO L93 Difference]: Finished difference Result 21491 states and 65963 transitions. [2019-11-15 21:47:29,391 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:47:29,392 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2019-11-15 21:47:29,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:29,430 INFO L225 Difference]: With dead ends: 21491 [2019-11-15 21:47:29,430 INFO L226 Difference]: Without dead ends: 21491 [2019-11-15 21:47:29,430 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:47:29,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21491 states. [2019-11-15 21:47:29,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21491 to 20676. [2019-11-15 21:47:29,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20676 states. [2019-11-15 21:47:29,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20676 states to 20676 states and 63646 transitions. [2019-11-15 21:47:29,782 INFO L78 Accepts]: Start accepts. Automaton has 20676 states and 63646 transitions. Word has length 80 [2019-11-15 21:47:29,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:29,782 INFO L462 AbstractCegarLoop]: Abstraction has 20676 states and 63646 transitions. [2019-11-15 21:47:29,782 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:47:29,782 INFO L276 IsEmpty]: Start isEmpty. Operand 20676 states and 63646 transitions. [2019-11-15 21:47:29,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 21:47:29,809 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:29,809 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:29,809 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:29,810 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:29,810 INFO L82 PathProgramCache]: Analyzing trace with hash 1948969658, now seen corresponding path program 1 times [2019-11-15 21:47:29,810 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:29,810 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1999809126] [2019-11-15 21:47:29,810 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:29,810 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:29,811 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:29,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:29,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:29,958 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1999809126] [2019-11-15 21:47:29,958 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:29,959 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:47:29,959 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [603700406] [2019-11-15 21:47:29,960 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:47:29,961 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:29,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:47:29,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:47:29,962 INFO L87 Difference]: Start difference. First operand 20676 states and 63646 transitions. Second operand 7 states. [2019-11-15 21:47:30,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:30,790 INFO L93 Difference]: Finished difference Result 38157 states and 117142 transitions. [2019-11-15 21:47:30,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 21:47:30,791 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-11-15 21:47:30,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:30,852 INFO L225 Difference]: With dead ends: 38157 [2019-11-15 21:47:30,852 INFO L226 Difference]: Without dead ends: 38157 [2019-11-15 21:47:30,852 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:47:30,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38157 states. [2019-11-15 21:47:31,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38157 to 23068. [2019-11-15 21:47:31,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23068 states. [2019-11-15 21:47:31,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23068 states to 23068 states and 70714 transitions. [2019-11-15 21:47:31,289 INFO L78 Accepts]: Start accepts. Automaton has 23068 states and 70714 transitions. Word has length 80 [2019-11-15 21:47:31,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:31,289 INFO L462 AbstractCegarLoop]: Abstraction has 23068 states and 70714 transitions. [2019-11-15 21:47:31,290 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:47:31,290 INFO L276 IsEmpty]: Start isEmpty. Operand 23068 states and 70714 transitions. [2019-11-15 21:47:31,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 21:47:31,312 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:31,312 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:31,312 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:31,312 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:31,313 INFO L82 PathProgramCache]: Analyzing trace with hash -620516741, now seen corresponding path program 1 times [2019-11-15 21:47:31,313 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:31,313 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [232630132] [2019-11-15 21:47:31,313 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:31,313 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:31,313 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:31,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:31,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:31,368 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [232630132] [2019-11-15 21:47:31,369 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:31,369 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 21:47:31,369 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [739737477] [2019-11-15 21:47:31,369 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 21:47:31,370 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:31,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 21:47:31,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:47:31,370 INFO L87 Difference]: Start difference. First operand 23068 states and 70714 transitions. Second operand 3 states. [2019-11-15 21:47:31,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:31,519 INFO L93 Difference]: Finished difference Result 21499 states and 65192 transitions. [2019-11-15 21:47:31,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 21:47:31,519 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2019-11-15 21:47:31,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:31,553 INFO L225 Difference]: With dead ends: 21499 [2019-11-15 21:47:31,553 INFO L226 Difference]: Without dead ends: 21385 [2019-11-15 21:47:31,553 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 21:47:31,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21385 states. [2019-11-15 21:47:31,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21385 to 20371. [2019-11-15 21:47:31,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20371 states. [2019-11-15 21:47:31,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20371 states to 20371 states and 62028 transitions. [2019-11-15 21:47:31,846 INFO L78 Accepts]: Start accepts. Automaton has 20371 states and 62028 transitions. Word has length 80 [2019-11-15 21:47:31,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:31,847 INFO L462 AbstractCegarLoop]: Abstraction has 20371 states and 62028 transitions. [2019-11-15 21:47:31,847 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 21:47:31,847 INFO L276 IsEmpty]: Start isEmpty. Operand 20371 states and 62028 transitions. [2019-11-15 21:47:31,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:47:31,865 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:31,869 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:31,870 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:31,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:31,870 INFO L82 PathProgramCache]: Analyzing trace with hash 649587232, now seen corresponding path program 1 times [2019-11-15 21:47:31,870 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:31,870 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [518074326] [2019-11-15 21:47:31,870 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:31,870 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:31,870 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:31,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:31,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:31,991 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [518074326] [2019-11-15 21:47:31,991 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:31,991 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:47:31,991 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [435074188] [2019-11-15 21:47:31,992 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 21:47:31,992 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:31,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 21:47:31,993 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:47:31,993 INFO L87 Difference]: Start difference. First operand 20371 states and 62028 transitions. Second operand 8 states. [2019-11-15 21:47:34,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:34,117 INFO L93 Difference]: Finished difference Result 46644 states and 136928 transitions. [2019-11-15 21:47:34,117 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-11-15 21:47:34,117 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 81 [2019-11-15 21:47:34,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:34,188 INFO L225 Difference]: With dead ends: 46644 [2019-11-15 21:47:34,189 INFO L226 Difference]: Without dead ends: 46143 [2019-11-15 21:47:34,189 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 137 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=153, Invalid=497, Unknown=0, NotChecked=0, Total=650 [2019-11-15 21:47:34,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46143 states. [2019-11-15 21:47:34,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46143 to 22917. [2019-11-15 21:47:34,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22917 states. [2019-11-15 21:47:34,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22917 states to 22917 states and 69080 transitions. [2019-11-15 21:47:34,673 INFO L78 Accepts]: Start accepts. Automaton has 22917 states and 69080 transitions. Word has length 81 [2019-11-15 21:47:34,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:34,673 INFO L462 AbstractCegarLoop]: Abstraction has 22917 states and 69080 transitions. [2019-11-15 21:47:34,673 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 21:47:34,673 INFO L276 IsEmpty]: Start isEmpty. Operand 22917 states and 69080 transitions. [2019-11-15 21:47:34,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:47:34,693 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:34,693 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:34,693 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:34,694 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:34,694 INFO L82 PathProgramCache]: Analyzing trace with hash -1439001566, now seen corresponding path program 1 times [2019-11-15 21:47:34,694 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:34,694 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1055891727] [2019-11-15 21:47:34,695 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:34,695 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:34,695 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:34,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:34,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:34,819 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1055891727] [2019-11-15 21:47:34,820 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:34,820 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:47:34,820 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1743364070] [2019-11-15 21:47:34,820 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:47:34,821 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:34,821 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:47:34,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:47:34,821 INFO L87 Difference]: Start difference. First operand 22917 states and 69080 transitions. Second operand 6 states. [2019-11-15 21:47:35,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:35,439 INFO L93 Difference]: Finished difference Result 24158 states and 72374 transitions. [2019-11-15 21:47:35,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:47:35,440 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 81 [2019-11-15 21:47:35,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:35,487 INFO L225 Difference]: With dead ends: 24158 [2019-11-15 21:47:35,487 INFO L226 Difference]: Without dead ends: 24158 [2019-11-15 21:47:35,487 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:47:35,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24158 states. [2019-11-15 21:47:35,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24158 to 23220. [2019-11-15 21:47:35,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23220 states. [2019-11-15 21:47:35,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23220 states to 23220 states and 69698 transitions. [2019-11-15 21:47:35,955 INFO L78 Accepts]: Start accepts. Automaton has 23220 states and 69698 transitions. Word has length 81 [2019-11-15 21:47:35,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:35,955 INFO L462 AbstractCegarLoop]: Abstraction has 23220 states and 69698 transitions. [2019-11-15 21:47:35,956 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:47:35,956 INFO L276 IsEmpty]: Start isEmpty. Operand 23220 states and 69698 transitions. [2019-11-15 21:47:35,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:47:35,984 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:35,984 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:35,984 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:35,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:35,985 INFO L82 PathProgramCache]: Analyzing trace with hash 920305443, now seen corresponding path program 1 times [2019-11-15 21:47:35,985 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:35,985 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1459975667] [2019-11-15 21:47:35,985 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:35,986 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:35,986 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:36,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:36,147 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:36,147 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1459975667] [2019-11-15 21:47:36,147 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:36,148 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:47:36,148 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2128958015] [2019-11-15 21:47:36,150 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:47:36,151 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:36,151 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:47:36,151 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:47:36,151 INFO L87 Difference]: Start difference. First operand 23220 states and 69698 transitions. Second operand 6 states. [2019-11-15 21:47:36,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:36,623 INFO L93 Difference]: Finished difference Result 25519 states and 75046 transitions. [2019-11-15 21:47:36,623 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 21:47:36,623 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 81 [2019-11-15 21:47:36,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:36,663 INFO L225 Difference]: With dead ends: 25519 [2019-11-15 21:47:36,663 INFO L226 Difference]: Without dead ends: 25519 [2019-11-15 21:47:36,663 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:47:36,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25519 states. [2019-11-15 21:47:36,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25519 to 22839. [2019-11-15 21:47:36,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22839 states. [2019-11-15 21:47:36,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22839 states to 22839 states and 67571 transitions. [2019-11-15 21:47:36,999 INFO L78 Accepts]: Start accepts. Automaton has 22839 states and 67571 transitions. Word has length 81 [2019-11-15 21:47:37,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:37,000 INFO L462 AbstractCegarLoop]: Abstraction has 22839 states and 67571 transitions. [2019-11-15 21:47:37,000 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:47:37,000 INFO L276 IsEmpty]: Start isEmpty. Operand 22839 states and 67571 transitions. [2019-11-15 21:47:37,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:47:37,018 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:37,018 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:37,019 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:37,019 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:37,019 INFO L82 PathProgramCache]: Analyzing trace with hash -956307294, now seen corresponding path program 1 times [2019-11-15 21:47:37,019 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:37,019 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [614450889] [2019-11-15 21:47:37,020 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:37,020 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:37,020 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:37,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:37,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:37,095 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [614450889] [2019-11-15 21:47:37,095 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:37,095 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 21:47:37,096 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1245034640] [2019-11-15 21:47:37,096 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 21:47:37,096 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:37,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 21:47:37,097 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 21:47:37,097 INFO L87 Difference]: Start difference. First operand 22839 states and 67571 transitions. Second operand 4 states. [2019-11-15 21:47:37,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:37,495 INFO L93 Difference]: Finished difference Result 27297 states and 79831 transitions. [2019-11-15 21:47:37,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 21:47:37,496 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 81 [2019-11-15 21:47:37,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:37,536 INFO L225 Difference]: With dead ends: 27297 [2019-11-15 21:47:37,536 INFO L226 Difference]: Without dead ends: 26901 [2019-11-15 21:47:37,538 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:47:37,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26901 states. [2019-11-15 21:47:37,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26901 to 23991. [2019-11-15 21:47:37,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23991 states. [2019-11-15 21:47:37,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23991 states to 23991 states and 70766 transitions. [2019-11-15 21:47:37,908 INFO L78 Accepts]: Start accepts. Automaton has 23991 states and 70766 transitions. Word has length 81 [2019-11-15 21:47:37,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:37,909 INFO L462 AbstractCegarLoop]: Abstraction has 23991 states and 70766 transitions. [2019-11-15 21:47:37,909 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 21:47:37,909 INFO L276 IsEmpty]: Start isEmpty. Operand 23991 states and 70766 transitions. [2019-11-15 21:47:37,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:47:37,929 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:37,929 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:37,929 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:37,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:37,930 INFO L82 PathProgramCache]: Analyzing trace with hash 5306723, now seen corresponding path program 1 times [2019-11-15 21:47:37,930 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:37,930 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1481434142] [2019-11-15 21:47:37,930 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:37,930 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:37,930 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:37,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:38,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:38,014 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1481434142] [2019-11-15 21:47:38,014 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:38,014 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:47:38,015 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1148636099] [2019-11-15 21:47:38,015 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:47:38,015 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:38,016 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:47:38,016 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:47:38,016 INFO L87 Difference]: Start difference. First operand 23991 states and 70766 transitions. Second operand 5 states. [2019-11-15 21:47:38,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:38,495 INFO L93 Difference]: Finished difference Result 25479 states and 74008 transitions. [2019-11-15 21:47:38,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 21:47:38,496 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 81 [2019-11-15 21:47:38,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:38,546 INFO L225 Difference]: With dead ends: 25479 [2019-11-15 21:47:38,546 INFO L226 Difference]: Without dead ends: 25275 [2019-11-15 21:47:38,547 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:47:38,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25275 states. [2019-11-15 21:47:38,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25275 to 19426. [2019-11-15 21:47:38,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19426 states. [2019-11-15 21:47:38,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19426 states to 19426 states and 57313 transitions. [2019-11-15 21:47:38,961 INFO L78 Accepts]: Start accepts. Automaton has 19426 states and 57313 transitions. Word has length 81 [2019-11-15 21:47:38,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:38,961 INFO L462 AbstractCegarLoop]: Abstraction has 19426 states and 57313 transitions. [2019-11-15 21:47:38,961 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:47:38,961 INFO L276 IsEmpty]: Start isEmpty. Operand 19426 states and 57313 transitions. [2019-11-15 21:47:38,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 21:47:38,978 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:38,978 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:38,979 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:38,979 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:38,979 INFO L82 PathProgramCache]: Analyzing trace with hash 1250071204, now seen corresponding path program 1 times [2019-11-15 21:47:38,979 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:38,979 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1083180211] [2019-11-15 21:47:38,979 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:38,979 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:38,980 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:39,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:39,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:39,291 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1083180211] [2019-11-15 21:47:39,291 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:39,291 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:47:39,291 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [209540705] [2019-11-15 21:47:39,292 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:47:39,292 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:39,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:47:39,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:47:39,292 INFO L87 Difference]: Start difference. First operand 19426 states and 57313 transitions. Second operand 5 states. [2019-11-15 21:47:39,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:39,379 INFO L93 Difference]: Finished difference Result 2530 states and 6014 transitions. [2019-11-15 21:47:39,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:47:39,380 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 81 [2019-11-15 21:47:39,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:39,383 INFO L225 Difference]: With dead ends: 2530 [2019-11-15 21:47:39,383 INFO L226 Difference]: Without dead ends: 2222 [2019-11-15 21:47:39,384 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:47:39,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2222 states. [2019-11-15 21:47:39,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2222 to 2152. [2019-11-15 21:47:39,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2152 states. [2019-11-15 21:47:39,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2152 states to 2152 states and 5105 transitions. [2019-11-15 21:47:39,412 INFO L78 Accepts]: Start accepts. Automaton has 2152 states and 5105 transitions. Word has length 81 [2019-11-15 21:47:39,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:39,412 INFO L462 AbstractCegarLoop]: Abstraction has 2152 states and 5105 transitions. [2019-11-15 21:47:39,412 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:47:39,412 INFO L276 IsEmpty]: Start isEmpty. Operand 2152 states and 5105 transitions. [2019-11-15 21:47:39,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 21:47:39,414 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:39,414 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:39,414 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:39,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:39,415 INFO L82 PathProgramCache]: Analyzing trace with hash 1426005523, now seen corresponding path program 1 times [2019-11-15 21:47:39,415 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:39,415 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [75627384] [2019-11-15 21:47:39,415 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:39,415 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:39,415 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:39,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:39,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:39,495 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [75627384] [2019-11-15 21:47:39,495 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:39,495 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 21:47:39,495 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [726876113] [2019-11-15 21:47:39,496 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 21:47:39,496 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:39,496 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 21:47:39,496 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 21:47:39,497 INFO L87 Difference]: Start difference. First operand 2152 states and 5105 transitions. Second operand 5 states. [2019-11-15 21:47:39,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:39,743 INFO L93 Difference]: Finished difference Result 2569 states and 5961 transitions. [2019-11-15 21:47:39,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:47:39,744 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-11-15 21:47:39,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:39,747 INFO L225 Difference]: With dead ends: 2569 [2019-11-15 21:47:39,747 INFO L226 Difference]: Without dead ends: 2547 [2019-11-15 21:47:39,748 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:47:39,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2547 states. [2019-11-15 21:47:39,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2547 to 2213. [2019-11-15 21:47:39,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2213 states. [2019-11-15 21:47:39,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2213 states to 2213 states and 5224 transitions. [2019-11-15 21:47:39,774 INFO L78 Accepts]: Start accepts. Automaton has 2213 states and 5224 transitions. Word has length 94 [2019-11-15 21:47:39,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:39,774 INFO L462 AbstractCegarLoop]: Abstraction has 2213 states and 5224 transitions. [2019-11-15 21:47:39,774 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 21:47:39,774 INFO L276 IsEmpty]: Start isEmpty. Operand 2213 states and 5224 transitions. [2019-11-15 21:47:39,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 21:47:39,776 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:39,776 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:39,777 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:39,777 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:39,777 INFO L82 PathProgramCache]: Analyzing trace with hash 833087701, now seen corresponding path program 1 times [2019-11-15 21:47:39,778 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:39,778 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [763785312] [2019-11-15 21:47:39,778 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:39,778 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:39,779 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:39,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:39,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:39,874 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [763785312] [2019-11-15 21:47:39,874 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:39,874 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:47:39,875 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [439994025] [2019-11-15 21:47:39,875 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:47:39,875 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:39,876 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:47:39,876 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:47:39,876 INFO L87 Difference]: Start difference. First operand 2213 states and 5224 transitions. Second operand 6 states. [2019-11-15 21:47:40,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:40,170 INFO L93 Difference]: Finished difference Result 3676 states and 8716 transitions. [2019-11-15 21:47:40,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:47:40,170 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 21:47:40,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:40,174 INFO L225 Difference]: With dead ends: 3676 [2019-11-15 21:47:40,174 INFO L226 Difference]: Without dead ends: 3676 [2019-11-15 21:47:40,174 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:47:40,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3676 states. [2019-11-15 21:47:40,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3676 to 2284. [2019-11-15 21:47:40,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2284 states. [2019-11-15 21:47:40,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2284 states to 2284 states and 5351 transitions. [2019-11-15 21:47:40,206 INFO L78 Accepts]: Start accepts. Automaton has 2284 states and 5351 transitions. Word has length 94 [2019-11-15 21:47:40,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:40,206 INFO L462 AbstractCegarLoop]: Abstraction has 2284 states and 5351 transitions. [2019-11-15 21:47:40,206 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:47:40,206 INFO L276 IsEmpty]: Start isEmpty. Operand 2284 states and 5351 transitions. [2019-11-15 21:47:40,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 21:47:40,208 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:40,208 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:40,209 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:40,209 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:40,209 INFO L82 PathProgramCache]: Analyzing trace with hash 1068007509, now seen corresponding path program 1 times [2019-11-15 21:47:40,209 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:40,209 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [685424973] [2019-11-15 21:47:40,209 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:40,209 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:40,209 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:40,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:40,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:40,474 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [685424973] [2019-11-15 21:47:40,474 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:40,474 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-15 21:47:40,474 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1524352969] [2019-11-15 21:47:40,475 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-15 21:47:40,475 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:40,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-15 21:47:40,476 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2019-11-15 21:47:40,476 INFO L87 Difference]: Start difference. First operand 2284 states and 5351 transitions. Second operand 10 states. [2019-11-15 21:47:41,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:41,207 INFO L93 Difference]: Finished difference Result 2601 states and 5978 transitions. [2019-11-15 21:47:41,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 21:47:41,208 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 94 [2019-11-15 21:47:41,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:41,210 INFO L225 Difference]: With dead ends: 2601 [2019-11-15 21:47:41,210 INFO L226 Difference]: Without dead ends: 2561 [2019-11-15 21:47:41,211 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2019-11-15 21:47:41,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2561 states. [2019-11-15 21:47:41,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2561 to 2345. [2019-11-15 21:47:41,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2345 states. [2019-11-15 21:47:41,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2345 states to 2345 states and 5483 transitions. [2019-11-15 21:47:41,237 INFO L78 Accepts]: Start accepts. Automaton has 2345 states and 5483 transitions. Word has length 94 [2019-11-15 21:47:41,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:41,237 INFO L462 AbstractCegarLoop]: Abstraction has 2345 states and 5483 transitions. [2019-11-15 21:47:41,237 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-15 21:47:41,237 INFO L276 IsEmpty]: Start isEmpty. Operand 2345 states and 5483 transitions. [2019-11-15 21:47:41,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 21:47:41,239 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:41,239 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:41,239 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:41,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:41,240 INFO L82 PathProgramCache]: Analyzing trace with hash -867652778, now seen corresponding path program 1 times [2019-11-15 21:47:41,240 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:41,240 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1886076872] [2019-11-15 21:47:41,240 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:41,240 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:41,240 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:41,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:41,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:41,350 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1886076872] [2019-11-15 21:47:41,350 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:41,351 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 21:47:41,351 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1063953471] [2019-11-15 21:47:41,351 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 21:47:41,352 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:41,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 21:47:41,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:47:41,352 INFO L87 Difference]: Start difference. First operand 2345 states and 5483 transitions. Second operand 6 states. [2019-11-15 21:47:41,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:41,682 INFO L93 Difference]: Finished difference Result 2549 states and 5908 transitions. [2019-11-15 21:47:41,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 21:47:41,683 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 21:47:41,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:41,686 INFO L225 Difference]: With dead ends: 2549 [2019-11-15 21:47:41,686 INFO L226 Difference]: Without dead ends: 2549 [2019-11-15 21:47:41,687 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-15 21:47:41,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2549 states. [2019-11-15 21:47:41,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2549 to 2289. [2019-11-15 21:47:41,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2289 states. [2019-11-15 21:47:41,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2289 states to 2289 states and 5365 transitions. [2019-11-15 21:47:41,721 INFO L78 Accepts]: Start accepts. Automaton has 2289 states and 5365 transitions. Word has length 94 [2019-11-15 21:47:41,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:41,722 INFO L462 AbstractCegarLoop]: Abstraction has 2289 states and 5365 transitions. [2019-11-15 21:47:41,722 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 21:47:41,722 INFO L276 IsEmpty]: Start isEmpty. Operand 2289 states and 5365 transitions. [2019-11-15 21:47:41,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 21:47:41,725 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:41,725 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:41,725 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:41,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:41,726 INFO L82 PathProgramCache]: Analyzing trace with hash 1966278294, now seen corresponding path program 1 times [2019-11-15 21:47:41,726 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:41,726 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1325477914] [2019-11-15 21:47:41,726 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:41,726 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:41,727 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:41,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:41,863 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:41,863 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1325477914] [2019-11-15 21:47:41,865 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:41,865 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:47:41,865 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [411393441] [2019-11-15 21:47:41,866 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:47:41,866 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:41,867 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:47:41,867 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:47:41,867 INFO L87 Difference]: Start difference. First operand 2289 states and 5365 transitions. Second operand 7 states. [2019-11-15 21:47:42,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:42,428 INFO L93 Difference]: Finished difference Result 2907 states and 6710 transitions. [2019-11-15 21:47:42,429 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 21:47:42,429 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-11-15 21:47:42,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:42,432 INFO L225 Difference]: With dead ends: 2907 [2019-11-15 21:47:42,433 INFO L226 Difference]: Without dead ends: 2907 [2019-11-15 21:47:42,433 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-11-15 21:47:42,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2907 states. [2019-11-15 21:47:42,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2907 to 2361. [2019-11-15 21:47:42,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2361 states. [2019-11-15 21:47:42,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2361 states to 2361 states and 5515 transitions. [2019-11-15 21:47:42,474 INFO L78 Accepts]: Start accepts. Automaton has 2361 states and 5515 transitions. Word has length 94 [2019-11-15 21:47:42,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:42,474 INFO L462 AbstractCegarLoop]: Abstraction has 2361 states and 5515 transitions. [2019-11-15 21:47:42,474 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:47:42,474 INFO L276 IsEmpty]: Start isEmpty. Operand 2361 states and 5515 transitions. [2019-11-15 21:47:42,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 21:47:42,477 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:42,478 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:42,478 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:42,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:42,479 INFO L82 PathProgramCache]: Analyzing trace with hash -2093769194, now seen corresponding path program 1 times [2019-11-15 21:47:42,479 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:42,481 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1807034792] [2019-11-15 21:47:42,482 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:42,482 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:42,482 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:42,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:42,650 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:42,654 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1807034792] [2019-11-15 21:47:42,654 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:42,654 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 21:47:42,654 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [376937088] [2019-11-15 21:47:42,655 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 21:47:42,655 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:42,656 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 21:47:42,656 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-11-15 21:47:42,656 INFO L87 Difference]: Start difference. First operand 2361 states and 5515 transitions. Second operand 7 states. [2019-11-15 21:47:43,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:43,123 INFO L93 Difference]: Finished difference Result 2518 states and 5788 transitions. [2019-11-15 21:47:43,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 21:47:43,124 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-11-15 21:47:43,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:43,127 INFO L225 Difference]: With dead ends: 2518 [2019-11-15 21:47:43,127 INFO L226 Difference]: Without dead ends: 2486 [2019-11-15 21:47:43,129 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=83, Unknown=0, NotChecked=0, Total=132 [2019-11-15 21:47:43,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2486 states. [2019-11-15 21:47:43,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2486 to 2248. [2019-11-15 21:47:43,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2248 states. [2019-11-15 21:47:43,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2248 states to 2248 states and 5257 transitions. [2019-11-15 21:47:43,166 INFO L78 Accepts]: Start accepts. Automaton has 2248 states and 5257 transitions. Word has length 94 [2019-11-15 21:47:43,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:43,166 INFO L462 AbstractCegarLoop]: Abstraction has 2248 states and 5257 transitions. [2019-11-15 21:47:43,166 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 21:47:43,167 INFO L276 IsEmpty]: Start isEmpty. Operand 2248 states and 5257 transitions. [2019-11-15 21:47:43,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 21:47:43,169 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:43,170 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:43,170 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:43,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:43,171 INFO L82 PathProgramCache]: Analyzing trace with hash 265537815, now seen corresponding path program 1 times [2019-11-15 21:47:43,171 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:43,171 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [575961992] [2019-11-15 21:47:43,171 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:43,171 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:43,172 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:43,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:43,374 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:43,375 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [575961992] [2019-11-15 21:47:43,375 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:43,375 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-15 21:47:43,375 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1178983642] [2019-11-15 21:47:43,376 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-15 21:47:43,376 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:43,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-15 21:47:43,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2019-11-15 21:47:43,377 INFO L87 Difference]: Start difference. First operand 2248 states and 5257 transitions. Second operand 12 states. [2019-11-15 21:47:43,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:43,697 INFO L93 Difference]: Finished difference Result 3478 states and 8261 transitions. [2019-11-15 21:47:43,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-15 21:47:43,697 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 94 [2019-11-15 21:47:43,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:43,700 INFO L225 Difference]: With dead ends: 3478 [2019-11-15 21:47:43,700 INFO L226 Difference]: Without dead ends: 2839 [2019-11-15 21:47:43,700 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2019-11-15 21:47:43,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2839 states. [2019-11-15 21:47:43,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2839 to 2727. [2019-11-15 21:47:43,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2727 states. [2019-11-15 21:47:43,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2727 states to 2727 states and 6313 transitions. [2019-11-15 21:47:43,730 INFO L78 Accepts]: Start accepts. Automaton has 2727 states and 6313 transitions. Word has length 94 [2019-11-15 21:47:43,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:43,731 INFO L462 AbstractCegarLoop]: Abstraction has 2727 states and 6313 transitions. [2019-11-15 21:47:43,731 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-15 21:47:43,731 INFO L276 IsEmpty]: Start isEmpty. Operand 2727 states and 6313 transitions. [2019-11-15 21:47:43,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 21:47:43,733 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:43,733 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:43,734 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:43,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:43,734 INFO L82 PathProgramCache]: Analyzing trace with hash -1110798227, now seen corresponding path program 2 times [2019-11-15 21:47:43,734 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:43,734 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1968996962] [2019-11-15 21:47:43,734 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:43,734 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:43,735 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:43,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 21:47:43,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 21:47:43,918 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1968996962] [2019-11-15 21:47:43,918 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 21:47:43,918 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 21:47:43,918 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1259265374] [2019-11-15 21:47:43,919 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 21:47:43,919 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 21:47:43,919 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 21:47:43,919 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-11-15 21:47:43,920 INFO L87 Difference]: Start difference. First operand 2727 states and 6313 transitions. Second operand 8 states. [2019-11-15 21:47:44,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 21:47:44,029 INFO L93 Difference]: Finished difference Result 4534 states and 10587 transitions. [2019-11-15 21:47:44,029 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 21:47:44,029 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 94 [2019-11-15 21:47:44,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 21:47:44,031 INFO L225 Difference]: With dead ends: 4534 [2019-11-15 21:47:44,031 INFO L226 Difference]: Without dead ends: 2034 [2019-11-15 21:47:44,032 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2019-11-15 21:47:44,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2034 states. [2019-11-15 21:47:44,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2034 to 1994. [2019-11-15 21:47:44,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1994 states. [2019-11-15 21:47:44,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1994 states to 1994 states and 4632 transitions. [2019-11-15 21:47:44,052 INFO L78 Accepts]: Start accepts. Automaton has 1994 states and 4632 transitions. Word has length 94 [2019-11-15 21:47:44,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 21:47:44,053 INFO L462 AbstractCegarLoop]: Abstraction has 1994 states and 4632 transitions. [2019-11-15 21:47:44,053 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 21:47:44,053 INFO L276 IsEmpty]: Start isEmpty. Operand 1994 states and 4632 transitions. [2019-11-15 21:47:44,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 21:47:44,054 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 21:47:44,054 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 21:47:44,055 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 21:47:44,055 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 21:47:44,055 INFO L82 PathProgramCache]: Analyzing trace with hash 1365099785, now seen corresponding path program 3 times [2019-11-15 21:47:44,055 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 21:47:44,055 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [704364724] [2019-11-15 21:47:44,055 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:44,055 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 21:47:44,055 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 21:47:44,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 21:47:44,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 21:47:44,161 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 21:47:44,161 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 21:47:44,320 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 21:47:44,322 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 09:47:44 BasicIcfg [2019-11-15 21:47:44,322 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 21:47:44,323 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 21:47:44,323 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 21:47:44,323 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 21:47:44,324 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 09:46:48" (3/4) ... [2019-11-15 21:47:44,327 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 21:47:44,540 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_709d40c5-1f68-4a8b-bef3-d11b27c5b91f/bin/uautomizer/witness.graphml [2019-11-15 21:47:44,540 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 21:47:44,544 INFO L168 Benchmark]: Toolchain (without parser) took 57721.94 ms. Allocated memory was 1.0 GB in the beginning and 4.6 GB in the end (delta: 3.5 GB). Free memory was 939.3 MB in the beginning and 2.9 GB in the end (delta: -2.0 GB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2019-11-15 21:47:44,544 INFO L168 Benchmark]: CDTParser took 0.60 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 21:47:44,545 INFO L168 Benchmark]: CACSL2BoogieTranslator took 801.09 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 132.6 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -155.8 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-11-15 21:47:44,547 INFO L168 Benchmark]: Boogie Procedure Inliner took 74.59 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2019-11-15 21:47:44,547 INFO L168 Benchmark]: Boogie Preprocessor took 46.98 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 21:47:44,548 INFO L168 Benchmark]: RCFGBuilder took 881.33 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 48.4 MB). Peak memory consumption was 48.4 MB. Max. memory is 11.5 GB. [2019-11-15 21:47:44,548 INFO L168 Benchmark]: TraceAbstraction took 55694.67 ms. Allocated memory was 1.2 GB in the beginning and 4.6 GB in the end (delta: 3.4 GB). Free memory was 1.0 GB in the beginning and 3.0 GB in the end (delta: -1.9 GB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2019-11-15 21:47:44,549 INFO L168 Benchmark]: Witness Printer took 217.48 ms. Allocated memory is still 4.6 GB. Free memory was 3.0 GB in the beginning and 2.9 GB in the end (delta: 21.3 MB). Peak memory consumption was 21.3 MB. Max. memory is 11.5 GB. [2019-11-15 21:47:44,551 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.60 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 801.09 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 132.6 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -155.8 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 74.59 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 46.98 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 881.33 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 48.4 MB). Peak memory consumption was 48.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 55694.67 ms. Allocated memory was 1.2 GB in the beginning and 4.6 GB in the end (delta: 3.4 GB). Free memory was 1.0 GB in the beginning and 3.0 GB in the end (delta: -1.9 GB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. * Witness Printer took 217.48 ms. Allocated memory is still 4.6 GB. Free memory was 3.0 GB in the beginning and 2.9 GB in the end (delta: 21.3 MB). Peak memory consumption was 21.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L697] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L698] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L700] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L702] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L703] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L704] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L705] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L706] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L707] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L708] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L709] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L710] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L711] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L712] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L713] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L714] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L715] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L716] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L778] 0 pthread_t t2011; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L779] FCALL, FORK 0 pthread_create(&t2011, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L780] 0 pthread_t t2012; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L722] 1 y$w_buff1 = y$w_buff0 [L723] 1 y$w_buff0 = 2 [L724] 1 y$w_buff1_used = y$w_buff0_used [L725] 1 y$w_buff0_used = (_Bool)1 [L781] FCALL, FORK 0 pthread_create(&t2012, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L727] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L728] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L729] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L730] 1 y$r_buff0_thd1 = (_Bool)1 [L733] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L750] 2 __unbuffered_p1_EAX = x [L753] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L737] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L737] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L756] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L738] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L738] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L756] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L758] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L759] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L759] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L760] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L760] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L763] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L739] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L739] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L740] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L743] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L783] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L788] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L790] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L791] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 y$flush_delayed = weak$$choice2 [L797] 0 y$mem_tmp = y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L799] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L800] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L800] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L801] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 0 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L803] 0 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L804] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L806] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L806] 0 y = y$flush_delayed ? y$mem_tmp : y [L807] 0 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 175 locations, 3 error locations. Result: UNSAFE, OverallTime: 55.5s, OverallIterations: 35, TraceHistogramMax: 1, AutomataDifference: 27.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9298 SDtfs, 10706 SDslu, 22389 SDs, 0 SdLazy, 10332 SolverSat, 590 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 12.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 387 GetRequests, 105 SyntacticMatches, 13 SemanticMatches, 269 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 613 ImplicationChecksByTransitivity, 3.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=66329occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 20.0s AutomataMinimizationTime, 34 MinimizatonAttempts, 171090 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 3.2s InterpolantComputationTime, 2659 NumberOfCodeBlocks, 2659 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 2531 ConstructedInterpolants, 0 QuantifiedInterpolants, 496331 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...