./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe010_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_0ffddad1-e30e-45ba-84ec-7e42632212ca/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_0ffddad1-e30e-45ba-84ec-7e42632212ca/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_0ffddad1-e30e-45ba-84ec-7e42632212ca/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_0ffddad1-e30e-45ba-84ec-7e42632212ca/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe010_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_0ffddad1-e30e-45ba-84ec-7e42632212ca/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_0ffddad1-e30e-45ba-84ec-7e42632212ca/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ad7a03e4ce6743566424918d18fa966b8d8855df ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-16 00:21:53,389 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-16 00:21:53,391 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-16 00:21:53,403 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-16 00:21:53,404 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-16 00:21:53,405 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-16 00:21:53,406 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-16 00:21:53,409 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-16 00:21:53,411 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-16 00:21:53,412 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-16 00:21:53,413 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-16 00:21:53,414 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-16 00:21:53,415 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-16 00:21:53,416 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-16 00:21:53,417 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-16 00:21:53,418 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-16 00:21:53,419 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-16 00:21:53,420 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-16 00:21:53,423 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-16 00:21:53,426 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-16 00:21:53,428 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-16 00:21:53,430 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-16 00:21:53,431 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-16 00:21:53,432 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-16 00:21:53,435 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-16 00:21:53,436 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-16 00:21:53,436 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-16 00:21:53,437 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-16 00:21:53,438 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-16 00:21:53,439 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-16 00:21:53,439 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-16 00:21:53,440 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-16 00:21:53,441 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-16 00:21:53,442 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-16 00:21:53,443 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-16 00:21:53,444 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-16 00:21:53,444 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-16 00:21:53,445 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-16 00:21:53,445 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-16 00:21:53,446 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-16 00:21:53,447 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-16 00:21:53,448 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_0ffddad1-e30e-45ba-84ec-7e42632212ca/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-16 00:21:53,464 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-16 00:21:53,464 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-16 00:21:53,466 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-16 00:21:53,466 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-16 00:21:53,466 INFO L138 SettingsManager]: * Use SBE=true [2019-11-16 00:21:53,466 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-16 00:21:53,467 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-16 00:21:53,467 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-16 00:21:53,467 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-16 00:21:53,467 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-16 00:21:53,468 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-16 00:21:53,468 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-16 00:21:53,468 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-16 00:21:53,468 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-16 00:21:53,468 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-16 00:21:53,469 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-16 00:21:53,469 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-16 00:21:53,469 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-16 00:21:53,469 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-16 00:21:53,470 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-16 00:21:53,470 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-16 00:21:53,470 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-16 00:21:53,470 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-16 00:21:53,471 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-16 00:21:53,471 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-16 00:21:53,471 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-16 00:21:53,471 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-16 00:21:53,471 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-16 00:21:53,472 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_0ffddad1-e30e-45ba-84ec-7e42632212ca/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ad7a03e4ce6743566424918d18fa966b8d8855df [2019-11-16 00:21:53,502 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-16 00:21:53,515 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-16 00:21:53,519 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-16 00:21:53,520 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-16 00:21:53,521 INFO L275 PluginConnector]: CDTParser initialized [2019-11-16 00:21:53,521 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_0ffddad1-e30e-45ba-84ec-7e42632212ca/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe010_rmo.oepc.i [2019-11-16 00:21:53,584 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0ffddad1-e30e-45ba-84ec-7e42632212ca/bin/uautomizer/data/3af2c2c21/04caf9a259ec40c2aad6f1c6e95a3f60/FLAG0bd6c07e9 [2019-11-16 00:21:54,162 INFO L306 CDTParser]: Found 1 translation units. [2019-11-16 00:21:54,163 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_0ffddad1-e30e-45ba-84ec-7e42632212ca/sv-benchmarks/c/pthread-wmm/safe010_rmo.oepc.i [2019-11-16 00:21:54,177 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0ffddad1-e30e-45ba-84ec-7e42632212ca/bin/uautomizer/data/3af2c2c21/04caf9a259ec40c2aad6f1c6e95a3f60/FLAG0bd6c07e9 [2019-11-16 00:21:54,359 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_0ffddad1-e30e-45ba-84ec-7e42632212ca/bin/uautomizer/data/3af2c2c21/04caf9a259ec40c2aad6f1c6e95a3f60 [2019-11-16 00:21:54,362 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-16 00:21:54,363 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-16 00:21:54,364 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-16 00:21:54,365 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-16 00:21:54,371 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-16 00:21:54,372 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:21:54" (1/1) ... [2019-11-16 00:21:54,374 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1ac1ccf0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:21:54, skipping insertion in model container [2019-11-16 00:21:54,374 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 12:21:54" (1/1) ... [2019-11-16 00:21:54,381 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-16 00:21:54,452 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-16 00:21:54,924 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-16 00:21:54,938 INFO L188 MainTranslator]: Completed pre-run [2019-11-16 00:21:55,005 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-16 00:21:55,097 INFO L192 MainTranslator]: Completed translation [2019-11-16 00:21:55,097 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:21:55 WrapperNode [2019-11-16 00:21:55,097 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-16 00:21:55,099 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-16 00:21:55,099 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-16 00:21:55,099 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-16 00:21:55,109 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:21:55" (1/1) ... [2019-11-16 00:21:55,130 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:21:55" (1/1) ... [2019-11-16 00:21:55,171 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-16 00:21:55,171 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-16 00:21:55,172 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-16 00:21:55,172 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-16 00:21:55,183 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:21:55" (1/1) ... [2019-11-16 00:21:55,183 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:21:55" (1/1) ... [2019-11-16 00:21:55,188 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:21:55" (1/1) ... [2019-11-16 00:21:55,188 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:21:55" (1/1) ... [2019-11-16 00:21:55,199 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:21:55" (1/1) ... [2019-11-16 00:21:55,203 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:21:55" (1/1) ... [2019-11-16 00:21:55,207 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:21:55" (1/1) ... [2019-11-16 00:21:55,212 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-16 00:21:55,213 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-16 00:21:55,213 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-16 00:21:55,213 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-16 00:21:55,214 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:21:55" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0ffddad1-e30e-45ba-84ec-7e42632212ca/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-16 00:21:55,302 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-16 00:21:55,303 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-16 00:21:55,303 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-16 00:21:55,303 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-16 00:21:55,305 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-16 00:21:55,305 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-16 00:21:55,306 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-16 00:21:55,306 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-16 00:21:55,306 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-16 00:21:55,306 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-16 00:21:55,308 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-16 00:21:55,310 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-16 00:21:56,047 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-16 00:21:56,048 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-16 00:21:56,049 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:21:56 BoogieIcfgContainer [2019-11-16 00:21:56,049 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-16 00:21:56,050 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-16 00:21:56,050 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-16 00:21:56,054 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-16 00:21:56,054 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.11 12:21:54" (1/3) ... [2019-11-16 00:21:56,055 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@26be76ad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:21:56, skipping insertion in model container [2019-11-16 00:21:56,056 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 12:21:55" (2/3) ... [2019-11-16 00:21:56,056 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@26be76ad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 12:21:56, skipping insertion in model container [2019-11-16 00:21:56,056 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:21:56" (3/3) ... [2019-11-16 00:21:56,058 INFO L109 eAbstractionObserver]: Analyzing ICFG safe010_rmo.oepc.i [2019-11-16 00:21:56,102 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,103 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,103 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,103 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,103 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,104 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,104 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,104 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,105 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,105 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,105 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,106 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,106 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,106 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,106 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,107 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,107 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,107 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,107 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,108 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,108 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,108 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,109 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,109 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,109 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,109 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,110 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,110 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,110 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,111 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,111 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,111 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,111 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,112 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,112 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,113 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,113 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,113 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,113 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,114 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,114 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,114 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,114 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,118 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,121 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,121 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,122 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,122 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,123 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,123 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,123 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,123 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,123 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,124 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,124 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,125 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,125 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,125 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,126 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,126 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,126 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,126 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,127 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,127 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-16 00:21:56,135 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-16 00:21:56,135 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-16 00:21:56,148 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-16 00:21:56,160 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-16 00:21:56,187 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-16 00:21:56,187 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-16 00:21:56,187 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-16 00:21:56,187 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-16 00:21:56,188 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-16 00:21:56,189 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-16 00:21:56,189 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-16 00:21:56,189 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-16 00:21:56,212 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 139 places, 177 transitions [2019-11-16 00:21:58,361 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22509 states. [2019-11-16 00:21:58,363 INFO L276 IsEmpty]: Start isEmpty. Operand 22509 states. [2019-11-16 00:21:58,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-11-16 00:21:58,371 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:21:58,372 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:21:58,374 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:21:58,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:21:58,381 INFO L82 PathProgramCache]: Analyzing trace with hash 733594359, now seen corresponding path program 1 times [2019-11-16 00:21:58,390 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:21:58,391 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1437476621] [2019-11-16 00:21:58,391 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:21:58,391 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:21:58,392 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:21:58,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:21:58,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:21:58,716 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1437476621] [2019-11-16 00:21:58,717 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:21:58,718 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-16 00:21:58,719 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1388095829] [2019-11-16 00:21:58,724 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-16 00:21:58,725 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:21:58,741 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-16 00:21:58,742 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:21:58,745 INFO L87 Difference]: Start difference. First operand 22509 states. Second operand 4 states. [2019-11-16 00:21:59,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:21:59,443 INFO L93 Difference]: Finished difference Result 23453 states and 91770 transitions. [2019-11-16 00:21:59,444 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-16 00:21:59,445 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2019-11-16 00:21:59,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:21:59,725 INFO L225 Difference]: With dead ends: 23453 [2019-11-16 00:21:59,725 INFO L226 Difference]: Without dead ends: 21277 [2019-11-16 00:21:59,728 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:22:00,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21277 states. [2019-11-16 00:22:01,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21277 to 21277. [2019-11-16 00:22:01,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21277 states. [2019-11-16 00:22:01,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21277 states to 21277 states and 83794 transitions. [2019-11-16 00:22:01,255 INFO L78 Accepts]: Start accepts. Automaton has 21277 states and 83794 transitions. Word has length 32 [2019-11-16 00:22:01,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:01,257 INFO L462 AbstractCegarLoop]: Abstraction has 21277 states and 83794 transitions. [2019-11-16 00:22:01,257 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-16 00:22:01,257 INFO L276 IsEmpty]: Start isEmpty. Operand 21277 states and 83794 transitions. [2019-11-16 00:22:01,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-11-16 00:22:01,270 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:01,271 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:01,271 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:01,271 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:01,272 INFO L82 PathProgramCache]: Analyzing trace with hash 1574494247, now seen corresponding path program 1 times [2019-11-16 00:22:01,272 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:01,272 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1880507336] [2019-11-16 00:22:01,272 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:01,273 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:01,273 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:01,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:01,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:01,434 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1880507336] [2019-11-16 00:22:01,435 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:01,435 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:22:01,436 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [94274208] [2019-11-16 00:22:01,438 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:22:01,438 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:01,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:22:01,439 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:22:01,439 INFO L87 Difference]: Start difference. First operand 21277 states and 83794 transitions. Second operand 5 states. [2019-11-16 00:22:02,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:02,442 INFO L93 Difference]: Finished difference Result 34711 states and 129090 transitions. [2019-11-16 00:22:02,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:22:02,443 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2019-11-16 00:22:02,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:02,617 INFO L225 Difference]: With dead ends: 34711 [2019-11-16 00:22:02,617 INFO L226 Difference]: Without dead ends: 34567 [2019-11-16 00:22:02,618 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:22:02,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34567 states. [2019-11-16 00:22:03,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34567 to 33067. [2019-11-16 00:22:03,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33067 states. [2019-11-16 00:22:04,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33067 states to 33067 states and 123978 transitions. [2019-11-16 00:22:04,106 INFO L78 Accepts]: Start accepts. Automaton has 33067 states and 123978 transitions. Word has length 43 [2019-11-16 00:22:04,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:04,108 INFO L462 AbstractCegarLoop]: Abstraction has 33067 states and 123978 transitions. [2019-11-16 00:22:04,108 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:22:04,108 INFO L276 IsEmpty]: Start isEmpty. Operand 33067 states and 123978 transitions. [2019-11-16 00:22:04,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-16 00:22:04,116 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:04,117 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:04,117 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:04,117 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:04,118 INFO L82 PathProgramCache]: Analyzing trace with hash -606075449, now seen corresponding path program 1 times [2019-11-16 00:22:04,118 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:04,119 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [504846192] [2019-11-16 00:22:04,119 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:04,119 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:04,119 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:04,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:04,251 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:04,251 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [504846192] [2019-11-16 00:22:04,251 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:04,252 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:22:04,252 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1639374166] [2019-11-16 00:22:04,252 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:22:04,252 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:04,253 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:22:04,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:22:04,253 INFO L87 Difference]: Start difference. First operand 33067 states and 123978 transitions. Second operand 5 states. [2019-11-16 00:22:05,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:05,435 INFO L93 Difference]: Finished difference Result 40219 states and 148647 transitions. [2019-11-16 00:22:05,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:22:05,436 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-11-16 00:22:05,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:05,713 INFO L225 Difference]: With dead ends: 40219 [2019-11-16 00:22:05,714 INFO L226 Difference]: Without dead ends: 40059 [2019-11-16 00:22:05,714 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:22:05,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40059 states. [2019-11-16 00:22:06,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40059 to 34640. [2019-11-16 00:22:06,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34640 states. [2019-11-16 00:22:06,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34640 states to 34640 states and 129274 transitions. [2019-11-16 00:22:06,816 INFO L78 Accepts]: Start accepts. Automaton has 34640 states and 129274 transitions. Word has length 44 [2019-11-16 00:22:06,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:06,817 INFO L462 AbstractCegarLoop]: Abstraction has 34640 states and 129274 transitions. [2019-11-16 00:22:06,817 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:22:06,817 INFO L276 IsEmpty]: Start isEmpty. Operand 34640 states and 129274 transitions. [2019-11-16 00:22:06,832 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-16 00:22:06,832 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:06,832 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:06,833 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:06,833 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:06,833 INFO L82 PathProgramCache]: Analyzing trace with hash 905685778, now seen corresponding path program 1 times [2019-11-16 00:22:06,834 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:06,834 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2130047220] [2019-11-16 00:22:06,834 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:06,834 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:06,835 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:06,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:06,943 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:06,943 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2130047220] [2019-11-16 00:22:06,944 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:06,944 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:22:06,944 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1645643401] [2019-11-16 00:22:06,945 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:22:06,945 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:06,945 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:22:06,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:22:06,946 INFO L87 Difference]: Start difference. First operand 34640 states and 129274 transitions. Second operand 6 states. [2019-11-16 00:22:09,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:09,055 INFO L93 Difference]: Finished difference Result 45668 states and 166168 transitions. [2019-11-16 00:22:09,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-16 00:22:09,055 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 51 [2019-11-16 00:22:09,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:09,372 INFO L225 Difference]: With dead ends: 45668 [2019-11-16 00:22:09,372 INFO L226 Difference]: Without dead ends: 45524 [2019-11-16 00:22:09,373 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-16 00:22:09,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45524 states. [2019-11-16 00:22:10,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45524 to 33603. [2019-11-16 00:22:10,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33603 states. [2019-11-16 00:22:10,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33603 states to 33603 states and 125429 transitions. [2019-11-16 00:22:10,372 INFO L78 Accepts]: Start accepts. Automaton has 33603 states and 125429 transitions. Word has length 51 [2019-11-16 00:22:10,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:10,373 INFO L462 AbstractCegarLoop]: Abstraction has 33603 states and 125429 transitions. [2019-11-16 00:22:10,373 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:22:10,373 INFO L276 IsEmpty]: Start isEmpty. Operand 33603 states and 125429 transitions. [2019-11-16 00:22:10,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-11-16 00:22:10,414 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:10,414 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:10,415 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:10,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:10,415 INFO L82 PathProgramCache]: Analyzing trace with hash -1972912513, now seen corresponding path program 1 times [2019-11-16 00:22:10,415 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:10,416 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [713297569] [2019-11-16 00:22:10,416 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:10,416 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:10,416 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:10,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:10,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:10,595 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [713297569] [2019-11-16 00:22:10,595 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:10,596 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:22:10,596 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [619392288] [2019-11-16 00:22:10,596 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:22:10,597 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:10,597 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:22:10,598 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:22:10,598 INFO L87 Difference]: Start difference. First operand 33603 states and 125429 transitions. Second operand 6 states. [2019-11-16 00:22:12,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:12,230 INFO L93 Difference]: Finished difference Result 46075 states and 167862 transitions. [2019-11-16 00:22:12,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-16 00:22:12,231 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-11-16 00:22:12,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:12,345 INFO L225 Difference]: With dead ends: 46075 [2019-11-16 00:22:12,346 INFO L226 Difference]: Without dead ends: 45835 [2019-11-16 00:22:12,346 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-16 00:22:12,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45835 states. [2019-11-16 00:22:13,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45835 to 39964. [2019-11-16 00:22:13,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39964 states. [2019-11-16 00:22:13,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39964 states to 39964 states and 147353 transitions. [2019-11-16 00:22:13,220 INFO L78 Accepts]: Start accepts. Automaton has 39964 states and 147353 transitions. Word has length 58 [2019-11-16 00:22:13,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:13,221 INFO L462 AbstractCegarLoop]: Abstraction has 39964 states and 147353 transitions. [2019-11-16 00:22:13,221 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:22:13,221 INFO L276 IsEmpty]: Start isEmpty. Operand 39964 states and 147353 transitions. [2019-11-16 00:22:13,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-16 00:22:13,256 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:13,257 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:13,257 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:13,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:13,257 INFO L82 PathProgramCache]: Analyzing trace with hash -207346572, now seen corresponding path program 1 times [2019-11-16 00:22:13,257 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:13,258 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [372802985] [2019-11-16 00:22:13,258 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:13,258 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:13,258 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:13,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:13,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:13,305 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [372802985] [2019-11-16 00:22:13,305 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:13,306 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-16 00:22:13,306 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [112506860] [2019-11-16 00:22:13,306 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-16 00:22:13,307 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:13,307 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-16 00:22:13,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:22:13,307 INFO L87 Difference]: Start difference. First operand 39964 states and 147353 transitions. Second operand 3 states. [2019-11-16 00:22:13,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:13,577 INFO L93 Difference]: Finished difference Result 50262 states and 182188 transitions. [2019-11-16 00:22:13,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-16 00:22:13,579 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 60 [2019-11-16 00:22:13,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:13,690 INFO L225 Difference]: With dead ends: 50262 [2019-11-16 00:22:13,690 INFO L226 Difference]: Without dead ends: 50262 [2019-11-16 00:22:13,691 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:22:13,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50262 states. [2019-11-16 00:22:15,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50262 to 43894. [2019-11-16 00:22:15,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43894 states. [2019-11-16 00:22:15,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43894 states to 43894 states and 160791 transitions. [2019-11-16 00:22:15,580 INFO L78 Accepts]: Start accepts. Automaton has 43894 states and 160791 transitions. Word has length 60 [2019-11-16 00:22:15,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:15,581 INFO L462 AbstractCegarLoop]: Abstraction has 43894 states and 160791 transitions. [2019-11-16 00:22:15,581 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-16 00:22:15,581 INFO L276 IsEmpty]: Start isEmpty. Operand 43894 states and 160791 transitions. [2019-11-16 00:22:15,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-11-16 00:22:15,618 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:15,618 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:15,619 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:15,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:15,619 INFO L82 PathProgramCache]: Analyzing trace with hash 280232242, now seen corresponding path program 1 times [2019-11-16 00:22:15,619 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:15,619 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [512499947] [2019-11-16 00:22:15,619 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:15,619 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:15,619 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:15,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:15,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:15,714 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [512499947] [2019-11-16 00:22:15,714 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:15,714 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:22:15,715 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [17511991] [2019-11-16 00:22:15,715 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:22:15,715 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:15,716 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:22:15,716 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:22:15,716 INFO L87 Difference]: Start difference. First operand 43894 states and 160791 transitions. Second operand 7 states. [2019-11-16 00:22:16,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:16,867 INFO L93 Difference]: Finished difference Result 55890 states and 200525 transitions. [2019-11-16 00:22:16,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-16 00:22:16,867 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-11-16 00:22:16,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:16,990 INFO L225 Difference]: With dead ends: 55890 [2019-11-16 00:22:16,990 INFO L226 Difference]: Without dead ends: 55650 [2019-11-16 00:22:16,991 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-16 00:22:17,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55650 states. [2019-11-16 00:22:17,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55650 to 45120. [2019-11-16 00:22:17,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45120 states. [2019-11-16 00:22:17,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45120 states to 45120 states and 164958 transitions. [2019-11-16 00:22:17,978 INFO L78 Accepts]: Start accepts. Automaton has 45120 states and 164958 transitions. Word has length 64 [2019-11-16 00:22:17,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:17,978 INFO L462 AbstractCegarLoop]: Abstraction has 45120 states and 164958 transitions. [2019-11-16 00:22:17,979 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:22:17,979 INFO L276 IsEmpty]: Start isEmpty. Operand 45120 states and 164958 transitions. [2019-11-16 00:22:18,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-16 00:22:18,017 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:18,017 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:18,017 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:18,017 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:18,017 INFO L82 PathProgramCache]: Analyzing trace with hash 1547139530, now seen corresponding path program 1 times [2019-11-16 00:22:18,018 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:18,018 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [325776851] [2019-11-16 00:22:18,018 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:18,018 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:18,018 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:18,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:18,090 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:18,091 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [325776851] [2019-11-16 00:22:18,091 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:18,091 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:22:18,091 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1929017304] [2019-11-16 00:22:18,092 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:22:18,092 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:18,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:22:18,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:22:18,093 INFO L87 Difference]: Start difference. First operand 45120 states and 164958 transitions. Second operand 5 states. [2019-11-16 00:22:19,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:19,852 INFO L93 Difference]: Finished difference Result 115002 states and 419394 transitions. [2019-11-16 00:22:19,853 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-16 00:22:19,853 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-11-16 00:22:19,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:20,139 INFO L225 Difference]: With dead ends: 115002 [2019-11-16 00:22:20,139 INFO L226 Difference]: Without dead ends: 114262 [2019-11-16 00:22:20,140 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-16 00:22:20,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114262 states. [2019-11-16 00:22:21,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114262 to 64599. [2019-11-16 00:22:21,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64599 states. [2019-11-16 00:22:21,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64599 states to 64599 states and 236588 transitions. [2019-11-16 00:22:21,912 INFO L78 Accepts]: Start accepts. Automaton has 64599 states and 236588 transitions. Word has length 65 [2019-11-16 00:22:21,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:21,912 INFO L462 AbstractCegarLoop]: Abstraction has 64599 states and 236588 transitions. [2019-11-16 00:22:21,912 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:22:21,912 INFO L276 IsEmpty]: Start isEmpty. Operand 64599 states and 236588 transitions. [2019-11-16 00:22:21,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-16 00:22:21,964 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:21,964 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:21,965 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:21,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:21,965 INFO L82 PathProgramCache]: Analyzing trace with hash 1184022475, now seen corresponding path program 1 times [2019-11-16 00:22:21,965 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:21,965 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1675860281] [2019-11-16 00:22:21,965 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:21,965 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:21,965 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:21,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:22,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:22,093 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1675860281] [2019-11-16 00:22:22,094 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:22,094 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:22:22,094 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1492627896] [2019-11-16 00:22:22,095 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:22:22,095 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:22,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:22:22,095 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:22:22,096 INFO L87 Difference]: Start difference. First operand 64599 states and 236588 transitions. Second operand 6 states. [2019-11-16 00:22:23,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:23,008 INFO L93 Difference]: Finished difference Result 71048 states and 257943 transitions. [2019-11-16 00:22:23,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:22:23,008 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-11-16 00:22:23,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:23,185 INFO L225 Difference]: With dead ends: 71048 [2019-11-16 00:22:23,185 INFO L226 Difference]: Without dead ends: 71048 [2019-11-16 00:22:23,186 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:22:23,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71048 states. [2019-11-16 00:22:24,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71048 to 65451. [2019-11-16 00:22:24,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65451 states. [2019-11-16 00:22:25,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65451 states to 65451 states and 239375 transitions. [2019-11-16 00:22:25,108 INFO L78 Accepts]: Start accepts. Automaton has 65451 states and 239375 transitions. Word has length 65 [2019-11-16 00:22:25,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:25,108 INFO L462 AbstractCegarLoop]: Abstraction has 65451 states and 239375 transitions. [2019-11-16 00:22:25,108 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:22:25,109 INFO L276 IsEmpty]: Start isEmpty. Operand 65451 states and 239375 transitions. [2019-11-16 00:22:25,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-16 00:22:25,174 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:25,175 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:25,175 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:25,175 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:25,175 INFO L82 PathProgramCache]: Analyzing trace with hash -1183167156, now seen corresponding path program 1 times [2019-11-16 00:22:25,176 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:25,176 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [12797069] [2019-11-16 00:22:25,176 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:25,176 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:25,177 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:25,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:25,277 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:25,278 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [12797069] [2019-11-16 00:22:25,279 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:25,279 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:22:25,279 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1057585741] [2019-11-16 00:22:25,280 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:22:25,280 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:25,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:22:25,281 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:22:25,281 INFO L87 Difference]: Start difference. First operand 65451 states and 239375 transitions. Second operand 7 states. [2019-11-16 00:22:26,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:26,690 INFO L93 Difference]: Finished difference Result 75675 states and 272886 transitions. [2019-11-16 00:22:26,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-16 00:22:26,691 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-11-16 00:22:26,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:26,857 INFO L225 Difference]: With dead ends: 75675 [2019-11-16 00:22:26,857 INFO L226 Difference]: Without dead ends: 75475 [2019-11-16 00:22:26,858 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-16 00:22:27,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75475 states. [2019-11-16 00:22:28,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75475 to 66329. [2019-11-16 00:22:28,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66329 states. [2019-11-16 00:22:28,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66329 states to 66329 states and 242246 transitions. [2019-11-16 00:22:28,217 INFO L78 Accepts]: Start accepts. Automaton has 66329 states and 242246 transitions. Word has length 65 [2019-11-16 00:22:28,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:28,217 INFO L462 AbstractCegarLoop]: Abstraction has 66329 states and 242246 transitions. [2019-11-16 00:22:28,218 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:22:28,218 INFO L276 IsEmpty]: Start isEmpty. Operand 66329 states and 242246 transitions. [2019-11-16 00:22:29,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-11-16 00:22:29,104 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:29,105 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:29,105 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:29,105 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:29,106 INFO L82 PathProgramCache]: Analyzing trace with hash -1502327268, now seen corresponding path program 1 times [2019-11-16 00:22:29,106 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:29,106 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079757876] [2019-11-16 00:22:29,106 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:29,106 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:29,106 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:29,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:29,194 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:29,194 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1079757876] [2019-11-16 00:22:29,195 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:29,195 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-16 00:22:29,195 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1277208964] [2019-11-16 00:22:29,195 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-16 00:22:29,196 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:29,196 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-16 00:22:29,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:22:29,197 INFO L87 Difference]: Start difference. First operand 66329 states and 242246 transitions. Second operand 3 states. [2019-11-16 00:22:29,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:29,554 INFO L93 Difference]: Finished difference Result 64370 states and 233071 transitions. [2019-11-16 00:22:29,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-16 00:22:29,555 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-11-16 00:22:29,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:29,697 INFO L225 Difference]: With dead ends: 64370 [2019-11-16 00:22:29,697 INFO L226 Difference]: Without dead ends: 64208 [2019-11-16 00:22:29,698 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:22:29,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64208 states. [2019-11-16 00:22:30,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64208 to 64180. [2019-11-16 00:22:30,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64180 states. [2019-11-16 00:22:30,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64180 states to 64180 states and 232443 transitions. [2019-11-16 00:22:30,922 INFO L78 Accepts]: Start accepts. Automaton has 64180 states and 232443 transitions. Word has length 67 [2019-11-16 00:22:30,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:30,923 INFO L462 AbstractCegarLoop]: Abstraction has 64180 states and 232443 transitions. [2019-11-16 00:22:30,923 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-16 00:22:30,923 INFO L276 IsEmpty]: Start isEmpty. Operand 64180 states and 232443 transitions. [2019-11-16 00:22:30,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-11-16 00:22:30,976 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:30,976 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:30,976 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:30,976 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:30,977 INFO L82 PathProgramCache]: Analyzing trace with hash -1470674241, now seen corresponding path program 1 times [2019-11-16 00:22:30,977 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:30,977 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1766792208] [2019-11-16 00:22:30,977 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:30,977 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:30,977 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:30,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:31,075 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:31,077 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1766792208] [2019-11-16 00:22:31,077 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:31,078 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-16 00:22:31,078 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1011398783] [2019-11-16 00:22:31,078 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-16 00:22:31,079 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:31,079 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-16 00:22:31,079 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:22:31,079 INFO L87 Difference]: Start difference. First operand 64180 states and 232443 transitions. Second operand 4 states. [2019-11-16 00:22:31,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:31,201 INFO L93 Difference]: Finished difference Result 16840 states and 53043 transitions. [2019-11-16 00:22:31,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-16 00:22:31,202 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 68 [2019-11-16 00:22:31,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:31,237 INFO L225 Difference]: With dead ends: 16840 [2019-11-16 00:22:31,238 INFO L226 Difference]: Without dead ends: 16137 [2019-11-16 00:22:31,238 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:22:31,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16137 states. [2019-11-16 00:22:31,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16137 to 16001. [2019-11-16 00:22:31,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16001 states. [2019-11-16 00:22:31,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16001 states to 16001 states and 50461 transitions. [2019-11-16 00:22:31,500 INFO L78 Accepts]: Start accepts. Automaton has 16001 states and 50461 transitions. Word has length 68 [2019-11-16 00:22:31,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:31,500 INFO L462 AbstractCegarLoop]: Abstraction has 16001 states and 50461 transitions. [2019-11-16 00:22:31,500 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-16 00:22:31,500 INFO L276 IsEmpty]: Start isEmpty. Operand 16001 states and 50461 transitions. [2019-11-16 00:22:31,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-11-16 00:22:31,512 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:31,512 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:31,512 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:31,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:31,513 INFO L82 PathProgramCache]: Analyzing trace with hash 1982614502, now seen corresponding path program 1 times [2019-11-16 00:22:31,513 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:31,513 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [661329102] [2019-11-16 00:22:31,514 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:31,514 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:31,514 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:31,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:31,652 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:31,652 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [661329102] [2019-11-16 00:22:31,652 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:31,653 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-16 00:22:31,653 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [476772712] [2019-11-16 00:22:31,653 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-16 00:22:31,654 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:31,654 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-16 00:22:31,655 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:22:31,655 INFO L87 Difference]: Start difference. First operand 16001 states and 50461 transitions. Second operand 8 states. [2019-11-16 00:22:32,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:32,620 INFO L93 Difference]: Finished difference Result 17894 states and 55974 transitions. [2019-11-16 00:22:32,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-11-16 00:22:32,621 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 77 [2019-11-16 00:22:32,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:32,648 INFO L225 Difference]: With dead ends: 17894 [2019-11-16 00:22:32,648 INFO L226 Difference]: Without dead ends: 17846 [2019-11-16 00:22:32,649 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=404, Unknown=0, NotChecked=0, Total=506 [2019-11-16 00:22:32,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17846 states. [2019-11-16 00:22:32,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17846 to 16094. [2019-11-16 00:22:32,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16094 states. [2019-11-16 00:22:32,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16094 states to 16094 states and 50886 transitions. [2019-11-16 00:22:32,902 INFO L78 Accepts]: Start accepts. Automaton has 16094 states and 50886 transitions. Word has length 77 [2019-11-16 00:22:32,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:32,902 INFO L462 AbstractCegarLoop]: Abstraction has 16094 states and 50886 transitions. [2019-11-16 00:22:32,902 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-16 00:22:32,902 INFO L276 IsEmpty]: Start isEmpty. Operand 16094 states and 50886 transitions. [2019-11-16 00:22:32,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-16 00:22:32,917 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:32,917 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:32,917 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:32,918 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:32,918 INFO L82 PathProgramCache]: Analyzing trace with hash -1432922001, now seen corresponding path program 1 times [2019-11-16 00:22:32,918 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:32,918 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [351329660] [2019-11-16 00:22:32,918 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:32,918 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:32,918 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:32,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:33,072 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:33,073 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [351329660] [2019-11-16 00:22:33,073 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:33,073 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:22:33,074 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1521901947] [2019-11-16 00:22:33,074 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:22:33,074 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:33,075 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:22:33,075 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:22:33,075 INFO L87 Difference]: Start difference. First operand 16094 states and 50886 transitions. Second operand 6 states. [2019-11-16 00:22:33,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:33,666 INFO L93 Difference]: Finished difference Result 17857 states and 55827 transitions. [2019-11-16 00:22:33,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:22:33,667 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-11-16 00:22:33,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:33,694 INFO L225 Difference]: With dead ends: 17857 [2019-11-16 00:22:33,694 INFO L226 Difference]: Without dead ends: 17857 [2019-11-16 00:22:33,694 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:22:33,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17857 states. [2019-11-16 00:22:33,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17857 to 17110. [2019-11-16 00:22:33,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17110 states. [2019-11-16 00:22:33,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17110 states to 17110 states and 53670 transitions. [2019-11-16 00:22:33,953 INFO L78 Accepts]: Start accepts. Automaton has 17110 states and 53670 transitions. Word has length 80 [2019-11-16 00:22:33,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:33,953 INFO L462 AbstractCegarLoop]: Abstraction has 17110 states and 53670 transitions. [2019-11-16 00:22:33,954 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:22:33,955 INFO L276 IsEmpty]: Start isEmpty. Operand 17110 states and 53670 transitions. [2019-11-16 00:22:33,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-16 00:22:33,970 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:33,970 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:33,971 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:33,971 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:33,971 INFO L82 PathProgramCache]: Analyzing trace with hash 926385008, now seen corresponding path program 1 times [2019-11-16 00:22:33,971 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:33,971 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1654256862] [2019-11-16 00:22:33,971 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:33,971 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:33,971 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:33,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:34,090 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:34,091 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1654256862] [2019-11-16 00:22:34,091 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:34,091 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:22:34,092 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [981271406] [2019-11-16 00:22:34,092 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:22:34,092 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:34,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:22:34,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:22:34,093 INFO L87 Difference]: Start difference. First operand 17110 states and 53670 transitions. Second operand 7 states. [2019-11-16 00:22:34,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:34,701 INFO L93 Difference]: Finished difference Result 18508 states and 57510 transitions. [2019-11-16 00:22:34,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-16 00:22:34,701 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-11-16 00:22:34,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:34,729 INFO L225 Difference]: With dead ends: 18508 [2019-11-16 00:22:34,729 INFO L226 Difference]: Without dead ends: 18508 [2019-11-16 00:22:34,730 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-16 00:22:34,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18508 states. [2019-11-16 00:22:34,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18508 to 17958. [2019-11-16 00:22:34,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17958 states. [2019-11-16 00:22:35,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17958 states to 17958 states and 55879 transitions. [2019-11-16 00:22:35,041 INFO L78 Accepts]: Start accepts. Automaton has 17958 states and 55879 transitions. Word has length 80 [2019-11-16 00:22:35,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:35,041 INFO L462 AbstractCegarLoop]: Abstraction has 17958 states and 55879 transitions. [2019-11-16 00:22:35,042 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:22:35,042 INFO L276 IsEmpty]: Start isEmpty. Operand 17958 states and 55879 transitions. [2019-11-16 00:22:35,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-16 00:22:35,064 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:35,064 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:35,065 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:35,065 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:35,065 INFO L82 PathProgramCache]: Analyzing trace with hash 1256150769, now seen corresponding path program 1 times [2019-11-16 00:22:35,066 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:35,066 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [240185909] [2019-11-16 00:22:35,066 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:35,066 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:35,067 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:35,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:35,144 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:35,145 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [240185909] [2019-11-16 00:22:35,145 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:35,145 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-16 00:22:35,145 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1670235682] [2019-11-16 00:22:35,146 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-16 00:22:35,146 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:35,146 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-16 00:22:35,147 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:22:35,147 INFO L87 Difference]: Start difference. First operand 17958 states and 55879 transitions. Second operand 3 states. [2019-11-16 00:22:35,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:35,250 INFO L93 Difference]: Finished difference Result 16132 states and 49733 transitions. [2019-11-16 00:22:35,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-16 00:22:35,251 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2019-11-16 00:22:35,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:35,283 INFO L225 Difference]: With dead ends: 16132 [2019-11-16 00:22:35,284 INFO L226 Difference]: Without dead ends: 16132 [2019-11-16 00:22:35,284 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-16 00:22:35,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16132 states. [2019-11-16 00:22:35,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16132 to 15826. [2019-11-16 00:22:35,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15826 states. [2019-11-16 00:22:35,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15826 states to 15826 states and 48840 transitions. [2019-11-16 00:22:35,611 INFO L78 Accepts]: Start accepts. Automaton has 15826 states and 48840 transitions. Word has length 80 [2019-11-16 00:22:35,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:35,612 INFO L462 AbstractCegarLoop]: Abstraction has 15826 states and 48840 transitions. [2019-11-16 00:22:35,612 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-16 00:22:35,612 INFO L276 IsEmpty]: Start isEmpty. Operand 15826 states and 48840 transitions. [2019-11-16 00:22:35,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-16 00:22:35,631 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:35,631 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:35,631 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:35,631 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:35,631 INFO L82 PathProgramCache]: Analyzing trace with hash 1897409041, now seen corresponding path program 1 times [2019-11-16 00:22:35,632 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:35,632 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1534152879] [2019-11-16 00:22:35,632 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:35,632 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:35,632 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:35,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:35,735 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:35,736 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1534152879] [2019-11-16 00:22:35,736 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:35,737 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:22:35,737 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [830670354] [2019-11-16 00:22:35,737 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:22:35,738 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:35,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:22:35,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:22:35,738 INFO L87 Difference]: Start difference. First operand 15826 states and 48840 transitions. Second operand 5 states. [2019-11-16 00:22:35,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:35,789 INFO L93 Difference]: Finished difference Result 2362 states and 5859 transitions. [2019-11-16 00:22:35,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-16 00:22:35,790 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 81 [2019-11-16 00:22:35,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:35,794 INFO L225 Difference]: With dead ends: 2362 [2019-11-16 00:22:35,794 INFO L226 Difference]: Without dead ends: 2101 [2019-11-16 00:22:35,794 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:22:35,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2101 states. [2019-11-16 00:22:35,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2101 to 1973. [2019-11-16 00:22:35,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1973 states. [2019-11-16 00:22:35,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1973 states to 1973 states and 4895 transitions. [2019-11-16 00:22:35,838 INFO L78 Accepts]: Start accepts. Automaton has 1973 states and 4895 transitions. Word has length 81 [2019-11-16 00:22:35,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:35,838 INFO L462 AbstractCegarLoop]: Abstraction has 1973 states and 4895 transitions. [2019-11-16 00:22:35,838 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:22:35,839 INFO L276 IsEmpty]: Start isEmpty. Operand 1973 states and 4895 transitions. [2019-11-16 00:22:35,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:22:35,842 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:35,842 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:35,843 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:35,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:35,843 INFO L82 PathProgramCache]: Analyzing trace with hash -1803827190, now seen corresponding path program 1 times [2019-11-16 00:22:35,844 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:35,844 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2011240052] [2019-11-16 00:22:35,844 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:35,844 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:35,845 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:35,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:35,927 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:35,927 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2011240052] [2019-11-16 00:22:35,927 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:35,928 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-16 00:22:35,928 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [432829502] [2019-11-16 00:22:35,929 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-16 00:22:35,929 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:35,929 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-16 00:22:35,929 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:22:35,930 INFO L87 Difference]: Start difference. First operand 1973 states and 4895 transitions. Second operand 4 states. [2019-11-16 00:22:36,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:36,111 INFO L93 Difference]: Finished difference Result 2289 states and 5617 transitions. [2019-11-16 00:22:36,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-16 00:22:36,112 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 94 [2019-11-16 00:22:36,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:36,115 INFO L225 Difference]: With dead ends: 2289 [2019-11-16 00:22:36,115 INFO L226 Difference]: Without dead ends: 2289 [2019-11-16 00:22:36,116 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-16 00:22:36,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2289 states. [2019-11-16 00:22:36,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2289 to 2064. [2019-11-16 00:22:36,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2064 states. [2019-11-16 00:22:36,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2064 states to 2064 states and 5104 transitions. [2019-11-16 00:22:36,157 INFO L78 Accepts]: Start accepts. Automaton has 2064 states and 5104 transitions. Word has length 94 [2019-11-16 00:22:36,158 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:36,158 INFO L462 AbstractCegarLoop]: Abstraction has 2064 states and 5104 transitions. [2019-11-16 00:22:36,158 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-16 00:22:36,158 INFO L276 IsEmpty]: Start isEmpty. Operand 2064 states and 5104 transitions. [2019-11-16 00:22:36,160 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:22:36,160 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:36,161 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:36,161 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:36,161 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:36,161 INFO L82 PathProgramCache]: Analyzing trace with hash 937991178, now seen corresponding path program 2 times [2019-11-16 00:22:36,161 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:36,162 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1080259759] [2019-11-16 00:22:36,162 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:36,162 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:36,162 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:36,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:36,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:36,248 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1080259759] [2019-11-16 00:22:36,248 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:36,248 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:22:36,249 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [501628957] [2019-11-16 00:22:36,249 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:22:36,249 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:36,250 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:22:36,250 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:22:36,250 INFO L87 Difference]: Start difference. First operand 2064 states and 5104 transitions. Second operand 5 states. [2019-11-16 00:22:36,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:36,918 INFO L93 Difference]: Finished difference Result 3473 states and 8503 transitions. [2019-11-16 00:22:36,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-16 00:22:36,918 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-11-16 00:22:36,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:36,921 INFO L225 Difference]: With dead ends: 3473 [2019-11-16 00:22:36,921 INFO L226 Difference]: Without dead ends: 3473 [2019-11-16 00:22:36,921 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:22:36,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3473 states. [2019-11-16 00:22:36,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3473 to 2397. [2019-11-16 00:22:36,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2397 states. [2019-11-16 00:22:36,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2397 states to 2397 states and 5980 transitions. [2019-11-16 00:22:36,951 INFO L78 Accepts]: Start accepts. Automaton has 2397 states and 5980 transitions. Word has length 94 [2019-11-16 00:22:36,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:36,952 INFO L462 AbstractCegarLoop]: Abstraction has 2397 states and 5980 transitions. [2019-11-16 00:22:36,952 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:22:36,952 INFO L276 IsEmpty]: Start isEmpty. Operand 2397 states and 5980 transitions. [2019-11-16 00:22:36,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:22:36,954 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:36,954 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:36,954 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:36,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:36,955 INFO L82 PathProgramCache]: Analyzing trace with hash 1899605195, now seen corresponding path program 1 times [2019-11-16 00:22:36,955 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:36,955 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1310378637] [2019-11-16 00:22:36,955 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:36,955 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:36,955 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:36,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:37,027 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:37,027 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1310378637] [2019-11-16 00:22:37,027 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:37,028 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:22:37,028 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2075740759] [2019-11-16 00:22:37,028 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:22:37,029 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:37,029 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:22:37,029 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:22:37,029 INFO L87 Difference]: Start difference. First operand 2397 states and 5980 transitions. Second operand 5 states. [2019-11-16 00:22:37,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:37,270 INFO L93 Difference]: Finished difference Result 2692 states and 6644 transitions. [2019-11-16 00:22:37,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:22:37,271 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-11-16 00:22:37,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:37,273 INFO L225 Difference]: With dead ends: 2692 [2019-11-16 00:22:37,273 INFO L226 Difference]: Without dead ends: 2692 [2019-11-16 00:22:37,274 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:22:37,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2692 states. [2019-11-16 00:22:37,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2692 to 2400. [2019-11-16 00:22:37,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2400 states. [2019-11-16 00:22:37,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2400 states to 2400 states and 5987 transitions. [2019-11-16 00:22:37,301 INFO L78 Accepts]: Start accepts. Automaton has 2400 states and 5987 transitions. Word has length 94 [2019-11-16 00:22:37,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:37,301 INFO L462 AbstractCegarLoop]: Abstraction has 2400 states and 5987 transitions. [2019-11-16 00:22:37,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:22:37,302 INFO L276 IsEmpty]: Start isEmpty. Operand 2400 states and 5987 transitions. [2019-11-16 00:22:37,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:22:37,304 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:37,304 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:37,304 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:37,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:37,304 INFO L82 PathProgramCache]: Analyzing trace with hash 976921612, now seen corresponding path program 1 times [2019-11-16 00:22:37,304 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:37,305 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062518869] [2019-11-16 00:22:37,305 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:37,305 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:37,305 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:37,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:37,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:37,435 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1062518869] [2019-11-16 00:22:37,435 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:37,435 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-16 00:22:37,436 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1799409708] [2019-11-16 00:22:37,436 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-16 00:22:37,436 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:37,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-16 00:22:37,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:22:37,437 INFO L87 Difference]: Start difference. First operand 2400 states and 5987 transitions. Second operand 8 states. [2019-11-16 00:22:38,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:38,025 INFO L93 Difference]: Finished difference Result 3645 states and 8851 transitions. [2019-11-16 00:22:38,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-16 00:22:38,025 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 94 [2019-11-16 00:22:38,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:38,029 INFO L225 Difference]: With dead ends: 3645 [2019-11-16 00:22:38,029 INFO L226 Difference]: Without dead ends: 3627 [2019-11-16 00:22:38,031 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2019-11-16 00:22:38,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3627 states. [2019-11-16 00:22:38,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3627 to 2604. [2019-11-16 00:22:38,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2604 states. [2019-11-16 00:22:38,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2604 states to 2604 states and 6468 transitions. [2019-11-16 00:22:38,065 INFO L78 Accepts]: Start accepts. Automaton has 2604 states and 6468 transitions. Word has length 94 [2019-11-16 00:22:38,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:38,066 INFO L462 AbstractCegarLoop]: Abstraction has 2604 states and 6468 transitions. [2019-11-16 00:22:38,066 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-16 00:22:38,066 INFO L276 IsEmpty]: Start isEmpty. Operand 2604 states and 6468 transitions. [2019-11-16 00:22:38,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:22:38,068 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:38,069 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:38,069 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:38,069 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:38,069 INFO L82 PathProgramCache]: Analyzing trace with hash -2073281203, now seen corresponding path program 1 times [2019-11-16 00:22:38,070 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:38,070 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2142730847] [2019-11-16 00:22:38,070 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:38,070 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:38,070 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:38,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:38,272 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:38,273 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2142730847] [2019-11-16 00:22:38,273 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:38,273 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:22:38,273 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [907979867] [2019-11-16 00:22:38,274 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:22:38,274 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:38,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:22:38,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:22:38,274 INFO L87 Difference]: Start difference. First operand 2604 states and 6468 transitions. Second operand 7 states. [2019-11-16 00:22:38,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:38,514 INFO L93 Difference]: Finished difference Result 2980 states and 7211 transitions. [2019-11-16 00:22:38,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-16 00:22:38,517 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-11-16 00:22:38,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:38,520 INFO L225 Difference]: With dead ends: 2980 [2019-11-16 00:22:38,520 INFO L226 Difference]: Without dead ends: 2980 [2019-11-16 00:22:38,521 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2019-11-16 00:22:38,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2980 states. [2019-11-16 00:22:38,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2980 to 2752. [2019-11-16 00:22:38,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2752 states. [2019-11-16 00:22:38,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2752 states to 2752 states and 6745 transitions. [2019-11-16 00:22:38,548 INFO L78 Accepts]: Start accepts. Automaton has 2752 states and 6745 transitions. Word has length 94 [2019-11-16 00:22:38,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:38,549 INFO L462 AbstractCegarLoop]: Abstraction has 2752 states and 6745 transitions. [2019-11-16 00:22:38,549 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:22:38,549 INFO L276 IsEmpty]: Start isEmpty. Operand 2752 states and 6745 transitions. [2019-11-16 00:22:38,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:22:38,551 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:38,551 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:38,551 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:38,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:38,552 INFO L82 PathProgramCache]: Analyzing trace with hash -1743515442, now seen corresponding path program 1 times [2019-11-16 00:22:38,552 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:38,552 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89224858] [2019-11-16 00:22:38,552 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:38,552 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:38,552 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:38,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:38,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:38,723 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [89224858] [2019-11-16 00:22:38,723 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:38,723 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-16 00:22:38,723 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1669359867] [2019-11-16 00:22:38,724 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-16 00:22:38,724 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:38,724 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-16 00:22:38,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2019-11-16 00:22:38,724 INFO L87 Difference]: Start difference. First operand 2752 states and 6745 transitions. Second operand 10 states. [2019-11-16 00:22:39,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:39,329 INFO L93 Difference]: Finished difference Result 3160 states and 7560 transitions. [2019-11-16 00:22:39,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-16 00:22:39,330 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 94 [2019-11-16 00:22:39,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:39,333 INFO L225 Difference]: With dead ends: 3160 [2019-11-16 00:22:39,333 INFO L226 Difference]: Without dead ends: 3112 [2019-11-16 00:22:39,334 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2019-11-16 00:22:39,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3112 states. [2019-11-16 00:22:39,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3112 to 2889. [2019-11-16 00:22:39,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2889 states. [2019-11-16 00:22:39,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2889 states to 2889 states and 7043 transitions. [2019-11-16 00:22:39,367 INFO L78 Accepts]: Start accepts. Automaton has 2889 states and 7043 transitions. Word has length 94 [2019-11-16 00:22:39,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:39,367 INFO L462 AbstractCegarLoop]: Abstraction has 2889 states and 7043 transitions. [2019-11-16 00:22:39,367 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-16 00:22:39,367 INFO L276 IsEmpty]: Start isEmpty. Operand 2889 states and 7043 transitions. [2019-11-16 00:22:39,370 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:22:39,370 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:39,371 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:39,371 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:39,371 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:39,372 INFO L82 PathProgramCache]: Analyzing trace with hash -628972914, now seen corresponding path program 1 times [2019-11-16 00:22:39,372 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:39,372 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1540188386] [2019-11-16 00:22:39,372 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:39,372 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:39,373 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:39,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:39,496 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:39,496 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1540188386] [2019-11-16 00:22:39,497 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:39,497 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:22:39,497 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [28435375] [2019-11-16 00:22:39,498 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:22:39,498 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:39,498 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:22:39,498 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:22:39,499 INFO L87 Difference]: Start difference. First operand 2889 states and 7043 transitions. Second operand 7 states. [2019-11-16 00:22:39,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:39,865 INFO L93 Difference]: Finished difference Result 3073 states and 7376 transitions. [2019-11-16 00:22:39,865 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-16 00:22:39,865 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-11-16 00:22:39,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:39,869 INFO L225 Difference]: With dead ends: 3073 [2019-11-16 00:22:39,870 INFO L226 Difference]: Without dead ends: 3055 [2019-11-16 00:22:39,872 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2019-11-16 00:22:39,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3055 states. [2019-11-16 00:22:39,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3055 to 2926. [2019-11-16 00:22:39,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2926 states. [2019-11-16 00:22:39,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2926 states to 2926 states and 7094 transitions. [2019-11-16 00:22:39,929 INFO L78 Accepts]: Start accepts. Automaton has 2926 states and 7094 transitions. Word has length 94 [2019-11-16 00:22:39,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:39,929 INFO L462 AbstractCegarLoop]: Abstraction has 2926 states and 7094 transitions. [2019-11-16 00:22:39,929 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:22:39,929 INFO L276 IsEmpty]: Start isEmpty. Operand 2926 states and 7094 transitions. [2019-11-16 00:22:39,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:22:39,933 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:39,933 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:39,934 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:39,934 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:39,934 INFO L82 PathProgramCache]: Analyzing trace with hash 1965253903, now seen corresponding path program 1 times [2019-11-16 00:22:39,934 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:39,935 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [791076345] [2019-11-16 00:22:39,935 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:39,935 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:39,935 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:39,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:40,038 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:40,038 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [791076345] [2019-11-16 00:22:40,039 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:40,039 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-16 00:22:40,039 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1085269484] [2019-11-16 00:22:40,040 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-16 00:22:40,040 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:40,041 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-16 00:22:40,041 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-16 00:22:40,041 INFO L87 Difference]: Start difference. First operand 2926 states and 7094 transitions. Second operand 6 states. [2019-11-16 00:22:40,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:40,261 INFO L93 Difference]: Finished difference Result 2954 states and 7130 transitions. [2019-11-16 00:22:40,261 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-16 00:22:40,261 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-16 00:22:40,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:40,265 INFO L225 Difference]: With dead ends: 2954 [2019-11-16 00:22:40,265 INFO L226 Difference]: Without dead ends: 2954 [2019-11-16 00:22:40,266 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:22:40,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2954 states. [2019-11-16 00:22:40,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2954 to 2848. [2019-11-16 00:22:40,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2848 states. [2019-11-16 00:22:40,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2848 states to 2848 states and 6914 transitions. [2019-11-16 00:22:40,311 INFO L78 Accepts]: Start accepts. Automaton has 2848 states and 6914 transitions. Word has length 94 [2019-11-16 00:22:40,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:40,312 INFO L462 AbstractCegarLoop]: Abstraction has 2848 states and 6914 transitions. [2019-11-16 00:22:40,312 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-16 00:22:40,312 INFO L276 IsEmpty]: Start isEmpty. Operand 2848 states and 6914 transitions. [2019-11-16 00:22:40,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:22:40,316 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:40,316 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:40,316 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:40,316 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:40,317 INFO L82 PathProgramCache]: Analyzing trace with hash -610324849, now seen corresponding path program 1 times [2019-11-16 00:22:40,317 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:40,317 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1570275034] [2019-11-16 00:22:40,317 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:40,318 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:40,318 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:40,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:40,551 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:40,551 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1570275034] [2019-11-16 00:22:40,552 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:40,552 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-16 00:22:40,552 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [24167939] [2019-11-16 00:22:40,553 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-16 00:22:40,553 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:40,553 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-16 00:22:40,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-16 00:22:40,554 INFO L87 Difference]: Start difference. First operand 2848 states and 6914 transitions. Second operand 8 states. [2019-11-16 00:22:40,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:40,909 INFO L93 Difference]: Finished difference Result 2893 states and 6896 transitions. [2019-11-16 00:22:40,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-16 00:22:40,910 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 94 [2019-11-16 00:22:40,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:40,913 INFO L225 Difference]: With dead ends: 2893 [2019-11-16 00:22:40,913 INFO L226 Difference]: Without dead ends: 2821 [2019-11-16 00:22:40,914 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-11-16 00:22:40,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2821 states. [2019-11-16 00:22:40,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2821 to 2660. [2019-11-16 00:22:40,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2660 states. [2019-11-16 00:22:40,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2660 states to 2660 states and 6450 transitions. [2019-11-16 00:22:40,959 INFO L78 Accepts]: Start accepts. Automaton has 2660 states and 6450 transitions. Word has length 94 [2019-11-16 00:22:40,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:40,959 INFO L462 AbstractCegarLoop]: Abstraction has 2660 states and 6450 transitions. [2019-11-16 00:22:40,959 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-16 00:22:40,959 INFO L276 IsEmpty]: Start isEmpty. Operand 2660 states and 6450 transitions. [2019-11-16 00:22:40,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:22:40,963 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:40,963 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:40,963 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:40,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:40,964 INFO L82 PathProgramCache]: Analyzing trace with hash -1196522800, now seen corresponding path program 1 times [2019-11-16 00:22:40,964 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:40,964 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1045996215] [2019-11-16 00:22:40,964 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:40,965 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:40,965 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:40,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:41,053 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:41,054 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1045996215] [2019-11-16 00:22:41,054 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:41,054 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-16 00:22:41,054 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [921150887] [2019-11-16 00:22:41,055 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-16 00:22:41,055 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:41,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-16 00:22:41,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-16 00:22:41,056 INFO L87 Difference]: Start difference. First operand 2660 states and 6450 transitions. Second operand 5 states. [2019-11-16 00:22:41,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:41,288 INFO L93 Difference]: Finished difference Result 2777 states and 6669 transitions. [2019-11-16 00:22:41,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-16 00:22:41,288 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-11-16 00:22:41,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:41,292 INFO L225 Difference]: With dead ends: 2777 [2019-11-16 00:22:41,292 INFO L226 Difference]: Without dead ends: 2759 [2019-11-16 00:22:41,292 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:22:41,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2759 states. [2019-11-16 00:22:41,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2759 to 2398. [2019-11-16 00:22:41,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2398 states. [2019-11-16 00:22:41,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2398 states to 2398 states and 5787 transitions. [2019-11-16 00:22:41,333 INFO L78 Accepts]: Start accepts. Automaton has 2398 states and 5787 transitions. Word has length 94 [2019-11-16 00:22:41,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:41,333 INFO L462 AbstractCegarLoop]: Abstraction has 2398 states and 5787 transitions. [2019-11-16 00:22:41,334 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-16 00:22:41,334 INFO L276 IsEmpty]: Start isEmpty. Operand 2398 states and 5787 transitions. [2019-11-16 00:22:41,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:22:41,337 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:41,337 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:41,337 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:41,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:41,340 INFO L82 PathProgramCache]: Analyzing trace with hash 48241681, now seen corresponding path program 1 times [2019-11-16 00:22:41,340 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:41,340 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [63875437] [2019-11-16 00:22:41,340 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:41,341 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:41,341 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:41,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:41,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:41,601 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [63875437] [2019-11-16 00:22:41,601 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:41,601 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-16 00:22:41,602 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1758406197] [2019-11-16 00:22:41,602 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-16 00:22:41,602 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:41,602 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-16 00:22:41,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2019-11-16 00:22:41,603 INFO L87 Difference]: Start difference. First operand 2398 states and 5787 transitions. Second operand 12 states. [2019-11-16 00:22:41,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:41,971 INFO L93 Difference]: Finished difference Result 3835 states and 9386 transitions. [2019-11-16 00:22:41,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-16 00:22:41,971 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 94 [2019-11-16 00:22:41,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:41,975 INFO L225 Difference]: With dead ends: 3835 [2019-11-16 00:22:41,975 INFO L226 Difference]: Without dead ends: 2935 [2019-11-16 00:22:41,976 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2019-11-16 00:22:41,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2935 states. [2019-11-16 00:22:42,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2935 to 2823. [2019-11-16 00:22:42,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2823 states. [2019-11-16 00:22:42,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2823 states to 2823 states and 6737 transitions. [2019-11-16 00:22:42,021 INFO L78 Accepts]: Start accepts. Automaton has 2823 states and 6737 transitions. Word has length 94 [2019-11-16 00:22:42,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:42,022 INFO L462 AbstractCegarLoop]: Abstraction has 2823 states and 6737 transitions. [2019-11-16 00:22:42,022 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-16 00:22:42,022 INFO L276 IsEmpty]: Start isEmpty. Operand 2823 states and 6737 transitions. [2019-11-16 00:22:42,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:22:42,025 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:42,026 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:42,026 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:42,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:42,027 INFO L82 PathProgramCache]: Analyzing trace with hash -1328094361, now seen corresponding path program 2 times [2019-11-16 00:22:42,027 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:42,027 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1544284917] [2019-11-16 00:22:42,027 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:42,028 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:42,028 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:42,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-16 00:22:42,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-16 00:22:42,181 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1544284917] [2019-11-16 00:22:42,181 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-16 00:22:42,182 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-16 00:22:42,182 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2098968487] [2019-11-16 00:22:42,182 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-16 00:22:42,182 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-16 00:22:42,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-16 00:22:42,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-16 00:22:42,184 INFO L87 Difference]: Start difference. First operand 2823 states and 6737 transitions. Second operand 7 states. [2019-11-16 00:22:42,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-16 00:22:42,308 INFO L93 Difference]: Finished difference Result 4823 states and 11629 transitions. [2019-11-16 00:22:42,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-16 00:22:42,309 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-11-16 00:22:42,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-16 00:22:42,312 INFO L225 Difference]: With dead ends: 4823 [2019-11-16 00:22:42,312 INFO L226 Difference]: Without dead ends: 2227 [2019-11-16 00:22:42,314 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-16 00:22:42,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2227 states. [2019-11-16 00:22:42,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2227 to 2227. [2019-11-16 00:22:42,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2227 states. [2019-11-16 00:22:42,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2227 states to 2227 states and 5339 transitions. [2019-11-16 00:22:42,349 INFO L78 Accepts]: Start accepts. Automaton has 2227 states and 5339 transitions. Word has length 94 [2019-11-16 00:22:42,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-16 00:22:42,350 INFO L462 AbstractCegarLoop]: Abstraction has 2227 states and 5339 transitions. [2019-11-16 00:22:42,350 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-16 00:22:42,350 INFO L276 IsEmpty]: Start isEmpty. Operand 2227 states and 5339 transitions. [2019-11-16 00:22:42,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-16 00:22:42,353 INFO L372 BasicCegarLoop]: Found error trace [2019-11-16 00:22:42,353 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-16 00:22:42,354 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-16 00:22:42,354 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-16 00:22:42,354 INFO L82 PathProgramCache]: Analyzing trace with hash 654613161, now seen corresponding path program 3 times [2019-11-16 00:22:42,354 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-16 00:22:42,355 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2099140143] [2019-11-16 00:22:42,355 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:42,355 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-16 00:22:42,355 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-16 00:22:42,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-16 00:22:42,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-16 00:22:42,489 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-16 00:22:42,489 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-16 00:22:42,692 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-16 00:22:42,695 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.11 12:22:42 BasicIcfg [2019-11-16 00:22:42,696 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-16 00:22:42,696 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-16 00:22:42,696 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-16 00:22:42,705 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-16 00:22:42,705 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 12:21:56" (3/4) ... [2019-11-16 00:22:42,708 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-16 00:22:42,892 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_0ffddad1-e30e-45ba-84ec-7e42632212ca/bin/uautomizer/witness.graphml [2019-11-16 00:22:42,892 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-16 00:22:42,895 INFO L168 Benchmark]: Toolchain (without parser) took 48530.58 ms. Allocated memory was 1.0 GB in the beginning and 4.2 GB in the end (delta: 3.2 GB). Free memory was 939.4 MB in the beginning and 2.4 GB in the end (delta: -1.5 GB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. [2019-11-16 00:22:42,895 INFO L168 Benchmark]: CDTParser took 0.24 ms. Allocated memory is still 1.0 GB. Free memory is still 962.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-16 00:22:42,896 INFO L168 Benchmark]: CACSL2BoogieTranslator took 733.78 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 145.2 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -168.0 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. [2019-11-16 00:22:42,896 INFO L168 Benchmark]: Boogie Procedure Inliner took 72.68 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2019-11-16 00:22:42,896 INFO L168 Benchmark]: Boogie Preprocessor took 40.84 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-16 00:22:42,897 INFO L168 Benchmark]: RCFGBuilder took 836.56 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 48.4 MB). Peak memory consumption was 48.4 MB. Max. memory is 11.5 GB. [2019-11-16 00:22:42,897 INFO L168 Benchmark]: TraceAbstraction took 46645.71 ms. Allocated memory was 1.2 GB in the beginning and 4.2 GB in the end (delta: 3.0 GB). Free memory was 1.1 GB in the beginning and 2.5 GB in the end (delta: -1.4 GB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. [2019-11-16 00:22:42,898 INFO L168 Benchmark]: Witness Printer took 196.22 ms. Allocated memory is still 4.2 GB. Free memory was 2.5 GB in the beginning and 2.4 GB in the end (delta: 18.5 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-11-16 00:22:42,900 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.24 ms. Allocated memory is still 1.0 GB. Free memory is still 962.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 733.78 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 145.2 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -168.0 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 72.68 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 40.84 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 836.56 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 48.4 MB). Peak memory consumption was 48.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 46645.71 ms. Allocated memory was 1.2 GB in the beginning and 4.2 GB in the end (delta: 3.0 GB). Free memory was 1.1 GB in the beginning and 2.5 GB in the end (delta: -1.4 GB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. * Witness Printer took 196.22 ms. Allocated memory is still 4.2 GB. Free memory was 2.5 GB in the beginning and 2.4 GB in the end (delta: 18.5 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L697] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L698] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L700] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L702] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L703] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L704] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L705] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L706] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L707] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L708] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L709] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L710] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L711] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L712] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L713] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L714] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L715] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L716] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L778] 0 pthread_t t2017; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L779] FCALL, FORK 0 pthread_create(&t2017, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L780] 0 pthread_t t2018; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] FCALL, FORK 0 pthread_create(&t2018, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L722] 1 y$w_buff1 = y$w_buff0 [L723] 1 y$w_buff0 = 2 [L724] 1 y$w_buff1_used = y$w_buff0_used [L725] 1 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L727] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L728] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L729] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L730] 1 y$r_buff0_thd1 = (_Bool)1 [L733] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L750] 2 __unbuffered_p1_EAX = x [L753] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L737] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L737] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L756] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L738] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L738] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L756] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L758] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L759] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L759] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L760] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L760] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L763] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L739] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L739] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L740] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L743] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L783] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L788] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L790] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L791] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 y$flush_delayed = weak$$choice2 [L797] 0 y$mem_tmp = y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L799] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L800] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L800] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L801] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 0 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L803] 0 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L804] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L806] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L806] 0 y = y$flush_delayed ? y$mem_tmp : y [L807] 0 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 175 locations, 3 error locations. Result: UNSAFE, OverallTime: 46.5s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 21.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7144 SDtfs, 7842 SDslu, 18458 SDs, 0 SdLazy, 7418 SolverSat, 511 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 8.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 334 GetRequests, 87 SyntacticMatches, 13 SemanticMatches, 234 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 417 ImplicationChecksByTransitivity, 3.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=66329occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 17.0s AutomataMinimizationTime, 29 MinimizatonAttempts, 113598 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.8s InterpolantComputationTime, 2302 NumberOfCodeBlocks, 2302 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 2179 ConstructedInterpolants, 0 QuantifiedInterpolants, 470340 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...