./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe010_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version cad46833 Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_5227bc13-c0bd-4022-b2bc-4fcf1508c3c4/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_5227bc13-c0bd-4022-b2bc-4fcf1508c3c4/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_5227bc13-c0bd-4022-b2bc-4fcf1508c3c4/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_5227bc13-c0bd-4022-b2bc-4fcf1508c3c4/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe010_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_5227bc13-c0bd-4022-b2bc-4fcf1508c3c4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_5227bc13-c0bd-4022-b2bc-4fcf1508c3c4/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a006136170cf9498b8ab21bde8c3aefce8094f73 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-cad4683 [2019-11-15 20:20:22,971 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-15 20:20:22,973 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-15 20:20:22,989 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-15 20:20:22,990 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-15 20:20:22,991 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-15 20:20:22,993 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-15 20:20:23,004 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-15 20:20:23,010 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-15 20:20:23,013 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-15 20:20:23,016 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-15 20:20:23,018 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-15 20:20:23,018 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-15 20:20:23,021 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-15 20:20:23,022 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-15 20:20:23,023 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-15 20:20:23,024 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-15 20:20:23,027 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-15 20:20:23,030 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-15 20:20:23,034 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-15 20:20:23,038 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-15 20:20:23,040 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-15 20:20:23,043 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-15 20:20:23,044 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-15 20:20:23,047 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-15 20:20:23,048 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-15 20:20:23,048 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-15 20:20:23,051 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-15 20:20:23,051 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-15 20:20:23,052 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-15 20:20:23,052 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-15 20:20:23,053 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-15 20:20:23,054 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-15 20:20:23,055 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-15 20:20:23,057 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-15 20:20:23,057 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-15 20:20:23,058 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-15 20:20:23,058 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-15 20:20:23,059 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-15 20:20:23,060 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-15 20:20:23,060 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-15 20:20:23,062 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_5227bc13-c0bd-4022-b2bc-4fcf1508c3c4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-15 20:20:23,093 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-15 20:20:23,100 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-15 20:20:23,102 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-15 20:20:23,102 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-15 20:20:23,103 INFO L138 SettingsManager]: * Use SBE=true [2019-11-15 20:20:23,103 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-15 20:20:23,103 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-15 20:20:23,104 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-15 20:20:23,104 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-15 20:20:23,110 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-15 20:20:23,110 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-15 20:20:23,111 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-15 20:20:23,111 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-15 20:20:23,111 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-15 20:20:23,112 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-15 20:20:23,112 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-15 20:20:23,112 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-15 20:20:23,113 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-15 20:20:23,113 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-15 20:20:23,113 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-15 20:20:23,115 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-15 20:20:23,115 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:20:23,115 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-15 20:20:23,116 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-15 20:20:23,116 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-15 20:20:23,117 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-15 20:20:23,117 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-15 20:20:23,117 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-15 20:20:23,118 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_5227bc13-c0bd-4022-b2bc-4fcf1508c3c4/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a006136170cf9498b8ab21bde8c3aefce8094f73 [2019-11-15 20:20:23,161 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-15 20:20:23,179 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-15 20:20:23,184 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-15 20:20:23,186 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-15 20:20:23,186 INFO L275 PluginConnector]: CDTParser initialized [2019-11-15 20:20:23,187 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_5227bc13-c0bd-4022-b2bc-4fcf1508c3c4/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe010_rmo.opt.i [2019-11-15 20:20:23,264 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_5227bc13-c0bd-4022-b2bc-4fcf1508c3c4/bin/uautomizer/data/b5f3aa124/d3141b72e4754f1385d30a96983d8ff6/FLAG850f4508b [2019-11-15 20:20:23,881 INFO L306 CDTParser]: Found 1 translation units. [2019-11-15 20:20:23,882 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_5227bc13-c0bd-4022-b2bc-4fcf1508c3c4/sv-benchmarks/c/pthread-wmm/safe010_rmo.opt.i [2019-11-15 20:20:23,897 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_5227bc13-c0bd-4022-b2bc-4fcf1508c3c4/bin/uautomizer/data/b5f3aa124/d3141b72e4754f1385d30a96983d8ff6/FLAG850f4508b [2019-11-15 20:20:24,193 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_5227bc13-c0bd-4022-b2bc-4fcf1508c3c4/bin/uautomizer/data/b5f3aa124/d3141b72e4754f1385d30a96983d8ff6 [2019-11-15 20:20:24,196 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-15 20:20:24,198 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-15 20:20:24,199 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-15 20:20:24,199 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-15 20:20:24,203 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-15 20:20:24,208 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:20:24" (1/1) ... [2019-11-15 20:20:24,211 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2e77d902 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:20:24, skipping insertion in model container [2019-11-15 20:20:24,212 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.11 08:20:24" (1/1) ... [2019-11-15 20:20:24,223 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-11-15 20:20:24,290 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-11-15 20:20:24,895 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:20:24,914 INFO L188 MainTranslator]: Completed pre-run [2019-11-15 20:20:24,995 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-15 20:20:25,086 INFO L192 MainTranslator]: Completed translation [2019-11-15 20:20:25,087 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:20:25 WrapperNode [2019-11-15 20:20:25,087 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-15 20:20:25,088 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-15 20:20:25,088 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-15 20:20:25,088 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-15 20:20:25,099 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:20:25" (1/1) ... [2019-11-15 20:20:25,128 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:20:25" (1/1) ... [2019-11-15 20:20:25,167 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-15 20:20:25,168 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-15 20:20:25,168 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-15 20:20:25,169 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-15 20:20:25,180 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:20:25" (1/1) ... [2019-11-15 20:20:25,180 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:20:25" (1/1) ... [2019-11-15 20:20:25,187 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:20:25" (1/1) ... [2019-11-15 20:20:25,187 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:20:25" (1/1) ... [2019-11-15 20:20:25,198 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:20:25" (1/1) ... [2019-11-15 20:20:25,202 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:20:25" (1/1) ... [2019-11-15 20:20:25,206 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:20:25" (1/1) ... [2019-11-15 20:20:25,211 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-15 20:20:25,212 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-15 20:20:25,212 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-15 20:20:25,212 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-15 20:20:25,213 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:20:25" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_5227bc13-c0bd-4022-b2bc-4fcf1508c3c4/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-15 20:20:25,282 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-11-15 20:20:25,283 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-11-15 20:20:25,283 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-11-15 20:20:25,283 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-11-15 20:20:25,283 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-11-15 20:20:25,283 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-11-15 20:20:25,283 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-11-15 20:20:25,284 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-11-15 20:20:25,284 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-11-15 20:20:25,284 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-15 20:20:25,284 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-15 20:20:25,286 WARN L202 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-11-15 20:20:26,228 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-15 20:20:26,229 INFO L284 CfgBuilder]: Removed 8 assume(true) statements. [2019-11-15 20:20:26,230 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:20:26 BoogieIcfgContainer [2019-11-15 20:20:26,230 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-15 20:20:26,231 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-15 20:20:26,231 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-15 20:20:26,235 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-15 20:20:26,235 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.11 08:20:24" (1/3) ... [2019-11-15 20:20:26,236 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1db3da2c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:20:26, skipping insertion in model container [2019-11-15 20:20:26,236 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.11 08:20:25" (2/3) ... [2019-11-15 20:20:26,237 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1db3da2c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.11 08:20:26, skipping insertion in model container [2019-11-15 20:20:26,237 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:20:26" (3/3) ... [2019-11-15 20:20:26,238 INFO L109 eAbstractionObserver]: Analyzing ICFG safe010_rmo.opt.i [2019-11-15 20:20:26,282 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,282 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,283 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,283 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,283 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,283 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,284 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,284 WARN L315 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,284 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,285 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,285 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,285 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,285 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,286 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,286 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,286 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,286 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,286 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,287 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,287 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,287 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,287 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,288 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,288 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,288 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,288 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,288 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,289 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,289 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,289 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,289 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,290 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,290 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,290 WARN L315 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,291 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,291 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,291 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,291 WARN L315 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,291 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,292 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,292 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,292 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,292 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,292 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,293 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,293 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,293 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,293 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,294 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,294 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,294 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,294 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,294 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,295 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,295 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,295 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,295 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,295 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,296 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,296 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,296 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,296 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,296 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,297 WARN L315 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-11-15 20:20:26,303 WARN L141 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-11-15 20:20:26,304 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-15 20:20:26,313 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-15 20:20:26,327 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-15 20:20:26,349 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-15 20:20:26,349 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-15 20:20:26,349 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-15 20:20:26,350 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-15 20:20:26,350 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-15 20:20:26,350 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-15 20:20:26,350 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-15 20:20:26,350 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-15 20:20:26,365 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 139 places, 177 transitions [2019-11-15 20:20:28,310 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22509 states. [2019-11-15 20:20:28,312 INFO L276 IsEmpty]: Start isEmpty. Operand 22509 states. [2019-11-15 20:20:28,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-11-15 20:20:28,323 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:20:28,324 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:20:28,326 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:20:28,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:20:28,333 INFO L82 PathProgramCache]: Analyzing trace with hash 733594359, now seen corresponding path program 1 times [2019-11-15 20:20:28,343 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:20:28,343 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [915324300] [2019-11-15 20:20:28,344 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:28,344 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:28,344 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:20:28,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:20:28,634 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:20:28,635 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [915324300] [2019-11-15 20:20:28,636 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:20:28,636 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:20:28,636 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [696824838] [2019-11-15 20:20:28,647 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:20:28,647 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:20:28,663 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:20:28,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:20:28,667 INFO L87 Difference]: Start difference. First operand 22509 states. Second operand 4 states. [2019-11-15 20:20:29,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:20:29,447 INFO L93 Difference]: Finished difference Result 23453 states and 91770 transitions. [2019-11-15 20:20:29,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 20:20:29,449 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2019-11-15 20:20:29,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:20:29,730 INFO L225 Difference]: With dead ends: 23453 [2019-11-15 20:20:29,730 INFO L226 Difference]: Without dead ends: 21277 [2019-11-15 20:20:29,732 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:20:30,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21277 states. [2019-11-15 20:20:31,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21277 to 21277. [2019-11-15 20:20:31,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21277 states. [2019-11-15 20:20:31,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21277 states to 21277 states and 83794 transitions. [2019-11-15 20:20:31,475 INFO L78 Accepts]: Start accepts. Automaton has 21277 states and 83794 transitions. Word has length 32 [2019-11-15 20:20:31,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:20:31,477 INFO L462 AbstractCegarLoop]: Abstraction has 21277 states and 83794 transitions. [2019-11-15 20:20:31,477 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:20:31,477 INFO L276 IsEmpty]: Start isEmpty. Operand 21277 states and 83794 transitions. [2019-11-15 20:20:31,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-11-15 20:20:31,492 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:20:31,493 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:20:31,493 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:20:31,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:20:31,494 INFO L82 PathProgramCache]: Analyzing trace with hash 1574494247, now seen corresponding path program 1 times [2019-11-15 20:20:31,494 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:20:31,495 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1811088030] [2019-11-15 20:20:31,495 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:31,495 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:31,496 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:20:31,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:20:31,709 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:20:31,710 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1811088030] [2019-11-15 20:20:31,711 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:20:31,711 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:20:31,712 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [272157995] [2019-11-15 20:20:31,715 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:20:31,715 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:20:31,716 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:20:31,716 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:20:31,716 INFO L87 Difference]: Start difference. First operand 21277 states and 83794 transitions. Second operand 5 states. [2019-11-15 20:20:32,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:20:32,857 INFO L93 Difference]: Finished difference Result 34711 states and 129090 transitions. [2019-11-15 20:20:32,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:20:32,858 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2019-11-15 20:20:32,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:20:33,031 INFO L225 Difference]: With dead ends: 34711 [2019-11-15 20:20:33,031 INFO L226 Difference]: Without dead ends: 34567 [2019-11-15 20:20:33,032 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:20:33,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34567 states. [2019-11-15 20:20:34,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34567 to 33067. [2019-11-15 20:20:34,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33067 states. [2019-11-15 20:20:34,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33067 states to 33067 states and 123978 transitions. [2019-11-15 20:20:34,592 INFO L78 Accepts]: Start accepts. Automaton has 33067 states and 123978 transitions. Word has length 43 [2019-11-15 20:20:34,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:20:34,594 INFO L462 AbstractCegarLoop]: Abstraction has 33067 states and 123978 transitions. [2019-11-15 20:20:34,594 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:20:34,594 INFO L276 IsEmpty]: Start isEmpty. Operand 33067 states and 123978 transitions. [2019-11-15 20:20:34,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-15 20:20:34,603 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:20:34,603 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:20:34,604 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:20:34,604 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:20:34,604 INFO L82 PathProgramCache]: Analyzing trace with hash -606075449, now seen corresponding path program 1 times [2019-11-15 20:20:34,605 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:20:34,605 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [108274589] [2019-11-15 20:20:34,605 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:34,606 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:34,606 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:20:34,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:20:34,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:20:34,723 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [108274589] [2019-11-15 20:20:34,723 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:20:34,723 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:20:34,723 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [637550339] [2019-11-15 20:20:34,724 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:20:34,724 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:20:34,724 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:20:34,725 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:20:34,725 INFO L87 Difference]: Start difference. First operand 33067 states and 123978 transitions. Second operand 5 states. [2019-11-15 20:20:35,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:20:35,927 INFO L93 Difference]: Finished difference Result 40219 states and 148647 transitions. [2019-11-15 20:20:35,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:20:35,927 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-11-15 20:20:35,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:20:36,101 INFO L225 Difference]: With dead ends: 40219 [2019-11-15 20:20:36,102 INFO L226 Difference]: Without dead ends: 40059 [2019-11-15 20:20:36,103 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:20:36,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40059 states. [2019-11-15 20:20:37,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40059 to 34640. [2019-11-15 20:20:37,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34640 states. [2019-11-15 20:20:38,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34640 states to 34640 states and 129274 transitions. [2019-11-15 20:20:38,013 INFO L78 Accepts]: Start accepts. Automaton has 34640 states and 129274 transitions. Word has length 44 [2019-11-15 20:20:38,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:20:38,015 INFO L462 AbstractCegarLoop]: Abstraction has 34640 states and 129274 transitions. [2019-11-15 20:20:38,015 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:20:38,015 INFO L276 IsEmpty]: Start isEmpty. Operand 34640 states and 129274 transitions. [2019-11-15 20:20:38,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-15 20:20:38,032 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:20:38,032 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:20:38,032 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:20:38,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:20:38,033 INFO L82 PathProgramCache]: Analyzing trace with hash 905685778, now seen corresponding path program 1 times [2019-11-15 20:20:38,033 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:20:38,033 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [602088013] [2019-11-15 20:20:38,034 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:38,034 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:38,034 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:20:38,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:20:38,144 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:20:38,144 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [602088013] [2019-11-15 20:20:38,145 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:20:38,145 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:20:38,145 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [246881044] [2019-11-15 20:20:38,146 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:20:38,146 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:20:38,146 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:20:38,146 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:20:38,147 INFO L87 Difference]: Start difference. First operand 34640 states and 129274 transitions. Second operand 6 states. [2019-11-15 20:20:39,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:20:39,302 INFO L93 Difference]: Finished difference Result 45668 states and 166168 transitions. [2019-11-15 20:20:39,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 20:20:39,303 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 51 [2019-11-15 20:20:39,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:20:39,607 INFO L225 Difference]: With dead ends: 45668 [2019-11-15 20:20:39,608 INFO L226 Difference]: Without dead ends: 45524 [2019-11-15 20:20:39,610 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-11-15 20:20:39,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45524 states. [2019-11-15 20:20:40,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45524 to 33603. [2019-11-15 20:20:40,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33603 states. [2019-11-15 20:20:40,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33603 states to 33603 states and 125429 transitions. [2019-11-15 20:20:40,610 INFO L78 Accepts]: Start accepts. Automaton has 33603 states and 125429 transitions. Word has length 51 [2019-11-15 20:20:40,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:20:40,611 INFO L462 AbstractCegarLoop]: Abstraction has 33603 states and 125429 transitions. [2019-11-15 20:20:40,611 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:20:40,612 INFO L276 IsEmpty]: Start isEmpty. Operand 33603 states and 125429 transitions. [2019-11-15 20:20:40,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-11-15 20:20:40,651 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:20:40,651 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:20:40,652 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:20:40,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:20:40,652 INFO L82 PathProgramCache]: Analyzing trace with hash -1972912513, now seen corresponding path program 1 times [2019-11-15 20:20:40,653 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:20:40,653 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1237859514] [2019-11-15 20:20:40,653 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:40,653 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:40,654 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:20:40,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:20:40,747 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:20:40,748 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1237859514] [2019-11-15 20:20:40,748 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:20:40,748 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:20:40,749 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1959114027] [2019-11-15 20:20:40,749 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:20:40,749 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:20:40,750 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:20:40,750 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:20:40,750 INFO L87 Difference]: Start difference. First operand 33603 states and 125429 transitions. Second operand 6 states. [2019-11-15 20:20:42,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:20:42,282 INFO L93 Difference]: Finished difference Result 46075 states and 167862 transitions. [2019-11-15 20:20:42,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 20:20:42,283 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-11-15 20:20:42,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:20:42,382 INFO L225 Difference]: With dead ends: 46075 [2019-11-15 20:20:42,382 INFO L226 Difference]: Without dead ends: 45835 [2019-11-15 20:20:42,383 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-11-15 20:20:42,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45835 states. [2019-11-15 20:20:43,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45835 to 39964. [2019-11-15 20:20:43,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39964 states. [2019-11-15 20:20:43,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39964 states to 39964 states and 147353 transitions. [2019-11-15 20:20:43,286 INFO L78 Accepts]: Start accepts. Automaton has 39964 states and 147353 transitions. Word has length 58 [2019-11-15 20:20:43,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:20:43,287 INFO L462 AbstractCegarLoop]: Abstraction has 39964 states and 147353 transitions. [2019-11-15 20:20:43,287 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:20:43,287 INFO L276 IsEmpty]: Start isEmpty. Operand 39964 states and 147353 transitions. [2019-11-15 20:20:43,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-11-15 20:20:43,323 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:20:43,323 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:20:43,323 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:20:43,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:20:43,324 INFO L82 PathProgramCache]: Analyzing trace with hash -207346572, now seen corresponding path program 1 times [2019-11-15 20:20:43,324 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:20:43,324 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [158928738] [2019-11-15 20:20:43,325 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:43,325 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:43,325 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:20:43,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:20:43,385 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:20:43,386 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [158928738] [2019-11-15 20:20:43,386 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:20:43,386 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:20:43,386 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1943939035] [2019-11-15 20:20:43,387 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:20:43,387 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:20:43,387 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:20:43,387 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:20:43,387 INFO L87 Difference]: Start difference. First operand 39964 states and 147353 transitions. Second operand 3 states. [2019-11-15 20:20:44,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:20:44,367 INFO L93 Difference]: Finished difference Result 50262 states and 182188 transitions. [2019-11-15 20:20:44,368 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:20:44,368 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 60 [2019-11-15 20:20:44,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:20:44,480 INFO L225 Difference]: With dead ends: 50262 [2019-11-15 20:20:44,481 INFO L226 Difference]: Without dead ends: 50262 [2019-11-15 20:20:44,481 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:20:44,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50262 states. [2019-11-15 20:20:45,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50262 to 43894. [2019-11-15 20:20:45,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43894 states. [2019-11-15 20:20:45,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43894 states to 43894 states and 160791 transitions. [2019-11-15 20:20:45,381 INFO L78 Accepts]: Start accepts. Automaton has 43894 states and 160791 transitions. Word has length 60 [2019-11-15 20:20:45,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:20:45,381 INFO L462 AbstractCegarLoop]: Abstraction has 43894 states and 160791 transitions. [2019-11-15 20:20:45,382 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:20:45,382 INFO L276 IsEmpty]: Start isEmpty. Operand 43894 states and 160791 transitions. [2019-11-15 20:20:45,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-11-15 20:20:45,421 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:20:45,421 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:20:45,421 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:20:45,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:20:45,421 INFO L82 PathProgramCache]: Analyzing trace with hash 280232242, now seen corresponding path program 1 times [2019-11-15 20:20:45,421 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:20:45,421 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [351981186] [2019-11-15 20:20:45,422 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:45,422 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:45,422 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:20:45,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:20:45,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:20:45,515 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [351981186] [2019-11-15 20:20:45,515 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:20:45,515 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:20:45,516 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1479965291] [2019-11-15 20:20:45,516 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:20:45,516 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:20:45,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:20:45,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:20:45,517 INFO L87 Difference]: Start difference. First operand 43894 states and 160791 transitions. Second operand 7 states. [2019-11-15 20:20:46,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:20:46,669 INFO L93 Difference]: Finished difference Result 55890 states and 200525 transitions. [2019-11-15 20:20:46,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 20:20:46,670 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-11-15 20:20:46,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:20:46,801 INFO L225 Difference]: With dead ends: 55890 [2019-11-15 20:20:46,801 INFO L226 Difference]: Without dead ends: 55650 [2019-11-15 20:20:46,801 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-11-15 20:20:47,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55650 states. [2019-11-15 20:20:48,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55650 to 45120. [2019-11-15 20:20:48,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45120 states. [2019-11-15 20:20:48,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45120 states to 45120 states and 164958 transitions. [2019-11-15 20:20:48,260 INFO L78 Accepts]: Start accepts. Automaton has 45120 states and 164958 transitions. Word has length 64 [2019-11-15 20:20:48,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:20:48,261 INFO L462 AbstractCegarLoop]: Abstraction has 45120 states and 164958 transitions. [2019-11-15 20:20:48,261 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:20:48,261 INFO L276 IsEmpty]: Start isEmpty. Operand 45120 states and 164958 transitions. [2019-11-15 20:20:48,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-15 20:20:48,301 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:20:48,301 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:20:48,302 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:20:48,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:20:48,302 INFO L82 PathProgramCache]: Analyzing trace with hash 1547139530, now seen corresponding path program 1 times [2019-11-15 20:20:48,303 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:20:48,303 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662135127] [2019-11-15 20:20:48,303 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:48,303 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:48,303 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:20:48,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:20:48,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:20:48,381 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1662135127] [2019-11-15 20:20:48,382 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:20:48,382 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:20:48,382 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1222354526] [2019-11-15 20:20:48,382 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:20:48,383 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:20:48,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:20:48,383 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:20:48,383 INFO L87 Difference]: Start difference. First operand 45120 states and 164958 transitions. Second operand 5 states. [2019-11-15 20:20:49,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:20:49,697 INFO L93 Difference]: Finished difference Result 115002 states and 419394 transitions. [2019-11-15 20:20:49,698 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 20:20:49,698 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-11-15 20:20:49,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:20:49,993 INFO L225 Difference]: With dead ends: 115002 [2019-11-15 20:20:49,993 INFO L226 Difference]: Without dead ends: 114262 [2019-11-15 20:20:49,994 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-15 20:20:50,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114262 states. [2019-11-15 20:20:52,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114262 to 64599. [2019-11-15 20:20:52,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64599 states. [2019-11-15 20:20:52,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64599 states to 64599 states and 236588 transitions. [2019-11-15 20:20:52,423 INFO L78 Accepts]: Start accepts. Automaton has 64599 states and 236588 transitions. Word has length 65 [2019-11-15 20:20:52,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:20:52,424 INFO L462 AbstractCegarLoop]: Abstraction has 64599 states and 236588 transitions. [2019-11-15 20:20:52,424 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:20:52,424 INFO L276 IsEmpty]: Start isEmpty. Operand 64599 states and 236588 transitions. [2019-11-15 20:20:52,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-15 20:20:52,478 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:20:52,478 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:20:52,478 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:20:52,478 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:20:52,478 INFO L82 PathProgramCache]: Analyzing trace with hash 1184022475, now seen corresponding path program 1 times [2019-11-15 20:20:52,479 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:20:52,479 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1387138278] [2019-11-15 20:20:52,479 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:52,479 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:52,479 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:20:52,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:20:52,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:20:52,657 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1387138278] [2019-11-15 20:20:52,658 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:20:52,658 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:20:52,659 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1161220360] [2019-11-15 20:20:52,659 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:20:52,659 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:20:52,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:20:52,662 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:20:52,662 INFO L87 Difference]: Start difference. First operand 64599 states and 236588 transitions. Second operand 6 states. [2019-11-15 20:20:53,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:20:53,525 INFO L93 Difference]: Finished difference Result 71048 states and 257943 transitions. [2019-11-15 20:20:53,526 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:20:53,526 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-11-15 20:20:53,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:20:53,738 INFO L225 Difference]: With dead ends: 71048 [2019-11-15 20:20:53,738 INFO L226 Difference]: Without dead ends: 71048 [2019-11-15 20:20:53,739 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:20:54,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71048 states. [2019-11-15 20:20:54,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71048 to 65451. [2019-11-15 20:20:54,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65451 states. [2019-11-15 20:20:55,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65451 states to 65451 states and 239375 transitions. [2019-11-15 20:20:55,086 INFO L78 Accepts]: Start accepts. Automaton has 65451 states and 239375 transitions. Word has length 65 [2019-11-15 20:20:55,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:20:55,086 INFO L462 AbstractCegarLoop]: Abstraction has 65451 states and 239375 transitions. [2019-11-15 20:20:55,086 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:20:55,086 INFO L276 IsEmpty]: Start isEmpty. Operand 65451 states and 239375 transitions. [2019-11-15 20:20:55,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-11-15 20:20:55,173 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:20:55,173 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:20:55,173 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:20:55,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:20:55,174 INFO L82 PathProgramCache]: Analyzing trace with hash -1183167156, now seen corresponding path program 1 times [2019-11-15 20:20:55,174 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:20:55,174 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1433172201] [2019-11-15 20:20:55,175 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:55,175 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:55,175 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:20:55,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:20:55,314 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:20:55,315 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1433172201] [2019-11-15 20:20:55,315 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:20:55,316 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:20:55,316 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1602154116] [2019-11-15 20:20:55,316 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:20:55,317 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:20:55,317 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:20:55,317 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:20:55,317 INFO L87 Difference]: Start difference. First operand 65451 states and 239375 transitions. Second operand 7 states. [2019-11-15 20:20:57,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:20:57,051 INFO L93 Difference]: Finished difference Result 75675 states and 272886 transitions. [2019-11-15 20:20:57,051 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-11-15 20:20:57,051 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-11-15 20:20:57,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:20:57,227 INFO L225 Difference]: With dead ends: 75675 [2019-11-15 20:20:57,227 INFO L226 Difference]: Without dead ends: 75475 [2019-11-15 20:20:57,227 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-11-15 20:20:57,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75475 states. [2019-11-15 20:20:58,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75475 to 66329. [2019-11-15 20:20:58,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66329 states. [2019-11-15 20:20:58,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66329 states to 66329 states and 242246 transitions. [2019-11-15 20:20:58,575 INFO L78 Accepts]: Start accepts. Automaton has 66329 states and 242246 transitions. Word has length 65 [2019-11-15 20:20:58,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:20:58,576 INFO L462 AbstractCegarLoop]: Abstraction has 66329 states and 242246 transitions. [2019-11-15 20:20:58,576 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:20:58,576 INFO L276 IsEmpty]: Start isEmpty. Operand 66329 states and 242246 transitions. [2019-11-15 20:20:58,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-11-15 20:20:58,638 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:20:58,639 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:20:58,639 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:20:58,639 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:20:58,640 INFO L82 PathProgramCache]: Analyzing trace with hash -1502327268, now seen corresponding path program 1 times [2019-11-15 20:20:58,640 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:20:58,640 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [586851674] [2019-11-15 20:20:58,640 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:58,640 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:20:58,641 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:20:58,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:20:58,710 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:20:58,712 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [586851674] [2019-11-15 20:20:58,712 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:20:58,712 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:20:58,712 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1299523862] [2019-11-15 20:20:58,713 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:20:58,713 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:20:58,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:20:58,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:20:58,714 INFO L87 Difference]: Start difference. First operand 66329 states and 242246 transitions. Second operand 3 states. [2019-11-15 20:20:59,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:20:59,035 INFO L93 Difference]: Finished difference Result 64370 states and 233071 transitions. [2019-11-15 20:20:59,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:20:59,035 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-11-15 20:20:59,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:20:59,184 INFO L225 Difference]: With dead ends: 64370 [2019-11-15 20:20:59,184 INFO L226 Difference]: Without dead ends: 64208 [2019-11-15 20:20:59,185 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:20:59,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64208 states. [2019-11-15 20:21:00,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64208 to 64180. [2019-11-15 20:21:00,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64180 states. [2019-11-15 20:21:01,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64180 states to 64180 states and 232443 transitions. [2019-11-15 20:21:01,362 INFO L78 Accepts]: Start accepts. Automaton has 64180 states and 232443 transitions. Word has length 67 [2019-11-15 20:21:01,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:01,363 INFO L462 AbstractCegarLoop]: Abstraction has 64180 states and 232443 transitions. [2019-11-15 20:21:01,363 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:21:01,363 INFO L276 IsEmpty]: Start isEmpty. Operand 64180 states and 232443 transitions. [2019-11-15 20:21:01,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-11-15 20:21:01,421 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:01,421 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:01,421 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:01,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:01,422 INFO L82 PathProgramCache]: Analyzing trace with hash -1470674241, now seen corresponding path program 1 times [2019-11-15 20:21:01,422 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:01,422 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [727067233] [2019-11-15 20:21:01,422 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:01,423 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:01,423 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:01,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:01,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:01,511 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [727067233] [2019-11-15 20:21:01,511 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:01,511 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:21:01,511 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1872204076] [2019-11-15 20:21:01,512 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:21:01,513 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:01,513 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:21:01,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:21:01,513 INFO L87 Difference]: Start difference. First operand 64180 states and 232443 transitions. Second operand 4 states. [2019-11-15 20:21:01,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:01,605 INFO L93 Difference]: Finished difference Result 16840 states and 53043 transitions. [2019-11-15 20:21:01,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-15 20:21:01,605 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 68 [2019-11-15 20:21:01,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:01,631 INFO L225 Difference]: With dead ends: 16840 [2019-11-15 20:21:01,632 INFO L226 Difference]: Without dead ends: 16137 [2019-11-15 20:21:01,632 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:21:01,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16137 states. [2019-11-15 20:21:01,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16137 to 16001. [2019-11-15 20:21:01,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16001 states. [2019-11-15 20:21:01,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16001 states to 16001 states and 50461 transitions. [2019-11-15 20:21:01,871 INFO L78 Accepts]: Start accepts. Automaton has 16001 states and 50461 transitions. Word has length 68 [2019-11-15 20:21:01,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:01,871 INFO L462 AbstractCegarLoop]: Abstraction has 16001 states and 50461 transitions. [2019-11-15 20:21:01,871 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:21:01,871 INFO L276 IsEmpty]: Start isEmpty. Operand 16001 states and 50461 transitions. [2019-11-15 20:21:01,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-11-15 20:21:01,883 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:01,883 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:01,884 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:01,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:01,884 INFO L82 PathProgramCache]: Analyzing trace with hash 1982614502, now seen corresponding path program 1 times [2019-11-15 20:21:01,885 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:01,885 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [46404455] [2019-11-15 20:21:01,885 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:01,885 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:01,885 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:01,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:02,000 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:02,000 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [46404455] [2019-11-15 20:21:02,000 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:02,001 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:21:02,001 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [843412599] [2019-11-15 20:21:02,001 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:21:02,002 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:02,002 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:21:02,002 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:21:02,002 INFO L87 Difference]: Start difference. First operand 16001 states and 50461 transitions. Second operand 8 states. [2019-11-15 20:21:02,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:02,815 INFO L93 Difference]: Finished difference Result 17894 states and 55974 transitions. [2019-11-15 20:21:02,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-11-15 20:21:02,815 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 77 [2019-11-15 20:21:02,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:02,850 INFO L225 Difference]: With dead ends: 17894 [2019-11-15 20:21:02,850 INFO L226 Difference]: Without dead ends: 17846 [2019-11-15 20:21:02,851 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=102, Invalid=404, Unknown=0, NotChecked=0, Total=506 [2019-11-15 20:21:02,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17846 states. [2019-11-15 20:21:03,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17846 to 16094. [2019-11-15 20:21:03,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16094 states. [2019-11-15 20:21:03,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16094 states to 16094 states and 50886 transitions. [2019-11-15 20:21:03,105 INFO L78 Accepts]: Start accepts. Automaton has 16094 states and 50886 transitions. Word has length 77 [2019-11-15 20:21:03,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:03,105 INFO L462 AbstractCegarLoop]: Abstraction has 16094 states and 50886 transitions. [2019-11-15 20:21:03,105 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:21:03,105 INFO L276 IsEmpty]: Start isEmpty. Operand 16094 states and 50886 transitions. [2019-11-15 20:21:03,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:21:03,123 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:03,123 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:03,123 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:03,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:03,123 INFO L82 PathProgramCache]: Analyzing trace with hash -1432922001, now seen corresponding path program 1 times [2019-11-15 20:21:03,124 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:03,124 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563637166] [2019-11-15 20:21:03,124 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:03,124 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:03,124 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:03,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:03,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:03,251 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [563637166] [2019-11-15 20:21:03,251 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:03,251 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:21:03,252 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [456544395] [2019-11-15 20:21:03,252 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:21:03,252 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:03,253 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:21:03,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:21:03,253 INFO L87 Difference]: Start difference. First operand 16094 states and 50886 transitions. Second operand 6 states. [2019-11-15 20:21:03,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:03,754 INFO L93 Difference]: Finished difference Result 17857 states and 55827 transitions. [2019-11-15 20:21:03,754 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:21:03,754 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-11-15 20:21:03,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:03,782 INFO L225 Difference]: With dead ends: 17857 [2019-11-15 20:21:03,782 INFO L226 Difference]: Without dead ends: 17857 [2019-11-15 20:21:03,783 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:21:03,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17857 states. [2019-11-15 20:21:04,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17857 to 17110. [2019-11-15 20:21:04,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17110 states. [2019-11-15 20:21:04,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17110 states to 17110 states and 53670 transitions. [2019-11-15 20:21:04,042 INFO L78 Accepts]: Start accepts. Automaton has 17110 states and 53670 transitions. Word has length 80 [2019-11-15 20:21:04,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:04,043 INFO L462 AbstractCegarLoop]: Abstraction has 17110 states and 53670 transitions. [2019-11-15 20:21:04,043 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:21:04,043 INFO L276 IsEmpty]: Start isEmpty. Operand 17110 states and 53670 transitions. [2019-11-15 20:21:04,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:21:04,058 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:04,059 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:04,059 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:04,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:04,059 INFO L82 PathProgramCache]: Analyzing trace with hash 926385008, now seen corresponding path program 1 times [2019-11-15 20:21:04,059 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:04,059 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1434064047] [2019-11-15 20:21:04,060 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:04,060 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:04,060 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:04,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:04,177 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:04,177 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1434064047] [2019-11-15 20:21:04,177 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:04,177 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:21:04,178 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [750571131] [2019-11-15 20:21:04,178 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:21:04,178 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:04,178 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:21:04,178 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:21:04,178 INFO L87 Difference]: Start difference. First operand 17110 states and 53670 transitions. Second operand 7 states. [2019-11-15 20:21:04,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:04,692 INFO L93 Difference]: Finished difference Result 18508 states and 57510 transitions. [2019-11-15 20:21:04,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-15 20:21:04,693 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-11-15 20:21:04,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:04,722 INFO L225 Difference]: With dead ends: 18508 [2019-11-15 20:21:04,722 INFO L226 Difference]: Without dead ends: 18508 [2019-11-15 20:21:04,722 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:21:04,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18508 states. [2019-11-15 20:21:04,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18508 to 17958. [2019-11-15 20:21:04,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17958 states. [2019-11-15 20:21:04,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17958 states to 17958 states and 55879 transitions. [2019-11-15 20:21:04,990 INFO L78 Accepts]: Start accepts. Automaton has 17958 states and 55879 transitions. Word has length 80 [2019-11-15 20:21:04,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:04,991 INFO L462 AbstractCegarLoop]: Abstraction has 17958 states and 55879 transitions. [2019-11-15 20:21:04,991 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:21:04,991 INFO L276 IsEmpty]: Start isEmpty. Operand 17958 states and 55879 transitions. [2019-11-15 20:21:05,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-11-15 20:21:05,008 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:05,008 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:05,009 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:05,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:05,009 INFO L82 PathProgramCache]: Analyzing trace with hash 1256150769, now seen corresponding path program 1 times [2019-11-15 20:21:05,009 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:05,010 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [46225626] [2019-11-15 20:21:05,010 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:05,010 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:05,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:05,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:05,078 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:05,078 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [46225626] [2019-11-15 20:21:05,079 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:05,079 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-15 20:21:05,079 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1809892823] [2019-11-15 20:21:05,080 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-15 20:21:05,080 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:05,080 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-15 20:21:05,080 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:21:05,081 INFO L87 Difference]: Start difference. First operand 17958 states and 55879 transitions. Second operand 3 states. [2019-11-15 20:21:05,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:05,160 INFO L93 Difference]: Finished difference Result 16132 states and 49733 transitions. [2019-11-15 20:21:05,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-15 20:21:05,161 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2019-11-15 20:21:05,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:05,186 INFO L225 Difference]: With dead ends: 16132 [2019-11-15 20:21:05,187 INFO L226 Difference]: Without dead ends: 16132 [2019-11-15 20:21:05,188 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-15 20:21:05,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16132 states. [2019-11-15 20:21:05,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16132 to 15826. [2019-11-15 20:21:05,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15826 states. [2019-11-15 20:21:05,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15826 states to 15826 states and 48840 transitions. [2019-11-15 20:21:05,420 INFO L78 Accepts]: Start accepts. Automaton has 15826 states and 48840 transitions. Word has length 80 [2019-11-15 20:21:05,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:05,420 INFO L462 AbstractCegarLoop]: Abstraction has 15826 states and 48840 transitions. [2019-11-15 20:21:05,420 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-15 20:21:05,420 INFO L276 IsEmpty]: Start isEmpty. Operand 15826 states and 48840 transitions. [2019-11-15 20:21:05,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-11-15 20:21:05,433 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:05,434 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:05,434 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:05,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:05,434 INFO L82 PathProgramCache]: Analyzing trace with hash 1897409041, now seen corresponding path program 1 times [2019-11-15 20:21:05,434 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:05,434 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1396484233] [2019-11-15 20:21:05,434 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:05,435 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:05,435 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:05,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:05,522 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:05,522 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1396484233] [2019-11-15 20:21:05,522 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:05,523 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:21:05,523 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [11663264] [2019-11-15 20:21:05,523 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:21:05,523 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:05,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:21:05,524 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:21:05,524 INFO L87 Difference]: Start difference. First operand 15826 states and 48840 transitions. Second operand 5 states. [2019-11-15 20:21:05,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:05,581 INFO L93 Difference]: Finished difference Result 2362 states and 5859 transitions. [2019-11-15 20:21:05,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-15 20:21:05,582 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 81 [2019-11-15 20:21:05,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:05,585 INFO L225 Difference]: With dead ends: 2362 [2019-11-15 20:21:05,585 INFO L226 Difference]: Without dead ends: 2101 [2019-11-15 20:21:05,585 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:21:05,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2101 states. [2019-11-15 20:21:05,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2101 to 1973. [2019-11-15 20:21:05,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1973 states. [2019-11-15 20:21:05,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1973 states to 1973 states and 4895 transitions. [2019-11-15 20:21:05,616 INFO L78 Accepts]: Start accepts. Automaton has 1973 states and 4895 transitions. Word has length 81 [2019-11-15 20:21:05,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:05,617 INFO L462 AbstractCegarLoop]: Abstraction has 1973 states and 4895 transitions. [2019-11-15 20:21:05,617 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:21:05,617 INFO L276 IsEmpty]: Start isEmpty. Operand 1973 states and 4895 transitions. [2019-11-15 20:21:05,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:21:05,620 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:05,620 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:05,620 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:05,621 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:05,621 INFO L82 PathProgramCache]: Analyzing trace with hash -1803827190, now seen corresponding path program 1 times [2019-11-15 20:21:05,621 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:05,621 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [510060922] [2019-11-15 20:21:05,622 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:05,622 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:05,622 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:05,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:05,687 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:05,688 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [510060922] [2019-11-15 20:21:05,688 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:05,688 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-15 20:21:05,688 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1578919564] [2019-11-15 20:21:05,689 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-15 20:21:05,689 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:05,689 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-15 20:21:05,690 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:21:05,690 INFO L87 Difference]: Start difference. First operand 1973 states and 4895 transitions. Second operand 4 states. [2019-11-15 20:21:05,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:05,841 INFO L93 Difference]: Finished difference Result 2289 states and 5617 transitions. [2019-11-15 20:21:05,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-15 20:21:05,842 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 94 [2019-11-15 20:21:05,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:05,844 INFO L225 Difference]: With dead ends: 2289 [2019-11-15 20:21:05,844 INFO L226 Difference]: Without dead ends: 2289 [2019-11-15 20:21:05,844 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-15 20:21:05,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2289 states. [2019-11-15 20:21:05,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2289 to 2064. [2019-11-15 20:21:05,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2064 states. [2019-11-15 20:21:05,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2064 states to 2064 states and 5104 transitions. [2019-11-15 20:21:05,866 INFO L78 Accepts]: Start accepts. Automaton has 2064 states and 5104 transitions. Word has length 94 [2019-11-15 20:21:05,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:05,866 INFO L462 AbstractCegarLoop]: Abstraction has 2064 states and 5104 transitions. [2019-11-15 20:21:05,866 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-15 20:21:05,866 INFO L276 IsEmpty]: Start isEmpty. Operand 2064 states and 5104 transitions. [2019-11-15 20:21:05,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:21:05,868 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:05,868 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:05,868 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:05,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:05,869 INFO L82 PathProgramCache]: Analyzing trace with hash 937991178, now seen corresponding path program 2 times [2019-11-15 20:21:05,869 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:05,869 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [190731600] [2019-11-15 20:21:05,869 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:05,869 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:05,869 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:05,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:05,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:05,956 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [190731600] [2019-11-15 20:21:05,957 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:05,957 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:21:05,957 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [247019513] [2019-11-15 20:21:05,959 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:21:05,959 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:05,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:21:05,960 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:21:05,960 INFO L87 Difference]: Start difference. First operand 2064 states and 5104 transitions. Second operand 5 states. [2019-11-15 20:21:06,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:06,357 INFO L93 Difference]: Finished difference Result 3473 states and 8503 transitions. [2019-11-15 20:21:06,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:21:06,358 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-11-15 20:21:06,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:06,361 INFO L225 Difference]: With dead ends: 3473 [2019-11-15 20:21:06,361 INFO L226 Difference]: Without dead ends: 3473 [2019-11-15 20:21:06,361 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:21:06,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3473 states. [2019-11-15 20:21:06,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3473 to 2397. [2019-11-15 20:21:06,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2397 states. [2019-11-15 20:21:06,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2397 states to 2397 states and 5980 transitions. [2019-11-15 20:21:06,392 INFO L78 Accepts]: Start accepts. Automaton has 2397 states and 5980 transitions. Word has length 94 [2019-11-15 20:21:06,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:06,393 INFO L462 AbstractCegarLoop]: Abstraction has 2397 states and 5980 transitions. [2019-11-15 20:21:06,393 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:21:06,393 INFO L276 IsEmpty]: Start isEmpty. Operand 2397 states and 5980 transitions. [2019-11-15 20:21:06,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:21:06,395 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:06,395 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:06,396 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:06,396 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:06,396 INFO L82 PathProgramCache]: Analyzing trace with hash 1899605195, now seen corresponding path program 1 times [2019-11-15 20:21:06,396 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:06,396 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1270537016] [2019-11-15 20:21:06,397 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:06,397 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:06,397 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:06,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:06,483 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:06,483 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1270537016] [2019-11-15 20:21:06,484 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:06,484 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:21:06,484 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [745524346] [2019-11-15 20:21:06,485 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:21:06,485 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:06,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:21:06,486 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:21:06,486 INFO L87 Difference]: Start difference. First operand 2397 states and 5980 transitions. Second operand 5 states. [2019-11-15 20:21:06,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:06,752 INFO L93 Difference]: Finished difference Result 2692 states and 6644 transitions. [2019-11-15 20:21:06,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:21:06,752 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-11-15 20:21:06,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:06,755 INFO L225 Difference]: With dead ends: 2692 [2019-11-15 20:21:06,755 INFO L226 Difference]: Without dead ends: 2692 [2019-11-15 20:21:06,755 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:21:06,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2692 states. [2019-11-15 20:21:06,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2692 to 2400. [2019-11-15 20:21:06,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2400 states. [2019-11-15 20:21:06,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2400 states to 2400 states and 5987 transitions. [2019-11-15 20:21:06,782 INFO L78 Accepts]: Start accepts. Automaton has 2400 states and 5987 transitions. Word has length 94 [2019-11-15 20:21:06,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:06,783 INFO L462 AbstractCegarLoop]: Abstraction has 2400 states and 5987 transitions. [2019-11-15 20:21:06,783 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:21:06,783 INFO L276 IsEmpty]: Start isEmpty. Operand 2400 states and 5987 transitions. [2019-11-15 20:21:06,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:21:06,785 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:06,785 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:06,785 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:06,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:06,786 INFO L82 PathProgramCache]: Analyzing trace with hash 976921612, now seen corresponding path program 1 times [2019-11-15 20:21:06,786 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:06,786 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [964803664] [2019-11-15 20:21:06,786 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:06,787 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:06,787 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:06,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:06,927 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:06,927 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [964803664] [2019-11-15 20:21:06,927 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:06,928 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:21:06,928 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1982036407] [2019-11-15 20:21:06,928 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:21:06,928 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:06,929 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:21:06,929 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:21:06,929 INFO L87 Difference]: Start difference. First operand 2400 states and 5987 transitions. Second operand 8 states. [2019-11-15 20:21:07,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:07,664 INFO L93 Difference]: Finished difference Result 3645 states and 8851 transitions. [2019-11-15 20:21:07,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-15 20:21:07,664 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 94 [2019-11-15 20:21:07,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:07,668 INFO L225 Difference]: With dead ends: 3645 [2019-11-15 20:21:07,668 INFO L226 Difference]: Without dead ends: 3627 [2019-11-15 20:21:07,668 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2019-11-15 20:21:07,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3627 states. [2019-11-15 20:21:07,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3627 to 2604. [2019-11-15 20:21:07,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2604 states. [2019-11-15 20:21:07,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2604 states to 2604 states and 6468 transitions. [2019-11-15 20:21:07,702 INFO L78 Accepts]: Start accepts. Automaton has 2604 states and 6468 transitions. Word has length 94 [2019-11-15 20:21:07,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:07,702 INFO L462 AbstractCegarLoop]: Abstraction has 2604 states and 6468 transitions. [2019-11-15 20:21:07,702 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:21:07,702 INFO L276 IsEmpty]: Start isEmpty. Operand 2604 states and 6468 transitions. [2019-11-15 20:21:07,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:21:07,704 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:07,705 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:07,705 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:07,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:07,705 INFO L82 PathProgramCache]: Analyzing trace with hash -2073281203, now seen corresponding path program 1 times [2019-11-15 20:21:07,706 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:07,706 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1804069166] [2019-11-15 20:21:07,706 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:07,706 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:07,706 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:07,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:07,897 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:07,898 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1804069166] [2019-11-15 20:21:07,898 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:07,898 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:21:07,899 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1259792465] [2019-11-15 20:21:07,899 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:21:07,899 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:07,899 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:21:07,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:21:07,900 INFO L87 Difference]: Start difference. First operand 2604 states and 6468 transitions. Second operand 7 states. [2019-11-15 20:21:08,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:08,172 INFO L93 Difference]: Finished difference Result 2980 states and 7211 transitions. [2019-11-15 20:21:08,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 20:21:08,173 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-11-15 20:21:08,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:08,176 INFO L225 Difference]: With dead ends: 2980 [2019-11-15 20:21:08,176 INFO L226 Difference]: Without dead ends: 2980 [2019-11-15 20:21:08,176 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:21:08,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2980 states. [2019-11-15 20:21:08,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2980 to 2752. [2019-11-15 20:21:08,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2752 states. [2019-11-15 20:21:08,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2752 states to 2752 states and 6745 transitions. [2019-11-15 20:21:08,209 INFO L78 Accepts]: Start accepts. Automaton has 2752 states and 6745 transitions. Word has length 94 [2019-11-15 20:21:08,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:08,209 INFO L462 AbstractCegarLoop]: Abstraction has 2752 states and 6745 transitions. [2019-11-15 20:21:08,209 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:21:08,209 INFO L276 IsEmpty]: Start isEmpty. Operand 2752 states and 6745 transitions. [2019-11-15 20:21:08,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:21:08,211 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:08,212 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:08,212 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:08,212 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:08,212 INFO L82 PathProgramCache]: Analyzing trace with hash -1743515442, now seen corresponding path program 1 times [2019-11-15 20:21:08,213 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:08,213 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2034707195] [2019-11-15 20:21:08,213 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:08,213 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:08,214 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:08,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:08,444 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:08,445 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2034707195] [2019-11-15 20:21:08,445 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:08,445 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-15 20:21:08,446 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1473114875] [2019-11-15 20:21:08,448 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-15 20:21:08,448 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:08,449 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-15 20:21:08,449 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2019-11-15 20:21:08,449 INFO L87 Difference]: Start difference. First operand 2752 states and 6745 transitions. Second operand 10 states. [2019-11-15 20:21:09,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:09,327 INFO L93 Difference]: Finished difference Result 3160 states and 7560 transitions. [2019-11-15 20:21:09,328 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-15 20:21:09,328 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 94 [2019-11-15 20:21:09,328 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:09,331 INFO L225 Difference]: With dead ends: 3160 [2019-11-15 20:21:09,332 INFO L226 Difference]: Without dead ends: 3112 [2019-11-15 20:21:09,332 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2019-11-15 20:21:09,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3112 states. [2019-11-15 20:21:09,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3112 to 2889. [2019-11-15 20:21:09,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2889 states. [2019-11-15 20:21:09,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2889 states to 2889 states and 7043 transitions. [2019-11-15 20:21:09,376 INFO L78 Accepts]: Start accepts. Automaton has 2889 states and 7043 transitions. Word has length 94 [2019-11-15 20:21:09,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:09,376 INFO L462 AbstractCegarLoop]: Abstraction has 2889 states and 7043 transitions. [2019-11-15 20:21:09,377 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-15 20:21:09,377 INFO L276 IsEmpty]: Start isEmpty. Operand 2889 states and 7043 transitions. [2019-11-15 20:21:09,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:21:09,382 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:09,382 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:09,382 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:09,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:09,385 INFO L82 PathProgramCache]: Analyzing trace with hash -628972914, now seen corresponding path program 1 times [2019-11-15 20:21:09,385 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:09,386 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [222951641] [2019-11-15 20:21:09,386 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:09,386 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:09,386 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:09,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:09,517 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:09,517 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [222951641] [2019-11-15 20:21:09,518 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:09,518 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:21:09,518 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2012546012] [2019-11-15 20:21:09,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:21:09,519 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:09,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:21:09,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:21:09,520 INFO L87 Difference]: Start difference. First operand 2889 states and 7043 transitions. Second operand 7 states. [2019-11-15 20:21:09,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:09,898 INFO L93 Difference]: Finished difference Result 3073 states and 7376 transitions. [2019-11-15 20:21:09,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-15 20:21:09,899 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-11-15 20:21:09,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:09,903 INFO L225 Difference]: With dead ends: 3073 [2019-11-15 20:21:09,903 INFO L226 Difference]: Without dead ends: 3055 [2019-11-15 20:21:09,906 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2019-11-15 20:21:09,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3055 states. [2019-11-15 20:21:09,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3055 to 2926. [2019-11-15 20:21:09,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2926 states. [2019-11-15 20:21:09,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2926 states to 2926 states and 7094 transitions. [2019-11-15 20:21:09,967 INFO L78 Accepts]: Start accepts. Automaton has 2926 states and 7094 transitions. Word has length 94 [2019-11-15 20:21:09,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:09,968 INFO L462 AbstractCegarLoop]: Abstraction has 2926 states and 7094 transitions. [2019-11-15 20:21:09,968 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:21:09,968 INFO L276 IsEmpty]: Start isEmpty. Operand 2926 states and 7094 transitions. [2019-11-15 20:21:09,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:21:09,973 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:09,973 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:09,973 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:09,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:09,974 INFO L82 PathProgramCache]: Analyzing trace with hash 1965253903, now seen corresponding path program 1 times [2019-11-15 20:21:09,974 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:09,974 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2093151247] [2019-11-15 20:21:09,975 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:09,975 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:09,975 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:09,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:10,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:10,090 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2093151247] [2019-11-15 20:21:10,090 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:10,090 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-15 20:21:10,091 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1127460419] [2019-11-15 20:21:10,091 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-15 20:21:10,092 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:10,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-15 20:21:10,092 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-15 20:21:10,092 INFO L87 Difference]: Start difference. First operand 2926 states and 7094 transitions. Second operand 6 states. [2019-11-15 20:21:10,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:10,293 INFO L93 Difference]: Finished difference Result 2954 states and 7130 transitions. [2019-11-15 20:21:10,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-15 20:21:10,294 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-11-15 20:21:10,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:10,298 INFO L225 Difference]: With dead ends: 2954 [2019-11-15 20:21:10,298 INFO L226 Difference]: Without dead ends: 2954 [2019-11-15 20:21:10,298 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:21:10,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2954 states. [2019-11-15 20:21:10,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2954 to 2848. [2019-11-15 20:21:10,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2848 states. [2019-11-15 20:21:10,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2848 states to 2848 states and 6914 transitions. [2019-11-15 20:21:10,343 INFO L78 Accepts]: Start accepts. Automaton has 2848 states and 6914 transitions. Word has length 94 [2019-11-15 20:21:10,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:10,343 INFO L462 AbstractCegarLoop]: Abstraction has 2848 states and 6914 transitions. [2019-11-15 20:21:10,344 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-15 20:21:10,344 INFO L276 IsEmpty]: Start isEmpty. Operand 2848 states and 6914 transitions. [2019-11-15 20:21:10,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:21:10,348 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:10,348 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:10,348 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:10,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:10,349 INFO L82 PathProgramCache]: Analyzing trace with hash -610324849, now seen corresponding path program 1 times [2019-11-15 20:21:10,349 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:10,349 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [935576288] [2019-11-15 20:21:10,349 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:10,349 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:10,350 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:10,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:10,542 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:10,542 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [935576288] [2019-11-15 20:21:10,542 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:10,543 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-15 20:21:10,543 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1441733281] [2019-11-15 20:21:10,543 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-15 20:21:10,544 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:10,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-15 20:21:10,544 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-15 20:21:10,544 INFO L87 Difference]: Start difference. First operand 2848 states and 6914 transitions. Second operand 8 states. [2019-11-15 20:21:10,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:10,854 INFO L93 Difference]: Finished difference Result 2893 states and 6896 transitions. [2019-11-15 20:21:10,855 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-15 20:21:10,855 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 94 [2019-11-15 20:21:10,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:10,859 INFO L225 Difference]: With dead ends: 2893 [2019-11-15 20:21:10,859 INFO L226 Difference]: Without dead ends: 2821 [2019-11-15 20:21:10,859 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-11-15 20:21:10,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2821 states. [2019-11-15 20:21:10,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2821 to 2660. [2019-11-15 20:21:10,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2660 states. [2019-11-15 20:21:10,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2660 states to 2660 states and 6450 transitions. [2019-11-15 20:21:10,902 INFO L78 Accepts]: Start accepts. Automaton has 2660 states and 6450 transitions. Word has length 94 [2019-11-15 20:21:10,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:10,902 INFO L462 AbstractCegarLoop]: Abstraction has 2660 states and 6450 transitions. [2019-11-15 20:21:10,902 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-15 20:21:10,903 INFO L276 IsEmpty]: Start isEmpty. Operand 2660 states and 6450 transitions. [2019-11-15 20:21:10,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:21:10,906 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:10,906 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:10,907 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:10,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:10,907 INFO L82 PathProgramCache]: Analyzing trace with hash -1196522800, now seen corresponding path program 1 times [2019-11-15 20:21:10,907 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:10,908 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1660939525] [2019-11-15 20:21:10,908 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:10,908 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:10,908 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:10,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:11,010 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:11,011 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1660939525] [2019-11-15 20:21:11,011 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:11,011 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-15 20:21:11,012 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [107124984] [2019-11-15 20:21:11,012 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-15 20:21:11,012 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:11,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-15 20:21:11,013 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-15 20:21:11,013 INFO L87 Difference]: Start difference. First operand 2660 states and 6450 transitions. Second operand 5 states. [2019-11-15 20:21:11,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:11,231 INFO L93 Difference]: Finished difference Result 2777 states and 6669 transitions. [2019-11-15 20:21:11,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:21:11,232 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-11-15 20:21:11,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:11,235 INFO L225 Difference]: With dead ends: 2777 [2019-11-15 20:21:11,236 INFO L226 Difference]: Without dead ends: 2759 [2019-11-15 20:21:11,236 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:21:11,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2759 states. [2019-11-15 20:21:11,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2759 to 2398. [2019-11-15 20:21:11,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2398 states. [2019-11-15 20:21:11,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2398 states to 2398 states and 5787 transitions. [2019-11-15 20:21:11,284 INFO L78 Accepts]: Start accepts. Automaton has 2398 states and 5787 transitions. Word has length 94 [2019-11-15 20:21:11,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:11,284 INFO L462 AbstractCegarLoop]: Abstraction has 2398 states and 5787 transitions. [2019-11-15 20:21:11,285 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-15 20:21:11,285 INFO L276 IsEmpty]: Start isEmpty. Operand 2398 states and 5787 transitions. [2019-11-15 20:21:11,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:21:11,288 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:11,288 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:11,288 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:11,289 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:11,289 INFO L82 PathProgramCache]: Analyzing trace with hash 48241681, now seen corresponding path program 1 times [2019-11-15 20:21:11,290 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:11,290 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [309391739] [2019-11-15 20:21:11,290 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:11,290 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:11,290 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:11,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:11,542 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:11,543 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [309391739] [2019-11-15 20:21:11,543 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:11,543 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-11-15 20:21:11,543 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [326649851] [2019-11-15 20:21:11,545 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-15 20:21:11,546 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:11,546 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-15 20:21:11,546 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2019-11-15 20:21:11,548 INFO L87 Difference]: Start difference. First operand 2398 states and 5787 transitions. Second operand 12 states. [2019-11-15 20:21:11,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:11,779 INFO L93 Difference]: Finished difference Result 3835 states and 9386 transitions. [2019-11-15 20:21:11,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-15 20:21:11,782 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 94 [2019-11-15 20:21:11,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:11,785 INFO L225 Difference]: With dead ends: 3835 [2019-11-15 20:21:11,786 INFO L226 Difference]: Without dead ends: 2935 [2019-11-15 20:21:11,786 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2019-11-15 20:21:11,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2935 states. [2019-11-15 20:21:11,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2935 to 2823. [2019-11-15 20:21:11,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2823 states. [2019-11-15 20:21:11,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2823 states to 2823 states and 6737 transitions. [2019-11-15 20:21:11,818 INFO L78 Accepts]: Start accepts. Automaton has 2823 states and 6737 transitions. Word has length 94 [2019-11-15 20:21:11,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:11,819 INFO L462 AbstractCegarLoop]: Abstraction has 2823 states and 6737 transitions. [2019-11-15 20:21:11,819 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-15 20:21:11,819 INFO L276 IsEmpty]: Start isEmpty. Operand 2823 states and 6737 transitions. [2019-11-15 20:21:11,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:21:11,822 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:11,822 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:11,822 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:11,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:11,823 INFO L82 PathProgramCache]: Analyzing trace with hash -169960121, now seen corresponding path program 2 times [2019-11-15 20:21:11,823 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:11,823 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1506794261] [2019-11-15 20:21:11,823 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:11,823 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:11,824 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:11,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-15 20:21:11,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-15 20:21:11,963 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1506794261] [2019-11-15 20:21:11,963 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-15 20:21:11,963 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-15 20:21:11,964 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [561985147] [2019-11-15 20:21:11,964 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-15 20:21:11,964 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-15 20:21:11,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-15 20:21:11,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-15 20:21:11,966 INFO L87 Difference]: Start difference. First operand 2823 states and 6737 transitions. Second operand 7 states. [2019-11-15 20:21:12,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-15 20:21:12,066 INFO L93 Difference]: Finished difference Result 4823 states and 11629 transitions. [2019-11-15 20:21:12,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-15 20:21:12,067 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-11-15 20:21:12,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-15 20:21:12,070 INFO L225 Difference]: With dead ends: 4823 [2019-11-15 20:21:12,070 INFO L226 Difference]: Without dead ends: 2227 [2019-11-15 20:21:12,072 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-15 20:21:12,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2227 states. [2019-11-15 20:21:12,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2227 to 2227. [2019-11-15 20:21:12,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2227 states. [2019-11-15 20:21:12,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2227 states to 2227 states and 5339 transitions. [2019-11-15 20:21:12,182 INFO L78 Accepts]: Start accepts. Automaton has 2227 states and 5339 transitions. Word has length 94 [2019-11-15 20:21:12,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-15 20:21:12,183 INFO L462 AbstractCegarLoop]: Abstraction has 2227 states and 5339 transitions. [2019-11-15 20:21:12,183 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-15 20:21:12,183 INFO L276 IsEmpty]: Start isEmpty. Operand 2227 states and 5339 transitions. [2019-11-15 20:21:12,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-11-15 20:21:12,185 INFO L372 BasicCegarLoop]: Found error trace [2019-11-15 20:21:12,185 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-15 20:21:12,186 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-15 20:21:12,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-15 20:21:12,186 INFO L82 PathProgramCache]: Analyzing trace with hash 654613161, now seen corresponding path program 3 times [2019-11-15 20:21:12,186 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-11-15 20:21:12,186 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [24272842] [2019-11-15 20:21:12,186 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:12,187 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-11-15 20:21:12,187 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-15 20:21:12,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:21:12,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-15 20:21:12,306 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-15 20:21:12,306 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-11-15 20:21:12,485 INFO L303 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2019-11-15 20:21:12,486 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.11 08:21:12 BasicIcfg [2019-11-15 20:21:12,487 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-15 20:21:12,487 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-15 20:21:12,487 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-15 20:21:12,488 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-15 20:21:12,488 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.11 08:20:26" (3/4) ... [2019-11-15 20:21:12,491 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-11-15 20:21:12,612 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_5227bc13-c0bd-4022-b2bc-4fcf1508c3c4/bin/uautomizer/witness.graphml [2019-11-15 20:21:12,613 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-15 20:21:12,615 INFO L168 Benchmark]: Toolchain (without parser) took 48416.66 ms. Allocated memory was 1.0 GB in the beginning and 4.4 GB in the end (delta: 3.3 GB). Free memory was 944.7 MB in the beginning and 3.6 GB in the end (delta: -2.6 GB). Peak memory consumption was 710.2 MB. Max. memory is 11.5 GB. [2019-11-15 20:21:12,615 INFO L168 Benchmark]: CDTParser took 0.32 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:21:12,616 INFO L168 Benchmark]: CACSL2BoogieTranslator took 888.36 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 123.7 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -145.3 MB). Peak memory consumption was 19.8 MB. Max. memory is 11.5 GB. [2019-11-15 20:21:12,616 INFO L168 Benchmark]: Boogie Procedure Inliner took 79.91 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-11-15 20:21:12,617 INFO L168 Benchmark]: Boogie Preprocessor took 43.23 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-15 20:21:12,617 INFO L168 Benchmark]: RCFGBuilder took 1018.33 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.3 MB). Peak memory consumption was 49.3 MB. Max. memory is 11.5 GB. [2019-11-15 20:21:12,618 INFO L168 Benchmark]: TraceAbstraction took 46256.07 ms. Allocated memory was 1.2 GB in the beginning and 4.4 GB in the end (delta: 3.2 GB). Free memory was 1.0 GB in the beginning and 3.7 GB in the end (delta: -2.6 GB). Peak memory consumption was 599.4 MB. Max. memory is 11.5 GB. [2019-11-15 20:21:12,618 INFO L168 Benchmark]: Witness Printer took 125.65 ms. Allocated memory is still 4.4 GB. Free memory was 3.7 GB in the beginning and 3.6 GB in the end (delta: 77.7 MB). Peak memory consumption was 77.7 MB. Max. memory is 11.5 GB. [2019-11-15 20:21:12,620 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.32 ms. Allocated memory is still 1.0 GB. Free memory is still 967.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 888.36 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 123.7 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -145.3 MB). Peak memory consumption was 19.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 79.91 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 43.23 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 1018.33 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.3 MB). Peak memory consumption was 49.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 46256.07 ms. Allocated memory was 1.2 GB in the beginning and 4.4 GB in the end (delta: 3.2 GB). Free memory was 1.0 GB in the beginning and 3.7 GB in the end (delta: -2.6 GB). Peak memory consumption was 599.4 MB. Max. memory is 11.5 GB. * Witness Printer took 125.65 ms. Allocated memory is still 4.4 GB. Free memory was 3.7 GB in the beginning and 3.6 GB in the end (delta: 77.7 MB). Peak memory consumption was 77.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L697] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L698] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L700] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L702] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L703] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L704] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L705] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L706] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L707] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L708] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L709] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L710] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L711] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L712] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L713] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L714] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L715] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L716] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L778] 0 pthread_t t2019; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L779] FCALL, FORK 0 pthread_create(&t2019, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L780] 0 pthread_t t2020; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] FCALL, FORK 0 pthread_create(&t2020, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L722] 1 y$w_buff1 = y$w_buff0 [L723] 1 y$w_buff0 = 2 [L724] 1 y$w_buff1_used = y$w_buff0_used [L725] 1 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L727] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L728] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L729] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L730] 1 y$r_buff0_thd1 = (_Bool)1 [L733] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L750] 2 __unbuffered_p1_EAX = x [L753] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L737] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L737] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L756] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L738] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L738] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L756] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L758] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L759] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L759] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L760] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L760] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L763] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L739] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L739] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L740] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L743] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L783] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L788] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L790] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L791] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 y$flush_delayed = weak$$choice2 [L797] 0 y$mem_tmp = y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L799] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L800] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L800] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L801] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 0 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L803] 0 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L804] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L806] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L806] 0 y = y$flush_delayed ? y$mem_tmp : y [L807] 0 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 175 locations, 3 error locations. Result: UNSAFE, OverallTime: 46.1s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 20.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7144 SDtfs, 7842 SDslu, 18458 SDs, 0 SdLazy, 7418 SolverSat, 511 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 8.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 334 GetRequests, 87 SyntacticMatches, 13 SemanticMatches, 234 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 417 ImplicationChecksByTransitivity, 2.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=66329occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 18.5s AutomataMinimizationTime, 29 MinimizatonAttempts, 113598 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.7s InterpolantComputationTime, 2302 NumberOfCodeBlocks, 2302 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 2179 ConstructedInterpolants, 0 QuantifiedInterpolants, 470340 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...